//#include "cuda_runtime.h"
//#include "device_launch_parameters.h"
//
//#include <iostream>
//
//#ifndef MAX_MASK_WIDTH
//#define MAX_MASK_WIDTH 10
//__constant__ float MASK[MAX_MASK_WIDTH];
//#endif
////this kernel is example for unefficent memory access. 
////this implementation considers only 1D grid. and assumes that mask width is odd number
////We are going to use constant memory to store the mask
//__global__ void convolution_1d_dram_and_constant(float * input, float* output, int array_lenght, int mask_width)
//{
//	int thread_index = blockIdx.x*blockDim.x + threadIdx.x;
//	float temp_value = 0;
//
//	int offset = thread_index - mask_width / 2;
//	for (int i = 0; i < mask_width; i++)
//	{
//		if ((offset + i) >= 0 && (offset + i) < array_lenght)
//		{
//			temp_value += input[offset + i] * MASK[i];
//		}
//	}
//
//	output[thread_index] = temp_value;
//}
//
//void run_code_convolution_2()
//{
//	int array_lenght = 128 * 2;
//	int mask_width = 5;
//
//	int array_byte_size = sizeof(float)*array_lenght;
//	int mask_byte_size = sizeof(float)*mask_width;
//
//	float *h_input_array, *h_mask, *h_output;
//	float *d_input_array, *d_output;
//
//	//host memory allocation
//	h_input_array = (float*)malloc(array_byte_size);
//	h_output = (float*)malloc(array_byte_size);
//	h_mask = (float*)malloc(mask_byte_size);
//
//	//initialize array
//	for (int i = 0; i < array_lenght; i++)
//	{
//		h_input_array[i] = 1.0f;
//	}
//
//	//initialize mask
//	for (int i = 0; i < mask_width; i++)
//	{
//		h_mask[i] = 1.0f;
//	}
//
//	dim3 grid(32);
//	dim3 block((array_lenght) / grid.x);
//
//	//device memory allocation
//	cudaMalloc((float**)&d_input_array, array_byte_size);
//	cudaMalloc((float**)&d_output, array_byte_size);
//
//	//transfer the initiazed arrays to device
//	cudaMemcpy(d_input_array, h_input_array, array_byte_size, cudaMemcpyHostToDevice);
//	cudaMemcpyToSymbol(MASK, h_mask, mask_byte_size);
//
//	//kernel launch
//	convolution_1d_dram_and_constant << <grid, block >> > (d_input_array, d_output, array_lenght, mask_width);
//	//test_kernel << <grid,block >>> (d_input_array);
//	cudaDeviceSynchronize();
//
//	//copy the output back to the host
//	cudaMemcpy(h_output, d_output, array_byte_size, cudaMemcpyDeviceToHost);
//
//	//free the device memory
//	cudaFree(d_input_array);
//	cudaFree(d_output);
//
//	//free the host memory
//	free(h_input_array);
//	free(h_output);
//	free(h_mask);
//}
//
////int main()
////{
////	run_code_convolution_2();
////	system("pause");
////	return 0;
////}
	.file	"tmpxft_00307ae8_00000000-6_convolution_1d_with_constant_memory_mask.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
//#include "cuda_runtime.h"
//#include "device_launch_parameters.h"
//
//#include <iostream>
//
//#ifndef MAX_MASK_WIDTH
//#define MAX_MASK_WIDTH 10
//__constant__ float MASK[MAX_MASK_WIDTH];
//#endif
////this kernel is example for unefficent memory access. 
////this implementation considers only 1D grid. and assumes that mask width is odd number
////We are going to use constant memory to store the mask
//__global__ void convolution_1d_dram_and_constant(float * input, float* output, int array_lenght, int mask_width)
//{
//	int thread_index = blockIdx.x*blockDim.x + threadIdx.x;
//	float temp_value = 0;
//
//	int offset = thread_index - mask_width / 2;
//	for (int i = 0; i < mask_width; i++)
//	{
//		if ((offset + i) >= 0 && (offset + i) < array_lenght)
//		{
//			temp_value += input[offset + i] * MASK[i];
//		}
//	}
//
//	output[thread_index] = temp_value;
//}
//
//void run_code_convolution_2()
//{
//	int array_lenght = 128 * 2;
//	int mask_width = 5;
//
//	int array_byte_size = sizeof(float)*array_lenght;
//	int mask_byte_size = sizeof(float)*mask_width;
//
//	float *h_input_array, *h_mask, *h_output;
//	float *d_input_array, *d_output;
//
//	//host memory allocation
//	h_input_array = (float*)malloc(array_byte_size);
//	h_output = (float*)malloc(array_byte_size);
//	h_mask = (float*)malloc(mask_byte_size);
//
//	//initialize array
//	for (int i = 0; i < array_lenght; i++)
//	{
//		h_input_array[i] = 1.0f;
//	}
//
//	//initialize mask
//	for (int i = 0; i < mask_width; i++)
//	{
//		h_mask[i] = 1.0f;
//	}
//
//	dim3 grid(32);
//	dim3 block((array_lenght) / grid.x);
//
//	//device memory allocation
//	cudaMalloc((float**)&d_input_array, array_byte_size);
//	cudaMalloc((float**)&d_output, array_byte_size);
//
//	//transfer the initiazed arrays to device
//	cudaMemcpy(d_input_array, h_input_array, array_byte_size, cudaMemcpyHostToDevice);
//	cudaMemcpyToSymbol(MASK, h_mask, mask_byte_size);
//
//	//kernel launch
//	convolution_1d_dram_and_constant << <grid, block >> > (d_input_array, d_output, array_lenght, mask_width);
//	//test_kernel << <grid,block >>> (d_input_array);
//	cudaDeviceSynchronize();
//
//	//copy the output back to the host
//	cudaMemcpy(h_output, d_output, array_byte_size, cudaMemcpyDeviceToHost);
//
//	//free the device memory
//	cudaFree(d_input_array);
//	cudaFree(d_output);
//
//	//free the host memory
//	free(h_input_array);
//	free(h_output);
//	free(h_mask);
//}
//
////int main()
////{
////	run_code_convolution_2();
////	system("pause");
////	return 0;
////}
	.text
	.file	"convolution_1d_with_constant_memory_mask.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
