/**
 * 2mm.cu: This file is part of the PolyBench/GPU 1.0 test suite.
 *
 *
 * Contact: Scott Grauer-Gray <sgrauerg@gmail.com>
 * Louis-Noel Pouchet <pouchet@cse.ohio-state.edu>
 * Web address: http://www.cse.ohio-state.edu/~pouchet/software/polybench/GPU
 */

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <assert.h>
#include <unistd.h>
#include <sys/time.h>
#include <cuda.h>

/* Problem size. */
# define NI 2048
# define NJ 2048
# define NK 2048
# define NL 2048

#define NUM_ITERATIONS 10

/* Thread block dimensions */
#define DIM_THREAD_BLOCK_X 32
#define DIM_THREAD_BLOCK_Y 8

/* Can switch DATA_TYPE between float and double */
typedef double DATA_TYPE;

void init_array(DATA_TYPE* A, DATA_TYPE* B, DATA_TYPE* C, DATA_TYPE* D)
{
	int i, j;

	for (i = 0; i < NI; i++)
	{
		for (j = 0; j < NK; j++)
		{
			A[i*NI + j] = ((DATA_TYPE) i*j) / NI;
		}
	}

	for (i = 0; i < NK; i++)
	{
		for (j = 0; j < NJ; j++)
		{
			B[i*NK + j] = ((DATA_TYPE) i*(j+1)) / NJ;
		}
	}

	for (i = 0; i < NL; i++)
	{
		for (j = 0; j < NJ; j++)
		{
			C[i*NL + j] = ((DATA_TYPE) i*(j+3)) / NL;
		}
	}

	for (i = 0; i < NI; i++)
	{
		for (j = 0; j < NL; j++)
		{
			D[i*NL + j] = ((DATA_TYPE) i*(j+2)) / NK;	
		}
	}
}

__global__ void mm2_kernel1(DATA_TYPE *A, DATA_TYPE *B, DATA_TYPE *C)
{
	int j = blockIdx.x * blockDim.x + threadIdx.x;
	int i = blockIdx.y * blockDim.y + threadIdx.y;

	if ((i < NI) && (j < NJ))
	{ 
		int k;
		for (k = 0; k < NK; k++)
		{
			C[i * NJ + j] += A[i * NK + k] * B[k * NJ + j];
		}
	}
}

__global__ void mm2_kernel2(DATA_TYPE *C, DATA_TYPE *D, DATA_TYPE *E)
{
	int j = blockIdx.x * blockDim.x + threadIdx.x;
	int i = blockIdx.y * blockDim.y + threadIdx.y;

	if ((i < NI) && (j < NL))
	{ 
		int k;
		for (k = 0; k < NJ; k++)
		{
			E[i * NL + j] += C[i * NJ + k] * D[k * NL + j];
		}
	}
}

void mm2Cuda(DATA_TYPE* A, DATA_TYPE* B, DATA_TYPE* C, DATA_TYPE* D, DATA_TYPE* E)
{
	dim3 block(DIM_THREAD_BLOCK_X, DIM_THREAD_BLOCK_Y);
	dim3 grid1((size_t)ceil( ((float)NJ) / ((float)block.x) ), (size_t)ceil( ((float)NI) / ((float)block.y)) );
	dim3 grid2((size_t)ceil( ((float)NL) / ((float)block.x) ), (size_t)ceil( ((float)NI) / ((float)block.y)) );
	mm2_kernel1<<<grid1,block>>>(A, B, C);
	cudaDeviceSynchronize();
	mm2_kernel2<<<grid2,block>>>(C, D, E);
	cudaDeviceSynchronize();
}

int main(int argc, char** argv)
{	
	DATA_TYPE* C;
	DATA_TYPE* A;
	DATA_TYPE* B;
	DATA_TYPE* D;
	DATA_TYPE* E;
	cudaEvent_t start, end;
	float time, average_time = 0;

#ifndef UNMANAGED
	cudaMallocManaged( &A, NI*NJ*sizeof(DATA_TYPE) );
	cudaMallocManaged( &B, NI*NJ*sizeof(DATA_TYPE) );
	cudaMallocManaged( &C, NI*NJ*sizeof(DATA_TYPE) );
	cudaMallocManaged( &D, NI*NJ*sizeof(DATA_TYPE) );
	cudaMallocManaged( &E, NI*NJ*sizeof(DATA_TYPE) );
	//initialize the arrays
  	init_array(A, B, C, D);

	for (int i = 0; i < NUM_ITERATIONS + 1; ++i) {
		cudaEventCreate(&start);
		cudaEventCreate(&end);
		cudaEventRecord(start);
		mm2Cuda(A, B, C, D, E);
		cudaEventRecord(end);
		cudaEventSynchronize(end);
		cudaEventElapsedTime(&time, start, end);
		if (i > 0) {
			// first iteration warms up the GPU
			average_time += time / NUM_ITERATIONS;
		}
	}
	cudaFree(A);
	cudaFree(B);
	cudaFree(C);
	cudaFree(D);
	cudaFree(E);
#else
	DATA_TYPE *gA, *gB, *gC, *gD, *gE;
	cudaMalloc((void **)&gA, sizeof(DATA_TYPE) * NI * NK);
	cudaMalloc((void **)&gB, sizeof(DATA_TYPE) * NK * NJ);
	cudaMalloc((void **)&gC, sizeof(DATA_TYPE) * NI * NJ);
	cudaMalloc((void **)&gD, sizeof(DATA_TYPE) * NJ * NL);
	cudaMalloc((void **)&gE, sizeof(DATA_TYPE) * NI * NL);
	
	C = (DATA_TYPE*)malloc(NI*NJ*sizeof(DATA_TYPE));
	A = (DATA_TYPE*)malloc(NI*NK*sizeof(DATA_TYPE));
	B = (DATA_TYPE*)malloc(NK*NJ*sizeof(DATA_TYPE));
	D = (DATA_TYPE*)malloc(NJ*NL*sizeof(DATA_TYPE));
	E = (DATA_TYPE*)malloc(NI*NL*sizeof(DATA_TYPE));
	DATA_TYPE* E_outputFromGpu = (DATA_TYPE*)malloc(NI*NL*sizeof(DATA_TYPE));


	//initialize the arrays
  	init_array(A, B, C, D);

	cudaMemcpy(gA, A, sizeof(DATA_TYPE) * NI * NK, cudaMemcpyHostToDevice);
	cudaMemcpy(gB, B, sizeof(DATA_TYPE) * NK * NJ, cudaMemcpyHostToDevice);
	cudaMemcpy(gC, C, sizeof(DATA_TYPE) * NK * NJ, cudaMemcpyHostToDevice);
	cudaMemcpy(gD, D, sizeof(DATA_TYPE) * NJ * NL, cudaMemcpyHostToDevice);
	cudaMemcpy(gE, E, sizeof(DATA_TYPE) * NI * NL, cudaMemcpyHostToDevice);

	for (int i = 0; i < NUM_ITERATIONS + 1; ++i) {
		cudaEventCreate(&start);
		cudaEventCreate(&end);
		cudaEventRecord(start);
		mm2Cuda(gA, gB, gC, gD, gE);
		cudaEventRecord(end);
		cudaEventSynchronize(end);
		cudaEventElapsedTime(&time, start, end);
		if (i > 0) {
			// first iteration warms up the GPU
			average_time += time / NUM_ITERATIONS;
		}
	}
	cudaMemcpy(E_outputFromGpu, gE, sizeof(DATA_TYPE) * NI * NL, cudaMemcpyDeviceToHost);

	cudaFree(gA);
	cudaFree(gB);
	cudaFree(gC);
	cudaFree(gD);
	cudaFree(gE);
	free(C);
	free(A);
	free(B);
	free(D);
	free(E);
	free(E_outputFromGpu);
#endif
	printf("%f\n", average_time);
  	return 0;
}


	.file	"tmpxft_003676bf_00000000-6_2mm.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2045:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2045:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10init_arrayPdS_S_S_
	.type	_Z10init_arrayPdS_S_S_, @function
_Z10init_arrayPdS_S_S_:
.LFB2040:
	.cfi_startproc
	endbr64
	movsd	.LC0(%rip), %xmm1
	movq	%rdx, %rax
	xorl	%r8d, %r8d
	movq	%rcx, %rdx
.L3:
	cvtsi2sdl	%r8d, %xmm2
	xorl	%ecx, %ecx
.L4:
	cvtsi2sdl	%ecx, %xmm0
	mulsd	%xmm2, %xmm0
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, (%rdi,%rcx,8)
	incq	%rcx
	cmpq	$2048, %rcx
	jne	.L4
	incl	%r8d
	addq	$16384, %rdi
	cmpl	$2048, %r8d
	jne	.L3
	xorl	%edi, %edi
.L5:
	cvtsi2sdl	%edi, %xmm2
	movl	$1, %ecx
.L6:
	cvtsi2sdl	%ecx, %xmm0
	mulsd	%xmm2, %xmm0
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, -8(%rsi,%rcx,8)
	incq	%rcx
	cmpq	$2049, %rcx
	jne	.L6
	incl	%edi
	addq	$16384, %rsi
	cmpl	$2048, %edi
	jne	.L5
	movq	%rax, %rcx
	xorl	%esi, %esi
.L9:
	cvtsi2sdl	%esi, %xmm2
	xorl	%eax, %eax
.L8:
	leal	3(%rax), %edi
	cvtsi2sdl	%edi, %xmm0
	mulsd	%xmm2, %xmm0
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, (%rcx,%rax,8)
	incq	%rax
	cmpq	$2048, %rax
	jne	.L8
	incl	%esi
	addq	$16384, %rcx
	cmpl	$2048, %esi
	jne	.L9
	xorl	%ecx, %ecx
.L10:
	cvtsi2sdl	%ecx, %xmm2
	xorl	%eax, %eax
.L11:
	leal	2(%rax), %esi
	cvtsi2sdl	%esi, %xmm0
	mulsd	%xmm2, %xmm0
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, (%rdx,%rax,8)
	incq	%rax
	cmpq	$2048, %rax
	jne	.L11
	incl	%ecx
	addq	$16384, %rdx
	cmpl	$2048, %ecx
	jne	.L10
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z10init_arrayPdS_S_S_, .-_Z10init_arrayPdS_S_S_
	.globl	_Z35__device_stub__Z11mm2_kernel1PdS_S_PdS_S_
	.type	_Z35__device_stub__Z11mm2_kernel1PdS_S_PdS_S_, @function
_Z35__device_stub__Z11mm2_kernel1PdS_S_PdS_S_:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11mm2_kernel1PdS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L20:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z35__device_stub__Z11mm2_kernel1PdS_S_PdS_S_, .-_Z35__device_stub__Z11mm2_kernel1PdS_S_PdS_S_
	.globl	_Z11mm2_kernel1PdS_S_
	.type	_Z11mm2_kernel1PdS_S_, @function
_Z11mm2_kernel1PdS_S_:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z11mm2_kernel1PdS_S_PdS_S_
	.cfi_endproc
.LFE2068:
	.size	_Z11mm2_kernel1PdS_S_, .-_Z11mm2_kernel1PdS_S_
	.globl	_Z35__device_stub__Z11mm2_kernel2PdS_S_PdS_S_
	.type	_Z35__device_stub__Z11mm2_kernel2PdS_S_PdS_S_, @function
_Z35__device_stub__Z11mm2_kernel2PdS_S_PdS_S_:
.LFB2069:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11mm2_kernel2PdS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L25:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2069:
	.size	_Z35__device_stub__Z11mm2_kernel2PdS_S_PdS_S_, .-_Z35__device_stub__Z11mm2_kernel2PdS_S_PdS_S_
	.globl	_Z11mm2_kernel2PdS_S_
	.type	_Z11mm2_kernel2PdS_S_, @function
_Z11mm2_kernel2PdS_S_:
.LFB2070:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z11mm2_kernel2PdS_S_PdS_S_
	.cfi_endproc
.LFE2070:
	.size	_Z11mm2_kernel2PdS_S_, .-_Z11mm2_kernel2PdS_S_
	.globl	_Z7mm2CudaPdS_S_S_S_
	.type	_Z7mm2CudaPdS_S_S_S_, @function
_Z7mm2CudaPdS_S_S_S_:
.LFB2041:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%r9d, %r9d
	movq	%rsi, %r14
	movl	$1, %esi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdi, %r13
	movabsq	$1099511627840, %rdi
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r8, %r12
	xorl	%r8d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	movl	$1, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdx, %rbx
	movl	$1073741825, %edx
	salq	$5, %rdx
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 36(%rsp)
	movl	$1, 44(%rsp)
	movq	%rdx, 12(%rsp)
	movl	$1, 20(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movq	%r13, %rdi
	call	_Z35__device_stub__Z11mm2_kernel1PdS_S_PdS_S_
.L31:
	call	cudaDeviceSynchronize@PLT
	movl	20(%rsp), %ecx
	movl	44(%rsp), %esi
	xorl	%r9d, %r9d
	movq	12(%rsp), %rdx
	movq	36(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_Z35__device_stub__Z11mm2_kernel2PdS_S_PdS_S_
.L32:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaDeviceSynchronize@PLT
	.cfi_endproc
.LFE2041:
	.size	_Z7mm2CudaPdS_S_S_S_, .-_Z7mm2CudaPdS_S_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"%f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2042:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	$1, %edx
	movl	$33554432, %esi
	xorl	%ebx, %ebx
	subq	$96, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rdi
	call	cudaMallocManaged@PLT
	leaq	48(%rsp), %rdi
	movl	$1, %edx
	movl	$33554432, %esi
	call	cudaMallocManaged@PLT
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	movl	$33554432, %esi
	call	cudaMallocManaged@PLT
	leaq	56(%rsp), %rdi
	movl	$1, %edx
	movl	$33554432, %esi
	call	cudaMallocManaged@PLT
	leaq	64(%rsp), %rdi
	movl	$1, %edx
	movl	$33554432, %esi
	call	cudaMallocManaged@PLT
	movq	56(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z10init_arrayPdS_S_S_
	movl	$0x00000000, 12(%rsp)
.L36:
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	80(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rdx
	movq	64(%rsp), %r8
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z7mm2CudaPdS_S_S_S_
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	80(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	80(%rsp), %rdx
	movq	72(%rsp), %rsi
	leaq	28(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	testl	%ebx, %ebx
	je	.L35
	movss	28(%rsp), %xmm0
	divss	.LC2(%rip), %xmm0
	addss	12(%rsp), %xmm0
	movss	%xmm0, 12(%rsp)
.L35:
	incl	%ebx
	cmpl	$11, %ebx
	jne	.L36
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$96, %rsp
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2042:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z11mm2_kernel2PdS_S_"
.LC5:
	.string	"_Z11mm2_kernel1PdS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2072:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11mm2_kernel2PdS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11mm2_kernel1PdS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2072:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1061158912
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1092616192
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * 2mm.cu: This file is part of the PolyBench/GPU 1.0 test suite.
 *
 *
 * Contact: Scott Grauer-Gray <sgrauerg@gmail.com>
 * Louis-Noel Pouchet <pouchet@cse.ohio-state.edu>
 * Web address: http://www.cse.ohio-state.edu/~pouchet/software/polybench/GPU
 */

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <assert.h>
#include <unistd.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>

/* Problem size. */
# define NI 2048
# define NJ 2048
# define NK 2048
# define NL 2048

#define NUM_ITERATIONS 10

/* Thread block dimensions */
#define DIM_THREAD_BLOCK_X 32
#define DIM_THREAD_BLOCK_Y 8

/* Can switch DATA_TYPE between float and double */
typedef double DATA_TYPE;

void init_array(DATA_TYPE* A, DATA_TYPE* B, DATA_TYPE* C, DATA_TYPE* D)
{
	int i, j;

	for (i = 0; i < NI; i++)
	{
		for (j = 0; j < NK; j++)
		{
			A[i*NI + j] = ((DATA_TYPE) i*j) / NI;
		}
	}

	for (i = 0; i < NK; i++)
	{
		for (j = 0; j < NJ; j++)
		{
			B[i*NK + j] = ((DATA_TYPE) i*(j+1)) / NJ;
		}
	}

	for (i = 0; i < NL; i++)
	{
		for (j = 0; j < NJ; j++)
		{
			C[i*NL + j] = ((DATA_TYPE) i*(j+3)) / NL;
		}
	}

	for (i = 0; i < NI; i++)
	{
		for (j = 0; j < NL; j++)
		{
			D[i*NL + j] = ((DATA_TYPE) i*(j+2)) / NK;	
		}
	}
}

__global__ void mm2_kernel1(DATA_TYPE *A, DATA_TYPE *B, DATA_TYPE *C)
{
	int j = blockIdx.x * blockDim.x + threadIdx.x;
	int i = blockIdx.y * blockDim.y + threadIdx.y;

	if ((i < NI) && (j < NJ))
	{ 
		int k;
		for (k = 0; k < NK; k++)
		{
			C[i * NJ + j] += A[i * NK + k] * B[k * NJ + j];
		}
	}
}

__global__ void mm2_kernel2(DATA_TYPE *C, DATA_TYPE *D, DATA_TYPE *E)
{
	int j = blockIdx.x * blockDim.x + threadIdx.x;
	int i = blockIdx.y * blockDim.y + threadIdx.y;

	if ((i < NI) && (j < NL))
	{ 
		int k;
		for (k = 0; k < NJ; k++)
		{
			E[i * NL + j] += C[i * NJ + k] * D[k * NL + j];
		}
	}
}

void mm2Cuda(DATA_TYPE* A, DATA_TYPE* B, DATA_TYPE* C, DATA_TYPE* D, DATA_TYPE* E)
{
	dim3 block(DIM_THREAD_BLOCK_X, DIM_THREAD_BLOCK_Y);
	dim3 grid1((size_t)ceil( ((float)NJ) / ((float)block.x) ), (size_t)ceil( ((float)NI) / ((float)block.y)) );
	dim3 grid2((size_t)ceil( ((float)NL) / ((float)block.x) ), (size_t)ceil( ((float)NI) / ((float)block.y)) );
	mm2_kernel1<<<grid1,block>>>(A, B, C);
	hipDeviceSynchronize();
	mm2_kernel2<<<grid2,block>>>(C, D, E);
	hipDeviceSynchronize();
}

int main(int argc, char** argv)
{	
	DATA_TYPE* C;
	DATA_TYPE* A;
	DATA_TYPE* B;
	DATA_TYPE* D;
	DATA_TYPE* E;
	hipEvent_t start, end;
	float time, average_time = 0;

#ifndef UNMANAGED
	hipMallocManaged( &A, NI*NJ*sizeof(DATA_TYPE) );
	hipMallocManaged( &B, NI*NJ*sizeof(DATA_TYPE) );
	hipMallocManaged( &C, NI*NJ*sizeof(DATA_TYPE) );
	hipMallocManaged( &D, NI*NJ*sizeof(DATA_TYPE) );
	hipMallocManaged( &E, NI*NJ*sizeof(DATA_TYPE) );
	//initialize the arrays
  	init_array(A, B, C, D);

	for (int i = 0; i < NUM_ITERATIONS + 1; ++i) {
		hipEventCreate(&start);
		hipEventCreate(&end);
		hipEventRecord(start);
		mm2Cuda(A, B, C, D, E);
		hipEventRecord(end);
		hipEventSynchronize(end);
		hipEventElapsedTime(&time, start, end);
		if (i > 0) {
			// first iteration warms up the GPU
			average_time += time / NUM_ITERATIONS;
		}
	}
	hipFree(A);
	hipFree(B);
	hipFree(C);
	hipFree(D);
	hipFree(E);
#else
	DATA_TYPE *gA, *gB, *gC, *gD, *gE;
	hipMalloc((void **)&gA, sizeof(DATA_TYPE) * NI * NK);
	hipMalloc((void **)&gB, sizeof(DATA_TYPE) * NK * NJ);
	hipMalloc((void **)&gC, sizeof(DATA_TYPE) * NI * NJ);
	hipMalloc((void **)&gD, sizeof(DATA_TYPE) * NJ * NL);
	hipMalloc((void **)&gE, sizeof(DATA_TYPE) * NI * NL);
	
	C = (DATA_TYPE*)malloc(NI*NJ*sizeof(DATA_TYPE));
	A = (DATA_TYPE*)malloc(NI*NK*sizeof(DATA_TYPE));
	B = (DATA_TYPE*)malloc(NK*NJ*sizeof(DATA_TYPE));
	D = (DATA_TYPE*)malloc(NJ*NL*sizeof(DATA_TYPE));
	E = (DATA_TYPE*)malloc(NI*NL*sizeof(DATA_TYPE));
	DATA_TYPE* E_outputFromGpu = (DATA_TYPE*)malloc(NI*NL*sizeof(DATA_TYPE));


	//initialize the arrays
  	init_array(A, B, C, D);

	hipMemcpy(gA, A, sizeof(DATA_TYPE) * NI * NK, hipMemcpyHostToDevice);
	hipMemcpy(gB, B, sizeof(DATA_TYPE) * NK * NJ, hipMemcpyHostToDevice);
	hipMemcpy(gC, C, sizeof(DATA_TYPE) * NK * NJ, hipMemcpyHostToDevice);
	hipMemcpy(gD, D, sizeof(DATA_TYPE) * NJ * NL, hipMemcpyHostToDevice);
	hipMemcpy(gE, E, sizeof(DATA_TYPE) * NI * NL, hipMemcpyHostToDevice);

	for (int i = 0; i < NUM_ITERATIONS + 1; ++i) {
		hipEventCreate(&start);
		hipEventCreate(&end);
		hipEventRecord(start);
		mm2Cuda(gA, gB, gC, gD, gE);
		hipEventRecord(end);
		hipEventSynchronize(end);
		hipEventElapsedTime(&time, start, end);
		if (i > 0) {
			// first iteration warms up the GPU
			average_time += time / NUM_ITERATIONS;
		}
	}
	hipMemcpy(E_outputFromGpu, gE, sizeof(DATA_TYPE) * NI * NL, hipMemcpyDeviceToHost);

	hipFree(gA);
	hipFree(gB);
	hipFree(gC);
	hipFree(gD);
	hipFree(gE);
	free(C);
	free(A);
	free(B);
	free(D);
	free(E);
	free(E_outputFromGpu);
#endif
	printf("%f\n", average_time);
  	return 0;
}


	.text
	.file	"2mm.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z10init_arrayPdS_S_S_
.LCPI0_0:
	.quad	0x3f40000000000000              # double 4.8828125E-4
	.text
	.globl	_Z10init_arrayPdS_S_S_
	.type	_Z10init_arrayPdS_S_S_,@function
_Z10init_arrayPdS_S_S_:                 # @_Z10init_arrayPdS_S_S_
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
	movsd	.LCPI0_0(%rip), %xmm0           # xmm0 = mem[0],zero
.LBB0_1:                                # %.preheader44
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_2 Depth 2
	xorps	%xmm1, %xmm1
	cvtsi2sd	%eax, %xmm1
	xorl	%r8d, %r8d
.LBB0_2:                                #   Parent Loop BB0_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm2, %xmm2
	cvtsi2sd	%r8d, %xmm2
	mulsd	%xmm1, %xmm2
	mulsd	%xmm0, %xmm2
	movsd	%xmm2, (%rdi,%r8,8)
	incq	%r8
	cmpq	$2048, %r8                      # imm = 0x800
	jne	.LBB0_2
# %bb.3:                                #   in Loop: Header=BB0_1 Depth=1
	incq	%rax
	addq	$16384, %rdi                    # imm = 0x4000
	cmpq	$2048, %rax                     # imm = 0x800
	jne	.LBB0_1
# %bb.4:                                # %.preheader42.preheader
	xorl	%eax, %eax
.LBB0_5:                                # %.preheader42
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_6 Depth 2
	xorps	%xmm1, %xmm1
	cvtsi2sd	%eax, %xmm1
	xorl	%edi, %edi
.LBB0_6:                                #   Parent Loop BB0_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leaq	1(%rdi), %r8
	xorps	%xmm2, %xmm2
	cvtsi2sd	%r8d, %xmm2
	mulsd	%xmm1, %xmm2
	mulsd	%xmm0, %xmm2
	movsd	%xmm2, (%rsi,%rdi,8)
	movq	%r8, %rdi
	cmpq	$2048, %r8                      # imm = 0x800
	jne	.LBB0_6
# %bb.7:                                #   in Loop: Header=BB0_5 Depth=1
	incq	%rax
	addq	$16384, %rsi                    # imm = 0x4000
	cmpq	$2048, %rax                     # imm = 0x800
	jne	.LBB0_5
# %bb.8:                                # %.preheader40.preheader
	xorl	%eax, %eax
.LBB0_9:                                # %.preheader40
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_10 Depth 2
	xorps	%xmm1, %xmm1
	cvtsi2sd	%eax, %xmm1
	xorl	%esi, %esi
.LBB0_10:                               #   Parent Loop BB0_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	3(%rsi), %edi
	xorps	%xmm2, %xmm2
	cvtsi2sd	%edi, %xmm2
	mulsd	%xmm1, %xmm2
	mulsd	%xmm0, %xmm2
	movsd	%xmm2, (%rdx,%rsi,8)
	incq	%rsi
	cmpq	$2048, %rsi                     # imm = 0x800
	jne	.LBB0_10
# %bb.11:                               #   in Loop: Header=BB0_9 Depth=1
	incq	%rax
	addq	$16384, %rdx                    # imm = 0x4000
	cmpq	$2048, %rax                     # imm = 0x800
	jne	.LBB0_9
# %bb.12:                               # %.preheader.preheader
	xorl	%eax, %eax
.LBB0_13:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_14 Depth 2
	xorps	%xmm1, %xmm1
	cvtsi2sd	%eax, %xmm1
	xorl	%edx, %edx
.LBB0_14:                               #   Parent Loop BB0_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	2(%rdx), %esi
	xorps	%xmm2, %xmm2
	cvtsi2sd	%esi, %xmm2
	mulsd	%xmm1, %xmm2
	mulsd	%xmm0, %xmm2
	movsd	%xmm2, (%rcx,%rdx,8)
	incq	%rdx
	cmpq	$2048, %rdx                     # imm = 0x800
	jne	.LBB0_14
# %bb.15:                               #   in Loop: Header=BB0_13 Depth=1
	incq	%rax
	addq	$16384, %rcx                    # imm = 0x4000
	cmpq	$2048, %rax                     # imm = 0x800
	jne	.LBB0_13
# %bb.16:
	retq
.Lfunc_end0:
	.size	_Z10init_arrayPdS_S_S_, .Lfunc_end0-_Z10init_arrayPdS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__mm2_kernel1PdS_S_ # -- Begin function _Z26__device_stub__mm2_kernel1PdS_S_
	.type	_Z26__device_stub__mm2_kernel1PdS_S_,@function
_Z26__device_stub__mm2_kernel1PdS_S_:   # @_Z26__device_stub__mm2_kernel1PdS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11mm2_kernel1PdS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z26__device_stub__mm2_kernel1PdS_S_, .Lfunc_end1-_Z26__device_stub__mm2_kernel1PdS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__mm2_kernel2PdS_S_ # -- Begin function _Z26__device_stub__mm2_kernel2PdS_S_
	.type	_Z26__device_stub__mm2_kernel2PdS_S_,@function
_Z26__device_stub__mm2_kernel2PdS_S_:   # @_Z26__device_stub__mm2_kernel2PdS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11mm2_kernel2PdS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z26__device_stub__mm2_kernel2PdS_S_, .Lfunc_end2-_Z26__device_stub__mm2_kernel2PdS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z7mm2CudaPdS_S_S_S_            # -- Begin function _Z7mm2CudaPdS_S_S_S_
	.type	_Z7mm2CudaPdS_S_S_S_,@function
_Z7mm2CudaPdS_S_S_S_:                   # @_Z7mm2CudaPdS_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, (%rsp)                     # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	%rsi, %rbp
	movq	%rdi, %rbx
	movabsq	$1099511627840, %r13            # imm = 0x10000000040
	movabsq	$34359738400, %r12              # imm = 0x800000020
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	movq	%r15, %rdx
	callq	_Z26__device_stub__mm2_kernel1PdS_S_
.LBB3_2:
	callq	hipDeviceSynchronize
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	(%rsp), %rdx                    # 8-byte Reload
	callq	_Z26__device_stub__mm2_kernel2PdS_S_
.LBB3_4:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipDeviceSynchronize            # TAILCALL
.Lfunc_end3:
	.size	_Z7mm2CudaPdS_S_S_S_, .Lfunc_end3-_Z7mm2CudaPdS_S_S_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI4_0:
	.long	0x41200000                      # float 10
.LCPI4_1:
	.long	0x80000000                      # float -0
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	64(%rsp), %rbx
	movl	$33554432, %esi                 # imm = 0x2000000
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	56(%rsp), %r14
	movl	$33554432, %esi                 # imm = 0x2000000
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	72(%rsp), %r15
	movl	$33554432, %esi                 # imm = 0x2000000
	movq	%r15, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	48(%rsp), %r12
	movl	$33554432, %esi                 # imm = 0x2000000
	movq	%r12, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	40(%rsp), %rdi
	movl	$33554432, %esi                 # imm = 0x2000000
	movl	$1, %edx
	callq	hipMallocManaged
	movq	(%rbx), %rdi
	movq	(%r14), %rsi
	movq	(%r15), %rdx
	movq	(%r12), %rcx
	callq	_Z10init_arrayPdS_S_S_
	xorps	%xmm0, %xmm0
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movl	$11, %ebp
	leaq	32(%rsp), %rbx
	leaq	16(%rsp), %r14
	leaq	28(%rsp), %r15
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	callq	hipEventCreate
	movq	%r14, %rdi
	callq	hipEventCreate
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	64(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	72(%rsp), %rdx
	movq	48(%rsp), %rcx
	movq	40(%rsp), %r8
	callq	_Z7mm2CudaPdS_S_S_S_
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	movss	28(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI4_0(%rip), %xmm0
	movss	.LCPI4_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	cmpl	$11, %ebp
	je	.LBB4_3
# %bb.2:                                #   in Loop: Header=BB4_1 Depth=1
	movaps	%xmm0, %xmm1
.LBB4_3:                                #   in Loop: Header=BB4_1 Depth=1
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	%xmm1, %xmm0
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	decl	%ebp
	jne	.LBB4_1
# %bb.4:
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11mm2_kernel1PdS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11mm2_kernel2PdS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11mm2_kernel1PdS_S_,@object   # @_Z11mm2_kernel1PdS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z11mm2_kernel1PdS_S_
	.p2align	3, 0x0
_Z11mm2_kernel1PdS_S_:
	.quad	_Z26__device_stub__mm2_kernel1PdS_S_
	.size	_Z11mm2_kernel1PdS_S_, 8

	.type	_Z11mm2_kernel2PdS_S_,@object   # @_Z11mm2_kernel2PdS_S_
	.globl	_Z11mm2_kernel2PdS_S_
	.p2align	3, 0x0
_Z11mm2_kernel2PdS_S_:
	.quad	_Z26__device_stub__mm2_kernel2PdS_S_
	.size	_Z11mm2_kernel2PdS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%f\n"
	.size	.L.str, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11mm2_kernel1PdS_S_"
	.size	.L__unnamed_1, 22

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11mm2_kernel2PdS_S_"
	.size	.L__unnamed_2, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__mm2_kernel1PdS_S_
	.addrsig_sym _Z26__device_stub__mm2_kernel2PdS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11mm2_kernel1PdS_S_
	.addrsig_sym _Z11mm2_kernel2PdS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11mm2_kernel1PdS_S_   ; -- Begin function _Z11mm2_kernel1PdS_S_
	.globl	_Z11mm2_kernel1PdS_S_
	.p2align	8
	.type	_Z11mm2_kernel1PdS_S_,@function
_Z11mm2_kernel1PdS_S_:                  ; @_Z11mm2_kernel1PdS_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e32 0x800, v2
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.preheader
	v_lshlrev_b32_e32 v6, 11, v1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v0
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_load_b128 s[0:3], s[0:1], 0x0
	global_load_b64 v[4:5], v[2:3], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_mov_b64 s[0:1], 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, v6, s0
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[10:11], 3, v[0:1]
	v_add_nc_u32_e32 v0, 0x800, v0
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x4000
	v_add_co_u32 v10, vcc_lo, s2, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s3, v11, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[8:9], v[10:11], v[4:5]
	global_store_b64 v[2:3], v[4:5], off
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11mm2_kernel1PdS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11mm2_kernel1PdS_S_, .Lfunc_end0-_Z11mm2_kernel1PdS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 304
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z11mm2_kernel2PdS_S_   ; -- Begin function _Z11mm2_kernel2PdS_S_
	.globl	_Z11mm2_kernel2PdS_S_
	.p2align	8
	.type	_Z11mm2_kernel2PdS_S_,@function
_Z11mm2_kernel2PdS_S_:                  ; @_Z11mm2_kernel2PdS_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e32 0x800, v2
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.preheader
	v_lshlrev_b32_e32 v6, 11, v1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v0
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_load_b128 s[0:3], s[0:1], 0x0
	global_load_b64 v[4:5], v[2:3], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_mov_b64 s[0:1], 0
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, v6, s0
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[10:11], 3, v[0:1]
	v_add_nc_u32_e32 v0, 0x800, v0
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x4000
	v_add_co_u32 v10, vcc_lo, s2, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s3, v11, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[8:9], v[10:11], v[4:5]
	global_store_b64 v[2:3], v[4:5], off
	s_cbranch_scc1 .LBB1_2
.LBB1_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11mm2_kernel2PdS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11mm2_kernel2PdS_S_, .Lfunc_end1-_Z11mm2_kernel2PdS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 304
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11mm2_kernel1PdS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11mm2_kernel1PdS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11mm2_kernel2PdS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11mm2_kernel2PdS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
