#include<stdio.h>
#include<stdlib.h>
#include<time.h>

#define Width  4096   //Image Width and Height.
# define Tile_Width 32

#define N (Width*Width)

__global__ void Matrix_Multiplication(int *D_M, int *D_N, int *D_P)
{
	int tx=blockIdx.x*Tile_Width+threadIdx.x;
	int ty=blockIdx.y*Tile_Width+threadIdx.y;

	int Sum=0;
	//int M,N;

	for(int k=0;k<Width;k++)
	{
		//int M=D_M[ty*Width+k];
		//int N=D_N[k*Width+tx];
		//Sum+=M*N;
		Sum+=D_M[ty*Width+k]*D_N[k*Width+tx];	
	}
	D_P[ty*Width+tx]=Sum;

}

int main(void)
{
	int *H_M, *H_N, *H_P, *H_Y;
	int *D_M, *D_N, *D_P;

	int i,j,k;
	int a,b;
	int Sum;
	int Size=N*sizeof(int);

	clock_t Time_Start, Time_End, Time_Difference; // Clock used to measure time for CPU Matrix Multiplication execution.
	double Time;
	
	printf("This is a Square Matrix Multiplication Program! \n");
	printf("\n");	
	printf("The Matrices are of Dimension %d\n",Width);	
	printf("\n");
		
	H_M=(int *)malloc(Size);
	H_N=(int *)malloc(Size);
	H_P=(int *)malloc(Size);
	H_Y=(int *)malloc(Size);

	cudaMalloc(&D_M,Size);
	cudaMalloc(&D_N,Size);
	cudaMalloc(&D_P,Size);

	

	printf("Initializing the M and N Matrices on Host... \n");
	printf("\n");
	for(i=0;i<Width;i++)
	for(j=0;j<Width;j++)
	{
		H_M[i*Width+j]=1;
		H_N[i*Width+j]=1;
		H_P[i*Width+j]=1;	
	}
	

	
	printf ("CPU Executing Matrix Multiplication Kernel...\n") ;
	printf("\n");
	Time_Start=clock(); // Start Time for CPU Multiplication Kernel

	for(i=0;i<Width;i++)
	for(j=0;j<Width;j++)
	{
		Sum=0;
		for(k=0;k<Width;k++)
		{
			a=H_M[i*Width+k];
			b=H_N[k*Width+j];
			Sum+=a*b;
		}
		H_P[i*Width+j]=Sum;
	}

	Time_End=clock();
	Time_Difference=Time_End-Time_Start;
	Time=Time_Difference/(double)CLOCKS_PER_SEC ;

	
	
	printf("\n");

	cudaEvent_t start, stop;       // Cuda API to measure time for Cuda Kernel Execution.
	cudaEventCreate(&start);
	cudaEventCreate(&stop);

	cudaEventRecord(start);

	cudaMemcpy(D_M,H_M,Size,cudaMemcpyHostToDevice); // Copying Matrix M to GPU Memory.
	cudaMemcpy(D_N,H_N,Size,cudaMemcpyHostToDevice); // Copying Matrix N to GPU Memory.

	dim3 dimBlock(Tile_Width,Tile_Width); // Two Dimesional blocks with two dimensional threads.
	dim3 dimGrid(Width/Tile_Width,Width/Tile_Width);             // 16*16=256, max number of threads per block is 512. 

	
	printf ("GPU Executing Matrix Multiplication Kernel...\n") ;
	printf("\n");
	
	Matrix_Multiplication<<<dimGrid,dimBlock>>>(D_M,D_N,D_P); // Kernel Launch configuration.
	
	cudaMemcpy(H_Y,D_P,Size,cudaMemcpyDeviceToHost); // Copying results back to Host Memory.

	cudaEventRecord(stop);

	cudaEventSynchronize(stop);
	float milliseconds = 0;
	cudaEventElapsedTime(&milliseconds, start, stop);  
		
	/*for(i=0;i<Width;i++)
	{	
		for(j=0;j<Width;j++)
		{
		printf("%d ",H_Y[i*Width+j]);	
		}	
	printf("\n");	
	}*/
	printf("\n");
	printf ("CPU time for Matrix Multiplication = %f ms\n", Time*1000) ;
	printf("GPU Execution Time for Convolution Kernel: %fn\n", milliseconds); //GPU Execution Time.
	printf("Effective Bandwidth (GB/s): %fn\n", N*4*2/milliseconds/1e6); 
	

	printf("\n");


	cudaFree(H_M);
	cudaFree(H_N);
	cudaFree(H_P);
	
	free(H_M);
	free(H_N);
	free(H_P);
	free(H_Y);
}



























	.file	"tmpxft_003398c8_00000000-6_Cuda_Matrix_Multiplication.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z45__device_stub__Z21Matrix_MultiplicationPiS_S_PiS_S_
	.type	_Z45__device_stub__Z21Matrix_MultiplicationPiS_S_PiS_S_, @function
_Z45__device_stub__Z21Matrix_MultiplicationPiS_S_PiS_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z21Matrix_MultiplicationPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z45__device_stub__Z21Matrix_MultiplicationPiS_S_PiS_S_, .-_Z45__device_stub__Z21Matrix_MultiplicationPiS_S_PiS_S_
	.globl	_Z21Matrix_MultiplicationPiS_S_
	.type	_Z21Matrix_MultiplicationPiS_S_, @function
_Z21Matrix_MultiplicationPiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z21Matrix_MultiplicationPiS_S_PiS_S_
	.cfi_endproc
.LFE2053:
	.size	_Z21Matrix_MultiplicationPiS_S_, .-_Z21Matrix_MultiplicationPiS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"This is a Square Matrix Multiplication Program! \n"
.LC1:
	.string	"\n"
.LC2:
	.string	"The Matrices are of Dimension %d\n"
.LC3:
	.string	"Initializing the M and N Matrices on Host... \n"
.LC4:
	.string	"CPU Executing Matrix Multiplication Kernel...\n"
.LC6:
	.string	"GPU Executing Matrix Multiplication Kernel...\n"
.LC9:
	.string	"CPU time for Matrix Multiplication = %f ms\n"
.LC10:
	.string	"GPU Execution Time for Convolution Kernel: %fn\n"
.LC12:
	.string	"Effective Bandwidth (GB/s): %fn\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	.LC1(%rip), %rbx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$4096, %edx
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$67108864, %edi
	call	malloc@PLT
	movl	$67108864, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$67108864, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$67108864, %edi
	movq	%rax, %r13
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$67108864, %esi
	movq	%rax, %r14
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$67108864, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$67108864, %esi
	call	cudaMalloc@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edx, %edx
.L9:
	movq	%rdx, %rax
	xorl	%ecx, %ecx
.L10:
	incl	%ecx
	movl	$1, (%r12,%rax)
	movl	$1, 0(%rbp,%rax)
	movl	$1, 0(%r13,%rax)
	addq	$4, %rax
	cmpl	$4096, %ecx
	jne	.L10
	addq	$16384, %rdx
	cmpq	$67108864, %rdx
	jne	.L9
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	clock@PLT
	movq	%rax, %r15
	xorl	%eax, %eax
.L12:
	xorl	%edx, %edx
	leaq	(%r12,%rax), %r10
	leaq	0(%r13,%rax), %r9
.L16:
	leaq	0(%rbp,%rdx,4), %rdi
	xorl	%ecx, %ecx
	xorl	%esi, %esi
.L13:
	movl	(%r10,%rcx,4), %r8d
	imull	(%rdi), %r8d
	incq	%rcx
	addq	$16384, %rdi
	addl	%r8d, %esi
	cmpq	$4096, %rcx
	jne	.L13
	movl	%esi, (%r9,%rdx,4)
	incq	%rdx
	cmpq	$4096, %rdx
	jne	.L16
	addq	$16384, %rax
	cmpq	$67108864, %rax
	jne	.L12
	call	clock@PLT
	movq	%rbx, %rsi
	movl	$2, %edi
	subq	%r15, %rax
	cvtsi2sdq	%rax, %xmm0
	xorl	%eax, %eax
	divsd	.LC5(%rip), %xmm0
	movq	%xmm0, %r15
	call	__printf_chk@PLT
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	leaq	.LC6(%rip), %rsi
	movabsq	$137438953504, %rax
	movl	$2, %edi
	movq	%rax, 48(%rsp)
	movabsq	$549755814016, %rax
	movq	%rax, 60(%rsp)
	xorl	%eax, %eax
	movl	$1, 56(%rsp)
	movl	$1, 68(%rsp)
	call	__printf_chk@PLT
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	48(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z45__device_stub__Z21Matrix_MultiplicationPiS_S_PiS_S_
.L17:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$67108864, %edx
	movq	%r14, %rdi
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	4(%rsp), %rdi
	movl	$0x00000000, 4(%rsp)
	call	cudaEventElapsedTime@PLT
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r15, %xmm0
	leaq	.LC9(%rip), %rsi
	movb	$1, %al
	mulsd	.LC8(%rip), %xmm0
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC12(%rip), %rsi
	movss	.LC11(%rip), %xmm0
	divss	4(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	divsd	.LC5(%rip), %xmm0
	call	__printf_chk@PLT
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r12, %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC13:
	.string	"_Z21Matrix_MultiplicationPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z21Matrix_MultiplicationPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1093567616
	.align 8
.LC8:
	.long	0
	.long	1083129856
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC11:
	.long	1291845632
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdio.h>
#include<stdlib.h>
#include<time.h>

#define Width  4096   //Image Width and Height.
# define Tile_Width 32

#define N (Width*Width)

__global__ void Matrix_Multiplication(int *D_M, int *D_N, int *D_P)
{
	int tx=blockIdx.x*Tile_Width+threadIdx.x;
	int ty=blockIdx.y*Tile_Width+threadIdx.y;

	int Sum=0;
	//int M,N;

	for(int k=0;k<Width;k++)
	{
		//int M=D_M[ty*Width+k];
		//int N=D_N[k*Width+tx];
		//Sum+=M*N;
		Sum+=D_M[ty*Width+k]*D_N[k*Width+tx];	
	}
	D_P[ty*Width+tx]=Sum;

}

int main(void)
{
	int *H_M, *H_N, *H_P, *H_Y;
	int *D_M, *D_N, *D_P;

	int i,j,k;
	int a,b;
	int Sum;
	int Size=N*sizeof(int);

	clock_t Time_Start, Time_End, Time_Difference; // Clock used to measure time for CPU Matrix Multiplication execution.
	double Time;
	
	printf("This is a Square Matrix Multiplication Program! \n");
	printf("\n");	
	printf("The Matrices are of Dimension %d\n",Width);	
	printf("\n");
		
	H_M=(int *)malloc(Size);
	H_N=(int *)malloc(Size);
	H_P=(int *)malloc(Size);
	H_Y=(int *)malloc(Size);

	hipMalloc(&D_M,Size);
	hipMalloc(&D_N,Size);
	hipMalloc(&D_P,Size);

	

	printf("Initializing the M and N Matrices on Host... \n");
	printf("\n");
	for(i=0;i<Width;i++)
	for(j=0;j<Width;j++)
	{
		H_M[i*Width+j]=1;
		H_N[i*Width+j]=1;
		H_P[i*Width+j]=1;	
	}
	

	
	printf ("CPU Executing Matrix Multiplication Kernel...\n") ;
	printf("\n");
	Time_Start=clock(); // Start Time for CPU Multiplication Kernel

	for(i=0;i<Width;i++)
	for(j=0;j<Width;j++)
	{
		Sum=0;
		for(k=0;k<Width;k++)
		{
			a=H_M[i*Width+k];
			b=H_N[k*Width+j];
			Sum+=a*b;
		}
		H_P[i*Width+j]=Sum;
	}

	Time_End=clock();
	Time_Difference=Time_End-Time_Start;
	Time=Time_Difference/(double)CLOCKS_PER_SEC ;

	
	
	printf("\n");

	hipEvent_t start, stop;       // Cuda API to measure time for Cuda Kernel Execution.
	hipEventCreate(&start);
	hipEventCreate(&stop);

	hipEventRecord(start);

	hipMemcpy(D_M,H_M,Size,hipMemcpyHostToDevice); // Copying Matrix M to GPU Memory.
	hipMemcpy(D_N,H_N,Size,hipMemcpyHostToDevice); // Copying Matrix N to GPU Memory.

	dim3 dimBlock(Tile_Width,Tile_Width); // Two Dimesional blocks with two dimensional threads.
	dim3 dimGrid(Width/Tile_Width,Width/Tile_Width);             // 16*16=256, max number of threads per block is 512. 

	
	printf ("GPU Executing Matrix Multiplication Kernel...\n") ;
	printf("\n");
	
	Matrix_Multiplication<<<dimGrid,dimBlock>>>(D_M,D_N,D_P); // Kernel Launch configuration.
	
	hipMemcpy(H_Y,D_P,Size,hipMemcpyDeviceToHost); // Copying results back to Host Memory.

	hipEventRecord(stop);

	hipEventSynchronize(stop);
	float milliseconds = 0;
	hipEventElapsedTime(&milliseconds, start, stop);  
		
	/*for(i=0;i<Width;i++)
	{	
		for(j=0;j<Width;j++)
		{
		printf("%d ",H_Y[i*Width+j]);	
		}	
	printf("\n");	
	}*/
	printf("\n");
	printf ("CPU time for Matrix Multiplication = %f ms\n", Time*1000) ;
	printf("GPU Execution Time for Convolution Kernel: %fn\n", milliseconds); //GPU Execution Time.
	printf("Effective Bandwidth (GB/s): %fn\n", N*4*2/milliseconds/1e6); 
	

	printf("\n");


	hipFree(H_M);
	hipFree(H_N);
	hipFree(H_P);
	
	free(H_M);
	free(H_N);
	free(H_P);
	free(H_Y);
}



























	.text
	.file	"Cuda_Matrix_Multiplication.hip"
	.globl	_Z36__device_stub__Matrix_MultiplicationPiS_S_ # -- Begin function _Z36__device_stub__Matrix_MultiplicationPiS_S_
	.type	_Z36__device_stub__Matrix_MultiplicationPiS_S_,@function
_Z36__device_stub__Matrix_MultiplicationPiS_S_: # @_Z36__device_stub__Matrix_MultiplicationPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21Matrix_MultiplicationPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z36__device_stub__Matrix_MultiplicationPiS_S_, .Lfunc_end0-_Z36__device_stub__Matrix_MultiplicationPiS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI1_1:
	.quad	0x408f400000000000              # double 1000
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI1_2:
	.long	0x4d000000                      # float 134217728
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%r12d, %r12d
	movl	$.L.str.2, %edi
	movl	$4096, %esi                     # imm = 0x1000
	xorl	%eax, %eax
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %rbx
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %r14
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %r15
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	leaq	32(%rsp), %rdi
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	hipMalloc
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$10, %edi
	callq	putchar@PLT
	movl	$1, %eax
	movl	$16384, %ecx                    # imm = 0x4000
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movq	%r15, %rdi
.LBB1_1:                                # %.preheader79
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorl	%r8d, %r8d
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%eax, (%rdx,%r8,4)
	movl	%eax, (%rsi,%r8,4)
	movl	%eax, (%rdi,%r8,4)
	incq	%r8
	cmpq	$4096, %r8                      # imm = 0x1000
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%r12
	addq	%rcx, %rdi
	addq	%rcx, %rsi
	addq	%rcx, %rdx
	cmpq	$4096, %r12                     # imm = 0x1000
	jne	.LBB1_1
# %bb.4:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%r12d, %r12d
	callq	clock
	movq	%rax, %r13
	movq	%rbx, %rax
.LBB1_5:                                # %.preheader78
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_6 Depth 2
                                        #       Child Loop BB1_7 Depth 3
	movq	%r12, %rcx
	shlq	$14, %rcx
	addq	%r15, %rcx
	movq	%r14, %rdx
	xorl	%esi, %esi
.LBB1_6:                                # %.preheader
                                        #   Parent Loop BB1_5 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_7 Depth 3
	xorl	%edi, %edi
	movq	%rdx, %r8
	xorl	%r9d, %r9d
.LBB1_7:                                #   Parent Loop BB1_5 Depth=1
                                        #     Parent Loop BB1_6 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r8), %r10d
	imull	(%rax,%rdi,4), %r10d
	addl	%r10d, %r9d
	incq	%rdi
	addq	$16384, %r8                     # imm = 0x4000
	cmpq	$4096, %rdi                     # imm = 0x1000
	jne	.LBB1_7
# %bb.8:                                #   in Loop: Header=BB1_6 Depth=2
	movl	%r9d, (%rcx,%rsi,4)
	incq	%rsi
	addq	$4, %rdx
	cmpq	$4096, %rsi                     # imm = 0x1000
	jne	.LBB1_6
# %bb.9:                                #   in Loop: Header=BB1_5 Depth=1
	incq	%r12
	addq	$16384, %rax                    # imm = 0x4000
	cmpq	$4096, %r12                     # imm = 0x1000
	jne	.LBB1_5
# %bb.10:
	callq	clock
	movq	%rax, %rbp
	movl	$10, %edi
	callq	putchar@PLT
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	$10, %edi
	callq	putchar@PLT
	movabsq	$549755814016, %rdi             # imm = 0x8000000080
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z36__device_stub__Matrix_MultiplicationPiS_S_
.LBB1_12:
	subq	%r13, %rbp
	cvtsi2sd	%rbp, %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	movq	16(%rsp), %rsi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	48(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	68(%rsp), %r13
	movl	$0, (%r13)
	movq	56(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%r13, %rdi
	callq	hipEventElapsedTime
	movl	$10, %edi
	callq	putchar@PLT
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI1_1(%rip), %xmm0
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13), %xmm0
	movl	$.L.str.7, %edi
	movb	$1, %al
	callq	printf
	movss	.LCPI1_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	(%r13), %xmm0
	cvtss2sd	%xmm0, %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	movq	%rbx, %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	hipFree
	movq	%r15, %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21Matrix_MultiplicationPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z21Matrix_MultiplicationPiS_S_,@object # @_Z21Matrix_MultiplicationPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z21Matrix_MultiplicationPiS_S_
	.p2align	3, 0x0
_Z21Matrix_MultiplicationPiS_S_:
	.quad	_Z36__device_stub__Matrix_MultiplicationPiS_S_
	.size	_Z21Matrix_MultiplicationPiS_S_, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"The Matrices are of Dimension %d\n"
	.size	.L.str.2, 34

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"CPU time for Matrix Multiplication = %f ms\n"
	.size	.L.str.6, 44

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"GPU Execution Time for Convolution Kernel: %fn\n"
	.size	.L.str.7, 48

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Effective Bandwidth (GB/s): %fn\n"
	.size	.L.str.8, 33

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z21Matrix_MultiplicationPiS_S_"
	.size	.L__unnamed_1, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"This is a Square Matrix Multiplication Program! "
	.size	.Lstr, 49

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Initializing the M and N Matrices on Host... "
	.size	.Lstr.1, 46

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"CPU Executing Matrix Multiplication Kernel..."
	.size	.Lstr.2, 46

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"GPU Executing Matrix Multiplication Kernel..."
	.size	.Lstr.3, 46

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z36__device_stub__Matrix_MultiplicationPiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z21Matrix_MultiplicationPiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z21Matrix_MultiplicationPiS_S_ ; -- Begin function _Z21Matrix_MultiplicationPiS_S_
	.globl	_Z21Matrix_MultiplicationPiS_S_
	.p2align	8
	.type	_Z21Matrix_MultiplicationPiS_S_,@function
_Z21Matrix_MultiplicationPiS_S_:        ; @_Z21Matrix_MultiplicationPiS_S_
; %bb.0:
	v_lshlrev_b32_e32 v1, 2, v0
	v_and_b32_e32 v4, 0x3ff, v0
	v_mov_b32_e32 v0, 0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b64 s[2:3], 0
	v_lshl_add_u32 v5, s14, 5, v4
	v_and_b32_e32 v1, 0x3ff000, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, s15, 17, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s4, v2
	v_mov_b32_e32 v2, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_co_u32 v8, vcc_lo, v6, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v7, vcc_lo
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_add_nc_u32_e32 v2, 0x1000, v2
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmpk_eq_i32 s2, 0x4000
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v8, v[8:9], off
	global_load_b32 v9, v[3:4], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v9, v8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v0, v3
	s_cbranch_scc0 .LBB0_1
; %bb.2:
	v_add_nc_u32_e32 v0, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21Matrix_MultiplicationPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z21Matrix_MultiplicationPiS_S_, .Lfunc_end0-_Z21Matrix_MultiplicationPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 272
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21Matrix_MultiplicationPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21Matrix_MultiplicationPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
