#define t_max 1
#define t 1 
/*
(T[0][0][0][1][0]=((((T[0][0][0][0][0]*((c[0][0][0][0][1]*T[0][0][0][0][0])+c[0][0][0][0][2]))+c[0][0][0][0][3])+((c[0][0][0][0][4]*T[-1][0][0][0][0])+(c[0][0][0][0][5]*T[1][0][0][0][0])))+(((c[0][0][0][0][6]*T[0][-1][0][0][0])+(c[0][0][0][0][7]*T[0][1][0][0][0]))+((c[0][0][0][0][8]*T[0][0][-1][0][0])+(c[0][0][0][0][9]*T[0][0][1][0][0])))))

*/
__global__ void hyperthermia(float *  *  T_0_1_out, float *  T_0_0, float *  T_0_1, float *  c_1_0, float *  c_2_0, float *  c_3_0, float *  c_4_0, float *  c_5_0, float *  c_6_0, float *  c_7_0, float *  c_8_0, float *  c_9_0, int x_max, int y_max, int z_max, int cbx)
{
/*
	const float *  const u__c_1[16] =  { c_1_0 } ;
	const float *  const u__c_2[16] =  { c_2_0 } ;
	const float *  const u__c_3[16] =  { c_3_0 } ;
	const float *  const u__c_4[16] =  { c_4_0 } ;
	const float *  const u__c_5[16] =  { c_5_0 } ;
	const float *  const u__c_6[16] =  { c_6_0 } ;
	const float *  const u__c_7[16] =  { c_7_0 } ;
	const float *  const u__c_8[16] =  { c_8_0 } ;
	const float *  const u__c_9[16] =  { c_9_0 } ;
	float *  const u__T_0[16] =  { T_0_0, T_0_1 } ;
*/
	int _idx0;
	int _idx1;
	int _idx2;
	int _idx3;
	int _idx4;
	int _idx5;
	int _idx6;
	int _idx7;
	int idx_1_2;
	int pt_idx_x;
	int pt_idx_y;
	int pt_idx_z;
	int size_1_1;
	int size_1_2;
	//int t;
	int tmp;
	int v_idx_x;
	int v_idx_x_max;
	int v_idx_y;
	int v_idx_y_max;
	int v_idx_z;
	int v_idx_z_max;
	/*
	Initializations
	*/
	size_1_1=(y_max/blockDim.y);
	size_1_2=(z_max/blockDim.z);
	idx_1_2=(blockIdx.y/size_1_2);
	tmp=(blockIdx.y-(idx_1_2*size_1_2));
	v_idx_x=(cbx*(threadIdx.x+(blockDim.x*blockIdx.x)));
	v_idx_x_max=(v_idx_x+cbx);
	v_idx_y=(threadIdx.y+(tmp*blockDim.y));
	v_idx_y_max=(v_idx_y+1);
	v_idx_z=(threadIdx.z+(idx_1_2*blockDim.z));
	v_idx_z_max=(v_idx_z+1);
	/*
	Implementation
	*/
	/*
	for t = 1..t_max by 1 parallel 1 <level 0> schedule  { ... }
	*/
	//for (t=1; t<=t_max; t+=1)
	{
		/* Index bounds calculations for iterators in v[t=t, s=(cbx, 1, 1)][0] */
		/*
		for POINT pt[t=t, s=(1, 1, 1)][0] of size [1, 1, 1] in v[t=t, s=(:, :, :)][0] parallel 1 <level 1> schedule default { ... }
		*/
		{
			/* Index bounds calculations for iterators in pt[t=t, s=(1, 1, 1)][0] */
			pt_idx_z=v_idx_z;
			pt_idx_y=v_idx_y;
			for (pt_idx_x=v_idx_x; pt_idx_x<(v_idx_x_max-0); pt_idx_x+=1)
			{
				/* Index bounds calculations for iterators in pt[t=t, s=(1, 1, 1)][0] */
				/*
				v[t=(t+1), s=pt[t=?, s=?][0]][0]=stencil(v[t=t, s=pt[t=?, s=?][0]][0])
				*/
				/* _idx0 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+1) */
				_idx0=(((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+1);
				/* _idx1 = ((((pt_idx_z*x_max)*y_max)+(pt_idx_y*x_max))+pt_idx_x) */
				_idx1=(((((_idx0+(((((-2*pt_idx_z)-2)*t)-x_max)*y_max))+(((((-2*pt_idx_z)-2)*t)-1)*x_max))+(((-4*pt_idx_z)-4)*(t*t)))+(((-2*pt_idx_y)-2)*t))-1);
				/* _idx2 = ((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x) */
				_idx2=(_idx0-1);
				/* _idx3 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+2) */
				_idx3=(_idx2+2);
				/* _idx4 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+(((((2*pt_idx_z)+2)*t)+pt_idx_y)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+((2*pt_idx_y)*t))+pt_idx_x)+1) */
				_idx4=((_idx0-x_max)-(2*t));
				/* _idx5 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+2)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+4)*t))+pt_idx_x)+1) */
				_idx5=((_idx0+x_max)+(2*t));
				/* _idx6 = ((((((((pt_idx_z*x_max)+((2*pt_idx_z)*t))*y_max)+(((((2*pt_idx_z)*t)+pt_idx_y)+1)*x_max))+((4*pt_idx_z)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+1) */
				_idx6=((((_idx2+((( - x_max)-(2*t))*y_max))-((2*t)*x_max))-(4*(t*t)))+1);
				/* _idx7 = (((((((((pt_idx_z+2)*x_max)+(((2*pt_idx_z)+4)*t))*y_max)+((((((2*pt_idx_z)+4)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+8)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+1) */
				_idx7=(((_idx0+((x_max+(2*t))*y_max))+((2*t)*x_max))+(4*(t*t)));
//				u__T_0[t][_idx0]=((((u__T_0[(t-1)][_idx0]*((u__c_1[(t-1)][_idx1]*u__T_0[(t-1)][_idx0])+u__c_2[(t-1)][_idx1]))+u__c_3[(t-1)][_idx1])+((u__c_4[(t-1)][_idx1]*u__T_0[(t-1)][_idx2])+(u__c_5[(t-1)][_idx1]*u__T_0[(t-1)][_idx3])))+(((u__c_6[(t-1)][_idx1]*u__T_0[(t-1)][_idx4])+(u__c_7[(t-1)][_idx1]*u__T_0[(t-1)][_idx5]))+((u__c_8[(t-1)][_idx1]*u__T_0[(t-1)][_idx6])+(u__c_9[(t-1)][_idx1]*u__T_0[(t-1)][_idx7]))));
				T_0_1[_idx0]=((((T_0_0[_idx0]*((c_1_0[_idx1]*T_0_0[_idx0])+c_2_0[_idx1]))+c_3_0[_idx1])+((c_4_0[_idx1]*T_0_0[_idx2])+(c_5_0[_idx1]*T_0_0[_idx3])))+(((c_6_0[_idx1]*T_0_0[_idx4])+(c_7_0[_idx1]*T_0_0[_idx5]))+((c_8_0[_idx1]*T_0_0[_idx6])+(c_9_0[_idx1]*T_0_0[_idx7]))));
			}
		}
	}
}

__global__ void initialize(float *  T_0_0, float *  T_0_1, float *  c_1_0, float *  c_2_0, float *  c_3_0, float *  c_4_0, float *  c_5_0, float *  c_6_0, float *  c_7_0, float *  c_8_0, float *  c_9_0, int x_max, int y_max, int z_max, int cbx)
{
	 float *  const u__c_1[16] =  { c_1_0 } ;
	 float *  const u__c_2[16] =  { c_2_0 } ;
	 float *  const u__c_3[16] =  { c_3_0 } ;
	 float *  const u__c_4[16] =  { c_4_0 } ;
	 float *  const u__c_5[16] =  { c_5_0 } ;
	 float *  const u__c_6[16] =  { c_6_0 } ;
	 float *  const u__c_7[16] =  { c_7_0 } ;
	 float *  const u__c_8[16] =  { c_8_0 } ;
	 float *  const u__c_9[16] =  { c_9_0 } ;
	float *  const u__T_0[16] =  { T_0_0, T_0_1 } ;
	int _idx0;
	int _idx1;
	int _idx2;
	int _idx3;
	int _idx4;
	int _idx5;
	int _idx6;
	int _idx7;
	int idx_1_2;
	int pt_idx_x;
	int pt_idx_y;
	int pt_idx_z;
	int size_1_1;
	int size_1_2;
	//int t;
	int tmp;
	int v_idx_x;
	int v_idx_x_max;
	int v_idx_y;
	int v_idx_y_max;
	int v_idx_z;
	int v_idx_z_max;
	/*
	Initializations
	*/
	size_1_1=(y_max/blockDim.y);
	size_1_2=(z_max/blockDim.z);
	idx_1_2=(blockIdx.y/size_1_2);
	tmp=(blockIdx.y-(idx_1_2*size_1_2));
	v_idx_x=(cbx*(threadIdx.x+(blockDim.x*blockIdx.x)));
	v_idx_x_max=(v_idx_x+cbx);
	v_idx_y=(threadIdx.y+(tmp*blockDim.y));
	v_idx_y_max=(v_idx_y+1);
	v_idx_z=(threadIdx.z+(idx_1_2*blockDim.z));
	v_idx_z_max=(v_idx_z+1);
	/*
	Implementation
	*/
	/*
	for t = 1..t_max by 1 parallel 1 <level 0> schedule  { ... }
	*/
	//for (t=1; t<=t_max; t+=1)
	{
		/* Index bounds calculations for iterators in v[t=t, s=(cbx, 1, 1)][0] */
		/*
		for POINT pt[t=t, s=(1, 1, 1)][0] of size [1, 1, 1] in v[t=t, s=(:, :, :)][0] parallel 1 <level 1> schedule default { ... }
		*/
		{
			/* Index bounds calculations for iterators in pt[t=t, s=(1, 1, 1)][0] */
			pt_idx_z=v_idx_z;
			pt_idx_y=v_idx_y;
			for (pt_idx_x=v_idx_x; pt_idx_x<(v_idx_x_max-0); pt_idx_x+=1)
			{
				/* Index bounds calculations for iterators in pt[t=t, s=(1, 1, 1)][0] */
				/*
				v[t=(t+1), s=pt[t=?, s=?][0]][0]=stencil(v[t=t, s=pt[t=?, s=?][0]][0])
				*/
				/* _idx0 = ((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x) */
				_idx0=((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x);
				u__T_0[(t-1)][_idx0]=0.1;
				/* _idx1 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+(((((2*pt_idx_z)+2)*t)+pt_idx_y)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+((2*pt_idx_y)*t))+pt_idx_x)+1) */
				_idx1=(((_idx0-x_max)-(2*t))+1);
				u__T_0[(t-1)][_idx1]=0.1;
				/* _idx2 = ((((((((pt_idx_z*x_max)+((2*pt_idx_z)*t))*y_max)+(((((2*pt_idx_z)*t)+pt_idx_y)+1)*x_max))+((4*pt_idx_z)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+1) */
				_idx2=((((_idx0+((( - x_max)-(2*t))*y_max))-((2*t)*x_max))-(4*(t*t)))+1);
				u__T_0[(t-1)][_idx2]=0.1;
				/* _idx3 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+1) */
				_idx3=(_idx0+1);
				u__T_0[(t-1)][_idx3]=0.1;
				/* _idx4 = ((((pt_idx_z*x_max)*y_max)+(pt_idx_y*x_max))+pt_idx_x) */
				_idx4=(((((_idx2-(((2*pt_idx_z)*t)*y_max))+((((-2*pt_idx_z)*t)-1)*x_max))-((4*pt_idx_z)*(t*t)))+(((-2*pt_idx_y)-2)*t))-1);
				u__c_1[(t-1)][_idx4]=0.2;
				u__c_2[(t-1)][_idx4]=0.30000000000000004;
				u__c_3[(t-1)][_idx4]=0.4;
				u__c_4[(t-1)][_idx4]=0.5;
				u__c_5[(t-1)][_idx4]=0.6000000000000001;
				u__c_6[(t-1)][_idx4]=0.7000000000000001;
				u__c_7[(t-1)][_idx4]=0.8;
				u__c_8[(t-1)][_idx4]=0.9;
				u__c_9[(t-1)][_idx4]=1.0;
				/* _idx5 = (((((((((pt_idx_z+2)*x_max)+(((2*pt_idx_z)+4)*t))*y_max)+((((((2*pt_idx_z)+4)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+8)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+1) */
				_idx5=(((_idx3+((x_max+(2*t))*y_max))+((2*t)*x_max))+(4*(t*t)));
				u__T_0[(t-1)][_idx5]=0.1;
				/* _idx6 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+2)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+4)*t))+pt_idx_x)+1) */
				_idx6=((_idx3+x_max)+(2*t));
				u__T_0[(t-1)][_idx6]=0.1;
				/* _idx7 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+2) */
				_idx7=(_idx0+2);
				u__T_0[(t-1)][_idx7]=0.1;
				u__T_0[t][_idx3]=1.1;
			}
		}
	}
}


	.file	"tmpxft_002b0120_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z59__device_stub__Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiiiPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.type	_Z59__device_stub__Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiiiPPfS_S_S_S_S_S_S_S_S_S_S_iiii, @function
_Z59__device_stub__Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiiiPPfS_S_S_S_S_S_S_S_S_S_S_iiii:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$312, %rsp
	.cfi_def_cfa_offset 320
	movq	320(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	120(%rsp), %rdi
	movq	%rsi, 80(%rsp)
	leaq	132(%rsp), %rsi
	movq	%rax, 40(%rsp)
	movq	328(%rsp), %rax
	movq	%rdx, 72(%rsp)
	leaq	104(%rsp), %rdx
	movq	%rax, 32(%rsp)
	movq	336(%rsp), %rax
	movq	%rcx, 64(%rsp)
	leaq	112(%rsp), %rcx
	movq	%rax, 24(%rsp)
	movq	344(%rsp), %rax
	movq	%r8, 56(%rsp)
	movq	%rax, 16(%rsp)
	movq	352(%rsp), %rax
	movq	%r9, 48(%rsp)
	movq	%rax, 8(%rsp)
	movq	360(%rsp), %rax
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	leaq	88(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 248(%rsp)
	movq	%rsp, %rax
	movq	%rax, 256(%rsp)
	leaq	368(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	376(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	384(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	392(%rsp), %rax
	movq	%rax, 288(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 120(%rsp)
	movl	$1, 128(%rsp)
	movq	%rax, 132(%rsp)
	movl	$1, 140(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	112(%rsp)
	.cfi_def_cfa_offset 328
	leaq	_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii(%rip), %rdi
	pushq	112(%rsp)
	.cfi_def_cfa_offset 336
	movq	148(%rsp), %rcx
	movl	156(%rsp), %r8d
	movq	136(%rsp), %rsi
	movl	144(%rsp), %edx
	leaq	184(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 328
	popq	%rdx
	.cfi_def_cfa_offset 320
.L2:
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$312, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z59__device_stub__Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiiiPPfS_S_S_S_S_S_S_S_S_S_S_iiii, .-_Z59__device_stub__Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiiiPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.globl	_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.type	_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii, @function
_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z59__device_stub__Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiiiPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.cfi_endproc
.LFE2033:
	.size	_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii, .-_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.globl	_Z54__device_stub__Z10initializePfS_S_S_S_S_S_S_S_S_S_iiiiPfS_S_S_S_S_S_S_S_S_S_iiii
	.type	_Z54__device_stub__Z10initializePfS_S_S_S_S_S_S_S_S_S_iiiiPfS_S_S_S_S_S_S_S_S_S_iiii, @function
_Z54__device_stub__Z10initializePfS_S_S_S_S_S_S_S_S_S_iiiiPfS_S_S_S_S_S_S_S_S_S_iiii:
.LFB2034:
	.cfi_startproc
	endbr64
	subq	$296, %rsp
	.cfi_def_cfa_offset 304
	movq	304(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	112(%rsp), %rdi
	movq	%rsi, 80(%rsp)
	leaq	124(%rsp), %rsi
	movq	%rax, 40(%rsp)
	movq	312(%rsp), %rax
	movq	%rdx, 72(%rsp)
	leaq	96(%rsp), %rdx
	movq	%rax, 32(%rsp)
	movq	320(%rsp), %rax
	movq	%rcx, 64(%rsp)
	leaq	104(%rsp), %rcx
	movq	%rax, 24(%rsp)
	movq	328(%rsp), %rax
	movq	%r8, 56(%rsp)
	movq	%rax, 16(%rsp)
	movq	336(%rsp), %rax
	movq	%r9, 48(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 280(%rsp)
	xorl	%eax, %eax
	leaq	88(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	344(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	352(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	360(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	368(%rsp), %rax
	movq	%rax, 272(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 112(%rsp)
	movl	$1, 120(%rsp)
	movq	%rax, 124(%rsp)
	movl	$1, 132(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	104(%rsp)
	.cfi_def_cfa_offset 312
	leaq	_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii(%rip), %rdi
	pushq	104(%rsp)
	.cfi_def_cfa_offset 320
	movq	140(%rsp), %rcx
	movl	148(%rsp), %r8d
	movq	128(%rsp), %rsi
	movl	136(%rsp), %edx
	leaq	176(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 312
	popq	%rdx
	.cfi_def_cfa_offset 304
.L8:
	movq	280(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$296, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z54__device_stub__Z10initializePfS_S_S_S_S_S_S_S_S_S_iiiiPfS_S_S_S_S_S_S_S_S_S_iiii, .-_Z54__device_stub__Z10initializePfS_S_S_S_S_S_S_S_S_S_iiiiPfS_S_S_S_S_S_S_S_S_S_iiii
	.globl	_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii
	.type	_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii, @function
_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii:
.LFB2035:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z10initializePfS_S_S_S_S_S_S_S_S_S_iiiiPfS_S_S_S_S_S_S_S_S_S_iiii
	.cfi_endproc
.LFE2035:
	.size	_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii, .-_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii"
.LC1:
	.string	"_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2037:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#define t_max 1
#define t 1 
/*
(T[0][0][0][1][0]=((((T[0][0][0][0][0]*((c[0][0][0][0][1]*T[0][0][0][0][0])+c[0][0][0][0][2]))+c[0][0][0][0][3])+((c[0][0][0][0][4]*T[-1][0][0][0][0])+(c[0][0][0][0][5]*T[1][0][0][0][0])))+(((c[0][0][0][0][6]*T[0][-1][0][0][0])+(c[0][0][0][0][7]*T[0][1][0][0][0]))+((c[0][0][0][0][8]*T[0][0][-1][0][0])+(c[0][0][0][0][9]*T[0][0][1][0][0])))))

*/
__global__ void hyperthermia(float *  *  T_0_1_out, float *  T_0_0, float *  T_0_1, float *  c_1_0, float *  c_2_0, float *  c_3_0, float *  c_4_0, float *  c_5_0, float *  c_6_0, float *  c_7_0, float *  c_8_0, float *  c_9_0, int x_max, int y_max, int z_max, int cbx)
{
/*
	const float *  const u__c_1[16] =  { c_1_0 } ;
	const float *  const u__c_2[16] =  { c_2_0 } ;
	const float *  const u__c_3[16] =  { c_3_0 } ;
	const float *  const u__c_4[16] =  { c_4_0 } ;
	const float *  const u__c_5[16] =  { c_5_0 } ;
	const float *  const u__c_6[16] =  { c_6_0 } ;
	const float *  const u__c_7[16] =  { c_7_0 } ;
	const float *  const u__c_8[16] =  { c_8_0 } ;
	const float *  const u__c_9[16] =  { c_9_0 } ;
	float *  const u__T_0[16] =  { T_0_0, T_0_1 } ;
*/
	int _idx0;
	int _idx1;
	int _idx2;
	int _idx3;
	int _idx4;
	int _idx5;
	int _idx6;
	int _idx7;
	int idx_1_2;
	int pt_idx_x;
	int pt_idx_y;
	int pt_idx_z;
	int size_1_1;
	int size_1_2;
	//int t;
	int tmp;
	int v_idx_x;
	int v_idx_x_max;
	int v_idx_y;
	int v_idx_y_max;
	int v_idx_z;
	int v_idx_z_max;
	/*
	Initializations
	*/
	size_1_1=(y_max/blockDim.y);
	size_1_2=(z_max/blockDim.z);
	idx_1_2=(blockIdx.y/size_1_2);
	tmp=(blockIdx.y-(idx_1_2*size_1_2));
	v_idx_x=(cbx*(threadIdx.x+(blockDim.x*blockIdx.x)));
	v_idx_x_max=(v_idx_x+cbx);
	v_idx_y=(threadIdx.y+(tmp*blockDim.y));
	v_idx_y_max=(v_idx_y+1);
	v_idx_z=(threadIdx.z+(idx_1_2*blockDim.z));
	v_idx_z_max=(v_idx_z+1);
	/*
	Implementation
	*/
	/*
	for t = 1..t_max by 1 parallel 1 <level 0> schedule  { ... }
	*/
	//for (t=1; t<=t_max; t+=1)
	{
		/* Index bounds calculations for iterators in v[t=t, s=(cbx, 1, 1)][0] */
		/*
		for POINT pt[t=t, s=(1, 1, 1)][0] of size [1, 1, 1] in v[t=t, s=(:, :, :)][0] parallel 1 <level 1> schedule default { ... }
		*/
		{
			/* Index bounds calculations for iterators in pt[t=t, s=(1, 1, 1)][0] */
			pt_idx_z=v_idx_z;
			pt_idx_y=v_idx_y;
			for (pt_idx_x=v_idx_x; pt_idx_x<(v_idx_x_max-0); pt_idx_x+=1)
			{
				/* Index bounds calculations for iterators in pt[t=t, s=(1, 1, 1)][0] */
				/*
				v[t=(t+1), s=pt[t=?, s=?][0]][0]=stencil(v[t=t, s=pt[t=?, s=?][0]][0])
				*/
				/* _idx0 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+1) */
				_idx0=(((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+1);
				/* _idx1 = ((((pt_idx_z*x_max)*y_max)+(pt_idx_y*x_max))+pt_idx_x) */
				_idx1=(((((_idx0+(((((-2*pt_idx_z)-2)*t)-x_max)*y_max))+(((((-2*pt_idx_z)-2)*t)-1)*x_max))+(((-4*pt_idx_z)-4)*(t*t)))+(((-2*pt_idx_y)-2)*t))-1);
				/* _idx2 = ((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x) */
				_idx2=(_idx0-1);
				/* _idx3 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+2) */
				_idx3=(_idx2+2);
				/* _idx4 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+(((((2*pt_idx_z)+2)*t)+pt_idx_y)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+((2*pt_idx_y)*t))+pt_idx_x)+1) */
				_idx4=((_idx0-x_max)-(2*t));
				/* _idx5 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+2)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+4)*t))+pt_idx_x)+1) */
				_idx5=((_idx0+x_max)+(2*t));
				/* _idx6 = ((((((((pt_idx_z*x_max)+((2*pt_idx_z)*t))*y_max)+(((((2*pt_idx_z)*t)+pt_idx_y)+1)*x_max))+((4*pt_idx_z)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+1) */
				_idx6=((((_idx2+((( - x_max)-(2*t))*y_max))-((2*t)*x_max))-(4*(t*t)))+1);
				/* _idx7 = (((((((((pt_idx_z+2)*x_max)+(((2*pt_idx_z)+4)*t))*y_max)+((((((2*pt_idx_z)+4)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+8)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+1) */
				_idx7=(((_idx0+((x_max+(2*t))*y_max))+((2*t)*x_max))+(4*(t*t)));
//				u__T_0[t][_idx0]=((((u__T_0[(t-1)][_idx0]*((u__c_1[(t-1)][_idx1]*u__T_0[(t-1)][_idx0])+u__c_2[(t-1)][_idx1]))+u__c_3[(t-1)][_idx1])+((u__c_4[(t-1)][_idx1]*u__T_0[(t-1)][_idx2])+(u__c_5[(t-1)][_idx1]*u__T_0[(t-1)][_idx3])))+(((u__c_6[(t-1)][_idx1]*u__T_0[(t-1)][_idx4])+(u__c_7[(t-1)][_idx1]*u__T_0[(t-1)][_idx5]))+((u__c_8[(t-1)][_idx1]*u__T_0[(t-1)][_idx6])+(u__c_9[(t-1)][_idx1]*u__T_0[(t-1)][_idx7]))));
				T_0_1[_idx0]=((((T_0_0[_idx0]*((c_1_0[_idx1]*T_0_0[_idx0])+c_2_0[_idx1]))+c_3_0[_idx1])+((c_4_0[_idx1]*T_0_0[_idx2])+(c_5_0[_idx1]*T_0_0[_idx3])))+(((c_6_0[_idx1]*T_0_0[_idx4])+(c_7_0[_idx1]*T_0_0[_idx5]))+((c_8_0[_idx1]*T_0_0[_idx6])+(c_9_0[_idx1]*T_0_0[_idx7]))));
			}
		}
	}
}

__global__ void initialize(float *  T_0_0, float *  T_0_1, float *  c_1_0, float *  c_2_0, float *  c_3_0, float *  c_4_0, float *  c_5_0, float *  c_6_0, float *  c_7_0, float *  c_8_0, float *  c_9_0, int x_max, int y_max, int z_max, int cbx)
{
	 float *  const u__c_1[16] =  { c_1_0 } ;
	 float *  const u__c_2[16] =  { c_2_0 } ;
	 float *  const u__c_3[16] =  { c_3_0 } ;
	 float *  const u__c_4[16] =  { c_4_0 } ;
	 float *  const u__c_5[16] =  { c_5_0 } ;
	 float *  const u__c_6[16] =  { c_6_0 } ;
	 float *  const u__c_7[16] =  { c_7_0 } ;
	 float *  const u__c_8[16] =  { c_8_0 } ;
	 float *  const u__c_9[16] =  { c_9_0 } ;
	float *  const u__T_0[16] =  { T_0_0, T_0_1 } ;
	int _idx0;
	int _idx1;
	int _idx2;
	int _idx3;
	int _idx4;
	int _idx5;
	int _idx6;
	int _idx7;
	int idx_1_2;
	int pt_idx_x;
	int pt_idx_y;
	int pt_idx_z;
	int size_1_1;
	int size_1_2;
	//int t;
	int tmp;
	int v_idx_x;
	int v_idx_x_max;
	int v_idx_y;
	int v_idx_y_max;
	int v_idx_z;
	int v_idx_z_max;
	/*
	Initializations
	*/
	size_1_1=(y_max/blockDim.y);
	size_1_2=(z_max/blockDim.z);
	idx_1_2=(blockIdx.y/size_1_2);
	tmp=(blockIdx.y-(idx_1_2*size_1_2));
	v_idx_x=(cbx*(threadIdx.x+(blockDim.x*blockIdx.x)));
	v_idx_x_max=(v_idx_x+cbx);
	v_idx_y=(threadIdx.y+(tmp*blockDim.y));
	v_idx_y_max=(v_idx_y+1);
	v_idx_z=(threadIdx.z+(idx_1_2*blockDim.z));
	v_idx_z_max=(v_idx_z+1);
	/*
	Implementation
	*/
	/*
	for t = 1..t_max by 1 parallel 1 <level 0> schedule  { ... }
	*/
	//for (t=1; t<=t_max; t+=1)
	{
		/* Index bounds calculations for iterators in v[t=t, s=(cbx, 1, 1)][0] */
		/*
		for POINT pt[t=t, s=(1, 1, 1)][0] of size [1, 1, 1] in v[t=t, s=(:, :, :)][0] parallel 1 <level 1> schedule default { ... }
		*/
		{
			/* Index bounds calculations for iterators in pt[t=t, s=(1, 1, 1)][0] */
			pt_idx_z=v_idx_z;
			pt_idx_y=v_idx_y;
			for (pt_idx_x=v_idx_x; pt_idx_x<(v_idx_x_max-0); pt_idx_x+=1)
			{
				/* Index bounds calculations for iterators in pt[t=t, s=(1, 1, 1)][0] */
				/*
				v[t=(t+1), s=pt[t=?, s=?][0]][0]=stencil(v[t=t, s=pt[t=?, s=?][0]][0])
				*/
				/* _idx0 = ((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x) */
				_idx0=((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x);
				u__T_0[(t-1)][_idx0]=0.1;
				/* _idx1 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+(((((2*pt_idx_z)+2)*t)+pt_idx_y)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+((2*pt_idx_y)*t))+pt_idx_x)+1) */
				_idx1=(((_idx0-x_max)-(2*t))+1);
				u__T_0[(t-1)][_idx1]=0.1;
				/* _idx2 = ((((((((pt_idx_z*x_max)+((2*pt_idx_z)*t))*y_max)+(((((2*pt_idx_z)*t)+pt_idx_y)+1)*x_max))+((4*pt_idx_z)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+1) */
				_idx2=((((_idx0+((( - x_max)-(2*t))*y_max))-((2*t)*x_max))-(4*(t*t)))+1);
				u__T_0[(t-1)][_idx2]=0.1;
				/* _idx3 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+1) */
				_idx3=(_idx0+1);
				u__T_0[(t-1)][_idx3]=0.1;
				/* _idx4 = ((((pt_idx_z*x_max)*y_max)+(pt_idx_y*x_max))+pt_idx_x) */
				_idx4=(((((_idx2-(((2*pt_idx_z)*t)*y_max))+((((-2*pt_idx_z)*t)-1)*x_max))-((4*pt_idx_z)*(t*t)))+(((-2*pt_idx_y)-2)*t))-1);
				u__c_1[(t-1)][_idx4]=0.2;
				u__c_2[(t-1)][_idx4]=0.30000000000000004;
				u__c_3[(t-1)][_idx4]=0.4;
				u__c_4[(t-1)][_idx4]=0.5;
				u__c_5[(t-1)][_idx4]=0.6000000000000001;
				u__c_6[(t-1)][_idx4]=0.7000000000000001;
				u__c_7[(t-1)][_idx4]=0.8;
				u__c_8[(t-1)][_idx4]=0.9;
				u__c_9[(t-1)][_idx4]=1.0;
				/* _idx5 = (((((((((pt_idx_z+2)*x_max)+(((2*pt_idx_z)+4)*t))*y_max)+((((((2*pt_idx_z)+4)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+8)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+1) */
				_idx5=(((_idx3+((x_max+(2*t))*y_max))+((2*t)*x_max))+(4*(t*t)));
				u__T_0[(t-1)][_idx5]=0.1;
				/* _idx6 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+2)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+4)*t))+pt_idx_x)+1) */
				_idx6=((_idx3+x_max)+(2*t));
				u__T_0[(t-1)][_idx6]=0.1;
				/* _idx7 = (((((((((pt_idx_z+1)*x_max)+(((2*pt_idx_z)+2)*t))*y_max)+((((((2*pt_idx_z)+2)*t)+pt_idx_y)+1)*x_max))+(((4*pt_idx_z)+4)*(t*t)))+(((2*pt_idx_y)+2)*t))+pt_idx_x)+2) */
				_idx7=(_idx0+2);
				u__T_0[(t-1)][_idx7]=0.1;
				u__T_0[t][_idx3]=1.1;
			}
		}
	}
}


	.text
	.file	"kernel.hip"
	.globl	_Z27__device_stub__hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii # -- Begin function _Z27__device_stub__hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.type	_Z27__device_stub__hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii,@function
_Z27__device_stub__hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii: # @_Z27__device_stub__hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$224, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$240, %rsp
	.cfi_adjust_cfa_offset -240
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii, .Lfunc_end0-_Z27__device_stub__hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__initializePfS_S_S_S_S_S_S_S_S_S_iiii # -- Begin function _Z25__device_stub__initializePfS_S_S_S_S_S_S_S_S_S_iiii
	.type	_Z25__device_stub__initializePfS_S_S_S_S_S_S_S_S_S_iiii,@function
_Z25__device_stub__initializePfS_S_S_S_S_S_S_S_S_S_iiii: # @_Z25__device_stub__initializePfS_S_S_S_S_S_S_S_S_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$224, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$240, %rsp
	.cfi_adjust_cfa_offset -240
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__initializePfS_S_S_S_S_S_S_S_S_S_iiii, .Lfunc_end1-_Z25__device_stub__initializePfS_S_S_S_S_S_S_S_S_S_iiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii,@object # @_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.section	.rodata,"a",@progbits
	.globl	_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.p2align	3, 0x0
_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii:
	.quad	_Z27__device_stub__hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.size	_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii, 8

	.type	_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii,@object # @_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii
	.globl	_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii
	.p2align	3, 0x0
_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii:
	.quad	_Z25__device_stub__initializePfS_S_S_S_S_S_S_S_S_S_iiii
	.size	_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii"
	.size	.L__unnamed_1, 46

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii"
	.size	.L__unnamed_2, 41

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.addrsig_sym _Z25__device_stub__initializePfS_S_S_S_S_S_S_S_S_S_iiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.addrsig_sym _Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii ; -- Begin function _Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.globl	_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
	.p2align	8
	.type	_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii,@function
_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii: ; @_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
; %bb.0:
	s_load_b128 s[8:11], s[0:1], 0x60
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s11, 1
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph
	v_bfe_u32 v6, v0, 10, 10
	v_mov_b32_e32 v1, 0
	s_load_b512 s[16:31], s[0:1], 0x8
	v_bfe_u32 v2, v0, 20, 10
	global_load_b32 v5, v1, s[0:1] offset:126
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_lshr_b32 s33, s2, 16
	s_load_b32 s2, s[0:1], 0x7c
	v_cvt_f32_u32_e32 v1, s33
	s_sub_i32 s4, 0, s33
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s4, s4, s3
	s_mul_hi_u32 s4, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, s4
	s_mul_hi_u32 s3, s10, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s4, s3, s33
	s_sub_i32 s2, s10, s4
	s_add_i32 s4, s3, 1
	s_sub_i32 s5, s2, s33
	s_cmp_ge_u32 s2, s33
	s_cselect_b32 s3, s4, s3
	s_cselect_b32 s2, s5, s2
	s_add_i32 s4, s3, 1
	s_cmp_ge_u32 s2, s33
	s_cselect_b32 s10, s4, s3
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x58
	s_load_b128 s[4:7], s[0:1], 0x48
	v_cvt_f32_u32_e32 v1, s10
	s_sub_i32 s34, 0, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s13, v1
	v_and_b32_e32 v1, 0x3ff, v0
	s_mul_i32 s34, s34, s13
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s14, s12, v[1:2]
	s_mul_hi_u32 s0, s13, s34
	v_and_b32_e32 v1, 0xffff, v5
	s_add_i32 s13, s13, s0
	s_mov_b32 s12, s8
	s_mul_hi_u32 s0, s15, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s1, s0, s10
	s_add_i32 s13, s0, 1
	s_sub_i32 s1, s15, s1
	v_mul_lo_u32 v0, v3, s11
	s_sub_i32 s14, s1, s10
	s_cmp_ge_u32 s1, s10
	s_cselect_b32 s0, s13, s0
	s_cselect_b32 s1, s14, s1
	s_add_i32 s13, s0, 1
	s_cmp_ge_u32 s1, s10
	s_cselect_b32 s0, s13, s0
	s_add_i32 s1, s8, 2
	v_mad_u64_u32 v[3:4], null, s0, s33, v[2:3]
	s_mul_i32 s0, s0, s10
	s_ashr_i32 s13, s8, 31
	s_sub_i32 s0, s15, s0
	s_mul_i32 s35, s1, s9
	v_mul_lo_u32 v4, s0, v1
	s_add_u32 s1, s16, -4
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v12, 2, v3
	v_add_nc_u32_e32 v5, 2, v3
	v_mad_u64_u32 v[1:2], null, s8, v3, s[8:9]
	v_lshlrev_b32_e32 v7, 1, v3
	s_addc_u32 s10, s17, -1
	v_add_nc_u32_e32 v2, v6, v4
	v_mul_lo_u32 v5, s8, v5
	s_add_u32 s14, s16, -12
	s_addc_u32 s15, s17, -1
	s_delay_alu instid0(VALU_DEP_4)
	v_add3_u32 v1, v7, v1, 2
	v_add_nc_u32_e32 v8, v2, v7
	s_add_u32 s33, s16, 16
	s_addc_u32 s34, s17, 0
	s_add_u32 s18, s18, 4
	v_add3_u32 v5, v5, v7, 4
	v_add_nc_u32_e32 v7, 3, v8
	v_add_nc_u32_e32 v9, 5, v8
	v_mul_lo_u32 v1, v1, s9
	v_mul_lo_u32 v8, s8, v8
	v_mul_lo_u32 v10, s9, v5
	v_mul_lo_u32 v7, s8, v7
	v_mul_lo_u32 v9, s8, v9
	s_addc_u32 s19, s19, 0
	s_add_i32 s35, s35, 4
	v_lshlrev_b32_e32 v11, 1, v4
	v_mul_lo_u32 v13, v3, s35
	v_mad_u64_u32 v[4:5], null, s9, v3, v[2:3]
	v_lshlrev_b32_e32 v6, 1, v6
	s_delay_alu instid0(VALU_DEP_4)
	v_add3_u32 v2, v11, s8, v8
	v_add3_u32 v1, v11, v7, v1
	v_add3_u32 v5, v11, v9, v10
	v_add_nc_u32_e32 v3, s11, v0
	s_mov_b32 s11, 0
	v_add3_u32 v7, v2, v0, v13
	v_add3_u32 v8, v1, v0, v12
	v_add3_u32 v5, v5, v0, v12
	v_mad_u64_u32 v[1:2], null, s8, v4, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add3_u32 v2, v7, v6, 6
	v_add3_u32 v4, v8, v6, 6
	s_delay_alu instid0(VALU_DEP_4)
	v_add3_u32 v5, v5, v6, 7
	s_lshl_b64 s[8:9], s[12:13], 2
	s_mov_b32 s35, 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v6, s35, v4
	v_add_nc_u32_e32 v8, s35, v1
	v_add_nc_u32_e32 v10, s35, v2
	v_add_nc_u32_e32 v12, s35, v5
	s_add_i32 s35, s35, 1
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v9, 31, v8
	v_sub_co_u32 v14, vcc_lo, v6, s12
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[16:17], 2, v[6:7]
	v_ashrrev_i32_e32 v13, 31, v12
	v_subrev_co_ci_u32_e32 v15, vcc_lo, s13, v7, vcc_lo
	v_lshlrev_b64 v[6:7], 2, v[8:9]
	v_lshlrev_b64 v[8:9], 2, v[10:11]
	v_lshlrev_b64 v[10:11], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[12:13], 2, v[14:15]
	v_add_co_u32 v14, vcc_lo, s16, v16
	v_add_co_ci_u32_e32 v15, vcc_lo, s17, v17, vcc_lo
	v_add_co_u32 v18, vcc_lo, s20, v6
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v7, vcc_lo
	v_add_co_u32 v20, vcc_lo, s22, v6
	v_add_co_ci_u32_e32 v21, vcc_lo, s23, v7, vcc_lo
	v_add_co_u32 v22, vcc_lo, s24, v6
	v_add_co_ci_u32_e32 v23, vcc_lo, s25, v7, vcc_lo
	v_add_co_u32 v24, vcc_lo, s26, v6
	v_add_co_ci_u32_e32 v25, vcc_lo, s27, v7, vcc_lo
	v_add_co_u32 v26, vcc_lo, s28, v6
	v_add_co_ci_u32_e32 v27, vcc_lo, s29, v7, vcc_lo
	v_add_co_u32 v28, vcc_lo, s30, v6
	v_add_co_ci_u32_e32 v29, vcc_lo, s31, v7, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v30, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v31, vcc_lo, s5, v7, vcc_lo
	v_add_co_u32 v32, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v33, vcc_lo, s7, v7, vcc_lo
	v_add_co_u32 v34, vcc_lo, s14, v8
	v_add_co_ci_u32_e32 v35, vcc_lo, s15, v9, vcc_lo
	v_add_co_u32 v36, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v37, vcc_lo, s3, v7, vcc_lo
	v_add_co_u32 v9, vcc_lo, s33, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s34, v11, vcc_lo
	global_load_b96 v[6:8], v[14:15], off
	global_load_b32 v18, v[18:19], off
	global_load_b32 v19, v[20:21], off
	global_load_b32 v20, v[22:23], off
	global_load_b32 v21, v[24:25], off
	global_load_b32 v22, v[26:27], off
	v_add_co_u32 v14, vcc_lo, v14, s8
	v_add_co_ci_u32_e32 v15, vcc_lo, s9, v15, vcc_lo
	v_add_co_u32 v11, vcc_lo, s1, v12
	global_load_b32 v23, v[28:29], off
	v_add_co_ci_u32_e32 v12, vcc_lo, s10, v13, vcc_lo
	global_load_b32 v13, v[30:31], off
	global_load_b32 v24, v[32:33], off
	global_load_b32 v25, v[36:37], off
	s_clause 0x3
	global_load_b32 v9, v[9:10], off
	global_load_b32 v10, v[14:15], off offset:12
	global_load_b32 v14, v[34:35], off
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(8)
	v_dual_fmac_f32 v19, v7, v18 :: v_dual_mul_f32 v8, v22, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v8, v21, v6
	s_waitcnt vmcnt(3)
	v_dual_mul_f32 v9, v25, v9 :: v_dual_add_nc_u32 v6, s35, v0
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v10, v13, v10
	v_cmp_ge_i32_e32 vcc_lo, v6, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v9, v24, v14 :: v_dual_fmac_f32 v10, v23, v11
	v_fmac_f32_e32 v20, v7, v19
	v_add_co_u32 v6, s0, s18, v16
	v_add_co_ci_u32_e64 v7, s0, s19, v17, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_add_f32 v9, v10, v9 :: v_dual_add_f32 v8, v20, v8
	s_or_b32 s11, vcc_lo, s11
	v_add_f32_e32 v8, v8, v9
	global_store_b32 v[6:7], v8, off
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 368
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 38
		.amdhsa_next_free_sgpr 36
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii, .Lfunc_end0-_Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1184
; NumSgprs: 38
; NumVgprs: 38
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 38
; NumVGPRsForWavesPerEU: 38
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii ; -- Begin function _Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii
	.globl	_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii
	.p2align	8
	.type	_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii,@function
_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii: ; @_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii
; %bb.0:
	s_load_b128 s[8:11], s[0:1], 0x58
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s11, 1
	s_cbranch_scc1 .LBB1_3
; %bb.1:                                ; %.lr.ph
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, 0x3e4ccccd
	v_bfe_u32 v16, v0, 10, 10
	v_bfe_u32 v2, v0, 20, 10
	s_load_b512 s[16:31], s[0:1], 0x0
	global_load_b32 v15, v1, s[0:1] offset:118
	v_dual_mov_b32 v8, 0x3f19999a :: v_dual_lshlrev_b32 v17, 1, v16
	v_dual_mov_b32 v6, 0x3ecccccd :: v_dual_mov_b32 v7, 0.5
	v_mov_b32_e32 v12, 1.0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_lshr_b32 s12, s2, 16
	s_load_b32 s2, s[0:1], 0x74
	v_cvt_f32_u32_e32 v1, s12
	s_sub_i32 s4, 0, s12
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s13, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s4, s4, s3
	s_mul_hi_u32 s4, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, s4
	s_mul_hi_u32 s3, s10, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s4, s3, s12
	s_sub_i32 s2, s10, s4
	s_add_i32 s4, s3, 1
	s_sub_i32 s5, s2, s12
	s_cmp_ge_u32 s2, s12
	s_cselect_b32 s3, s4, s3
	s_cselect_b32 s2, s5, s2
	s_add_i32 s4, s3, 1
	s_cmp_ge_u32 s2, s12
	s_cselect_b32 s10, s4, s3
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x50
	s_load_b128 s[4:7], s[0:1], 0x40
	v_cvt_f32_u32_e32 v1, s10
	s_sub_i32 s1, 0, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x4f7ffffe, v1
	v_and_b32_e32 v1, 0x3ff, v0
	v_cvt_u32_f32_e32 v0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[13:14], null, s14, s13, v[1:2]
	v_mov_b32_e32 v3, 0x3dcccccd
	v_and_b32_e32 v1, 0xffff, v15
	v_readfirstlane_b32 s0, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v0, v13, s11
	s_mul_i32 s1, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s1, s0, s1
	s_add_i32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s0, s15, s0
	s_mul_i32 s1, s0, s10
	s_add_i32 s13, s0, 1
	s_sub_i32 s1, s15, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s14, s1, s10
	s_cmp_ge_u32 s1, s10
	s_cselect_b32 s0, s13, s0
	s_cselect_b32 s1, s14, s1
	s_add_i32 s13, s0, 1
	s_cmp_ge_u32 s1, s10
	s_cselect_b32 s0, s13, s0
	s_add_i32 s1, s8, 2
	v_mad_u64_u32 v[13:14], null, s0, s12, v[2:3]
	s_mul_i32 s0, s0, s10
	v_mov_b32_e32 v10, 0x3f4ccccd
	s_sub_i32 s0, s15, s0
	s_mul_i32 s33, s1, s9
	v_mul_lo_u32 v14, s0, v1
	s_add_u32 s1, s16, 16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v15, 2, v13
	v_mad_u64_u32 v[1:2], null, s8, v13, s[8:9]
	v_lshlrev_b32_e32 v18, 1, v13
	s_addc_u32 s10, s17, 0
	v_mul_lo_u32 v15, s8, v15
	v_dual_mov_b32 v5, 0x3e99999a :: v_dual_add_nc_u32 v2, v16, v14
	v_lshlrev_b32_e32 v19, 1, v14
	v_add3_u32 v1, v18, v1, 2
	s_ashr_i32 s12, s8, 31
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v9, 0x3f333333 :: v_dual_add_nc_u32 v16, v2, v18
	v_mov_b32_e32 v11, 0x3f666666
	v_add3_u32 v14, v15, v18, 4
	s_add_u32 s13, s16, 12
	v_add_nc_u32_e32 v20, 5, v16
	v_add_nc_u32_e32 v15, 2, v16
	v_add_nc_u32_e32 v18, 3, v16
	v_mul_lo_u32 v1, v1, s9
	v_mul_lo_u32 v16, s8, v16
	v_mul_lo_u32 v21, s9, v14
	v_mul_lo_u32 v22, s8, v15
	v_mul_lo_u32 v18, s8, v18
	v_mul_lo_u32 v20, s8, v20
	s_addc_u32 s14, s17, 0
	s_add_u32 s15, s18, 4
	s_addc_u32 s18, s19, 0
	s_add_i32 s33, s33, 4
	v_mad_u64_u32 v[14:15], null, s9, v13, v[2:3]
	v_mul_lo_u32 v24, v13, s33
	v_lshlrev_b32_e32 v23, 2, v13
	v_add3_u32 v2, v19, s8, v16
	v_add3_u32 v15, v19, v22, v1
	v_add3_u32 v1, v19, v18, v1
	v_add3_u32 v16, v19, v20, v21
	v_add_nc_u32_e32 v13, s11, v0
	s_mov_b32 s9, 0
	v_add3_u32 v18, v2, v0, v24
	v_add3_u32 v15, v15, v0, v23
	v_add3_u32 v19, v1, v0, v23
	v_add3_u32 v16, v16, v0, v23
	v_mad_u64_u32 v[1:2], null, s8, v14, v[0:1]
	v_add3_u32 v2, v18, v17, 3
	v_add3_u32 v14, v15, v17, 5
	v_add3_u32 v15, v19, v17, 6
	v_add3_u32 v16, v16, v17, 7
	v_mov_b32_e32 v17, 0x3f8ccccd
	s_mov_b32 s11, 0
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v18, s11, v15
	v_add_nc_u32_e32 v20, s11, v14
	v_add_nc_u32_e32 v22, s11, v2
	v_add_nc_u32_e32 v24, s11, v1
	v_add_nc_u32_e32 v26, s11, v16
	s_add_i32 s11, s11, 1
	v_ashrrev_i32_e32 v19, 31, v18
	v_add_nc_u32_e32 v29, s11, v0
	v_ashrrev_i32_e32 v21, 31, v20
	v_add_co_u32 v28, vcc_lo, v18, s8
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[30:31], 2, v[18:19]
	v_ashrrev_i32_e32 v23, 31, v22
	v_ashrrev_i32_e32 v25, 31, v24
	v_ashrrev_i32_e32 v27, 31, v26
	v_cmp_ge_i32_e64 s0, v29, v13
	v_add_co_ci_u32_e32 v29, vcc_lo, s12, v19, vcc_lo
	v_lshlrev_b64 v[20:21], 2, v[20:21]
	v_lshlrev_b64 v[18:19], 2, v[22:23]
	v_lshlrev_b64 v[22:23], 2, v[24:25]
	v_lshlrev_b64 v[24:25], 2, v[26:27]
	v_lshlrev_b64 v[26:27], 2, v[28:29]
	v_add_co_u32 v28, vcc_lo, s16, v30
	v_add_co_ci_u32_e32 v29, vcc_lo, s17, v31, vcc_lo
	v_add_co_u32 v20, vcc_lo, s16, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s17, v21, vcc_lo
	v_add_co_u32 v18, vcc_lo, s16, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s17, v19, vcc_lo
	v_add_co_u32 v32, vcc_lo, s20, v22
	v_add_co_ci_u32_e32 v33, vcc_lo, s21, v23, vcc_lo
	v_add_co_u32 v34, vcc_lo, s22, v22
	v_add_co_ci_u32_e32 v35, vcc_lo, s23, v23, vcc_lo
	v_add_co_u32 v36, vcc_lo, s24, v22
	v_add_co_ci_u32_e32 v37, vcc_lo, s25, v23, vcc_lo
	v_add_co_u32 v38, vcc_lo, s26, v22
	v_add_co_ci_u32_e32 v39, vcc_lo, s27, v23, vcc_lo
	v_add_co_u32 v40, vcc_lo, s28, v22
	v_add_co_ci_u32_e32 v41, vcc_lo, s29, v23, vcc_lo
	v_add_co_u32 v42, vcc_lo, s30, v22
	v_add_co_ci_u32_e32 v43, vcc_lo, s31, v23, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v44, vcc_lo, s4, v22
	v_add_co_ci_u32_e32 v45, vcc_lo, s5, v23, vcc_lo
	v_add_co_u32 v46, vcc_lo, s6, v22
	v_add_co_ci_u32_e32 v47, vcc_lo, s7, v23, vcc_lo
	v_add_co_u32 v22, vcc_lo, s2, v22
	v_add_co_ci_u32_e32 v23, vcc_lo, s3, v23, vcc_lo
	v_add_co_u32 v24, vcc_lo, s1, v24
	v_add_co_ci_u32_e32 v25, vcc_lo, s10, v25, vcc_lo
	v_add_co_u32 v30, vcc_lo, s15, v30
	v_add_co_ci_u32_e32 v31, vcc_lo, s18, v31, vcc_lo
	s_clause 0x3
	global_store_b32 v[28:29], v3, off
	global_store_b32 v[20:21], v3, off
	global_store_b32 v[18:19], v3, off
	global_store_b32 v[28:29], v3, off offset:4
	global_store_b32 v[32:33], v4, off
	global_store_b32 v[34:35], v5, off
	global_store_b32 v[36:37], v6, off
	global_store_b32 v[38:39], v7, off
	global_store_b32 v[40:41], v8, off
	global_store_b32 v[42:43], v9, off
	v_add_co_u32 v18, vcc_lo, s13, v26
	s_or_b32 s9, s0, s9
	v_add_co_ci_u32_e32 v19, vcc_lo, s14, v27, vcc_lo
	global_store_b32 v[44:45], v10, off
	global_store_b32 v[46:47], v11, off
	global_store_b32 v[22:23], v12, off
	s_clause 0x2
	global_store_b32 v[24:25], v3, off
	global_store_b32 v[18:19], v3, off
	global_store_b32 v[28:29], v3, off offset:8
	global_store_b32 v[30:31], v17, off
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB1_2
.LBB1_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 360
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 48
		.amdhsa_next_free_sgpr 34
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii, .Lfunc_end1-_Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1240
; NumSgprs: 36
; NumVgprs: 48
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 36
; NumVGPRsForWavesPerEU: 48
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .offset:         96
        .size:           4
        .value_kind:     by_value
      - .offset:         100
        .size:           4
        .value_kind:     by_value
      - .offset:         104
        .size:           4
        .value_kind:     by_value
      - .offset:         108
        .size:           4
        .value_kind:     by_value
      - .offset:         112
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         116
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         120
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         124
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         126
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         128
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         130
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         132
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         134
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         160
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         168
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         176
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 368
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii
    .private_segment_fixed_size: 0
    .sgpr_count:     38
    .sgpr_spill_count: 0
    .symbol:         _Z12hyperthermiaPPfS_S_S_S_S_S_S_S_S_S_S_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     38
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .offset:         88
        .size:           4
        .value_kind:     by_value
      - .offset:         92
        .size:           4
        .value_kind:     by_value
      - .offset:         96
        .size:           4
        .value_kind:     by_value
      - .offset:         100
        .size:           4
        .value_kind:     by_value
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         108
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         112
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         116
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         118
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         120
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         122
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         124
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         126
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         160
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         168
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 360
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii
    .private_segment_fixed_size: 0
    .sgpr_count:     36
    .sgpr_spill_count: 0
    .symbol:         _Z10initializePfS_S_S_S_S_S_S_S_S_S_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     48
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
