#include "includes.h"
__global__ void cuSearchDoublet( const int* nSpM, const float* spMmat, const int* nSpB, const float* spBmat, const int* nSpT, const float* spTmat, const float* deltaRMin, const float* deltaRMax, const float* cotThetaMax, const float* collisionRegionMin, const float* collisionRegionMax, int* nSpMcomp, int* nSpBcompPerSpM_Max, int* nSpTcompPerSpM_Max, int* nSpBcompPerSpM, int* nSpTcompPerSpM, int* McompIndex, int* BcompIndex, int* tmpBcompIndex, int* TcompIndex, int* tmpTcompIndex) {
extern __shared__ float sharedMem[];
int* mPos = (int*)sharedMem;
int* isMcompat = (int*)&mPos[1];

if (threadIdx.x == 0) {
*isMcompat = false;
}
__syncthreads();

float rM = spMmat[blockIdx.x + (*nSpM) * 3];
float zM = spMmat[blockIdx.x + (*nSpM) * 2];

bool isBcompat(true);
bool isTcompat(true);

int offset(0);

while (offset < max(*nSpB, *nSpT)) {
isBcompat = true;

// Doublet search for bottom hits
if (threadIdx.x + offset < *nSpB) {
float rB = spBmat[threadIdx.x + offset + (*nSpB) * 3];
float zB = spBmat[threadIdx.x + offset + (*nSpB) * 2];

float deltaR = rM - rB;
if (deltaR > *deltaRMax) {
isBcompat = false;
}

if (deltaR < *deltaRMin) {
isBcompat = false;
}

float cotTheta = (zM - zB) / deltaR;
if (fabsf(cotTheta) > *cotThetaMax) {
isBcompat = false;
}

float zOrigin = zM - rM * cotTheta;
if (zOrigin < *collisionRegionMin || zOrigin > *collisionRegionMax) {
isBcompat = false;
}

if (isBcompat == true) {
int bPos = atomicAdd(&nSpBcompPerSpM[blockIdx.x], 1);
tmpBcompIndex[bPos + (*nSpB) * blockIdx.x] = threadIdx.x + offset;
}
}

isTcompat = true;

// Doublet search for top hits
if (threadIdx.x + offset < *nSpT) {
float rT = spTmat[threadIdx.x + offset + (*nSpT) * 3];
float zT = spTmat[threadIdx.x + offset + (*nSpT) * 2];
float deltaR = rT - rM;
if (deltaR < *deltaRMin) {
isTcompat = false;
}

if (deltaR > *deltaRMax) {
isTcompat = false;
}

if (isTcompat == true) {
float cotTheta = (zT - zM) / deltaR;
if (fabsf(cotTheta) > *cotThetaMax) {
isTcompat = false;
}

float zOrigin = zM - rM * cotTheta;
if (zOrigin < *collisionRegionMin || zOrigin > *collisionRegionMax) {
isTcompat = false;
}
}

if (isTcompat == true) {
int tPos = atomicAdd(&nSpTcompPerSpM[blockIdx.x], 1);
tmpTcompIndex[tPos + (*nSpT) * blockIdx.x] = threadIdx.x + offset;
}
}

offset += blockDim.x;
}

__syncthreads();

if (threadIdx.x == 0) {
if (nSpBcompPerSpM[blockIdx.x] > 0 && nSpTcompPerSpM[blockIdx.x] > 0) {
*mPos = atomicAdd(nSpMcomp, 1);
*isMcompat = true;
McompIndex[*mPos] = blockIdx.x;

int bMax = atomicMax(nSpBcompPerSpM_Max, nSpBcompPerSpM[blockIdx.x]);
int tMax = atomicMax(nSpTcompPerSpM_Max, nSpTcompPerSpM[blockIdx.x]);
}
}

__syncthreads();

if (*isMcompat == true) {
offset = 0;
while (offset <
max(nSpBcompPerSpM[blockIdx.x], nSpTcompPerSpM[blockIdx.x])) {
if (threadIdx.x + offset < nSpBcompPerSpM[blockIdx.x]) {
BcompIndex[threadIdx.x + offset + (*nSpB) * (*mPos)] =
tmpBcompIndex[threadIdx.x + offset + (*nSpB) * blockIdx.x];
}

if (threadIdx.x + offset < nSpTcompPerSpM[blockIdx.x]) {
TcompIndex[threadIdx.x + offset + (*nSpT) * (*mPos)] =
tmpTcompIndex[threadIdx.x + offset + (*nSpT) * blockIdx.x];
}
offset += blockDim.x;
}
}
}
	.file	"tmpxft_0023d60a_00000000-6_cuSearchDoublet.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z95__device_stub__Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_PKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.type	_Z95__device_stub__Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_PKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_, @function
_Z95__device_stub__Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_PKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$424, %rsp
	.cfi_def_cfa_offset 432
	movq	432(%rsp), %rax
	movq	%rdi, 168(%rsp)
	leaq	192(%rsp), %rdi
	movq	%rsi, 160(%rsp)
	leaq	204(%rsp), %rsi
	movq	%rax, 120(%rsp)
	movq	440(%rsp), %rax
	movq	%rdx, 152(%rsp)
	leaq	176(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movq	448(%rsp), %rax
	movq	%rcx, 144(%rsp)
	leaq	184(%rsp), %rcx
	movq	%rax, 104(%rsp)
	movq	456(%rsp), %rax
	movq	%r8, 136(%rsp)
	movq	%rax, 96(%rsp)
	movq	464(%rsp), %rax
	movq	%r9, 128(%rsp)
	movq	%rax, 88(%rsp)
	movq	472(%rsp), %rax
	movq	%rax, 80(%rsp)
	movq	480(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	488(%rsp), %rax
	movq	%rax, 64(%rsp)
	movq	496(%rsp), %rax
	movq	%rax, 56(%rsp)
	movq	504(%rsp), %rax
	movq	%rax, 48(%rsp)
	movq	512(%rsp), %rax
	movq	%rax, 40(%rsp)
	movq	520(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	528(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	536(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	544(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 408(%rsp)
	xorl	%eax, %eax
	leaq	168(%rsp), %rax
	movl	$1, 200(%rsp)
	movq	%rax, 240(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	152(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	144(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	136(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	128(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	120(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 304(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 312(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 320(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 328(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 336(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 344(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 352(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 360(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 368(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 376(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 384(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 392(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 400(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 192(%rsp)
	movq	%rax, 204(%rsp)
	movl	$1, 212(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	184(%rsp)
	.cfi_def_cfa_offset 440
	leaq	_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_(%rip), %rdi
	pushq	184(%rsp)
	.cfi_def_cfa_offset 448
	movq	220(%rsp), %rcx
	movl	228(%rsp), %r8d
	movq	208(%rsp), %rsi
	movl	216(%rsp), %edx
	leaq	256(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 440
	popq	%rdx
	.cfi_def_cfa_offset 432
.L2:
	movq	408(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$424, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z95__device_stub__Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_PKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_, .-_Z95__device_stub__Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_PKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.globl	_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.type	_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_, @function
_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z95__device_stub__Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_PKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.cfi_endproc
.LFE2033:
	.size	_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_, .-_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void cuSearchDoublet( const int* nSpM, const float* spMmat, const int* nSpB, const float* spBmat, const int* nSpT, const float* spTmat, const float* deltaRMin, const float* deltaRMax, const float* cotThetaMax, const float* collisionRegionMin, const float* collisionRegionMax, int* nSpMcomp, int* nSpBcompPerSpM_Max, int* nSpTcompPerSpM_Max, int* nSpBcompPerSpM, int* nSpTcompPerSpM, int* McompIndex, int* BcompIndex, int* tmpBcompIndex, int* TcompIndex, int* tmpTcompIndex) {
extern __shared__ float sharedMem[];
int* mPos = (int*)sharedMem;
int* isMcompat = (int*)&mPos[1];

if (threadIdx.x == 0) {
*isMcompat = false;
}
__syncthreads();

float rM = spMmat[blockIdx.x + (*nSpM) * 3];
float zM = spMmat[blockIdx.x + (*nSpM) * 2];

bool isBcompat(true);
bool isTcompat(true);

int offset(0);

while (offset < max(*nSpB, *nSpT)) {
isBcompat = true;

// Doublet search for bottom hits
if (threadIdx.x + offset < *nSpB) {
float rB = spBmat[threadIdx.x + offset + (*nSpB) * 3];
float zB = spBmat[threadIdx.x + offset + (*nSpB) * 2];

float deltaR = rM - rB;
if (deltaR > *deltaRMax) {
isBcompat = false;
}

if (deltaR < *deltaRMin) {
isBcompat = false;
}

float cotTheta = (zM - zB) / deltaR;
if (fabsf(cotTheta) > *cotThetaMax) {
isBcompat = false;
}

float zOrigin = zM - rM * cotTheta;
if (zOrigin < *collisionRegionMin || zOrigin > *collisionRegionMax) {
isBcompat = false;
}

if (isBcompat == true) {
int bPos = atomicAdd(&nSpBcompPerSpM[blockIdx.x], 1);
tmpBcompIndex[bPos + (*nSpB) * blockIdx.x] = threadIdx.x + offset;
}
}

isTcompat = true;

// Doublet search for top hits
if (threadIdx.x + offset < *nSpT) {
float rT = spTmat[threadIdx.x + offset + (*nSpT) * 3];
float zT = spTmat[threadIdx.x + offset + (*nSpT) * 2];
float deltaR = rT - rM;
if (deltaR < *deltaRMin) {
isTcompat = false;
}

if (deltaR > *deltaRMax) {
isTcompat = false;
}

if (isTcompat == true) {
float cotTheta = (zT - zM) / deltaR;
if (fabsf(cotTheta) > *cotThetaMax) {
isTcompat = false;
}

float zOrigin = zM - rM * cotTheta;
if (zOrigin < *collisionRegionMin || zOrigin > *collisionRegionMax) {
isTcompat = false;
}
}

if (isTcompat == true) {
int tPos = atomicAdd(&nSpTcompPerSpM[blockIdx.x], 1);
tmpTcompIndex[tPos + (*nSpT) * blockIdx.x] = threadIdx.x + offset;
}
}

offset += blockDim.x;
}

__syncthreads();

if (threadIdx.x == 0) {
if (nSpBcompPerSpM[blockIdx.x] > 0 && nSpTcompPerSpM[blockIdx.x] > 0) {
*mPos = atomicAdd(nSpMcomp, 1);
*isMcompat = true;
McompIndex[*mPos] = blockIdx.x;

int bMax = atomicMax(nSpBcompPerSpM_Max, nSpBcompPerSpM[blockIdx.x]);
int tMax = atomicMax(nSpTcompPerSpM_Max, nSpTcompPerSpM[blockIdx.x]);
}
}

__syncthreads();

if (*isMcompat == true) {
offset = 0;
while (offset <
max(nSpBcompPerSpM[blockIdx.x], nSpTcompPerSpM[blockIdx.x])) {
if (threadIdx.x + offset < nSpBcompPerSpM[blockIdx.x]) {
BcompIndex[threadIdx.x + offset + (*nSpB) * (*mPos)] =
tmpBcompIndex[threadIdx.x + offset + (*nSpB) * blockIdx.x];
}

if (threadIdx.x + offset < nSpTcompPerSpM[blockIdx.x]) {
TcompIndex[threadIdx.x + offset + (*nSpT) * (*mPos)] =
tmpTcompIndex[threadIdx.x + offset + (*nSpT) * blockIdx.x];
}
offset += blockDim.x;
}
}
}
	.text
	.file	"cuSearchDoublet.hip"
	.globl	_Z30__device_stub__cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_ # -- Begin function _Z30__device_stub__cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.type	_Z30__device_stub__cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_,@function
_Z30__device_stub__cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_: # @_Z30__device_stub__cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$272, %rsp                      # imm = 0x110
	.cfi_def_cfa_offset 320
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	376(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	384(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	392(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	400(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	408(%rsp), %rax
	movq	%rax, 136(%rbx)
	leaq	416(%rsp), %rax
	movq	%rax, 144(%rbx)
	leaq	424(%rsp), %rax
	movq	%rax, 152(%rbx)
	leaq	432(%rsp), %rax
	movq	%rax, 160(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$288, %rsp                      # imm = 0x120
	.cfi_adjust_cfa_offset -288
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_, .Lfunc_end0-_Z30__device_stub__cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_,@object # @_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.section	.rodata,"a",@progbits
	.globl	_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.p2align	3, 0x0
_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_:
	.quad	_Z30__device_stub__cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.size	_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_"
	.size	.L__unnamed_1, 82

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_ ; -- Begin function _Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.globl	_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
	.p2align	8
	.type	_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_,@function
_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_: ; @_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
; %bb.0:
	v_cmp_eq_u32_e64 s2, 0, v0
	s_mov_b32 s28, s15
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mov_b32_e32 v1, 0
	ds_store_b32 v1, v1 offset:4
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b512 s[4:19], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_load_b32 s3, s[8:9], 0x0
	s_load_b32 s35, s[12:13], 0x0
	s_clause 0x2
	s_load_b512 s[36:51], s[0:1], 0x40
	s_load_b64 s[30:31], s[0:1], 0xa0
	s_load_b256 s[20:27], s[0:1], 0x80
	s_waitcnt lgkmcnt(0)
	s_max_i32 s29, s3, s35
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s29, 1
	s_cbranch_scc1 .LBB0_24
; %bb.3:                                ; %.lr.ph
	s_load_b32 s29, s[4:5], 0x0
	s_mov_b32 s5, 0
	v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v4, s35
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s29, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s4, s4, s28
	s_lshl_b64 s[52:53], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s52, s6, s52
	s_addc_u32 s53, s7, s53
	s_sub_i32 s4, s4, s29
	s_mov_b32 s29, s5
	s_lshl_b64 s[54:55], s[4:5], 2
	s_load_b32 s4, s[0:1], 0xb4
	s_add_u32 s6, s6, s54
	s_addc_u32 s7, s7, s55
	s_clause 0x1
	s_load_b32 s33, s[52:53], 0x0
	s_load_b32 s52, s[6:7], 0x0
	s_lshl_b64 s[54:55], s[28:29], 2
	s_mov_b32 s53, s5
	s_add_u32 s6, s48, s54
	s_addc_u32 s7, s49, s55
	s_add_u32 s34, s50, s54
	s_addc_u32 s35, s51, s55
	s_waitcnt lgkmcnt(0)
	s_and_b32 s29, s4, 0xffff
.LBB0_4:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v3, s53, v0
	s_mov_b32 s54, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v3, v1
	s_cbranch_execz .LBB0_12
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	v_mad_u64_u32 v[5:6], null, v1, 3, v[3:4]
	v_mov_b32_e32 v6, v2
	v_lshl_add_u32 v1, v1, 1, v3
	s_mov_b32 s55, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	s_clause 0x1
	global_load_b32 v1, v[5:6], off
	global_load_b32 v5, v[7:8], off
	global_load_b32 v7, v2, s[38:39]
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v1, s33, v1
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v5, s52, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v6, null, v1, v1, v5
	v_rcp_f32_e32 v8, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v6, v8, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v8
	v_div_scale_f32 v9, vcc_lo, v5, v1, v5
	v_mul_f32_e32 v10, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, -v6, v10, v9
	v_fmac_f32_e32 v10, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v6, v10, v9
	v_div_fmas_f32 v6, v6, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v5, v6, v1, v5
	v_fma_f32 v6, -s33, v5, s52
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_nlt_f32_e32 v6, v7
	s_cbranch_execz .LBB0_11
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	s_clause 0x3
	global_load_b32 v7, v2, s[36:37]
	global_load_b32 v8, v2, s[40:41]
	global_load_b32 v9, v2, s[16:17]
	global_load_b32 v10, v2, s[18:19]
	s_waitcnt vmcnt(3)
	v_cmp_ngt_f32_e64 s56, |v5|, v7
	s_waitcnt vmcnt(2)
	v_cmp_ngt_f32_e32 vcc_lo, v6, v8
	s_waitcnt vmcnt(1)
	v_cmp_nlt_f32_e64 s3, v1, v9
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e64 s4, v1, v10
	s_and_b32 s56, vcc_lo, s56
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s56, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s4
	s_cbranch_execz .LBB0_10
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=1
	s_mov_b32 s56, exec_lo
	s_mov_b32 s4, exec_lo
	v_mbcnt_lo_u32_b32 v1, s56, 0
                                        ; implicit-def: $vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_4 Depth=1
	s_bcnt1_i32_b32 s56, s56
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s56
	global_atomic_add_u32 v4, v2, v4, s[6:7] glc
.LBB0_9:                                ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	global_load_b32 v5, v2, s[8:9]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v4
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v5, v5, s28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v5, s4, v1
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s24, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s25, v5, vcc_lo
	global_store_b32 v[4:5], v3, off
	global_load_b32 v4, v2, s[12:13]
.LBB0_10:                               ; %Flow222
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_11:                               ; %Flow223
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s55
.LBB0_12:                               ; %.critedge
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s54
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_u32_e64 v3, v4
	s_cbranch_execz .LBB0_22
; %bb.13:                               ;   in Loop: Header=BB0_4 Depth=1
	v_mad_u64_u32 v[5:6], null, v4, 3, v[3:4]
	v_mov_b32_e32 v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v5, vcc_lo, s14, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s15, v6, vcc_lo
	global_load_b32 v1, v[5:6], off
	s_clause 0x1
	global_load_b32 v6, v2, s[16:17]
	global_load_b32 v7, v2, s[18:19]
	s_waitcnt vmcnt(2)
	v_subrev_f32_e32 v5, s33, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_nlt_f32_e32 vcc_lo, v5, v6
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e64 s3, v5, v7
	s_and_b32 s54, s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s54
	s_cbranch_execz .LBB0_21
; %bb.14:                               ;   in Loop: Header=BB0_4 Depth=1
	v_lshl_add_u32 v1, v4, 1, v3
	s_mov_b32 s54, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_add_co_u32 v6, vcc_lo, s14, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, s15, v7, vcc_lo
	global_load_b32 v1, v[6:7], off
	global_load_b32 v6, v2, s[38:39]
	s_waitcnt vmcnt(1)
	v_subrev_f32_e32 v1, s52, v1
	v_div_scale_f32 v7, null, v5, v5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v7, v8, 1.0
	v_fmac_f32_e32 v8, v9, v8
	v_div_scale_f32 v9, vcc_lo, v1, v5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v9, v8
	v_fma_f32 v11, -v7, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v8
	v_fma_f32 v7, -v7, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v7, v7, v8, v10
	v_div_fixup_f32 v1, v7, v5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -s33, v1, s52
	s_waitcnt vmcnt(0)
	v_cmpx_nlt_f32_e32 v5, v6
	s_cbranch_execz .LBB0_20
; %bb.15:                               ;   in Loop: Header=BB0_4 Depth=1
	s_clause 0x1
	global_load_b32 v6, v2, s[36:37]
	global_load_b32 v7, v2, s[40:41]
	s_waitcnt vmcnt(1)
	v_cmp_ngt_f32_e64 s55, |v1|, v6
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s56, vcc_lo, s55
	s_and_saveexec_b32 s55, s56
	s_cbranch_execz .LBB0_19
; %bb.16:                               ;   in Loop: Header=BB0_4 Depth=1
	s_mov_b32 s57, exec_lo
	s_mov_b32 s56, exec_lo
	v_mbcnt_lo_u32_b32 v1, s57, 0
                                        ; implicit-def: $vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_4 Depth=1
	s_bcnt1_i32_b32 s57, s57
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s57
	global_atomic_add_u32 v4, v2, v4, s[34:35] glc
.LBB0_18:                               ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s56
	global_load_b32 v5, v2, s[12:13]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s56, v4
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v5, v5, s28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v5, s56, v1
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s30, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s31, v5, vcc_lo
	global_store_b32 v[4:5], v3, off
	global_load_b32 v4, v2, s[12:13]
.LBB0_19:                               ; %Flow219
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s55
.LBB0_20:                               ; %Flow220
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s54
.LBB0_21:                               ; %Flow221
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_22:                               ; %.critedge144
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s4
	global_load_b32 v1, v2, s[8:9]
	s_add_i32 s53, s53, s29
	s_waitcnt vmcnt(0)
	v_max_i32_e32 v3, v1, v4
	v_cmp_ge_i32_e32 vcc_lo, s53, v3
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_4
; %bb.23:                               ; %Flow224
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_24:                               ; %._crit_edge
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s6, s2
	s_cbranch_execz .LBB0_33
; %bb.25:
	s_mov_b32 s29, 0
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[2:3], s[28:29], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s4, s48, s2
	s_addc_u32 s5, s49, s3
	global_load_b32 v2, v1, s[4:5]
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, 1, v2
	s_cbranch_vccnz .LBB0_33
; %bb.26:
	s_add_u32 s2, s50, s2
	s_addc_u32 s3, s51, s3
	global_load_b32 v1, v1, s[2:3]
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, 1, v1
	s_cbranch_vccnz .LBB0_33
; %bb.27:
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v1, s10, 0
                                        ; implicit-def: $vgpr2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB0_29
; %bb.28:
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, s10
	global_atomic_add_u32 v2, v2, v3, s[42:43] glc
.LBB0_29:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v2
	v_mbcnt_lo_u32_b32 v6, exec_lo, 0
	v_mov_b32_e32 v7, s28
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v5, 1 :: v_dual_add_nc_u32 v2, s7, v1
	v_mov_b32_e32 v1, 0
	s_mov_b32 s7, exec_lo
	v_ashrrev_i32_e32 v3, 31, v2
	ds_store_2addr_b32 v1, v2, v5 offset1:1
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s20, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v4, vcc_lo
	global_store_b32 v[3:4], v7, off
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB0_31
; %bb.30:
	global_load_b32 v2, v1, s[4:5]
	s_waitcnt vmcnt(0)
	global_atomic_max_i32 v1, v2, s[44:45]
.LBB0_31:
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v1, exec_lo, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_33
; %bb.32:
	v_mov_b32_e32 v1, 0
	global_load_b32 v2, v1, s[2:3]
	s_waitcnt vmcnt(0)
	global_atomic_max_i32 v1, v2, s[46:47]
.LBB0_33:
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s29, 0
	ds_load_b32 v1, v2 offset:4
	s_waitcnt lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 1, v1
	s_cbranch_vccnz .LBB0_41
; %bb.34:                               ; %.preheader
	s_lshl_b64 s[4:5], s[28:29], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s48, s4
	s_addc_u32 s3, s49, s5
	s_add_u32 s4, s50, s4
	s_addc_u32 s5, s51, s5
	s_clause 0x1
	global_load_b32 v5, v2, s[2:3]
	global_load_b32 v4, v2, s[4:5]
	s_waitcnt vmcnt(0)
	v_max_i32_e32 v1, v5, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, 1, v1
	s_cbranch_vccnz .LBB0_41
; %bb.35:                               ; %.lr.ph149
	s_load_b32 s1, s[0:1], 0xb4
	v_mov_b32_e32 v3, 0
	s_mov_b32 s0, 0
	s_mov_b32 s6, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s1, 0xffff
.LBB0_36:                               ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v1, s6, v0
	s_mov_b32 s7, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v1, v5
	s_cbranch_execz .LBB0_38
; %bb.37:                               ;   in Loop: Header=BB0_36 Depth=1
	global_load_b32 v6, v2, s[8:9]
	ds_load_b32 v8, v3
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[4:5], null, v6, s28, v[1:2]
	v_mov_b32_e32 v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s24, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s25, v5, vcc_lo
	global_load_b32 v7, v[4:5], off
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[4:5], null, v8, v6, v[1:2]
	v_mov_b32_e32 v5, v3
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s22, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s23, v5, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v7, off
	global_load_b32 v4, v2, s[4:5]
.LBB0_38:                               ;   in Loop: Header=BB0_36 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s7, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_u32_e64 v1, v4
	s_cbranch_execz .LBB0_40
; %bb.39:                               ;   in Loop: Header=BB0_36 Depth=1
	global_load_b32 v6, v2, s[12:13]
	ds_load_b32 v8, v3
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[4:5], null, v6, s28, v[1:2]
	v_mov_b32_e32 v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s30, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s31, v5, vcc_lo
	global_load_b32 v7, v[4:5], off
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[4:5], null, v8, v6, v[1:2]
	v_mov_b32_e32 v5, v3
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s26, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s27, v5, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v7, off
	global_load_b32 v4, v2, s[4:5]
.LBB0_40:                               ;   in Loop: Header=BB0_36 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b32 v5, v2, s[2:3]
	s_add_i32 s6, s6, s1
	s_waitcnt vmcnt(0)
	v_max_i32_e32 v1, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, s6, v1
	s_or_b32 s0, vcc_lo, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_36
.LBB0_41:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 424
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 58
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_, .Lfunc_end0-_Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2200
; NumSgprs: 60
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 7
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 60
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         120
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         128
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         136
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         144
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         152
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         160
        .size:           8
        .value_kind:     global_buffer
      - .offset:         168
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         172
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         176
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         180
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         182
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         184
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         186
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         188
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         190
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         208
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         216
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         224
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         232
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         288
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 424
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_
    .private_segment_fixed_size: 0
    .sgpr_count:     60
    .sgpr_spill_count: 0
    .symbol:         _Z15cuSearchDoubletPKiPKfS0_S2_S0_S2_S2_S2_S2_S2_S2_PiS3_S3_S3_S3_S3_S3_S3_S3_S3_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
