
#include <time.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <cuda.h>

#define INFTY 99999

int **A_Matrix, **D_Matrix;




__global__ void floyd_warshall_parallel_kernel(int* dev_dist, int N, int k) {\
	int tid = (blockIdx.y * gridDim.x + blockIdx.x) * blockDim.x + threadIdx.x;
	int i, j;
	int dist1, dist2, dist3;
	if (tid < N*N) {
		i = tid / N;
		j = tid - i*N;
		dist1 = dev_dist[tid];
		dist2 = dev_dist[i*N +k];
		dist3 = dev_dist[k*N +j];
		if (dist1 > dist2 + dist3)
			dev_dist[tid] = dist2 + dist3;
	}
}


void makeAdjacency(int n){   //Set initial values to node distances
    int N=n;
    int i,j;
    A_Matrix = (int **)malloc(N * sizeof(int *));
    for (i = 0; i < N; i++)
    {
        A_Matrix[i] = (int *)malloc(N * sizeof(int));
    }
    srand(0);
    for(i = 0; i < N; i++)
    {
        for(j = i; j < N; j++)
        {
            if(i == j){
                A_Matrix[i][j] = 0;
            }
            else{
                int r = rand() % 10;
                int val = (r == 5)? INFTY: r;
                A_Matrix[i][j] = val;
                A_Matrix[j][i] = val; 
            }

        }
    }
}

int main(int argc, char **argv){
    int N;     
	N = atoi(argv[1]);  //Read the console inputs
    int i;
	D_Matrix = (int **)malloc(N * sizeof(int *));
    for (i = 0; i < N; i++)
    {
        D_Matrix[i] = (int *)malloc(N * sizeof(int));
    }
    makeAdjacency(N);
	int gridx = pow(2, N - 4), gridy = pow(2, N - 4);  
	int blockx = pow(2, 4), blocky = pow(2, 4);
	dim3 dimGrid(gridx, gridy);
	dim3 dimBlock(blockx, blocky);
	int* device_dist;
	cudaMalloc( (void**)&device_dist, N*N * sizeof (int) );
	for (int i = 0; i < N; i++)
		cudaMemcpy(device_dist +i*N, A_Matrix[i], N * sizeof (int),
							  cudaMemcpyHostToDevice);
	clock_t start = clock();
	for (int k = 0; k < N; k++) {
		floyd_warshall_parallel_kernel<<<dimGrid,dimBlock>>>(device_dist,N,k);
    	}
	clock_t end = clock();   
	float seconds = (float)(end - start) / CLOCKS_PER_SEC;
	printf("Elapsed time on gpu = %f sec\n", seconds);
	// return results to dist matrix on host
	for (int i = 0; i < N; i++)
		 cudaMemcpy(D_Matrix[i], device_dist +i*N, N * sizeof (int),
							  cudaMemcpyDeviceToHost);
	
}




	.file	"tmpxft_002c5001_00000000-6_floyd.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z13makeAdjacencyi
	.type	_Z13makeAdjacencyi, @function
_Z13makeAdjacencyi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%edi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	0(,%r13,8), %rdi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r13, %rbp
	salq	$2, %r13
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	malloc@PLT
	movq	%rax, A_Matrix(%rip)
	movq	%rax, %r12
.L3:
	cmpl	%ebx, %ebp
	jle	.L15
	movq	%r13, %rdi
	call	malloc@PLT
	movq	%rax, (%r12,%rbx,8)
	incq	%rbx
	jmp	.L3
.L15:
	xorl	%edi, %edi
	xorl	%ebx, %ebx
	call	srand@PLT
.L5:
	movl	%ebx, %r14d
	movl	%ebx, %esi
	cmpl	%ebx, %ebp
	jle	.L2
	leaq	0(,%rbx,4), %r15
	leaq	0(,%rbx,8), %r13
	movq	%r15, %r12
.L11:
	cmpl	%ebp, %r14d
	je	.L16
	cmpl	%esi, %r14d
	jne	.L6
	movq	A_Matrix(%rip), %rax
	xorl	%edx, %edx
	movq	(%rax,%r13), %rax
	movl	%edx, (%rax,%r12)
	jmp	.L7
.L6:
	movl	%esi, 12(%rsp)
	call	rand@PLT
	movl	$10, %ecx
	movl	12(%rsp), %esi
	cltd
	idivl	%ecx
	movl	$99999, %eax
	cmpl	$5, %edx
	cmove	%eax, %edx
	movq	A_Matrix(%rip), %rax
	movq	(%rax,%r13), %rdi
	movq	(%rax,%r12,2), %rax
	movl	%edx, (%rdi,%r12)
	movl	%edx, (%rax,%r15)
.L7:
	incl	%r14d
	addq	$4, %r12
	jmp	.L11
.L16:
	incq	%rbx
	jmp	.L5
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z13makeAdjacencyi, .-_Z13makeAdjacencyi
	.globl	_Z52__device_stub__Z30floyd_warshall_parallel_kernelPiiiPiii
	.type	_Z52__device_stub__Z30floyd_warshall_parallel_kernelPiiiPiii, @function
_Z52__device_stub__Z30floyd_warshall_parallel_kernelPiiiPiii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z30floyd_warshall_parallel_kernelPiii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L17:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z52__device_stub__Z30floyd_warshall_parallel_kernelPiiiPiii, .-_Z52__device_stub__Z30floyd_warshall_parallel_kernelPiiiPiii
	.globl	_Z30floyd_warshall_parallel_kernelPiii
	.type	_Z30floyd_warshall_parallel_kernelPiii, @function
_Z30floyd_warshall_parallel_kernelPiii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z30floyd_warshall_parallel_kernelPiiiPiii
	.cfi_endproc
.LFE2055:
	.size	_Z30floyd_warshall_parallel_kernelPiii, .-_Z30floyd_warshall_parallel_kernelPiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Elapsed time on gpu = %f sec\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	movslq	%eax, %rbp
	leaq	0(,%rbp,8), %rdi
	movq	%rbp, %rbx
	salq	$2, %rbp
	call	malloc@PLT
	movq	%rax, D_Matrix(%rip)
	movq	%rax, %r13
.L23:
	cmpl	%r12d, %ebx
	jle	.L34
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rax, 0(%r13,%r12,8)
	incq	%r12
	jmp	.L23
.L34:
	movl	%ebx, %edi
	xorl	%r13d, %r13d
	call	_Z13makeAdjacencyi
	leal	-4(%rbx), %eax
	movsd	.LC0(%rip), %xmm0
	cvtsi2sdl	%eax, %xmm1
	movsd	%xmm1, 8(%rsp)
	call	pow@PLT
	movsd	8(%rsp), %xmm1
	movq	%xmm0, %r12
	movsd	.LC0(%rip), %xmm0
	call	pow@PLT
	movq	%r12, %xmm2
	movl	%ebx, %esi
	leaq	24(%rsp), %rdi
	cvttsd2sil	%xmm2, %eax
	movl	$1, 40(%rsp)
	xorl	%r12d, %r12d
	imull	%ebx, %esi
	movl	$1, 52(%rsp)
	movl	%eax, 32(%rsp)
	cvttsd2sil	%xmm0, %eax
	movslq	%esi, %rsi
	salq	$2, %rsi
	movl	%eax, 36(%rsp)
	movabsq	$68719476752, %rax
	movq	%rax, 44(%rsp)
	call	cudaMalloc@PLT
.L25:
	cmpl	%r12d, %ebx
	jle	.L35
	movq	A_Matrix(%rip), %rax
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	(%rax,%r12,8), %rsi
	addq	%r13, %rdi
	incq	%r12
	addq	%rbp, %r13
	call	cudaMemcpy@PLT
	jmp	.L25
.L35:
	call	clock@PLT
	xorl	%r12d, %r12d
	movq	%rax, %r13
.L27:
	cmpl	%ebx, %r12d
	jge	.L36
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	24(%rsp), %rdi
	movl	%r12d, %edx
	movl	%ebx, %esi
	call	_Z52__device_stub__Z30floyd_warshall_parallel_kernelPiiiPiii
.L28:
	incl	%r12d
	jmp	.L27
.L36:
	call	clock@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%r12d, %r12d
	subq	%r13, %rax
	xorl	%r13d, %r13d
	cvtsi2ssq	%rax, %xmm0
	movb	$1, %al
	divss	.LC1(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
.L30:
	cmpl	%r12d, %ebx
	jle	.L37
	movq	D_Matrix(%rip), %rax
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdx
	movq	(%rax,%r12,8), %rdi
	addq	%r13, %rsi
	incq	%r12
	addq	%rbp, %r13
	call	cudaMemcpy@PLT
	jmp	.L30
.L37:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z30floyd_warshall_parallel_kernelPiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z30floyd_warshall_parallel_kernelPiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	D_Matrix
	.bss
	.align 8
	.type	D_Matrix, @object
	.size	D_Matrix, 8
D_Matrix:
	.zero	8
	.globl	A_Matrix
	.align 8
	.type	A_Matrix, @object
	.size	A_Matrix, 8
A_Matrix:
	.zero	8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1073741824
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <time.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <hip/hip_runtime.h>

#define INFTY 99999

int **A_Matrix, **D_Matrix;




__global__ void floyd_warshall_parallel_kernel(int* dev_dist, int N, int k) {\
	int tid = (blockIdx.y * gridDim.x + blockIdx.x) * blockDim.x + threadIdx.x;
	int i, j;
	int dist1, dist2, dist3;
	if (tid < N*N) {
		i = tid / N;
		j = tid - i*N;
		dist1 = dev_dist[tid];
		dist2 = dev_dist[i*N +k];
		dist3 = dev_dist[k*N +j];
		if (dist1 > dist2 + dist3)
			dev_dist[tid] = dist2 + dist3;
	}
}


void makeAdjacency(int n){   //Set initial values to node distances
    int N=n;
    int i,j;
    A_Matrix = (int **)malloc(N * sizeof(int *));
    for (i = 0; i < N; i++)
    {
        A_Matrix[i] = (int *)malloc(N * sizeof(int));
    }
    srand(0);
    for(i = 0; i < N; i++)
    {
        for(j = i; j < N; j++)
        {
            if(i == j){
                A_Matrix[i][j] = 0;
            }
            else{
                int r = rand() % 10;
                int val = (r == 5)? INFTY: r;
                A_Matrix[i][j] = val;
                A_Matrix[j][i] = val; 
            }

        }
    }
}

int main(int argc, char **argv){
    int N;     
	N = atoi(argv[1]);  //Read the console inputs
    int i;
	D_Matrix = (int **)malloc(N * sizeof(int *));
    for (i = 0; i < N; i++)
    {
        D_Matrix[i] = (int *)malloc(N * sizeof(int));
    }
    makeAdjacency(N);
	int gridx = pow(2, N - 4), gridy = pow(2, N - 4);  
	int blockx = pow(2, 4), blocky = pow(2, 4);
	dim3 dimGrid(gridx, gridy);
	dim3 dimBlock(blockx, blocky);
	int* device_dist;
	hipMalloc( (void**)&device_dist, N*N * sizeof (int) );
	for (int i = 0; i < N; i++)
		hipMemcpy(device_dist +i*N, A_Matrix[i], N * sizeof (int),
							  hipMemcpyHostToDevice);
	clock_t start = clock();
	for (int k = 0; k < N; k++) {
		floyd_warshall_parallel_kernel<<<dimGrid,dimBlock>>>(device_dist,N,k);
    	}
	clock_t end = clock();   
	float seconds = (float)(end - start) / CLOCKS_PER_SEC;
	printf("Elapsed time on gpu = %f sec\n", seconds);
	// return results to dist matrix on host
	for (int i = 0; i < N; i++)
		 hipMemcpy(D_Matrix[i], device_dist +i*N, N * sizeof (int),
							  hipMemcpyDeviceToHost);
	
}




	.text
	.file	"floyd.hip"
	.globl	_Z45__device_stub__floyd_warshall_parallel_kernelPiii # -- Begin function _Z45__device_stub__floyd_warshall_parallel_kernelPiii
	.type	_Z45__device_stub__floyd_warshall_parallel_kernelPiii,@function
_Z45__device_stub__floyd_warshall_parallel_kernelPiii: # @_Z45__device_stub__floyd_warshall_parallel_kernelPiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z30floyd_warshall_parallel_kernelPiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z45__device_stub__floyd_warshall_parallel_kernelPiii, .Lfunc_end0-_Z45__device_stub__floyd_warshall_parallel_kernelPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13makeAdjacencyi              # -- Begin function _Z13makeAdjacencyi
	.type	_Z13makeAdjacencyi,@function
_Z13makeAdjacencyi:                     # @_Z13makeAdjacencyi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edi, %ebx
	movslq	%edi, %r15
	leaq	(,%r15,8), %rdi
	callq	malloc
	movq	%rax, A_Matrix(%rip)
	testl	%r15d, %r15d
	jle	.LBB1_12
# %bb.1:                                # %.lr.ph
	leaq	(,%r15,4), %r14
	movl	%r15d, %r12d
	xorl	%r15d, %r15d
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	callq	malloc
	movq	A_Matrix(%rip), %rcx
	movq	%rax, (%rcx,%r15,8)
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB1_2
# %bb.3:                                # %._crit_edge
	xorl	%edi, %edi
	callq	srand
	testl	%ebx, %ebx
	jle	.LBB1_11
# %bb.4:                                # %.preheader.preheader
	xorl	%ebx, %ebx
	movq	%r12, %r14
	xorl	%eax, %eax
	xorl	%r13d, %r13d
	movq	%r12, 8(%rsp)                   # 8-byte Spill
.LBB1_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_6 Depth 2
	leaq	(,%r13,8), %r15
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%rax, %r12
	xorl	%ebp, %ebp
.LBB1_6:                                #   Parent Loop BB1_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	testq	%rbp, %rbp
	je	.LBB1_7
# %bb.8:                                #   in Loop: Header=BB1_6 Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	cmpl	$5, %eax
	movl	$99999, %ecx                    # imm = 0x1869F
	cmovel	%ecx, %eax
	movq	A_Matrix(%rip), %rcx
	movq	(%rcx,%r13,8), %rdx
	addq	%rbx, %rdx
	movl	%eax, (%rdx,%rbp,4)
	addq	%r12, %rcx
	jmp	.LBB1_9
.LBB1_7:                                #   in Loop: Header=BB1_6 Depth=2
	movq	A_Matrix(%rip), %rcx
	addq	%r15, %rcx
	xorl	%eax, %eax
.LBB1_9:                                #   in Loop: Header=BB1_6 Depth=2
	movq	(%rcx), %rcx
	movl	%eax, (%rcx,%r13,4)
	incq	%rbp
	addq	$8, %r12
	cmpq	%rbp, %r14
	jne	.LBB1_6
# %bb.10:                               #   in Loop: Header=BB1_5 Depth=1
	incq	%r13
	movq	16(%rsp), %rax                  # 8-byte Reload
	addq	$8, %rax
	addq	$4, %rbx
	decq	%r14
	movq	8(%rsp), %r12                   # 8-byte Reload
	cmpq	%r12, %r13
	jne	.LBB1_5
.LBB1_11:                               # %._crit_edge31
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_12:                               # %._crit_edge.thread
	.cfi_def_cfa_offset 80
	xorl	%edi, %edi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	srand                           # TAILCALL
.Lfunc_end1:
	.size	_Z13makeAdjacencyi, .Lfunc_end1-_Z13makeAdjacencyi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x3ff0000000000000              # double 1
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI2_1:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	8(%rsi), %rdi
	callq	atoi
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movslq	%eax, %rbx
	leaq	(,%rbx,8), %rdi
	callq	malloc
	movq	%rax, D_Matrix(%rip)
	testl	%ebx, %ebx
	jle	.LBB2_3
# %bb.1:                                # %.lr.ph
	leaq	(,%rbx,4), %r15
	movl	8(%rsp), %r14d                  # 4-byte Reload
	xorl	%r12d, %r12d
.LBB2_2:                                # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	callq	malloc
	movq	D_Matrix(%rip), %rcx
	movq	%rax, (%rcx,%r12,8)
	incq	%r12
	cmpq	%r12, %r14
	jne	.LBB2_2
.LBB2_3:                                # %._crit_edge
	movq	8(%rsp), %r14                   # 8-byte Reload
	movl	%r14d, %edi
	callq	_Z13makeAdjacencyi
	leal	-4(%r14), %ebp
	movsd	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movl	%ebp, %edi
	callq	ldexp@PLT
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	movsd	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movl	%ebp, %edi
	callq	ldexp@PLT
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movl	%r14d, %esi
	imull	%esi, %esi
	shlq	$2, %rsi
	leaq	16(%rsp), %rdi
	callq	hipMalloc
	testl	%r14d, %r14d
	jle	.LBB2_4
# %bb.13:                               # %.lr.ph54
	cvttsd2si	32(%rsp), %eax          # 8-byte Folded Reload
	cvttsd2si	24(%rsp), %r15d         # 8-byte Folded Reload
	shlq	$32, %r15
	orq	%rax, %r15
	leaq	(,%rbx,4), %r12
	movl	%r14d, %r13d
	xorl	%ebp, %ebp
	xorl	%r14d, %r14d
.LBB2_14:                               # =>This Inner Loop Header: Depth=1
	movq	16(%rsp), %rdi
	addq	%rbp, %rdi
	movq	A_Matrix(%rip), %rax
	movq	(%rax,%r14,8), %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	incq	%r14
	addq	%r12, %rbp
	cmpq	%r14, %r13
	jne	.LBB2_14
# %bb.8:                                # %._crit_edge55
	callq	clock
	movq	%rax, %r12
	movq	8(%rsp), %r14                   # 8-byte Reload
	testl	%r14d, %r14d
	jle	.LBB2_15
# %bb.9:                                # %.lr.ph58.preheader
	xorl	%r13d, %r13d
	movabsq	$68719476752, %rbp              # imm = 0x1000000010
.LBB2_10:                               # %.lr.ph58
                                        # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.11:                               #   in Loop: Header=BB2_10 Depth=1
	movq	16(%rsp), %rdi
	movl	%r14d, %esi
	movl	%r13d, %edx
	callq	_Z45__device_stub__floyd_warshall_parallel_kernelPiii
.LBB2_12:                               #   in Loop: Header=BB2_10 Depth=1
	incl	%r13d
	cmpl	%r13d, %r14d
	jne	.LBB2_10
	jmp	.LBB2_5
.LBB2_4:                                # %._crit_edge55.thread
	callq	clock
	movq	%rax, %r12
.LBB2_5:                                # %._crit_edge59
	callq	clock
	subq	%r12, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI2_1(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	testl	%r14d, %r14d
	jle	.LBB2_16
# %bb.6:                                # %.lr.ph62
	shlq	$2, %rbx
	movl	%r14d, %r14d
	xorl	%r15d, %r15d
	xorl	%r12d, %r12d
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	movq	D_Matrix(%rip), %rax
	movq	(%rax,%r12,8), %rdi
	movq	16(%rsp), %rsi
	addq	%r15, %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	incq	%r12
	addq	%rbx, %r15
	cmpq	%r12, %r14
	jne	.LBB2_7
	jmp	.LBB2_16
.LBB2_15:                               # %._crit_edge63.critedge
	callq	clock
	subq	%r12, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI2_1(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
.LBB2_16:                               # %._crit_edge63
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z30floyd_warshall_parallel_kernelPiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	A_Matrix,@object                # @A_Matrix
	.bss
	.globl	A_Matrix
	.p2align	3, 0x0
A_Matrix:
	.quad	0
	.size	A_Matrix, 8

	.type	D_Matrix,@object                # @D_Matrix
	.globl	D_Matrix
	.p2align	3, 0x0
D_Matrix:
	.quad	0
	.size	D_Matrix, 8

	.type	_Z30floyd_warshall_parallel_kernelPiii,@object # @_Z30floyd_warshall_parallel_kernelPiii
	.section	.rodata,"a",@progbits
	.globl	_Z30floyd_warshall_parallel_kernelPiii
	.p2align	3, 0x0
_Z30floyd_warshall_parallel_kernelPiii:
	.quad	_Z45__device_stub__floyd_warshall_parallel_kernelPiii
	.size	_Z30floyd_warshall_parallel_kernelPiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Elapsed time on gpu = %f sec\n"
	.size	.L.str, 30

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z30floyd_warshall_parallel_kernelPiii"
	.size	.L__unnamed_1, 39

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z45__device_stub__floyd_warshall_parallel_kernelPiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z30floyd_warshall_parallel_kernelPiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z30floyd_warshall_parallel_kernelPiii ; -- Begin function _Z30floyd_warshall_parallel_kernelPiii
	.globl	_Z30floyd_warshall_parallel_kernelPiii
	.p2align	8
	.type	_Z30floyd_warshall_parallel_kernelPiii,@function
_Z30floyd_warshall_parallel_kernelPiii: ; @_Z30floyd_warshall_parallel_kernelPiii
; %bb.0:
	s_clause 0x2
	s_load_b32 s4, s[0:1], 0x10
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s4, s15
	s_and_b32 s5, s5, 0xffff
	s_add_i32 s4, s4, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	s_mul_i32 s4, s2, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.1:
	s_ashr_i32 s4, s2, 31
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s5, s2, s4
	s_load_b64 s[0:1], s[0:1], 0x0
	s_xor_b32 s4, s5, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v1, v2
	v_cvt_f32_u32_e32 v0, s4
	s_sub_i32 s5, 0, s4
	v_xor_b32_e32 v4, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, s5, v0
	v_mul_hi_u32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v3
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v0, s4
	v_sub_nc_u32_e32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s4, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s4, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_dual_cndmask_b32 v0, v0, v3 :: v_dual_add_nc_u32 v3, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v2
	v_sub_nc_u32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v3, v3, v0
	v_mad_u64_u32 v[5:6], null, s3, s2, v[0:1]
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v6, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_clause 0x2
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, v4, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.2:
	global_store_b32 v[0:1], v2, off
.LBB0_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z30floyd_warshall_parallel_kernelPiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z30floyd_warshall_parallel_kernelPiii, .Lfunc_end0-_Z30floyd_warshall_parallel_kernelPiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 428
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z30floyd_warshall_parallel_kernelPiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z30floyd_warshall_parallel_kernelPiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
