#include <iostream>
#include <unistd.h>
#include <sys/time.h>

#define tile_width 32

__global__
void normal_square_matrix_mult_kernel(int *m, int *n, int *p, unsigned width){
	unsigned col = threadIdx.x+(blockIdx.x*blockDim.x);
	unsigned row = threadIdx.y+(blockIdx.y*blockDim.y);

	if(col<width and row<width){
		int pvalue = 0;
		for(unsigned k=0; k<width; k++){
			pvalue += m[(row*width)+k]*n[(k*width)+col];
		}
		p[(row*width)+col] = pvalue;
	}
}

__global__
void tile_square_matrix_mult_kernel(int *m, int *n, int *p, unsigned width){
	__shared__ int mds[tile_width][tile_width];
	__shared__ int nds[tile_width][tile_width];

	unsigned bx = blockIdx.x;
	unsigned by = blockIdx.y;

	unsigned tx = threadIdx.x;
	unsigned ty = threadIdx.y;

	unsigned row = (by*tile_width)+ty;	
	unsigned col = (bx*tile_width)+tx;

	int pvalue = 0;
	unsigned ph, k;
	for(ph=0; ph<width/tile_width; ph++){
		mds[ty][tx] = m[(row*width)+(ph*tile_width) + tx];
		nds[ty][tx] = n[(((ph*tile_width)+ty)*width) + col];
		__syncthreads();

		for(k=0; k<tile_width; k++){
			pvalue += mds[ty][k]*nds[k][tx];
		}
		__syncthreads();
	}

	p[(row*width)+col] = pvalue;
}

void square_matrix_mult(int *m, int *n, int *p, unsigned width, unsigned block, char type){
	unsigned size = width*width*sizeof(int);
	int *d_m, *d_n, *d_p;

	cudaMalloc((void **)&d_m, size);
	cudaMalloc((void **)&d_n, size);
	cudaMalloc((void **)&d_p, size);

	cudaMemcpy(d_m, m, size, cudaMemcpyHostToDevice);	
	cudaMemcpy(d_n, n, size, cudaMemcpyHostToDevice);	

	dim3 dimGrid(ceil(width/block), ceil(width/block), 1);
	dim3 dimBlock(block, block, 1);

	switch(type){
		case 'n':
			normal_square_matrix_mult_kernel<<<dimGrid, dimBlock>>>(d_m, d_n, d_p, width);
			break;
		case 't':
			tile_square_matrix_mult_kernel<<<dimGrid, dimBlock>>>(d_m, d_n, d_p, width);
			break;
		default:
			break;
	}	

	cudaMemcpy(p, d_p, size, cudaMemcpyDeviceToHost);

	cudaFree(d_m);
	cudaFree(d_n);
	cudaFree(d_p);
}


int main(int argc, char const *argv[]){	
	unsigned width = 1024;
	unsigned block = 32;

	unsigned ntotal = width*width;	

	int *h_m = new int[ntotal];
	int *h_n = new int[ntotal];
	int *h_p = new int[ntotal];
	int *h_r = new int[ntotal];

	unsigned i, j;
	for(i=0; i<width; i++){
		for(j=0; j<width; j++){
		    h_m[(i*width)+j] = j;
		    h_n[(i*width)+j] = j;
		    h_p[(i*width)+j] = 0;
		    h_r[(i*width)+j] = 0;
		}
	}
		
	struct timeval ti, tf;
	double time;

	gettimeofday(&ti, NULL);

	square_matrix_mult(h_m, h_n, h_p, width, block, 'n');

	gettimeofday(&tf, NULL);
	
	time = (tf.tv_sec - ti.tv_sec)*1000 + (tf.tv_usec - ti.tv_usec)/1000;
	printf("[%ix%i] memoria global: %.8lf s\n", width, width, time/1000);

	gettimeofday(&ti, NULL);
		square_matrix_mult(h_m, h_n, h_r, width, block, 't');
	gettimeofday(&tf, NULL);
	time = (tf.tv_sec - ti.tv_sec)*1000 + (tf.tv_usec - ti.tv_usec)/1000;
	printf("[%ix%i] memoria compartida: %.8lf s\n", width, width, time/1000);

	delete h_m;
	delete h_n;
	delete h_p;
	delete h_r;

	return 0;
}

	.file	"tmpxft_002367ea_00000000-6_matriz_multiplicacion.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3652:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3652:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z57__device_stub__Z32normal_square_matrix_mult_kernelPiS_S_jPiS_S_j
	.type	_Z57__device_stub__Z32normal_square_matrix_mult_kernelPiS_S_jPiS_S_j, @function
_Z57__device_stub__Z32normal_square_matrix_mult_kernelPiS_S_jPiS_S_j:
.LFB3674:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z32normal_square_matrix_mult_kernelPiS_S_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3674:
	.size	_Z57__device_stub__Z32normal_square_matrix_mult_kernelPiS_S_jPiS_S_j, .-_Z57__device_stub__Z32normal_square_matrix_mult_kernelPiS_S_jPiS_S_j
	.globl	_Z32normal_square_matrix_mult_kernelPiS_S_j
	.type	_Z32normal_square_matrix_mult_kernelPiS_S_j, @function
_Z32normal_square_matrix_mult_kernelPiS_S_j:
.LFB3675:
	.cfi_startproc
	endbr64
	jmp	_Z57__device_stub__Z32normal_square_matrix_mult_kernelPiS_S_jPiS_S_j
	.cfi_endproc
.LFE3675:
	.size	_Z32normal_square_matrix_mult_kernelPiS_S_j, .-_Z32normal_square_matrix_mult_kernelPiS_S_j
	.globl	_Z55__device_stub__Z30tile_square_matrix_mult_kernelPiS_S_jPiS_S_j
	.type	_Z55__device_stub__Z30tile_square_matrix_mult_kernelPiS_S_jPiS_S_j, @function
_Z55__device_stub__Z30tile_square_matrix_mult_kernelPiS_S_jPiS_S_j:
.LFB3676:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z30tile_square_matrix_mult_kernelPiS_S_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3676:
	.size	_Z55__device_stub__Z30tile_square_matrix_mult_kernelPiS_S_jPiS_S_j, .-_Z55__device_stub__Z30tile_square_matrix_mult_kernelPiS_S_jPiS_S_j
	.globl	_Z30tile_square_matrix_mult_kernelPiS_S_j
	.type	_Z30tile_square_matrix_mult_kernelPiS_S_j, @function
_Z30tile_square_matrix_mult_kernelPiS_S_j:
.LFB3677:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z30tile_square_matrix_mult_kernelPiS_S_jPiS_S_j
	.cfi_endproc
.LFE3677:
	.size	_Z30tile_square_matrix_mult_kernelPiS_S_j, .-_Z30tile_square_matrix_mult_kernelPiS_S_j
	.globl	_Z18square_matrix_multPiS_S_jjc
	.type	_Z18square_matrix_multPiS_S_jjc, @function
_Z18square_matrix_multPiS_S_jjc:
.LFB3648:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movl	%r9d, 12(%rsp)
	leaq	24(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movl	%ecx, %eax
	imull	%ecx, %eax
	leal	0(,%rax,4), %ebp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebx, %eax
	xorl	%edx, %edx
	movl	12(%rsp), %r9d
	divl	%r12d
	movl	%r12d, 60(%rsp)
	movl	%r12d, 64(%rsp)
	movl	%eax, 48(%rsp)
	movl	%eax, 52(%rsp)
	cmpb	$110, %r9b
	je	.L14
	cmpb	$116, %r9b
	je	.L15
	jmp	.L16
.L14:
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebx, %ecx
	movq	24(%rsp), %rdi
	call	_Z57__device_stub__Z32normal_square_matrix_mult_kernelPiS_S_jPiS_S_j
	jmp	.L16
.L15:
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebx, %ecx
	movq	24(%rsp), %rdi
	call	_Z55__device_stub__Z30tile_square_matrix_mult_kernelPiS_S_jPiS_S_j
.L16:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3648:
	.size	_Z18square_matrix_multPiS_S_jjc, .-_Z18square_matrix_multPiS_S_jjc
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"[%ix%i] memoria global: %.8lf s\n"
.LC2:
	.string	"[%ix%i] memoria compartida: %.8lf s\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3649:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4194304, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$4194304, %edi
	movq	%rax, %r13
	call	_Znam@PLT
	movl	$4194304, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$4194304, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	xorl	%edx, %edx
	movq	%rax, 8(%rsp)
.L23:
	movq	%rdx, %rcx
	xorl	%eax, %eax
.L22:
	movl	%eax, 0(%r13,%rcx)
	movl	%eax, (%r12,%rcx)
	incl	%eax
	addq	$4, %rcx
	cmpl	$1024, %eax
	jne	.L22
	addq	$4096, %rdx
	cmpq	$4194304, %rdx
	jne	.L23
	movq	8(%rsp), %rdi
	xorl	%eax, %eax
	movl	$1048576, %ecx
	xorl	%esi, %esi
	leaq	24(%rsp), %r15
	leaq	40(%rsp), %r14
	movl	$1000, %ebx
	rep stosl
	movl	$1048576, %ecx
	movq	%rbp, %rdi
	rep stosl
	movq	%r15, %rdi
	call	gettimeofday@PLT
	movl	$1024, %ecx
	movq	%rbp, %rdx
	movq	%r12, %rsi
	movl	$110, %r9d
	movl	$32, %r8d
	movq	%r13, %rdi
	call	_Z18square_matrix_multPiS_S_jjc
	xorl	%esi, %esi
	movq	%r14, %rdi
	call	gettimeofday@PLT
	movq	48(%rsp), %rax
	subq	32(%rsp), %rax
	leaq	.LC1(%rip), %rsi
	cqto
	movq	40(%rsp), %rcx
	subq	24(%rsp), %rcx
	movl	$2, %edi
	idivq	%rbx
	imulq	$1000, %rcx, %rcx
	movl	$1024, %edx
	addq	%rax, %rcx
	movb	$1, %al
	cvtsi2sdq	%rcx, %xmm0
	movl	$1024, %ecx
	divsd	.LC0(%rip), %xmm0
	call	__printf_chk@PLT
	xorl	%esi, %esi
	movq	%r15, %rdi
	call	gettimeofday@PLT
	movq	8(%rsp), %rdx
	movq	%r12, %rsi
	movq	%r13, %rdi
	movl	$116, %r9d
	movl	$32, %r8d
	movl	$1024, %ecx
	call	_Z18square_matrix_multPiS_S_jjc
	xorl	%esi, %esi
	movq	%r14, %rdi
	call	gettimeofday@PLT
	movq	48(%rsp), %rax
	subq	32(%rsp), %rax
	leaq	.LC2(%rip), %rsi
	cqto
	movq	40(%rsp), %rcx
	subq	24(%rsp), %rcx
	movl	$2, %edi
	idivq	%rbx
	imulq	$1000, %rcx, %rcx
	movl	$1024, %edx
	addq	%rax, %rcx
	movb	$1, %al
	cvtsi2sdq	%rcx, %xmm0
	movl	$1024, %ecx
	divsd	.LC0(%rip), %xmm0
	call	__printf_chk@PLT
	movl	$4, %esi
	movq	%r13, %rdi
	call	_ZdlPvm@PLT
	movl	$4, %esi
	movq	%r12, %rdi
	call	_ZdlPvm@PLT
	movl	$4, %esi
	movq	%rbp, %rdi
	call	_ZdlPvm@PLT
	movq	8(%rsp), %rdi
	movl	$4, %esi
	call	_ZdlPvm@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3649:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z30tile_square_matrix_mult_kernelPiS_S_j"
.LC4:
	.string	"_Z32normal_square_matrix_mult_kernelPiS_S_j"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3679:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z30tile_square_matrix_mult_kernelPiS_S_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z32normal_square_matrix_mult_kernelPiS_S_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3679:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <unistd.h>
#include <sys/time.h>

#define tile_width 32

__global__
void normal_square_matrix_mult_kernel(int *m, int *n, int *p, unsigned width){
	unsigned col = threadIdx.x+(blockIdx.x*blockDim.x);
	unsigned row = threadIdx.y+(blockIdx.y*blockDim.y);

	if(col<width and row<width){
		int pvalue = 0;
		for(unsigned k=0; k<width; k++){
			pvalue += m[(row*width)+k]*n[(k*width)+col];
		}
		p[(row*width)+col] = pvalue;
	}
}

__global__
void tile_square_matrix_mult_kernel(int *m, int *n, int *p, unsigned width){
	__shared__ int mds[tile_width][tile_width];
	__shared__ int nds[tile_width][tile_width];

	unsigned bx = blockIdx.x;
	unsigned by = blockIdx.y;

	unsigned tx = threadIdx.x;
	unsigned ty = threadIdx.y;

	unsigned row = (by*tile_width)+ty;	
	unsigned col = (bx*tile_width)+tx;

	int pvalue = 0;
	unsigned ph, k;
	for(ph=0; ph<width/tile_width; ph++){
		mds[ty][tx] = m[(row*width)+(ph*tile_width) + tx];
		nds[ty][tx] = n[(((ph*tile_width)+ty)*width) + col];
		__syncthreads();

		for(k=0; k<tile_width; k++){
			pvalue += mds[ty][k]*nds[k][tx];
		}
		__syncthreads();
	}

	p[(row*width)+col] = pvalue;
}

void square_matrix_mult(int *m, int *n, int *p, unsigned width, unsigned block, char type){
	unsigned size = width*width*sizeof(int);
	int *d_m, *d_n, *d_p;

	hipMalloc((void **)&d_m, size);
	hipMalloc((void **)&d_n, size);
	hipMalloc((void **)&d_p, size);

	hipMemcpy(d_m, m, size, hipMemcpyHostToDevice);	
	hipMemcpy(d_n, n, size, hipMemcpyHostToDevice);	

	dim3 dimGrid(ceil(width/block), ceil(width/block), 1);
	dim3 dimBlock(block, block, 1);

	switch(type){
		case 'n':
			normal_square_matrix_mult_kernel<<<dimGrid, dimBlock>>>(d_m, d_n, d_p, width);
			break;
		case 't':
			tile_square_matrix_mult_kernel<<<dimGrid, dimBlock>>>(d_m, d_n, d_p, width);
			break;
		default:
			break;
	}	

	hipMemcpy(p, d_p, size, hipMemcpyDeviceToHost);

	hipFree(d_m);
	hipFree(d_n);
	hipFree(d_p);
}


int main(int argc, char const *argv[]){	
	unsigned width = 1024;
	unsigned block = 32;

	unsigned ntotal = width*width;	

	int *h_m = new int[ntotal];
	int *h_n = new int[ntotal];
	int *h_p = new int[ntotal];
	int *h_r = new int[ntotal];

	unsigned i, j;
	for(i=0; i<width; i++){
		for(j=0; j<width; j++){
		    h_m[(i*width)+j] = j;
		    h_n[(i*width)+j] = j;
		    h_p[(i*width)+j] = 0;
		    h_r[(i*width)+j] = 0;
		}
	}
		
	struct timeval ti, tf;
	double time;

	gettimeofday(&ti, NULL);

	square_matrix_mult(h_m, h_n, h_p, width, block, 'n');

	gettimeofday(&tf, NULL);
	
	time = (tf.tv_sec - ti.tv_sec)*1000 + (tf.tv_usec - ti.tv_usec)/1000;
	printf("[%ix%i] memoria global: %.8lf s\n", width, width, time/1000);

	gettimeofday(&ti, NULL);
		square_matrix_mult(h_m, h_n, h_r, width, block, 't');
	gettimeofday(&tf, NULL);
	time = (tf.tv_sec - ti.tv_sec)*1000 + (tf.tv_usec - ti.tv_usec)/1000;
	printf("[%ix%i] memoria compartida: %.8lf s\n", width, width, time/1000);

	delete h_m;
	delete h_n;
	delete h_p;
	delete h_r;

	return 0;
}

	.text
	.file	"matriz_multiplicacion.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z47__device_stub__normal_square_matrix_mult_kernelPiS_S_j # -- Begin function _Z47__device_stub__normal_square_matrix_mult_kernelPiS_S_j
	.type	_Z47__device_stub__normal_square_matrix_mult_kernelPiS_S_j,@function
_Z47__device_stub__normal_square_matrix_mult_kernelPiS_S_j: # @_Z47__device_stub__normal_square_matrix_mult_kernelPiS_S_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z32normal_square_matrix_mult_kernelPiS_S_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z47__device_stub__normal_square_matrix_mult_kernelPiS_S_j, .Lfunc_end0-_Z47__device_stub__normal_square_matrix_mult_kernelPiS_S_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z45__device_stub__tile_square_matrix_mult_kernelPiS_S_j # -- Begin function _Z45__device_stub__tile_square_matrix_mult_kernelPiS_S_j
	.type	_Z45__device_stub__tile_square_matrix_mult_kernelPiS_S_j,@function
_Z45__device_stub__tile_square_matrix_mult_kernelPiS_S_j: # @_Z45__device_stub__tile_square_matrix_mult_kernelPiS_S_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z30tile_square_matrix_mult_kernelPiS_S_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z45__device_stub__tile_square_matrix_mult_kernelPiS_S_j, .Lfunc_end1-_Z45__device_stub__tile_square_matrix_mult_kernelPiS_S_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z18square_matrix_multPiS_S_jjc # -- Begin function _Z18square_matrix_multPiS_S_jjc
	.type	_Z18square_matrix_multPiS_S_jjc,@function
_Z18square_matrix_multPiS_S_jjc:        # @_Z18square_matrix_multPiS_S_jjc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 36(%rsp)                  # 4-byte Spill
	movl	%r8d, %r12d
	movl	%ecx, %ebx
	movq	%rdx, 48(%rsp)                  # 8-byte Spill
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
	movq	%rdi, %r13
	movl	%ecx, %r14d
	imull	%r14d, %r14d
	shll	$2, %r14d
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %r15
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	36(%rsp), %ecx                  # 4-byte Reload
	movl	%ebx, %eax
	xorl	%edx, %edx
	divl	%r12d
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, %rdi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movl	%r12d, %eax
	movq	%rax, %rdx
	shlq	$32, %rdx
	orq	%rax, %rdx
	cmpl	$116, %ecx
	je	.LBB2_4
# %bb.1:
	cmpl	$110, %ecx
	jne	.LBB2_6
# %bb.2:
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	%ebx, %ecx
	callq	_Z47__device_stub__normal_square_matrix_mult_kernelPiS_S_j
	jmp	.LBB2_6
.LBB2_4:
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	%ebx, %ecx
	callq	_Z45__device_stub__tile_square_matrix_mult_kernelPiS_S_j
.LBB2_6:
	movq	8(%rsp), %rsi
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z18square_matrix_multPiS_S_jjc, .Lfunc_end2-_Z18square_matrix_multPiS_S_jjc
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4194304, %edi                  # imm = 0x400000
	callq	_Znam
	movq	%rax, %rbx
	movl	$4194304, %edi                  # imm = 0x400000
	callq	_Znam
	movq	%rax, %r14
	movl	$4194304, %edi                  # imm = 0x400000
	callq	_Znam
	movq	%rax, %r15
	movl	$4194304, %edi                  # imm = 0x400000
	callq	_Znam
	movq	%rax, %r12
	xorl	%r13d, %r13d
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$4096, %eax                     # imm = 0x1000
	movq	%r14, %rcx
	movq	%rbx, %rdx
.LBB3_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	xorl	%esi, %esi
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%esi, (%rdx,%rsi,4)
	movl	%esi, (%rcx,%rsi,4)
	incq	%rsi
	cmpq	$1024, %rsi                     # imm = 0x400
	jne	.LBB3_2
# %bb.3:                                #   in Loop: Header=BB3_1 Depth=1
	incq	%r13
	addq	%rax, %rdx
	addq	%rax, %rcx
	cmpq	$1024, %r13                     # imm = 0x400
	jne	.LBB3_1
# %bb.4:
	leaq	24(%rsp), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1024, %ecx                     # imm = 0x400
	movl	$32, %r8d
	movl	$110, %r9d
	callq	_Z18square_matrix_multPiS_S_jjc
	leaq	8(%rsp), %rbp
	movq	%rbp, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rbp), %rcx
	movq	8(%rbp), %rax
	subq	(%r13), %rcx
	imulq	$1000, %rcx, %rcx               # imm = 0x3E8
	subq	8(%r13), %rax
	movabsq	$2361183241434822607, %rdx      # imm = 0x20C49BA5E353F7CF
	imulq	%rdx
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$7, %rdx
	addq	%rax, %rdx
	addq	%rcx, %rdx
	cvtsi2sd	%rdx, %xmm0
	divsd	.LCPI3_0(%rip), %xmm0
	movl	$.L.str, %edi
	movl	$1024, %esi                     # imm = 0x400
	movl	$1024, %edx                     # imm = 0x400
	movb	$1, %al
	callq	printf
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	$1024, %ecx                     # imm = 0x400
	movl	$32, %r8d
	movl	$116, %r9d
	callq	_Z18square_matrix_multPiS_S_jjc
	movq	%rbp, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rbp), %rcx
	subq	(%r13), %rcx
	movq	8(%rbp), %rax
	imulq	$1000, %rcx, %rcx               # imm = 0x3E8
	subq	8(%r13), %rax
	movabsq	$2361183241434822607, %rdx      # imm = 0x20C49BA5E353F7CF
	imulq	%rdx
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$7, %rdx
	addq	%rax, %rdx
	addq	%rcx, %rdx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rdx, %xmm0
	divsd	.LCPI3_0(%rip), %xmm0
	movl	$.L.str.1, %edi
	movl	$1024, %esi                     # imm = 0x400
	movl	$1024, %edx                     # imm = 0x400
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	_ZdlPv
	movq	%r14, %rdi
	callq	_ZdlPv
	movq	%r15, %rdi
	callq	_ZdlPv
	movq	%r12, %rdi
	callq	_ZdlPv
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z32normal_square_matrix_mult_kernelPiS_S_j, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z30tile_square_matrix_mult_kernelPiS_S_j, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z32normal_square_matrix_mult_kernelPiS_S_j,@object # @_Z32normal_square_matrix_mult_kernelPiS_S_j
	.section	.rodata,"a",@progbits
	.globl	_Z32normal_square_matrix_mult_kernelPiS_S_j
	.p2align	3, 0x0
_Z32normal_square_matrix_mult_kernelPiS_S_j:
	.quad	_Z47__device_stub__normal_square_matrix_mult_kernelPiS_S_j
	.size	_Z32normal_square_matrix_mult_kernelPiS_S_j, 8

	.type	_Z30tile_square_matrix_mult_kernelPiS_S_j,@object # @_Z30tile_square_matrix_mult_kernelPiS_S_j
	.globl	_Z30tile_square_matrix_mult_kernelPiS_S_j
	.p2align	3, 0x0
_Z30tile_square_matrix_mult_kernelPiS_S_j:
	.quad	_Z45__device_stub__tile_square_matrix_mult_kernelPiS_S_j
	.size	_Z30tile_square_matrix_mult_kernelPiS_S_j, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"[%ix%i] memoria global: %.8lf s\n"
	.size	.L.str, 33

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"[%ix%i] memoria compartida: %.8lf s\n"
	.size	.L.str.1, 37

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z32normal_square_matrix_mult_kernelPiS_S_j"
	.size	.L__unnamed_1, 44

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z30tile_square_matrix_mult_kernelPiS_S_j"
	.size	.L__unnamed_2, 42

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z47__device_stub__normal_square_matrix_mult_kernelPiS_S_j
	.addrsig_sym _Z45__device_stub__tile_square_matrix_mult_kernelPiS_S_j
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z32normal_square_matrix_mult_kernelPiS_S_j
	.addrsig_sym _Z30tile_square_matrix_mult_kernelPiS_S_j
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z32normal_square_matrix_mult_kernelPiS_S_j ; -- Begin function _Z32normal_square_matrix_mult_kernelPiS_S_j
	.globl	_Z32normal_square_matrix_mult_kernelPiS_S_j
	.p2align	8
	.type	_Z32normal_square_matrix_mult_kernelPiS_S_j,@function
_Z32normal_square_matrix_mult_kernelPiS_S_j: ; @_Z32normal_square_matrix_mult_kernelPiS_S_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_u32_e32 v2, v0, v1
	v_cmpx_gt_u32_e64 s2, v2
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, v0
	v_mul_lo_u32 v8, v1, s2
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v5, v2
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v4, v2 :: v_dual_add_nc_u32 v1, s3, v8
	s_add_i32 s3, s3, 1
	s_cmp_eq_u32 s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_lshlrev_b64 v[9:10], 2, v[3:4]
	v_add_nc_u32_e32 v3, s2, v3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	global_load_b32 v1, v[6:7], off
	global_load_b32 v4, v[9:10], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v4, v1, v[5:6]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v5, v6
	s_cbranch_scc0 .LBB0_2
; %bb.3:
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z32normal_square_matrix_mult_kernelPiS_S_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z32normal_square_matrix_mult_kernelPiS_S_j, .Lfunc_end0-_Z32normal_square_matrix_mult_kernelPiS_S_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 320
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z30tile_square_matrix_mult_kernelPiS_S_j ; -- Begin function _Z30tile_square_matrix_mult_kernelPiS_S_j
	.globl	_Z30tile_square_matrix_mult_kernelPiS_S_j
	.p2align	8
	.type	_Z30tile_square_matrix_mult_kernelPiS_S_j,@function
_Z30tile_square_matrix_mult_kernelPiS_S_j: ; @_Z30tile_square_matrix_mult_kernelPiS_S_j
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_bfe_u32 v5, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, s15, 5, v5
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v4, v1, s2
	v_mov_b32_e32 v1, 0
	v_lshl_add_u32 v0, s14, 5, v2
	s_cmp_lt_u32 s2, 32
	s_cbranch_scc1 .LBB1_5
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v2
	v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v6, 7, v5
	v_add_nc_u32_e32 v8, v4, v2
	s_lshr_b32 s3, s2, 5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v7, 0x1000, v1
	v_add_nc_u32_e32 v9, v6, v1
	v_mov_b32_e32 v1, v3
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v10, v7, v6
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
	s_lshl_b32 s9, s8, 5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v13, s9, v5
	v_add_nc_u32_e32 v2, s9, v8
	s_mov_b32 s9, 0
	v_mad_u64_u32 v[11:12], null, v13, s2, v[0:1]
	v_mov_b32_e32 v12, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[13:14], 2, v[2:3]
	v_mov_b32_e32 v2, v7
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v13, vcc_lo, s4, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v9, v13
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_3:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v11, s9, v6
	s_add_i32 s9, s9, 4
	ds_load_b32 v13, v2
	ds_load_b32 v14, v11
	s_cmpk_lg_i32 s9, 0x80
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[11:12], null, v13, v14, v[1:2]
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v1, v11 :: v_dual_add_nc_u32 v2, 0x80, v2
	s_cbranch_scc1 .LBB1_3
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s8, s3
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_2
.LBB1_5:                                ; %._crit_edge
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v2, v4, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_store_b32 v[2:3], v1, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z30tile_square_matrix_mult_kernelPiS_S_j
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z30tile_square_matrix_mult_kernelPiS_S_j, .Lfunc_end1-_Z30tile_square_matrix_mult_kernelPiS_S_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 428
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z32normal_square_matrix_mult_kernelPiS_S_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z32normal_square_matrix_mult_kernelPiS_S_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z30tile_square_matrix_mult_kernelPiS_S_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z30tile_square_matrix_mult_kernelPiS_S_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
