#include "includes.h"
__global__ void sgemvn_kernel2_fermi(int n, int m, int n1, float alpha,  float* A, int lda, float *x, float *y)
{
int ind = blockIdx.x*num_threads + threadIdx.x;

A += ind;
x += threadIdx.x;

float res = 0.f;

__shared__ float buff[num_threads];
for(int i=0; i<n1; i += num_threads ){
__syncthreads();
buff[threadIdx.x]  = x[i];

__syncthreads();
#pragma unroll
for(int j=0; j < num_threads ; j++){
res+=A[0]*buff[j];
A+=lda;
}
}
#if 0
__syncthreads();

if (m>n1){
buff[threadIdx.x]  = x[n1];

__syncthreads();
for(int j=0; j<(m-n1); j++){
res += A[0]*buff[j];
A+=lda;
}
}
#endif

if (ind<n)
y[ind] = alpha * res;
}
	.file	"tmpxft_003ab4fd_00000000-6_sgemvn_kernel2_fermi.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z49__device_stub__Z20sgemvn_kernel2_fermiiiifPfiS_S_iiifPfiS_S_
	.type	_Z49__device_stub__Z20sgemvn_kernel2_fermiiiifPfiS_S_iiifPfiS_S_, @function
_Z49__device_stub__Z20sgemvn_kernel2_fermiiiifPfiS_S_iiifPfiS_S_:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 36(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 20(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movss	%xmm0, 32(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	%rsp, %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z20sgemvn_kernel2_fermiiiifPfiS_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z49__device_stub__Z20sgemvn_kernel2_fermiiiifPfiS_S_iiifPfiS_S_, .-_Z49__device_stub__Z20sgemvn_kernel2_fermiiiifPfiS_S_iiifPfiS_S_
	.globl	_Z20sgemvn_kernel2_fermiiiifPfiS_S_
	.type	_Z20sgemvn_kernel2_fermiiiifPfiS_S_, @function
_Z20sgemvn_kernel2_fermiiiifPfiS_S_:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z20sgemvn_kernel2_fermiiiifPfiS_S_iiifPfiS_S_
	.cfi_endproc
.LFE2033:
	.size	_Z20sgemvn_kernel2_fermiiiifPfiS_S_, .-_Z20sgemvn_kernel2_fermiiiifPfiS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z20sgemvn_kernel2_fermiiiifPfiS_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z20sgemvn_kernel2_fermiiiifPfiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void sgemvn_kernel2_fermi(int n, int m, int n1, float alpha,  float* A, int lda, float *x, float *y)
{
int ind = blockIdx.x*num_threads + threadIdx.x;

A += ind;
x += threadIdx.x;

float res = 0.f;

__shared__ float buff[num_threads];
for(int i=0; i<n1; i += num_threads ){
__syncthreads();
buff[threadIdx.x]  = x[i];

__syncthreads();
#pragma unroll
for(int j=0; j < num_threads ; j++){
res+=A[0]*buff[j];
A+=lda;
}
}
#if 0
__syncthreads();

if (m>n1){
buff[threadIdx.x]  = x[n1];

__syncthreads();
for(int j=0; j<(m-n1); j++){
res += A[0]*buff[j];
A+=lda;
}
}
#endif

if (ind<n)
y[ind] = alpha * res;
}
	.text
	.file	"sgemvn_kernel2_fermi.hip"
	.globl	_Z35__device_stub__sgemvn_kernel2_fermiiiifPfiS_S_ # -- Begin function _Z35__device_stub__sgemvn_kernel2_fermiiiifPfiS_S_
	.type	_Z35__device_stub__sgemvn_kernel2_fermiiiifPfiS_S_,@function
_Z35__device_stub__sgemvn_kernel2_fermiiiifPfiS_S_: # @_Z35__device_stub__sgemvn_kernel2_fermiiiifPfiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	28(%rsp), %rax
	movl	%edi, (%rax)
	leaq	24(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	20(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	16(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	56(%rsp), %r10
	movq	%rcx, (%r10)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	48(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r10, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20sgemvn_kernel2_fermiiiifPfiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z35__device_stub__sgemvn_kernel2_fermiiiifPfiS_S_, .Lfunc_end0-_Z35__device_stub__sgemvn_kernel2_fermiiiifPfiS_S_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20sgemvn_kernel2_fermiiiifPfiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z20sgemvn_kernel2_fermiiiifPfiS_S_,@object # @_Z20sgemvn_kernel2_fermiiiifPfiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z20sgemvn_kernel2_fermiiiifPfiS_S_
	.p2align	3, 0x0
_Z20sgemvn_kernel2_fermiiiifPfiS_S_:
	.quad	_Z35__device_stub__sgemvn_kernel2_fermiiiifPfiS_S_
	.size	_Z20sgemvn_kernel2_fermiiiifPfiS_S_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z20sgemvn_kernel2_fermiiiifPfiS_S_"
	.size	.L__unnamed_1, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__sgemvn_kernel2_fermiiiifPfiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z20sgemvn_kernel2_fermiiiifPfiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20sgemvn_kernel2_fermiiiifPfiS_S_ ; -- Begin function _Z20sgemvn_kernel2_fermiiiifPfiS_S_
	.globl	_Z20sgemvn_kernel2_fermiiiifPfiS_S_
	.p2align	8
	.type	_Z20sgemvn_kernel2_fermiiiifPfiS_S_,@function
_Z20sgemvn_kernel2_fermiiiifPfiS_S_:    ; @_Z20sgemvn_kernel2_fermiiiifPfiS_S_
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x8
	s_load_b128 s[4:7], s[0:1], 0x20
	v_lshl_add_u32 v3, s15, 7, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x18
	s_load_b64 s[10:11], s[0:1], 0x10
	v_dual_mov_b32 v9, 0 :: v_dual_lshlrev_b32 v8, 2, v0
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, s4, s4, v8
	v_add_co_ci_u32_e64 v5, null, s5, 0, s4
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s9, s8, 31
	v_add_co_u32 v6, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v2, vcc_lo
	s_lshl_b64 s[4:5], s[8:9], 2
	s_mov_b32 s8, 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_barrier
	buffer_gl0_inv
	global_load_b32 v66, v[4:5], off
	v_add_co_u32 v10, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v7, vcc_lo
	s_addk_i32 s8, 0x80
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, v10, s4
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v11, vcc_lo
	s_cmp_ge_i32 s8, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, v12, s4
	v_add_co_ci_u32_e32 v15, vcc_lo, s5, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v16, vcc_lo, v14, s4
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v16, s4
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, v18, s4
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v22, vcc_lo, v20, s4
	v_add_co_ci_u32_e32 v23, vcc_lo, s5, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v24, vcc_lo, v22, s4
	v_add_co_ci_u32_e32 v25, vcc_lo, s5, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v26, vcc_lo, v24, s4
	v_add_co_ci_u32_e32 v27, vcc_lo, s5, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v28, vcc_lo, v26, s4
	v_add_co_ci_u32_e32 v29, vcc_lo, s5, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v30, vcc_lo, v28, s4
	v_add_co_ci_u32_e32 v31, vcc_lo, s5, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v32, vcc_lo, v30, s4
	v_add_co_ci_u32_e32 v33, vcc_lo, s5, v31, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v34, vcc_lo, v32, s4
	v_add_co_ci_u32_e32 v35, vcc_lo, s5, v33, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v36, vcc_lo, v34, s4
	v_add_co_ci_u32_e32 v37, vcc_lo, s5, v35, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v38, vcc_lo, v36, s4
	v_add_co_ci_u32_e32 v39, vcc_lo, s5, v37, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v40, vcc_lo, v38, s4
	v_add_co_ci_u32_e32 v41, vcc_lo, s5, v39, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v42, vcc_lo, v40, s4
	v_add_co_ci_u32_e32 v43, vcc_lo, s5, v41, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v44, vcc_lo, v42, s4
	v_add_co_ci_u32_e32 v45, vcc_lo, s5, v43, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v46, vcc_lo, v44, s4
	v_add_co_ci_u32_e32 v47, vcc_lo, s5, v45, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v48, vcc_lo, v46, s4
	v_add_co_ci_u32_e32 v49, vcc_lo, s5, v47, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v50, vcc_lo, v48, s4
	v_add_co_ci_u32_e32 v51, vcc_lo, s5, v49, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v52, vcc_lo, v50, s4
	v_add_co_ci_u32_e32 v53, vcc_lo, s5, v51, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v54, vcc_lo, v52, s4
	v_add_co_ci_u32_e32 v55, vcc_lo, s5, v53, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v56, vcc_lo, v54, s4
	v_add_co_ci_u32_e32 v57, vcc_lo, s5, v55, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v58, vcc_lo, v56, s4
	v_add_co_ci_u32_e32 v59, vcc_lo, s5, v57, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v60, vcc_lo, v58, s4
	v_add_co_ci_u32_e32 v61, vcc_lo, s5, v59, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v62, vcc_lo, v60, s4
	v_add_co_ci_u32_e32 v63, vcc_lo, s5, v61, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v64, vcc_lo, v62, s4
	v_add_co_ci_u32_e32 v65, vcc_lo, s5, v63, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v74, vcc_lo, v64, s4
	v_add_co_ci_u32_e32 v75, vcc_lo, s5, v65, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v76, vcc_lo, v74, s4
	v_add_co_ci_u32_e32 v77, vcc_lo, s5, v75, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v78, vcc_lo, v76, s4
	v_add_co_ci_u32_e32 v79, vcc_lo, s5, v77, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v80, vcc_lo, v78, s4
	v_add_co_ci_u32_e32 v81, vcc_lo, s5, v79, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v82, vcc_lo, v80, s4
	v_add_co_ci_u32_e32 v83, vcc_lo, s5, v81, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v84, vcc_lo, v82, s4
	v_add_co_ci_u32_e32 v85, vcc_lo, s5, v83, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v86, vcc_lo, v84, s4
	v_add_co_ci_u32_e32 v87, vcc_lo, s5, v85, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v88, vcc_lo, v86, s4
	v_add_co_ci_u32_e32 v89, vcc_lo, s5, v87, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v90, vcc_lo, v88, s4
	v_add_co_ci_u32_e32 v91, vcc_lo, s5, v89, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v92, vcc_lo, v90, s4
	v_add_co_ci_u32_e32 v93, vcc_lo, s5, v91, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v94, vcc_lo, v92, s4
	v_add_co_ci_u32_e32 v95, vcc_lo, s5, v93, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v96, vcc_lo, v94, s4
	v_add_co_ci_u32_e32 v97, vcc_lo, s5, v95, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v98, vcc_lo, v96, s4
	v_add_co_ci_u32_e32 v99, vcc_lo, s5, v97, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v100, vcc_lo, v98, s4
	v_add_co_ci_u32_e32 v101, vcc_lo, s5, v99, vcc_lo
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v66
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_clause 0x6
	global_load_b32 v68, v[6:7], off
	global_load_b32 v71, v[10:11], off
	global_load_b32 v116, v[12:13], off
	global_load_b32 v117, v[14:15], off
	global_load_b32 v118, v[16:17], off
	global_load_b32 v119, v[18:19], off
	global_load_b32 v120, v[20:21], off
	global_load_b32 v121, v[22:23], off
	global_load_b32 v122, v[24:25], off
	global_load_b32 v123, v[26:27], off
	global_load_b32 v124, v[28:29], off
	global_load_b32 v125, v[30:31], off
	global_load_b32 v126, v[32:33], off
	global_load_b32 v127, v[34:35], off
	global_load_b32 v128, v[36:37], off
	global_load_b32 v129, v[38:39], off
	global_load_b32 v130, v[40:41], off
	global_load_b32 v131, v[42:43], off
	global_load_b32 v132, v[44:45], off
	global_load_b32 v133, v[46:47], off
	global_load_b32 v73, v[48:49], off
	global_load_b32 v134, v[50:51], off
	global_load_b32 v135, v[52:53], off
	global_load_b32 v136, v[54:55], off
	global_load_b32 v67, v[56:57], off
	global_load_b32 v69, v[58:59], off
	global_load_b32 v70, v[60:61], off
	global_load_b32 v72, v[62:63], off
	global_load_b32 v61, v[64:65], off
	global_load_b32 v63, v[74:75], off
	global_load_b32 v64, v[76:77], off
	global_load_b32 v66, v[78:79], off
	global_load_b32 v55, v[80:81], off
	global_load_b32 v57, v[82:83], off
	global_load_b32 v58, v[84:85], off
	global_load_b32 v59, v[86:87], off
	global_load_b32 v48, v[88:89], off
	v_add_co_u32 v6, vcc_lo, v100, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v101, vcc_lo
	global_load_b32 v50, v[90:91], off
	global_load_b32 v51, v[92:93], off
	v_add_co_u32 v10, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v53, v[94:95], off
	global_load_b32 v42, v[96:97], off
	v_add_co_u32 v12, vcc_lo, v10, s4
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v11, vcc_lo
	global_load_b32 v44, v[98:99], off
	global_load_b32 v45, v[100:101], off
	v_add_co_u32 v14, vcc_lo, v12, s4
	v_add_co_ci_u32_e32 v15, vcc_lo, s5, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v16, vcc_lo, v14, s4
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v16, s4
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, v18, s4
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v22, vcc_lo, v20, s4
	v_add_co_ci_u32_e32 v23, vcc_lo, s5, v21, vcc_lo
	global_load_b32 v47, v[6:7], off
	global_load_b32 v37, v[10:11], off
	global_load_b32 v38, v[12:13], off
	global_load_b32 v39, v[14:15], off
	global_load_b32 v35, v[16:17], off
	global_load_b32 v27, v[18:19], off
	global_load_b32 v28, v[20:21], off
	global_load_b32 v29, v[22:23], off
	v_add_co_u32 v24, vcc_lo, v22, s4
	v_add_co_ci_u32_e32 v25, vcc_lo, s5, v23, vcc_lo
	ds_load_b128 v[74:77], v9
	ds_load_b128 v[78:81], v9 offset:16
	v_add_co_u32 v32, vcc_lo, v24, s4
	v_add_co_ci_u32_e32 v33, vcc_lo, s5, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v40, vcc_lo, v32, s4
	v_add_co_ci_u32_e32 v41, vcc_lo, s5, v33, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v102, vcc_lo, v40, s4
	v_add_co_ci_u32_e32 v103, vcc_lo, s5, v41, vcc_lo
	global_load_b32 v31, v[24:25], off
	global_load_b32 v23, v[32:33], off
	global_load_b32 v22, v[40:41], off
	global_load_b32 v21, v[102:103], off
	v_add_co_u32 v104, vcc_lo, v102, s4
	v_add_co_ci_u32_e32 v105, vcc_lo, s5, v103, vcc_lo
	ds_load_b128 v[82:85], v9 offset:32
	v_add_co_u32 v106, vcc_lo, v104, s4
	v_add_co_ci_u32_e32 v107, vcc_lo, s5, v105, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v108, vcc_lo, v106, s4
	v_add_co_ci_u32_e32 v109, vcc_lo, s5, v107, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v110, vcc_lo, v108, s4
	v_add_co_ci_u32_e32 v111, vcc_lo, s5, v109, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v112, vcc_lo, v110, s4
	v_add_co_ci_u32_e32 v113, vcc_lo, s5, v111, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v114, vcc_lo, v112, s4
	v_add_co_ci_u32_e32 v115, vcc_lo, s5, v113, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v86, vcc_lo, v114, s4
	v_add_co_ci_u32_e32 v87, vcc_lo, s5, v115, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v88, vcc_lo, v86, s4
	v_add_co_ci_u32_e32 v89, vcc_lo, s5, v87, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v90, vcc_lo, v88, s4
	v_add_co_ci_u32_e32 v91, vcc_lo, s5, v89, vcc_lo
	global_load_b32 v20, v[104:105], off
	global_load_b32 v18, v[106:107], off
	global_load_b32 v17, v[108:109], off
	global_load_b32 v15, v[110:111], off
	global_load_b32 v14, v[112:113], off
	global_load_b32 v12, v[114:115], off
	global_load_b32 v10, v[86:87], off
	global_load_b32 v7, v[88:89], off
	global_load_b32 v6, v[90:91], off
	v_add_co_u32 v92, vcc_lo, v90, s4
	v_add_co_ci_u32_e32 v93, vcc_lo, s5, v91, vcc_lo
	ds_load_b128 v[86:89], v9 offset:48
	v_add_co_u32 v24, vcc_lo, v92, s4
	v_add_co_ci_u32_e32 v25, vcc_lo, s5, v93, vcc_lo
	global_load_b32 v11, v[92:93], off
	v_add_co_u32 v32, vcc_lo, v24, s4
	v_add_co_ci_u32_e32 v33, vcc_lo, s5, v25, vcc_lo
	global_load_b32 v13, v[24:25], off
	v_add_co_u32 v24, vcc_lo, v32, s4
	v_add_co_ci_u32_e32 v25, vcc_lo, s5, v33, vcc_lo
	global_load_b32 v16, v[32:33], off
	v_add_co_u32 v32, vcc_lo, v24, s4
	v_add_co_ci_u32_e32 v33, vcc_lo, s5, v25, vcc_lo
	global_load_b32 v19, v[24:25], off
	v_add_co_u32 v25, vcc_lo, v32, s4
	v_add_co_ci_u32_e32 v26, vcc_lo, s5, v33, vcc_lo
	global_load_b32 v24, v[32:33], off
	v_add_co_u32 v32, vcc_lo, v25, s4
	v_add_co_ci_u32_e32 v33, vcc_lo, s5, v26, vcc_lo
	global_load_b32 v25, v[25:26], off
	v_add_co_u32 v40, vcc_lo, v32, s4
	v_add_co_ci_u32_e32 v41, vcc_lo, s5, v33, vcc_lo
	global_load_b32 v26, v[32:33], off
	v_add_co_u32 v32, vcc_lo, v40, s4
	v_add_co_ci_u32_e32 v33, vcc_lo, s5, v41, vcc_lo
	global_load_b32 v30, v[40:41], off
	v_add_co_u32 v40, vcc_lo, v32, s4
	v_add_co_ci_u32_e32 v41, vcc_lo, s5, v33, vcc_lo
	global_load_b32 v32, v[32:33], off
	global_load_b32 v33, v[40:41], off
	s_waitcnt vmcnt(62) lgkmcnt(3)
	v_fmac_f32_e32 v0, v68, v74
	v_add_co_u32 v74, vcc_lo, v40, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v0, v71, v75
	v_add_co_ci_u32_e32 v75, vcc_lo, s5, v41, vcc_lo
	v_add_co_u32 v40, vcc_lo, v74, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v0, v116, v76
	v_add_co_ci_u32_e32 v41, vcc_lo, s5, v75, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v90, vcc_lo, v40, s4
	v_fmac_f32_e32 v0, v117, v77
	global_load_b32 v34, v[74:75], off
	ds_load_b128 v[74:77], v9 offset:64
	v_add_co_ci_u32_e32 v91, vcc_lo, s5, v41, vcc_lo
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v0, v118, v78
	v_add_co_u32 v78, vcc_lo, v90, s4
	global_load_b32 v36, v[40:41], off
	global_load_b32 v40, v[90:91], off
	v_fmac_f32_e32 v0, v119, v79
	v_add_co_ci_u32_e32 v79, vcc_lo, s5, v91, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_fmac_f32_e32 v0, v120, v80
	v_add_co_u32 v80, vcc_lo, v78, s4
	global_load_b32 v41, v[78:79], off
	v_fmac_f32_e32 v0, v121, v81
	v_add_co_ci_u32_e32 v81, vcc_lo, s5, v79, vcc_lo
	v_add_co_u32 v78, vcc_lo, v80, s4
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v0, v122, v82
	v_add_co_ci_u32_e32 v79, vcc_lo, s5, v81, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v90, vcc_lo, v78, s4
	v_fmac_f32_e32 v0, v123, v83
	global_load_b32 v43, v[80:81], off
	v_add_co_ci_u32_e32 v91, vcc_lo, s5, v79, vcc_lo
	v_add_co_u32 v82, vcc_lo, v90, s4
	v_fmac_f32_e32 v0, v124, v84
	global_load_b32 v46, v[78:79], off
	v_add_co_ci_u32_e32 v83, vcc_lo, s5, v91, vcc_lo
	v_add_co_u32 v84, vcc_lo, v82, s4
	v_fmac_f32_e32 v0, v125, v85
	ds_load_b128 v[78:81], v9 offset:80
	global_load_b32 v49, v[90:91], off
	v_add_co_ci_u32_e32 v85, vcc_lo, s5, v83, vcc_lo
	s_waitcnt vmcnt(62) lgkmcnt(2)
	v_fmac_f32_e32 v0, v126, v86
	global_load_b32 v52, v[82:83], off
	v_add_co_u32 v82, vcc_lo, v84, s4
	v_add_co_ci_u32_e32 v83, vcc_lo, s5, v85, vcc_lo
	v_fmac_f32_e32 v0, v127, v87
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v90, vcc_lo, v82, s4
	global_load_b32 v54, v[84:85], off
	v_add_co_ci_u32_e32 v91, vcc_lo, s5, v83, vcc_lo
	v_fmac_f32_e32 v0, v128, v88
	v_add_co_u32 v86, vcc_lo, v90, s4
	global_load_b32 v56, v[82:83], off
	ds_load_b128 v[82:85], v9 offset:96
	v_fmac_f32_e32 v0, v129, v89
	v_add_co_ci_u32_e32 v87, vcc_lo, s5, v91, vcc_lo
	v_add_co_u32 v88, vcc_lo, v86, s4
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v0, v130, v74
	global_load_b32 v60, v[90:91], off
	v_add_co_ci_u32_e32 v89, vcc_lo, s5, v87, vcc_lo
	global_load_b32 v62, v[86:87], off
	v_fmac_f32_e32 v0, v131, v75
	v_add_co_u32 v86, vcc_lo, v88, s4
	v_add_co_ci_u32_e32 v87, vcc_lo, s5, v89, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v0, v132, v76
	v_add_co_u32 v90, vcc_lo, v86, s4
	global_load_b32 v65, v[88:89], off
	v_add_co_ci_u32_e32 v91, vcc_lo, s5, v87, vcc_lo
	s_waitcnt vmcnt(62)
	v_fmac_f32_e32 v0, v133, v77
	v_add_co_u32 v74, vcc_lo, v90, s4
	global_load_b32 v68, v[86:87], off
	v_add_co_ci_u32_e32 v75, vcc_lo, s5, v91, vcc_lo
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v0, v73, v78
	v_add_co_u32 v76, vcc_lo, v74, s4
	ds_load_b128 v[86:89], v9 offset:112
	global_load_b32 v71, v[90:91], off
	v_fmac_f32_e32 v0, v134, v79
	v_add_co_ci_u32_e32 v77, vcc_lo, s5, v75, vcc_lo
	v_add_co_u32 v90, vcc_lo, v76, s4
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v0, v135, v80
	global_load_b32 v74, v[74:75], off
	v_add_co_ci_u32_e32 v91, vcc_lo, s5, v77, vcc_lo
	v_add_co_u32 v92, vcc_lo, v90, s4
	v_fmac_f32_e32 v0, v136, v81
	global_load_b32 v94, v[76:77], off
	ds_load_b128 v[75:78], v9 offset:128
	v_add_co_ci_u32_e32 v93, vcc_lo, s5, v91, vcc_lo
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v0, v67, v82
	v_add_co_u32 v79, vcc_lo, v92, s4
	global_load_b32 v95, v[90:91], off
	v_add_co_ci_u32_e32 v80, vcc_lo, s5, v93, vcc_lo
	s_waitcnt vmcnt(62)
	v_fmac_f32_e32 v0, v69, v83
	v_add_co_u32 v90, vcc_lo, v79, s4
	global_load_b32 v92, v[92:93], off
	v_add_co_ci_u32_e32 v91, vcc_lo, s5, v80, vcc_lo
	v_fmac_f32_e32 v0, v70, v84
	global_load_b32 v93, v[79:80], off
	v_add_co_u32 v79, vcc_lo, v90, s4
	v_add_co_ci_u32_e32 v80, vcc_lo, s5, v91, vcc_lo
	v_fmac_f32_e32 v0, v72, v85
	global_load_b32 v96, v[90:91], off
	v_add_co_u32 v90, vcc_lo, v79, s4
	v_add_co_ci_u32_e32 v91, vcc_lo, s5, v80, vcc_lo
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v0, v61, v86
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v69, vcc_lo, v90, s4
	global_load_b32 v97, v[79:80], off
	v_add_co_ci_u32_e32 v70, vcc_lo, s5, v91, vcc_lo
	v_fmac_f32_e32 v0, v63, v87
	v_add_co_u32 v72, vcc_lo, v69, s4
	ds_load_b128 v[79:82], v9 offset:144
	ds_load_b128 v[83:86], v9 offset:160
	s_waitcnt vmcnt(62)
	v_fmac_f32_e32 v0, v64, v88
	global_load_b32 v91, v[90:91], off
	v_add_co_ci_u32_e32 v73, vcc_lo, s5, v70, vcc_lo
	global_load_b32 v98, v[69:70], off
	v_fmac_f32_e32 v0, v66, v89
	v_add_co_u32 v69, vcc_lo, v72, s4
	v_add_co_ci_u32_e32 v70, vcc_lo, s5, v73, vcc_lo
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v0, v55, v75
	global_load_b32 v99, v[72:73], off
	v_add_co_u32 v72, vcc_lo, v69, s4
	v_add_co_ci_u32_e32 v73, vcc_lo, s5, v70, vcc_lo
	v_fmac_f32_e32 v0, v57, v76
	v_add_co_u32 v63, vcc_lo, v72, s4
	global_load_b32 v69, v[69:70], off
	v_add_co_ci_u32_e32 v64, vcc_lo, s5, v73, vcc_lo
	s_waitcnt vmcnt(62)
	v_fmac_f32_e32 v0, v58, v77
	v_add_co_u32 v66, vcc_lo, v63, s4
	global_load_b32 v61, v[72:73], off
	v_add_co_ci_u32_e32 v67, vcc_lo, s5, v64, vcc_lo
	v_fmac_f32_e32 v0, v59, v78
	global_load_b32 v70, v[63:64], off
	v_add_co_u32 v63, vcc_lo, v66, s4
	v_add_co_ci_u32_e32 v64, vcc_lo, s5, v67, vcc_lo
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v0, v48, v79
	global_load_b32 v72, v[66:67], off
	v_add_co_u32 v66, vcc_lo, v63, s4
	v_add_co_ci_u32_e32 v67, vcc_lo, s5, v64, vcc_lo
	v_fmac_f32_e32 v0, v50, v80
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v57, vcc_lo, v66, s4
	global_load_b32 v73, v[63:64], off
	v_add_co_ci_u32_e32 v58, vcc_lo, s5, v67, vcc_lo
	s_waitcnt vmcnt(62)
	v_fmac_f32_e32 v0, v51, v81
	v_add_co_u32 v63, vcc_lo, v57, s4
	ds_load_b128 v[87:90], v9 offset:176
	ds_load_b128 v[75:78], v9 offset:192
	v_fmac_f32_e32 v0, v53, v82
	global_load_b32 v55, v[66:67], off
	v_add_co_ci_u32_e32 v64, vcc_lo, s5, v58, vcc_lo
	global_load_b32 v59, v[57:58], off
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v0, v42, v83
	v_add_co_u32 v57, vcc_lo, v63, s4
	v_add_co_ci_u32_e32 v58, vcc_lo, s5, v64, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v0, v44, v84
	global_load_b32 v66, v[63:64], off
	v_add_co_u32 v63, vcc_lo, v57, s4
	v_add_co_ci_u32_e32 v64, vcc_lo, s5, v58, vcc_lo
	s_waitcnt vmcnt(62)
	v_fmac_f32_e32 v0, v45, v85
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v50, vcc_lo, v63, s4
	global_load_b32 v67, v[57:58], off
	v_add_co_ci_u32_e32 v51, vcc_lo, s5, v64, vcc_lo
	v_fmac_f32_e32 v0, v47, v86
	v_add_co_u32 v57, vcc_lo, v50, s4
	global_load_b32 v53, v[63:64], off
	v_add_co_ci_u32_e32 v58, vcc_lo, s5, v51, vcc_lo
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v0, v37, v87
	global_load_b32 v63, v[50:51], off
	v_add_co_u32 v50, vcc_lo, v57, s4
	v_add_co_ci_u32_e32 v51, vcc_lo, s5, v58, vcc_lo
	s_waitcnt vmcnt(62)
	v_fmac_f32_e32 v0, v38, v88
	global_load_b32 v64, v[57:58], off
	v_add_co_u32 v57, vcc_lo, v50, s4
	v_add_co_ci_u32_e32 v58, vcc_lo, s5, v51, vcc_lo
	v_fmac_f32_e32 v0, v39, v89
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v44, vcc_lo, v57, s4
	global_load_b32 v50, v[50:51], off
	v_add_co_ci_u32_e32 v45, vcc_lo, s5, v58, vcc_lo
	v_fmac_f32_e32 v0, v35, v90
	v_add_co_u32 v47, vcc_lo, v44, s4
	ds_load_b128 v[79:82], v9 offset:208
	ds_load_b128 v[83:86], v9 offset:224
	global_load_b32 v42, v[57:58], off
	s_waitcnt vmcnt(62) lgkmcnt(2)
	v_fmac_f32_e32 v0, v27, v75
	v_add_co_ci_u32_e32 v48, vcc_lo, s5, v45, vcc_lo
	global_load_b32 v51, v[44:45], off
	v_add_co_u32 v44, vcc_lo, v47, s4
	v_fmac_f32_e32 v0, v28, v76
	v_add_co_ci_u32_e32 v45, vcc_lo, s5, v48, vcc_lo
	global_load_b32 v57, v[47:48], off
	v_add_co_u32 v47, vcc_lo, v44, s4
	v_fmac_f32_e32 v0, v29, v77
	v_add_co_ci_u32_e32 v48, vcc_lo, s5, v45, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v37, vcc_lo, v47, s4
	global_load_b32 v58, v[44:45], off
	s_waitcnt vmcnt(62)
	v_fmac_f32_e32 v0, v31, v78
	v_add_co_ci_u32_e32 v38, vcc_lo, s5, v48, vcc_lo
	v_add_co_u32 v44, vcc_lo, v37, s4
	global_load_b32 v35, v[47:48], off
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v0, v23, v79
	v_add_co_ci_u32_e32 v45, vcc_lo, s5, v38, vcc_lo
	global_load_b32 v39, v[37:38], off
	v_add_co_u32 v37, vcc_lo, v44, s4
	v_fmac_f32_e32 v0, v22, v80
	v_add_co_ci_u32_e32 v38, vcc_lo, s5, v45, vcc_lo
	global_load_b32 v47, v[44:45], off
	v_add_co_u32 v44, vcc_lo, v37, s4
	s_waitcnt vmcnt(62)
	v_fmac_f32_e32 v0, v21, v81
	v_add_co_ci_u32_e32 v45, vcc_lo, s5, v38, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v27, vcc_lo, v44, s4
	global_load_b32 v48, v[37:38], off
	v_fmac_f32_e32 v0, v20, v82
	v_add_co_ci_u32_e32 v28, vcc_lo, s5, v45, vcc_lo
	v_add_co_u32 v37, vcc_lo, v27, s4
	ds_load_b128 v[87:90], v9 offset:240
	global_load_b32 v29, v[44:45], off
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v0, v18, v83
	v_add_co_ci_u32_e32 v38, vcc_lo, s5, v28, vcc_lo
	global_load_b32 v31, v[27:28], off
	global_load_b32 v44, v[37:38], off
	v_add_co_u32 v27, vcc_lo, v37, s4
	s_waitcnt vmcnt(62)
	v_fmac_f32_e32 v0, v17, v84
	v_add_co_ci_u32_e32 v28, vcc_lo, s5, v38, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v20, vcc_lo, v27, s4
	v_fmac_f32_e32 v0, v15, v85
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v28, vcc_lo
	global_load_b32 v37, v[27:28], off
	v_add_co_u32 v17, vcc_lo, v20, s4
	v_fmac_f32_e32 v0, v14, v86
	v_add_co_ci_u32_e32 v18, vcc_lo, s5, v21, vcc_lo
	ds_load_b128 v[75:78], v9 offset:256
	global_load_b32 v38, v[20:21], off
	v_add_co_u32 v14, vcc_lo, v17, s4
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v0, v12, v87
	v_add_co_ci_u32_e32 v15, vcc_lo, s5, v18, vcc_lo
	global_load_b32 v18, v[17:18], off
	global_load_b32 v45, v[14:15], off
	s_waitcnt vmcnt(62)
	v_fmac_f32_e32 v0, v10, v88
	v_add_co_u32 v27, vcc_lo, v14, s4
	v_add_co_ci_u32_e32 v28, vcc_lo, s5, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v0, v7, v89
	ds_load_b128 v[20:23], v9 offset:272
	v_add_co_u32 v4, vcc_lo, 0x200, v4
	global_load_b32 v79, v[27:28], off
	v_fmac_f32_e32 v0, v6, v90
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, v27, s4
	s_waitcnt lgkmcnt(1)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v0, v11, v75
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v28, vcc_lo
	s_waitcnt vmcnt(62)
	v_fmac_f32_e32 v0, v13, v76
	ds_load_b128 v[10:13], v9 offset:288
	s_waitcnt vmcnt(61)
	v_fmac_f32_e32 v0, v16, v77
	ds_load_b128 v[14:17], v9 offset:304
	s_waitcnt vmcnt(60)
	v_fmac_f32_e32 v0, v19, v78
	s_waitcnt vmcnt(59) lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v24, v20
	s_waitcnt vmcnt(58)
	v_fmac_f32_e32 v0, v25, v21
	s_waitcnt vmcnt(57)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v26, v22
	s_waitcnt vmcnt(56)
	v_fmac_f32_e32 v0, v30, v23
	s_waitcnt vmcnt(55) lgkmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v32, v10
	s_waitcnt vmcnt(54)
	v_fmac_f32_e32 v0, v33, v11
	s_waitcnt vmcnt(53)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v34, v12
	s_waitcnt vmcnt(52)
	v_fmac_f32_e32 v0, v36, v13
	ds_load_b128 v[10:13], v9 offset:320
	s_waitcnt vmcnt(51) lgkmcnt(1)
	v_fmac_f32_e32 v0, v40, v14
	s_waitcnt vmcnt(50)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v41, v15
	s_waitcnt vmcnt(49)
	v_fmac_f32_e32 v0, v43, v16
	s_waitcnt vmcnt(48)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v46, v17
	ds_load_b128 v[14:17], v9 offset:336
	s_waitcnt vmcnt(47) lgkmcnt(1)
	v_fmac_f32_e32 v0, v49, v10
	s_waitcnt vmcnt(46)
	v_fmac_f32_e32 v0, v52, v11
	s_waitcnt vmcnt(45)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v54, v12
	s_waitcnt vmcnt(44)
	v_fmac_f32_e32 v0, v56, v13
	ds_load_b128 v[10:13], v9 offset:352
	s_waitcnt vmcnt(43) lgkmcnt(1)
	v_fmac_f32_e32 v0, v60, v14
	s_waitcnt vmcnt(42)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v62, v15
	s_waitcnt vmcnt(41)
	v_fmac_f32_e32 v0, v65, v16
	s_waitcnt vmcnt(40)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v68, v17
	ds_load_b128 v[14:17], v9 offset:368
	s_waitcnt vmcnt(39) lgkmcnt(1)
	v_fmac_f32_e32 v0, v71, v10
	s_waitcnt vmcnt(38)
	v_fmac_f32_e32 v0, v74, v11
	s_waitcnt vmcnt(37)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v94, v12
	s_waitcnt vmcnt(36)
	v_fmac_f32_e32 v0, v95, v13
	ds_load_b128 v[10:13], v9 offset:384
	s_waitcnt vmcnt(35) lgkmcnt(1)
	v_fmac_f32_e32 v0, v92, v14
	s_waitcnt vmcnt(34)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v93, v15
	s_waitcnt vmcnt(33)
	v_fmac_f32_e32 v0, v96, v16
	s_waitcnt vmcnt(32)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v97, v17
	ds_load_b128 v[14:17], v9 offset:400
	s_waitcnt vmcnt(31) lgkmcnt(1)
	v_fmac_f32_e32 v0, v91, v10
	s_waitcnt vmcnt(30)
	v_fmac_f32_e32 v0, v98, v11
	s_waitcnt vmcnt(29)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v99, v12
	s_waitcnt vmcnt(28)
	v_fmac_f32_e32 v0, v69, v13
	ds_load_b128 v[10:13], v9 offset:416
	s_waitcnt vmcnt(27) lgkmcnt(1)
	v_fmac_f32_e32 v0, v61, v14
	s_waitcnt vmcnt(26)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v70, v15
	s_waitcnt vmcnt(25)
	v_fmac_f32_e32 v0, v72, v16
	s_waitcnt vmcnt(24)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v73, v17
	ds_load_b128 v[14:17], v9 offset:432
	s_waitcnt vmcnt(23) lgkmcnt(1)
	v_fmac_f32_e32 v0, v55, v10
	s_waitcnt vmcnt(22)
	v_fmac_f32_e32 v0, v59, v11
	s_waitcnt vmcnt(21)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v66, v12
	s_waitcnt vmcnt(20)
	v_fmac_f32_e32 v0, v67, v13
	ds_load_b128 v[10:13], v9 offset:448
	s_waitcnt vmcnt(19) lgkmcnt(1)
	v_fmac_f32_e32 v0, v53, v14
	s_waitcnt vmcnt(18)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v63, v15
	s_waitcnt vmcnt(17)
	v_fmac_f32_e32 v0, v64, v16
	s_waitcnt vmcnt(16)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v50, v17
	ds_load_b128 v[14:17], v9 offset:464
	s_waitcnt vmcnt(15) lgkmcnt(1)
	v_fmac_f32_e32 v0, v42, v10
	s_waitcnt vmcnt(14)
	v_fmac_f32_e32 v0, v51, v11
	s_waitcnt vmcnt(13)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v57, v12
	s_waitcnt vmcnt(12)
	v_fmac_f32_e32 v0, v58, v13
	ds_load_b128 v[10:13], v9 offset:480
	s_waitcnt vmcnt(11) lgkmcnt(1)
	v_fmac_f32_e32 v0, v35, v14
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v39, v15
	s_waitcnt vmcnt(9)
	v_fmac_f32_e32 v0, v47, v16
	s_waitcnt vmcnt(8)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v48, v17
	ds_load_b128 v[14:17], v9 offset:496
	s_waitcnt vmcnt(7) lgkmcnt(1)
	v_fmac_f32_e32 v0, v29, v10
	s_waitcnt vmcnt(6)
	v_fmac_f32_e32 v0, v31, v11
	s_waitcnt vmcnt(5)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v44, v12
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v0, v37, v13
	s_waitcnt vmcnt(3) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v38, v14
	s_waitcnt vmcnt(2)
	v_fmac_f32_e32 v0, v18, v15
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v45, v16
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v0, v79, v17
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_4
.LBB0_3:
	v_mov_b32_e32 v0, 0
.LBB0_4:                                ; %Flow181
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s0, v3
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_6
; %bb.5:
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	v_mul_f32_e32 v0, s3, v0
	global_store_b32 v[1:2], v0, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20sgemvn_kernel2_fermiiiifPfiS_S_
		.amdhsa_group_segment_fixed_size 512
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 137
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20sgemvn_kernel2_fermiiiifPfiS_S_, .Lfunc_end0-_Z20sgemvn_kernel2_fermiiiifPfiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4376
; NumSgprs: 18
; NumVgprs: 137
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 512 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 17
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 137
; Occupancy: 10
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 512
    .kernarg_segment_align: 8
    .kernarg_segment_size: 48
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20sgemvn_kernel2_fermiiiifPfiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20sgemvn_kernel2_fermiiiifPfiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     137
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
