#include <cuda_runtime.h>
#include <cstdio>
#include <cstdlib>
#include <ctime>
#include <iostream>
#define THREAD_SIZE 256
using namespace std;


void matgen(float* a, int lda, int n) {
	for (int i = 0; i < n; ++i) {
		for (int j = 0; j < n; ++j) {
			a[i * lda + j] = (float)rand() / RAND_MAX +
				(float)rand() / (RAND_MAX * RAND_MAX);
		}
		//printf("%.2f\n", a[i]);
	}
}

void matmult(const float* a, int lda, const float* b, int ldb, float* c, int ldc, int n) {
	int i, j, k;
	for (int i = 0; i < n; ++i) {
		for (int j = 0; j < n; ++j) {
			double t = 0;
			for (int k = 0; k < n; ++k) {
				t += a[i * lda + k] * b[k * ldb + j];
			}
			c[i * ldc + j] = t;
		}
	}
}

void compare_mat(const float* a, int lda, const float* b, int ldb, int n) {
	float max_err = 0;
	float average_err = 0;
	for (int i = 0; i < n; ++i){
		for (int j = 0; j < n; ++j) {
			if (b[i * ldb + j] != 0) {
				float err = fabs((a[i * lda + j] - b[i * ldb + j]) / b[i * ldb + j]);
				//printf("%.2f\n", max_err);
				if (max_err < err) max_err = err;
				average_err += err;
			}
		}
	}
	printf("max_err : %f, average_err: %.2f\n", max_err, average_err);
}


__global__ static void matMultCUDA(const float* a, size_t lda,
	const float* b, size_t ldb, float* c, size_t ldc, int n) {
	extern __shared__ float data[];
	const int tid = threadIdx.x;
	const int row = blockIdx.x;
	int i, j;
	for (i = tid; i < n; i += blockDim.x) {
		data[i] = a[row * lda + i];
	}
	__syncthreads();
	for (j = tid; j < n; j += blockDim.x) {
		float t = 0;
		float y = 0;
		for (i = 0; i < n; ++i) {
			float r;
			y -= data[i] * b[i * ldb + j];
			r = t - y;
			y = (r - t) + y;
			t = r;
		}
		c[row * ldc + j] = t;
	}
}

clock_t matmultCUDA(const float* a, int lda,
	const float* b, int ldb, float*c, int ldc, int n) {
	float *ac, *bc, *cc;
	clock_t start, end;
	start = clock();
	size_t pitch_a, pitch_b, pitch_c;
	cudaMallocPitch((void**)&ac, &pitch_a, sizeof(float)* n, n);
	cudaMallocPitch((void**)&bc, &pitch_b, sizeof(float)* n, n);
	cudaMallocPitch((void**)&cc, &pitch_c, sizeof(float)* n, n);
	cudaMemcpy2D(ac, pitch_a, a, sizeof(float)* lda, sizeof(float)* n, n, cudaMemcpyHostToDevice);
	cudaMemcpy2D(bc, pitch_b, b, sizeof(float)* ldb, sizeof(float)* n, n, cudaMemcpyHostToDevice);

	int blocks = (n + THREAD_SIZE - 1) / THREAD_SIZE;
	matMultCUDA<<<n, THREAD_SIZE, sizeof(float) * n >>>
		(ac, pitch_a / sizeof(float), bc, pitch_b / sizeof(float), cc, pitch_c / sizeof(float), n);
	cudaMemcpy2D(c, sizeof(float)* n, cc, pitch_c, sizeof(float) * n, n, cudaMemcpyDeviceToHost);
	cudaFree(ac);
	cudaFree(bc);
	cudaFree(cc);
	end = clock();
	return end - start;

}
int main(int argc, char** argv) {
	float *a, *b, *c, *d;
	const int n = 1000;
	a = (float*)malloc(sizeof(float)* n * n);
	b = (float*)malloc(sizeof(float)* n * n);
	c = (float*)malloc(sizeof(float)* n * n);
	d = (float*)malloc(sizeof(float)* n * n);
	srand(10);
	matgen(a, n, n);
	matgen(b, n, n);
	clock_t time = matmultCUDA(a, n, b, n, c, n, n);

	matmult(a, n, b, n, d, n, n);
	compare_mat(c, n, d, n, n);

	double sec = (double)time / CLOCKS_PER_SEC;
	printf("Time used: %.2f  (%.2lf GFLOATS)\n", sec, 2.0 * n * n * n / (sec * 1e9));
	system("pause");
	return 0;
}
	.file	"tmpxft_002538d2_00000000-6_DemoSharedMat.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3642:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3642:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL41__device_stub__Z11matMultCUDAPKfmS0_mPfmiPKfmS0_mPfmi, @function
_ZL41__device_stub__Z11matMultCUDAPKfmS0_mPfmiPKfmS0_mPfmi:
.LFB3664:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movq	%rsp, %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_ZL11matMultCUDAPKfmS0_mPfmi(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_ZL41__device_stub__Z11matMultCUDAPKfmS0_mPfmiPKfmS0_mPfmi, .-_ZL41__device_stub__Z11matMultCUDAPKfmS0_mPfmiPKfmS0_mPfmi
	.type	_ZL11matMultCUDAPKfmS0_mPfmi, @function
_ZL11matMultCUDAPKfmS0_mPfmi:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_ZL41__device_stub__Z11matMultCUDAPKfmS0_mPfmiPKfmS0_mPfmi
	.cfi_endproc
.LFE3665:
	.size	_ZL11matMultCUDAPKfmS0_mPfmi, .-_ZL11matMultCUDAPKfmS0_mPfmi
	.globl	_Z6matgenPfii
	.type	_Z6matgenPfii, @function
_Z6matgenPfii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%esi, %rsi
	movslq	%edx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	0(,%rsi,4), %rax
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r15, %r12
	salq	$2, %r15
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%rax, 8(%rsp)
.L9:
	cmpl	%r12d, %r14d
	jge	.L14
	leaq	(%rbx,%r15), %rbp
	movq	%rbx, %r13
.L10:
	call	rand@PLT
	addq	$4, %r13
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, 4(%rsp)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	addss	4(%rsp), %xmm0
	movss	%xmm0, -4(%r13)
	cmpq	%rbp, %r13
	jne	.L10
	movq	8(%rsp), %rax
	incl	%r14d
	addq	%rax, %rbx
	jmp	.L9
.L14:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z6matgenPfii, .-_Z6matgenPfii
	.globl	_Z7matmultPKfiS0_iPfii
	.type	_Z7matmultPKfiS0_iPfii, @function
_Z7matmultPKfiS0_iPfii:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movslq	%r9d, %r9
	movslq	%esi, %rax
	movslq	%ecx, %rcx
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	24(%rsp), %r11d
	movq	%rdx, %r10
	salq	$2, %r9
	salq	$2, %rax
	movq	%rdi, %rdx
	salq	$2, %rcx
	xorl	%ebx, %ebx
.L16:
	cmpl	%r11d, %ebx
	jge	.L23
	xorl	%esi, %esi
.L19:
	leaq	(%r10,%rsi,4), %rbp
	xorl	%edi, %edi
	xorps	%xmm0, %xmm0
.L17:
	movss	(%rdx,%rdi,4), %xmm1
	mulss	0(%rbp), %xmm1
	incq	%rdi
	addq	%rcx, %rbp
	cvtss2sd	%xmm1, %xmm1
	addsd	%xmm1, %xmm0
	cmpl	%edi, %r11d
	jg	.L17
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r8,%rsi,4)
	incq	%rsi
	cmpl	%esi, %r11d
	jg	.L19
	incl	%ebx
	addq	%r9, %r8
	addq	%rax, %rdx
	jmp	.L16
.L23:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z7matmultPKfiS0_iPfii, .-_Z7matmultPKfiS0_iPfii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"max_err : %f, average_err: %.2f\n"
	.text
	.globl	_Z11compare_matPKfiS0_ii
	.type	_Z11compare_matPKfiS0_ii, @function
_Z11compare_matPKfiS0_ii:
.LFB3637:
	.cfi_startproc
	endbr64
	xorps	%xmm1, %xmm1
	movslq	%ecx, %rcx
	xorl	%r10d, %r10d
	xorl	%r9d, %r9d
	salq	$2, %rcx
	movaps	%xmm1, %xmm0
	movaps	%xmm1, %xmm4
	movss	.LC3(%rip), %xmm5
.L25:
	cmpl	%r8d, %r9d
	jge	.L34
	xorl	%eax, %eax
.L29:
	movss	(%rdx,%rax,4), %xmm3
	ucomiss	%xmm4, %xmm3
	jp	.L32
	je	.L26
.L32:
	leal	(%r10,%rax), %r11d
	movslq	%r11d, %r11
	movss	(%rdi,%r11,4), %xmm2
	subss	%xmm3, %xmm2
	divss	%xmm3, %xmm2
	andps	%xmm5, %xmm2
	movaps	%xmm2, %xmm6
	addss	%xmm2, %xmm1
	maxss	%xmm0, %xmm6
	movaps	%xmm6, %xmm0
.L26:
	incq	%rax
	cmpl	%eax, %r8d
	jg	.L29
	incl	%r9d
	addl	%esi, %r10d
	addq	%rcx, %rdx
	jmp	.L25
.L34:
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	leaq	.LC4(%rip), %rsi
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE3637:
	.size	_Z11compare_matPKfiS0_ii, .-_Z11compare_matPKfiS0_ii
	.globl	_Z11matmultCUDAPKfiS0_iPfii
	.type	_Z11matmultCUDAPKfiS0_iPfii, @function
_Z11matmultCUDAPKfiS0_iPfii:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%r8, 24(%rsp)
	movslq	176(%rsp), %rbx
	movq	%rdx, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	clock@PLT
	leaq	56(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%rbx, %rcx
	movq	%rax, %r13
	leaq	0(,%rbx,4), %rax
	movq	%rax, %rdx
	movq	%rax, 8(%rsp)
	call	cudaMallocPitch@PLT
	movq	8(%rsp), %rdx
	leaq	64(%rsp), %rsi
	movq	%rbx, %rcx
	leaq	40(%rsp), %rdi
	call	cudaMallocPitch@PLT
	movq	8(%rsp), %rdx
	leaq	72(%rsp), %rsi
	movq	%rbx, %rcx
	leaq	48(%rsp), %rdi
	call	cudaMallocPitch@PLT
	movslq	%r12d, %rcx
	movq	%rbx, %r9
	movq	%r15, %rdx
	pushq	%r10
	.cfi_def_cfa_offset 184
	salq	$2, %rcx
	pushq	$1
	.cfi_def_cfa_offset 192
	movq	24(%rsp), %r8
	movq	72(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	cudaMemcpy2D@PLT
	movq	24(%rsp), %r8
	movslq	%ebp, %rcx
	movq	%rbx, %r9
	movq	32(%rsp), %rdx
	movq	80(%rsp), %rsi
	salq	$2, %rcx
	movl	$1, (%rsp)
	movq	56(%rsp), %rdi
	call	cudaMemcpy2D@PLT
	movl	%ebx, 96(%rsp)
	movl	$16777217, %edx
	movabsq	$4294967297, %rax
	movq	%rax, 100(%rsp)
	popq	%r11
	.cfi_def_cfa_offset 184
	xorl	%r9d, %r9d
	salq	$8, %rdx
	popq	%rbp
	.cfi_def_cfa_offset 176
	movq	8(%rsp), %r8
	movl	$1, %ecx
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	movq	64(%rsp), %rcx
	movq	56(%rsp), %rsi
	pushq	%rdi
	.cfi_def_cfa_offset 184
	pushq	%rbx
	.cfi_def_cfa_offset 192
	movq	88(%rsp), %r9
	movq	64(%rsp), %r8
	movq	56(%rsp), %rdx
	shrq	$2, %rcx
	shrq	$2, %rsi
	movq	48(%rsp), %rdi
	shrq	$2, %r9
	call	_ZL41__device_stub__Z11matMultCUDAPKfmS0_mPfmiPKfmS0_mPfmi
	popq	%r8
	.cfi_def_cfa_offset 184
	popq	%r9
	.cfi_def_cfa_offset 176
.L36:
	pushq	%rax
	.cfi_def_cfa_offset 184
	movq	%rbx, %r9
	pushq	$2
	.cfi_def_cfa_offset 192
	movq	24(%rsp), %r8
	movq	40(%rsp), %rdi
	movq	88(%rsp), %rcx
	movq	64(%rsp), %rdx
	movq	%r8, %rsi
	call	cudaMemcpy2D@PLT
	popq	%rdx
	.cfi_def_cfa_offset 184
	popq	%rcx
	.cfi_def_cfa_offset 176
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	call	clock@PLT
	subq	%r13, %rax
	movq	104(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z11matmultCUDAPKfiS0_iPfii, .-_Z11matmultCUDAPKfiS0_iPfii
	.section	.rodata.str1.1
.LC8:
	.string	"Time used: %.2f  (%.2lf GFLOATS)\n"
.LC9:
	.string	"pause"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$4000000, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	malloc@PLT
	movl	$4000000, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$4000000, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$4000000, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$10, %edi
	movq	%rax, %r13
	call	srand@PLT
	movq	%rbx, %rdi
	movl	$1000, %edx
	movl	$1000, %esi
	call	_Z6matgenPfii
	movq	%rbp, %rdi
	movl	$1000, %edx
	movl	$1000, %esi
	call	_Z6matgenPfii
	movq	%r12, %r8
	movq	%rbp, %rdx
	movq	%rbx, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 56
	movl	$1000, %r9d
	movl	$1000, %ecx
	movl	$1000, %esi
	pushq	$1000
	.cfi_def_cfa_offset 64
	call	_Z11matmultCUDAPKfiS0_iPfii
	movq	%r13, %r8
	movq	%rbp, %rdx
	movq	%rbx, %rdi
	movl	$1000, %r9d
	movl	$1000, %ecx
	movl	$1000, %esi
	movq	%rax, %r14
	movl	$1000, (%rsp)
	call	_Z7matmultPKfiS0_iPfii
	popq	%rdx
	.cfi_def_cfa_offset 56
	movl	$1000, %r8d
	popq	%rcx
	.cfi_def_cfa_offset 48
	movq	%r13, %rdx
	movl	$1000, %ecx
	movq	%r12, %rdi
	movl	$1000, %esi
	call	_Z11compare_matPKfiS0_ii
	movsd	.LC6(%rip), %xmm2
	movb	$2, %al
	cvtsi2sdq	%r14, %xmm0
	divsd	.LC5(%rip), %xmm0
	movsd	.LC7(%rip), %xmm1
	movl	$2, %edi
	leaq	.LC8(%rip), %rsi
	mulsd	%xmm0, %xmm2
	divsd	%xmm2, %xmm1
	call	__printf_chk@PLT
	leaq	.LC9(%rip), %rdi
	call	system@PLT
	popq	%rbx
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z11matMultCUDAPKfmS0_mPfmi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3667:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	leaq	_ZL11matMultCUDAPKfmS0_mPfmi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3667:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC3:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1093567616
	.align 8
.LC6:
	.long	0
	.long	1104006501
	.align 8
.LC7:
	.long	0
	.long	1105055077
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <cstdio>
#include <cstdlib>
#include <ctime>
#include <iostream>
#define THREAD_SIZE 256
using namespace std;


void matgen(float* a, int lda, int n) {
	for (int i = 0; i < n; ++i) {
		for (int j = 0; j < n; ++j) {
			a[i * lda + j] = (float)rand() / RAND_MAX +
				(float)rand() / (RAND_MAX * RAND_MAX);
		}
		//printf("%.2f\n", a[i]);
	}
}

void matmult(const float* a, int lda, const float* b, int ldb, float* c, int ldc, int n) {
	int i, j, k;
	for (int i = 0; i < n; ++i) {
		for (int j = 0; j < n; ++j) {
			double t = 0;
			for (int k = 0; k < n; ++k) {
				t += a[i * lda + k] * b[k * ldb + j];
			}
			c[i * ldc + j] = t;
		}
	}
}

void compare_mat(const float* a, int lda, const float* b, int ldb, int n) {
	float max_err = 0;
	float average_err = 0;
	for (int i = 0; i < n; ++i){
		for (int j = 0; j < n; ++j) {
			if (b[i * ldb + j] != 0) {
				float err = fabs((a[i * lda + j] - b[i * ldb + j]) / b[i * ldb + j]);
				//printf("%.2f\n", max_err);
				if (max_err < err) max_err = err;
				average_err += err;
			}
		}
	}
	printf("max_err : %f, average_err: %.2f\n", max_err, average_err);
}


__global__ static void matMultCUDA(const float* a, size_t lda,
	const float* b, size_t ldb, float* c, size_t ldc, int n) {
	extern __shared__ float data[];
	const int tid = threadIdx.x;
	const int row = blockIdx.x;
	int i, j;
	for (i = tid; i < n; i += blockDim.x) {
		data[i] = a[row * lda + i];
	}
	__syncthreads();
	for (j = tid; j < n; j += blockDim.x) {
		float t = 0;
		float y = 0;
		for (i = 0; i < n; ++i) {
			float r;
			y -= data[i] * b[i * ldb + j];
			r = t - y;
			y = (r - t) + y;
			t = r;
		}
		c[row * ldc + j] = t;
	}
}

clock_t matmultCUDA(const float* a, int lda,
	const float* b, int ldb, float*c, int ldc, int n) {
	float *ac, *bc, *cc;
	clock_t start, end;
	start = clock();
	size_t pitch_a, pitch_b, pitch_c;
	hipMallocPitch((void**)&ac, &pitch_a, sizeof(float)* n, n);
	hipMallocPitch((void**)&bc, &pitch_b, sizeof(float)* n, n);
	hipMallocPitch((void**)&cc, &pitch_c, sizeof(float)* n, n);
	hipMemcpy2D(ac, pitch_a, a, sizeof(float)* lda, sizeof(float)* n, n, hipMemcpyHostToDevice);
	hipMemcpy2D(bc, pitch_b, b, sizeof(float)* ldb, sizeof(float)* n, n, hipMemcpyHostToDevice);

	int blocks = (n + THREAD_SIZE - 1) / THREAD_SIZE;
	matMultCUDA<<<n, THREAD_SIZE, sizeof(float) * n >>>
		(ac, pitch_a / sizeof(float), bc, pitch_b / sizeof(float), cc, pitch_c / sizeof(float), n);
	hipMemcpy2D(c, sizeof(float)* n, cc, pitch_c, sizeof(float) * n, n, hipMemcpyDeviceToHost);
	hipFree(ac);
	hipFree(bc);
	hipFree(cc);
	end = clock();
	return end - start;

}
int main(int argc, char** argv) {
	float *a, *b, *c, *d;
	const int n = 1000;
	a = (float*)malloc(sizeof(float)* n * n);
	b = (float*)malloc(sizeof(float)* n * n);
	c = (float*)malloc(sizeof(float)* n * n);
	d = (float*)malloc(sizeof(float)* n * n);
	srand(10);
	matgen(a, n, n);
	matgen(b, n, n);
	clock_t time = matmultCUDA(a, n, b, n, c, n, n);

	matmult(a, n, b, n, d, n, n);
	compare_mat(c, n, d, n, n);

	double sec = (double)time / CLOCKS_PER_SEC;
	printf("Time used: %.2f  (%.2lf GFLOATS)\n", sec, 2.0 * n * n * n / (sec * 1e9));
	system("pause");
	return 0;
}
	.text
	.file	"DemoSharedMat.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z6matgenPfii
.LCPI0_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z6matgenPfii
	.type	_Z6matgenPfii,@function
_Z6matgenPfii:                          # @_Z6matgenPfii
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB0_6
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movslq	%esi, %r14
	movl	%edx, %r15d
	shlq	$2, %r14
	xorl	%r12d, %r12d
.LBB0_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
	xorl	%r13d, %r13d
.LBB0_3:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI0_0(%rip), %xmm0
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	addss	12(%rsp), %xmm0                 # 4-byte Folded Reload
	movss	%xmm0, (%rbx,%r13,4)
	incq	%r13
	cmpq	%r13, %r15
	jne	.LBB0_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r12
	addq	%r14, %rbx
	cmpq	%r15, %r12
	jne	.LBB0_2
# %bb.5:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
.LBB0_6:                                # %._crit_edge13
	retq
.Lfunc_end0:
	.size	_Z6matgenPfii, .Lfunc_end0-_Z6matgenPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z7matmultPKfiS0_iPfii          # -- Begin function _Z7matmultPKfiS0_iPfii
	.type	_Z7matmultPKfiS0_iPfii,@function
_Z7matmultPKfiS0_iPfii:                 # @_Z7matmultPKfiS0_iPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	40(%rsp), %r10d
	testl	%r10d, %r10d
	jle	.LBB1_7
# %bb.1:                                # %.preheader26.lr.ph
	movslq	%ecx, %rax
	movslq	%esi, %rcx
	movslq	%r9d, %rsi
	movl	%r10d, %r9d
	shlq	$2, %rcx
	shlq	$2, %rax
	xorl	%r10d, %r10d
.LBB1_2:                                # %.preheader.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
                                        #       Child Loop BB1_4 Depth 3
	movq	%r10, %r11
	imulq	%rsi, %r11
	leaq	(%r8,%r11,4), %r11
	movq	%rdx, %rbx
	xorl	%r14d, %r14d
.LBB1_3:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_4 Depth 3
	xorpd	%xmm0, %xmm0
	movq	%rbx, %r15
	xorl	%r12d, %r12d
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rdi,%r12,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r15), %xmm1
	cvtss2sd	%xmm1, %xmm1
	addsd	%xmm1, %xmm0
	incq	%r12
	addq	%rax, %r15
	cmpq	%r12, %r9
	jne	.LBB1_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_3 Depth=2
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r11,%r14,4)
	incq	%r14
	addq	$4, %rbx
	cmpq	%r9, %r14
	jne	.LBB1_3
# %bb.6:                                # %._crit_edge30
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r10
	addq	%rcx, %rdi
	cmpq	%r9, %r10
	jne	.LBB1_2
.LBB1_7:                                # %._crit_edge32
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z7matmultPKfiS0_iPfii, .Lfunc_end1-_Z7matmultPKfiS0_iPfii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z11compare_matPKfiS0_ii
.LCPI2_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	_Z11compare_matPKfiS0_ii
	.type	_Z11compare_matPKfiS0_ii,@function
_Z11compare_matPKfiS0_ii:               # @_Z11compare_matPKfiS0_ii
	.cfi_startproc
# %bb.0:
	testl	%r8d, %r8d
	jle	.LBB2_1
# %bb.2:                                # %.preheader.lr.ph
	movslq	%ecx, %rax
	movslq	%esi, %rcx
	movl	%r8d, %esi
	shlq	$2, %rcx
	shlq	$2, %rax
	xorps	%xmm0, %xmm0
	xorl	%r8d, %r8d
	movaps	.LCPI2_0(%rip), %xmm1           # xmm1 = [NaN,NaN,NaN,NaN]
	xorps	%xmm3, %xmm3
	xorps	%xmm2, %xmm2
.LBB2_3:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	xorl	%r9d, %r9d
.LBB2_4:                                #   Parent Loop BB2_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rdx,%r9,4), %xmm4             # xmm4 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm4
	jne	.LBB2_5
	jnp	.LBB2_6
.LBB2_5:                                #   in Loop: Header=BB2_4 Depth=2
	movss	(%rdi,%r9,4), %xmm5             # xmm5 = mem[0],zero,zero,zero
	subss	%xmm4, %xmm5
	divss	%xmm4, %xmm5
	andps	%xmm1, %xmm5
	addss	%xmm5, %xmm2
	maxss	%xmm3, %xmm5
	movaps	%xmm5, %xmm3
.LBB2_6:                                #   in Loop: Header=BB2_4 Depth=2
	incq	%r9
	cmpq	%r9, %rsi
	jne	.LBB2_4
# %bb.7:                                # %._crit_edge
                                        #   in Loop: Header=BB2_3 Depth=1
	incq	%r8
	addq	%rcx, %rdi
	addq	%rax, %rdx
	cmpq	%rsi, %r8
	jne	.LBB2_3
# %bb.8:                                # %._crit_edge43.loopexit
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm3, %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	%xmm2, %xmm1
	jmp	.LBB2_9
.LBB2_1:
	xorps	%xmm1, %xmm1
	xorps	%xmm0, %xmm0
.LBB2_9:                                # %._crit_edge43
	movl	$.L.str, %edi
	movb	$2, %al
	jmp	printf                          # TAILCALL
.Lfunc_end2:
	.size	_Z11compare_matPKfiS0_ii, .Lfunc_end2-_Z11compare_matPKfiS0_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11matmultCUDAPKfiS0_iPfii     # -- Begin function _Z11matmultCUDAPKfiS0_iPfii
	.type	_Z11matmultCUDAPKfiS0_iPfii,@function
_Z11matmultCUDAPKfiS0_iPfii:            # @_Z11matmultCUDAPKfiS0_iPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, 64(%rsp)                   # 8-byte Spill
	movl	%ecx, 28(%rsp)                  # 4-byte Spill
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movl	144(%rsp), %r15d
	callq	clock
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movslq	%r15d, %r15
	leaq	(,%r15,4), %r12
	leaq	48(%rsp), %r13
	leaq	80(%rsp), %rbp
	movq	%r13, %rdi
	movq	%rbp, %rsi
	movq	%r12, %rdx
	movq	%r15, %rcx
	callq	hipMallocPitch
	leaq	16(%rsp), %rdi
	leaq	40(%rsp), %rsi
	movq	%r12, %rdx
	movq	%r15, %rcx
	callq	hipMallocPitch
	leaq	8(%rsp), %rdi
	leaq	32(%rsp), %rsi
	movq	%r12, %rdx
	movq	%r15, %rcx
	callq	hipMallocPitch
	movq	(%r13), %rdi
	movq	(%rbp), %rsi
	movslq	%r14d, %rcx
	shlq	$2, %rcx
	movl	$1, %ebp
	movl	%ebp, (%rsp)
	movq	%rbx, %rdx
	movl	144(%rsp), %ebx
	movq	%r12, %r8
	movq	%r15, %r9
	callq	hipMemcpy2D
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	leaq	40(%rsp), %rax
	movq	(%rax), %rsi
	movslq	28(%rsp), %rcx                  # 4-byte Folded Reload
	shlq	$2, %rcx
	movl	%ebp, (%rsp)
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movq	%r12, %r8
	movq	%r15, %r9
	callq	hipMemcpy2D
	movq	%rbx, %rdi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	48(%rsp), %rdi
	movq	80(%rsp), %rsi
	shrq	$2, %rsi
	movq	16(%rsp), %rdx
	movq	40(%rsp), %rcx
	shrq	$2, %rcx
	movq	8(%rsp), %r8
	movq	32(%rsp), %r9
	shrq	$2, %r9
	movl	%ebx, (%rsp)
	callq	_ZL26__device_stub__matMultCUDAPKfmS0_mPfmi
.LBB3_2:
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rcx
	movl	$2, (%rsp)
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rsi
	movq	%r12, %r8
	movq	%r15, %r9
	callq	hipMemcpy2D
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	callq	clock
	subq	72(%rsp), %rax                  # 8-byte Folded Reload
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z11matmultCUDAPKfiS0_iPfii, .Lfunc_end3-_Z11matmultCUDAPKfiS0_iPfii
	.cfi_endproc
                                        # -- End function
	.type	_ZL26__device_stub__matMultCUDAPKfmS0_mPfmi,@function # -- Begin function _ZL26__device_stub__matMultCUDAPKfmS0_mPfmi
_ZL26__device_stub__matMultCUDAPKfmS0_mPfmi: # @_ZL26__device_stub__matMultCUDAPKfmS0_mPfmi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZL11matMultCUDAPKfmS0_mPfmi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_ZL26__device_stub__matMultCUDAPKfmS0_mPfmi, .Lfunc_end4-_ZL26__device_stub__matMultCUDAPKfmS0_mPfmi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI5_1:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI5_2:
	.quad	0x41ddcd6500000000              # double 2.0E+9
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %rbx
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %r14
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %r15
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %r12
	movl	$10, %edi
	callq	srand
	movq	%rbx, %rdi
	movl	$1000, %esi                     # imm = 0x3E8
	movl	$1000, %edx                     # imm = 0x3E8
	callq	_Z6matgenPfii
	movq	%r14, %rdi
	movl	$1000, %esi                     # imm = 0x3E8
	movl	$1000, %edx                     # imm = 0x3E8
	callq	_Z6matgenPfii
	movl	$1000, (%rsp)                   # imm = 0x3E8
	movq	%rbx, %rdi
	movl	$1000, %esi                     # imm = 0x3E8
	movq	%r14, %rdx
	movl	$1000, %ecx                     # imm = 0x3E8
	movq	%r15, %r8
	callq	_Z11matmultCUDAPKfiS0_iPfii
	movq	%rax, %r13
	xorl	%eax, %eax
.LBB5_1:                                # %.preheader.lr.ph.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_2 Depth 2
                                        #       Child Loop BB5_3 Depth 3
	imulq	$4000, %rax, %rcx               # imm = 0xFA0
	addq	%r12, %rcx
	movq	%r14, %rdx
	xorl	%esi, %esi
.LBB5_2:                                # %.preheader.i
                                        #   Parent Loop BB5_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB5_3 Depth 3
	xorpd	%xmm0, %xmm0
	movq	%rdx, %rdi
	xorl	%r8d, %r8d
.LBB5_3:                                #   Parent Loop BB5_1 Depth=1
                                        #     Parent Loop BB5_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rbx,%r8,4), %xmm1             # xmm1 = mem[0],zero,zero,zero
	mulss	(%rdi), %xmm1
	cvtss2sd	%xmm1, %xmm1
	addsd	%xmm1, %xmm0
	incq	%r8
	addq	$4000, %rdi                     # imm = 0xFA0
	cmpq	$1000, %r8                      # imm = 0x3E8
	jne	.LBB5_3
# %bb.4:                                # %._crit_edge.i
                                        #   in Loop: Header=BB5_2 Depth=2
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rcx,%rsi,4)
	incq	%rsi
	addq	$4, %rdx
	cmpq	$1000, %rsi                     # imm = 0x3E8
	jne	.LBB5_2
# %bb.5:                                # %._crit_edge30.i
                                        #   in Loop: Header=BB5_1 Depth=1
	incq	%rax
	addq	$4000, %rbx                     # imm = 0xFA0
	cmpq	$1000, %rax                     # imm = 0x3E8
	jne	.LBB5_1
# %bb.6:                                # %_Z7matmultPKfiS0_iPfii.exit
	movq	%r15, %rdi
	movl	$1000, %esi                     # imm = 0x3E8
	movq	%r12, %rdx
	movl	$1000, %ecx                     # imm = 0x3E8
	movl	$1000, %r8d                     # imm = 0x3E8
	callq	_Z11compare_matPKfiS0_ii
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r13, %xmm0
	divsd	.LCPI5_0(%rip), %xmm0
	movsd	.LCPI5_1(%rip), %xmm2           # xmm2 = mem[0],zero
	mulsd	%xmm0, %xmm2
	movsd	.LCPI5_2(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm2, %xmm1
	movl	$.L.str.1, %edi
	movb	$2, %al
	callq	printf
	movl	$.L.str.2, %edi
	callq	system
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZL11matMultCUDAPKfmS0_mPfmi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"max_err : %f, average_err: %.2f\n"
	.size	.L.str, 33

	.type	_ZL11matMultCUDAPKfmS0_mPfmi,@object # @_ZL11matMultCUDAPKfmS0_mPfmi
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
_ZL11matMultCUDAPKfmS0_mPfmi:
	.quad	_ZL26__device_stub__matMultCUDAPKfmS0_mPfmi
	.size	_ZL11matMultCUDAPKfmS0_mPfmi, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Time used: %.2f  (%.2lf GFLOATS)\n"
	.size	.L.str.1, 34

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"pause"
	.size	.L.str.2, 6

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_ZL11matMultCUDAPKfmS0_mPfmi"
	.size	.L__unnamed_1, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _ZL26__device_stub__matMultCUDAPKfmS0_mPfmi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZL11matMultCUDAPKfmS0_mPfmi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._ZL11matMultCUDAPKfmS0_mPfmi,"axG",@progbits,_ZL11matMultCUDAPKfmS0_mPfmi,comdat
	.globl	_ZL11matMultCUDAPKfmS0_mPfmi    ; -- Begin function _ZL11matMultCUDAPKfmS0_mPfmi
	.p2align	8
	.type	_ZL11matMultCUDAPKfmS0_mPfmi,@function
_ZL11matMultCUDAPKfmS0_mPfmi:           ; @_ZL11matMultCUDAPKfmS0_mPfmi
; %bb.0:
	s_clause 0x2
	s_load_b32 s12, s[0:1], 0x30
	s_load_b128 s[16:19], s[0:1], 0x20
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s12, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s2, s[0:1], 0x44
	s_mul_i32 s7, s15, s7
	s_mul_hi_u32 s13, s15, s6
	s_ashr_i32 s14, s15, 31
	s_add_i32 s7, s13, s7
	s_mul_i32 s14, s14, s6
	s_mul_i32 s6, s15, s6
	s_add_i32 s7, s7, s14
	v_lshl_add_u32 v3, v0, 2, 0
	s_lshl_b64 s[6:7], s[6:7], 2
	v_mov_b32_e32 v1, v0
	s_add_u32 s4, s4, s6
	s_addc_u32 s5, s5, s7
	s_mov_b32 s7, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s13, s6, 2
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_nc_u32_e32 v1, s6, v1
	v_add_co_u32 v4, s2, s4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v5, s2, s5, v5, s2
	v_cmp_le_i32_e64 s2, s12, v1
	global_load_b32 v2, v[4:5], off
	s_or_b32 s7, s2, s7
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v2
	v_add_nc_u32_e32 v3, s13, v3
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow75
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.4:                                ; %.preheader.lr.ph
	s_load_b32 s5, s[0:1], 0x44
	s_mul_i32 s0, s15, s19
	s_mul_hi_u32 s1, s15, s18
	s_ashr_i32 s2, s15, 31
	s_add_i32 s1, s1, s0
	s_mul_i32 s2, s2, s18
	s_mul_i32 s0, s15, s18
	s_add_i32 s1, s1, s2
	s_mov_b32 s6, 0
	s_lshl_b64 s[2:3], s[0:1], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s1, s16, s2
	s_addc_u32 s4, s17, s3
	s_lshl_b64 s[2:3], s[10:11], 2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
.LBB0_5:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
	v_ashrrev_i32_e32 v1, 31, v0
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v5, 0
	s_mov_b32 s0, 0
	s_mov_b32 s7, s12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v3, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v2, vcc_lo
.LBB0_6:                                ;   Parent Loop BB0_5 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v7, v[3:4], off
	v_dual_mov_b32 v8, s0 :: v_dual_mov_b32 v9, v5
	v_add_co_u32 v3, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	ds_load_b32 v8, v8
	s_add_i32 s7, s7, -1
	s_add_i32 s0, s0, 4
	s_cmp_lg_u32 s7, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fma_f32 v6, -v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v9, v6
	v_sub_f32_e32 v7, v5, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v6, v6, v7
	s_cbranch_scc1 .LBB0_6
; %bb.7:                                ; %._crit_edge44
                                        ;   in Loop: Header=BB0_5 Depth=1
	v_add_nc_u32_e32 v0, s5, v0
	v_add_co_u32 v1, s0, s1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v2, s0, s4, v2, s0
	v_cmp_le_i32_e32 vcc_lo, s12, v0
	global_store_b32 v[1:2], v5, off
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_5
.LBB0_8:                                ; %._crit_edge46
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZL11matMultCUDAPKfmS0_mPfmi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZL11matMultCUDAPKfmS0_mPfmi,"axG",@progbits,_ZL11matMultCUDAPKfmS0_mPfmi,comdat
.Lfunc_end0:
	.size	_ZL11matMultCUDAPKfmS0_mPfmi, .Lfunc_end0-_ZL11matMultCUDAPKfmS0_mPfmi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 508
; NumSgprs: 22
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         176
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _ZL11matMultCUDAPKfmS0_mPfmi
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _ZL11matMultCUDAPKfmS0_mPfmi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
