#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <cstdio>
#include <cstdlib>


__global__ void kernelDeduct(double *a, double* b, double* c, size_t n) {
        size_t i = blockDim.x*blockIdx.x + threadIdx.x;
	size_t offset = gridDim.x*blockDim.x;
	for (; i < n; i+= offset){
		c[i] = a[i] - b[i];
	}
}


int main() {

        size_t n;

        scanf("%lu\n", &n);

        double *a = (double *)malloc(sizeof(double)*n);
        double *b = (double *)malloc(sizeof(double)*n);
        double *c = (double *)malloc(sizeof(double)*n);
	
	for (size_t i = 0; i < n; i++)
        	scanf("%lf", &a[i]);
	for (size_t i = 0; i < n; i++)
        	scanf("%lf", &b[i]);

        cudaError_t cudaStatus = cudaSetDevice(0);

        if (cudaStatus != cudaSuccess) {
	    printf("ERROR: %s\n", "cudaSetDevice check failed. You must have at least one Nvidia GPU!");
	    return 0;
	}
        double *va, *vb, *vc;


        cudaStatus = cudaMalloc((void**)&va, n*sizeof(double));
	if (cudaStatus != cudaSuccess) {
		printf("ERROR: %s\n", "Can't allocate video memory");
		return 0;
	}

        cudaStatus = cudaMalloc((void**)&vb, n*sizeof(double));
	if (cudaStatus != cudaSuccess) {
		printf("ERROR: %s\n", "Can't allocate video memory");
		return 0;
	}

        cudaStatus = cudaMalloc((void**)&vc, n*sizeof(double));
	if (cudaStatus != cudaSuccess) {
		printf("ERROR: %s\n", "Can't allocate video memory");
		return 0;
	}


        cudaStatus = cudaMemcpy(va, a, n*sizeof(double), cudaMemcpyHostToDevice);
	if (cudaStatus != cudaSuccess) {
		printf("ERROR: %s\n", "Can't copy from ram to videomemory");
		return 0;
	}

        cudaStatus = cudaMemcpy(vb, b, n*sizeof(double), cudaMemcpyHostToDevice);
	if (cudaStatus != cudaSuccess) {
		printf("ERROR: %s\n", "Can't copy from ram to videomemory");
		return 0;
	}

        kernelDeduct <<<16384, 512>>>(va, vb, vc, n);

	cudaStatus = cudaMemcpy(c, vc, n*sizeof(double), cudaMemcpyDeviceToHost);
	if (cudaStatus != cudaSuccess) {
		printf("ERROR: %s\n", "Can't copy from videomemory to ram");
		return 0;
	}

        cudaFree(va);
        cudaFree(vb);
        cudaFree(vc);

	for (size_t i = 0; i < n; i++)
            printf("%.10e ", c[i]);
	printf("\n");
        return 0;

}


	.file	"tmpxft_0033b360_00000000-6_pgp1.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z37__device_stub__Z12kernelDeductPdS_S_mPdS_S_m
	.type	_Z37__device_stub__Z12kernelDeductPdS_S_mPdS_S_m, @function
_Z37__device_stub__Z12kernelDeductPdS_S_mPdS_S_m:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12kernelDeductPdS_S_m(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z37__device_stub__Z12kernelDeductPdS_S_mPdS_S_m, .-_Z37__device_stub__Z12kernelDeductPdS_S_mPdS_S_m
	.globl	_Z12kernelDeductPdS_S_m
	.type	_Z12kernelDeductPdS_S_m, @function
_Z12kernelDeductPdS_S_m:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z12kernelDeductPdS_S_mPdS_S_m
	.cfi_endproc
.LFE2053:
	.size	_Z12kernelDeductPdS_S_m, .-_Z12kernelDeductPdS_S_m
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%lu\n"
.LC1:
	.string	"%lf"
.LC2:
	.string	"cudaSetDevice check failed. You must have at least one Nvidia GPU!"
.LC3:
	.string	"ERROR: %s\n"
.LC4:
	.string	"Can't allocate video memory"
.LC5:
	.string	"Can't copy from ram to videomemory"
.LC6:
	.string	"Can't copy from videomemory to ram"
.LC7:
	.string	"%.10e "
.LC8:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC0(%rip), %rdi
	leaq	.LC1(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	call	__isoc23_scanf@PLT
	movq	(%rsp), %rax
	leaq	0(,%rax,8), %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%rbx, %rdi
	xorl	%ebx, %ebx
	movq	%rax, %r12
	call	malloc@PLT
	movq	%rax, %rbp
.L9:
	cmpq	(%rsp), %rbx
	jnb	.L26
	leaq	0(%r13,%rbx,8), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	incq	%rbx
	call	__isoc23_scanf@PLT
	jmp	.L9
.L26:
	xorl	%ebx, %ebx
	leaq	.LC1(%rip), %r14
.L11:
	cmpq	(%rsp), %rbx
	jnb	.L27
	leaq	(%r12,%rbx,8), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	incq	%rbx
	call	__isoc23_scanf@PLT
	jmp	.L11
.L27:
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	leaq	.LC2(%rip), %rdx
	testl	%eax, %eax
	jne	.L25
	movq	(%rsp), %rax
	leaq	8(%rsp), %rdi
	leaq	0(,%rax,8), %rsi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L15
.L16:
	leaq	.LC4(%rip), %rdx
	jmp	.L25
.L15:
	movq	(%rsp), %rax
	leaq	16(%rsp), %rdi
	leaq	0(,%rax,8), %rsi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	jne	.L16
	movq	(%rsp), %rax
	leaq	24(%rsp), %rdi
	leaq	0(,%rax,8), %rsi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	jne	.L16
	movq	(%rsp), %rax
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	leaq	0(,%rax,8), %rdx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L17
.L18:
	leaq	.LC5(%rip), %rdx
.L25:
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L14
.L17:
	movq	(%rsp), %rax
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	leaq	0(,%rax,8), %rdx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	jne	.L18
	movl	$8388609, %edx
	movl	$262145, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$9, %rdx
	salq	$14, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	(%rsp), %rcx
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z37__device_stub__Z12kernelDeductPdS_S_mPdS_S_m
.L19:
	movq	(%rsp), %rax
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	leaq	0(,%rax,8), %rdx
	call	cudaMemcpy@PLT
	leaq	.LC6(%rip), %rdx
	testl	%eax, %eax
	jne	.L25
	movq	8(%rsp), %rdi
	xorl	%ebx, %ebx
	leaq	.LC7(%rip), %r12
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
.L21:
	cmpq	(%rsp), %rbx
	jnb	.L28
	movsd	0(%rbp,%rbx,8), %xmm0
	movq	%r12, %rsi
	movl	$2, %edi
	movb	$1, %al
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L21
.L28:
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L14:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z12kernelDeductPdS_S_m"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12kernelDeductPdS_S_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "hip/hip_runtime.h"

#include <cstdio>
#include <cstdlib>


__global__ void kernelDeduct(double *a, double* b, double* c, size_t n) {
        size_t i = blockDim.x*blockIdx.x + threadIdx.x;
	size_t offset = gridDim.x*blockDim.x;
	for (; i < n; i+= offset){
		c[i] = a[i] - b[i];
	}
}


int main() {

        size_t n;

        scanf("%lu\n", &n);

        double *a = (double *)malloc(sizeof(double)*n);
        double *b = (double *)malloc(sizeof(double)*n);
        double *c = (double *)malloc(sizeof(double)*n);
	
	for (size_t i = 0; i < n; i++)
        	scanf("%lf", &a[i]);
	for (size_t i = 0; i < n; i++)
        	scanf("%lf", &b[i]);

        hipError_t cudaStatus = hipSetDevice(0);

        if (cudaStatus != hipSuccess) {
	    printf("ERROR: %s\n", "hipSetDevice check failed. You must have at least one Nvidia GPU!");
	    return 0;
	}
        double *va, *vb, *vc;


        cudaStatus = hipMalloc((void**)&va, n*sizeof(double));
	if (cudaStatus != hipSuccess) {
		printf("ERROR: %s\n", "Can't allocate video memory");
		return 0;
	}

        cudaStatus = hipMalloc((void**)&vb, n*sizeof(double));
	if (cudaStatus != hipSuccess) {
		printf("ERROR: %s\n", "Can't allocate video memory");
		return 0;
	}

        cudaStatus = hipMalloc((void**)&vc, n*sizeof(double));
	if (cudaStatus != hipSuccess) {
		printf("ERROR: %s\n", "Can't allocate video memory");
		return 0;
	}


        cudaStatus = hipMemcpy(va, a, n*sizeof(double), hipMemcpyHostToDevice);
	if (cudaStatus != hipSuccess) {
		printf("ERROR: %s\n", "Can't copy from ram to videomemory");
		return 0;
	}

        cudaStatus = hipMemcpy(vb, b, n*sizeof(double), hipMemcpyHostToDevice);
	if (cudaStatus != hipSuccess) {
		printf("ERROR: %s\n", "Can't copy from ram to videomemory");
		return 0;
	}

        kernelDeduct <<<16384, 512>>>(va, vb, vc, n);

	cudaStatus = hipMemcpy(c, vc, n*sizeof(double), hipMemcpyDeviceToHost);
	if (cudaStatus != hipSuccess) {
		printf("ERROR: %s\n", "Can't copy from videomemory to ram");
		return 0;
	}

        hipFree(va);
        hipFree(vb);
        hipFree(vc);

	for (size_t i = 0; i < n; i++)
            printf("%.10e ", c[i]);
	printf("\n");
        return 0;

}


	.text
	.file	"pgp1.hip"
	.globl	_Z27__device_stub__kernelDeductPdS_S_m # -- Begin function _Z27__device_stub__kernelDeductPdS_S_m
	.type	_Z27__device_stub__kernelDeductPdS_S_m,@function
_Z27__device_stub__kernelDeductPdS_S_m: # @_Z27__device_stub__kernelDeductPdS_S_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12kernelDeductPdS_S_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__kernelDeductPdS_S_m, .Lfunc_end0-_Z27__device_stub__kernelDeductPdS_S_m
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsp, %rbx
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movq	(%rbx), %r12
	leaq	(,%r12,8), %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %rbx
	testq	%r12, %r12
	je	.LBB1_6
# %bb.1:                                # %.lr.ph.preheader
	movq	%r15, %r12
	xorl	%r13d, %r13d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.1, %edi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	incq	%r13
	movq	(%rsp), %rax
	addq	$8, %r12
	cmpq	%rax, %r13
	jb	.LBB1_2
# %bb.3:                                # %.preheader
	testq	%rax, %rax
	je	.LBB1_6
# %bb.4:                                # %.lr.ph39.preheader
	movq	%r14, %r12
	xorl	%r13d, %r13d
.LBB1_5:                                # %.lr.ph39
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.1, %edi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	incq	%r13
	addq	$8, %r12
	cmpq	(%rsp), %r13
	jb	.LBB1_5
.LBB1_6:                                # %._crit_edge
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	je	.LBB1_8
# %bb.7:
	movl	$.L.str.2, %edi
	movl	$.L.str.3, %esi
	jmp	.LBB1_10
.LBB1_8:
	movq	(%rsp), %rsi
	shlq	$3, %rsi
	leaq	24(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.11:
	movq	(%rsp), %rsi
	shlq	$3, %rsi
	leaq	16(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.12:
	movq	(%rsp), %rsi
	shlq	$3, %rsi
	leaq	8(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_13
.LBB1_9:
	movl	$.L.str.2, %edi
	movl	$.L.str.4, %esi
.LBB1_10:
	xorl	%eax, %eax
	callq	printf
.LBB1_24:
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_13:
	.cfi_def_cfa_offset 80
	movq	24(%rsp), %rdi
	movq	(%rsp), %rdx
	shlq	$3, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.15:
	movq	16(%rsp), %rdi
	movq	(%rsp), %rdx
	shlq	$3, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_16
.LBB1_14:
	movl	$.L.str.2, %edi
	movl	$.L.str.5, %esi
	jmp	.LBB1_10
.LBB1_16:
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	leaq	15872(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_18
# %bb.17:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	(%rsp), %rcx
	callq	_Z27__device_stub__kernelDeductPdS_S_m
.LBB1_18:
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	shlq	$3, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_20
# %bb.19:
	movl	$.L.str.2, %edi
	movl	$.L.str.6, %esi
	jmp	.LBB1_10
.LBB1_20:
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	cmpq	$0, (%rsp)
	je	.LBB1_23
# %bb.21:                               # %.lr.ph42.preheader
	xorl	%r14d, %r14d
.LBB1_22:                               # %.lr.ph42
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%rbx,%r14,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.7, %edi
	movb	$1, %al
	callq	printf
	incq	%r14
	cmpq	(%rsp), %r14
	jb	.LBB1_22
.LBB1_23:                               # %._crit_edge43
	movl	$10, %edi
	callq	putchar@PLT
	jmp	.LBB1_24
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12kernelDeductPdS_S_m, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12kernelDeductPdS_S_m,@object # @_Z12kernelDeductPdS_S_m
	.section	.rodata,"a",@progbits
	.globl	_Z12kernelDeductPdS_S_m
	.p2align	3, 0x0
_Z12kernelDeductPdS_S_m:
	.quad	_Z27__device_stub__kernelDeductPdS_S_m
	.size	_Z12kernelDeductPdS_S_m, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%lu\n"
	.size	.L.str, 5

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%lf"
	.size	.L.str.1, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"ERROR: %s\n"
	.size	.L.str.2, 11

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"hipSetDevice check failed. You must have at least one Nvidia GPU!"
	.size	.L.str.3, 66

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Can't allocate video memory"
	.size	.L.str.4, 28

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Can't copy from ram to videomemory"
	.size	.L.str.5, 35

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Can't copy from videomemory to ram"
	.size	.L.str.6, 35

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%.10e "
	.size	.L.str.7, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12kernelDeductPdS_S_m"
	.size	.L__unnamed_1, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__kernelDeductPdS_S_m
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12kernelDeductPdS_S_m
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12kernelDeductPdS_S_m ; -- Begin function _Z12kernelDeductPdS_S_m
	.globl	_Z12kernelDeductPdS_S_m
	.p2align	8
	.type	_Z12kernelDeductPdS_S_m,@function
_Z12kernelDeductPdS_S_m:                ; @_Z12kernelDeductPdS_S_m
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b256 s[4:11], s[0:1], 0x0
	s_add_u32 s0, s0, 32
	s_addc_u32 s1, s1, 0
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	v_cmpx_gt_u64_e64 s[10:11], v[1:2]
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s0, s[0:1], 0x0
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[2:3], 3
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v5, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v1, vcc_lo, v1, s2
	global_load_b64 v[5:6], v[5:6], off
	global_load_b64 v[7:8], v[7:8], off
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_add_co_u32 v7, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v4, vcc_lo
	v_cmp_le_u64_e32 vcc_lo, s[10:11], v[1:2]
	v_add_co_u32 v3, s0, v3, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s13, v4, s0
	s_or_b32 s3, vcc_lo, s3
	global_store_b64 v[7:8], v[5:6], off
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12kernelDeductPdS_S_m
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12kernelDeductPdS_S_m, .Lfunc_end0-_Z12kernelDeductPdS_S_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 244
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12kernelDeductPdS_S_m
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12kernelDeductPdS_S_m.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
