
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdio.h>

cudaError_t MovAvgWithCuda(float *result, const float *input, size_t size, int avgWindowSize);

__global__ void MovAvgKernel(float *result, const float *input, int threadCount, int elementsCount, const int avgWindowSize)
{
    int idx = threadIdx.x;

	int uniqueElementsForThread = elementsCount/ threadCount;
	int maxIdxForThread = (idx+1)*uniqueElementsForThread + avgWindowSize;
	if(idx == threadCount - 1) maxIdxForThread = elementsCount - 1;

	float sum = 0;

	//initialize first
	for(int i=0; i<avgWindowSize; i++)
	{
		float element = (float)input[uniqueElementsForThread*idx + i]/(float)avgWindowSize;
		sum += element;
	}

	int currentInd = uniqueElementsForThread*idx + avgWindowSize -1;
	result[currentInd] = sum;

	//run through
	while(currentInd<maxIdxForThread)
	{
		currentInd++;
	
		sum -= input[currentInd - avgWindowSize]/(float)avgWindowSize;
		
		sum += input[currentInd]/(float)avgWindowSize;

		result[currentInd] = sum;
	}
}

int main()
{
    const int arraySize = 10000;

	const int avgWindowSize = 15;
	 
	float a[arraySize] = {0};
	for(int i=0; i<arraySize; i++)
	{
		a[i] = i;
	}

    float result[arraySize] = { 0 };

    // Add vectors in parallel.
    cudaError_t cudaStatus = MovAvgWithCuda(result, a, arraySize, avgWindowSize);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "addWithCuda failed!");
        return 1;
    }

    // cudaDeviceReset must be called before exiting in order for profiling and
    // tracing tools such as Nsight and Visual Profiler to show complete traces.
    cudaStatus = cudaDeviceReset();

    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaDeviceReset failed!");
        return 1;
    }
	
	for(int i = 0; i< arraySize; i++ )
	{
		printf("%f \n", result[i]);
	}

	getchar();

    return 0;
}

// Helper function for using CUDA to add vectors in parallel.
cudaError_t MovAvgWithCuda(float *result, const float *input, size_t size, int avgWindowSize)
{
	const int BLOCKS = 1;
	const int THREADS = 256;

    float *dev_input = 0;
    float *dev_result = 0;
    cudaError_t cudaStatus;

    // Choose which GPU to run on, change this on a multi-GPU system.
    cudaStatus = cudaSetDevice(0);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?");
        goto Error;
    }

    // Allocate GPU buffers for three vectors (two input, one output)    .
    cudaStatus = cudaMalloc((void**)&dev_result, size * sizeof(float));
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMalloc failed!");
        goto Error;
    }

    cudaStatus = cudaMalloc((void**)&dev_input, size * sizeof(float));
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMalloc failed!");
        goto Error;
    }
	
    // Copy input vectors from host memory to GPU buffers.
    cudaStatus = cudaMemcpy(dev_input, input, size * sizeof(float), cudaMemcpyHostToDevice);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMemcpy failed!");
        goto Error;
    }

    // Launch a kernel on the GPU with one thread for each element.
    MovAvgKernel<<<BLOCKS, THREADS>>>(dev_result, dev_input, THREADS, size, avgWindowSize);

    // cudaDeviceSynchronize waits for the kernel to finish, and returns
    // any errors encountered during the launch.
    cudaStatus = cudaDeviceSynchronize();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
        goto Error;
    }

    // Copy output vector from GPU buffer to host memory.
    cudaStatus = cudaMemcpy(result, dev_result, size * sizeof(float), cudaMemcpyDeviceToHost);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMemcpy failed!");
        goto Error;
    }

Error:
    cudaFree(dev_result);
    cudaFree(dev_input);
    
    return cudaStatus;
}

	.file	"tmpxft_0030f755_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z38__device_stub__Z12MovAvgKernelPfPKfiiiPfPKfiii
	.type	_Z38__device_stub__Z12MovAvgKernelPfPKfiiiPfPKfiii, @function
_Z38__device_stub__Z12MovAvgKernelPfPKfiiiPfPKfiii:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12MovAvgKernelPfPKfiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z38__device_stub__Z12MovAvgKernelPfPKfiiiPfPKfiii, .-_Z38__device_stub__Z12MovAvgKernelPfPKfiiiPfPKfiii
	.globl	_Z12MovAvgKernelPfPKfiii
	.type	_Z12MovAvgKernelPfPKfiii, @function
_Z12MovAvgKernelPfPKfiii:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z12MovAvgKernelPfPKfiiiPfPKfiii
	.cfi_endproc
.LFE2054:
	.size	_Z12MovAvgKernelPfPKfiii, .-_Z12MovAvgKernelPfPKfiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?"
.LC1:
	.string	"cudaMalloc failed!"
.LC2:
	.string	"cudaMemcpy failed!"
.LC3:
	.string	"cudaDeviceSynchronize returned error code %d after launching addKernel!\n"
	.text
	.globl	_Z14MovAvgWithCudaPfPKfmi
	.type	_Z14MovAvgWithCudaPfPKfmi, @function
_Z14MovAvgWithCudaPfPKfmi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%ecx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	xorl	%edi, %edi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rax, (%rsp)
	movq	%rax, 8(%rsp)
	call	cudaSetDevice@PLT
	leaq	.LC0(%rip), %rdx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L20
	leaq	0(,%rbp,4), %r12
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L22
	movq	%rsp, %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L12
.L22:
	leaq	.LC1(%rip), %rdx
	jmp	.L20
.L12:
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rdx
	movq	%r15, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L21
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$8, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	%r14d, %r8d
	movl	%ebp, %ecx
	movl	$256, %edx
	call	_Z38__device_stub__Z12MovAvgKernelPfPKfiiiPfPKfiii
.L14:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L15
	movq	stderr(%rip), %rdi
	movl	%eax, %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rdx
	call	__fprintf_chk@PLT
	jmp	.L10
.L15:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L10
.L21:
	leaq	.LC2(%rip), %rdx
.L20:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L10:
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z14MovAvgWithCudaPfPKfmi, .-_Z14MovAvgWithCudaPfPKfmi
	.section	.rodata.str1.1
.LC4:
	.string	"addWithCuda failed!"
.LC5:
	.string	"cudaDeviceReset failed!"
.LC6:
	.string	"%f \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	leaq	-77824(%rsp), %r11
	.cfi_def_cfa 11, 77856
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$2192, %rsp
	.cfi_def_cfa_offset 80048
	movl	$10000, %ecx
	movq	%fs:40, %rax
	movq	%rax, 80008(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	leaq	8(%rsp), %rsi
	rep stosl
.L24:
	cvtsi2ssl	%ecx, %xmm0
	movss	%xmm0, (%rsi,%rcx,4)
	incq	%rcx
	cmpq	$10000, %rcx
	jne	.L24
	xorl	%eax, %eax
	leaq	40008(%rsp), %rdi
	movl	$10000, %edx
	rep stosl
	leaq	40008(%rsp), %rbp
	movl	$15, %ecx
	movq	%rbp, %rdi
	call	_Z14MovAvgWithCudaPfPKfmi
	leaq	.LC4(%rip), %rdx
	testl	%eax, %eax
	jne	.L35
	call	cudaDeviceReset@PLT
	xorl	%ebx, %ebx
	leaq	.LC6(%rip), %r12
	testl	%eax, %eax
	je	.L27
	leaq	.LC5(%rip), %rdx
.L35:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %eax
	jmp	.L23
.L27:
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	movq	%r12, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%rbx
	cmpq	$10000, %rbx
	jne	.L27
	call	getchar@PLT
	xorl	%eax, %eax
.L23:
	movq	80008(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$80016, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z12MovAvgKernelPfPKfiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12MovAvgKernelPfPKfiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include "hip/hip_runtime.h"


#include <stdio.h>

hipError_t MovAvgWithCuda(float *result, const float *input, size_t size, int avgWindowSize);

__global__ void MovAvgKernel(float *result, const float *input, int threadCount, int elementsCount, const int avgWindowSize)
{
    int idx = threadIdx.x;

	int uniqueElementsForThread = elementsCount/ threadCount;
	int maxIdxForThread = (idx+1)*uniqueElementsForThread + avgWindowSize;
	if(idx == threadCount - 1) maxIdxForThread = elementsCount - 1;

	float sum = 0;

	//initialize first
	for(int i=0; i<avgWindowSize; i++)
	{
		float element = (float)input[uniqueElementsForThread*idx + i]/(float)avgWindowSize;
		sum += element;
	}

	int currentInd = uniqueElementsForThread*idx + avgWindowSize -1;
	result[currentInd] = sum;

	//run through
	while(currentInd<maxIdxForThread)
	{
		currentInd++;
	
		sum -= input[currentInd - avgWindowSize]/(float)avgWindowSize;
		
		sum += input[currentInd]/(float)avgWindowSize;

		result[currentInd] = sum;
	}
}

int main()
{
    const int arraySize = 10000;

	const int avgWindowSize = 15;
	 
	float a[arraySize] = {0};
	for(int i=0; i<arraySize; i++)
	{
		a[i] = i;
	}

    float result[arraySize] = { 0 };

    // Add vectors in parallel.
    hipError_t cudaStatus = MovAvgWithCuda(result, a, arraySize, avgWindowSize);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "addWithCuda failed!");
        return 1;
    }

    // cudaDeviceReset must be called before exiting in order for profiling and
    // tracing tools such as Nsight and Visual Profiler to show complete traces.
    cudaStatus = hipDeviceReset();

    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipDeviceReset failed!");
        return 1;
    }
	
	for(int i = 0; i< arraySize; i++ )
	{
		printf("%f \n", result[i]);
	}

	getchar();

    return 0;
}

// Helper function for using CUDA to add vectors in parallel.
hipError_t MovAvgWithCuda(float *result, const float *input, size_t size, int avgWindowSize)
{
	const int BLOCKS = 1;
	const int THREADS = 256;

    float *dev_input = 0;
    float *dev_result = 0;
    hipError_t cudaStatus;

    // Choose which GPU to run on, change this on a multi-GPU system.
    cudaStatus = hipSetDevice(0);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipSetDevice failed!  Do you have a CUDA-capable GPU installed?");
        goto Error;
    }

    // Allocate GPU buffers for three vectors (two input, one output)    .
    cudaStatus = hipMalloc((void**)&dev_result, size * sizeof(float));
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMalloc failed!");
        goto Error;
    }

    cudaStatus = hipMalloc((void**)&dev_input, size * sizeof(float));
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMalloc failed!");
        goto Error;
    }
	
    // Copy input vectors from host memory to GPU buffers.
    cudaStatus = hipMemcpy(dev_input, input, size * sizeof(float), hipMemcpyHostToDevice);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMemcpy failed!");
        goto Error;
    }

    // Launch a kernel on the GPU with one thread for each element.
    MovAvgKernel<<<BLOCKS, THREADS>>>(dev_result, dev_input, THREADS, size, avgWindowSize);

    // cudaDeviceSynchronize waits for the kernel to finish, and returns
    // any errors encountered during the launch.
    cudaStatus = hipDeviceSynchronize();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
        goto Error;
    }

    // Copy output vector from GPU buffer to host memory.
    cudaStatus = hipMemcpy(result, dev_result, size * sizeof(float), hipMemcpyDeviceToHost);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMemcpy failed!");
        goto Error;
    }

Error:
    hipFree(dev_result);
    hipFree(dev_input);
    
    return cudaStatus;
}

	.text
	.file	"kernel.hip"
	.globl	_Z27__device_stub__MovAvgKernelPfPKfiii # -- Begin function _Z27__device_stub__MovAvgKernelPfPKfiii
	.type	_Z27__device_stub__MovAvgKernelPfPKfiii,@function
_Z27__device_stub__MovAvgKernelPfPKfiii: # @_Z27__device_stub__MovAvgKernelPfPKfiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12MovAvgKernelPfPKfiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__MovAvgKernelPfPKfiii, .Lfunc_end0-_Z27__device_stub__MovAvgKernelPfPKfiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$80000, %rsp                    # imm = 0x13880
	.cfi_def_cfa_offset 80016
	.cfi_offset %rbx, -16
	movq	%rsp, %rdi
	xorl	%ebx, %ebx
	movl	$40000, %edx                    # imm = 0x9C40
	xorl	%esi, %esi
	callq	memset@PLT
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebx, %xmm0
	movss	%xmm0, (%rsp,%rbx,4)
	incq	%rbx
	cmpq	$10000, %rbx                    # imm = 0x2710
	jne	.LBB1_1
# %bb.2:
	leaq	40000(%rsp), %rbx
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%rsp, %rsi
	movl	$10000, %edx                    # imm = 0x2710
	movq	%rbx, %rdi
	movl	$15, %ecx
	callq	_Z14MovAvgWithCudaPfPKfmi
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.5:
	callq	hipDeviceReset
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.6:                                # %.preheader.preheader
	xorl	%ebx, %ebx
.LBB1_7:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	40000(%rsp,%rbx,4), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	incq	%rbx
	cmpq	$10000, %rbx                    # imm = 0x2710
	jne	.LBB1_7
# %bb.8:
	callq	getchar
	xorl	%eax, %eax
.LBB1_9:
	addq	$80000, %rsp                    # imm = 0x13880
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB1_3:
	.cfi_def_cfa_offset 80016
	movq	stderr(%rip), %rcx
	movl	$.L.str, %edi
	movl	$19, %esi
	jmp	.LBB1_4
.LBB1_10:
	movq	stderr(%rip), %rcx
	movl	$.L.str.1, %edi
	movl	$22, %esi
.LBB1_4:
	movl	$1, %edx
	callq	fwrite@PLT
	movl	$1, %eax
	jmp	.LBB1_9
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z14MovAvgWithCudaPfPKfmi       # -- Begin function _Z14MovAvgWithCudaPfPKfmi
	.type	_Z14MovAvgWithCudaPfPKfmi,@function
_Z14MovAvgWithCudaPfPKfmi:              # @_Z14MovAvgWithCudaPfPKfmi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %r14
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)
	movq	%rax, 8(%rsp)
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB2_1
# %bb.2:
	leaq	(,%r12,4), %r15
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_3
# %bb.6:
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_3
# %bb.7:
	movq	16(%rsp), %rdi
	movq	%r13, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.9:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	255(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_11
# %bb.10:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movl	%r12d, %ecx
	movl	%ebp, %r8d
	callq	_Z27__device_stub__MovAvgKernelPfPKfiii
.LBB2_11:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.13:
	movq	8(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%ebx, %ebx
	testl	%eax, %eax
	je	.LBB2_15
# %bb.14:
	movl	%eax, %ebp
	movq	stderr(%rip), %rcx
	movl	$.L.str.5, %edi
	movl	$17, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	movl	%ebp, %ebx
	jmp	.LBB2_15
.LBB2_3:
	movl	%eax, %ebx
	movq	stderr(%rip), %rcx
	movl	$.L.str.4, %edi
	jmp	.LBB2_4
.LBB2_1:
	movl	%eax, %ebx
	movq	stderr(%rip), %rcx
	movl	$.L.str.3, %edi
	movl	$63, %esi
	jmp	.LBB2_5
.LBB2_8:
	movl	%eax, %ebx
	movq	stderr(%rip), %rcx
	movl	$.L.str.5, %edi
.LBB2_4:
	movl	$17, %esi
.LBB2_5:
	movl	$1, %edx
	callq	fwrite@PLT
.LBB2_15:
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	%ebx, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_12:
	.cfi_def_cfa_offset 80
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str.6, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_15
.Lfunc_end2:
	.size	_Z14MovAvgWithCudaPfPKfmi, .Lfunc_end2-_Z14MovAvgWithCudaPfPKfmi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12MovAvgKernelPfPKfiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12MovAvgKernelPfPKfiii,@object # @_Z12MovAvgKernelPfPKfiii
	.section	.rodata,"a",@progbits
	.globl	_Z12MovAvgKernelPfPKfiii
	.p2align	3, 0x0
_Z12MovAvgKernelPfPKfiii:
	.quad	_Z27__device_stub__MovAvgKernelPfPKfiii
	.size	_Z12MovAvgKernelPfPKfiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"addWithCuda failed!"
	.size	.L.str, 20

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"hipDeviceReset failed!"
	.size	.L.str.1, 23

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%f \n"
	.size	.L.str.2, 5

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"hipSetDevice failed!  Do you have a CUDA-capable GPU installed?"
	.size	.L.str.3, 64

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"hipMalloc failed!"
	.size	.L.str.4, 18

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"hipMemcpy failed!"
	.size	.L.str.5, 18

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"hipDeviceSynchronize returned error code %d after launching addKernel!\n"
	.size	.L.str.6, 72

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12MovAvgKernelPfPKfiii"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__MovAvgKernelPfPKfiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12MovAvgKernelPfPKfiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12MovAvgKernelPfPKfiii ; -- Begin function _Z12MovAvgKernelPfPKfiii
	.globl	_Z12MovAvgKernelPfPKfiii
	.p2align	8
	.type	_Z12MovAvgKernelPfPKfiii,@function
_Z12MovAvgKernelPfPKfiii:               ; @_Z12MovAvgKernelPfPKfiii
; %bb.0:
	s_load_b256 s[0:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s7, s4, 31
	s_ashr_i32 s11, s5, 31
	s_add_i32 s8, s4, s7
	s_add_i32 s12, s5, s11
	s_xor_b32 s8, s8, s7
	s_xor_b32 s12, s12, s11
	v_cvt_f32_u32_e32 v1, s8
	s_sub_i32 s10, 0, s8
	s_xor_b32 s7, s11, s7
	v_cvt_f32_i32_e32 v6, s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s9, v1
	s_mul_i32 s10, s10, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s10, s9, s10
	s_add_i32 s9, s9, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s9, s12, s9
	s_mul_i32 s10, s9, s8
	s_add_i32 s11, s9, 1
	s_sub_i32 s10, s12, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s12, s10, s8
	s_cmp_ge_u32 s10, s8
	s_cselect_b32 s9, s11, s9
	s_cselect_b32 s10, s12, s10
	s_add_i32 s11, s9, 1
	s_cmp_ge_u32 s10, s8
	s_cselect_b32 s8, s11, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s8, s8, s7
	s_sub_i32 s7, s8, s7
	s_cmp_lt_i32 s6, 1
	v_mul_lo_u32 v3, s7, v0
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_mov_b32_e32 v7, 0
	s_mov_b32 s8, s6
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v4, v[1:2], off
	s_add_i32 s8, s8, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s8, 0
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v5, null, v6, v6, v4
	v_div_scale_f32 v10, vcc_lo, v4, v6, v4
	v_rcp_f32_e32 v8, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v5, v8, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v8
	v_mul_f32_e32 v9, v10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, -v5, v9, v10
	v_fmac_f32_e32 v9, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -v5, v9, v10
	v_div_fmas_f32 v5, v5, v8, v9
	v_add_co_u32 v1, vcc_lo, v1, 4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v4, v5, v6, v4
	v_add_f32_e32 v7, v7, v4
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_4
.LBB0_3:
	v_mov_b32_e32 v7, 0
.LBB0_4:                                ; %._crit_edge
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v1, s6, -1, v3
	s_add_i32 s4, s4, -1
	v_add3_u32 v4, s6, s7, v3
	v_cmp_eq_u32_e32 vcc_lo, s4, v0
	s_add_i32 s5, s5, -1
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s4, exec_lo
	v_cndmask_b32_e64 v0, v4, s5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v4, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
	global_store_b32 v[4:5], v7, off
	v_cmpx_lt_i32_e64 v1, v0
	s_cbranch_execz .LBB0_7
; %bb.5:                                ; %.lr.ph50
	v_add_co_u32 v4, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	s_lshl_b64 s[0:1], s[6:7], 2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	s_sub_u32 s2, 0, s0
	s_subb_u32 s3, 0, s1
	s_mov_b32 s4, 0
.LBB0_6:                                ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v8, vcc_lo, v4, s2
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v8, v[8:9], off
	global_load_b32 v9, v[4:5], off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v10, null, v6, v6, v8
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v12, null, v6, v6, v9
	v_div_scale_f32 v11, vcc_lo, v8, v6, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v14, v10
	v_rcp_f32_e32 v15, v12
	v_div_scale_f32 v13, s1, v9, v6, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v16, -v10, v14, 1.0
	v_add_nc_u32_e32 v1, 1, v1
	v_fma_f32 v17, -v12, v15, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v14, v16, v14
	v_cmp_ge_i32_e64 s0, v1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v15, v17, v15 :: v_dual_mul_f32 v16, v11, v14
	s_or_b32 s4, s0, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v18, -v10, v16, v11
	v_dual_mul_f32 v17, v13, v15 :: v_dual_fmac_f32 v16, v18, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v19, -v12, v17, v13
	v_fma_f32 v10, -v10, v16, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v17, v19, v15
	v_div_fmas_f32 v10, v10, v14, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v11, -v12, v17, v13
	s_mov_b32 vcc_lo, s1
	v_div_fixup_f32 v8, v10, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v11, v11, v15, v17
	v_sub_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v9, v11, v6, v9
	v_add_f32_e32 v7, v7, v9
	global_store_b32 v[2:3], v7, off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_6
.LBB0_7:                                ; %._crit_edge51
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12MovAvgKernelPfPKfiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 13
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12MovAvgKernelPfPKfiii, .Lfunc_end0-_Z12MovAvgKernelPfPKfiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 824
; NumSgprs: 15
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 15
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12MovAvgKernelPfPKfiii
    .private_segment_fixed_size: 0
    .sgpr_count:     15
    .sgpr_spill_count: 0
    .symbol:         _Z12MovAvgKernelPfPKfiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     20
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
