/*
 * Author: Kasjan Siwek
 * 
 * Application simulates NxN masses connected by springs. At time 0 we place
 * M charges in the system. Each charge causes nearby masses (those that
 * are in radius R_m from the charge) to instantly travel to the middle
 * of said charge. Those masses then stay there infinetely. We then 
 * simulate how the rest of the system behaves till it stops (due to
 * friction).
 */

#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <device_functions.h>

#include <iostream>
#include <cfloat>
#include <stdio.h>

#define BLOCK_SIZE 16

#define GAMMA 0.999
#define DT 0.01
#define EPSILON 1e-3

// Simulates one step of simulation
__global__ void simulate(int N, float K, float *vel_x, float *vel_y, float *pos_x, float *pos_y, float *b_vel_x, float *b_vel_y, float *b_pos_x, float *b_pos_y, int * last_ch) {
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	
	float f_x = 0;
	float f_y = 0;
	
	if (row < N - 1 && col < N - 1
			&& row != 0 && col != 0
			&& vel_x[row * N + col]!= FLT_MAX
			&& vel_y[row * N + col] != FLT_MAX) {

		float p_xl = pos_x[(row - 1) * N + col];
		float p_xb = pos_x[row * N + col - 1];
		float p_x = pos_x[row * N + col];
		float p_xt = pos_x[row * N + col + 1];
		float p_xr = pos_x[(row + 1) * N + col];
		
		float p_yl = pos_y[(row - 1) * N + col];
		float p_yb = pos_y[row * N + col - 1];
		float p_y = pos_y[row * N + col];
		float p_yt = pos_y[row * N + col + 1];
		float p_yr = pos_y[(row + 1) * N + col];
		
		float v_x = vel_x[row * N + col];

		float v_y = vel_y[row * N + col];

		b_pos_x[row * N + col] = p_x + v_x * DT;
		b_pos_y[row * N + col] = p_y + v_y * DT;

		f_x = K * (p_xl + p_xr + p_xt + p_xb - 4 * p_x);
		f_y = K * (p_yl + p_yr + p_yt + p_yb - 4 * p_y);

		b_vel_x[row * N + col] = v_x * GAMMA + f_x * DT;
		b_vel_y[row * N + col] = v_y * GAMMA + f_y * DT;
	}
	
	if ((abs(f_x) > EPSILON || abs(f_y) > EPSILON)) {
		*last_ch += 1;
	}
}

int main() {
	cudaError_t err = cudaSuccess;

	int N, M;
	float K;
	std::cin >> N >> M >> K;

	int numOfElements = N * N;
	size_t size = numOfElements * sizeof(float);

	// Malloc on host
	float *h_velocity_x = (float *)malloc(size);
	float *h_velocity_y = (float *)malloc(size);
	float *h_position_x = (float *)malloc(size);
	float *h_position_y = (float *)malloc(size);

	// Initialization
	for (int i = 0; i < numOfElements; ++i) {
		int x = i / N;
		int y = i % N;
		h_position_x[i] = x;
		h_position_y[i] = y;
		h_velocity_x[i] = 0;
		h_velocity_y[i] = 0;
        // I assume that neither mass is gonna reach FLT_MAX velocity,
        // so I save that value for static masses
		if (x == 0 || y == 0) {
			h_velocity_x[i] = FLT_MAX;
			h_velocity_y[i] = FLT_MAX;
		}
	}

	// Initializing charges
	for (int k = 0; k < M; ++k) {
		float X, Y, R;
		std::cin >> X >> Y >> R;
		for (int i = 0; i < numOfElements; ++i) {
				int x = i / N;
				int y = i % N;
				if ( (X-x)*(X-x) + (Y-y)*(Y-y) <= R*R ) {
					h_position_x[i] = X;
					h_position_y[i] = Y;
					h_velocity_x[i] = FLT_MAX;
					h_velocity_y[i] = FLT_MAX;
				}
			}
	}

	// Device malloc
	float *d_velocity_x = NULL;
    cudaMalloc((void **)&d_velocity_x, size);
	float *d_velocity_y = NULL;
	cudaMalloc((void **)&d_velocity_y, size);
	float *d_position_x = NULL;
	cudaMalloc((void **)&d_position_x, size);
	float *d_position_y = NULL;
	cudaMalloc((void **)&d_position_y, size);

	float *d_velocity_x2 = NULL;
    cudaMalloc((void **)&d_velocity_x2, size);
	float *d_velocity_y2 = NULL;
	cudaMalloc((void **)&d_velocity_y2, size);
	float *d_position_x2 = NULL;
	cudaMalloc((void **)&d_position_x2, size);
	float *d_position_y2 = NULL;
	cudaMalloc((void **)&d_position_y2, size);

	int *counter = NULL;
	cudaMalloc((void **)&counter, sizeof(int));

	// Initialize eps counter
	int aux_cnt = 1;
	cudaMemcpy(counter, &aux_cnt, sizeof(int), cudaMemcpyHostToDevice);

	// Copy data to device
	cudaMemcpy(d_velocity_x, h_velocity_x, size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_velocity_y, h_velocity_y, size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_position_x, h_position_x, size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_position_y, h_position_y, size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_velocity_x2, h_velocity_x, size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_velocity_y2, h_velocity_y, size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_position_x2, h_position_x, size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_position_y2, h_position_y, size, cudaMemcpyHostToDevice);

	// Invoke kernel
	dim3 dimBlock(BLOCK_SIZE, 2 * BLOCK_SIZE);
	dim3 dimGrid((N + dimBlock.x - 1) / dimBlock.x, (N + dimBlock.y - 1) / dimBlock.y);

	bool parity = true;
	float *vel_x, *b_vel_x, *vel_y, *b_vel_y, *pos_x, *b_pos_x, *pos_y, *b_pos_y;
	int change;
	int previous = 0;
	int last_change;
	do {

		vel_x = parity ? d_velocity_x : d_velocity_x2;
		vel_y = parity ? d_velocity_y : d_velocity_y2;
		pos_x = parity ? d_position_x : d_position_x2;
		pos_y = parity ? d_position_y : d_position_y2;

		b_vel_x = parity ? d_velocity_x2 : d_velocity_x;
		b_vel_y = parity ? d_velocity_y2 : d_velocity_y;
		b_pos_x = parity ? d_position_x2 : d_position_x;
		b_pos_y = parity ? d_position_y2 : d_position_y;

		parity = parity ? false : true;

		simulate<<<dimGrid, dimBlock>>>(N, K, vel_x, vel_y, pos_x, pos_y, b_vel_x, b_vel_y, b_pos_x, b_pos_y, counter);

		cudaMemcpy(&last_change, counter, sizeof(int), cudaMemcpyDeviceToHost);

		change = last_change - previous;
		previous = last_change;
	} while (change);

	cudaDeviceSynchronize();

	err = cudaGetLastError();

	if (err != cudaSuccess)
	{
	    fprintf(stderr, "Failed to launch simulate kernel (error code %s)!\n", cudaGetErrorString(err));
	    exit(EXIT_FAILURE);
	}
	
	// Copy data back to host
	cudaMemcpy(h_velocity_x, parity ? d_velocity_x2 : d_velocity_x, size, cudaMemcpyDeviceToHost);
	cudaMemcpy(h_velocity_y, parity ? d_velocity_y2 : d_velocity_y, size, cudaMemcpyDeviceToHost);
	cudaMemcpy(h_position_x, parity ? d_position_x2 : d_position_x, size, cudaMemcpyDeviceToHost);
	cudaMemcpy(h_position_y, parity ? d_position_y2 : d_position_y, size, cudaMemcpyDeviceToHost);

	// Free memory on device
	cudaFree(d_velocity_x);
	cudaFree(d_velocity_y);
	cudaFree(d_position_x);
	cudaFree(d_position_y);
	cudaFree(d_velocity_x2);
	cudaFree(d_velocity_y2);
	cudaFree(d_position_x2);
	cudaFree(d_position_y2);
	cudaFree(counter);

	// Print data
	for (int i = 0; i < numOfElements; ++i) {
		std::cout << h_position_x[i] << " " << h_position_y[i] << std::endl;
	}

	// Free memory on host
	free(h_position_x);
	free(h_position_y);
	free(h_velocity_x);
	free(h_velocity_y);

	return 0;
}

	.file	"tmpxft_00328e4c_00000000-6_springs.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z45__device_stub__Z8simulateifPfS_S_S_S_S_S_S_PiifPfS_S_S_S_S_S_S_Pi
	.type	_Z45__device_stub__Z8simulateifPfS_S_S_S_S_S_S_PiifPfS_S_S_S_S_S_S_Pi, @function
_Z45__device_stub__Z8simulateifPfS_S_S_S_S_S_S_PiifPfS_S_S_S_S_S_S_Pi:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$248, %rsp
	.cfi_def_cfa_offset 256
	movq	256(%rsp), %rax
	movl	%edi, 76(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	264(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	272(%rsp), %rax
	movq	%rcx, 48(%rsp)
	leaq	88(%rsp), %rcx
	movq	%rax, 8(%rsp)
	movq	280(%rsp), %rax
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, (%rsp)
	movss	%xmm0, 72(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	leaq	76(%rsp), %rax
	movl	$1, 104(%rsp)
	movq	%rax, 144(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 216(%rsp)
	movq	%rsp, %rax
	movq	%rax, 224(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	88(%rsp)
	.cfi_def_cfa_offset 264
	leaq	_Z8simulateifPfS_S_S_S_S_S_S_Pi(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 272
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	160(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 264
	popq	%rdx
	.cfi_def_cfa_offset 256
.L2:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$248, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z45__device_stub__Z8simulateifPfS_S_S_S_S_S_S_PiifPfS_S_S_S_S_S_S_Pi, .-_Z45__device_stub__Z8simulateifPfS_S_S_S_S_S_S_PiifPfS_S_S_S_S_S_S_Pi
	.globl	_Z8simulateifPfS_S_S_S_S_S_S_Pi
	.type	_Z8simulateifPfS_S_S_S_S_S_S_Pi, @function
_Z8simulateifPfS_S_S_S_S_S_S_Pi:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z8simulateifPfS_S_S_S_S_S_S_PiifPfS_S_S_S_S_S_S_Pi
	.cfi_endproc
.LFE3661:
	.size	_Z8simulateifPfS_S_S_S_S_S_S_Pi, .-_Z8simulateifPfS_S_S_S_S_S_S_Pi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Failed to launch simulate kernel (error code %s)!\n"
.LC3:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	_ZSt3cin(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r15, %rdi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$216, %rsp
	.cfi_def_cfa_offset 272
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	84(%rsp), %rsi
	call	_ZNSirsERi@PLT
	leaq	88(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSirsERi@PLT
	leaq	92(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSi10_M_extractIfEERSiRT_@PLT
	movl	84(%rsp), %r14d
	movl	%r14d, %eax
	imull	%r14d, %eax
	movl	%eax, 56(%rsp)
	cltq
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movss	.LC1(%rip), %xmm0
	xorl	%ecx, %ecx
	movq	%rax, %r12
.L9:
	movl	%ecx, %eax
	cmpl	%ecx, 56(%rsp)
	jle	.L42
	cltd
	movl	$0x00000000, 0(%rbp,%rcx,4)
	idivl	%r14d
	movl	$0x00000000, (%rbx,%rcx,4)
	cvtsi2ssl	%eax, %xmm1
	movss	%xmm1, 0(%r13,%rcx,4)
	cvtsi2ssl	%edx, %xmm1
	movss	%xmm1, (%r12,%rcx,4)
	testl	%eax, %eax
	je	.L36
	testl	%edx, %edx
	jne	.L10
.L36:
	movss	%xmm0, 0(%rbp,%rcx,4)
	movss	%xmm0, (%rbx,%rcx,4)
.L10:
	incq	%rcx
	jmp	.L9
.L42:
	xorl	%r14d, %r14d
.L13:
	leaq	168(%rsp), %rax
	cmpl	%r14d, 88(%rsp)
	movq	%rax, 16(%rsp)
	jle	.L43
	movq	16(%rsp), %rsi
	movq	%r15, %rdi
	call	_ZNSi10_M_extractIfEERSiRT_@PLT
	leaq	176(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSi10_M_extractIfEERSiRT_@PLT
	leaq	188(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSi10_M_extractIfEERSiRT_@PLT
	movl	84(%rsp), %esi
	xorl	%ecx, %ecx
	movss	168(%rsp), %xmm2
	movss	176(%rsp), %xmm3
	movss	188(%rsp), %xmm4
.L14:
	movl	%ecx, %eax
	cmpl	%ecx, 56(%rsp)
	jle	.L44
	cltd
	movaps	%xmm2, %xmm0
	idivl	%esi
	cvtsi2ssl	%eax, %xmm1
	cvtsi2ssl	%edx, %xmm5
	subss	%xmm1, %xmm0
	movaps	%xmm3, %xmm1
	subss	%xmm5, %xmm1
	mulss	%xmm0, %xmm0
	mulss	%xmm1, %xmm1
	addss	%xmm1, %xmm0
	movaps	%xmm4, %xmm1
	mulss	%xmm4, %xmm1
	comiss	%xmm0, %xmm1
	jb	.L15
	movl	$0x7f7fffff, 0(%rbp,%rcx,4)
	movl	$0x7f7fffff, (%rbx,%rcx,4)
	movss	%xmm2, 0(%r13,%rcx,4)
	movss	%xmm3, (%r12,%rcx,4)
.L15:
	incq	%rcx
	jmp	.L14
.L44:
	incl	%r14d
	jmp	.L13
.L43:
	movq	8(%rsp), %rsi
	xorl	%eax, %eax
	leaq	104(%rsp), %rdi
	xorl	%r14d, %r14d
	movq	%rax, 104(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	xorl	%edx, %edx
	leaq	112(%rsp), %rdi
	movq	%rdx, 112(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	xorl	%ecx, %ecx
	leaq	120(%rsp), %rdi
	movq	%rcx, 120(%rsp)
	call	cudaMalloc@PLT
	xorl	%esi, %esi
	leaq	128(%rsp), %rdi
	movq	%rsi, 128(%rsp)
	movq	8(%rsp), %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	xorl	%edi, %edi
	movq	%rdi, 136(%rsp)
	leaq	136(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	xorl	%r8d, %r8d
	leaq	144(%rsp), %rdi
	movq	%r8, 144(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	xorl	%r9d, %r9d
	leaq	152(%rsp), %rdi
	movq	%r9, 152(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	xorl	%r10d, %r10d
	leaq	160(%rsp), %rdi
	movq	%r10, 160(%rsp)
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	xorl	%r11d, %r11d
	movl	$4, %esi
	movq	%r11, 168(%rsp)
	call	cudaMalloc@PLT
	leaq	96(%rsp), %rsi
	movl	$1, %ecx
	movq	168(%rsp), %rdi
	movl	$4, %edx
	movl	$1, 96(%rsp)
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	104(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	112(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	120(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	%r12, %rsi
	movq	128(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	%rbp, %rsi
	movq	136(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	%rbx, %rsi
	movq	144(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	%r13, %rsi
	movq	152(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	%r12, %rsi
	movq	160(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	84(%rsp), %eax
	movl	%r14d, 60(%rsp)
	movb	$1, %r14b
	movl	$1, 184(%rsp)
	movl	$1, 196(%rsp)
	leal	15(%rax), %edx
	addl	$31, %eax
	shrl	$4, %edx
	shrl	$5, %eax
	movl	%edx, 188(%rsp)
	movl	%eax, 192(%rsp)
.L21:
	movq	136(%rsp), %rax
	movq	112(%rsp), %r10
	movq	120(%rsp), %r15
	movq	128(%rsp), %r11
	movq	%rax, 48(%rsp)
	movq	144(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	152(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	160(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	104(%rsp), %rax
	movq	%rax, 40(%rsp)
	testb	%r14b, %r14b
	je	.L34
	movq	16(%rsp), %rax
	movq	%r11, 16(%rsp)
	xorl	%r14d, %r14d
	movq	40(%rsp), %rdx
	movq	%rax, %r11
	movq	24(%rsp), %rax
	movq	%r15, 24(%rsp)
	movq	%rax, %r15
	movq	32(%rsp), %rax
	movq	%r10, 32(%rsp)
	movq	%rax, %r10
	movq	48(%rsp), %rax
	movq	%rdx, 48(%rsp)
	movq	%rax, 40(%rsp)
	jmp	.L19
.L34:
	movb	$1, %r14b
.L19:
	movabsq	$137438953488, %rax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	184(%rsp), %ecx
	movq	188(%rsp), %rdi
	movl	196(%rsp), %esi
	movq	%rax, %rdx
	movq	%r10, 72(%rsp)
	movq	%r11, 64(%rsp)
	movq	%rax, 176(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movq	64(%rsp), %r11
	movq	72(%rsp), %r10
	testl	%eax, %eax
	jne	.L20
	pushq	168(%rsp)
	.cfi_def_cfa_offset 280
	pushq	%r11
	.cfi_def_cfa_offset 288
	pushq	%r15
	.cfi_def_cfa_offset 296
	pushq	%r10
	.cfi_def_cfa_offset 304
	movq	72(%rsp), %r9
	movq	48(%rsp), %r8
	movq	56(%rsp), %rcx
	movq	64(%rsp), %rdx
	movq	80(%rsp), %rsi
	movss	124(%rsp), %xmm0
	movl	116(%rsp), %edi
	call	_Z45__device_stub__Z8simulateifPfS_S_S_S_S_S_S_PiifPfS_S_S_S_S_S_S_Pi
	addq	$32, %rsp
	.cfi_def_cfa_offset 272
.L20:
	movl	$4, %edx
	leaq	100(%rsp), %rdi
	movl	$2, %ecx
	movq	168(%rsp), %rsi
	call	cudaMemcpy@PLT
	movl	100(%rsp), %eax
	movl	60(%rsp), %edx
	cmpl	%edx, %eax
	je	.L45
	movl	%eax, 60(%rsp)
	jmp	.L21
.L45:
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L22
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L22:
	testb	%r14b, %r14b
	je	.L23
	movq	136(%rsp), %rsi
	jmp	.L24
.L23:
	movq	104(%rsp), %rsi
.L24:
	movq	8(%rsp), %rdx
	movl	$2, %ecx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	testb	%r14b, %r14b
	je	.L25
	movq	144(%rsp), %rsi
	jmp	.L26
.L25:
	movq	112(%rsp), %rsi
.L26:
	movq	8(%rsp), %rdx
	movl	$2, %ecx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	testb	%r14b, %r14b
	je	.L27
	movq	152(%rsp), %rsi
	jmp	.L28
.L27:
	movq	120(%rsp), %rsi
.L28:
	movq	8(%rsp), %rdx
	movl	$2, %ecx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	testb	%r14b, %r14b
	je	.L29
	movq	160(%rsp), %rsi
	jmp	.L30
.L29:
	movq	128(%rsp), %rsi
.L30:
	movq	8(%rsp), %rdx
	movl	$2, %ecx
	movq	%r12, %rdi
	xorl	%r15d, %r15d
	leaq	_ZSt4cout(%rip), %r14
	call	cudaMemcpy@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	144(%rsp), %rdi
	call	cudaFree@PLT
	movq	152(%rsp), %rdi
	call	cudaFree@PLT
	movq	160(%rsp), %rdi
	call	cudaFree@PLT
	movq	168(%rsp), %rdi
	call	cudaFree@PLT
.L31:
	cmpl	%r15d, 56(%rsp)
	jle	.L46
	movq	%r14, %rdi
	cvtss2sd	0(%r13,%r15,4), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	(%r12,%r15,4), %xmm0
	incq	%r15
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L31
.L46:
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$216, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z8simulateifPfS_S_S_S_S_S_S_Pi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8simulateifPfS_S_S_S_S_S_S_Pi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	2139095039
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 * Author: Kasjan Siwek
 * 
 * Application simulates NxN masses connected by springs. At time 0 we place
 * M charges in the system. Each charge causes nearby masses (those that
 * are in radius R_m from the charge) to instantly travel to the middle
 * of said charge. Those masses then stay there infinetely. We then 
 * simulate how the rest of the system behaves till it stops (due to
 * friction).
 */

#include "hip/hip_runtime.h"


#include <hip/device_functions.h>

#include <iostream>
#include <cfloat>
#include <stdio.h>

#define BLOCK_SIZE 16

#define GAMMA 0.999
#define DT 0.01
#define EPSILON 1e-3

// Simulates one step of simulation
__global__ void simulate(int N, float K, float *vel_x, float *vel_y, float *pos_x, float *pos_y, float *b_vel_x, float *b_vel_y, float *b_pos_x, float *b_pos_y, int * last_ch) {
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	
	float f_x = 0;
	float f_y = 0;
	
	if (row < N - 1 && col < N - 1
			&& row != 0 && col != 0
			&& vel_x[row * N + col]!= FLT_MAX
			&& vel_y[row * N + col] != FLT_MAX) {

		float p_xl = pos_x[(row - 1) * N + col];
		float p_xb = pos_x[row * N + col - 1];
		float p_x = pos_x[row * N + col];
		float p_xt = pos_x[row * N + col + 1];
		float p_xr = pos_x[(row + 1) * N + col];
		
		float p_yl = pos_y[(row - 1) * N + col];
		float p_yb = pos_y[row * N + col - 1];
		float p_y = pos_y[row * N + col];
		float p_yt = pos_y[row * N + col + 1];
		float p_yr = pos_y[(row + 1) * N + col];
		
		float v_x = vel_x[row * N + col];

		float v_y = vel_y[row * N + col];

		b_pos_x[row * N + col] = p_x + v_x * DT;
		b_pos_y[row * N + col] = p_y + v_y * DT;

		f_x = K * (p_xl + p_xr + p_xt + p_xb - 4 * p_x);
		f_y = K * (p_yl + p_yr + p_yt + p_yb - 4 * p_y);

		b_vel_x[row * N + col] = v_x * GAMMA + f_x * DT;
		b_vel_y[row * N + col] = v_y * GAMMA + f_y * DT;
	}
	
	if ((abs(f_x) > EPSILON || abs(f_y) > EPSILON)) {
		*last_ch += 1;
	}
}

int main() {
	hipError_t err = hipSuccess;

	int N, M;
	float K;
	std::cin >> N >> M >> K;

	int numOfElements = N * N;
	size_t size = numOfElements * sizeof(float);

	// Malloc on host
	float *h_velocity_x = (float *)malloc(size);
	float *h_velocity_y = (float *)malloc(size);
	float *h_position_x = (float *)malloc(size);
	float *h_position_y = (float *)malloc(size);

	// Initialization
	for (int i = 0; i < numOfElements; ++i) {
		int x = i / N;
		int y = i % N;
		h_position_x[i] = x;
		h_position_y[i] = y;
		h_velocity_x[i] = 0;
		h_velocity_y[i] = 0;
        // I assume that neither mass is gonna reach FLT_MAX velocity,
        // so I save that value for static masses
		if (x == 0 || y == 0) {
			h_velocity_x[i] = FLT_MAX;
			h_velocity_y[i] = FLT_MAX;
		}
	}

	// Initializing charges
	for (int k = 0; k < M; ++k) {
		float X, Y, R;
		std::cin >> X >> Y >> R;
		for (int i = 0; i < numOfElements; ++i) {
				int x = i / N;
				int y = i % N;
				if ( (X-x)*(X-x) + (Y-y)*(Y-y) <= R*R ) {
					h_position_x[i] = X;
					h_position_y[i] = Y;
					h_velocity_x[i] = FLT_MAX;
					h_velocity_y[i] = FLT_MAX;
				}
			}
	}

	// Device malloc
	float *d_velocity_x = NULL;
    hipMalloc((void **)&d_velocity_x, size);
	float *d_velocity_y = NULL;
	hipMalloc((void **)&d_velocity_y, size);
	float *d_position_x = NULL;
	hipMalloc((void **)&d_position_x, size);
	float *d_position_y = NULL;
	hipMalloc((void **)&d_position_y, size);

	float *d_velocity_x2 = NULL;
    hipMalloc((void **)&d_velocity_x2, size);
	float *d_velocity_y2 = NULL;
	hipMalloc((void **)&d_velocity_y2, size);
	float *d_position_x2 = NULL;
	hipMalloc((void **)&d_position_x2, size);
	float *d_position_y2 = NULL;
	hipMalloc((void **)&d_position_y2, size);

	int *counter = NULL;
	hipMalloc((void **)&counter, sizeof(int));

	// Initialize eps counter
	int aux_cnt = 1;
	hipMemcpy(counter, &aux_cnt, sizeof(int), hipMemcpyHostToDevice);

	// Copy data to device
	hipMemcpy(d_velocity_x, h_velocity_x, size, hipMemcpyHostToDevice);
	hipMemcpy(d_velocity_y, h_velocity_y, size, hipMemcpyHostToDevice);
	hipMemcpy(d_position_x, h_position_x, size, hipMemcpyHostToDevice);
	hipMemcpy(d_position_y, h_position_y, size, hipMemcpyHostToDevice);
	hipMemcpy(d_velocity_x2, h_velocity_x, size, hipMemcpyHostToDevice);
	hipMemcpy(d_velocity_y2, h_velocity_y, size, hipMemcpyHostToDevice);
	hipMemcpy(d_position_x2, h_position_x, size, hipMemcpyHostToDevice);
	hipMemcpy(d_position_y2, h_position_y, size, hipMemcpyHostToDevice);

	// Invoke kernel
	dim3 dimBlock(BLOCK_SIZE, 2 * BLOCK_SIZE);
	dim3 dimGrid((N + dimBlock.x - 1) / dimBlock.x, (N + dimBlock.y - 1) / dimBlock.y);

	bool parity = true;
	float *vel_x, *b_vel_x, *vel_y, *b_vel_y, *pos_x, *b_pos_x, *pos_y, *b_pos_y;
	int change;
	int previous = 0;
	int last_change;
	do {

		vel_x = parity ? d_velocity_x : d_velocity_x2;
		vel_y = parity ? d_velocity_y : d_velocity_y2;
		pos_x = parity ? d_position_x : d_position_x2;
		pos_y = parity ? d_position_y : d_position_y2;

		b_vel_x = parity ? d_velocity_x2 : d_velocity_x;
		b_vel_y = parity ? d_velocity_y2 : d_velocity_y;
		b_pos_x = parity ? d_position_x2 : d_position_x;
		b_pos_y = parity ? d_position_y2 : d_position_y;

		parity = parity ? false : true;

		simulate<<<dimGrid, dimBlock>>>(N, K, vel_x, vel_y, pos_x, pos_y, b_vel_x, b_vel_y, b_pos_x, b_pos_y, counter);

		hipMemcpy(&last_change, counter, sizeof(int), hipMemcpyDeviceToHost);

		change = last_change - previous;
		previous = last_change;
	} while (change);

	hipDeviceSynchronize();

	err = hipGetLastError();

	if (err != hipSuccess)
	{
	    fprintf(stderr, "Failed to launch simulate kernel (error code %s)!\n", hipGetErrorString(err));
	    exit(EXIT_FAILURE);
	}
	
	// Copy data back to host
	hipMemcpy(h_velocity_x, parity ? d_velocity_x2 : d_velocity_x, size, hipMemcpyDeviceToHost);
	hipMemcpy(h_velocity_y, parity ? d_velocity_y2 : d_velocity_y, size, hipMemcpyDeviceToHost);
	hipMemcpy(h_position_x, parity ? d_position_x2 : d_position_x, size, hipMemcpyDeviceToHost);
	hipMemcpy(h_position_y, parity ? d_position_y2 : d_position_y, size, hipMemcpyDeviceToHost);

	// Free memory on device
	hipFree(d_velocity_x);
	hipFree(d_velocity_y);
	hipFree(d_position_x);
	hipFree(d_position_y);
	hipFree(d_velocity_x2);
	hipFree(d_velocity_y2);
	hipFree(d_position_x2);
	hipFree(d_position_y2);
	hipFree(counter);

	// Print data
	for (int i = 0; i < numOfElements; ++i) {
		std::cout << h_position_x[i] << " " << h_position_y[i] << std::endl;
	}

	// Free memory on host
	free(h_position_x);
	free(h_position_y);
	free(h_velocity_x);
	free(h_velocity_y);

	return 0;
}

	.text
	.file	"springs.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z23__device_stub__simulateifPfS_S_S_S_S_S_S_Pi # -- Begin function _Z23__device_stub__simulateifPfS_S_S_S_S_S_S_Pi
	.type	_Z23__device_stub__simulateifPfS_S_S_S_S_S_S_Pi,@function
_Z23__device_stub__simulateifPfS_S_S_S_S_S_S_Pi: # @_Z23__device_stub__simulateifPfS_S_S_S_S_S_S_Pi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movss	%xmm0, (%rdi)
	leaq	56(%rsp), %r10
	movq	%rsi, (%r10)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%r10, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8simulateifPfS_S_S_S_S_S_S_Pi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__simulateifPfS_S_S_S_S_S_S_Pi, .Lfunc_end0-_Z23__device_stub__simulateifPfS_S_S_S_S_S_S_Pi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	12(%rsp), %rbx
	movl	$_ZSt3cin, %edi
	movq	%rbx, %rsi
	callq	_ZNSirsERi
	leaq	44(%rsp), %rsi
	movq	%rax, %rdi
	callq	_ZNSirsERi
	leaq	124(%rsp), %rsi
	movq	%rax, %rdi
	callq	_ZNSi10_M_extractIfEERSiRT_
	movl	(%rbx), %ebp
	movl	%ebp, %r14d
	imull	%r14d, %r14d
	leaq	(,%r14,4), %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r13, 136(%rsp)                 # 8-byte Spill
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r9
	movl	%ebp, 8(%rsp)                   # 4-byte Spill
	testl	%ebp, %ebp
	je	.LBB1_6
# %bb.1:                                # %.lr.ph.preheader
	cmpl	$1, %r14d
	movl	%r14d, %esi
	adcl	$0, %esi
	xorl	%edi, %edi
	movl	$2139095039, %r8d               # imm = 0x7F7FFFFF
	xorl	%ecx, %ecx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%ecx, %eax
	cltd
	idivl	8(%rsp)                         # 4-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r15,%rcx,4)
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edx, %xmm0
	movss	%xmm0, (%r9,%rcx,4)
	movl	%edi, (%r12,%rcx,4)
	movl	%edi, (%rbx,%rcx,4)
	testl	%eax, %eax
	je	.LBB1_4
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	testl	%edx, %edx
	jne	.LBB1_5
.LBB1_4:                                #   in Loop: Header=BB1_2 Depth=1
	movl	%r8d, (%r12,%rcx,4)
	movl	%r8d, (%rbx,%rcx,4)
.LBB1_5:                                #   in Loop: Header=BB1_2 Depth=1
	incq	%rcx
	cmpq	%rcx, %rsi
	jne	.LBB1_2
.LBB1_6:                                # %.preheader
	movq	%r9, 96(%rsp)                   # 8-byte Spill
	movq	%r15, 104(%rsp)                 # 8-byte Spill
	movq	%r14, 128(%rsp)                 # 8-byte Spill
	movq	%rbx, 48(%rsp)                  # 8-byte Spill
	cmpl	$0, 44(%rsp)
	jle	.LBB1_14
# %bb.7:                                # %.lr.ph135
	movq	128(%rsp), %rbx                 # 8-byte Reload
	cmpl	$1, %ebx
                                        # kill: def $ebx killed $ebx killed $rbx def $rbx
	adcl	$0, %ebx
	xorl	%r14d, %r14d
	leaq	24(%rsp), %rbp
	leaq	16(%rsp), %r13
	movl	$2139095039, %r15d              # imm = 0x7F7FFFFF
.LBB1_8:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_10 Depth 2
	movl	$_ZSt3cin, %edi
	leaq	32(%rsp), %rsi
	callq	_ZNSi10_M_extractIfEERSiRT_
	movq	%rax, %rdi
	movq	%rbp, %rsi
	callq	_ZNSi10_M_extractIfEERSiRT_
	movq	%rax, %rdi
	movq	%r13, %rsi
	callq	_ZNSi10_M_extractIfEERSiRT_
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	104(%rsp), %r8                  # 8-byte Reload
	movq	96(%rsp), %r9                   # 8-byte Reload
	je	.LBB1_13
# %bb.9:                                # %.lr.ph133
                                        #   in Loop: Header=BB1_8 Depth=1
	movl	12(%rsp), %esi
	movss	32(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	24(%rsp), %xmm1                 # xmm1 = mem[0],zero,zero,zero
	movss	16(%rsp), %xmm2                 # xmm2 = mem[0],zero,zero,zero
	mulss	%xmm2, %xmm2
	xorl	%ecx, %ecx
.LBB1_10:                               #   Parent Loop BB1_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%ecx, %eax
	cltd
	idivl	%esi
	xorps	%xmm3, %xmm3
	cvtsi2ss	%eax, %xmm3
	movaps	%xmm0, %xmm4
	xorps	%xmm5, %xmm5
	cvtsi2ss	%edx, %xmm5
	subss	%xmm3, %xmm4
	mulss	%xmm4, %xmm4
	movaps	%xmm1, %xmm3
	subss	%xmm5, %xmm3
	mulss	%xmm3, %xmm3
	addss	%xmm4, %xmm3
	ucomiss	%xmm3, %xmm2
	jb	.LBB1_12
# %bb.11:                               #   in Loop: Header=BB1_10 Depth=2
	movss	%xmm0, (%r8,%rcx,4)
	movss	%xmm1, (%r9,%rcx,4)
	movl	%r15d, (%r12,%rcx,4)
	movl	%r15d, (%rdi,%rcx,4)
.LBB1_12:                               #   in Loop: Header=BB1_10 Depth=2
	incq	%rcx
	cmpq	%rcx, %rbx
	jne	.LBB1_10
.LBB1_13:                               # %._crit_edge
                                        #   in Loop: Header=BB1_8 Depth=1
	incl	%r14d
	cmpl	44(%rsp), %r14d
	jl	.LBB1_8
.LBB1_14:                               # %._crit_edge136
	xorl	%ebp, %ebp
	leaq	32(%rsp), %r14
	movq	%rbp, (%r14)
	movq	%r14, %rdi
	movq	136(%rsp), %r13                 # 8-byte Reload
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %r15
	movq	%rbp, (%r15)
	movq	%r15, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbp, (%rdi)
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	88(%rsp), %rdi
	movq	%rbp, (%rdi)
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	80(%rsp), %rdi
	movq	%rbp, (%rdi)
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	72(%rsp), %rdi
	movq	%rbp, (%rdi)
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movq	%rbp, (%rdi)
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movq	%rbp, (%rdi)
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	112(%rsp), %rbx
	xorl	%eax, %eax
	movq	%rax, 144(%rsp)                 # 8-byte Spill
	movq	%rbp, (%rbx)
	movl	$4, %esi
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	196(%rsp), %rsi
	movl	$1, (%rsi)
	movq	(%rbx), %rdi
	movl	$4, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movq	48(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movq	104(%rsp), %r14                 # 8-byte Reload
	movq	%r14, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	88(%rsp), %rax
	movq	(%rax), %rdi
	movq	96(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	80(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r12, 152(%rsp)                 # 8-byte Spill
	movq	%r12, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	72(%rsp), %rax
	movq	(%rax), %rdi
	movq	%rbx, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	64(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r14, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	56(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	12(%rsp), %ecx
	leal	15(%rcx), %eax
	shrl	$4, %eax
	addl	$31, %ecx
	shrl	$5, %ecx
	shlq	$32, %rcx
	orq	%rax, %rcx
	movq	%rcx, 160(%rsp)                 # 8-byte Spill
	movb	$1, %bl
.LBB1_15:                               # =>This Inner Loop Header: Depth=1
	movl	%ebx, %r15d
	movq	32(%rsp), %rax
	movq	%rax, 184(%rsp)                 # 8-byte Spill
	movq	80(%rsp), %r13
	movq	24(%rsp), %rax
	movq	%rax, 176(%rsp)                 # 8-byte Spill
	movq	72(%rsp), %rbp
	movq	16(%rsp), %rax
	movq	%rax, 168(%rsp)                 # 8-byte Spill
	movq	64(%rsp), %rbx
	movq	88(%rsp), %r12
	movq	56(%rsp), %r14
	movq	160(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movabsq	$137438953488, %rdx             # imm = 0x2000000010
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_17
# %bb.16:                               #   in Loop: Header=BB1_15 Depth=1
	testb	$1, %r15b
	movq	%r12, %rax
	cmovneq	%r14, %rax
	movq	168(%rsp), %rsi                 # 8-byte Reload
	movq	%rsi, %r10
	cmovneq	%rbx, %r10
	movq	176(%rsp), %rdx                 # 8-byte Reload
	movq	%rdx, %r11
	cmovneq	%rbp, %r11
	movq	184(%rsp), %rcx                 # 8-byte Reload
	movq	%rcx, %r9
	cmovneq	%r13, %r9
	cmovneq	%r12, %r14
	cmovneq	%rsi, %rbx
	cmovneq	%rdx, %rbp
	cmovneq	%rcx, %r13
	movl	12(%rsp), %edi
	movss	124(%rsp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movq	%r13, %rsi
	movq	%rbp, %rdx
	movq	%rbx, %rcx
	movq	%r14, %r8
	pushq	112(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_Z23__device_stub__simulateifPfS_S_S_S_S_S_S_Pi
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB1_17:                               #   in Loop: Header=BB1_15 Depth=1
	movl	%r15d, %ebx
	xorb	$1, %bl
	movq	112(%rsp), %rsi
	movl	$4, %edx
	leaq	120(%rsp), %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	120(%rsp), %eax
	cmpl	144(%rsp), %eax                 # 4-byte Folded Reload
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, 144(%rsp)                 # 8-byte Spill
	jne	.LBB1_15
# %bb.18:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_23
# %bb.19:
	testb	$1, %r15b
	leaq	32(%rsp), %rax
	leaq	80(%rsp), %rcx
	cmovneq	%rax, %rcx
	movq	(%rcx), %rsi
	leaq	24(%rsp), %rax
	leaq	72(%rsp), %r13
	cmovneq	%rax, %r13
	leaq	16(%rsp), %rax
	leaq	64(%rsp), %r12
	cmovneq	%rax, %r12
	leaq	88(%rsp), %rax
	leaq	56(%rsp), %r14
	cmovneq	%rax, %r14
	movq	152(%rsp), %r15                 # 8-byte Reload
	movq	%r15, %rdi
	movq	136(%rsp), %rbx                 # 8-byte Reload
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%r13), %rsi
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%r12), %rsi
	movq	104(%rsp), %r13                 # 8-byte Reload
	movq	%r13, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%r14), %rsi
	movq	96(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	88(%rsp), %rdi
	callq	hipFree
	movq	80(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	112(%rsp), %rdi
	callq	hipFree
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	movq	128(%rsp), %r12                 # 8-byte Reload
	je	.LBB1_22
# %bb.20:                               # %.lr.ph139.preheader
	cmpl	$1, %r12d
	adcl	$0, %r12d
	xorl	%r14d, %r14d
.LBB1_21:                               # %.lr.ph139
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13,%r14,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbp,%r14,4), %xmm0
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r14
	cmpq	%r14, %r12
	jne	.LBB1_21
.LBB1_22:                               # %._crit_edge140
	movq	%r13, %rdi
	callq	free
	movq	%rbp, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	48(%rsp), %rdi                  # 8-byte Reload
	callq	free
	xorl	%eax, %eax
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_23:
	.cfi_def_cfa_offset 256
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8simulateifPfS_S_S_S_S_S_S_Pi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8simulateifPfS_S_S_S_S_S_S_Pi,@object # @_Z8simulateifPfS_S_S_S_S_S_S_Pi
	.section	.rodata,"a",@progbits
	.globl	_Z8simulateifPfS_S_S_S_S_S_S_Pi
	.p2align	3, 0x0
_Z8simulateifPfS_S_S_S_S_S_S_Pi:
	.quad	_Z23__device_stub__simulateifPfS_S_S_S_S_S_S_Pi
	.size	_Z8simulateifPfS_S_S_S_S_S_S_Pi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to launch simulate kernel (error code %s)!\n"
	.size	.L.str, 51

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" "
	.size	.L.str.1, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8simulateifPfS_S_S_S_S_S_S_Pi"
	.size	.L__unnamed_1, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__simulateifPfS_S_S_S_S_S_S_Pi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8simulateifPfS_S_S_S_S_S_S_Pi
	.addrsig_sym _ZSt3cin
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8simulateifPfS_S_S_S_S_S_S_Pi ; -- Begin function _Z8simulateifPfS_S_S_S_S_S_S_Pi
	.globl	_Z8simulateifPfS_S_S_S_S_S_S_Pi
	.p2align	8
	.type	_Z8simulateifPfS_S_S_S_S_S_S_Pi,@function
_Z8simulateifPfS_S_S_S_S_S_S_Pi:        ; @_Z8simulateifPfS_S_S_S_S_S_S_Pi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x5c
	s_load_b64 s[20:21], s[0:1], 0x0
	v_bfe_u32 v3, v0, 10, 10
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v5, 0
	s_mov_b32 s22, exec_lo
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_add_i32 s3, s20, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_8
; %bb.1:
	v_dual_mov_b32 v5, 0 :: v_dual_and_b32 v0, 0x3ff, v0
	s_and_b32 s2, s2, 0xffff
	v_cmp_ne_u32_e32 vcc_lo, 0, v1
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s14, s2, v[0:1]
	v_cmp_ne_u32_e64 s2, 0, v2
	v_cmp_gt_i32_e64 s3, s3, v2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_7
; %bb.2:
	v_mul_lo_u32 v7, v1, s20
	s_load_b512 s[4:19], s[0:1], 0x8
	v_mov_b32_e32 v6, 0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v0, v7, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f32_e32 0x7f7fffff, v3
	s_cbranch_execz .LBB0_6
; %bb.3:
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	s_mov_b32 s4, exec_lo
	v_mov_b32_e32 v6, 0
	global_load_b32 v4, v[4:5], off
	v_mov_b32_e32 v5, 0
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f32_e32 0x7f7fffff, v4
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_subrev_nc_u32_e32 v5, s20, v7
	v_add_co_u32 v9, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v5, v2
	s_mov_b32 s6, 0x47ae147b
	s_mov_b32 s7, 0x3f847ae1
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshl_add_u32 v7, s20, 1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v11, vcc_lo, s8, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, s9, v6, vcc_lo
	v_add_co_u32 v5, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	global_load_b32 v2, v[11:12], off
	v_add_co_u32 v11, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v12, vcc_lo, s9, v8, vcc_lo
	global_load_b32 v13, v[5:6], off
	v_add_co_u32 v5, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v8, vcc_lo
	global_load_b32 v14, v[11:12], off
	v_add_co_u32 v11, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v1, vcc_lo
	global_load_b32 v5, v[5:6], off
	global_load_b96 v[6:8], v[9:10], off offset:-4
	global_load_b96 v[9:11], v[11:12], off offset:-4
	s_mov_b32 s8, 0xd916872b
	s_mov_b32 s9, 0x3feff7ce
	s_waitcnt vmcnt(2)
	v_dual_add_f32 v2, v2, v14 :: v_dual_add_f32 v5, v13, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, v8, v2
	v_cvt_f64_f32_e32 v[15:16], v7
	v_cvt_f64_f32_e32 v[13:14], v4
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[17:18], v10
	v_dual_add_f32 v5, v11, v5 :: v_dual_add_f32 v2, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, -4.0, v7
	v_dual_add_f32 v6, v9, v5 :: v_dual_mul_f32 v5, s21, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v6, -4.0, v10
	v_cvt_f64_f32_e32 v[2:3], v3
	v_cvt_f64_f32_e32 v[8:9], v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, s21, v6
	v_cvt_f64_f32_e32 v[11:12], v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[7:8], v[8:9], s[6:7]
	v_mul_f64 v[9:10], v[11:12], s[6:7]
	v_fma_f64 v[11:12], v[2:3], s[6:7], v[15:16]
	v_fma_f64 v[15:16], v[13:14], s[6:7], v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[2:3], v[2:3], s[8:9], v[7:8]
	v_fma_f64 v[7:8], v[13:14], s[8:9], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_f32_f64_e32 v4, v[11:12]
	v_cvt_f32_f64_e32 v11, v[15:16]
	s_delay_alu instid0(VALU_DEP_4)
	v_cvt_f32_f64_e32 v12, v[2:3]
	v_add_co_u32 v2, vcc_lo, s16, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v1, vcc_lo
	v_cvt_f32_f64_e32 v13, v[7:8]
	v_add_co_u32 v7, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v8, vcc_lo, s19, v1, vcc_lo
	v_add_co_u32 v9, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v10, vcc_lo, s13, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s14, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s15, v1, vcc_lo
	global_store_b32 v[2:3], v4, off
	global_store_b32 v[7:8], v11, off
	global_store_b32 v[9:10], v12, off
	global_store_b32 v[0:1], v13, off
.LBB0_5:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_6:                                ; %Flow155
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_7:                                ; %Flow156
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_8:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s22
	v_cvt_f64_f32_e64 v[0:1], |v5|
	v_cvt_f64_f32_e64 v[2:3], |v6|
	s_mov_b32 s2, 0xd2f1a9fc
	s_mov_b32 s3, 0x3f50624d
	v_max_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, s[2:3], v[0:1]
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_10
; %bb.9:
	s_load_b64 s[0:1], s[0:1], 0x48
	s_waitcnt lgkmcnt(0)
	s_load_b32 s2, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
	global_store_b32 v0, v1, s[0:1]
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8simulateifPfS_S_S_S_S_S_S_Pi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 23
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8simulateifPfS_S_S_S_S_S_S_Pi, .Lfunc_end0-_Z8simulateifPfS_S_S_S_S_S_S_Pi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 912
; NumSgprs: 25
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 25
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         84
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         88
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         92
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         94
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         96
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         98
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         100
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         102
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         144
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 336
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8simulateifPfS_S_S_S_S_S_S_Pi
    .private_segment_fixed_size: 0
    .sgpr_count:     25
    .sgpr_spill_count: 0
    .symbol:         _Z8simulateifPfS_S_S_S_S_S_S_Pi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
