#include <stdio.h>
#include <random>
#include <chrono>
#include <iostream>

__device__
unsigned int floatFlip(unsigned int value)
{
	unsigned int mask = (-(value >> 31)) | 0x80000000;
	return value ^ mask;
}

__device__ 
unsigned int floatFlipInverse(unsigned int value)
{
	int mask = ((value >> 31) - 1) | 0x80000000;
	return value ^ mask;
}

__global__ 
void convertFloats(unsigned int* vals, int num_elems)
{
	int lid = threadIdx.x;
	int gid = lid + (blockDim.x * blockIdx.x);
	if(gid >= num_elems)
	{
		return;
	}
	vals[gid] = floatFlip(vals[gid]);
}

__global__ 
void invertFloats(unsigned int* vals, int num_elems)
{
	int lid = threadIdx.x;
	int gid = lid + (blockDim.x * blockIdx.x);
	if(gid >= num_elems)
	{
		return;
	}
	vals[gid] = floatFlipInverse(vals[gid]);
}

__global__
void markFlags(unsigned int* vals, uint4* flags, int dual_pos, int num_elems)
{
	int lid = threadIdx.x;
	int gid = lid + (blockDim.x * blockIdx.x);
	if(gid >= num_elems)
	{
		return;
	}

	unsigned int val = vals[gid];
	unsigned int mask = 3 << (dual_pos * 2);
	val &= mask;
	val >>= (dual_pos * 2);

	uint4 flag = {0,0,0,0};
	*((&flag.x) + val) = 1;
	flags[gid] = flag;
}

__global__
void scanExclusiveSumWithBlockTotals(uint4* in, uint4* out, uint4* block_totals, int num_elems)
{
	extern __shared__ uint4 sh_vals[];

	int lid = threadIdx.x;
	int gid = lid + (blockDim.x * blockIdx.x);
	if(gid >= num_elems)
	{
		return;
	}

	sh_vals[lid] = in[gid];
	__syncthreads();

	for(int offset = 1; offset < blockDim.x; offset <<= 1)
	{
		int left = lid - offset;
		uint4 left_val;
		if(left >= 0)
		{
			left_val = sh_vals[left];
		}
		__syncthreads();
		if(left >= 0)
		{	
			uint4 val = sh_vals[lid];
			val.x += left_val.x;
			val.y += left_val.y;
			val.z += left_val.z;
			val.w += left_val.w;
			sh_vals[lid] = val;
		}
		__syncthreads();
	}

	if(lid == 0)
	{
		uint4 flag = {0,0,0,0};
		out[gid] = flag;
	}
	else
	{
		out[gid] = sh_vals[lid - 1];
	}

	if(lid == blockDim.x - 1 || gid == num_elems - 1)
	{
		block_totals[blockIdx.x] = sh_vals[lid];
	}
}

__global__
void scanInclusiveSum(uint4* in, uint4* out, int num_elems)
{
	extern __shared__ uint4 sh_vals[];

	int lid = threadIdx.x;
	int gid = lid + (blockDim.x * blockIdx.x);
	if(gid >= num_elems)
	{
		return;
	}

	sh_vals[lid] = in[gid];
	__syncthreads();

	for(int offset = 1; offset < blockDim.x; offset <<= 1)
	{
		int left = lid - offset;
		uint4 left_val;
		if(left >= 0)
		{
			left_val = sh_vals[left];
		}
		__syncthreads();
		if(left >= 0)
		{	
			uint4 val = sh_vals[lid];
			val.x += left_val.x;
			val.y += left_val.y;
			val.z += left_val.z;
			val.w += left_val.w;
			sh_vals[lid] = val;
		}
		__syncthreads();
	}
	out[gid] = sh_vals[lid];
}

__global__
void addBlockTotals(uint4* fours, uint4* block_totals, int num_elems)
{
	int lid = threadIdx.x;
	int gid = lid + (blockDim.x * blockIdx.x);
	if(gid >= num_elems)
	{
		return;
	}
	if(blockIdx.x == 0)
	{
		return;
	}

	uint4 val = fours[gid];
	uint4 offsets = block_totals[blockIdx.x - 1];

	val.x += offsets.x;
	val.y += offsets.y;
	val.z += offsets.z;
	val.w += offsets.w;

	fours[gid] = val;
}

__global__
void scatterAddresses(unsigned int* vals_in, 
					unsigned int* vals_out, 
					uint4* flags, 
					uint4* addresses, 
					int dual_pos,
					uint4 offsets,
					int num_elems)
{
	int lid = threadIdx.x;
	int gid = lid + (blockDim.x * blockIdx.x);
	if(gid >= num_elems)
	{
		return;
	}

	unsigned int val = vals_in[gid];
	unsigned int mask = 3 << (dual_pos * 2);
	unsigned int val_anded = val & mask;
	val_anded >>= (dual_pos * 2);

	uint4 addr_list = addresses[gid];
	unsigned int addr = *((&addr_list.x) + val_anded);
	unsigned int offset = *((&offsets.x) + val_anded);
	addr += offset;
	vals_out[addr] = val;
}

void radixSort(float* h_vals, int num_elems)
{
	int num_threads = 1024;
	int num_blocks = ceil(num_elems / ((float) num_threads));

	unsigned int* d_vals;
	unsigned int* d_vals_buffer;
	uint4* d_flags;
	uint4* d_addresses;
	uint4* d_block_totals;

	cudaMalloc(&d_vals, sizeof(unsigned int) * num_elems);
	cudaMalloc(&d_vals_buffer, sizeof(unsigned int) * num_elems);
	cudaMalloc(&d_flags, sizeof(uint4) * num_elems);
	cudaMalloc(&d_addresses, sizeof(uint4) * num_elems);
	cudaMalloc(&d_block_totals, sizeof(uint4) * num_blocks);

	cudaMemcpy(d_vals, h_vals, sizeof(unsigned int) * num_elems, cudaMemcpyHostToDevice);

	convertFloats<<<num_blocks, num_threads>>>(d_vals, num_elems);
	for(int bit_pair = 0; bit_pair < 16; bit_pair++)
	{
		markFlags<<<num_blocks, num_threads>>>(d_vals, d_flags, bit_pair, num_elems);

		scanExclusiveSumWithBlockTotals<<<num_blocks, num_threads, sizeof(uint4) * num_threads>>>(d_flags, d_addresses, d_block_totals, num_elems);
		scanInclusiveSum<<<1, num_blocks, sizeof(uint4) * num_blocks>>>(d_block_totals, d_block_totals, num_blocks);
		addBlockTotals<<<num_blocks, num_threads>>>(d_addresses, d_block_totals, num_elems);
		
		uint4 totals = {0,0,0,0};
		cudaMemcpy(&totals, &d_block_totals[num_blocks - 1], sizeof(uint4), cudaMemcpyDeviceToHost);
		uint4 offsets = {0, totals.x, totals.x + totals.y, totals.x + totals.y + totals.z};

		scatterAddresses<<<num_blocks, num_threads>>>(d_vals, d_vals_buffer, d_flags, d_addresses, bit_pair, offsets, num_elems);

		unsigned int* temp = d_vals;
		d_vals = d_vals_buffer;
		d_vals_buffer = temp;
	}
	invertFloats<<<num_blocks, num_threads>>>(d_vals, num_elems);

	cudaMemcpy(h_vals, d_vals, sizeof(float) * num_elems, cudaMemcpyDeviceToHost);
}

int main()
{
	srand((int) time(NULL));
	int num_elems = 1024 * 1024;

	float* h_vals;
	h_vals = (float*) malloc(sizeof(float) * num_elems);

	for(int i = 0; i < num_elems; i++)
	{
		h_vals[i] = (((float) rand() / RAND_MAX) * 1000) - 500;
	}
	auto start = std::chrono::high_resolution_clock::now();
  	
  	radixSort(h_vals, num_elems);

	auto end = std::chrono::high_resolution_clock::now();
	auto elapsed = std::chrono::duration_cast<std::chrono::microseconds>(end - start) / 1000.0f;

	for(int i = 0; i < 100; i++)
	{
		//printf("%f \n", h_vals[i]);
	}

	for(int i = 1; i < num_elems; i++)
	{
		if(h_vals[i - 1] > h_vals[i])
		{
			printf("Error at index %d: %f > %f \n", i, h_vals[i - 1], h_vals[i]);
			break;
		}
	}

	std::cout << elapsed.count() << " milliseconds \n";
}






















	.file	"tmpxft_00363ffa_00000000-6_fast_radix_sort.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4827:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4827:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9floatFlipj
	.type	_Z9floatFlipj, @function
_Z9floatFlipj:
.LFB4818:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4818:
	.size	_Z9floatFlipj, .-_Z9floatFlipj
	.globl	_Z16floatFlipInversej
	.type	_Z16floatFlipInversej, @function
_Z16floatFlipInversej:
.LFB5591:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z9floatFlipj
	.cfi_endproc
.LFE5591:
	.size	_Z16floatFlipInversej, .-_Z16floatFlipInversej
	.globl	_Z34__device_stub__Z13convertFloatsPjiPji
	.type	_Z34__device_stub__Z13convertFloatsPjiPji, @function
_Z34__device_stub__Z13convertFloatsPjiPji:
.LFB4849:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z13convertFloatsPji(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L6:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4849:
	.size	_Z34__device_stub__Z13convertFloatsPjiPji, .-_Z34__device_stub__Z13convertFloatsPjiPji
	.globl	_Z13convertFloatsPji
	.type	_Z13convertFloatsPji, @function
_Z13convertFloatsPji:
.LFB4850:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z13convertFloatsPjiPji
	.cfi_endproc
.LFE4850:
	.size	_Z13convertFloatsPji, .-_Z13convertFloatsPji
	.globl	_Z33__device_stub__Z12invertFloatsPjiPji
	.type	_Z33__device_stub__Z12invertFloatsPjiPji, @function
_Z33__device_stub__Z12invertFloatsPjiPji:
.LFB4851:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12invertFloatsPji(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L12:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4851:
	.size	_Z33__device_stub__Z12invertFloatsPjiPji, .-_Z33__device_stub__Z12invertFloatsPjiPji
	.globl	_Z12invertFloatsPji
	.type	_Z12invertFloatsPji, @function
_Z12invertFloatsPji:
.LFB4852:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z12invertFloatsPjiPji
	.cfi_endproc
.LFE4852:
	.size	_Z12invertFloatsPji, .-_Z12invertFloatsPji
	.globl	_Z37__device_stub__Z9markFlagsPjP5uint4iiPjP5uint4ii
	.type	_Z37__device_stub__Z9markFlagsPjP5uint4iiPjP5uint4ii, @function
_Z37__device_stub__Z9markFlagsPjP5uint4iiPjP5uint4ii:
.LFB4853:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9markFlagsPjP5uint4ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L17:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4853:
	.size	_Z37__device_stub__Z9markFlagsPjP5uint4iiPjP5uint4ii, .-_Z37__device_stub__Z9markFlagsPjP5uint4iiPjP5uint4ii
	.globl	_Z9markFlagsPjP5uint4ii
	.type	_Z9markFlagsPjP5uint4ii, @function
_Z9markFlagsPjP5uint4ii:
.LFB4854:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z9markFlagsPjP5uint4iiPjP5uint4ii
	.cfi_endproc
.LFE4854:
	.size	_Z9markFlagsPjP5uint4ii, .-_Z9markFlagsPjP5uint4ii
	.globl	_Z63__device_stub__Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_iP5uint4S0_S0_i
	.type	_Z63__device_stub__Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_iP5uint4S0_S0_i, @function
_Z63__device_stub__Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_iP5uint4S0_S0_i:
.LFB4855:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L22:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4855:
	.size	_Z63__device_stub__Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_iP5uint4S0_S0_i, .-_Z63__device_stub__Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_iP5uint4S0_S0_i
	.globl	_Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_i
	.type	_Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_i, @function
_Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_i:
.LFB4856:
	.cfi_startproc
	endbr64
	jmp	_Z63__device_stub__Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_iP5uint4S0_S0_i
	.cfi_endproc
.LFE4856:
	.size	_Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_i, .-_Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_i
	.globl	_Z45__device_stub__Z16scanInclusiveSumP5uint4S0_iP5uint4S0_i
	.type	_Z45__device_stub__Z16scanInclusiveSumP5uint4S0_iP5uint4S0_i, @function
_Z45__device_stub__Z16scanInclusiveSumP5uint4S0_iP5uint4S0_i:
.LFB4857:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16scanInclusiveSumP5uint4S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L27:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4857:
	.size	_Z45__device_stub__Z16scanInclusiveSumP5uint4S0_iP5uint4S0_i, .-_Z45__device_stub__Z16scanInclusiveSumP5uint4S0_iP5uint4S0_i
	.globl	_Z16scanInclusiveSumP5uint4S0_i
	.type	_Z16scanInclusiveSumP5uint4S0_i, @function
_Z16scanInclusiveSumP5uint4S0_i:
.LFB4858:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z16scanInclusiveSumP5uint4S0_iP5uint4S0_i
	.cfi_endproc
.LFE4858:
	.size	_Z16scanInclusiveSumP5uint4S0_i, .-_Z16scanInclusiveSumP5uint4S0_i
	.globl	_Z43__device_stub__Z14addBlockTotalsP5uint4S0_iP5uint4S0_i
	.type	_Z43__device_stub__Z14addBlockTotalsP5uint4S0_iP5uint4S0_i, @function
_Z43__device_stub__Z14addBlockTotalsP5uint4S0_iP5uint4S0_i:
.LFB4859:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14addBlockTotalsP5uint4S0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L32:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4859:
	.size	_Z43__device_stub__Z14addBlockTotalsP5uint4S0_iP5uint4S0_i, .-_Z43__device_stub__Z14addBlockTotalsP5uint4S0_iP5uint4S0_i
	.globl	_Z14addBlockTotalsP5uint4S0_i
	.type	_Z14addBlockTotalsP5uint4S0_i, @function
_Z14addBlockTotalsP5uint4S0_i:
.LFB4860:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z14addBlockTotalsP5uint4S0_iP5uint4S0_i
	.cfi_endproc
.LFE4860:
	.size	_Z14addBlockTotalsP5uint4S0_i, .-_Z14addBlockTotalsP5uint4S0_i
	.globl	_Z53__device_stub__Z16scatterAddressesPjS_P5uint4S1_iS0_iPjS_P5uint4S1_iRS0_i
	.type	_Z53__device_stub__Z16scatterAddressesPjS_P5uint4S1_iS0_iPjS_P5uint4S1_iRS0_i, @function
_Z53__device_stub__Z16scatterAddressesPjS_P5uint4S1_iS0_iPjS_P5uint4S1_iRS0_i:
.LFB4861:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movq	%r9, 152(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z16scatterAddressesPjS_P5uint4S1_iS0_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L37:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4861:
	.size	_Z53__device_stub__Z16scatterAddressesPjS_P5uint4S1_iS0_iPjS_P5uint4S1_iRS0_i, .-_Z53__device_stub__Z16scatterAddressesPjS_P5uint4S1_iS0_iPjS_P5uint4S1_iRS0_i
	.globl	_Z16scatterAddressesPjS_P5uint4S1_iS0_i
	.type	_Z16scatterAddressesPjS_P5uint4S1_iS0_i, @function
_Z16scatterAddressesPjS_P5uint4S1_iS0_i:
.LFB4862:
	.cfi_startproc
	endbr64
	subq	$16, %rsp
	.cfi_def_cfa_offset 24
	pushq	%r9
	.cfi_def_cfa_offset 32
	leaq	32(%rsp), %r9
	call	_Z53__device_stub__Z16scatterAddressesPjS_P5uint4S1_iS0_iPjS_P5uint4S1_iRS0_i
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4862:
	.size	_Z16scatterAddressesPjS_P5uint4S1_iS0_i, .-_Z16scatterAddressesPjS_P5uint4S1_iS0_i
	.globl	_Z9radixSortPfi
	.type	_Z9radixSortPfi, @function
_Z9radixSortPfi:
.LFB4820:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movslq	%esi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	cvtsi2ssl	%r12d, %xmm0
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r12, %rbx
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	mulss	.LC0(%rip), %xmm0
	movq	%rdi, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	call	ceilf@PLT
	leaq	0(,%r12,4), %rax
	leaq	32(%rsp), %rdi
	salq	$4, %r12
	movq	%rax, %rsi
	cvttss2sil	%xmm0, %ebp
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movslq	%ebp, %rax
	leaq	64(%rsp), %rdi
	salq	$4, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	32(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	%ebp, 96(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$4194305, %edx
	movl	$1, %ecx
	movl	$1, 120(%rsp)
	movq	%rax, 100(%rsp)
	movq	96(%rsp), %rdi
	salq	$10, %rdx
	movl	104(%rsp), %esi
	movq	%rdx, 112(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	movq	32(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z34__device_stub__Z13convertFloatsPjiPji
.L44:
	movabsq	$4294968320, %r12
	xorl	%r15d, %r15d
	movabsq	$4294967297, %r13
.L50:
	movq	%r13, 100(%rsp)
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%ebp, 96(%rsp)
	movq	96(%rsp), %rdi
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	%r12, 112(%rsp)
	movl	$1, 120(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	movq	48(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	%ebx, %ecx
	movl	%r15d, %edx
	call	_Z37__device_stub__Z9markFlagsPjP5uint4iiPjP5uint4ii
.L45:
	movq	%r13, 100(%rsp)
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	movq	%r12, %rdx
	movl	%ebp, 96(%rsp)
	movq	96(%rsp), %rdi
	movl	$16384, %r8d
	movl	$1, %ecx
	movq	%r12, 112(%rsp)
	movl	$1, 120(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	%ebx, %ecx
	movq	48(%rsp), %rdi
	call	_Z63__device_stub__Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_iP5uint4S0_S0_i
.L46:
	movq	%r13, 116(%rsp)
	movq	8(%rsp), %r8
	xorl	%r9d, %r9d
	movq	%r13, %rdi
	movl	%ebp, 112(%rsp)
	movl	120(%rsp), %ecx
	movl	$1, %esi
	movq	112(%rsp), %rdx
	movq	%r13, 96(%rsp)
	movl	$1, 104(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	movq	64(%rsp), %rdi
	movl	%ebp, %edx
	movq	%rdi, %rsi
	call	_Z45__device_stub__Z16scanInclusiveSumP5uint4S0_iP5uint4S0_i
.L47:
	movq	%r13, 100(%rsp)
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%ebp, 96(%rsp)
	movq	96(%rsp), %rdi
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	%r12, 112(%rsp)
	movl	$1, 120(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z43__device_stub__Z14addBlockTotalsP5uint4S0_iP5uint4S0_i
.L48:
	movq	8(%rsp), %rcx
	movq	64(%rsp), %rax
	xorps	%xmm0, %xmm0
	leaq	96(%rsp), %rdi
	movl	$16, %edx
	movaps	%xmm0, 96(%rsp)
	leaq	-16(%rax,%rcx), %rsi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	%r13, 76(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	96(%rsp), %r10d
	movl	104(%rsp), %eax
	movl	%ebp, 72(%rsp)
	movq	%r12, %rdx
	movq	72(%rsp), %rdi
	movl	80(%rsp), %esi
	movl	$1, %ecx
	movl	%r10d, 28(%rsp)
	movl	100(%rsp), %r14d
	movl	%eax, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movl	28(%rsp), %r10d
	testl	%eax, %eax
	jne	.L49
	xorl	%eax, %eax
	addl	%r10d, %r14d
	movl	%r10d, 116(%rsp)
	movl	%r15d, %r8d
	movl	%eax, 112(%rsp)
	movl	24(%rsp), %eax
	movl	%r14d, 120(%rsp)
	addl	%eax, %r14d
	movl	%r14d, 124(%rsp)
	pushq	%rdx
	.cfi_def_cfa_offset 216
	pushq	%rbx
	.cfi_def_cfa_offset 224
	movq	72(%rsp), %rcx
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	leaq	128(%rsp), %r9
	call	_Z53__device_stub__Z16scatterAddressesPjS_P5uint4S1_iS0_iPjS_P5uint4S1_iRS0_i
	popq	%rcx
	.cfi_def_cfa_offset 216
	popq	%rsi
	.cfi_def_cfa_offset 208
.L49:
	movq	32(%rsp), %rax
	movq	40(%rsp), %rdx
	incl	%r15d
	movq	%rdx, 32(%rsp)
	movq	%rax, 40(%rsp)
	cmpl	$16, %r15d
	jne	.L50
	movl	%ebp, 96(%rsp)
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, 120(%rsp)
	movq	%rax, 100(%rsp)
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	movq	%rdx, 112(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L51
	movq	32(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z33__device_stub__Z12invertFloatsPjiPji
.L51:
	movq	(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L52
	call	__stack_chk_fail@PLT
.L52:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4820:
	.size	_Z9radixSortPfi, .-_Z9radixSortPfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC5:
	.string	"Error at index %d: %f > %f \n"
.LC6:
	.string	" milliseconds \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4821:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%edi, %edi
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movl	$4194304, %edi
	call	malloc@PLT
	movq	%rax, %rbx
.L56:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	mulss	.LC3(%rip), %xmm0
	subss	.LC4(%rip), %xmm0
	movss	%xmm0, (%rbx,%rbp,4)
	incq	%rbp
	cmpq	$1048576, %rbp
	jne	.L56
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$1048576, %esi
	movq	%rbx, %rdi
	movq	%rax, %rbp
	call	_Z9radixSortPfi
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$1000, %ecx
	subq	%rbp, %rax
	cqto
	idivq	%rcx
	movl	$1, %edx
	cvtsi2ssq	%rax, %xmm2
	divss	.LC3(%rip), %xmm2
.L60:
	movss	-4(%rbx,%rdx,4), %xmm0
	movss	(%rbx,%rdx,4), %xmm1
	comiss	%xmm1, %xmm0
	jbe	.L64
	movl	$2, %edi
	movb	$2, %al
	movss	%xmm2, 12(%rsp)
	leaq	.LC5(%rip), %rsi
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	movss	12(%rsp), %xmm2
	jmp	.L59
.L64:
	incq	%rdx
	cmpq	$1048576, %rdx
	jne	.L60
.L59:
	leaq	_ZSt4cout(%rip), %rdi
	cvtss2sd	%xmm2, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movl	$15, %edx
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4821:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z16scatterAddressesPjS_P5uint4S1_iS0_i"
.LC8:
	.string	"_Z14addBlockTotalsP5uint4S0_i"
.LC9:
	.string	"_Z16scanInclusiveSumP5uint4S0_i"
.LC10:
	.string	"_Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_i"
.LC11:
	.string	"_Z9markFlagsPjP5uint4ii"
.LC12:
	.string	"_Z12invertFloatsPji"
.LC13:
	.string	"_Z13convertFloatsPji"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4864:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16scatterAddressesPjS_P5uint4S1_iS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14addBlockTotalsP5uint4S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16scanInclusiveSumP5uint4S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z31scanExclusiveSumWithBlockTotalsP5uint4S0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9markFlagsPjP5uint4ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12invertFloatsPji(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13convertFloatsPji(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4864:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	981467136
	.align 4
.LC2:
	.long	805306368
	.align 4
.LC3:
	.long	1148846080
	.align 4
.LC4:
	.long	1140457472
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <random>
#include <chrono>
#include <iostream>

__device__
unsigned int floatFlip(unsigned int value)
{
	unsigned int mask = (-(value >> 31)) | 0x80000000;
	return value ^ mask;
}

__device__ 
unsigned int floatFlipInverse(unsigned int value)
{
	int mask = ((value >> 31) - 1) | 0x80000000;
	return value ^ mask;
}

__global__ 
void convertFloats(unsigned int* vals, int num_elems)
{
	int lid = threadIdx.x;
	int gid = lid + (blockDim.x * blockIdx.x);
	if(gid >= num_elems)
	{
		return;
	}
	vals[gid] = floatFlip(vals[gid]);
}

__global__ 
void invertFloats(unsigned int* vals, int num_elems)
{
	int lid = threadIdx.x;
	int gid = lid + (blockDim.x * blockIdx.x);
	if(gid >= num_elems)
	{
		return;
	}
	vals[gid] = floatFlipInverse(vals[gid]);
}

__global__
void markFlags(unsigned int* vals, uint4* flags, int dual_pos, int num_elems)
{
	int lid = threadIdx.x;
	int gid = lid + (blockDim.x * blockIdx.x);
	if(gid >= num_elems)
	{
		return;
	}

	unsigned int val = vals[gid];
	unsigned int mask = 3 << (dual_pos * 2);
	val &= mask;
	val >>= (dual_pos * 2);

	uint4 flag = {0,0,0,0};
	*((&flag.x) + val) = 1;
	flags[gid] = flag;
}

__global__
void scanExclusiveSumWithBlockTotals(uint4* in, uint4* out, uint4* block_totals, int num_elems)
{
	extern __shared__ uint4 sh_vals[];

	int lid = threadIdx.x;
	int gid = lid + (blockDim.x * blockIdx.x);
	if(gid >= num_elems)
	{
		return;
	}

	sh_vals[lid] = in[gid];
	__syncthreads();

	for(int offset = 1; offset < blockDim.x; offset <<= 1)
	{
		int left = lid - offset;
		uint4 left_val;
		if(left >= 0)
		{
			left_val = sh_vals[left];
		}
		__syncthreads();
		if(left >= 0)
		{	
			uint4 val = sh_vals[lid];
			val.x += left_val.x;
			val.y += left_val.y;
			val.z += left_val.z;
			val.w += left_val.w;
			sh_vals[lid] = val;
		}
		__syncthreads();
	}

	if(lid == 0)
	{
		uint4 flag = {0,0,0,0};
		out[gid] = flag;
	}
	else
	{
		out[gid] = sh_vals[lid - 1];
	}

	if(lid == blockDim.x - 1 || gid == num_elems - 1)
	{
		block_totals[blockIdx.x] = sh_vals[lid];
	}
}

__global__
void scanInclusiveSum(uint4* in, uint4* out, int num_elems)
{
	extern __shared__ uint4 sh_vals[];

	int lid = threadIdx.x;
	int gid = lid + (blockDim.x * blockIdx.x);
	if(gid >= num_elems)
	{
		return;
	}

	sh_vals[lid] = in[gid];
	__syncthreads();

	for(int offset = 1; offset < blockDim.x; offset <<= 1)
	{
		int left = lid - offset;
		uint4 left_val;
		if(left >= 0)
		{
			left_val = sh_vals[left];
		}
		__syncthreads();
		if(left >= 0)
		{	
			uint4 val = sh_vals[lid];
			val.x += left_val.x;
			val.y += left_val.y;
			val.z += left_val.z;
			val.w += left_val.w;
			sh_vals[lid] = val;
		}
		__syncthreads();
	}
	out[gid] = sh_vals[lid];
}

__global__
void addBlockTotals(uint4* fours, uint4* block_totals, int num_elems)
{
	int lid = threadIdx.x;
	int gid = lid + (blockDim.x * blockIdx.x);
	if(gid >= num_elems)
	{
		return;
	}
	if(blockIdx.x == 0)
	{
		return;
	}

	uint4 val = fours[gid];
	uint4 offsets = block_totals[blockIdx.x - 1];

	val.x += offsets.x;
	val.y += offsets.y;
	val.z += offsets.z;
	val.w += offsets.w;

	fours[gid] = val;
}

__global__
void scatterAddresses(unsigned int* vals_in, 
					unsigned int* vals_out, 
					uint4* flags, 
					uint4* addresses, 
					int dual_pos,
					uint4 offsets,
					int num_elems)
{
	int lid = threadIdx.x;
	int gid = lid + (blockDim.x * blockIdx.x);
	if(gid >= num_elems)
	{
		return;
	}

	unsigned int val = vals_in[gid];
	unsigned int mask = 3 << (dual_pos * 2);
	unsigned int val_anded = val & mask;
	val_anded >>= (dual_pos * 2);

	uint4 addr_list = addresses[gid];
	unsigned int addr = *((&addr_list.x) + val_anded);
	unsigned int offset = *((&offsets.x) + val_anded);
	addr += offset;
	vals_out[addr] = val;
}

void radixSort(float* h_vals, int num_elems)
{
	int num_threads = 1024;
	int num_blocks = ceil(num_elems / ((float) num_threads));

	unsigned int* d_vals;
	unsigned int* d_vals_buffer;
	uint4* d_flags;
	uint4* d_addresses;
	uint4* d_block_totals;

	hipMalloc(&d_vals, sizeof(unsigned int) * num_elems);
	hipMalloc(&d_vals_buffer, sizeof(unsigned int) * num_elems);
	hipMalloc(&d_flags, sizeof(uint4) * num_elems);
	hipMalloc(&d_addresses, sizeof(uint4) * num_elems);
	hipMalloc(&d_block_totals, sizeof(uint4) * num_blocks);

	hipMemcpy(d_vals, h_vals, sizeof(unsigned int) * num_elems, hipMemcpyHostToDevice);

	convertFloats<<<num_blocks, num_threads>>>(d_vals, num_elems);
	for(int bit_pair = 0; bit_pair < 16; bit_pair++)
	{
		markFlags<<<num_blocks, num_threads>>>(d_vals, d_flags, bit_pair, num_elems);

		scanExclusiveSumWithBlockTotals<<<num_blocks, num_threads, sizeof(uint4) * num_threads>>>(d_flags, d_addresses, d_block_totals, num_elems);
		scanInclusiveSum<<<1, num_blocks, sizeof(uint4) * num_blocks>>>(d_block_totals, d_block_totals, num_blocks);
		addBlockTotals<<<num_blocks, num_threads>>>(d_addresses, d_block_totals, num_elems);
		
		uint4 totals = {0,0,0,0};
		hipMemcpy(&totals, &d_block_totals[num_blocks - 1], sizeof(uint4), hipMemcpyDeviceToHost);
		uint4 offsets = {0, totals.x, totals.x + totals.y, totals.x + totals.y + totals.z};

		scatterAddresses<<<num_blocks, num_threads>>>(d_vals, d_vals_buffer, d_flags, d_addresses, bit_pair, offsets, num_elems);

		unsigned int* temp = d_vals;
		d_vals = d_vals_buffer;
		d_vals_buffer = temp;
	}
	invertFloats<<<num_blocks, num_threads>>>(d_vals, num_elems);

	hipMemcpy(h_vals, d_vals, sizeof(float) * num_elems, hipMemcpyDeviceToHost);
}

int main()
{
	srand((int) time(NULL));
	int num_elems = 1024 * 1024;

	float* h_vals;
	h_vals = (float*) malloc(sizeof(float) * num_elems);

	for(int i = 0; i < num_elems; i++)
	{
		h_vals[i] = (((float) rand() / RAND_MAX) * 1000) - 500;
	}
	auto start = std::chrono::high_resolution_clock::now();
  	
  	radixSort(h_vals, num_elems);

	auto end = std::chrono::high_resolution_clock::now();
	auto elapsed = std::chrono::duration_cast<std::chrono::microseconds>(end - start) / 1000.0f;

	for(int i = 0; i < 100; i++)
	{
		//printf("%f \n", h_vals[i]);
	}

	for(int i = 1; i < num_elems; i++)
	{
		if(h_vals[i - 1] > h_vals[i])
		{
			printf("Error at index %d: %f > %f \n", i, h_vals[i - 1], h_vals[i]);
			break;
		}
	}

	std::cout << elapsed.count() << " milliseconds \n";
}






















	.text
	.file	"fast_radix_sort.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z28__device_stub__convertFloatsPji # -- Begin function _Z28__device_stub__convertFloatsPji
	.type	_Z28__device_stub__convertFloatsPji,@function
_Z28__device_stub__convertFloatsPji:    # @_Z28__device_stub__convertFloatsPji
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13convertFloatsPji, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__convertFloatsPji, .Lfunc_end0-_Z28__device_stub__convertFloatsPji
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__invertFloatsPji # -- Begin function _Z27__device_stub__invertFloatsPji
	.type	_Z27__device_stub__invertFloatsPji,@function
_Z27__device_stub__invertFloatsPji:     # @_Z27__device_stub__invertFloatsPji
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12invertFloatsPji, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__invertFloatsPji, .Lfunc_end1-_Z27__device_stub__invertFloatsPji
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__markFlagsPjP15HIP_vector_typeIjLj4EEii # -- Begin function _Z24__device_stub__markFlagsPjP15HIP_vector_typeIjLj4EEii
	.type	_Z24__device_stub__markFlagsPjP15HIP_vector_typeIjLj4EEii,@function
_Z24__device_stub__markFlagsPjP15HIP_vector_typeIjLj4EEii: # @_Z24__device_stub__markFlagsPjP15HIP_vector_typeIjLj4EEii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z24__device_stub__markFlagsPjP15HIP_vector_typeIjLj4EEii, .Lfunc_end2-_Z24__device_stub__markFlagsPjP15HIP_vector_typeIjLj4EEii
	.cfi_endproc
                                        # -- End function
	.globl	_Z46__device_stub__scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i # -- Begin function _Z46__device_stub__scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i
	.type	_Z46__device_stub__scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i,@function
_Z46__device_stub__scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i: # @_Z46__device_stub__scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z46__device_stub__scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i, .Lfunc_end3-_Z46__device_stub__scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i # -- Begin function _Z31__device_stub__scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i
	.type	_Z31__device_stub__scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i,@function
_Z31__device_stub__scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i: # @_Z31__device_stub__scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z31__device_stub__scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i, .Lfunc_end4-_Z31__device_stub__scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__addBlockTotalsP15HIP_vector_typeIjLj4EES1_i # -- Begin function _Z29__device_stub__addBlockTotalsP15HIP_vector_typeIjLj4EES1_i
	.type	_Z29__device_stub__addBlockTotalsP15HIP_vector_typeIjLj4EES1_i,@function
_Z29__device_stub__addBlockTotalsP15HIP_vector_typeIjLj4EES1_i: # @_Z29__device_stub__addBlockTotalsP15HIP_vector_typeIjLj4EES1_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z29__device_stub__addBlockTotalsP15HIP_vector_typeIjLj4EES1_i, .Lfunc_end5-_Z29__device_stub__addBlockTotalsP15HIP_vector_typeIjLj4EES1_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i # -- Begin function _Z31__device_stub__scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i
	.type	_Z31__device_stub__scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i,@function
_Z31__device_stub__scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i: # @_Z31__device_stub__scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z31__device_stub__scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i, .Lfunc_end6-_Z31__device_stub__scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z9radixSortPfi
.LCPI7_0:
	.long	0x3a800000                      # float 9.765625E-4
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI7_1:
	.zero	16
	.text
	.globl	_Z9radixSortPfi
	.type	_Z9radixSortPfi,@function
_Z9radixSortPfi:                        # @_Z9radixSortPfi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	cvtsi2ss	%esi, %xmm0
	movq	%rdi, %r15
	movabsq	$4294968320, %rbp               # imm = 0x100000400
	mulss	.LCPI7_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r13d
	movl	%ebx, 28(%rsp)                  # 4-byte Spill
	movslq	%ebx, %r14
	leaq	(,%r14,4), %r12
	leaq	32(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	shlq	$4, %r14
	leaq	56(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movslq	%r13d, %rsi
	shlq	$4, %rsi
	leaq	40(%rsp), %rdi
	movq	%rsi, 72(%rsp)                  # 8-byte Spill
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	%r15, 112(%rsp)                 # 8-byte Spill
	movq	%r15, %rsi
	movq	%r12, 104(%rsp)                 # 8-byte Spill
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r13, 120(%rsp)                 # 8-byte Spill
	leaq	-1024(,%rbp), %rbx
	addq	%r13, %rbx
	xorl	%r14d, %r14d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_2
# %bb.1:
	movq	32(%rsp), %rdi
	movl	28(%rsp), %esi                  # 4-byte Reload
	callq	_Z28__device_stub__convertFloatsPji
.LBB7_2:
	leaq	-1023(%rbp), %rax
	movq	%rax, 128(%rsp)                 # 8-byte Spill
	movq	%rbx, 136(%rsp)                 # 8-byte Spill
.LBB7_3:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_5
# %bb.4:                                #   in Loop: Header=BB7_3 Depth=1
	movq	32(%rsp), %rdi
	movq	56(%rsp), %rsi
	movl	%r14d, %edx
	movl	28(%rsp), %ecx                  # 4-byte Reload
	callq	_Z24__device_stub__markFlagsPjP15HIP_vector_typeIjLj4EEii
.LBB7_5:                                #   in Loop: Header=BB7_3 Depth=1
	movl	$16384, %r8d                    # imm = 0x4000
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_7
# %bb.6:                                #   in Loop: Header=BB7_3 Depth=1
	movq	56(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdx
	movl	28(%rsp), %ecx                  # 4-byte Reload
	callq	_Z46__device_stub__scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i
.LBB7_7:                                #   in Loop: Header=BB7_3 Depth=1
	movq	128(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	72(%rsp), %r8                   # 8-byte Reload
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_9
# %bb.8:                                #   in Loop: Header=BB7_3 Depth=1
	movq	40(%rsp), %rdi
	movq	%rdi, %rsi
	movq	120(%rsp), %rdx                 # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	callq	_Z31__device_stub__scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i
.LBB7_9:                                #   in Loop: Header=BB7_3 Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	%rbp, %r13
	jne	.LBB7_11
# %bb.10:                               #   in Loop: Header=BB7_3 Depth=1
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movl	28(%rsp), %edx                  # 4-byte Reload
	callq	_Z29__device_stub__addBlockTotalsP15HIP_vector_typeIjLj4EES1_i
.LBB7_11:                               #   in Loop: Header=BB7_3 Depth=1
	xorps	%xmm0, %xmm0
	movaps	%xmm0, 80(%rsp)
	movq	40(%rsp), %rax
	movq	72(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rax,%rcx), %rsi
	addq	$-16, %rsi
	movl	$16, %edx
	leaq	80(%rsp), %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	80(%rsp), %r12d
	movl	84(%rsp), %ebp
	movl	88(%rsp), %r15d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r13, %rbx
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_13
# %bb.12:                               #   in Loop: Header=BB7_3 Depth=1
	addl	%r12d, %ebp
	addl	%ebp, %r15d
	movd	%ebp, %xmm0
	movd	%r15d, %xmm1
	punpckldq	%xmm1, %xmm0            # xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
	movd	%r12d, %xmm1
	shufps	$65, %xmm0, %xmm1               # xmm1 = xmm1[1,0],xmm0[0,1]
	movq	32(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rcx
	movaps	%xmm1, 144(%rsp)
	movaps	144(%rsp), %xmm0
	movaps	%xmm0, (%rsp)
	movl	%r14d, %r8d
	movl	28(%rsp), %r9d                  # 4-byte Reload
	callq	_Z31__device_stub__scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i
.LBB7_13:                               #   in Loop: Header=BB7_3 Depth=1
	movq	32(%rsp), %rax
	movq	64(%rsp), %rcx
	movq	%rcx, 32(%rsp)
	movq	%rax, 64(%rsp)
	incl	%r14d
	cmpl	$16, %r14d
	movq	%rbx, %rbp
	movq	136(%rsp), %rbx                 # 8-byte Reload
	jne	.LBB7_3
# %bb.14:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_16
# %bb.15:
	movq	32(%rsp), %rdi
	movl	28(%rsp), %esi                  # 4-byte Reload
	callq	_Z27__device_stub__invertFloatsPji
.LBB7_16:
	movq	32(%rsp), %rsi
	movq	112(%rsp), %rdi                 # 8-byte Reload
	movq	104(%rsp), %rdx                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z9radixSortPfi, .Lfunc_end7-_Z9radixSortPfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI8_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI8_1:
	.long	0x447a0000                      # float 1000
.LCPI8_2:
	.long	0xc3fa0000                      # float -500
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%r14d, %r14d
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %rbx
.LBB8_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI8_0(%rip), %xmm0
	mulss	.LCPI8_1(%rip), %xmm0
	addss	.LCPI8_2(%rip), %xmm0
	movss	%xmm0, (%rbx,%r14,4)
	incq	%r14
	cmpq	$1048576, %r14                  # imm = 0x100000
	jne	.LBB8_1
# %bb.2:                                # %.preheader.preheader
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r14
	movq	%rbx, %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	callq	_Z9radixSortPfi
	movl	$1, %r12d
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
.LBB8_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movss	-4(%rbx,%r12,4), %xmm0          # xmm0 = mem[0],zero,zero,zero
	movss	(%rbx,%r12,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	ja	.LBB8_4
# %bb.5:                                #   in Loop: Header=BB8_3 Depth=1
	incq	%r12
	cmpq	$1048576, %r12                  # imm = 0x100000
	jne	.LBB8_3
	jmp	.LBB8_6
.LBB8_4:
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str, %edi
	movl	%r12d, %esi
	movb	$2, %al
	callq	printf
.LBB8_6:                                # %.loopexit
	subq	%r14, %r15
	movabsq	$2361183241434822607, %rcx      # imm = 0x20C49BA5E353F7CF
	movq	%r15, %rax
	imulq	%rcx
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$7, %rdx
	addq	%rax, %rdx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rdx, %xmm0
	divss	.LCPI8_1(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$15, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13convertFloatsPji, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12invertFloatsPji, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13convertFloatsPji,@object    # @_Z13convertFloatsPji
	.section	.rodata,"a",@progbits
	.globl	_Z13convertFloatsPji
	.p2align	3, 0x0
_Z13convertFloatsPji:
	.quad	_Z28__device_stub__convertFloatsPji
	.size	_Z13convertFloatsPji, 8

	.type	_Z12invertFloatsPji,@object     # @_Z12invertFloatsPji
	.globl	_Z12invertFloatsPji
	.p2align	3, 0x0
_Z12invertFloatsPji:
	.quad	_Z27__device_stub__invertFloatsPji
	.size	_Z12invertFloatsPji, 8

	.type	_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii,@object # @_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii
	.globl	_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii
	.p2align	3, 0x0
_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii:
	.quad	_Z24__device_stub__markFlagsPjP15HIP_vector_typeIjLj4EEii
	.size	_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii, 8

	.type	_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i,@object # @_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i
	.globl	_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i
	.p2align	3, 0x0
_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i:
	.quad	_Z46__device_stub__scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i
	.size	_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i, 8

	.type	_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i,@object # @_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i
	.globl	_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i
	.p2align	3, 0x0
_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i:
	.quad	_Z31__device_stub__scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i
	.size	_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i, 8

	.type	_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i,@object # @_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i
	.globl	_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i
	.p2align	3, 0x0
_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i:
	.quad	_Z29__device_stub__addBlockTotalsP15HIP_vector_typeIjLj4EES1_i
	.size	_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i, 8

	.type	_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i,@object # @_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i
	.globl	_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i
	.p2align	3, 0x0
_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i:
	.quad	_Z31__device_stub__scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i
	.size	_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error at index %d: %f > %f \n"
	.size	.L.str, 29

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" milliseconds \n"
	.size	.L.str.1, 16

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13convertFloatsPji"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12invertFloatsPji"
	.size	.L__unnamed_2, 20

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii"
	.size	.L__unnamed_3, 42

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i"
	.size	.L__unnamed_4, 68

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i"
	.size	.L__unnamed_5, 50

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i"
	.size	.L__unnamed_6, 48

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i"
	.size	.L__unnamed_7, 58

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__convertFloatsPji
	.addrsig_sym _Z27__device_stub__invertFloatsPji
	.addrsig_sym _Z24__device_stub__markFlagsPjP15HIP_vector_typeIjLj4EEii
	.addrsig_sym _Z46__device_stub__scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i
	.addrsig_sym _Z31__device_stub__scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i
	.addrsig_sym _Z29__device_stub__addBlockTotalsP15HIP_vector_typeIjLj4EES1_i
	.addrsig_sym _Z31__device_stub__scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13convertFloatsPji
	.addrsig_sym _Z12invertFloatsPji
	.addrsig_sym _Z9markFlagsPjP15HIP_vector_typeIjLj4EEii
	.addrsig_sym _Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i
	.addrsig_sym _Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i
	.addrsig_sym _Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i
	.addrsig_sym _Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13convertFloatsPji    ; -- Begin function _Z13convertFloatsPji
	.globl	_Z13convertFloatsPji
	.p2align	8
	.type	_Z13convertFloatsPji,@function
_Z13convertFloatsPji:                   ; @_Z13convertFloatsPji
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v3, 31, v2
	v_or_b32_e32 v3, 0x80000000, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_xor_b32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13convertFloatsPji
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13convertFloatsPji, .Lfunc_end0-_Z13convertFloatsPji
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12invertFloatsPji     ; -- Begin function _Z12invertFloatsPji
	.globl	_Z12invertFloatsPji
	.p2align	8
	.type	_Z12invertFloatsPji,@function
_Z12invertFloatsPji:                    ; @_Z12invertFloatsPji
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v3, 31, v2
	v_add_nc_u32_e32 v3, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v3, 0x80000000, v3
	v_xor_b32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12invertFloatsPji
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12invertFloatsPji, .Lfunc_end1-_Z12invertFloatsPji
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 160
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii ; -- Begin function _Z9markFlagsPjP15HIP_vector_typeIjLj4EEii
	.globl	_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii
	.p2align	8
	.type	_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii,@function
_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii: ; @_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[2:3], 0x24
	s_load_b64 s[4:5], s[2:3], 0x10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s6, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s6, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s5, v1
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_load_b128 s[8:11], s[2:3], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x4
	v_mov_b32_e32 v8, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	s_lshr_b32 s0, s0, 16
	s_mul_i32 s0, s0, s1
	global_load_b32 v4, v[4:5], off
	v_mul_lo_u32 v3, s0, v3
	v_bfe_u32 v5, v0, 10, 10
	s_lshl_b32 s0, s4, 1
	v_bfe_u32 v0, v0, 20, 10
	s_lshl_b32 s2, 3, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u32_u24 v5, v5, s1, v3
	v_mov_b32_e32 v3, 0
	v_add_lshl_u32 v0, v5, v0, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v5, v3
	v_mov_b32_e32 v6, v3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s2, v4
	v_lshrrev_b32_e32 v7, s0, v4
	v_mov_b32_e32 v4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v7, v7, 2, v0
	ds_store_b128 v0, v[3:6]
	ds_store_b32 v7, v8
	ds_load_b128 v[3:6], v0
	v_lshlrev_b64 v[0:1], 4, v[1:2]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b128 v[0:1], v[3:6], off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9markFlagsPjP15HIP_vector_typeIjLj4EEii
		.amdhsa_group_segment_fixed_size 16384
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 1
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii, .Lfunc_end2-_Z9markFlagsPjP15HIP_vector_typeIjLj4EEii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 308
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 16384 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i ; -- Begin function _Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i
	.globl	_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i
	.p2align	8
	.type	_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i,@function
_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i: ; @_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_mov_b32 s2, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[5:6], null, s2, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v5
	s_cbranch_execz .LBB3_14
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshl_add_u32 v8, v0, 4, 0
	s_cmp_lt_u32 s10, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 4, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v7, vcc_lo
	global_load_b128 v[1:4], v[1:2], off
	s_waitcnt vmcnt(0)
	ds_store_b128 v8, v[1:4]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_8
; %bb.2:                                ; %.lr.ph
	s_mov_b32 s0, 1
                                        ; implicit-def: $vgpr4
.LBB3_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v9, s0, v0
	v_cmp_lt_i32_e32 vcc_lo, -1, v9
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB3_5
; %bb.4:                                ;   in Loop: Header=BB3_3 Depth=1
	v_lshl_add_u32 v1, v9, 4, 0
	ds_load_b128 v[1:4], v1
.LBB3_5:                                ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB3_7
; %bb.6:                                ;   in Loop: Header=BB3_3 Depth=1
	ds_load_b128 v[9:12], v8
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v9, v9, v1
	v_add_nc_u32_e32 v10, v10, v2
	v_add_nc_u32_e32 v11, v11, v3
	v_add_nc_u32_e32 v12, v12, v4
	ds_store_b128 v8, v[9:12]
.LBB3_7:                                ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_lshl_b32 s0, s0, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s0, s10
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB3_3
.LBB3_8:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e32 0, v0
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB3_10
; %bb.9:
	v_add_nc_u32_e32 v1, -16, v8
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	ds_load_b128 v[1:4], v1
	s_waitcnt lgkmcnt(0)
	global_store_b128 v[6:7], v[1:4], off
                                        ; implicit-def: $vgpr6_vgpr7
.LBB3_10:                               ; %Flow68
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB3_12
; %bb.11:
	v_mov_b32_e32 v1, 0
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mov_b32_e32 v2, v1
	v_mov_b32_e32 v3, v1
	v_mov_b32_e32 v4, v1
	global_store_b128 v[6:7], v[1:4], off
.LBB3_12:
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s10, s10, -1
	s_add_i32 s3, s3, -1
	v_cmp_eq_u32_e32 vcc_lo, s10, v0
	v_cmp_eq_u32_e64 s0, s3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB3_14
; %bb.13:
	ds_load_b128 v[0:3], v8
	s_mov_b32 s3, 0
	v_mov_b32_e32 v4, 0
	s_lshl_b64 s[0:1], s[2:3], 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s8, s0
	s_addc_u32 s1, s9, s1
	s_waitcnt lgkmcnt(0)
	global_store_b128 v4, v[0:3], s[0:1]
.LBB3_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i, .Lfunc_end3-_Z31scanExclusiveSumWithBlockTotalsP15HIP_vector_typeIjLj4EES1_S1_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 504
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i ; -- Begin function _Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i
	.globl	_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i
	.p2align	8
	.type	_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i,@function
_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i: ; @_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s2, 0xffff
	s_mov_b32 s2, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB4_9
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshl_add_u32 v7, v0, 4, 0
	s_cmp_lt_u32 s4, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 4, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v6, vcc_lo
	global_load_b128 v[1:4], v[1:2], off
	s_waitcnt vmcnt(0)
	ds_store_b128 v7, v[1:4]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB4_8
; %bb.2:                                ; %.lr.ph
	s_mov_b32 s0, 1
                                        ; implicit-def: $vgpr4
.LBB4_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v8, s0, v0
	v_cmp_lt_i32_e32 vcc_lo, -1, v8
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB4_5
; %bb.4:                                ;   in Loop: Header=BB4_3 Depth=1
	v_lshl_add_u32 v1, v8, 4, 0
	ds_load_b128 v[1:4], v1
.LBB4_5:                                ;   in Loop: Header=BB4_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB4_7
; %bb.6:                                ;   in Loop: Header=BB4_3 Depth=1
	ds_load_b128 v[8:11], v7
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v8, v8, v1
	v_add_nc_u32_e32 v9, v9, v2
	v_add_nc_u32_e32 v10, v10, v3
	v_add_nc_u32_e32 v11, v11, v4
	ds_store_b128 v7, v[8:11]
.LBB4_7:                                ;   in Loop: Header=BB4_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_lshl_b32 s0, s0, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s0, s4
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB4_3
.LBB4_8:                                ; %._crit_edge
	ds_load_b128 v[0:3], v7
	v_add_co_u32 v4, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b128 v[4:5], v[0:3], off
.LBB4_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i, .Lfunc_end4-_Z16scanInclusiveSumP15HIP_vector_typeIjLj4EES1_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 336
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i ; -- Begin function _Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i
	.globl	_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i
	.p2align	8
	.type	_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i,@function
_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i: ; @_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_cmp_lg_u32 s15, 0
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_mov_b32 s3, 0
	s_and_b32 s2, s2, vcc_lo
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB5_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s2, s15, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[0:1], s[2:3], 4
	v_lshlrev_b64 v[0:1], 4, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	s_load_b128 s[0:3], s[0:1], 0x0
	global_load_b128 v[0:3], v[4:5], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, s0, v0
	v_add_nc_u32_e32 v1, s1, v1
	v_add_nc_u32_e32 v2, s2, v2
	v_add_nc_u32_e32 v3, s3, v3
	global_store_b128 v[4:5], v[0:3], off
.LBB5_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i, .Lfunc_end5-_Z14addBlockTotalsP15HIP_vector_typeIjLj4EES1_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i ; -- Begin function _Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i
	.globl	_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i
	.p2align	8
	.type	_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i,@function
_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i: ; @_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[2:3], 0x54
	s_load_b32 s5, s[2:3], 0x40
	v_and_b32_e32 v1, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s5, v2
	s_cbranch_execz .LBB6_2
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[2:3], 0x0
	s_load_b64 s[8:9], s[2:3], 0x18
	v_ashrrev_i32_e32 v3, 31, v2
	s_load_b64 s[0:1], s[0:1], 0x4
	v_mov_b32_e32 v7, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	v_lshlrev_b64 v[2:3], 4, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	s_load_b32 s4, s[2:3], 0x20
	v_add_co_u32 v2, vcc_lo, s8, v2
	global_load_b32 v10, v[4:5], off
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	s_lshr_b32 s0, s0, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_mul_i32 s0, s0, s1
	global_load_b128 v[2:5], v[2:3], off
	v_mul_lo_u32 v1, s0, v1
	s_waitcnt lgkmcnt(0)
	s_lshl_b32 s4, s4, 1
	s_lshl_b32 s5, 3, s4
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v6, s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v6, s4, v6
	v_lshlrev_b64 v[8:9], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	global_load_b32 v8, v[8:9], off offset:48
	v_bfe_u32 v9, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u32_u24 v1, v9, s1, v1
	v_add_lshl_u32 v0, v1, v0, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v1, v6, 2, v0
	s_waitcnt vmcnt(1)
	ds_store_b128 v0, v[2:5]
	ds_load_b32 v0, v1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v6, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[6:7]
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v10, off
.LBB6_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i
		.amdhsa_group_segment_fixed_size 16384
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 1
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i, .Lfunc_end6-_Z16scatterAddressesPjS_P15HIP_vector_typeIjLj4EES2_iS1_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 388
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 16384 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
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...

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