#include<cuda.h>
#define MAX(x, y) (((x) > (y)) ? (x) : (y))
#define MIN(x, y) (((x) < (y)) ? (x) : (y))

__global__ void extrapolKernel(
                               double* const rs,          //RS
                               const double* const extVal,//Var extrapol
                               const double* const phiS,  //Level Set F
                               const double* const jbn,   //Jacobian
                               const double* const d_Phi, //Phi Der
                               const double deltaX,
                               const double deltaY,
                               const double deltaZ,
                               const unsigned int Nx,
                               const unsigned int Ny,
                               const unsigned int Nz,
                               const int extFlag
                              )
{

   const int Offset = Nx*Ny*Nz;
   int id2;
   double so;
   double phiDeltaX, phiDeltaY, phiDeltaZ,
         d_ext_xu, d_ext_xd,
         d_ext_yu, d_ext_yd,
         d_ext_zu, d_ext_zd;

   int idx = blockIdx.x*blockDim.x + threadIdx.x,
                      idy = blockIdx.y*blockDim.y + threadIdx.y,
                      idz = blockIdx.z*blockDim.z + threadIdx.z;  


   //Offsets example (id_ip) EQ (i+1,j,k) 
   int id = Nx*Ny*idz + Nx*idy + idx,
                id_ip = Nx*Ny*idz + Nx*idy + idx + 1, 
                id_im = Nx*Ny*idz + Nx*idy + idx - 1, 
                id_jp = Nx*Ny*idz + Nx*(idy + 1) + idx, 
                id_jm = Nx*Ny*idz + Nx*(idy - 1) + idx, 
                id_kp = Nx*Ny*(idz + 1) + Nx*idy + idx, 
                id_km = Nx*Ny*(idz - 1) + Nx*idy + idx; 


   //Dealing with boundaries
   id2 = id;
   if(idx==0){id2 = id_ip; id_im = id;}
   if(idy==0){id2 = id_jp; id_jm = id;} 
   if(idz==0){id2 = id_kp; id_km = id;} 
   if(idx==Nx-1){id2 = id_im ; id_ip = id;} 
   if(idy==Ny-1){id2 = id_jm ; id_jp = id;} 
   if(idz==Nz-1){id2 = id_km ; id_kp = id;} 

  

// pick up the side to extrapol 
   if(extFlag>0){

      so = (double)(phiS[id]>0.0);       
   }
   else{
      so = -1.0*(double)(phiS[id]<=0.0);       
   }

  
   phiDeltaX = so*d_Phi[id           ];
   phiDeltaY = so*d_Phi[id + 1*Offset];
   phiDeltaZ = so*d_Phi[id + 2*Offset];


// Downwind derivatives of ext 
   d_ext_xd = deltaX*jbn[id           ]*(extVal[id2] - extVal[id_im]); 
   d_ext_yd = deltaY*jbn[id + 4*Offset]*(extVal[id2] - extVal[id_jm]); 
   d_ext_zd = deltaZ*jbn[id + 8*Offset]*(extVal[id2] - extVal[id_km]); 

// Upwind derivatives of ext 
   d_ext_xu = deltaX*jbn[id           ]*(extVal[id_ip] - extVal[id2]); 
   d_ext_yu = deltaY*jbn[id + 4*Offset]*(extVal[id_jp] - extVal[id2]); 
   d_ext_zu = deltaZ*jbn[id + 8*Offset]*(extVal[id_kp] - extVal[id2]); 
   

   double xMax = (double)(phiDeltaX > 0.0) 
               - (double)(phiDeltaX < 0.0);

   rs[id] = (0.5*(xMax + 1.0)*d_ext_xd 
          + 0.5*abs(xMax - 1.0)*d_ext_xu)*phiDeltaX;

   xMax = (double)(phiDeltaY > 0.0) 
        - (double)(phiDeltaY < 0.0);

   rs[id] += (0.5*(xMax + 1.0)*d_ext_yd 
          + 0.5*abs(xMax - 1.0)*d_ext_yu)*phiDeltaY;


   xMax = (double)(phiDeltaZ > 0.0) 
        - (double)(phiDeltaZ < 0.0);

   rs[id] += (0.5*(xMax + 1.0)*d_ext_zd 
          + 0.5*abs(xMax - 1.0)*d_ext_zu)*phiDeltaZ;

          
   return; 

}

__global__ void DevFirstOrder_LS(
                                double* const d_Phi,
                                const double* const phiS,
                                const double* const jbn,
                                const double deltaX,
                                const double deltaY,
                                const double deltaZ,
                                const unsigned int Nx, 
                                const unsigned int Ny, 
                                const unsigned int Nz
                                )
{

   const unsigned int idx = blockIdx.x*blockDim.x + threadIdx.x,
                      idy = blockIdx.y*blockDim.y + threadIdx.y,
                      idz = blockIdx.z*blockDim.z + threadIdx.z;  

   //Offsets example (id_ip) EQ (i+1,j,k) 
   unsigned int id = Nx*Ny*idz + Nx*idy + idx,
                id_ip = Nx*Ny*idz + Nx*idy + idx + 1, 
                id_im = Nx*Ny*idz + Nx*idy + idx - 1, 
                id_jp = Nx*Ny*idz + Nx*(idy + 1) + idx, 
                id_jm = Nx*Ny*idz + Nx*(idy - 1) + idx, 
                id_kp = Nx*Ny*(idz + 1) + Nx*idy + idx, 
                id_km = Nx*Ny*(idz - 1) + Nx*idy + idx; 
   
   double factor = 0.5;

   //Dealing with boundaries
   if(idx==0){id_im = id; factor = 1.0;}
   if(idy==0){id_jm = id; factor = 1.0;}
   if(idz==0){id_km = id; factor = 1.0;}
   if(idx==Nx-1){id_ip = id; factor = 1.0;}
   if(idy==Ny-1){id_jp = id; factor = 1.0;}
   if(idz==Nz-1){id_kp = id; factor = 1.0;}

   const unsigned int Offset = Nx*Ny*Nz;

   d_Phi[           id] = factor*deltaX*jbn[id           ]
                        * (phiS[id_ip] - phiS[id_im]);

   d_Phi[1*Offset + id] = factor*deltaY*jbn[id + 4*Offset]
                        * (phiS[id_jp] - phiS[id_jm]);

   d_Phi[2*Offset + id] = factor*deltaZ*jbn[id + 8*Offset]
                        * (phiS[id_kp] - phiS[id_km]);
	
   return;
}

__global__ void RunGK_FirstS(
                            double* d,
                            double* d0,
                            double  dt, 
                            double* rs,
                            const int Nx, const int Ny, const int Nz
                            )
{
   const unsigned int idx = blockIdx.x*blockDim.x + threadIdx.x,
                      idy = blockIdx.y*blockDim.y + threadIdx.y,
                      idz = blockIdx.z*blockDim.z + threadIdx.z;

   const unsigned int id = idx + idy*Nx + idz*Nx*Ny;
   
   d[id] = d0[id] - dt*rs[id];

   return;
}

__global__ void RunGK_SecondS(
                             double* d,
                             double* d0,
                             double* d1,
                             double  dt, 
                             double* rs,
                             const int Nx, const int Ny, const int Nz
                            )
{
   const unsigned int idx = blockIdx.x*blockDim.x + threadIdx.x,
                      idy = blockIdx.y*blockDim.y + threadIdx.y,
                      idz = blockIdx.z*blockDim.z + threadIdx.z;

   const unsigned int id = idx + idy*Nx + idz*Nx*Ny;
   
   d[id] = 0.75*d0[id] +0.25*( d1[id] - dt*rs[id]);

   return;
}

__global__ void RunGK_ThirdS(
                             double* d,
                             double* d0,
                             double* d1,
                             const double dt, 
                             double* rs,
                             const int Nx, const int Ny, const int Nz
                            )
{
   const unsigned int idx = blockIdx.x*blockDim.x + threadIdx.x,
                      idy = blockIdx.y*blockDim.y + threadIdx.y,
                      idz = blockIdx.z*blockDim.z + threadIdx.z;

   const unsigned int id = idx + idy*Nx + idz*Nx*Ny;
   
   d[id] = (d0[id] + 2.0*( d1[id] - dt*rs[id])) / 3.0 ;

   return;
}

__global__ void copyLSGas(
                          double* const value,
                          const double* const copyVal, 
                          const double* const phiS,
                          int Nx, int Ny, int Nz
                         )
{

   const unsigned int idx = blockIdx.x*blockDim.x + threadIdx.x,
                      idy = blockIdx.y*blockDim.y + threadIdx.y,
                      idz = blockIdx.z*blockDim.z + threadIdx.z;

   const unsigned int id = idx + idy*Nx + idz*Nx*Ny;
   
   value[id] = (phiS[id] > 0.0) ? copyVal[id] : value[id];
   
   return;
}


__global__ void copyLSLiquid(
                             double* const value,
                             const double* const copyVal, 
                             const double* const phiS,
                             int Nx, int Ny, int Nz,
                             int disp
                            )
{

   const unsigned int idx = blockIdx.x*blockDim.x + threadIdx.x,
                      idy = blockIdx.y*blockDim.y + threadIdx.y,
                      idz = blockIdx.z*blockDim.z + threadIdx.z;

   const unsigned int id = idx + idy*Nx + idz*Nx*Ny;

   
   const unsigned int offset = Nx*Ny*Nz;
   
   value[id + disp*offset] = (phiS[id] < 0.0) ? copyVal[id] :  
                                     value[id + disp*offset];
   
   return;
}

	.file	"tmpxft_002a61c5_00000000-6_extrapol.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z53__device_stub__Z14extrapolKernelPdPKdS1_S1_S1_dddjjjiPdPKdS1_S1_S1_dddjjji
	.type	_Z53__device_stub__Z14extrapolKernelPdPKdS1_S1_S1_dddjjjiPdPKdS1_S1_S1_dddjjji, @function
_Z53__device_stub__Z14extrapolKernelPdPKdS1_S1_S1_dddjjjiPdPKdS1_S1_S1_dddjjji:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$264, %rsp
	.cfi_def_cfa_offset 272
	movq	%rdi, 72(%rsp)
	leaq	104(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	116(%rsp), %rsi
	movq	%rdx, 56(%rsp)
	leaq	88(%rsp), %rdx
	movq	%rcx, 48(%rsp)
	leaq	96(%rsp), %rcx
	movq	%r8, 40(%rsp)
	movl	%r9d, 12(%rsp)
	movsd	%xmm0, 32(%rsp)
	movsd	%xmm1, 24(%rsp)
	movsd	%xmm2, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 248(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 112(%rsp)
	movq	%rax, 152(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	280(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	288(%rsp), %rax
	movq	%rax, 240(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 104(%rsp)
	movq	%rax, 116(%rsp)
	movl	$1, 124(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	96(%rsp)
	.cfi_def_cfa_offset 280
	leaq	_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji(%rip), %rdi
	pushq	96(%rsp)
	.cfi_def_cfa_offset 288
	movq	132(%rsp), %rcx
	movl	140(%rsp), %r8d
	movq	120(%rsp), %rsi
	movl	128(%rsp), %edx
	leaq	168(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 280
	popq	%rdx
	.cfi_def_cfa_offset 272
.L2:
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$264, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z53__device_stub__Z14extrapolKernelPdPKdS1_S1_S1_dddjjjiPdPKdS1_S1_S1_dddjjji, .-_Z53__device_stub__Z14extrapolKernelPdPKdS1_S1_S1_dddjjjiPdPKdS1_S1_S1_dddjjji
	.globl	_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji
	.type	_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji, @function
_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z14extrapolKernelPdPKdS1_S1_S1_dddjjjiPdPKdS1_S1_S1_dddjjji
	.cfi_endproc
.LFE2033:
	.size	_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji, .-_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji
	.globl	_Z48__device_stub__Z16DevFirstOrder_LSPdPKdS1_dddjjjPdPKdS1_dddjjj
	.type	_Z48__device_stub__Z16DevFirstOrder_LSPdPKdS1_dddjjjPdPKdS1_dddjjj, @function
_Z48__device_stub__Z16DevFirstOrder_LSPdPKdS1_dddjjjPdPKdS1_dddjjj:
.LFB2034:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	72(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movsd	%xmm0, 32(%rsp)
	movsd	%xmm1, 24(%rsp)
	movsd	%xmm2, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	72(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z16DevFirstOrder_LSPdPKdS1_dddjjj(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 240
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L8:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z48__device_stub__Z16DevFirstOrder_LSPdPKdS1_dddjjjPdPKdS1_dddjjj, .-_Z48__device_stub__Z16DevFirstOrder_LSPdPKdS1_dddjjjPdPKdS1_dddjjj
	.globl	_Z16DevFirstOrder_LSPdPKdS1_dddjjj
	.type	_Z16DevFirstOrder_LSPdPKdS1_dddjjj, @function
_Z16DevFirstOrder_LSPdPKdS1_dddjjj:
.LFB2035:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z16DevFirstOrder_LSPdPKdS1_dddjjjPdPKdS1_dddjjj
	.cfi_endproc
.LFE2035:
	.size	_Z16DevFirstOrder_LSPdPKdS1_dddjjj, .-_Z16DevFirstOrder_LSPdPKdS1_dddjjj
	.globl	_Z40__device_stub__Z12RunGK_FirstSPdS_dS_iiiPdS_dS_iii
	.type	_Z40__device_stub__Z12RunGK_FirstSPdS_dS_iiiPdS_dS_iii, @function
_Z40__device_stub__Z12RunGK_FirstSPdS_dS_iiiPdS_dS_iii:
.LFB2036:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movsd	%xmm0, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z12RunGK_FirstSPdS_dS_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L13:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_Z40__device_stub__Z12RunGK_FirstSPdS_dS_iiiPdS_dS_iii, .-_Z40__device_stub__Z12RunGK_FirstSPdS_dS_iiiPdS_dS_iii
	.globl	_Z12RunGK_FirstSPdS_dS_iii
	.type	_Z12RunGK_FirstSPdS_dS_iii, @function
_Z12RunGK_FirstSPdS_dS_iii:
.LFB2037:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z12RunGK_FirstSPdS_dS_iiiPdS_dS_iii
	.cfi_endproc
.LFE2037:
	.size	_Z12RunGK_FirstSPdS_dS_iii, .-_Z12RunGK_FirstSPdS_dS_iii
	.globl	_Z43__device_stub__Z13RunGK_SecondSPdS_S_dS_iiiPdS_S_dS_iii
	.type	_Z43__device_stub__Z13RunGK_SecondSPdS_S_dS_iiiPdS_S_dS_iii, @function
_Z43__device_stub__Z13RunGK_SecondSPdS_S_dS_iiiPdS_S_dS_iii:
.LFB2038:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movsd	%xmm0, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	movq	%rsp, %rax
	movq	%rax, 168(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z13RunGK_SecondSPdS_S_dS_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L18:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2038:
	.size	_Z43__device_stub__Z13RunGK_SecondSPdS_S_dS_iiiPdS_S_dS_iii, .-_Z43__device_stub__Z13RunGK_SecondSPdS_S_dS_iiiPdS_S_dS_iii
	.globl	_Z13RunGK_SecondSPdS_S_dS_iii
	.type	_Z13RunGK_SecondSPdS_S_dS_iii, @function
_Z13RunGK_SecondSPdS_S_dS_iii:
.LFB2039:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z13RunGK_SecondSPdS_S_dS_iiiPdS_S_dS_iii
	.cfi_endproc
.LFE2039:
	.size	_Z13RunGK_SecondSPdS_S_dS_iii, .-_Z13RunGK_SecondSPdS_S_dS_iii
	.globl	_Z42__device_stub__Z12RunGK_ThirdSPdS_S_dS_iiiPdS_S_dS_iii
	.type	_Z42__device_stub__Z12RunGK_ThirdSPdS_S_dS_iiiPdS_S_dS_iii, @function
_Z42__device_stub__Z12RunGK_ThirdSPdS_S_dS_iiiPdS_S_dS_iii:
.LFB2040:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movsd	%xmm0, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	movq	%rsp, %rax
	movq	%rax, 168(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z12RunGK_ThirdSPdS_S_dS_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L23:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z42__device_stub__Z12RunGK_ThirdSPdS_S_dS_iiiPdS_S_dS_iii, .-_Z42__device_stub__Z12RunGK_ThirdSPdS_S_dS_iiiPdS_S_dS_iii
	.globl	_Z12RunGK_ThirdSPdS_S_dS_iii
	.type	_Z12RunGK_ThirdSPdS_S_dS_iii, @function
_Z12RunGK_ThirdSPdS_S_dS_iii:
.LFB2041:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z12RunGK_ThirdSPdS_S_dS_iiiPdS_S_dS_iii
	.cfi_endproc
.LFE2041:
	.size	_Z12RunGK_ThirdSPdS_S_dS_iii, .-_Z12RunGK_ThirdSPdS_S_dS_iii
	.globl	_Z37__device_stub__Z9copyLSGasPdPKdS1_iiiPdPKdS1_iii
	.type	_Z37__device_stub__Z9copyLSGasPdPKdS1_iiiPdPKdS1_iii, @function
_Z37__device_stub__Z9copyLSGasPdPKdS1_iiiPdPKdS1_iii:
.LFB2042:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z9copyLSGasPdPKdS1_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L28:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2042:
	.size	_Z37__device_stub__Z9copyLSGasPdPKdS1_iiiPdPKdS1_iii, .-_Z37__device_stub__Z9copyLSGasPdPKdS1_iiiPdPKdS1_iii
	.globl	_Z9copyLSGasPdPKdS1_iii
	.type	_Z9copyLSGasPdPKdS1_iii, @function
_Z9copyLSGasPdPKdS1_iii:
.LFB2043:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z9copyLSGasPdPKdS1_iiiPdPKdS1_iii
	.cfi_endproc
.LFE2043:
	.size	_Z9copyLSGasPdPKdS1_iii, .-_Z9copyLSGasPdPKdS1_iii
	.globl	_Z42__device_stub__Z12copyLSLiquidPdPKdS1_iiiiPdPKdS1_iiii
	.type	_Z42__device_stub__Z12copyLSLiquidPdPKdS1_iiiiPdPKdS1_iiii, @function
_Z42__device_stub__Z12copyLSLiquidPdPKdS1_iiiiPdPKdS1_iiii:
.LFB2044:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z12copyLSLiquidPdPKdS1_iiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L33:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2044:
	.size	_Z42__device_stub__Z12copyLSLiquidPdPKdS1_iiiiPdPKdS1_iiii, .-_Z42__device_stub__Z12copyLSLiquidPdPKdS1_iiiiPdPKdS1_iiii
	.globl	_Z12copyLSLiquidPdPKdS1_iiii
	.type	_Z12copyLSLiquidPdPKdS1_iiii, @function
_Z12copyLSLiquidPdPKdS1_iiii:
.LFB2045:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z12copyLSLiquidPdPKdS1_iiiiPdPKdS1_iiii
	.cfi_endproc
.LFE2045:
	.size	_Z12copyLSLiquidPdPKdS1_iiii, .-_Z12copyLSLiquidPdPKdS1_iiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z12copyLSLiquidPdPKdS1_iiii"
.LC1:
	.string	"_Z9copyLSGasPdPKdS1_iii"
.LC2:
	.string	"_Z12RunGK_ThirdSPdS_S_dS_iii"
.LC3:
	.string	"_Z13RunGK_SecondSPdS_S_dS_iii"
.LC4:
	.string	"_Z12RunGK_FirstSPdS_dS_iii"
.LC5:
	.string	"_Z16DevFirstOrder_LSPdPKdS1_dddjjj"
.LC6:
	.string	"_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2047:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12copyLSLiquidPdPKdS1_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9copyLSGasPdPKdS1_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12RunGK_ThirdSPdS_S_dS_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13RunGK_SecondSPdS_S_dS_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12RunGK_FirstSPdS_dS_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16DevFirstOrder_LSPdPKdS1_dddjjj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2047:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<hip/hip_runtime.h>
#define MAX(x, y) (((x) > (y)) ? (x) : (y))
#define MIN(x, y) (((x) < (y)) ? (x) : (y))

__global__ void extrapolKernel(
                               double* const rs,          //RS
                               const double* const extVal,//Var extrapol
                               const double* const phiS,  //Level Set F
                               const double* const jbn,   //Jacobian
                               const double* const d_Phi, //Phi Der
                               const double deltaX,
                               const double deltaY,
                               const double deltaZ,
                               const unsigned int Nx,
                               const unsigned int Ny,
                               const unsigned int Nz,
                               const int extFlag
                              )
{

   const int Offset = Nx*Ny*Nz;
   int id2;
   double so;
   double phiDeltaX, phiDeltaY, phiDeltaZ,
         d_ext_xu, d_ext_xd,
         d_ext_yu, d_ext_yd,
         d_ext_zu, d_ext_zd;

   int idx = blockIdx.x*blockDim.x + threadIdx.x,
                      idy = blockIdx.y*blockDim.y + threadIdx.y,
                      idz = blockIdx.z*blockDim.z + threadIdx.z;  


   //Offsets example (id_ip) EQ (i+1,j,k) 
   int id = Nx*Ny*idz + Nx*idy + idx,
                id_ip = Nx*Ny*idz + Nx*idy + idx + 1, 
                id_im = Nx*Ny*idz + Nx*idy + idx - 1, 
                id_jp = Nx*Ny*idz + Nx*(idy + 1) + idx, 
                id_jm = Nx*Ny*idz + Nx*(idy - 1) + idx, 
                id_kp = Nx*Ny*(idz + 1) + Nx*idy + idx, 
                id_km = Nx*Ny*(idz - 1) + Nx*idy + idx; 


   //Dealing with boundaries
   id2 = id;
   if(idx==0){id2 = id_ip; id_im = id;}
   if(idy==0){id2 = id_jp; id_jm = id;} 
   if(idz==0){id2 = id_kp; id_km = id;} 
   if(idx==Nx-1){id2 = id_im ; id_ip = id;} 
   if(idy==Ny-1){id2 = id_jm ; id_jp = id;} 
   if(idz==Nz-1){id2 = id_km ; id_kp = id;} 

  

// pick up the side to extrapol 
   if(extFlag>0){

      so = (double)(phiS[id]>0.0);       
   }
   else{
      so = -1.0*(double)(phiS[id]<=0.0);       
   }

  
   phiDeltaX = so*d_Phi[id           ];
   phiDeltaY = so*d_Phi[id + 1*Offset];
   phiDeltaZ = so*d_Phi[id + 2*Offset];


// Downwind derivatives of ext 
   d_ext_xd = deltaX*jbn[id           ]*(extVal[id2] - extVal[id_im]); 
   d_ext_yd = deltaY*jbn[id + 4*Offset]*(extVal[id2] - extVal[id_jm]); 
   d_ext_zd = deltaZ*jbn[id + 8*Offset]*(extVal[id2] - extVal[id_km]); 

// Upwind derivatives of ext 
   d_ext_xu = deltaX*jbn[id           ]*(extVal[id_ip] - extVal[id2]); 
   d_ext_yu = deltaY*jbn[id + 4*Offset]*(extVal[id_jp] - extVal[id2]); 
   d_ext_zu = deltaZ*jbn[id + 8*Offset]*(extVal[id_kp] - extVal[id2]); 
   

   double xMax = (double)(phiDeltaX > 0.0) 
               - (double)(phiDeltaX < 0.0);

   rs[id] = (0.5*(xMax + 1.0)*d_ext_xd 
          + 0.5*abs(xMax - 1.0)*d_ext_xu)*phiDeltaX;

   xMax = (double)(phiDeltaY > 0.0) 
        - (double)(phiDeltaY < 0.0);

   rs[id] += (0.5*(xMax + 1.0)*d_ext_yd 
          + 0.5*abs(xMax - 1.0)*d_ext_yu)*phiDeltaY;


   xMax = (double)(phiDeltaZ > 0.0) 
        - (double)(phiDeltaZ < 0.0);

   rs[id] += (0.5*(xMax + 1.0)*d_ext_zd 
          + 0.5*abs(xMax - 1.0)*d_ext_zu)*phiDeltaZ;

          
   return; 

}

__global__ void DevFirstOrder_LS(
                                double* const d_Phi,
                                const double* const phiS,
                                const double* const jbn,
                                const double deltaX,
                                const double deltaY,
                                const double deltaZ,
                                const unsigned int Nx, 
                                const unsigned int Ny, 
                                const unsigned int Nz
                                )
{

   const unsigned int idx = blockIdx.x*blockDim.x + threadIdx.x,
                      idy = blockIdx.y*blockDim.y + threadIdx.y,
                      idz = blockIdx.z*blockDim.z + threadIdx.z;  

   //Offsets example (id_ip) EQ (i+1,j,k) 
   unsigned int id = Nx*Ny*idz + Nx*idy + idx,
                id_ip = Nx*Ny*idz + Nx*idy + idx + 1, 
                id_im = Nx*Ny*idz + Nx*idy + idx - 1, 
                id_jp = Nx*Ny*idz + Nx*(idy + 1) + idx, 
                id_jm = Nx*Ny*idz + Nx*(idy - 1) + idx, 
                id_kp = Nx*Ny*(idz + 1) + Nx*idy + idx, 
                id_km = Nx*Ny*(idz - 1) + Nx*idy + idx; 
   
   double factor = 0.5;

   //Dealing with boundaries
   if(idx==0){id_im = id; factor = 1.0;}
   if(idy==0){id_jm = id; factor = 1.0;}
   if(idz==0){id_km = id; factor = 1.0;}
   if(idx==Nx-1){id_ip = id; factor = 1.0;}
   if(idy==Ny-1){id_jp = id; factor = 1.0;}
   if(idz==Nz-1){id_kp = id; factor = 1.0;}

   const unsigned int Offset = Nx*Ny*Nz;

   d_Phi[           id] = factor*deltaX*jbn[id           ]
                        * (phiS[id_ip] - phiS[id_im]);

   d_Phi[1*Offset + id] = factor*deltaY*jbn[id + 4*Offset]
                        * (phiS[id_jp] - phiS[id_jm]);

   d_Phi[2*Offset + id] = factor*deltaZ*jbn[id + 8*Offset]
                        * (phiS[id_kp] - phiS[id_km]);
	
   return;
}

__global__ void RunGK_FirstS(
                            double* d,
                            double* d0,
                            double  dt, 
                            double* rs,
                            const int Nx, const int Ny, const int Nz
                            )
{
   const unsigned int idx = blockIdx.x*blockDim.x + threadIdx.x,
                      idy = blockIdx.y*blockDim.y + threadIdx.y,
                      idz = blockIdx.z*blockDim.z + threadIdx.z;

   const unsigned int id = idx + idy*Nx + idz*Nx*Ny;
   
   d[id] = d0[id] - dt*rs[id];

   return;
}

__global__ void RunGK_SecondS(
                             double* d,
                             double* d0,
                             double* d1,
                             double  dt, 
                             double* rs,
                             const int Nx, const int Ny, const int Nz
                            )
{
   const unsigned int idx = blockIdx.x*blockDim.x + threadIdx.x,
                      idy = blockIdx.y*blockDim.y + threadIdx.y,
                      idz = blockIdx.z*blockDim.z + threadIdx.z;

   const unsigned int id = idx + idy*Nx + idz*Nx*Ny;
   
   d[id] = 0.75*d0[id] +0.25*( d1[id] - dt*rs[id]);

   return;
}

__global__ void RunGK_ThirdS(
                             double* d,
                             double* d0,
                             double* d1,
                             const double dt, 
                             double* rs,
                             const int Nx, const int Ny, const int Nz
                            )
{
   const unsigned int idx = blockIdx.x*blockDim.x + threadIdx.x,
                      idy = blockIdx.y*blockDim.y + threadIdx.y,
                      idz = blockIdx.z*blockDim.z + threadIdx.z;

   const unsigned int id = idx + idy*Nx + idz*Nx*Ny;
   
   d[id] = (d0[id] + 2.0*( d1[id] - dt*rs[id])) / 3.0 ;

   return;
}

__global__ void copyLSGas(
                          double* const value,
                          const double* const copyVal, 
                          const double* const phiS,
                          int Nx, int Ny, int Nz
                         )
{

   const unsigned int idx = blockIdx.x*blockDim.x + threadIdx.x,
                      idy = blockIdx.y*blockDim.y + threadIdx.y,
                      idz = blockIdx.z*blockDim.z + threadIdx.z;

   const unsigned int id = idx + idy*Nx + idz*Nx*Ny;
   
   value[id] = (phiS[id] > 0.0) ? copyVal[id] : value[id];
   
   return;
}


__global__ void copyLSLiquid(
                             double* const value,
                             const double* const copyVal, 
                             const double* const phiS,
                             int Nx, int Ny, int Nz,
                             int disp
                            )
{

   const unsigned int idx = blockIdx.x*blockDim.x + threadIdx.x,
                      idy = blockIdx.y*blockDim.y + threadIdx.y,
                      idz = blockIdx.z*blockDim.z + threadIdx.z;

   const unsigned int id = idx + idy*Nx + idz*Nx*Ny;

   
   const unsigned int offset = Nx*Ny*Nz;
   
   value[id + disp*offset] = (phiS[id] < 0.0) ? copyVal[id] :  
                                     value[id + disp*offset];
   
   return;
}

	.text
	.file	"extrapol.hip"
	.globl	_Z29__device_stub__extrapolKernelPdPKdS1_S1_S1_dddjjji # -- Begin function _Z29__device_stub__extrapolKernelPdPKdS1_S1_S1_dddjjji
	.type	_Z29__device_stub__extrapolKernelPdPKdS1_S1_S1_dddjjji,@function
_Z29__device_stub__extrapolKernelPdPKdS1_S1_S1_dddjjji: # @_Z29__device_stub__extrapolKernelPdPKdS1_S1_S1_dddjjji
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$224, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	88(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	80(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	72(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	56(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	48(%rsp), %r8
	movsd	%xmm0, (%r8)
	leaq	40(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	32(%rsp), %r11
	movsd	%xmm2, (%r11)
	leaq	12(%rsp), %r14
	movl	%r9d, (%r14)
	leaq	128(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r10, 48(%rbx)
	movq	%r11, 56(%rbx)
	movq	%r14, 64(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	112(%rsp), %r14
	leaq	96(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$240, %rsp
	.cfi_adjust_cfa_offset -240
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__extrapolKernelPdPKdS1_S1_S1_dddjjji, .Lfunc_end0-_Z29__device_stub__extrapolKernelPdPKdS1_S1_S1_dddjjji
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__DevFirstOrder_LSPdPKdS1_dddjjj # -- Begin function _Z31__device_stub__DevFirstOrder_LSPdPKdS1_dddjjj
	.type	_Z31__device_stub__DevFirstOrder_LSPdPKdS1_dddjjj,@function
_Z31__device_stub__DevFirstOrder_LSPdPKdS1_dddjjj: # @_Z31__device_stub__DevFirstOrder_LSPdPKdS1_dddjjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movsd	%xmm0, (%rdx)
	leaq	40(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	32(%rsp), %r11
	movsd	%xmm2, (%r11)
	leaq	12(%rsp), %r14
	movl	%ecx, (%r14)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r10, 32(%rbx)
	movq	%r11, 40(%rbx)
	movq	%r14, 48(%rbx)
	movq	%rcx, 56(%rbx)
	movq	%r8, 64(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16DevFirstOrder_LSPdPKdS1_dddjjj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__DevFirstOrder_LSPdPKdS1_dddjjj, .Lfunc_end1-_Z31__device_stub__DevFirstOrder_LSPdPKdS1_dddjjj
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__RunGK_FirstSPdS_dS_iii # -- Begin function _Z27__device_stub__RunGK_FirstSPdS_dS_iii
	.type	_Z27__device_stub__RunGK_FirstSPdS_dS_iii,@function
_Z27__device_stub__RunGK_FirstSPdS_dS_iii: # @_Z27__device_stub__RunGK_FirstSPdS_dS_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	32(%rsp), %r10
	movq	%rdx, (%r10)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r10, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12RunGK_FirstSPdS_dS_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z27__device_stub__RunGK_FirstSPdS_dS_iii, .Lfunc_end2-_Z27__device_stub__RunGK_FirstSPdS_dS_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__RunGK_SecondSPdS_S_dS_iii # -- Begin function _Z28__device_stub__RunGK_SecondSPdS_S_dS_iii
	.type	_Z28__device_stub__RunGK_SecondSPdS_S_dS_iii,@function
_Z28__device_stub__RunGK_SecondSPdS_S_dS_iii: # @_Z28__device_stub__RunGK_SecondSPdS_S_dS_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, (%rdx)
	leaq	24(%rsp), %r10
	movq	%rcx, (%r10)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r10, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13RunGK_SecondSPdS_S_dS_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z28__device_stub__RunGK_SecondSPdS_S_dS_iii, .Lfunc_end3-_Z28__device_stub__RunGK_SecondSPdS_S_dS_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__RunGK_ThirdSPdS_S_dS_iii # -- Begin function _Z27__device_stub__RunGK_ThirdSPdS_S_dS_iii
	.type	_Z27__device_stub__RunGK_ThirdSPdS_S_dS_iii,@function
_Z27__device_stub__RunGK_ThirdSPdS_S_dS_iii: # @_Z27__device_stub__RunGK_ThirdSPdS_S_dS_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, (%rdx)
	leaq	24(%rsp), %r10
	movq	%rcx, (%r10)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r10, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12RunGK_ThirdSPdS_S_dS_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z27__device_stub__RunGK_ThirdSPdS_S_dS_iii, .Lfunc_end4-_Z27__device_stub__RunGK_ThirdSPdS_S_dS_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__copyLSGasPdPKdS1_iii # -- Begin function _Z24__device_stub__copyLSGasPdPKdS1_iii
	.type	_Z24__device_stub__copyLSGasPdPKdS1_iii,@function
_Z24__device_stub__copyLSGasPdPKdS1_iii: # @_Z24__device_stub__copyLSGasPdPKdS1_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9copyLSGasPdPKdS1_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z24__device_stub__copyLSGasPdPKdS1_iii, .Lfunc_end5-_Z24__device_stub__copyLSGasPdPKdS1_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__copyLSLiquidPdPKdS1_iiii # -- Begin function _Z27__device_stub__copyLSLiquidPdPKdS1_iiii
	.type	_Z27__device_stub__copyLSLiquidPdPKdS1_iiii,@function
_Z27__device_stub__copyLSLiquidPdPKdS1_iiii: # @_Z27__device_stub__copyLSLiquidPdPKdS1_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12copyLSLiquidPdPKdS1_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z27__device_stub__copyLSLiquidPdPKdS1_iiii, .Lfunc_end6-_Z27__device_stub__copyLSLiquidPdPKdS1_iiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16DevFirstOrder_LSPdPKdS1_dddjjj, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12RunGK_FirstSPdS_dS_iii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13RunGK_SecondSPdS_S_dS_iii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12RunGK_ThirdSPdS_S_dS_iii, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9copyLSGasPdPKdS1_iii, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12copyLSLiquidPdPKdS1_iiii, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji,@object # @_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji
	.section	.rodata,"a",@progbits
	.globl	_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji
	.p2align	3, 0x0
_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji:
	.quad	_Z29__device_stub__extrapolKernelPdPKdS1_S1_S1_dddjjji
	.size	_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji, 8

	.type	_Z16DevFirstOrder_LSPdPKdS1_dddjjj,@object # @_Z16DevFirstOrder_LSPdPKdS1_dddjjj
	.globl	_Z16DevFirstOrder_LSPdPKdS1_dddjjj
	.p2align	3, 0x0
_Z16DevFirstOrder_LSPdPKdS1_dddjjj:
	.quad	_Z31__device_stub__DevFirstOrder_LSPdPKdS1_dddjjj
	.size	_Z16DevFirstOrder_LSPdPKdS1_dddjjj, 8

	.type	_Z12RunGK_FirstSPdS_dS_iii,@object # @_Z12RunGK_FirstSPdS_dS_iii
	.globl	_Z12RunGK_FirstSPdS_dS_iii
	.p2align	3, 0x0
_Z12RunGK_FirstSPdS_dS_iii:
	.quad	_Z27__device_stub__RunGK_FirstSPdS_dS_iii
	.size	_Z12RunGK_FirstSPdS_dS_iii, 8

	.type	_Z13RunGK_SecondSPdS_S_dS_iii,@object # @_Z13RunGK_SecondSPdS_S_dS_iii
	.globl	_Z13RunGK_SecondSPdS_S_dS_iii
	.p2align	3, 0x0
_Z13RunGK_SecondSPdS_S_dS_iii:
	.quad	_Z28__device_stub__RunGK_SecondSPdS_S_dS_iii
	.size	_Z13RunGK_SecondSPdS_S_dS_iii, 8

	.type	_Z12RunGK_ThirdSPdS_S_dS_iii,@object # @_Z12RunGK_ThirdSPdS_S_dS_iii
	.globl	_Z12RunGK_ThirdSPdS_S_dS_iii
	.p2align	3, 0x0
_Z12RunGK_ThirdSPdS_S_dS_iii:
	.quad	_Z27__device_stub__RunGK_ThirdSPdS_S_dS_iii
	.size	_Z12RunGK_ThirdSPdS_S_dS_iii, 8

	.type	_Z9copyLSGasPdPKdS1_iii,@object # @_Z9copyLSGasPdPKdS1_iii
	.globl	_Z9copyLSGasPdPKdS1_iii
	.p2align	3, 0x0
_Z9copyLSGasPdPKdS1_iii:
	.quad	_Z24__device_stub__copyLSGasPdPKdS1_iii
	.size	_Z9copyLSGasPdPKdS1_iii, 8

	.type	_Z12copyLSLiquidPdPKdS1_iiii,@object # @_Z12copyLSLiquidPdPKdS1_iiii
	.globl	_Z12copyLSLiquidPdPKdS1_iiii
	.p2align	3, 0x0
_Z12copyLSLiquidPdPKdS1_iiii:
	.quad	_Z27__device_stub__copyLSLiquidPdPKdS1_iiii
	.size	_Z12copyLSLiquidPdPKdS1_iiii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji"
	.size	.L__unnamed_1, 40

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16DevFirstOrder_LSPdPKdS1_dddjjj"
	.size	.L__unnamed_2, 35

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z12RunGK_FirstSPdS_dS_iii"
	.size	.L__unnamed_3, 27

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z13RunGK_SecondSPdS_S_dS_iii"
	.size	.L__unnamed_4, 30

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z12RunGK_ThirdSPdS_S_dS_iii"
	.size	.L__unnamed_5, 29

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z9copyLSGasPdPKdS1_iii"
	.size	.L__unnamed_6, 24

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z12copyLSLiquidPdPKdS1_iiii"
	.size	.L__unnamed_7, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__extrapolKernelPdPKdS1_S1_S1_dddjjji
	.addrsig_sym _Z31__device_stub__DevFirstOrder_LSPdPKdS1_dddjjj
	.addrsig_sym _Z27__device_stub__RunGK_FirstSPdS_dS_iii
	.addrsig_sym _Z28__device_stub__RunGK_SecondSPdS_S_dS_iii
	.addrsig_sym _Z27__device_stub__RunGK_ThirdSPdS_S_dS_iii
	.addrsig_sym _Z24__device_stub__copyLSGasPdPKdS1_iii
	.addrsig_sym _Z27__device_stub__copyLSLiquidPdPKdS1_iiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14extrapolKernelPdPKdS1_S1_S1_dddjjji
	.addrsig_sym _Z16DevFirstOrder_LSPdPKdS1_dddjjj
	.addrsig_sym _Z12RunGK_FirstSPdS_dS_iii
	.addrsig_sym _Z13RunGK_SecondSPdS_S_dS_iii
	.addrsig_sym _Z12RunGK_ThirdSPdS_S_dS_iii
	.addrsig_sym _Z9copyLSGasPdPKdS1_iii
	.addrsig_sym _Z12copyLSLiquidPdPKdS1_iiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji ; -- Begin function _Z14extrapolKernelPdPKdS1_S1_S1_dddjjji
	.globl	_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji
	.p2align	8
	.type	_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji,@function
_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji: ; @_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x5c
	s_load_b128 s[20:23], s[0:1], 0x40
	v_bfe_u32 v1, v0, 20, 10
	v_bfe_u32 v2, v0, 10, 10
	v_dual_mov_b32 v31, 0 :: v_dual_and_b32 v0, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v35, v31
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_lshr_b32 s4, s2, 16
	v_mad_u64_u32 v[3:4], null, s15, s3, v[1:2]
	s_mul_i32 s3, s21, s20
	s_and_b32 s2, s2, 0xffff
	s_cmp_gt_i32 s23, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[4:5], null, s14, s4, v[2:3]
	v_mul_lo_u32 v15, v3, s3
	v_mad_u64_u32 v[1:2], null, s13, s2, v[0:1]
	s_load_b512 s[4:19], s[0:1], 0x0
	v_mov_b32_e32 v2, 0xbff00000
	v_mul_lo_u32 v16, v4, s20
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v17, s3, v15
	v_add_nc_u32_e32 v0, v15, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v0, v1
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_nc_u32_e32 v23, 1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 3, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s8, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v7, vcc_lo
	v_add_co_u32 v10, vcc_lo, s12, v6
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v7, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	s_mul_i32 s8, s3, s22
	v_add3_u32 v12, s8, s8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[13:14], 3, v[12:13]
	s_waitcnt vmcnt(0)
	v_cmp_ge_f64_e32 vcc_lo, 0, v[8:9]
	v_cndmask_b32_e32 v32, 0x80000000, v2, vcc_lo
	v_cmp_lt_f64_e32 vcc_lo, 0, v[8:9]
	global_load_b64 v[8:9], v[10:11], off
	v_subrev_nc_u32_e32 v2, s20, v16
	v_add3_u32 v16, v16, v1, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add3_u32 v2, v2, v1, v15
	v_add_nc_u32_e32 v15, -1, v5
	v_lshl_add_u32 v29, s3, 1, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_lshl_add_u32 v18, s20, 1, v2
	v_cndmask_b32_e64 v33, 0, 0x3ff00000, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_ashr_i32 s9, s8, 31
	s_lshl_b64 s[0:1], s[8:9], 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v32, v32, v33 :: v_dual_mov_b32 v33, v31
	v_add_co_u32 v10, s0, v10, s0
	v_add_co_ci_u32_e64 v11, s0, s1, v11, s0
	v_add_co_u32 v13, s0, s12, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s0, s13, v14, s0
	global_load_b64 v[10:11], v[10:11], off
	v_cmp_eq_u32_e64 s0, 0, v1
	s_add_i32 s1, s21, -1
	global_load_b64 v[13:14], v[13:14], off
	v_cmp_eq_u32_e64 s1, s1, v4
	v_cndmask_b32_e64 v0, v15, v0, s0
	v_cndmask_b32_e64 v15, v5, v23, s0
	v_cmp_eq_u32_e64 s0, 0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v2, v2, v5, s0
	v_cndmask_b32_e64 v17, v15, v18, s0
	v_cmp_eq_u32_e64 s0, 0, v3
	v_cndmask_b32_e64 v18, v18, v5, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v15, v16, v5, s0
	v_cndmask_b32_e64 v17, v17, v29, s0
	s_add_i32 s0, s20, -1
	v_lshl_add_u32 v16, s8, 1, v12
	v_cmp_eq_u32_e64 s0, s0, v1
	v_ashrrev_i32_e32 v19, 31, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshl_add_u32 v27, s8, 2, v16
	v_cndmask_b32_e64 v1, v17, v0, s0
	v_ashrrev_i32_e32 v17, 31, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v28, 31, v27
	v_cndmask_b32_e64 v1, v1, v2, s1
	s_add_i32 s1, s22, -1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[20:21], 3, v[16:17]
	v_cmp_eq_u32_e64 s1, s1, v3
	v_lshlrev_b64 v[17:18], 3, v[18:19]
	v_lshlrev_b64 v[27:28], 3, v[27:28]
	v_ashrrev_i32_e32 v16, 31, v15
	v_cndmask_b32_e64 v3, v1, v15, s1
	v_add_co_u32 v19, s2, s10, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v20, s2, s11, v21, s2
	v_ashrrev_i32_e32 v4, 31, v3
	v_add_co_u32 v17, s2, s6, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v18, s2, s7, v18, s2
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_cndmask_b32_e64 v1, v23, v5, s0
	v_add_co_u32 v23, s0, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v24, s0, s11, v7, s0
	v_add_co_u32 v3, s2, s6, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s7, v4, s2
	global_load_b64 v[19:20], v[19:20], off
	s_clause 0x1
	global_load_b64 v[17:18], v[17:18], off
	global_load_b64 v[21:22], v[3:4], off
	v_ashrrev_i32_e32 v3, 31, v2
	v_cndmask_b32_e64 v29, v29, v5, s1
	v_lshlrev_b64 v[15:16], 3, v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[3:4], 3, v[2:3]
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v30, 31, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	v_add_co_u32 v3, s0, s6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v4, s0, s7, v4, s0
	v_lshlrev_b64 v[29:30], 3, v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s0, s6, v1
	v_add_co_ci_u32_e64 v2, s0, s7, v2, s0
	global_load_b64 v[23:24], v[23:24], off
	s_clause 0x1
	global_load_b64 v[3:4], v[3:4], off
	global_load_b64 v[25:26], v[1:2], off
	v_ashrrev_i32_e32 v1, 31, v0
	v_mov_b32_e32 v2, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_add_co_u32 v0, s0, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s0, s7, v1, s0
	v_add_co_u32 v27, s0, s10, v27
	v_add_co_ci_u32_e64 v28, s0, s11, v28, s0
	v_add_co_u32 v29, s0, s6, v29
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v30, s0, s7, v30, s0
	global_load_b64 v[27:28], v[27:28], off
	s_clause 0x1
	global_load_b64 v[0:1], v[0:1], off
	global_load_b64 v[29:30], v[29:30], off
	v_add_co_u32 v15, s0, s6, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v16, s0, s7, v16, s0
	global_load_b64 v[15:16], v[15:16], off
	s_waitcnt vmcnt(12)
	v_mul_f64 v[8:9], v[31:32], v[8:9]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[8:9]
	s_waitcnt vmcnt(11)
	v_mul_f64 v[10:11], v[31:32], v[10:11]
	s_waitcnt vmcnt(10)
	v_mul_f64 v[12:13], v[31:32], v[13:14]
	v_cndmask_b32_e64 v34, 0, 0x3ff00000, vcc_lo
	v_cmp_lt_f64_e32 vcc_lo, 0, v[8:9]
	s_waitcnt vmcnt(9)
	v_mul_f64 v[19:20], v[19:20], s[16:17]
	v_cndmask_b32_e64 v32, 0, 0x3ff00000, vcc_lo
	v_cmp_lt_f64_e32 vcc_lo, 0, v[10:11]
	s_waitcnt vmcnt(7)
	v_add_f64 v[17:18], v[17:18], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[33:34], v[31:32], -v[33:34]
	s_waitcnt vmcnt(6)
	v_mul_f64 v[23:24], v[23:24], s[14:15]
	s_waitcnt vmcnt(5)
	v_add_f64 v[4:5], v[21:22], -v[3:4]
	s_waitcnt vmcnt(4)
	v_add_f64 v[25:26], v[25:26], -v[21:22]
	v_cndmask_b32_e64 v32, 0, 0x3ff00000, vcc_lo
	v_cmp_gt_f64_e32 vcc_lo, 0, v[10:11]
	v_mul_f64 v[17:18], v[19:20], v[17:18]
	v_add_f64 v[39:40], v[33:34], -1.0
	s_waitcnt vmcnt(3)
	v_mul_f64 v[27:28], v[27:28], s[18:19]
	s_waitcnt vmcnt(2)
	v_add_f64 v[0:1], v[21:22], -v[0:1]
	s_waitcnt vmcnt(1)
	v_add_f64 v[29:30], v[29:30], -v[21:22]
	s_waitcnt vmcnt(0)
	v_add_f64 v[14:15], v[21:22], -v[15:16]
	v_mul_f64 v[4:5], v[19:20], v[4:5]
	v_mul_f64 v[19:20], v[23:24], v[25:26]
	v_cndmask_b32_e64 v36, 0, 0x3ff00000, vcc_lo
	v_cmp_gt_f64_e32 vcc_lo, 0, v[12:13]
	v_mul_f64 v[25:26], |v[39:40]|, 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[35:36], v[31:32], -v[35:36]
	v_mul_f64 v[0:1], v[23:24], v[0:1]
	v_mul_f64 v[21:22], v[27:28], v[29:30]
	v_mul_f64 v[14:15], v[27:28], v[14:15]
	v_cndmask_b32_e64 v3, 0, 0x3ff00000, vcc_lo
	v_cmp_lt_f64_e32 vcc_lo, 0, v[12:13]
	v_mul_f64 v[19:20], v[25:26], v[19:20]
	v_add_f64 v[37:38], v[35:36], -1.0
	v_add_f64 v[35:36], v[35:36], 1.0
	v_cndmask_b32_e64 v32, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[37:38], |v[37:38]|, 0.5
	v_add_f64 v[2:3], v[31:32], -v[2:3]
	v_add_f64 v[31:32], v[33:34], 1.0
	v_mul_f64 v[33:34], v[35:36], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[17:18], v[37:38], v[17:18]
	v_add_f64 v[35:36], v[2:3], -1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[23:24], v[31:32], 0.5
	v_add_f64 v[2:3], v[2:3], 1.0
	v_fma_f64 v[4:5], v[33:34], v[4:5], v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[16:17], |v[35:36]|, 0.5
	v_fma_f64 v[0:1], v[23:24], v[0:1], v[19:20]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[2:3], v[2:3], 0.5
	v_mul_f64 v[4:5], v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[16:17], v[21:22]
	v_fma_f64 v[0:1], v[8:9], v[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], v[14:15], v[10:11]
	v_fma_f64 v[0:1], v[12:13], v[2:3], v[0:1]
	v_add_co_u32 v2, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v7, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14extrapolKernelPdPKdS1_S1_S1_dddjjji
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 41
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji, .Lfunc_end0-_Z14extrapolKernelPdPKdS1_S1_S1_dddjjji
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1572
; NumSgprs: 26
; NumVgprs: 41
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 41
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z16DevFirstOrder_LSPdPKdS1_dddjjj ; -- Begin function _Z16DevFirstOrder_LSPdPKdS1_dddjjj
	.globl	_Z16DevFirstOrder_LSPdPKdS1_dddjjj
	.p2align	8
	.type	_Z16DevFirstOrder_LSPdPKdS1_dddjjj,@function
_Z16DevFirstOrder_LSPdPKdS1_dddjjj:     ; @_Z16DevFirstOrder_LSPdPKdS1_dddjjj
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x4c
	s_load_b256 s[16:23], s[0:1], 0x20
	v_bfe_u32 v1, v0, 20, 10
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_load_b256 s[24:31], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_lshr_b32 s4, s2, 16
	v_mad_u64_u32 v[3:4], null, s15, s3, v[1:2]
	v_mov_b32_e32 v1, 0
	s_mul_i32 s5, s21, s20
	s_and_b32 s0, s2, 0xffff
	s_add_i32 s1, s20, -1
	s_lshl_b32 s2, s20, 1
	s_add_i32 s3, s21, -1
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u64_u32 v[4:5], null, s14, s4, v[2:3]
	v_mul_lo_u32 v2, v3, s5
	v_mad_u64_u32 v[5:6], null, s13, s0, v[0:1]
	s_add_i32 s4, s22, -1
	s_lshl_b32 s6, s5, 1
	v_mov_b32_e32 v7, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v16, v4, s20
	v_mov_b32_e32 v13, v1
	v_cmp_ne_u32_e32 vcc_lo, s1, v5
	v_add_nc_u32_e32 v17, v2, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v9, v1 :: v_dual_add_nc_u32 v0, v2, v16
	v_add_nc_u32_e32 v2, s5, v2
	s_mul_i32 s5, s5, s22
	v_add_nc_u32_e32 v6, v0, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, v0, v5, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v12, -1, v6
	v_lshlrev_b64 v[10:11], 3, v[6:7]
	v_lshlrev_b64 v[7:8], 3, v[8:9]
	v_add_nc_u32_e32 v9, s20, v16
	v_add_nc_u32_e32 v16, v16, v5
	v_cndmask_b32_e32 v12, v12, v0, vcc_lo
	v_mov_b32_e32 v0, 0x3ff00000
	v_add_co_u32 v14, s0, s28, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v15, s0, s29, v11, s0
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	v_add_co_u32 v7, s0, s26, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s0, s27, v8, s0
	v_add_co_u32 v12, s0, s26, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s0, s27, v13, s0
	global_load_b64 v[14:15], v[14:15], off
	s_clause 0x1
	global_load_b64 v[7:8], v[7:8], off
	global_load_b64 v[12:13], v[12:13], off
	v_cmp_eq_u32_e64 s0, s1, v5
	v_subrev_nc_u32_e32 v5, s2, v9
	v_cmp_eq_u32_e64 s2, s3, v4
	v_cmp_eq_u32_e64 s1, s4, v3
	v_cmp_eq_u32_e64 s4, 0, v3
	v_cmp_eq_u32_e64 s3, 0, v4
	v_mov_b32_e32 v4, v1
	s_or_b32 s0, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s1, s0
	s_or_b32 s0, s4, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s3
	s_or_b32 vcc_lo, s0, vcc_lo
	v_add_nc_u32_e32 v9, v17, v9
	v_add_nc_u32_e32 v17, v17, v5
	s_waitcnt vmcnt(0)
	v_add_f64 v[7:8], v[7:8], -v[12:13]
	v_mov_b32_e32 v13, v1
	v_subrev_nc_u32_e32 v18, s6, v2
	v_add_nc_u32_e32 v2, v16, v2
	v_lshl_add_u32 v12, s5, 2, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v16, v16, v18
	v_cndmask_b32_e64 v5, v2, v6, s1
	v_cndmask_b32_e32 v2, 0x3fe00000, v0, vcc_lo
	v_cndmask_b32_e64 v3, v9, v6, s2
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	v_cndmask_b32_e64 v9, v16, v6, s4
	v_cndmask_b32_e64 v16, v17, v6, s3
	v_mul_f64 v[17:18], v[1:2], s[30:31]
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_co_u32 v10, vcc_lo, s24, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s25, v11, vcc_lo
	v_add_co_u32 v12, vcc_lo, s28, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s29, v13, vcc_lo
	v_add_co_u32 v3, vcc_lo, s26, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s27, v4, vcc_lo
	v_mul_f64 v[14:15], v[14:15], v[17:18]
	v_mov_b32_e32 v17, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[7:8], v[7:8], v[14:15]
	v_lshlrev_b64 v[14:15], 3, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, s26, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s27, v15, vcc_lo
	global_store_b64 v[10:11], v[7:8], off
	global_load_b64 v[7:8], v[12:13], off
	s_clause 0x1
	global_load_b64 v[3:4], v[3:4], off
	global_load_b64 v[10:11], v[14:15], off
	v_mul_f64 v[12:13], v[1:2], s[16:17]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mul_f64 v[7:8], v[7:8], v[12:13]
	s_waitcnt vmcnt(0)
	v_add_f64 v[3:4], v[3:4], -v[10:11]
	v_mov_b32_e32 v10, v1
	v_mul_f64 v[3:4], v[3:4], v[7:8]
	v_dual_mov_b32 v8, v1 :: v_dual_add_nc_u32 v7, s5, v6
	v_mov_b32_e32 v6, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[11:12], 3, v[7:8]
	v_mad_u64_u32 v[13:14], null, s5, 7, v[7:8]
	v_mov_b32_e32 v14, v1
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	v_lshlrev_b64 v[7:8], 3, v[9:10]
	v_add_co_u32 v9, vcc_lo, s24, v11
	v_add_co_ci_u32_e32 v10, vcc_lo, s25, v12, vcc_lo
	v_lshlrev_b64 v[11:12], 3, v[13:14]
	v_add_co_u32 v5, vcc_lo, s26, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s27, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v11, vcc_lo, s28, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s29, v12, vcc_lo
	v_add_co_u32 v7, vcc_lo, s26, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s27, v8, vcc_lo
	global_store_b64 v[9:10], v[3:4], off
	global_load_b64 v[3:4], v[11:12], off
	s_clause 0x1
	global_load_b64 v[5:6], v[5:6], off
	global_load_b64 v[7:8], v[7:8], off
	v_mul_f64 v[9:10], v[1:2], s[18:19]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[3:4], v[9:10]
	s_waitcnt vmcnt(0)
	v_add_f64 v[4:5], v[5:6], -v[7:8]
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	v_mad_u64_u32 v[4:5], null, s5, -6, v[13:14]
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[4:5]
	v_add_co_u32 v0, vcc_lo, s24, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s25, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16DevFirstOrder_LSPdPKdS1_dddjjj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16DevFirstOrder_LSPdPKdS1_dddjjj, .Lfunc_end1-_Z16DevFirstOrder_LSPdPKdS1_dddjjj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 948
; NumSgprs: 34
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z12RunGK_FirstSPdS_dS_iii ; -- Begin function _Z12RunGK_FirstSPdS_dS_iii
	.globl	_Z12RunGK_FirstSPdS_dS_iii
	.p2align	8
	.type	_Z12RunGK_FirstSPdS_dS_iii,@function
_Z12RunGK_FirstSPdS_dS_iii:             ; @_Z12RunGK_FirstSPdS_dS_iii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[8:9], s[0:1], 0x3c
	s_load_b64 s[10:11], s[0:1], 0x20
	v_bfe_u32 v1, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s9, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[1:2]
	s_lshr_b32 s2, s8, 16
	s_and_b32 s8, s8, 0xffff
	s_mul_i32 s14, s14, s2
	s_load_b256 s[0:7], s[0:1], 0x0
	s_mul_i32 s13, s13, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v2, s11
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	v_add3_u32 v1, s14, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v1, s10
	v_mov_b32_e32 v1, 0
	v_add3_u32 v0, s13, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_fma_f64 v[2:3], -v[4:5], s[4:5], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12RunGK_FirstSPdS_dS_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z12RunGK_FirstSPdS_dS_iii, .Lfunc_end2-_Z12RunGK_FirstSPdS_dS_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 244
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z13RunGK_SecondSPdS_S_dS_iii ; -- Begin function _Z13RunGK_SecondSPdS_S_dS_iii
	.globl	_Z13RunGK_SecondSPdS_S_dS_iii
	.p2align	8
	.type	_Z13RunGK_SecondSPdS_S_dS_iii,@function
_Z13RunGK_SecondSPdS_S_dS_iii:          ; @_Z13RunGK_SecondSPdS_S_dS_iii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[16:17], s[0:1], 0x44
	s_load_b128 s[8:11], s[0:1], 0x20
	v_bfe_u32 v1, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s17, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[1:2]
	s_lshr_b32 s2, s16, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_mul_i32 s14, s14, s2
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mul_lo_u32 v1, v2, s11
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, s14, v2, v1
	v_mul_lo_u32 v2, v1, s10
	v_mov_b32_e32 v1, 0
	s_and_b32 s10, s16, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s13, s13, s10
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add3_u32 v0, s13, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s2, v0
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[6:7], v[6:7], off
	s_waitcnt vmcnt(1)
	v_fma_f64 v[2:3], -v[4:5], s[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[2:3], v[2:3], -2
	s_waitcnt vmcnt(0)
	v_fma_f64 v[2:3], 0x3fe80000, v[6:7], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13RunGK_SecondSPdS_S_dS_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z13RunGK_SecondSPdS_S_dS_iii, .Lfunc_end3-_Z13RunGK_SecondSPdS_S_dS_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 300
; NumSgprs: 20
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z12RunGK_ThirdSPdS_S_dS_iii ; -- Begin function _Z12RunGK_ThirdSPdS_S_dS_iii
	.globl	_Z12RunGK_ThirdSPdS_S_dS_iii
	.p2align	8
	.type	_Z12RunGK_ThirdSPdS_S_dS_iii,@function
_Z12RunGK_ThirdSPdS_S_dS_iii:           ; @_Z12RunGK_ThirdSPdS_S_dS_iii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[16:17], s[0:1], 0x44
	s_load_b128 s[8:11], s[0:1], 0x20
	v_bfe_u32 v1, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s17, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[1:2]
	s_lshr_b32 s2, s16, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_mul_i32 s14, s14, s2
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mul_lo_u32 v1, v2, s11
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, s14, v2, v1
	v_mul_lo_u32 v2, v1, s10
	v_mov_b32_e32 v1, 0
	s_and_b32 s10, s16, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s13, s13, s10
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add3_u32 v0, s13, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s2, v0
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[6:7], v[6:7], off
	s_waitcnt vmcnt(1)
	v_fma_f64 v[2:3], -v[4:5], s[6:7], v[2:3]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], 2.0, v[6:7]
	v_div_scale_f64 v[4:5], null, 0x40080000, 0x40080000, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_div_scale_f64 v[8:9], vcc_lo, v[2:3], 0x40080000, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[8:9], v[6:7]
	v_fma_f64 v[4:5], -v[4:5], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[10:11]
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_div_fixup_f64 v[2:3], v[4:5], 0x40080000, v[2:3]
	global_store_b64 v[0:1], v[2:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12RunGK_ThirdSPdS_S_dS_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z12RunGK_ThirdSPdS_S_dS_iii, .Lfunc_end4-_Z12RunGK_ThirdSPdS_S_dS_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 404
; NumSgprs: 20
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z9copyLSGasPdPKdS1_iii ; -- Begin function _Z9copyLSGasPdPKdS1_iii
	.globl	_Z9copyLSGasPdPKdS1_iii
	.p2align	8
	.type	_Z9copyLSGasPdPKdS1_iii,@function
_Z9copyLSGasPdPKdS1_iii:                ; @_Z9copyLSGasPdPKdS1_iii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[8:9], s[0:1], 0x34
	s_load_b256 s[0:7], s[0:1], 0x0
	v_bfe_u32 v1, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s9, 0xffff
	v_mov_b32_e32 v4, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s9, v[1:2]
	v_mul_lo_u32 v1, v2, s7
	v_bfe_u32 v2, v0, 10, 10
	s_lshr_b32 s7, s8, 16
	v_and_b32_e32 v0, 0x3ff, v0
	s_mul_i32 s14, s14, s7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add3_u32 v1, s14, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v2, v1, s6
	v_mov_b32_e32 v1, 0
	s_and_b32 s6, s8, 0xffff
	s_mul_i32 s13, s13, s6
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add3_u32 v0, s13, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, 0, v[2:3]
	v_mov_b32_e32 v2, s2
	v_cndmask_b32_e32 v2, s0, v2, vcc_lo
	v_cndmask_b32_e32 v3, s1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v2, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9copyLSGasPdPKdS1_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z9copyLSGasPdPKdS1_iii, .Lfunc_end5-_Z9copyLSGasPdPKdS1_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 256
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z12copyLSLiquidPdPKdS1_iiii ; -- Begin function _Z12copyLSLiquidPdPKdS1_iiii
	.globl	_Z12copyLSLiquidPdPKdS1_iiii
	.p2align	8
	.type	_Z12copyLSLiquidPdPKdS1_iiii,@function
_Z12copyLSLiquidPdPKdS1_iiii:           ; @_Z12copyLSLiquidPdPKdS1_iiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_bfe_u32 v1, v0, 20, 10
	s_load_b64 s[8:9], s[0:1], 0x10
                                        ; implicit-def: $vgpr4_vgpr5
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s14, s14, s3
	s_mul_i32 s13, s13, s2
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v2, s5
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	v_add3_u32 v1, s14, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v1, v1, s4
	s_mul_i32 s4, s5, s4
	s_mul_i32 s4, s4, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v2, s13, v0, v1
	v_lshlrev_b64 v[6:7], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s8, v6
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v7, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[0:1]
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s5, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, exec_lo, s5
	s_cbranch_execz .LBB6_2
; %bb.1:
	v_mad_u64_u32 v[0:1], null, s4, s7, v[2:3]
	v_mov_b32_e32 v1, v3
                                        ; implicit-def: $vgpr6_vgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
                                        ; implicit-def: $vgpr2_vgpr3
.LBB6_2:                                ; %Flow
	s_and_not1_saveexec_b32 s5, s5
	s_cbranch_execz .LBB6_4
; %bb.3:
	v_mad_u64_u32 v[0:1], null, s4, s7, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v7, vcc_lo
	v_mov_b32_e32 v1, 0
.LBB6_4:
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v[4:5], off
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12copyLSLiquidPdPKdS1_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z12copyLSLiquidPdPKdS1_iiii, .Lfunc_end6-_Z12copyLSLiquidPdPKdS1_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 360
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           8
        .value_kind:     by_value
      - .offset:         56
        .size:           8
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     by_value
      - .offset:         68
        .size:           4
        .value_kind:     by_value
      - .offset:         72
        .size:           4
        .value_kind:     by_value
      - .offset:         76
        .size:           4
        .value_kind:     by_value
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         84
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         88
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         92
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         94
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         96
        .size:           2
        .value_kind:     hidden_group_size_z
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