#include <iostream>
#include <sstream>
#include <stdexcept>

using namespace std;

// assuming same padding
__global__ void Variation2DKernel(float* var, const float* img, int nx, int ny, int nc, float eps)
{
	int ix = blockIdx.x * blockDim.x + threadIdx.x;
	int iy = blockIdx.y * blockDim.y + threadIdx.y;

	if (ix >= nx || iy >= ny)
	{
		return;
	}

	int ind = (ix * ny + iy) * nc;
	float x = img[ind];

	float dx = 0;
	float dy = 0;
	if (ix > 0)
	{
		dx = x - img[ind - ny * nc];
	}

	if (iy > 0)
	{
		dy = x - img[ind - nc];
	}

	var[ind] = sqrtf(dx * dx + dy * dy + eps);
}

// s1, s2 are the first and second derivatives of the surrogate function
__global__ void TVSQS2DKernel(float* s1, float* s2, const float* var, const float* img, int nx, int ny, int nc)
{
	int ix = blockIdx.x * blockDim.x + threadIdx.x;
	int iy = blockIdx.y * blockDim.y + threadIdx.y;

	if (ix >= nx || iy >= ny)
	{
		return;
	}

	int ind = (ix * ny + iy) * nc;
	float x = img[ind];
	float v = var[ind];

	float dx0 = 0;
	float dx1 = 0;
	float dy0 = 0;
	float dy1 = 0;
	float varx, vary;

	if (ix > 0)
	{
		dx0 = x - img[ind - ny * nc];
	}
	if (ix < nx - 1)
	{
		dx1 = x - img[ind + ny * nc];
		varx = var[ind + ny * nc];
	}
	else
	{
		varx = v;  	// approximate var(nx,j) with var(nx-1,j)
	}
	if (iy > 0)
	{
		dy0 = x - img[ind - nc];
	}
	if (iy < ny - 1)
	{
		dy1 = x - img[ind + nc];
		vary = var[ind + nc];
	}
	else
	{
		vary = v;	// approximate var(i, ny) with var(i, ny-1)
	}


	s1[ind] = (dx0 + dy0) / v + dx1 / varx + dy1 / vary;
	s2[ind] = 2 / v + 1 / varx + 1 / vary;

}

// get first and second order derivatives of the surrogate function
// get the variation of the image
void TVSQS2D_gpu(float* s1, float* s2, float* var, const float* img, int nb, int nx, int ny, int nc, float eps)
{
	dim3 threads(32, 16, 1);
	dim3 blocks(ceilf(nx / (float)threads.x), ceilf(ny / (float)threads.y), 1);
	for (int ib = 0; ib < nb; ib++)
	{
		for (int ic = 0; ic < nc; ic++)
		{
			int offset = ib * nx * ny * nc + ic;
			Variation2DKernel<<<blocks, threads>>>(var + offset, img + offset, nx, ny, nc, eps);
			TVSQS2DKernel<<<blocks, threads>>>(s1 + offset, s2 + offset, var + offset, img + offset, nx, ny, nc);
		}
	}

}

extern "C" void cTVSQS2D(float* s1, float* s2, float* var, const float* img, int nb, int nx, int ny, int nc, float eps = 1e-8f)
{
	float* pcus1 = NULL;
	float* pcus2 = NULL;
	float* pcuVar = NULL;
	float* pcuImg = NULL;

	try
	{
		int N = nb * nx * ny * nc;

		if (cudaSuccess != cudaMalloc(&pcus1, sizeof(float) * N))
		{
			throw runtime_error("pcus1 allocation failed");
		}
		if (cudaSuccess != cudaMalloc(&pcus2, sizeof(float) * N))
		{
			throw runtime_error("pcus2 allocation failed");
		}
		if (cudaSuccess != cudaMalloc(&pcuVar, sizeof(float) * N))
		{
			throw runtime_error("pcuVar allocation failed");
		}
		if (cudaSuccess != cudaMalloc(&pcuImg, sizeof(float) * N))
		{
			throw runtime_error("pcuImg allocation failed");
		}

		cudaMemcpy(pcuImg, img, sizeof(float) * N, cudaMemcpyHostToDevice);

		TVSQS2D_gpu(pcus1, pcus2, pcuVar, pcuImg, nb, nx, ny, nc, eps);

		cudaMemcpy(s1, pcus1, sizeof(float) * N, cudaMemcpyDeviceToHost);
		cudaMemcpy(s2, pcus2, sizeof(float) * N, cudaMemcpyDeviceToHost);
		cudaMemcpy(var, pcuVar, sizeof(float) * N, cudaMemcpyDeviceToHost);
	}
	catch (exception& e)
	{
		if (pcus1 != NULL) cudaFree(pcus1);
		if (pcus2 != NULL) cudaFree(pcus2);
		if (pcuVar != NULL) cudaFree(pcuVar);
		if (pcuImg != NULL) cudaFree(pcuImg);

		ostringstream oss;
		oss << "cTVSQS2D failed: " << e.what() << "(" << cudaGetErrorString(cudaGetLastError()) << ")";
		cerr << oss.str() << endl;
		throw runtime_error(oss.str().c_str());
	}

	cudaFree(pcus1);
	cudaFree(pcus2);
	cudaFree(pcuVar);
	cudaFree(pcuImg);

}

// assuming same padding
__global__ void Variation3DKernel(float* var, const float* img, int nx, int ny, int nz, int nc, float eps)
{
	int ix = blockIdx.x * blockDim.x + threadIdx.x;
	int iy = blockIdx.y * blockDim.y + threadIdx.y;
	int iz = blockIdx.z * blockDim.z + threadIdx.z;

	if (ix >= nx || iy >= ny || iz >= nz)
	{
		return;
	}

	int ind = (ix * ny * nz + iy * nz + iz) * nc;
	float x = img[ind];

	float dx = 0;
	float dy = 0;
	float dz = 0;
	if (ix > 0)
	{
		dx = x - img[ind - ny * nz * nc];
	}

	if (iy > 0)
	{
		dy = x - img[ind - nz * nc];
	}

	if (iz > 0)
	{
		dz = x - img[ind - nc];
	}

	var[ind] = sqrtf(dx * dx + dy * dy + dz * dz + eps);
}

// s1, s2 are the first and second derivatives of the surrogate function
__global__ void TVSQS3DKernel(float* s1, float* s2, const float* var, const float* img, int nx, int ny, int nz, int nc)
{
	int ix = blockIdx.x * blockDim.x + threadIdx.x;
	int iy = blockIdx.y * blockDim.y + threadIdx.y;
	int iz = blockIdx.z * blockDim.z + threadIdx.z;

	if (ix >= nx || iy >= ny || iz >= nz)
	{
		return;
	}

	int ind = (ix * ny * nz + iy * nz + iz) * nc;
	float x = img[ind];
	float v = var[ind];

	float dx0 = 0;
	float dx1 = 0;
	float dy0 = 0;
	float dy1 = 0;
	float dz0 = 0;
	float dz1 = 0;
	float varx, vary, varz;

	if (ix > 0)
	{
		dx0 = x - img[ind - ny * nz * nc];
	}
	if (ix < nx - 1)
	{
		dx1 = x - img[ind + ny * nz * nc];
		varx = var[ind + ny * nz * nc];
	}
	else
	{
		varx = v;  	// approximate var(nx,j) with var(nx-1,j)
	}

	if (iy > 0)
	{
		dy0 = x - img[ind - nz * nc];
	}
	if (iy < ny - 1)
	{
		dy1 = x - img[ind + nz * nc];
		vary = var[ind + nz * nc];
	}
	else
	{
		vary = v;	// approximate var(i, ny) with var(i, ny-1)
	}

	if (iz > 0)
	{
		dz0 = x - img[ind - nc];
	}
	if (iz < nz - 1)
	{
		dz1 = x - img[ind + nc];
		varz = var[ind + nc];
	}
	else
	{
		varz = v;
	}


	s1[ind] = (dx0 + dy0 + dz0) / v + dx1 / varx + dy1 / vary + dz1 / varz;
	s2[ind] = 3 / v + 1 / varx + 1 / vary + 1 / varz;

}

// get first and second order derivatives of the surrogate function
// get the variation of the image
void TVSQS3D_gpu(float* s1, float* s2, float* var, const float* img, int nb, int nx, int ny, int nz, int nc, float eps)
{
	dim3 threads(32, 16, 1);
	dim3 blocks(ceilf(nx / (float)threads.x), ceilf(ny / (float)threads.y), nz);
	for (int ib = 0; ib < nb; ib++)
	{
		for (int ic = 0; ic < nc; ic++)
		{
			int offset = ib * nx * ny * nz * nc + ic;
			Variation3DKernel<<<blocks, threads>>>(var + offset, img + offset, nx, ny, nz, nc, eps);
			TVSQS3DKernel<<<blocks, threads>>>(s1 + offset, s2 + offset, var + offset, img + offset, nx, ny, nz, nc);
		}
	}

}

extern "C" void cTVSQS3D(float* s1, float* s2, float* var, const float* img, int nb, int nx, int ny, int nz, int nc, float eps = 1e-8f)
{
	float* pcus1 = NULL;
	float* pcus2 = NULL;
	float* pcuVar = NULL;
	float* pcuImg = NULL;

	try
	{
		int N = nb * nx * ny * nz * nc;

		if (cudaSuccess != cudaMalloc(&pcus1, sizeof(float) * N))
		{
			throw runtime_error("pcus1 allocation failed");
		}
		if (cudaSuccess != cudaMalloc(&pcus2, sizeof(float) * N))
		{
			throw runtime_error("pcus2 allocation failed");
		}
		if (cudaSuccess != cudaMalloc(&pcuVar, sizeof(float) * N))
		{
			throw runtime_error("pcuVar allocation failed");
		}
		if (cudaSuccess != cudaMalloc(&pcuImg, sizeof(float) * N))
		{
			throw runtime_error("pcuImg allocation failed");
		}

		cudaMemcpy(pcuImg, img, sizeof(float) * N, cudaMemcpyHostToDevice);

		TVSQS3D_gpu(pcus1, pcus2, pcuVar, pcuImg, nb, nx, ny, nz, nc, eps);

		cudaMemcpy(s1, pcus1, sizeof(float) * N, cudaMemcpyDeviceToHost);
		cudaMemcpy(s2, pcus2, sizeof(float) * N, cudaMemcpyDeviceToHost);
		cudaMemcpy(var, pcuVar, sizeof(float) * N, cudaMemcpyDeviceToHost);
	}
	catch (exception& e)
	{
		if (pcus1 != NULL) cudaFree(pcus1);
		if (pcus2 != NULL) cudaFree(pcus2);
		if (pcuVar != NULL) cudaFree(pcuVar);
		if (pcuImg != NULL) cudaFree(pcuImg);

		ostringstream oss;
		oss << "cTVSQS3D failed: " << e.what() << "(" << cudaGetErrorString(cudaGetLastError()) << ")";
		cerr << oss.str() << endl;
		throw runtime_error(oss.str().c_str());
	}

	cudaFree(pcus1);
	cudaFree(pcus2);
	cudaFree(pcuVar);
	cudaFree(pcuImg);

}


	.file	"tmpxft_002bac96_00000000-6_TVSQS.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3699:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3699:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z44__device_stub__Z17Variation2DKernelPfPKfiiifPfPKfiiif
	.type	_Z44__device_stub__Z17Variation2DKernelPfPKfiiifPfPKfiiif, @function
_Z44__device_stub__Z17Variation2DKernelPfPKfiiifPfPKfiiif:
.LFB3721:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movss	%xmm0, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z17Variation2DKernelPfPKfiiif(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3721:
	.size	_Z44__device_stub__Z17Variation2DKernelPfPKfiiifPfPKfiiif, .-_Z44__device_stub__Z17Variation2DKernelPfPKfiiifPfPKfiiif
	.globl	_Z17Variation2DKernelPfPKfiiif
	.type	_Z17Variation2DKernelPfPKfiiif, @function
_Z17Variation2DKernelPfPKfiiif:
.LFB3722:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z17Variation2DKernelPfPKfiiifPfPKfiiif
	.cfi_endproc
.LFE3722:
	.size	_Z17Variation2DKernelPfPKfiiif, .-_Z17Variation2DKernelPfPKfiiif
	.globl	_Z44__device_stub__Z13TVSQS2DKernelPfS_PKfS1_iiiPfS_PKfS1_iii
	.type	_Z44__device_stub__Z13TVSQS2DKernelPfS_PKfS1_iiiPfS_PKfS1_iii, @function
_Z44__device_stub__Z13TVSQS2DKernelPfS_PKfS1_iiiPfS_PKfS1_iii:
.LFB3723:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13TVSQS2DKernelPfS_PKfS1_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L8:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3723:
	.size	_Z44__device_stub__Z13TVSQS2DKernelPfS_PKfS1_iiiPfS_PKfS1_iii, .-_Z44__device_stub__Z13TVSQS2DKernelPfS_PKfS1_iiiPfS_PKfS1_iii
	.globl	_Z13TVSQS2DKernelPfS_PKfS1_iii
	.type	_Z13TVSQS2DKernelPfS_PKfS1_iii, @function
_Z13TVSQS2DKernelPfS_PKfS1_iii:
.LFB3724:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z13TVSQS2DKernelPfS_PKfS1_iiiPfS_PKfS1_iii
	.cfi_endproc
.LFE3724:
	.size	_Z13TVSQS2DKernelPfS_PKfS1_iii, .-_Z13TVSQS2DKernelPfS_PKfS1_iii
	.globl	_Z11TVSQS2D_gpuPfS_S_PKfiiiif
	.type	_Z11TVSQS2D_gpuPfS_S_PKfiiiif, @function
_Z11TVSQS2D_gpuPfS_S_PKfiiiif:
.LFB3693:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r9d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movss	%xmm0, 28(%rsp)
	cvtsi2ssl	128(%rsp), %xmm0
	mulss	.LC0(%rip), %xmm0
	movq	%rdi, 8(%rsp)
	movq	%rsi, 16(%rsp)
	movl	%r8d, 24(%rsp)
	movl	$1, 48(%rsp)
	call	ceilf@PLT
	movd	%xmm0, %ebx
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC1(%rip), %xmm0
	call	ceilf@PLT
	movd	%ebx, %xmm1
	movl	$1, 60(%rsp)
	cvttss2siq	%xmm0, %rax
	movl	%eax, 52(%rsp)
	cvttss2siq	%xmm1, %rax
	movl	%eax, 56(%rsp)
	movl	136(%rsp), %eax
	imull	%ebp, %eax
	imull	128(%rsp), %eax
	movl	%eax, 4(%rsp)
.L14:
	movl	24(%rsp), %eax
	cmpl	%eax, %r15d
	jge	.L13
	xorl	%eax, %eax
	movslq	%r14d, %rbx
	movl	%eax, (%rsp)
	salq	$2, %rbx
.L19:
	movl	(%rsp), %eax
	cmpl	136(%rsp), %eax
	jge	.L21
	movl	$2147483649, %eax
	movl	48(%rsp), %ecx
	movl	60(%rsp), %esi
	xorl	%r9d, %r9d
	salq	$5, %rax
	movq	52(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rax, %rdx
	movq	%rax, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movss	28(%rsp), %xmm0
	leaq	0(%r13,%rbx), %rsi
	leaq	(%r12,%rbx), %rdi
	movl	%ebp, %edx
	movl	136(%rsp), %r8d
	movl	128(%rsp), %ecx
	call	_Z44__device_stub__Z17Variation2DKernelPfPKfiiifPfPKfiiif
.L15:
	movl	48(%rsp), %ecx
	movq	40(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	52(%rsp), %rdi
	movl	60(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	16(%rsp), %rax
	leaq	0(%r13,%rbx), %rcx
	leaq	(%r12,%rbx), %rdx
	leaq	(%rax,%rbx), %rsi
	movq	8(%rsp), %rax
	pushq	%r8
	.cfi_def_cfa_offset 136
	movl	%ebp, %r8d
	leaq	(%rax,%rbx), %rdi
	movl	144(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 144
	movl	144(%rsp), %r9d
	call	_Z44__device_stub__Z13TVSQS2DKernelPfS_PKfS1_iiiPfS_PKfS1_iii
	popq	%r9
	.cfi_def_cfa_offset 136
	popq	%r10
	.cfi_def_cfa_offset 128
.L16:
	incl	(%rsp)
	addq	$4, %rbx
	jmp	.L19
.L21:
	movl	4(%rsp), %eax
	incl	%r15d
	addl	%eax, %r14d
	jmp	.L14
.L13:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3693:
	.size	_Z11TVSQS2D_gpuPfS_S_PKfiiiif, .-_Z11TVSQS2D_gpuPfS_S_PKfiiiif
	.globl	_Z45__device_stub__Z17Variation3DKernelPfPKfiiiifPfPKfiiiif
	.type	_Z45__device_stub__Z17Variation3DKernelPfPKfiiiifPfPKfiiiif, @function
_Z45__device_stub__Z17Variation3DKernelPfPKfiiiifPfPKfiiiif:
.LFB3725:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 20(%rsp)
	movl	%r9d, 16(%rsp)
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z17Variation3DKernelPfPKfiiiif(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L22:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3725:
	.size	_Z45__device_stub__Z17Variation3DKernelPfPKfiiiifPfPKfiiiif, .-_Z45__device_stub__Z17Variation3DKernelPfPKfiiiifPfPKfiiiif
	.globl	_Z17Variation3DKernelPfPKfiiiif
	.type	_Z17Variation3DKernelPfPKfiiiif, @function
_Z17Variation3DKernelPfPKfiiiif:
.LFB3726:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z17Variation3DKernelPfPKfiiiifPfPKfiiiif
	.cfi_endproc
.LFE3726:
	.size	_Z17Variation3DKernelPfPKfiiiif, .-_Z17Variation3DKernelPfPKfiiiif
	.globl	_Z45__device_stub__Z13TVSQS3DKernelPfS_PKfS1_iiiiPfS_PKfS1_iiii
	.type	_Z45__device_stub__Z13TVSQS3DKernelPfS_PKfS1_iiiiPfS_PKfS1_iiii, @function
_Z45__device_stub__Z13TVSQS3DKernelPfS_PKfS1_iiiiPfS_PKfS1_iiii:
.LFB3727:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z13TVSQS3DKernelPfS_PKfS1_iiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L27:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3727:
	.size	_Z45__device_stub__Z13TVSQS3DKernelPfS_PKfS1_iiiiPfS_PKfS1_iiii, .-_Z45__device_stub__Z13TVSQS3DKernelPfS_PKfS1_iiiiPfS_PKfS1_iiii
	.globl	_Z13TVSQS3DKernelPfS_PKfS1_iiii
	.type	_Z13TVSQS3DKernelPfS_PKfS1_iiii, @function
_Z13TVSQS3DKernelPfS_PKfS1_iiii:
.LFB3728:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z13TVSQS3DKernelPfS_PKfS1_iiiiPfS_PKfS1_iiii
	.cfi_endproc
.LFE3728:
	.size	_Z13TVSQS3DKernelPfS_PKfS1_iiii, .-_Z13TVSQS3DKernelPfS_PKfS1_iiii
	.globl	_Z11TVSQS3D_gpuPfS_S_PKfiiiiif
	.type	_Z11TVSQS3D_gpuPfS_S_PKfiiiiif, @function
_Z11TVSQS3D_gpuPfS_S_PKfiiiiif:
.LFB3695:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r9d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movss	%xmm0, 28(%rsp)
	cvtsi2ssl	128(%rsp), %xmm0
	mulss	.LC0(%rip), %xmm0
	movq	%rdi, 8(%rsp)
	movq	%rsi, 16(%rsp)
	movl	%r8d, 24(%rsp)
	movl	$1, 48(%rsp)
	call	ceilf@PLT
	movd	%xmm0, %ebx
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC1(%rip), %xmm0
	call	ceilf@PLT
	movd	%ebx, %xmm1
	cvttss2siq	%xmm0, %rax
	movl	%eax, 52(%rsp)
	cvttss2siq	%xmm1, %rax
	movl	%eax, 56(%rsp)
	movl	136(%rsp), %eax
	movl	%eax, 60(%rsp)
	movl	144(%rsp), %eax
	imull	%ebp, %eax
	imull	128(%rsp), %eax
	imull	136(%rsp), %eax
	movl	%eax, 4(%rsp)
.L33:
	movl	24(%rsp), %eax
	cmpl	%eax, %r15d
	jge	.L32
	xorl	%eax, %eax
	movslq	%r14d, %rbx
	movl	%eax, (%rsp)
	salq	$2, %rbx
.L38:
	movl	(%rsp), %eax
	cmpl	144(%rsp), %eax
	jge	.L40
	movl	$2147483649, %eax
	movl	48(%rsp), %ecx
	movl	60(%rsp), %esi
	xorl	%r9d, %r9d
	salq	$5, %rax
	movq	52(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rax, %rdx
	movq	%rax, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movss	28(%rsp), %xmm0
	movl	128(%rsp), %ecx
	leaq	(%r12,%rbx), %rdi
	movl	%ebp, %edx
	movl	144(%rsp), %r9d
	movl	136(%rsp), %r8d
	leaq	0(%r13,%rbx), %rsi
	call	_Z45__device_stub__Z17Variation3DKernelPfPKfiiiifPfPKfiiiif
.L34:
	movl	48(%rsp), %ecx
	movq	40(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	52(%rsp), %rdi
	movl	60(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movq	16(%rsp), %rax
	leaq	0(%r13,%rbx), %rcx
	leaq	(%r12,%rbx), %rdx
	movl	%ebp, %r8d
	leaq	(%rax,%rbx), %rsi
	movq	8(%rsp), %rax
	leaq	(%rax,%rbx), %rdi
	movl	144(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	144(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 144
	movl	144(%rsp), %r9d
	call	_Z45__device_stub__Z13TVSQS3DKernelPfS_PKfS1_iiiiPfS_PKfS1_iiii
	popq	%rdx
	.cfi_def_cfa_offset 136
	popq	%rcx
	.cfi_def_cfa_offset 128
.L35:
	incl	(%rsp)
	addq	$4, %rbx
	jmp	.L38
.L40:
	movl	4(%rsp), %eax
	incl	%r15d
	addl	%eax, %r14d
	jmp	.L33
.L32:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3695:
	.size	_Z11TVSQS3D_gpuPfS_S_PKfiiiiif, .-_Z11TVSQS3D_gpuPfS_S_PKfiiiiif
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"_Z13TVSQS3DKernelPfS_PKfS1_iiii"
.LC3:
	.string	"_Z17Variation3DKernelPfPKfiiiif"
.LC4:
	.string	"_Z13TVSQS2DKernelPfS_PKfS1_iii"
.LC5:
	.string	"_Z17Variation2DKernelPfPKfiiif"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3730:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13TVSQS3DKernelPfS_PKfS1_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17Variation3DKernelPfPKfiiiif(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13TVSQS2DKernelPfS_PKfS1_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17Variation2DKernelPfPKfiiif(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3730:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC6:
	.string	"pcus1 allocation failed"
.LC7:
	.string	"pcus2 allocation failed"
.LC8:
	.string	"pcuVar allocation failed"
.LC9:
	.string	"pcuImg allocation failed"
.LC10:
	.string	"cTVSQS2D failed: "
.LC11:
	.string	"("
.LC12:
	.string	")"
	.text
	.globl	cTVSQS2D
	.type	cTVSQS2D, @function
cTVSQS2D:
.LFB3694:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3694
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	movq	%rcx, %r13
	xorl	%ecx, %ecx
	pushq	%r12
	.cfi_offset 12, -48
	movq	%rdi, %r12
	leaq	-496(%rbp), %rdi
	pushq	%rbx
	.cfi_offset 3, -56
	movl	%r8d, %ebx
	subq	$488, %rsp
	movq	%rsi, -520(%rbp)
	movl	16(%rbp), %r14d
	movq	%rdx, -528(%rbp)
	movl	24(%rbp), %r15d
	movl	%r9d, -508(%rbp)
	movss	%xmm0, -512(%rbp)
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	movl	%r9d, %eax
	movq	%rcx, -496(%rbp)
	imull	%r8d, %eax
	movq	%rcx, -488(%rbp)
	movq	%rcx, -480(%rbp)
	movq	%rcx, -472(%rbp)
	imull	%r14d, %eax
	imull	%r15d, %eax
	cltq
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, -504(%rbp)
.LEHB0:
	call	cudaMalloc@PLT
.LEHE0:
	testl	%eax, %eax
	je	.L44
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %r12
.LEHB1:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE1:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L86
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%r12, %rdi
.LEHB2:
	call	__cxa_throw@PLT
.L44:
	movq	-504(%rbp), %rsi
	leaq	-488(%rbp), %rdi
	call	cudaMalloc@PLT
.LEHE2:
	testl	%eax, %eax
	je	.L46
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %r12
.LEHB3:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE3:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L86
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%r12, %rdi
.LEHB4:
	call	__cxa_throw@PLT
.L46:
	movq	-504(%rbp), %rsi
	leaq	-480(%rbp), %rdi
	call	cudaMalloc@PLT
.LEHE4:
	testl	%eax, %eax
	je	.L48
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC8(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %r12
.LEHB5:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE5:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L86
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%r12, %rdi
.LEHB6:
	call	__cxa_throw@PLT
.L48:
	movq	-504(%rbp), %rsi
	leaq	-472(%rbp), %rdi
	call	cudaMalloc@PLT
.LEHE6:
	testl	%eax, %eax
	je	.L50
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %r12
.LEHB7:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE7:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L86
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%r12, %rdi
.LEHB8:
	call	__cxa_throw@PLT
.L50:
	movq	-504(%rbp), %rdx
	movq	-472(%rbp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	pushq	%r15
	movss	-512(%rbp), %xmm0
	movl	%ebx, %r8d
	movl	-508(%rbp), %r9d
	movq	-472(%rbp), %rcx
	pushq	%r14
	movq	-480(%rbp), %rdx
	movq	-488(%rbp), %rsi
	movq	-496(%rbp), %rdi
	.cfi_escape 0x2e,0x10
	call	_Z11TVSQS2D_gpuPfS_S_PKfiiiif
	popq	%rax
	movq	-496(%rbp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	popq	%rdx
	movq	-504(%rbp), %rdx
	.cfi_escape 0x2e,0
	call	cudaMemcpy@PLT
	movq	-504(%rbp), %rdx
	movq	-488(%rbp), %rsi
	movl	$2, %ecx
	movq	-520(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-504(%rbp), %rdx
	movq	-480(%rbp), %rsi
	movl	$2, %ecx
	movq	-528(%rbp), %rdi
	call	cudaMemcpy@PLT
.LEHE8:
	movq	-496(%rbp), %rdi
.LEHB9:
	call	cudaFree@PLT
	movq	-488(%rbp), %rdi
	call	cudaFree@PLT
	movq	-480(%rbp), %rdi
	call	cudaFree@PLT
	movq	-472(%rbp), %rdi
	call	cudaFree@PLT
.LEHE9:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L75
	jmp	.L86
.L77:
	endbr64
	jmp	.L90
.L78:
	endbr64
	jmp	.L90
.L79:
	endbr64
	movq	%rax, %rbx
	movq	%rdx, %r14
.L55:
	movq	%r12, %rdi
	call	__cxa_free_exception@PLT
	movq	%r14, %rdx
	jmp	.L53
.L80:
	endbr64
.L90:
	movq	%rax, %rbx
	movq	%rdx, %r15
.L56:
	movq	%r12, %rdi
	call	__cxa_free_exception@PLT
	movq	%r15, %rdx
	jmp	.L53
.L76:
	endbr64
	movq	%rax, %rbx
.L53:
	decq	%rdx
	jne	.L91
	movq	%rbx, %rdi
	call	__cxa_begin_catch@PLT
	movq	-496(%rbp), %rdi
	movq	%rax, %rbx
	testq	%rdi, %rdi
	jne	.L59
.L62:
	movq	-488(%rbp), %rdi
	testq	%rdi, %rdi
	jne	.L92
	jmp	.L61
.L59:
.LEHB10:
	call	cudaFree@PLT
	jmp	.L62
.L92:
	call	cudaFree@PLT
.L61:
	movq	-480(%rbp), %rdi
	testq	%rdi, %rdi
	je	.L64
	call	cudaFree@PLT
.L64:
	movq	-472(%rbp), %rdi
	testq	%rdi, %rdi
	je	.L66
	call	cudaFree@PLT
.L66:
	leaq	-432(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, %r14
	call	_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEC1Ev@PLT
.LEHE10:
	leaq	.LC10(%rip), %rsi
	movq	%r14, %rdi
.LEHB11:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %r12
	movq	(%rbx), %rax
	movq	%rbx, %rdi
	call	*16(%rax)
	movq	%r12, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	leaq	.LC11(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rbx
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	%rax, %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	leaq	.LC12(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	-464(%rbp), %r13
	leaq	-424(%rbp), %rbx
	movq	%rbx, %rsi
	movq	%r13, %rdi
	call	_ZNKSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@PLT
.LEHE11:
	movq	%r13, %rsi
	leaq	_ZSt4cerr(%rip), %rdi
.LEHB12:
	call	_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.LEHE12:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	movq	%rbx, %rsi
	movq	%r13, %rdi
	movq	%rax, %r12
.LEHB13:
	call	_ZNKSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@PLT
.LEHE13:
	movq	-464(%rbp), %rsi
	movq	%r12, %rdi
.LEHB14:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE14:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L86
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%r12, %rdi
.LEHB15:
	call	__cxa_throw@PLT
.LEHE15:
.L83:
	endbr64
	movq	%rax, %rbx
.L69:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L70
.L85:
	endbr64
	movq	%rax, %rbx
.L71:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L72
.L84:
	endbr64
	movq	%rax, %rbx
.L72:
	movq	%r12, %rdi
	call	__cxa_free_exception@PLT
	jmp	.L70
.L82:
	endbr64
	movq	%rax, %rbx
.L70:
	movq	%r14, %rdi
	call	_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	jmp	.L73
.L81:
	endbr64
	movq	%rax, %rbx
.L73:
	call	__cxa_end_catch@PLT
.L91:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L86
	movq	%rbx, %rdi
.LEHB16:
	call	_Unwind_Resume@PLT
.LEHE16:
.L86:
	call	__stack_chk_fail@PLT
.L75:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3694:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
	.align 4
.LLSDA3694:
	.byte	0xff
	.byte	0x9b
	.uleb128 .LLSDATT3694-.LLSDATTD3694
.LLSDATTD3694:
	.byte	0x1
	.uleb128 .LLSDACSE3694-.LLSDACSB3694
.LLSDACSB3694:
	.uleb128 .LEHB0-.LFB3694
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L76-.LFB3694
	.uleb128 0x1
	.uleb128 .LEHB1-.LFB3694
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L77-.LFB3694
	.uleb128 0x3
	.uleb128 .LEHB2-.LFB3694
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L76-.LFB3694
	.uleb128 0x1
	.uleb128 .LEHB3-.LFB3694
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L78-.LFB3694
	.uleb128 0x3
	.uleb128 .LEHB4-.LFB3694
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L76-.LFB3694
	.uleb128 0x1
	.uleb128 .LEHB5-.LFB3694
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L79-.LFB3694
	.uleb128 0x3
	.uleb128 .LEHB6-.LFB3694
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L76-.LFB3694
	.uleb128 0x1
	.uleb128 .LEHB7-.LFB3694
	.uleb128 .LEHE7-.LEHB7
	.uleb128 .L80-.LFB3694
	.uleb128 0x3
	.uleb128 .LEHB8-.LFB3694
	.uleb128 .LEHE8-.LEHB8
	.uleb128 .L76-.LFB3694
	.uleb128 0x1
	.uleb128 .LEHB9-.LFB3694
	.uleb128 .LEHE9-.LEHB9
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB10-.LFB3694
	.uleb128 .LEHE10-.LEHB10
	.uleb128 .L81-.LFB3694
	.uleb128 0
	.uleb128 .LEHB11-.LFB3694
	.uleb128 .LEHE11-.LEHB11
	.uleb128 .L82-.LFB3694
	.uleb128 0
	.uleb128 .LEHB12-.LFB3694
	.uleb128 .LEHE12-.LEHB12
	.uleb128 .L83-.LFB3694
	.uleb128 0
	.uleb128 .LEHB13-.LFB3694
	.uleb128 .LEHE13-.LEHB13
	.uleb128 .L84-.LFB3694
	.uleb128 0
	.uleb128 .LEHB14-.LFB3694
	.uleb128 .LEHE14-.LEHB14
	.uleb128 .L85-.LFB3694
	.uleb128 0
	.uleb128 .LEHB15-.LFB3694
	.uleb128 .LEHE15-.LEHB15
	.uleb128 .L82-.LFB3694
	.uleb128 0
	.uleb128 .LEHB16-.LFB3694
	.uleb128 .LEHE16-.LEHB16
	.uleb128 0
	.uleb128 0
.LLSDACSE3694:
	.byte	0x1
	.byte	0
	.byte	0
	.byte	0x7d
	.align 4
	.long	DW.ref._ZTISt9exception-.
.LLSDATT3694:
	.text
	.size	cTVSQS2D, .-cTVSQS2D
	.section	.rodata.str1.1
.LC13:
	.string	"cTVSQS3D failed: "
	.text
	.globl	cTVSQS3D
	.type	cTVSQS3D, @function
cTVSQS3D:
.LFB3696:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3696
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	movq	%rcx, %r12
	pushq	%rbx
	.cfi_offset 3, -56
	movl	%r8d, %ebx
	subq	$504, %rsp
	movq	%rdi, -520(%rbp)
	movl	16(%rbp), %r13d
	leaq	-496(%rbp), %rdi
	movss	%xmm0, -512(%rbp)
	movl	24(%rbp), %r14d
	movl	32(%rbp), %r15d
	movq	%rsi, -528(%rbp)
	movq	%rdx, -536(%rbp)
	xorl	%edx, %edx
	movl	%r9d, -508(%rbp)
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	movl	%r9d, %eax
	movq	%rdx, -496(%rbp)
	imull	%r8d, %eax
	movq	%rdx, -488(%rbp)
	movq	%rdx, -480(%rbp)
	movq	%rdx, -472(%rbp)
	imull	%r13d, %eax
	imull	%r14d, %eax
	imull	%r15d, %eax
	cltq
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, -504(%rbp)
.LEHB17:
	call	cudaMalloc@PLT
.LEHE17:
	testl	%eax, %eax
	je	.L94
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %r12
.LEHB18:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE18:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L136
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%r12, %rdi
.LEHB19:
	call	__cxa_throw@PLT
.L94:
	movq	-504(%rbp), %rsi
	leaq	-488(%rbp), %rdi
	call	cudaMalloc@PLT
.LEHE19:
	testl	%eax, %eax
	je	.L96
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %r12
.LEHB20:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE20:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L136
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%r12, %rdi
.LEHB21:
	call	__cxa_throw@PLT
.L96:
	movq	-504(%rbp), %rsi
	leaq	-480(%rbp), %rdi
	call	cudaMalloc@PLT
.LEHE21:
	testl	%eax, %eax
	je	.L98
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC8(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %r12
.LEHB22:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE22:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L136
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%r12, %rdi
.LEHB23:
	call	__cxa_throw@PLT
.L98:
	movq	-504(%rbp), %rsi
	leaq	-472(%rbp), %rdi
	call	cudaMalloc@PLT
.LEHE23:
	testl	%eax, %eax
	je	.L100
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %r12
.LEHB24:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE24:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L136
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%r12, %rdi
.LEHB25:
	call	__cxa_throw@PLT
.L100:
	movq	-504(%rbp), %rdx
	movq	-472(%rbp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	pushq	%rax
	movss	-512(%rbp), %xmm0
	movl	%ebx, %r8d
	movl	-508(%rbp), %r9d
	movq	-472(%rbp), %rcx
	pushq	%r15
	movq	-480(%rbp), %rdx
	movq	-488(%rbp), %rsi
	pushq	%r14
	pushq	%r13
	movq	-496(%rbp), %rdi
	.cfi_escape 0x2e,0x20
	call	_Z11TVSQS3D_gpuPfS_S_PKfiiiiif
	movq	-504(%rbp), %rdx
	movq	-496(%rbp), %rsi
	addq	$32, %rsp
	movl	$2, %ecx
	movq	-520(%rbp), %rdi
	.cfi_escape 0x2e,0
	call	cudaMemcpy@PLT
	movq	-504(%rbp), %rdx
	movq	-488(%rbp), %rsi
	movl	$2, %ecx
	movq	-528(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-504(%rbp), %rdx
	movq	-480(%rbp), %rsi
	movl	$2, %ecx
	movq	-536(%rbp), %rdi
	call	cudaMemcpy@PLT
.LEHE25:
	movq	-496(%rbp), %rdi
.LEHB26:
	call	cudaFree@PLT
	movq	-488(%rbp), %rdi
	call	cudaFree@PLT
	movq	-480(%rbp), %rdi
	call	cudaFree@PLT
	movq	-472(%rbp), %rdi
	call	cudaFree@PLT
.LEHE26:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L125
	jmp	.L136
.L127:
	endbr64
	jmp	.L140
.L128:
	endbr64
	jmp	.L140
.L129:
	endbr64
	movq	%rax, %rbx
	movq	%rdx, %r14
.L105:
	movq	%r12, %rdi
	call	__cxa_free_exception@PLT
	movq	%r14, %rdx
	jmp	.L103
.L130:
	endbr64
.L140:
	movq	%rax, %rbx
	movq	%rdx, %r15
.L106:
	movq	%r12, %rdi
	call	__cxa_free_exception@PLT
	movq	%r15, %rdx
	jmp	.L103
.L126:
	endbr64
	movq	%rax, %rbx
.L103:
	decq	%rdx
	jne	.L141
	movq	%rbx, %rdi
	call	__cxa_begin_catch@PLT
	movq	-496(%rbp), %rdi
	movq	%rax, %rbx
	testq	%rdi, %rdi
	jne	.L109
.L112:
	movq	-488(%rbp), %rdi
	testq	%rdi, %rdi
	jne	.L142
	jmp	.L111
.L109:
.LEHB27:
	call	cudaFree@PLT
	jmp	.L112
.L142:
	call	cudaFree@PLT
.L111:
	movq	-480(%rbp), %rdi
	testq	%rdi, %rdi
	je	.L114
	call	cudaFree@PLT
.L114:
	movq	-472(%rbp), %rdi
	testq	%rdi, %rdi
	je	.L116
	call	cudaFree@PLT
.L116:
	leaq	-432(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, %r14
	call	_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEC1Ev@PLT
.LEHE27:
	leaq	.LC13(%rip), %rsi
	movq	%r14, %rdi
.LEHB28:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %r12
	movq	(%rbx), %rax
	movq	%rbx, %rdi
	call	*16(%rax)
	movq	%r12, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	leaq	.LC11(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rbx
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	%rax, %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	leaq	.LC12(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	-464(%rbp), %r13
	leaq	-424(%rbp), %rbx
	movq	%rbx, %rsi
	movq	%r13, %rdi
	call	_ZNKSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@PLT
.LEHE28:
	movq	%r13, %rsi
	leaq	_ZSt4cerr(%rip), %rdi
.LEHB29:
	call	_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.LEHE29:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	movq	%rbx, %rsi
	movq	%r13, %rdi
	movq	%rax, %r12
.LEHB30:
	call	_ZNKSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@PLT
.LEHE30:
	movq	-464(%rbp), %rsi
	movq	%r12, %rdi
.LEHB31:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE31:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L136
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%r12, %rdi
.LEHB32:
	call	__cxa_throw@PLT
.LEHE32:
.L133:
	endbr64
	movq	%rax, %rbx
.L119:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L120
.L135:
	endbr64
	movq	%rax, %rbx
.L121:
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L122
.L134:
	endbr64
	movq	%rax, %rbx
.L122:
	movq	%r12, %rdi
	call	__cxa_free_exception@PLT
	jmp	.L120
.L132:
	endbr64
	movq	%rax, %rbx
.L120:
	movq	%r14, %rdi
	call	_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	jmp	.L123
.L131:
	endbr64
	movq	%rax, %rbx
.L123:
	call	__cxa_end_catch@PLT
.L141:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L136
	movq	%rbx, %rdi
.LEHB33:
	call	_Unwind_Resume@PLT
.LEHE33:
.L136:
	call	__stack_chk_fail@PLT
.L125:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3696:
	.section	.gcc_except_table
	.align 4
.LLSDA3696:
	.byte	0xff
	.byte	0x9b
	.uleb128 .LLSDATT3696-.LLSDATTD3696
.LLSDATTD3696:
	.byte	0x1
	.uleb128 .LLSDACSE3696-.LLSDACSB3696
.LLSDACSB3696:
	.uleb128 .LEHB17-.LFB3696
	.uleb128 .LEHE17-.LEHB17
	.uleb128 .L126-.LFB3696
	.uleb128 0x1
	.uleb128 .LEHB18-.LFB3696
	.uleb128 .LEHE18-.LEHB18
	.uleb128 .L127-.LFB3696
	.uleb128 0x3
	.uleb128 .LEHB19-.LFB3696
	.uleb128 .LEHE19-.LEHB19
	.uleb128 .L126-.LFB3696
	.uleb128 0x1
	.uleb128 .LEHB20-.LFB3696
	.uleb128 .LEHE20-.LEHB20
	.uleb128 .L128-.LFB3696
	.uleb128 0x3
	.uleb128 .LEHB21-.LFB3696
	.uleb128 .LEHE21-.LEHB21
	.uleb128 .L126-.LFB3696
	.uleb128 0x1
	.uleb128 .LEHB22-.LFB3696
	.uleb128 .LEHE22-.LEHB22
	.uleb128 .L129-.LFB3696
	.uleb128 0x3
	.uleb128 .LEHB23-.LFB3696
	.uleb128 .LEHE23-.LEHB23
	.uleb128 .L126-.LFB3696
	.uleb128 0x1
	.uleb128 .LEHB24-.LFB3696
	.uleb128 .LEHE24-.LEHB24
	.uleb128 .L130-.LFB3696
	.uleb128 0x3
	.uleb128 .LEHB25-.LFB3696
	.uleb128 .LEHE25-.LEHB25
	.uleb128 .L126-.LFB3696
	.uleb128 0x1
	.uleb128 .LEHB26-.LFB3696
	.uleb128 .LEHE26-.LEHB26
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB27-.LFB3696
	.uleb128 .LEHE27-.LEHB27
	.uleb128 .L131-.LFB3696
	.uleb128 0
	.uleb128 .LEHB28-.LFB3696
	.uleb128 .LEHE28-.LEHB28
	.uleb128 .L132-.LFB3696
	.uleb128 0
	.uleb128 .LEHB29-.LFB3696
	.uleb128 .LEHE29-.LEHB29
	.uleb128 .L133-.LFB3696
	.uleb128 0
	.uleb128 .LEHB30-.LFB3696
	.uleb128 .LEHE30-.LEHB30
	.uleb128 .L134-.LFB3696
	.uleb128 0
	.uleb128 .LEHB31-.LFB3696
	.uleb128 .LEHE31-.LEHB31
	.uleb128 .L135-.LFB3696
	.uleb128 0
	.uleb128 .LEHB32-.LFB3696
	.uleb128 .LEHE32-.LEHB32
	.uleb128 .L132-.LFB3696
	.uleb128 0
	.uleb128 .LEHB33-.LFB3696
	.uleb128 .LEHE33-.LEHB33
	.uleb128 0
	.uleb128 0
.LLSDACSE3696:
	.byte	0x1
	.byte	0
	.byte	0
	.byte	0x7d
	.align 4
	.long	DW.ref._ZTISt9exception-.
.LLSDATT3696:
	.text
	.size	cTVSQS3D, .-cTVSQS3D
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1031798784
	.align 4
.LC1:
	.long	1023410176
	.hidden	DW.ref._ZTISt9exception
	.weak	DW.ref._ZTISt9exception
	.section	.data.rel.local.DW.ref._ZTISt9exception,"awG",@progbits,DW.ref._ZTISt9exception,comdat
	.align 8
	.type	DW.ref._ZTISt9exception, @object
	.size	DW.ref._ZTISt9exception, 8
DW.ref._ZTISt9exception:
	.quad	_ZTISt9exception
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <sstream>
#include <stdexcept>

using namespace std;

// assuming same padding
__global__ void Variation2DKernel(float* var, const float* img, int nx, int ny, int nc, float eps)
{
	int ix = blockIdx.x * blockDim.x + threadIdx.x;
	int iy = blockIdx.y * blockDim.y + threadIdx.y;

	if (ix >= nx || iy >= ny)
	{
		return;
	}

	int ind = (ix * ny + iy) * nc;
	float x = img[ind];

	float dx = 0;
	float dy = 0;
	if (ix > 0)
	{
		dx = x - img[ind - ny * nc];
	}

	if (iy > 0)
	{
		dy = x - img[ind - nc];
	}

	var[ind] = sqrtf(dx * dx + dy * dy + eps);
}

// s1, s2 are the first and second derivatives of the surrogate function
__global__ void TVSQS2DKernel(float* s1, float* s2, const float* var, const float* img, int nx, int ny, int nc)
{
	int ix = blockIdx.x * blockDim.x + threadIdx.x;
	int iy = blockIdx.y * blockDim.y + threadIdx.y;

	if (ix >= nx || iy >= ny)
	{
		return;
	}

	int ind = (ix * ny + iy) * nc;
	float x = img[ind];
	float v = var[ind];

	float dx0 = 0;
	float dx1 = 0;
	float dy0 = 0;
	float dy1 = 0;
	float varx, vary;

	if (ix > 0)
	{
		dx0 = x - img[ind - ny * nc];
	}
	if (ix < nx - 1)
	{
		dx1 = x - img[ind + ny * nc];
		varx = var[ind + ny * nc];
	}
	else
	{
		varx = v;  	// approximate var(nx,j) with var(nx-1,j)
	}
	if (iy > 0)
	{
		dy0 = x - img[ind - nc];
	}
	if (iy < ny - 1)
	{
		dy1 = x - img[ind + nc];
		vary = var[ind + nc];
	}
	else
	{
		vary = v;	// approximate var(i, ny) with var(i, ny-1)
	}


	s1[ind] = (dx0 + dy0) / v + dx1 / varx + dy1 / vary;
	s2[ind] = 2 / v + 1 / varx + 1 / vary;

}

// get first and second order derivatives of the surrogate function
// get the variation of the image
void TVSQS2D_gpu(float* s1, float* s2, float* var, const float* img, int nb, int nx, int ny, int nc, float eps)
{
	dim3 threads(32, 16, 1);
	dim3 blocks(ceilf(nx / (float)threads.x), ceilf(ny / (float)threads.y), 1);
	for (int ib = 0; ib < nb; ib++)
	{
		for (int ic = 0; ic < nc; ic++)
		{
			int offset = ib * nx * ny * nc + ic;
			Variation2DKernel<<<blocks, threads>>>(var + offset, img + offset, nx, ny, nc, eps);
			TVSQS2DKernel<<<blocks, threads>>>(s1 + offset, s2 + offset, var + offset, img + offset, nx, ny, nc);
		}
	}

}

extern "C" void cTVSQS2D(float* s1, float* s2, float* var, const float* img, int nb, int nx, int ny, int nc, float eps = 1e-8f)
{
	float* pcus1 = NULL;
	float* pcus2 = NULL;
	float* pcuVar = NULL;
	float* pcuImg = NULL;

	try
	{
		int N = nb * nx * ny * nc;

		if (hipSuccess != hipMalloc(&pcus1, sizeof(float) * N))
		{
			throw runtime_error("pcus1 allocation failed");
		}
		if (hipSuccess != hipMalloc(&pcus2, sizeof(float) * N))
		{
			throw runtime_error("pcus2 allocation failed");
		}
		if (hipSuccess != hipMalloc(&pcuVar, sizeof(float) * N))
		{
			throw runtime_error("pcuVar allocation failed");
		}
		if (hipSuccess != hipMalloc(&pcuImg, sizeof(float) * N))
		{
			throw runtime_error("pcuImg allocation failed");
		}

		hipMemcpy(pcuImg, img, sizeof(float) * N, hipMemcpyHostToDevice);

		TVSQS2D_gpu(pcus1, pcus2, pcuVar, pcuImg, nb, nx, ny, nc, eps);

		hipMemcpy(s1, pcus1, sizeof(float) * N, hipMemcpyDeviceToHost);
		hipMemcpy(s2, pcus2, sizeof(float) * N, hipMemcpyDeviceToHost);
		hipMemcpy(var, pcuVar, sizeof(float) * N, hipMemcpyDeviceToHost);
	}
	catch (exception& e)
	{
		if (pcus1 != NULL) hipFree(pcus1);
		if (pcus2 != NULL) hipFree(pcus2);
		if (pcuVar != NULL) hipFree(pcuVar);
		if (pcuImg != NULL) hipFree(pcuImg);

		ostringstream oss;
		oss << "cTVSQS2D failed: " << e.what() << "(" << hipGetErrorString(hipGetLastError()) << ")";
		cerr << oss.str() << endl;
		throw runtime_error(oss.str().c_str());
	}

	hipFree(pcus1);
	hipFree(pcus2);
	hipFree(pcuVar);
	hipFree(pcuImg);

}

// assuming same padding
__global__ void Variation3DKernel(float* var, const float* img, int nx, int ny, int nz, int nc, float eps)
{
	int ix = blockIdx.x * blockDim.x + threadIdx.x;
	int iy = blockIdx.y * blockDim.y + threadIdx.y;
	int iz = blockIdx.z * blockDim.z + threadIdx.z;

	if (ix >= nx || iy >= ny || iz >= nz)
	{
		return;
	}

	int ind = (ix * ny * nz + iy * nz + iz) * nc;
	float x = img[ind];

	float dx = 0;
	float dy = 0;
	float dz = 0;
	if (ix > 0)
	{
		dx = x - img[ind - ny * nz * nc];
	}

	if (iy > 0)
	{
		dy = x - img[ind - nz * nc];
	}

	if (iz > 0)
	{
		dz = x - img[ind - nc];
	}

	var[ind] = sqrtf(dx * dx + dy * dy + dz * dz + eps);
}

// s1, s2 are the first and second derivatives of the surrogate function
__global__ void TVSQS3DKernel(float* s1, float* s2, const float* var, const float* img, int nx, int ny, int nz, int nc)
{
	int ix = blockIdx.x * blockDim.x + threadIdx.x;
	int iy = blockIdx.y * blockDim.y + threadIdx.y;
	int iz = blockIdx.z * blockDim.z + threadIdx.z;

	if (ix >= nx || iy >= ny || iz >= nz)
	{
		return;
	}

	int ind = (ix * ny * nz + iy * nz + iz) * nc;
	float x = img[ind];
	float v = var[ind];

	float dx0 = 0;
	float dx1 = 0;
	float dy0 = 0;
	float dy1 = 0;
	float dz0 = 0;
	float dz1 = 0;
	float varx, vary, varz;

	if (ix > 0)
	{
		dx0 = x - img[ind - ny * nz * nc];
	}
	if (ix < nx - 1)
	{
		dx1 = x - img[ind + ny * nz * nc];
		varx = var[ind + ny * nz * nc];
	}
	else
	{
		varx = v;  	// approximate var(nx,j) with var(nx-1,j)
	}

	if (iy > 0)
	{
		dy0 = x - img[ind - nz * nc];
	}
	if (iy < ny - 1)
	{
		dy1 = x - img[ind + nz * nc];
		vary = var[ind + nz * nc];
	}
	else
	{
		vary = v;	// approximate var(i, ny) with var(i, ny-1)
	}

	if (iz > 0)
	{
		dz0 = x - img[ind - nc];
	}
	if (iz < nz - 1)
	{
		dz1 = x - img[ind + nc];
		varz = var[ind + nc];
	}
	else
	{
		varz = v;
	}


	s1[ind] = (dx0 + dy0 + dz0) / v + dx1 / varx + dy1 / vary + dz1 / varz;
	s2[ind] = 3 / v + 1 / varx + 1 / vary + 1 / varz;

}

// get first and second order derivatives of the surrogate function
// get the variation of the image
void TVSQS3D_gpu(float* s1, float* s2, float* var, const float* img, int nb, int nx, int ny, int nz, int nc, float eps)
{
	dim3 threads(32, 16, 1);
	dim3 blocks(ceilf(nx / (float)threads.x), ceilf(ny / (float)threads.y), nz);
	for (int ib = 0; ib < nb; ib++)
	{
		for (int ic = 0; ic < nc; ic++)
		{
			int offset = ib * nx * ny * nz * nc + ic;
			Variation3DKernel<<<blocks, threads>>>(var + offset, img + offset, nx, ny, nz, nc, eps);
			TVSQS3DKernel<<<blocks, threads>>>(s1 + offset, s2 + offset, var + offset, img + offset, nx, ny, nz, nc);
		}
	}

}

extern "C" void cTVSQS3D(float* s1, float* s2, float* var, const float* img, int nb, int nx, int ny, int nz, int nc, float eps = 1e-8f)
{
	float* pcus1 = NULL;
	float* pcus2 = NULL;
	float* pcuVar = NULL;
	float* pcuImg = NULL;

	try
	{
		int N = nb * nx * ny * nz * nc;

		if (hipSuccess != hipMalloc(&pcus1, sizeof(float) * N))
		{
			throw runtime_error("pcus1 allocation failed");
		}
		if (hipSuccess != hipMalloc(&pcus2, sizeof(float) * N))
		{
			throw runtime_error("pcus2 allocation failed");
		}
		if (hipSuccess != hipMalloc(&pcuVar, sizeof(float) * N))
		{
			throw runtime_error("pcuVar allocation failed");
		}
		if (hipSuccess != hipMalloc(&pcuImg, sizeof(float) * N))
		{
			throw runtime_error("pcuImg allocation failed");
		}

		hipMemcpy(pcuImg, img, sizeof(float) * N, hipMemcpyHostToDevice);

		TVSQS3D_gpu(pcus1, pcus2, pcuVar, pcuImg, nb, nx, ny, nz, nc, eps);

		hipMemcpy(s1, pcus1, sizeof(float) * N, hipMemcpyDeviceToHost);
		hipMemcpy(s2, pcus2, sizeof(float) * N, hipMemcpyDeviceToHost);
		hipMemcpy(var, pcuVar, sizeof(float) * N, hipMemcpyDeviceToHost);
	}
	catch (exception& e)
	{
		if (pcus1 != NULL) hipFree(pcus1);
		if (pcus2 != NULL) hipFree(pcus2);
		if (pcuVar != NULL) hipFree(pcuVar);
		if (pcuImg != NULL) hipFree(pcuImg);

		ostringstream oss;
		oss << "cTVSQS3D failed: " << e.what() << "(" << hipGetErrorString(hipGetLastError()) << ")";
		cerr << oss.str() << endl;
		throw runtime_error(oss.str().c_str());
	}

	hipFree(pcus1);
	hipFree(pcus2);
	hipFree(pcuVar);
	hipFree(pcuImg);

}


	.text
	.file	"TVSQS.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z32__device_stub__Variation2DKernelPfPKfiiif # -- Begin function _Z32__device_stub__Variation2DKernelPfPKfiiif
	.type	_Z32__device_stub__Variation2DKernelPfPKfiiif,@function
_Z32__device_stub__Variation2DKernelPfPKfiiif: # @_Z32__device_stub__Variation2DKernelPfPKfiiif
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movss	%xmm0, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17Variation2DKernelPfPKfiiif, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__Variation2DKernelPfPKfiiif, .Lfunc_end0-_Z32__device_stub__Variation2DKernelPfPKfiiif
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__TVSQS2DKernelPfS_PKfS1_iii # -- Begin function _Z28__device_stub__TVSQS2DKernelPfS_PKfS1_iii
	.type	_Z28__device_stub__TVSQS2DKernelPfS_PKfS1_iii,@function
_Z28__device_stub__TVSQS2DKernelPfS_PKfS1_iii: # @_Z28__device_stub__TVSQS2DKernelPfS_PKfS1_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13TVSQS2DKernelPfS_PKfS1_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z28__device_stub__TVSQS2DKernelPfS_PKfS1_iii, .Lfunc_end1-_Z28__device_stub__TVSQS2DKernelPfS_PKfS1_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z11TVSQS2D_gpuPfS_S_PKfiiiif
.LCPI2_0:
	.long	0x3d000000                      # float 0.03125
.LCPI2_1:
	.long	0x3d800000                      # float 0.0625
	.text
	.globl	_Z11TVSQS2D_gpuPfS_S_PKfiiiif
	.type	_Z11TVSQS2D_gpuPfS_S_PKfiiiif,@function
_Z11TVSQS2D_gpuPfS_S_PKfiiiif:          # @_Z11TVSQS2D_gpuPfS_S_PKfiiiif
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm0, 36(%rsp)                 # 4-byte Spill
	movl	%r8d, %ebx
	movq	%rcx, 72(%rsp)                  # 8-byte Spill
	movq	%rdx, 64(%rsp)                  # 8-byte Spill
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r9d, %xmm0
	movq	%rdi, 48(%rsp)                  # 8-byte Spill
	mulss	.LCPI2_0(%rip), %xmm0
	callq	ceilf@PLT
	cvtsi2ssl	160(%rsp), %xmm1
	movss	%xmm0, 24(%rsp)                 # 4-byte Spill
	mulss	.LCPI2_1(%rip), %xmm1
	movaps	%xmm1, %xmm0
	callq	ceilf@PLT
	testl	%ebx, %ebx
	jle	.LBB2_10
# %bb.1:                                # %.preheader.lr.ph
	cvttss2si	24(%rsp), %rax          # 4-byte Folded Reload
	cvttss2si	%xmm0, %rdx
	movl	168(%rsp), %ecx
	movl	%eax, %eax
	shlq	$32, %rdx
	orq	%rax, %rdx
	movabsq	$68719476768, %r14              # imm = 0x1000000020
	movl	%ebx, %eax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movl	%ecx, %eax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	imull	160(%rsp), %ecx
	imull	12(%rsp), %ecx                  # 4-byte Folded Reload
	movl	%ecx, 32(%rsp)                  # 4-byte Spill
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%ecx, %ecx
	movq	%rdx, 96(%rsp)                  # 8-byte Spill
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	movq	%rcx, 88(%rsp)                  # 8-byte Spill
	cmpl	$0, 168(%rsp)
	jle	.LBB2_9
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=1
	movslq	16(%rsp), %rax                  # 4-byte Folded Reload
	movq	64(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	movq	72(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbp
	movq	48(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	movq	56(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbx
	movq	40(%rsp), %r12                  # 8-byte Reload
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%r12, 24(%rsp)                  # 8-byte Spill
	movq	%rdx, %r12
	movq	%rdx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:                                #   in Loop: Header=BB2_4 Depth=2
	movq	%r13, %rdi
	movq	%rbp, %rsi
	movl	12(%rsp), %edx                  # 4-byte Reload
	movl	160(%rsp), %ecx
	movl	168(%rsp), %r8d
	movss	36(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	callq	_Z32__device_stub__Variation2DKernelPfPKfiiif
.LBB2_6:                                #   in Loop: Header=BB2_4 Depth=2
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	24(%rsp), %r12                  # 8-byte Reload
	jne	.LBB2_8
# %bb.7:                                #   in Loop: Header=BB2_4 Depth=2
	movl	168(%rsp), %eax
	movl	%eax, (%rsp)
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movq	%r13, %rdx
	movq	%rbp, %rcx
	movl	12(%rsp), %r8d                  # 4-byte Reload
	movl	160(%rsp), %r9d
	callq	_Z28__device_stub__TVSQS2DKernelPfS_PKfS1_iii
.LBB2_8:                                #   in Loop: Header=BB2_4 Depth=2
	addq	$4, %r13
	addq	$4, %rbp
	addq	$4, %r15
	addq	$4, %rbx
	decq	%r12
	movabsq	$68719476768, %r14              # imm = 0x1000000020
	movq	96(%rsp), %rdx                  # 8-byte Reload
	jne	.LBB2_4
.LBB2_9:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	88(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	movq	16(%rsp), %rax                  # 8-byte Reload
	addl	32(%rsp), %eax                  # 4-byte Folded Reload
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	cmpq	80(%rsp), %rcx                  # 8-byte Folded Reload
	jne	.LBB2_2
.LBB2_10:                               # %._crit_edge56
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z11TVSQS2D_gpuPfS_S_PKfiiiif, .Lfunc_end2-_Z11TVSQS2D_gpuPfS_S_PKfiiiif
	.cfi_endproc
                                        # -- End function
	.globl	cTVSQS2D                        # -- Begin function cTVSQS2D
	.type	cTVSQS2D,@function
cTVSQS2D:                               # @cTVSQS2D
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$456, %rsp                      # imm = 0x1C8
	.cfi_def_cfa_offset 512
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm0, 36(%rsp)                 # 4-byte Spill
	movl	%r9d, %ebp
	movl	%r8d, %r13d
	movq	%rcx, %rbx
	movq	%rdx, 40(%rsp)                  # 8-byte Spill
	movq	%rsi, %r14
	movq	%rdi, %r12
	movl	520(%rsp), %edx
	movl	512(%rsp), %ecx
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	movq	%rax, (%rdi)
	movq	%rax, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%rax, (%rsp)
	movl	%r9d, %eax
	imull	%r8d, %eax
	imull	%ecx, %eax
	imull	%edx, %eax
	movslq	%eax, %r15
	shlq	$2, %r15
.Ltmp0:
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp1:
# %bb.1:                                # %_ZL9hipMallocIfE10hipError_tPPT_m.exit
	testl	%eax, %eax
	jne	.LBB3_14
# %bb.2:
.Ltmp5:
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp6:
# %bb.3:                                # %_ZL9hipMallocIfE10hipError_tPPT_m.exit54
	testl	%eax, %eax
	jne	.LBB3_15
# %bb.4:
.Ltmp10:
	.cfi_escape 0x2e, 0x00
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp11:
# %bb.5:                                # %_ZL9hipMallocIfE10hipError_tPPT_m.exit55
	testl	%eax, %eax
	jne	.LBB3_16
# %bb.6:
.Ltmp15:
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp16:
# %bb.7:                                # %_ZL9hipMallocIfE10hipError_tPPT_m.exit56
	testl	%eax, %eax
	jne	.LBB3_17
# %bb.8:
	movq	(%rsp), %rdi
.Ltmp22:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp23:
# %bb.9:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	(%rsp), %rcx
.Ltmp24:
	.cfi_escape 0x2e, 0x10
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	movss	36(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	520(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	520(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z11TVSQS2D_gpuPfS_S_PKfiiiif
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.Ltmp25:
# %bb.10:
	movq	24(%rsp), %rsi
.Ltmp26:
	.cfi_escape 0x2e, 0x00
	movq	%r12, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp27:
# %bb.11:
	movq	16(%rsp), %rsi
.Ltmp28:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp29:
# %bb.12:
	movq	8(%rsp), %rsi
.Ltmp30:
	.cfi_escape 0x2e, 0x00
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp31:
# %bb.13:
	movq	24(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	callq	hipFree
	movq	16(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	callq	hipFree
	movq	8(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	callq	hipFree
	movq	(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	callq	hipFree
	addq	$456, %rsp                      # imm = 0x1C8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_14:
	.cfi_def_cfa_offset 512
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp2:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp3:
	jmp	.LBB3_18
.LBB3_15:
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp7:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp8:
	jmp	.LBB3_18
.LBB3_16:
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp12:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp13:
	jmp	.LBB3_18
.LBB3_17:
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp17:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.3, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp18:
.LBB3_18:                               # %.invoke
.Ltmp20:
	.cfi_escape 0x2e, 0x00
	movl	$_ZTISt13runtime_error, %esi
	movl	$_ZNSt13runtime_errorD1Ev, %edx
	movq	%r14, %rdi
	callq	__cxa_throw
.Ltmp21:
# %bb.19:                               # %.cont
.LBB3_20:
.Ltmp19:
	jmp	.LBB3_24
.LBB3_21:
.Ltmp14:
	jmp	.LBB3_24
.LBB3_22:
.Ltmp9:
	jmp	.LBB3_24
.LBB3_23:
.Ltmp4:
.LBB3_24:
	movq	%rdx, %r15
	movq	%rax, %rbx
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	__cxa_free_exception
	jmp	.LBB3_26
.LBB3_25:
.Ltmp32:
	movq	%rdx, %r15
	movq	%rax, %rbx
.LBB3_26:
	cmpl	$1, %r15d
	jne	.LBB3_67
# %bb.27:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	__cxa_begin_catch
	movq	%rax, %rbx
	movq	24(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB3_29
# %bb.28:
.Ltmp33:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp34:
.LBB3_29:
	movq	16(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB3_31
# %bb.30:
.Ltmp35:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp36:
.LBB3_31:
	movq	8(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB3_33
# %bb.32:
.Ltmp37:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp38:
.LBB3_33:
	movq	(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB3_35
# %bb.34:
.Ltmp39:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp40:
.LBB3_35:
.Ltmp42:
	.cfi_escape 0x2e, 0x00
	leaq	80(%rsp), %rdi
	callq	_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEC1Ev
.Ltmp43:
# %bb.36:
.Ltmp45:
	.cfi_escape 0x2e, 0x00
	leaq	80(%rsp), %rdi
	movl	$.L.str.4, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp46:
# %bb.37:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	(%rbx), %rax
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	*16(%rax)
.Ltmp47:
	.cfi_escape 0x2e, 0x00
	leaq	80(%rsp), %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
.Ltmp48:
# %bb.38:
.Ltmp49:
	movq	%rax, %rbx
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.5, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp50:
# %bb.39:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit57
.Ltmp51:
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp52:
# %bb.40:
.Ltmp53:
	.cfi_escape 0x2e, 0x00
	movl	%eax, %edi
	callq	hipGetErrorString
.Ltmp54:
# %bb.41:
.Ltmp55:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
.Ltmp56:
# %bb.42:
.Ltmp57:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.6, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp58:
# %bb.43:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit58
	leaq	88(%rsp), %rbx
.Ltmp60:
	.cfi_escape 0x2e, 0x00
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	callq	_ZNKSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE3strEv
.Ltmp61:
# %bb.44:                               # %_ZNKSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEE3strEv.exit
	movq	48(%rsp), %rsi
	movq	56(%rsp), %rdx
.Ltmp63:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cerr, %edi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp64:
# %bb.45:                               # %_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit
.Ltmp65:
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
.Ltmp66:
# %bb.46:                               # %_ZNSolsEPFRSoS_E.exit
	leaq	64(%rsp), %r15
	movq	-16(%r15), %rdi
	cmpq	%r15, %rdi
	je	.LBB3_48
# %bb.47:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB3_48:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp68:
	.cfi_escape 0x2e, 0x00
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	callq	_ZNKSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE3strEv
.Ltmp69:
# %bb.49:                               # %_ZNKSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEE3strEv.exit59
	movb	$1, %bpl
	movq	48(%rsp), %rsi
.Ltmp71:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp72:
# %bb.50:
	xorl	%ebp, %ebp
.Ltmp73:
	.cfi_escape 0x2e, 0x00
	movl	$_ZTISt13runtime_error, %esi
	movl	$_ZNSt13runtime_errorD1Ev, %edx
	movq	%r14, %rdi
	callq	__cxa_throw
.Ltmp74:
# %bb.51:
.LBB3_52:
.Ltmp75:
	movq	%rax, %rbx
	movq	48(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB3_54
# %bb.53:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit65
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB3_54:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit65
	testb	%bpl, %bpl
	jne	.LBB3_56
	jmp	.LBB3_62
.LBB3_55:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit65.thread
.Ltmp70:
	movq	%rax, %rbx
.LBB3_56:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	__cxa_free_exception
	jmp	.LBB3_62
.LBB3_57:
.Ltmp67:
	movq	%rax, %rbx
	leaq	64(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB3_62
# %bb.58:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i60
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
	jmp	.LBB3_62
.LBB3_59:
.Ltmp62:
	jmp	.LBB3_61
.LBB3_60:
.Ltmp59:
.LBB3_61:
	movq	%rax, %rbx
.LBB3_62:
	.cfi_escape 0x2e, 0x00
	leaq	80(%rsp), %rdi
	movl	$_ZTTNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEE, %esi
	callq	_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEED2Ev
	leaq	192(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	callq	_ZNSt8ios_baseD2Ev
	jmp	.LBB3_66
.LBB3_63:
.Ltmp44:
	jmp	.LBB3_65
.LBB3_64:
.Ltmp41:
.LBB3_65:
	movq	%rax, %rbx
.LBB3_66:
.Ltmp76:
	.cfi_escape 0x2e, 0x00
	callq	__cxa_end_catch
.Ltmp77:
.LBB3_67:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.LBB3_68:
.Ltmp78:
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end3:
	.size	cTVSQS2D, .Lfunc_end3-cTVSQS2D
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table3:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 1 <<
	.uleb128 .Ltmp31-.Ltmp0                 #   Call between .Ltmp0 and .Ltmp31
	.uleb128 .Ltmp32-.Lfunc_begin0          #     jumps to .Ltmp32
	.byte	3                               #   On action: 2
	.uleb128 .Ltmp31-.Lfunc_begin0          # >> Call Site 2 <<
	.uleb128 .Ltmp2-.Ltmp31                 #   Call between .Ltmp31 and .Ltmp2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp2-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp3-.Ltmp2                  #   Call between .Ltmp2 and .Ltmp3
	.uleb128 .Ltmp4-.Lfunc_begin0           #     jumps to .Ltmp4
	.byte	3                               #   On action: 2
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp7-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp7
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp7-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp8-.Ltmp7                  #   Call between .Ltmp7 and .Ltmp8
	.uleb128 .Ltmp9-.Lfunc_begin0           #     jumps to .Ltmp9
	.byte	3                               #   On action: 2
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 6 <<
	.uleb128 .Ltmp12-.Ltmp8                 #   Call between .Ltmp8 and .Ltmp12
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin0          #     jumps to .Ltmp14
	.byte	3                               #   On action: 2
	.uleb128 .Ltmp13-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp17-.Ltmp13                #   Call between .Ltmp13 and .Ltmp17
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp17-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp18-.Ltmp17                #   Call between .Ltmp17 and .Ltmp18
	.uleb128 .Ltmp19-.Lfunc_begin0          #     jumps to .Ltmp19
	.byte	3                               #   On action: 2
	.uleb128 .Ltmp20-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp21-.Ltmp20                #   Call between .Ltmp20 and .Ltmp21
	.uleb128 .Ltmp32-.Lfunc_begin0          #     jumps to .Ltmp32
	.byte	3                               #   On action: 2
	.uleb128 .Ltmp21-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp33-.Ltmp21                #   Call between .Ltmp21 and .Ltmp33
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp33-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp40-.Ltmp33                #   Call between .Ltmp33 and .Ltmp40
	.uleb128 .Ltmp41-.Lfunc_begin0          #     jumps to .Ltmp41
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp42-.Lfunc_begin0          # >> Call Site 13 <<
	.uleb128 .Ltmp43-.Ltmp42                #   Call between .Ltmp42 and .Ltmp43
	.uleb128 .Ltmp44-.Lfunc_begin0          #     jumps to .Ltmp44
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp45-.Lfunc_begin0          # >> Call Site 14 <<
	.uleb128 .Ltmp46-.Ltmp45                #   Call between .Ltmp45 and .Ltmp46
	.uleb128 .Ltmp59-.Lfunc_begin0          #     jumps to .Ltmp59
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp46-.Lfunc_begin0          # >> Call Site 15 <<
	.uleb128 .Ltmp47-.Ltmp46                #   Call between .Ltmp46 and .Ltmp47
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp47-.Lfunc_begin0          # >> Call Site 16 <<
	.uleb128 .Ltmp58-.Ltmp47                #   Call between .Ltmp47 and .Ltmp58
	.uleb128 .Ltmp59-.Lfunc_begin0          #     jumps to .Ltmp59
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp60-.Lfunc_begin0          # >> Call Site 17 <<
	.uleb128 .Ltmp61-.Ltmp60                #   Call between .Ltmp60 and .Ltmp61
	.uleb128 .Ltmp62-.Lfunc_begin0          #     jumps to .Ltmp62
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp63-.Lfunc_begin0          # >> Call Site 18 <<
	.uleb128 .Ltmp66-.Ltmp63                #   Call between .Ltmp63 and .Ltmp66
	.uleb128 .Ltmp67-.Lfunc_begin0          #     jumps to .Ltmp67
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp66-.Lfunc_begin0          # >> Call Site 19 <<
	.uleb128 .Ltmp68-.Ltmp66                #   Call between .Ltmp66 and .Ltmp68
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp68-.Lfunc_begin0          # >> Call Site 20 <<
	.uleb128 .Ltmp69-.Ltmp68                #   Call between .Ltmp68 and .Ltmp69
	.uleb128 .Ltmp70-.Lfunc_begin0          #     jumps to .Ltmp70
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp71-.Lfunc_begin0          # >> Call Site 21 <<
	.uleb128 .Ltmp74-.Ltmp71                #   Call between .Ltmp71 and .Ltmp74
	.uleb128 .Ltmp75-.Lfunc_begin0          #     jumps to .Ltmp75
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp74-.Lfunc_begin0          # >> Call Site 22 <<
	.uleb128 .Ltmp76-.Ltmp74                #   Call between .Ltmp74 and .Ltmp76
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp76-.Lfunc_begin0          # >> Call Site 23 <<
	.uleb128 .Ltmp77-.Ltmp76                #   Call between .Ltmp76 and .Ltmp77
	.uleb128 .Ltmp78-.Lfunc_begin0          #     jumps to .Ltmp78
	.byte	5                               #   On action: 3
	.uleb128 .Ltmp77-.Lfunc_begin0          # >> Call Site 24 <<
	.uleb128 .Lfunc_end3-.Ltmp77            #   Call between .Ltmp77 and .Lfunc_end3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.byte	0                               # >> Action Record 1 <<
                                        #   Cleanup
	.byte	0                               #   No further actions
	.byte	1                               # >> Action Record 2 <<
                                        #   Catch TypeInfo 1
	.byte	125                             #   Continue to action 1
	.byte	2                               # >> Action Record 3 <<
                                        #   Catch TypeInfo 2
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 2
	.long	_ZTISt9exception                # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end4:
	.size	__clang_call_terminate, .Lfunc_end4-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.text
	.globl	_Z32__device_stub__Variation3DKernelPfPKfiiiif # -- Begin function _Z32__device_stub__Variation3DKernelPfPKfiiiif
	.type	_Z32__device_stub__Variation3DKernelPfPKfiiiif,@function
_Z32__device_stub__Variation3DKernelPfPKfiiiif: # @_Z32__device_stub__Variation3DKernelPfPKfiiiif
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	28(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	24(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	20(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	16(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	12(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17Variation3DKernelPfPKfiiiif, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z32__device_stub__Variation3DKernelPfPKfiiiif, .Lfunc_end5-_Z32__device_stub__Variation3DKernelPfPKfiiiif
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__TVSQS3DKernelPfS_PKfS1_iiii # -- Begin function _Z28__device_stub__TVSQS3DKernelPfS_PKfS1_iiii
	.type	_Z28__device_stub__TVSQS3DKernelPfS_PKfS1_iiii,@function
_Z28__device_stub__TVSQS3DKernelPfS_PKfS1_iiii: # @_Z28__device_stub__TVSQS3DKernelPfS_PKfS1_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13TVSQS3DKernelPfS_PKfS1_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z28__device_stub__TVSQS3DKernelPfS_PKfS1_iiii, .Lfunc_end6-_Z28__device_stub__TVSQS3DKernelPfS_PKfS1_iiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z11TVSQS3D_gpuPfS_S_PKfiiiiif
.LCPI7_0:
	.long	0x3d000000                      # float 0.03125
.LCPI7_1:
	.long	0x3d800000                      # float 0.0625
	.text
	.globl	_Z11TVSQS3D_gpuPfS_S_PKfiiiiif
	.type	_Z11TVSQS3D_gpuPfS_S_PKfiiiiif,@function
_Z11TVSQS3D_gpuPfS_S_PKfiiiiif:         # @_Z11TVSQS3D_gpuPfS_S_PKfiiiiif
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm0, 28(%rsp)                 # 4-byte Spill
	movl	%r8d, %ebx
	movq	%rcx, 64(%rsp)                  # 8-byte Spill
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	movl	%r9d, 4(%rsp)                   # 4-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r9d, %xmm0
	movq	%rdi, 40(%rsp)                  # 8-byte Spill
	mulss	.LCPI7_0(%rip), %xmm0
	callq	ceilf@PLT
	cvtsi2ssl	160(%rsp), %xmm1
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	mulss	.LCPI7_1(%rip), %xmm1
	movaps	%xmm1, %xmm0
	callq	ceilf@PLT
	testl	%ebx, %ebx
	jle	.LBB7_10
# %bb.1:                                # %.preheader.lr.ph
	movl	176(%rsp), %ecx
	cvttss2si	16(%rsp), %rax          # 4-byte Folded Reload
	movl	168(%rsp), %r12d
	cvttss2si	%xmm0, %rsi
	movl	%eax, %eax
	shlq	$32, %rsi
	orq	%rax, %rsi
	movabsq	$68719476768, %rdx              # imm = 0x1000000020
	movl	%ebx, %eax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	%ecx, %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	%ecx, %eax
	imull	%r12d, %eax
	movl	160(%rsp), %ecx
	imull	4(%rsp), %ecx                   # 4-byte Folded Reload
	imull	%eax, %ecx
	movl	%ecx, 24(%rsp)                  # 4-byte Spill
	xorl	%eax, %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	xorl	%ecx, %ecx
	movq	%rsi, 88(%rsp)                  # 8-byte Spill
.LBB7_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_4 Depth 2
	movq	%rcx, 80(%rsp)                  # 8-byte Spill
	movl	176(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB7_9
# %bb.3:                                #   in Loop: Header=BB7_2 Depth=1
	movslq	8(%rsp), %rax                   # 4-byte Folded Reload
	movq	56(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbp
	movq	64(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	movq	40(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbx
	movq	48(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	movq	32(%rsp), %r15                  # 8-byte Reload
.LBB7_4:                                #   Parent Loop BB7_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%r15, 96(%rsp)                  # 8-byte Spill
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	movq	%rsi, %r15
	movq	%rsi, %rdi
	movl	%r12d, %esi
	movq	%rdx, %rbx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_6
# %bb.5:                                #   in Loop: Header=BB7_4 Depth=2
	movq	%rbp, %rdi
	movq	%r14, %rsi
	movl	4(%rsp), %edx                   # 4-byte Reload
	movl	160(%rsp), %ecx
	movl	%r12d, %r8d
	movl	176(%rsp), %r9d
                                        # kill: def $r9d killed $r9d killed $r9
	movss	28(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	callq	_Z32__device_stub__Variation3DKernelPfPKfiiiif
.LBB7_6:                                #   in Loop: Header=BB7_4 Depth=2
	movq	%r15, %rdi
	movl	%r12d, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	16(%rsp), %rbx                  # 8-byte Reload
	movq	96(%rsp), %r15                  # 8-byte Reload
	jne	.LBB7_8
# %bb.7:                                #   in Loop: Header=BB7_4 Depth=2
	movq	%rbx, %rdi
	movq	%r13, %rsi
	movq	%rbp, %rdx
	movq	%r14, %rcx
	movl	4(%rsp), %r8d                   # 4-byte Reload
	movl	160(%rsp), %r9d
	movl	176(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	176(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__TVSQS3DKernelPfS_PKfS1_iiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB7_8:                                #   in Loop: Header=BB7_4 Depth=2
	addq	$4, %rbp
	addq	$4, %r14
	addq	$4, %rbx
	addq	$4, %r13
	decq	%r15
	movl	168(%rsp), %r12d
	movq	88(%rsp), %rsi                  # 8-byte Reload
	movabsq	$68719476768, %rdx              # imm = 0x1000000020
	jne	.LBB7_4
.LBB7_9:                                # %._crit_edge
                                        #   in Loop: Header=BB7_2 Depth=1
	movq	80(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	movq	8(%rsp), %rax                   # 8-byte Reload
	addl	24(%rsp), %eax                  # 4-byte Folded Reload
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	cmpq	72(%rsp), %rcx                  # 8-byte Folded Reload
	jne	.LBB7_2
.LBB7_10:                               # %._crit_edge60
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z11TVSQS3D_gpuPfS_S_PKfiiiiif, .Lfunc_end7-_Z11TVSQS3D_gpuPfS_S_PKfiiiiif
	.cfi_endproc
                                        # -- End function
	.globl	cTVSQS3D                        # -- Begin function cTVSQS3D
	.type	cTVSQS3D,@function
cTVSQS3D:                               # @cTVSQS3D
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$456, %rsp                      # imm = 0x1C8
	.cfi_def_cfa_offset 512
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm0, 36(%rsp)                 # 4-byte Spill
	movl	%r9d, %ebp
	movl	%r8d, %r13d
	movq	%rcx, %rbx
	movq	%rdx, 40(%rsp)                  # 8-byte Spill
	movq	%rsi, %r14
	movq	%rdi, %r12
	movl	528(%rsp), %esi
	movl	520(%rsp), %edx
	movl	512(%rsp), %ecx
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	movq	%rax, (%rdi)
	movq	%rax, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%rax, (%rsp)
	movl	%r9d, %eax
	imull	%r8d, %eax
	imull	%ecx, %eax
	movl	%edx, %ecx
	imull	%esi, %ecx
	imull	%eax, %ecx
	movslq	%ecx, %r15
	shlq	$2, %r15
.Ltmp79:
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp80:
# %bb.1:                                # %_ZL9hipMallocIfE10hipError_tPPT_m.exit
	testl	%eax, %eax
	jne	.LBB8_14
# %bb.2:
.Ltmp84:
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp85:
# %bb.3:                                # %_ZL9hipMallocIfE10hipError_tPPT_m.exit56
	testl	%eax, %eax
	jne	.LBB8_15
# %bb.4:
.Ltmp89:
	.cfi_escape 0x2e, 0x00
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp90:
# %bb.5:                                # %_ZL9hipMallocIfE10hipError_tPPT_m.exit57
	testl	%eax, %eax
	jne	.LBB8_16
# %bb.6:
.Ltmp94:
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp95:
# %bb.7:                                # %_ZL9hipMallocIfE10hipError_tPPT_m.exit58
	testl	%eax, %eax
	jne	.LBB8_17
# %bb.8:
	movq	(%rsp), %rdi
.Ltmp101:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp102:
# %bb.9:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	(%rsp), %rcx
.Ltmp103:
	.cfi_escape 0x2e, 0x20
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	%r13d, %r8d
	movl	%ebp, %r9d
	movss	44(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	536(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	536(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	536(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z11TVSQS3D_gpuPfS_S_PKfiiiiif
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.Ltmp104:
# %bb.10:
	movq	24(%rsp), %rsi
.Ltmp105:
	.cfi_escape 0x2e, 0x00
	movq	%r12, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp106:
# %bb.11:
	movq	16(%rsp), %rsi
.Ltmp107:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp108:
# %bb.12:
	movq	8(%rsp), %rsi
.Ltmp109:
	.cfi_escape 0x2e, 0x00
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp110:
# %bb.13:
	movq	24(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	callq	hipFree
	movq	16(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	callq	hipFree
	movq	8(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	callq	hipFree
	movq	(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	callq	hipFree
	addq	$456, %rsp                      # imm = 0x1C8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB8_14:
	.cfi_def_cfa_offset 512
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp81:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp82:
	jmp	.LBB8_18
.LBB8_15:
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp86:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp87:
	jmp	.LBB8_18
.LBB8_16:
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp91:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp92:
	jmp	.LBB8_18
.LBB8_17:
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp96:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.3, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp97:
.LBB8_18:                               # %.invoke
.Ltmp99:
	.cfi_escape 0x2e, 0x00
	movl	$_ZTISt13runtime_error, %esi
	movl	$_ZNSt13runtime_errorD1Ev, %edx
	movq	%r14, %rdi
	callq	__cxa_throw
.Ltmp100:
# %bb.19:                               # %.cont
.LBB8_20:
.Ltmp98:
	jmp	.LBB8_24
.LBB8_21:
.Ltmp93:
	jmp	.LBB8_24
.LBB8_22:
.Ltmp88:
	jmp	.LBB8_24
.LBB8_23:
.Ltmp83:
.LBB8_24:
	movq	%rdx, %r15
	movq	%rax, %rbx
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	__cxa_free_exception
	jmp	.LBB8_26
.LBB8_25:
.Ltmp111:
	movq	%rdx, %r15
	movq	%rax, %rbx
.LBB8_26:
	cmpl	$1, %r15d
	jne	.LBB8_67
# %bb.27:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	__cxa_begin_catch
	movq	%rax, %rbx
	movq	24(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB8_29
# %bb.28:
.Ltmp112:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp113:
.LBB8_29:
	movq	16(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB8_31
# %bb.30:
.Ltmp114:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp115:
.LBB8_31:
	movq	8(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB8_33
# %bb.32:
.Ltmp116:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp117:
.LBB8_33:
	movq	(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB8_35
# %bb.34:
.Ltmp118:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp119:
.LBB8_35:
.Ltmp121:
	.cfi_escape 0x2e, 0x00
	leaq	80(%rsp), %rdi
	callq	_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEC1Ev
.Ltmp122:
# %bb.36:
.Ltmp124:
	.cfi_escape 0x2e, 0x00
	leaq	80(%rsp), %rdi
	movl	$.L.str.7, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp125:
# %bb.37:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	(%rbx), %rax
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	*16(%rax)
.Ltmp126:
	.cfi_escape 0x2e, 0x00
	leaq	80(%rsp), %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
.Ltmp127:
# %bb.38:
.Ltmp128:
	movq	%rax, %rbx
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.5, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp129:
# %bb.39:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit59
.Ltmp130:
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp131:
# %bb.40:
.Ltmp132:
	.cfi_escape 0x2e, 0x00
	movl	%eax, %edi
	callq	hipGetErrorString
.Ltmp133:
# %bb.41:
.Ltmp134:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
.Ltmp135:
# %bb.42:
.Ltmp136:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.6, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp137:
# %bb.43:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit60
	leaq	88(%rsp), %rbx
.Ltmp139:
	.cfi_escape 0x2e, 0x00
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	callq	_ZNKSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE3strEv
.Ltmp140:
# %bb.44:                               # %_ZNKSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEE3strEv.exit
	movq	48(%rsp), %rsi
	movq	56(%rsp), %rdx
.Ltmp142:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cerr, %edi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp143:
# %bb.45:                               # %_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit
.Ltmp144:
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
.Ltmp145:
# %bb.46:                               # %_ZNSolsEPFRSoS_E.exit
	leaq	64(%rsp), %r15
	movq	-16(%r15), %rdi
	cmpq	%r15, %rdi
	je	.LBB8_48
# %bb.47:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB8_48:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	.cfi_escape 0x2e, 0x00
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %r14
.Ltmp147:
	.cfi_escape 0x2e, 0x00
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	callq	_ZNKSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE3strEv
.Ltmp148:
# %bb.49:                               # %_ZNKSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEE3strEv.exit61
	movb	$1, %bpl
	movq	48(%rsp), %rsi
.Ltmp150:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp151:
# %bb.50:
	xorl	%ebp, %ebp
.Ltmp152:
	.cfi_escape 0x2e, 0x00
	movl	$_ZTISt13runtime_error, %esi
	movl	$_ZNSt13runtime_errorD1Ev, %edx
	movq	%r14, %rdi
	callq	__cxa_throw
.Ltmp153:
# %bb.51:
.LBB8_52:
.Ltmp154:
	movq	%rax, %rbx
	movq	48(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB8_54
# %bb.53:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit67
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB8_54:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit67
	testb	%bpl, %bpl
	jne	.LBB8_56
	jmp	.LBB8_62
.LBB8_55:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit67.thread
.Ltmp149:
	movq	%rax, %rbx
.LBB8_56:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	__cxa_free_exception
	jmp	.LBB8_62
.LBB8_57:
.Ltmp146:
	movq	%rax, %rbx
	leaq	64(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB8_62
# %bb.58:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i62
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
	jmp	.LBB8_62
.LBB8_59:
.Ltmp141:
	jmp	.LBB8_61
.LBB8_60:
.Ltmp138:
.LBB8_61:
	movq	%rax, %rbx
.LBB8_62:
	.cfi_escape 0x2e, 0x00
	leaq	80(%rsp), %rdi
	movl	$_ZTTNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEE, %esi
	callq	_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEED2Ev
	leaq	192(%rsp), %rdi
	.cfi_escape 0x2e, 0x00
	callq	_ZNSt8ios_baseD2Ev
	jmp	.LBB8_66
.LBB8_63:
.Ltmp123:
	jmp	.LBB8_65
.LBB8_64:
.Ltmp120:
.LBB8_65:
	movq	%rax, %rbx
.LBB8_66:
.Ltmp155:
	.cfi_escape 0x2e, 0x00
	callq	__cxa_end_catch
.Ltmp156:
.LBB8_67:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.LBB8_68:
.Ltmp157:
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end8:
	.size	cTVSQS3D, .Lfunc_end8-cTVSQS3D
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table8:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase1-.Lttbaseref1
.Lttbaseref1:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Ltmp79-.Lfunc_begin1          # >> Call Site 1 <<
	.uleb128 .Ltmp110-.Ltmp79               #   Call between .Ltmp79 and .Ltmp110
	.uleb128 .Ltmp111-.Lfunc_begin1         #     jumps to .Ltmp111
	.byte	3                               #   On action: 2
	.uleb128 .Ltmp110-.Lfunc_begin1         # >> Call Site 2 <<
	.uleb128 .Ltmp81-.Ltmp110               #   Call between .Ltmp110 and .Ltmp81
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp81-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Ltmp82-.Ltmp81                #   Call between .Ltmp81 and .Ltmp82
	.uleb128 .Ltmp83-.Lfunc_begin1          #     jumps to .Ltmp83
	.byte	3                               #   On action: 2
	.uleb128 .Ltmp82-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Ltmp86-.Ltmp82                #   Call between .Ltmp82 and .Ltmp86
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp86-.Lfunc_begin1          # >> Call Site 5 <<
	.uleb128 .Ltmp87-.Ltmp86                #   Call between .Ltmp86 and .Ltmp87
	.uleb128 .Ltmp88-.Lfunc_begin1          #     jumps to .Ltmp88
	.byte	3                               #   On action: 2
	.uleb128 .Ltmp87-.Lfunc_begin1          # >> Call Site 6 <<
	.uleb128 .Ltmp91-.Ltmp87                #   Call between .Ltmp87 and .Ltmp91
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp91-.Lfunc_begin1          # >> Call Site 7 <<
	.uleb128 .Ltmp92-.Ltmp91                #   Call between .Ltmp91 and .Ltmp92
	.uleb128 .Ltmp93-.Lfunc_begin1          #     jumps to .Ltmp93
	.byte	3                               #   On action: 2
	.uleb128 .Ltmp92-.Lfunc_begin1          # >> Call Site 8 <<
	.uleb128 .Ltmp96-.Ltmp92                #   Call between .Ltmp92 and .Ltmp96
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp96-.Lfunc_begin1          # >> Call Site 9 <<
	.uleb128 .Ltmp97-.Ltmp96                #   Call between .Ltmp96 and .Ltmp97
	.uleb128 .Ltmp98-.Lfunc_begin1          #     jumps to .Ltmp98
	.byte	3                               #   On action: 2
	.uleb128 .Ltmp99-.Lfunc_begin1          # >> Call Site 10 <<
	.uleb128 .Ltmp100-.Ltmp99               #   Call between .Ltmp99 and .Ltmp100
	.uleb128 .Ltmp111-.Lfunc_begin1         #     jumps to .Ltmp111
	.byte	3                               #   On action: 2
	.uleb128 .Ltmp100-.Lfunc_begin1         # >> Call Site 11 <<
	.uleb128 .Ltmp112-.Ltmp100              #   Call between .Ltmp100 and .Ltmp112
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp112-.Lfunc_begin1         # >> Call Site 12 <<
	.uleb128 .Ltmp119-.Ltmp112              #   Call between .Ltmp112 and .Ltmp119
	.uleb128 .Ltmp120-.Lfunc_begin1         #     jumps to .Ltmp120
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp121-.Lfunc_begin1         # >> Call Site 13 <<
	.uleb128 .Ltmp122-.Ltmp121              #   Call between .Ltmp121 and .Ltmp122
	.uleb128 .Ltmp123-.Lfunc_begin1         #     jumps to .Ltmp123
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp124-.Lfunc_begin1         # >> Call Site 14 <<
	.uleb128 .Ltmp125-.Ltmp124              #   Call between .Ltmp124 and .Ltmp125
	.uleb128 .Ltmp138-.Lfunc_begin1         #     jumps to .Ltmp138
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp125-.Lfunc_begin1         # >> Call Site 15 <<
	.uleb128 .Ltmp126-.Ltmp125              #   Call between .Ltmp125 and .Ltmp126
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp126-.Lfunc_begin1         # >> Call Site 16 <<
	.uleb128 .Ltmp137-.Ltmp126              #   Call between .Ltmp126 and .Ltmp137
	.uleb128 .Ltmp138-.Lfunc_begin1         #     jumps to .Ltmp138
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp139-.Lfunc_begin1         # >> Call Site 17 <<
	.uleb128 .Ltmp140-.Ltmp139              #   Call between .Ltmp139 and .Ltmp140
	.uleb128 .Ltmp141-.Lfunc_begin1         #     jumps to .Ltmp141
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp142-.Lfunc_begin1         # >> Call Site 18 <<
	.uleb128 .Ltmp145-.Ltmp142              #   Call between .Ltmp142 and .Ltmp145
	.uleb128 .Ltmp146-.Lfunc_begin1         #     jumps to .Ltmp146
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp145-.Lfunc_begin1         # >> Call Site 19 <<
	.uleb128 .Ltmp147-.Ltmp145              #   Call between .Ltmp145 and .Ltmp147
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp147-.Lfunc_begin1         # >> Call Site 20 <<
	.uleb128 .Ltmp148-.Ltmp147              #   Call between .Ltmp147 and .Ltmp148
	.uleb128 .Ltmp149-.Lfunc_begin1         #     jumps to .Ltmp149
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp150-.Lfunc_begin1         # >> Call Site 21 <<
	.uleb128 .Ltmp153-.Ltmp150              #   Call between .Ltmp150 and .Ltmp153
	.uleb128 .Ltmp154-.Lfunc_begin1         #     jumps to .Ltmp154
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp153-.Lfunc_begin1         # >> Call Site 22 <<
	.uleb128 .Ltmp155-.Ltmp153              #   Call between .Ltmp153 and .Ltmp155
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp155-.Lfunc_begin1         # >> Call Site 23 <<
	.uleb128 .Ltmp156-.Ltmp155              #   Call between .Ltmp155 and .Ltmp156
	.uleb128 .Ltmp157-.Lfunc_begin1         #     jumps to .Ltmp157
	.byte	5                               #   On action: 3
	.uleb128 .Ltmp156-.Lfunc_begin1         # >> Call Site 24 <<
	.uleb128 .Lfunc_end8-.Ltmp156           #   Call between .Ltmp156 and .Lfunc_end8
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.byte	0                               # >> Action Record 1 <<
                                        #   Cleanup
	.byte	0                               #   No further actions
	.byte	1                               # >> Action Record 2 <<
                                        #   Catch TypeInfo 1
	.byte	125                             #   Continue to action 1
	.byte	2                               # >> Action Record 3 <<
                                        #   Catch TypeInfo 2
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 2
	.long	_ZTISt9exception                # TypeInfo 1
.Lttbase1:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17Variation2DKernelPfPKfiiif, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13TVSQS2DKernelPfS_PKfS1_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17Variation3DKernelPfPKfiiiif, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13TVSQS3DKernelPfS_PKfS1_iiii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17Variation2DKernelPfPKfiiif,@object # @_Z17Variation2DKernelPfPKfiiif
	.section	.rodata,"a",@progbits
	.globl	_Z17Variation2DKernelPfPKfiiif
	.p2align	3, 0x0
_Z17Variation2DKernelPfPKfiiif:
	.quad	_Z32__device_stub__Variation2DKernelPfPKfiiif
	.size	_Z17Variation2DKernelPfPKfiiif, 8

	.type	_Z13TVSQS2DKernelPfS_PKfS1_iii,@object # @_Z13TVSQS2DKernelPfS_PKfS1_iii
	.globl	_Z13TVSQS2DKernelPfS_PKfS1_iii
	.p2align	3, 0x0
_Z13TVSQS2DKernelPfS_PKfS1_iii:
	.quad	_Z28__device_stub__TVSQS2DKernelPfS_PKfS1_iii
	.size	_Z13TVSQS2DKernelPfS_PKfS1_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"pcus1 allocation failed"
	.size	.L.str, 24

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"pcus2 allocation failed"
	.size	.L.str.1, 24

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"pcuVar allocation failed"
	.size	.L.str.2, 25

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"pcuImg allocation failed"
	.size	.L.str.3, 25

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"cTVSQS2D failed: "
	.size	.L.str.4, 18

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"("
	.size	.L.str.5, 2

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	")"
	.size	.L.str.6, 2

	.type	_Z17Variation3DKernelPfPKfiiiif,@object # @_Z17Variation3DKernelPfPKfiiiif
	.section	.rodata,"a",@progbits
	.globl	_Z17Variation3DKernelPfPKfiiiif
	.p2align	3, 0x0
_Z17Variation3DKernelPfPKfiiiif:
	.quad	_Z32__device_stub__Variation3DKernelPfPKfiiiif
	.size	_Z17Variation3DKernelPfPKfiiiif, 8

	.type	_Z13TVSQS3DKernelPfS_PKfS1_iiii,@object # @_Z13TVSQS3DKernelPfS_PKfS1_iiii
	.globl	_Z13TVSQS3DKernelPfS_PKfS1_iiii
	.p2align	3, 0x0
_Z13TVSQS3DKernelPfS_PKfS1_iiii:
	.quad	_Z28__device_stub__TVSQS3DKernelPfS_PKfS1_iiii
	.size	_Z13TVSQS3DKernelPfS_PKfS1_iiii, 8

	.type	.L.str.7,@object                # @.str.7
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.7:
	.asciz	"cTVSQS3D failed: "
	.size	.L.str.7, 18

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17Variation2DKernelPfPKfiiif"
	.size	.L__unnamed_1, 31

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13TVSQS2DKernelPfS_PKfS1_iii"
	.size	.L__unnamed_2, 31

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z17Variation3DKernelPfPKfiiiif"
	.size	.L__unnamed_3, 32

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z13TVSQS3DKernelPfS_PKfS1_iiii"
	.size	.L__unnamed_4, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__Variation2DKernelPfPKfiiif
	.addrsig_sym _Z28__device_stub__TVSQS2DKernelPfS_PKfS1_iii
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z32__device_stub__Variation3DKernelPfPKfiiiif
	.addrsig_sym _Z28__device_stub__TVSQS3DKernelPfS_PKfS1_iiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z17Variation2DKernelPfPKfiiif
	.addrsig_sym _Z13TVSQS2DKernelPfS_PKfS1_iii
	.addrsig_sym _ZTISt9exception
	.addrsig_sym _ZTISt13runtime_error
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _Z17Variation3DKernelPfPKfiiiif
	.addrsig_sym _Z13TVSQS3DKernelPfS_PKfS1_iiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17Variation2DKernelPfPKfiiif ; -- Begin function _Z17Variation2DKernelPfPKfiiif
	.globl	_Z17Variation2DKernelPfPKfiiif
	.p2align	8
	.type	_Z17Variation2DKernelPfPKfiiif,@function
_Z17Variation2DKernelPfPKfiiif:         ; @_Z17Variation2DKernelPfPKfiiif
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[5:6], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s5, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v5, s5, v[2:3]
	s_load_b128 s[8:11], s[0:1], 0x0
	v_mul_lo_u32 v3, v6, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v1, vcc_lo
	v_cmp_lt_i32_e32 vcc_lo, 0, v5
	v_mov_b32_e32 v5, 0
	global_load_b32 v4, v[7:8], off
	v_mov_b32_e32 v7, 0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_subrev_nc_u32_e32 v5, s5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, v5, s6
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v5, vcc_lo, s10, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v5, v4, v5
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 0, v2
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_subrev_nc_u32_e32 v2, s6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v7, v4, v2
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v7, v7
	v_fmac_f32_e32 v2, v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, s7, v2
	v_mul_f32_e32 v3, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_sqrt_f32_e32 v3, v2
	s_waitcnt vmcnt(0)
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v4, -1, v3
	v_add_nc_u32_e32 v5, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v6, -v4, v3, v2
	v_fma_f32 v7, -v5, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v6
	v_cndmask_b32_e64 v3, v3, v4, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v7
	v_cndmask_b32_e64 v3, v3, v5, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, 0x37800000, v3
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v3, v2, vcc_lo
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17Variation2DKernelPfPKfiiif
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17Variation2DKernelPfPKfiiif, .Lfunc_end0-_Z17Variation2DKernelPfPKfiiif
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 528
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z13TVSQS2DKernelPfS_PKfS1_iii ; -- Begin function _Z13TVSQS2DKernelPfS_PKfS1_iii
	.globl	_Z13TVSQS2DKernelPfS_PKfS1_iii
	.p2align	8
	.type	_Z13TVSQS2DKernelPfS_PKfS1_iii,@function
_Z13TVSQS2DKernelPfS_PKfS1_iii:         ; @_Z13TVSQS2DKernelPfS_PKfS1_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[16:19], s[0:1], 0x20
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[9:10], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s16, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s17, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_10
; %bb.1:
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[10:11], null, v9, s17, v[2:3]
	s_load_b256 s[4:11], s[0:1], 0x0
	v_mov_b32_e32 v11, 0
	v_mov_b32_e32 v13, 0
	s_mov_b32 s0, exec_lo
	v_mul_lo_u32 v7, v10, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[0:1], 2, v[7:8]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v5, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v1, vcc_lo
	global_load_b32 v12, v[3:4], off
	global_load_b32 v8, v[5:6], off
	v_cmpx_lt_i32_e32 0, v9
	s_cbranch_execz .LBB1_3
; %bb.2:
	v_subrev_nc_u32_e32 v13, s17, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v13, v13, s18
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	v_add_co_u32 v13, vcc_lo, s10, v13
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v14, vcc_lo, s11, v14, vcc_lo
	global_load_b32 v13, v[13:14], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v13, v12, v13
.LBB1_3:
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s0, s16, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s0, v9
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v9, v8
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB1_5
; %bb.4:
	v_add_nc_u32_e32 v9, s17, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v9, v9, s18
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v14, vcc_lo, s10, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v15, vcc_lo, s11, v10, vcc_lo
	v_add_co_u32 v9, vcc_lo, s8, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v10, vcc_lo
	global_load_b32 v11, v[14:15], off
	global_load_b32 v9, v[9:10], off
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v11, v12, v11
.LBB1_5:
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v10, 0
	v_mov_b32_e32 v14, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 0, v2
	s_cbranch_execz .LBB1_7
; %bb.6:
	v_subrev_nc_u32_e32 v14, s18, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v15, 31, v14
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, s10, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s11, v15, vcc_lo
	global_load_b32 v7, v[14:15], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v14, v12, v7
.LBB1_7:
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s0, s17, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s0, v2
	v_mov_b32_e32 v2, v8
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB1_9
; %bb.8:
	s_ashr_i32 s19, s18, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[18:19], 2
	v_add_co_u32 v2, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v4, vcc_lo, v5, s2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v3, v[2:3], off
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v10, v12, v3
.LBB1_9:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_f32_e32 v3, v13, v14
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_scale_f32 v7, null, v2, v2, v10
	v_div_scale_f32 v14, null, v8, v8, 2.0
	v_div_scale_f32 v5, null, v8, v8, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v20, v7
	v_rcp_f32_e32 v21, v14
	v_div_scale_f32 v4, null, v9, v9, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v12, v5
	v_div_scale_f32 v17, null, v2, v2, 1.0
	v_rcp_f32_e32 v15, v4
	v_div_scale_f32 v6, s0, v11, v9, v11
	v_fma_f32 v26, -v7, v20, 1.0
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_2) | instid1(TRANS32_DEP_3)
	v_fma_f32 v28, -v14, v21, 1.0
	v_rcp_f32_e32 v24, v17
	v_div_scale_f32 v16, null, v9, v9, 1.0
	v_fma_f32 v18, -v5, v12, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(TRANS32_DEP_2)
	v_dual_fmac_f32 v20, v26, v20 :: v_dual_fmac_f32 v21, v28, v21
	v_fma_f32 v22, -v4, v15, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f32_e32 v23, v16
	v_fmac_f32_e32 v12, v18, v12
	v_div_scale_f32 v19, vcc_lo, v3, v8, v3
	v_div_scale_f32 v18, s2, 2.0, v8, 2.0
	s_delay_alu instid0(TRANS32_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v31, -v17, v24, 1.0
	v_mul_f32_e32 v25, v19, v12
	v_fmac_f32_e32 v15, v22, v15
	v_div_scale_f32 v13, s1, v10, v2, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v24, v31, v24
	v_fma_f32 v27, -v5, v25, v19
	v_fma_f32 v30, -v16, v23, 1.0
	v_div_scale_f32 v22, s3, 1.0, v9, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v25, v27, v12
	v_fma_f32 v5, -v5, v25, v19
	v_mul_f32_e32 v19, v13, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v5, v5, v12, v25
	v_mul_f32_e32 v12, v18, v21
	s_mov_b32 vcc_lo, s0
	v_div_fixup_f32 v3, v5, v8, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -v14, v12, v18
	v_dual_mul_f32 v29, v6, v15 :: v_dual_fmac_f32 v12, v5, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v26, -v4, v29, v6
	v_fmac_f32_e32 v29, v26, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v4, -v4, v29, v6
	v_fma_f32 v6, -v7, v19, v13
	v_div_fmas_f32 v4, v4, v15, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v19, v6, v20
	v_div_scale_f32 v15, s0, 1.0, v2, 1.0
	s_mov_b32 vcc_lo, s1
	v_div_fixup_f32 v4, v4, v9, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v7, -v7, v19, v13
	v_mul_f32_e32 v5, v15, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v3, v4, v3
	v_fmac_f32_e32 v23, v30, v23
	v_fma_f32 v11, -v17, v5, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v25, v22, v23
	v_fmac_f32_e32 v5, v11, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v16, v25, v22
	v_fmac_f32_e32 v25, v6, v23
	v_div_fmas_f32 v6, v7, v20, v19
	v_fma_f32 v7, -v14, v12, v18
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v13, -v16, v25, v22
	v_div_fixup_f32 v4, v6, v2, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v7, v7, v21, v12
	s_mov_b32 vcc_lo, s3
	v_fma_f32 v6, -v17, v5, v15
	v_add_f32_e32 v4, v3, v4
	v_div_fmas_f32 v11, v13, v23, v25
	s_mov_b32 vcc_lo, s0
	v_div_fixup_f32 v7, v7, v8, 2.0
	v_div_fmas_f32 v5, v6, v24, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v8, v11, v9, 1.0
	v_div_fixup_f32 v5, v5, v2, 1.0
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v6, v7, v8
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_f32_e32 v5, v6, v5
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[2:3], v4, off
	global_store_b32 v[0:1], v5, off
.LBB1_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13TVSQS2DKernelPfS_PKfS1_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 32
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13TVSQS2DKernelPfS_PKfS1_iii, .Lfunc_end1-_Z13TVSQS2DKernelPfS_PKfS1_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1180
; NumSgprs: 22
; NumVgprs: 32
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 32
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z17Variation3DKernelPfPKfiiiif ; -- Begin function _Z17Variation3DKernelPfPKfiiiif
	.globl	_Z17Variation3DKernelPfPKfiiiif
	.p2align	8
	.type	_Z17Variation3DKernelPfPKfiiiif,@function
_Z17Variation3DKernelPfPKfiiiif:        ; @_Z17Variation3DKernelPfPKfiiiif
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x34
	s_load_b128 s[8:11], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[8:9], null, s13, s2, v[1:2]
	v_mad_u64_u32 v[5:6], null, s14, s4, v[2:3]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s8, v8
	v_cmp_gt_i32_e64 s2, s9, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s10, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_8
; %bb.1:
	v_mad_u64_u32 v[0:1], null, v8, s9, v[5:6]
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[6:7], null, v0, s10, v[2:3]
	v_mov_b32_e32 v7, 0
	v_mul_lo_u32 v3, v6, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v1, vcc_lo
	v_cmp_lt_i32_e32 vcc_lo, 0, v8
	v_mov_b32_e32 v8, 0
	global_load_b32 v4, v[9:10], off
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB2_3
; %bb.2:
	s_mul_i32 s2, s10, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v7, s2, v6
	v_mul_lo_u32 v9, v7, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	global_load_b32 v7, v[9:10], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v7, v4, v7
.LBB2_3:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_i32_e32 0, v5
	s_cbranch_execz .LBB2_5
; %bb.4:
	v_subrev_nc_u32_e32 v5, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, v5, s11
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v8, v4, v5
.LBB2_5:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_lt_i32_e32 vcc_lo, 0, v2
	v_mov_b32_e32 v2, 0
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB2_7
; %bb.6:
	v_subrev_nc_u32_e32 v2, s11, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v4, v2
.LBB2_7:
	s_or_b32 exec_lo, exec_lo, s1
	v_mul_f32_e32 v3, v8, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v7, v7
	v_fmac_f32_e32 v3, v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, s0, v3
	v_mul_f32_e32 v3, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_sqrt_f32_e32 v3, v2
	s_waitcnt vmcnt(0)
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v4, -1, v3
	v_add_nc_u32_e32 v5, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v6, -v4, v3, v2
	v_fma_f32 v7, -v5, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v6
	v_cndmask_b32_e64 v3, v3, v4, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v7
	v_cndmask_b32_e64 v3, v3, v5, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, 0x37800000, v3
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v3, v2, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB2_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17Variation3DKernelPfPKfiiiif
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z17Variation3DKernelPfPKfiiiif, .Lfunc_end2-_Z17Variation3DKernelPfPKfiiiif
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 680
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z13TVSQS3DKernelPfS_PKfS1_iiii ; -- Begin function _Z13TVSQS3DKernelPfS_PKfS1_iiii
	.globl	_Z13TVSQS3DKernelPfS_PKfS1_iiii
	.p2align	8
	.type	_Z13TVSQS3DKernelPfS_PKfS1_iiii,@function
_Z13TVSQS3DKernelPfS_PKfS1_iiii:        ; @_Z13TVSQS3DKernelPfS_PKfS1_iiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x20
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s8, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[12:13], null, s13, s2, v[1:2]
	v_mad_u64_u32 v[9:10], null, s14, s8, v[2:3]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s4, v12
	v_cmp_gt_i32_e64 s2, s5, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s6, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB3_14
; %bb.1:
	v_mad_u64_u32 v[0:1], null, v12, s5, v[9:10]
	s_load_b256 s[8:15], s[0:1], 0x0
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v15, 0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v0, s6, v[2:3]
	v_mul_lo_u32 v7, v10, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[0:1], 2, v[7:8]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s14, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s15, v1, vcc_lo
	v_add_co_u32 v5, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v6, vcc_lo, s13, v1, vcc_lo
	global_load_b32 v14, v[3:4], off
	global_load_b32 v8, v[5:6], off
	v_cmpx_lt_i32_e32 0, v12
	s_cbranch_execz .LBB3_3
; %bb.2:
	s_mul_i32 s1, s6, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v11, s1, v10
	v_mul_lo_u32 v15, v11, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v16, 31, v15
	v_lshlrev_b64 v[15:16], 2, v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v15, vcc_lo, s14, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s15, v16, vcc_lo
	global_load_b32 v11, v[15:16], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v15, v14, v11
.LBB3_3:
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s0, s4, -1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v11, v8
	v_cmp_gt_i32_e32 vcc_lo, s0, v12
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB3_5
; %bb.4:
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s6, s5, v[10:11]
	v_mul_lo_u32 v11, v11, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v16, vcc_lo, s14, v11
	v_add_co_ci_u32_e32 v17, vcc_lo, s15, v12, vcc_lo
	v_add_co_u32 v11, vcc_lo, s12, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s13, v12, vcc_lo
	global_load_b32 v13, v[16:17], off
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v13, v14, v13
.LBB3_5:
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v12, 0
	v_mov_b32_e32 v16, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 0, v9
	s_cbranch_execz .LBB3_7
; %bb.6:
	v_subrev_nc_u32_e32 v16, s6, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v16, v16, s7
	v_ashrrev_i32_e32 v17, 31, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	v_add_co_u32 v16, vcc_lo, s14, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, s15, v17, vcc_lo
	global_load_b32 v16, v[16:17], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v16, v14, v16
.LBB3_7:
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s0, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s0, v9
	v_mov_b32_e32 v9, v8
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB3_9
; %bb.8:
	v_add_nc_u32_e32 v9, s6, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v9, v9, s7
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v17, vcc_lo, s14, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v18, vcc_lo, s15, v10, vcc_lo
	v_add_co_u32 v9, vcc_lo, s12, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s13, v10, vcc_lo
	global_load_b32 v12, v[17:18], off
	global_load_b32 v9, v[9:10], off
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v12, v14, v12
.LBB3_9:
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v17, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 0, v2
	s_cbranch_execz .LBB3_11
; %bb.10:
	v_subrev_nc_u32_e32 v17, s7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v18, 31, v17
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v17, vcc_lo, s14, v17
	v_add_co_ci_u32_e32 v18, vcc_lo, s15, v18, vcc_lo
	global_load_b32 v7, v[17:18], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v17, v14, v7
.LBB3_11:
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s0, s6, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s0, v2
	v_mov_b32_e32 v2, v8
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB3_13
; %bb.12:
	s_ashr_i32 s3, s7, 31
	s_mov_b32 s2, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[2:3], 2
	v_add_co_u32 v2, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v4, vcc_lo, v5, s2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v3, v[2:3], off
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v10, v14, v3
.LBB3_13:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v6, null, v9, v9, v12
	v_div_scale_f32 v14, s1, v12, v9, v12
	v_div_scale_f32 v4, null, v11, v11, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_rcp_f32_e32 v23, v6
	v_div_scale_f32 v19, null, v8, v8, 0x40400000
	v_div_scale_f32 v5, s0, v13, v11, v13
	v_div_scale_f32 v21, null, v11, v11, 1.0
	v_rcp_f32_e32 v26, v19
	v_div_scale_f32 v18, s2, v10, v2, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v28, -v6, v23, 1.0
	v_rcp_f32_e32 v30, v21
	v_div_scale_f32 v20, s3, 0x40400000, v8, 0x40400000
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v23, v28, v23
	v_add_f32_e32 v3, v15, v16
	v_div_scale_f32 v15, null, v2, v2, v10
	v_fma_f32 v34, -v19, v26, 1.0
	v_add_f32_e32 v3, v3, v17
	v_rcp_f32_e32 v17, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v26, v34, v26
	v_div_scale_f32 v7, null, v8, v8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v16, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v24, -v4, v17, 1.0
	v_fmac_f32_e32 v17, v24, v17
	v_rcp_f32_e32 v24, v15
	v_fma_f32 v22, -v7, v16, 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v16, v22, v16
	v_div_scale_f32 v25, vcc_lo, v3, v8, v3
	v_div_scale_f32 v22, null, v9, v9, 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v33, -v15, v24, 1.0
	v_mul_f32_e32 v27, v25, v16
	v_rcp_f32_e32 v31, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v24, v33, v24
	v_fma_f32 v32, -v7, v27, v25
	v_mul_f32_e32 v29, v5, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v27, v32, v16 :: v_dual_mul_f32 v32, v14, v23
	v_fma_f32 v28, -v4, v29, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v7, -v7, v27, v25
	v_fma_f32 v25, -v6, v32, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v32, v25, v23
	v_div_scale_f32 v25, s4, 1.0, v9, 1.0
	v_fma_f32 v6, -v6, v32, v14
	v_fma_f32 v14, -v22, v31, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v31, v14, v31
	v_fmac_f32_e32 v29, v28, v17
	v_fma_f32 v28, -v21, v30, 1.0
	v_fma_f32 v4, -v4, v29, v5
	v_div_fmas_f32 v5, v7, v16, v27
	v_div_scale_f32 v16, null, v2, v2, 1.0
	s_mov_b32 vcc_lo, s0
	v_fmac_f32_e32 v30, v28, v30
	v_div_fmas_f32 v4, v4, v17, v29
	s_delay_alu instid0(VALU_DEP_3)
	v_rcp_f32_e32 v14, v16
	s_mov_b32 vcc_lo, s1
	v_div_fixup_f32 v3, v5, v8, v3
	v_div_fmas_f32 v6, v6, v23, v32
	v_div_fixup_f32 v4, v4, v11, v13
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v6, v6, v9, v12
	v_add_f32_e32 v3, v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v23, -v16, v14, 1.0
	v_mul_f32_e32 v7, v18, v24
	v_div_scale_f32 v4, s0, 1.0, v11, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v3, v6, v3 :: v_dual_fmac_f32 v14, v23, v14
	v_fma_f32 v13, -v15, v7, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, v4, v30
	v_fmac_f32_e32 v7, v13, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v15, -v15, v7, v18
	v_dual_mul_f32 v18, v25, v31 :: v_dual_mul_f32 v5, v20, v26
	v_div_fmas_f32 v7, v15, v24, v7
	s_mov_b32 vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v13, -v19, v5, v20
	v_div_fixup_f32 v6, v7, v2, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v5, v13, v26
	v_fma_f32 v13, -v21, v17, v4
	v_add_f32_e32 v6, v3, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v15, -v19, v5, v20
	v_div_scale_f32 v19, s1, 1.0, v2, 1.0
	v_fmac_f32_e32 v17, v13, v30
	v_fma_f32 v13, -v22, v18, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_fmas_f32 v5, v15, v26, v5
	v_mul_f32_e32 v15, v19, v14
	s_mov_b32 vcc_lo, s0
	v_fma_f32 v4, -v21, v17, v4
	v_fmac_f32_e32 v18, v13, v31
	v_div_fixup_f32 v5, v5, v8, 0x40400000
	v_fma_f32 v13, -v16, v15, v19
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_fmas_f32 v4, v4, v30, v17
	v_fma_f32 v8, -v22, v18, v25
	s_mov_b32 vcc_lo, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v15, v13, v14
	v_div_fixup_f32 v4, v4, v11, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v8, v8, v31, v18
	s_mov_b32 vcc_lo, s1
	v_fma_f32 v7, -v16, v15, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v4, v5, v4
	v_div_fixup_f32 v5, v8, v9, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v7, v7, v14, v15
	v_add_f32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v5, v7, v2, 1.0
	v_add_co_u32 v2, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
	v_add_f32_e32 v4, v4, v5
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_store_b32 v[2:3], v6, off
	global_store_b32 v[0:1], v4, off
.LBB3_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13TVSQS3DKernelPfS_PKfS1_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 35
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z13TVSQS3DKernelPfS_PKfS1_iiii, .Lfunc_end3-_Z13TVSQS3DKernelPfS_PKfS1_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1640
; NumSgprs: 18
; NumVgprs: 35
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 35
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17Variation2DKernelPfPKfiiif
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17Variation2DKernelPfPKfiiif.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13TVSQS2DKernelPfS_PKfS1_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z13TVSQS2DKernelPfS_PKfS1_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     32
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17Variation3DKernelPfPKfiiiif
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17Variation3DKernelPfPKfiiiif.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13TVSQS3DKernelPfS_PKfS1_iiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13TVSQS3DKernelPfS_PKfS1_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     35
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
