#include <math.h>
#include <stdio.h>

// Array access macros
#define INPUT(i,j) imgBef[(i)*n + j]
#define OUTPUT(i,j) imgAfter[(i)*n + j]
#define fNi(i,j) fNi[(i)*patchSize + j]
#define fNj(i,j) fNj[(i)*patchSize + j]
#define fN(i,j) fN[(i)*patchSize + j]
#define H(i,j) H[(i)*patchSize + j]
#define PATCH(i,j) patch[(i)*blockDim.y + j]
#define OTHER_PATCH(i,j) other_patch[(i)*blockDim.y + j]

/* If out of block -> get fNi from global memory
   Else get from patch (shared)
   Out of block happens when: k or l <= padSize  OR
   if k > blockDim.x + padSize or if l > blockDim.y + padSize
*/

__device__ int isInBlock(int k, int l, int padSize, int a, int b){

	if (k<0 || l<0 || k>a || l>b){
		return 0;
	}
	else {
		return 1;
	}
}

/* Calculates the norm between two vectors based on the gaussian matrix H for
   a predetermined patch size.
   */
__device__ float calcNorm(float *fNi, float *fNj, float *H, int patchSize){
	float sum =0;
	for (int k=0; k< patchSize; k++){
		for (int l=0; l<patchSize; l++){
			sum+=(fNi(k,l)-fNj(k,l))*(fNi(k,l)-fNj(k,l))*H(k,l);
		}
	}
	return sum;
}

/* 
 Checks if targetted pixel at the edges of the final blocks is outside of the image.
*/
__device__ int pixelOutofImg(int x, int y, int m, int n){

	if (x > m || y > n){
		return 1;
	}
	else{
		return 0;
	}

}

__device__ void computeFN(float * fN, int i, int j, int n, float * patch, float const * imgBef, int padSize, int patchSize, int currentBlock_X, int currentBlock_Y, int blockDimX, int blockDimY ){
	
	int a,b,k,l,e=0,f=0;
	for (k=i-padSize; k<=i+padSize; k++){
				for (l = j-padSize; l<=j+padSize; j++){ 
					a = k - currentBlock_X * blockDimX; // a e [0,patchSize)
					b = l - currentBlock_Y * blockDimY; // b e [0,patchSize)

					if (isInBlock(a, b, padSize, blockDimX, blockDimY)){
						fN(e,f) = PATCH(a,b);
					}
					else{
						fN(e,f) = INPUT(k,l);
					}
					f++;
					if (f==patchSize){
						f=0;
						e++;
					}
				}
			}	

}

__global__ void cudaNonLocalMeans(float const *imgBef, float *imgAfter, float *H, float filtSigma,
                                    int m, int n, int padSize) {
	// Get pixel (x,y) in input

	__shared__ extern float patch[];
	float *other_patch = patch + blockDim.x*blockDim.y;
	int currentBlock_X = blockIdx.x; // [0,numBlocksX)
	int currentBlock_Y = blockIdx.y; // [0,numBlocksY)

	int patchSize = 2*padSize+1;
	int notInPaddedArea=1;
	//float *other_patch = patch +
	int i = currentBlock_X * blockDim.x + threadIdx.x;
	int j = currentBlock_Y * blockDim.y + threadIdx.y;
	// nBlocks_X,Y is the number of blocks per axis
	int nBlocks_X = gridDim.x;
	int nBlocks_Y = gridDim.y;

	float Z=0;
	float exponent=0;
	float pixel=0;
	float *fNi, *fNj;

	// if i or j less than 2 or greater than 65 they are outside of the image.
	if (i < padSize || j < padSize || i > m-padSize-1 || j > n-padSize-1) notInPaddedArea=0;

	if (i < m && j < n){ // INSIDE IMAGE
		if (notInPaddedArea){
			PATCH(threadIdx.x, threadIdx.y) = INPUT(i,j);
			// fNi calculation
			computeFN(fNi, i, j, n, patch,imgBef,padSize,patchSize,currentBlock_X, currentBlock_Y, blockDim.x, blockDim.y);
			// fNj calculation for CURRENT block only.
			for (int row = currentBlock_X*blockDim.x ; row<(currentBlock_X+1)*blockDim.x; row++){
				for (int col = currentBlock_Y*blockDim.y ; col<(currentBlock_Y+1)*blockDim.y; col++){
					//if (row > m-padSize || col > n-padSize || row < padSize || col < padSize )continue;
					computeFN(fNj, row, col, n, patch,imgBef,padSize,patchSize,currentBlock_X, currentBlock_Y, blockDim.x, blockDim.y);
					exponent = calcNorm(fNi, fNj, H, patchSize);
					exponent/=filtSigma;
					Z+=exp(-exponent);
					pixel += exp(-exponent)*INPUT(row,col);
				}
			}
		}
	}
	__syncthreads();

	/*
	  So far the pixel has been affected only by the values of its own block.
	  The following code implements the effect of the rest of the blocks on
	  the pixel.
	*/

	int blockNoX, blockNoY;
	// For each block other than the current 
	for (blockNoX = 0; blockNoX < nBlocks_X ; blockNoX++){
		for (blockNoY = 0; blockNoY < nBlocks_Y ; blockNoY++){
			if (blockNoX!=currentBlock_X && blockNoY!=currentBlock_Y){
				// Save block to shared
				// For each pixel of the block copy to shared (other_patch)
				if (!(pixelOutofImg(blockNoX * blockDim.x + threadIdx.x, blockNoY * blockDim.y + threadIdx.y, m, n))){
					OTHER_PATCH(threadIdx.x,threadIdx.y)=INPUT(blockNoX * blockDim.x + threadIdx.x , blockNoY * blockDim.y + threadIdx.y);
				}
				__syncthreads();
				// If the pixel is inside the current block compute from shared, otherwise from global. 
				if (notInPaddedArea){
					for (int row = blockNoX*blockDim.x ; row<(blockNoX+1)*blockDim.x; row++){
						for (int col = blockNoY*blockDim.y ; col<(blockNoY+1)*blockDim.y; col++){
							if (row > m-padSize || col > n-padSize) continue;
							computeFN(fNj, row, col, n, other_patch,imgBef,padSize,patchSize,blockNoX,blockNoY, blockDim.x, blockDim.y);
							exponent = calcNorm(fNi, fNj, H, patchSize);
							exponent/=filtSigma;
							Z+=exp(-exponent);
							pixel += exp(-exponent)*INPUT(row,col);

						}
					}
				}
			}
		}
	}
	/* Finally since the total effect of the other pixels on the current pixel
	   has been calculated, pixel is divided by the finalized Z matrix ending up with its
	   final denoised version.
	*/	
	if (notInPaddedArea){
		OUTPUT(i,j) = pixel/Z;	
	}else{
		OUTPUT(i,j) = 1;
	}
	
}		

	.file	"tmpxft_002ec195_00000000-6_NLMKernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9isInBlockiiiii
	.type	_Z9isInBlockiiiii, @function
_Z9isInBlockiiiii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z9isInBlockiiiii, .-_Z9isInBlockiiiii
	.globl	_Z8calcNormPfS_S_i
	.type	_Z8calcNormPfS_S_i, @function
_Z8calcNormPfS_S_i:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z8calcNormPfS_S_i, .-_Z8calcNormPfS_S_i
	.globl	_Z13pixelOutofImgiiii
	.type	_Z13pixelOutofImgiiii, @function
_Z13pixelOutofImgiiii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z13pixelOutofImgiiii, .-_Z13pixelOutofImgiiii
	.globl	_Z9computeFNPfiiiS_PKfiiiiii
	.type	_Z9computeFNPfiiiS_PKfiiiiii, @function
_Z9computeFNPfiiiS_PKfiiiiii:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z9computeFNPfiiiS_PKfiiiiii, .-_Z9computeFNPfiiiS_PKfiiiiii
	.globl	_Z47__device_stub__Z17cudaNonLocalMeansPKfPfS1_fiiiPKfPfS1_fiii
	.type	_Z47__device_stub__Z17cudaNonLocalMeansPKfPfS1_fiiiPKfPfS1_fiii, @function
_Z47__device_stub__Z17cudaNonLocalMeansPKfPfS1_fiiiPKfPfS1_fiii:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movss	%xmm0, 20(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z17cudaNonLocalMeansPKfPfS1_fiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L10:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z47__device_stub__Z17cudaNonLocalMeansPKfPfS1_fiiiPKfPfS1_fiii, .-_Z47__device_stub__Z17cudaNonLocalMeansPKfPfS1_fiiiPKfPfS1_fiii
	.globl	_Z17cudaNonLocalMeansPKfPfS1_fiii
	.type	_Z17cudaNonLocalMeansPKfPfS1_fiii, @function
_Z17cudaNonLocalMeansPKfPfS1_fiii:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z17cudaNonLocalMeansPKfPfS1_fiiiPKfPfS1_fiii
	.cfi_endproc
.LFE2056:
	.size	_Z17cudaNonLocalMeansPKfPfS1_fiii, .-_Z17cudaNonLocalMeansPKfPfS1_fiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z17cudaNonLocalMeansPKfPfS1_fiii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z17cudaNonLocalMeansPKfPfS1_fiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <math.h>
#include <stdio.h>

// Array access macros
#define INPUT(i,j) imgBef[(i)*n + j]
#define OUTPUT(i,j) imgAfter[(i)*n + j]
#define fNi(i,j) fNi[(i)*patchSize + j]
#define fNj(i,j) fNj[(i)*patchSize + j]
#define fN(i,j) fN[(i)*patchSize + j]
#define H(i,j) H[(i)*patchSize + j]
#define PATCH(i,j) patch[(i)*blockDim.y + j]
#define OTHER_PATCH(i,j) other_patch[(i)*blockDim.y + j]

/* If out of block -> get fNi from global memory
   Else get from patch (shared)
   Out of block happens when: k or l <= padSize  OR
   if k > blockDim.x + padSize or if l > blockDim.y + padSize
*/

__device__ int isInBlock(int k, int l, int padSize, int a, int b){

	if (k<0 || l<0 || k>a || l>b){
		return 0;
	}
	else {
		return 1;
	}
}

/* Calculates the norm between two vectors based on the gaussian matrix H for
   a predetermined patch size.
   */
__device__ float calcNorm(float *fNi, float *fNj, float *H, int patchSize){
	float sum =0;
	for (int k=0; k< patchSize; k++){
		for (int l=0; l<patchSize; l++){
			sum+=(fNi(k,l)-fNj(k,l))*(fNi(k,l)-fNj(k,l))*H(k,l);
		}
	}
	return sum;
}

/* 
 Checks if targetted pixel at the edges of the final blocks is outside of the image.
*/
__device__ int pixelOutofImg(int x, int y, int m, int n){

	if (x > m || y > n){
		return 1;
	}
	else{
		return 0;
	}

}

__device__ void computeFN(float * fN, int i, int j, int n, float * patch, float const * imgBef, int padSize, int patchSize, int currentBlock_X, int currentBlock_Y, int blockDimX, int blockDimY ){
	
	int a,b,k,l,e=0,f=0;
	for (k=i-padSize; k<=i+padSize; k++){
				for (l = j-padSize; l<=j+padSize; j++){ 
					a = k - currentBlock_X * blockDimX; // a e [0,patchSize)
					b = l - currentBlock_Y * blockDimY; // b e [0,patchSize)

					if (isInBlock(a, b, padSize, blockDimX, blockDimY)){
						fN(e,f) = PATCH(a,b);
					}
					else{
						fN(e,f) = INPUT(k,l);
					}
					f++;
					if (f==patchSize){
						f=0;
						e++;
					}
				}
			}	

}

__global__ void cudaNonLocalMeans(float const *imgBef, float *imgAfter, float *H, float filtSigma,
                                    int m, int n, int padSize) {
	// Get pixel (x,y) in input

	__shared__ extern float patch[];
	float *other_patch = patch + blockDim.x*blockDim.y;
	int currentBlock_X = blockIdx.x; // [0,numBlocksX)
	int currentBlock_Y = blockIdx.y; // [0,numBlocksY)

	int patchSize = 2*padSize+1;
	int notInPaddedArea=1;
	//float *other_patch = patch +
	int i = currentBlock_X * blockDim.x + threadIdx.x;
	int j = currentBlock_Y * blockDim.y + threadIdx.y;
	// nBlocks_X,Y is the number of blocks per axis
	int nBlocks_X = gridDim.x;
	int nBlocks_Y = gridDim.y;

	float Z=0;
	float exponent=0;
	float pixel=0;
	float *fNi, *fNj;

	// if i or j less than 2 or greater than 65 they are outside of the image.
	if (i < padSize || j < padSize || i > m-padSize-1 || j > n-padSize-1) notInPaddedArea=0;

	if (i < m && j < n){ // INSIDE IMAGE
		if (notInPaddedArea){
			PATCH(threadIdx.x, threadIdx.y) = INPUT(i,j);
			// fNi calculation
			computeFN(fNi, i, j, n, patch,imgBef,padSize,patchSize,currentBlock_X, currentBlock_Y, blockDim.x, blockDim.y);
			// fNj calculation for CURRENT block only.
			for (int row = currentBlock_X*blockDim.x ; row<(currentBlock_X+1)*blockDim.x; row++){
				for (int col = currentBlock_Y*blockDim.y ; col<(currentBlock_Y+1)*blockDim.y; col++){
					//if (row > m-padSize || col > n-padSize || row < padSize || col < padSize )continue;
					computeFN(fNj, row, col, n, patch,imgBef,padSize,patchSize,currentBlock_X, currentBlock_Y, blockDim.x, blockDim.y);
					exponent = calcNorm(fNi, fNj, H, patchSize);
					exponent/=filtSigma;
					Z+=exp(-exponent);
					pixel += exp(-exponent)*INPUT(row,col);
				}
			}
		}
	}
	__syncthreads();

	/*
	  So far the pixel has been affected only by the values of its own block.
	  The following code implements the effect of the rest of the blocks on
	  the pixel.
	*/

	int blockNoX, blockNoY;
	// For each block other than the current 
	for (blockNoX = 0; blockNoX < nBlocks_X ; blockNoX++){
		for (blockNoY = 0; blockNoY < nBlocks_Y ; blockNoY++){
			if (blockNoX!=currentBlock_X && blockNoY!=currentBlock_Y){
				// Save block to shared
				// For each pixel of the block copy to shared (other_patch)
				if (!(pixelOutofImg(blockNoX * blockDim.x + threadIdx.x, blockNoY * blockDim.y + threadIdx.y, m, n))){
					OTHER_PATCH(threadIdx.x,threadIdx.y)=INPUT(blockNoX * blockDim.x + threadIdx.x , blockNoY * blockDim.y + threadIdx.y);
				}
				__syncthreads();
				// If the pixel is inside the current block compute from shared, otherwise from global. 
				if (notInPaddedArea){
					for (int row = blockNoX*blockDim.x ; row<(blockNoX+1)*blockDim.x; row++){
						for (int col = blockNoY*blockDim.y ; col<(blockNoY+1)*blockDim.y; col++){
							if (row > m-padSize || col > n-padSize) continue;
							computeFN(fNj, row, col, n, other_patch,imgBef,padSize,patchSize,blockNoX,blockNoY, blockDim.x, blockDim.y);
							exponent = calcNorm(fNi, fNj, H, patchSize);
							exponent/=filtSigma;
							Z+=exp(-exponent);
							pixel += exp(-exponent)*INPUT(row,col);

						}
					}
				}
			}
		}
	}
	/* Finally since the total effect of the other pixels on the current pixel
	   has been calculated, pixel is divided by the finalized Z matrix ending up with its
	   final denoised version.
	*/	
	if (notInPaddedArea){
		OUTPUT(i,j) = pixel/Z;	
	}else{
		OUTPUT(i,j) = 1;
	}
	
}		

	.text
	.file	"NLMKernel.hip"
	.globl	_Z32__device_stub__cudaNonLocalMeansPKfPfS1_fiii # -- Begin function _Z32__device_stub__cudaNonLocalMeansPKfPfS1_fiii
	.type	_Z32__device_stub__cudaNonLocalMeansPKfPfS1_fiii,@function
_Z32__device_stub__cudaNonLocalMeansPKfPfS1_fiii: # @_Z32__device_stub__cudaNonLocalMeansPKfPfS1_fiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	16(%rsp), %r10
	movl	%ecx, (%r10)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r10, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17cudaNonLocalMeansPKfPfS1_fiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__cudaNonLocalMeansPKfPfS1_fiii, .Lfunc_end0-_Z32__device_stub__cudaNonLocalMeansPKfPfS1_fiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17cudaNonLocalMeansPKfPfS1_fiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17cudaNonLocalMeansPKfPfS1_fiii,@object # @_Z17cudaNonLocalMeansPKfPfS1_fiii
	.section	.rodata,"a",@progbits
	.globl	_Z17cudaNonLocalMeansPKfPfS1_fiii
	.p2align	3, 0x0
_Z17cudaNonLocalMeansPKfPfS1_fiii:
	.quad	_Z32__device_stub__cudaNonLocalMeansPKfPfS1_fiii
	.size	_Z17cudaNonLocalMeansPKfPfS1_fiii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z17cudaNonLocalMeansPKfPfS1_fiii"
	.size	.L__unnamed_1, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__cudaNonLocalMeansPKfPfS1_fiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17cudaNonLocalMeansPKfPfS1_fiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17cudaNonLocalMeansPKfPfS1_fiii ; -- Begin function _Z17cudaNonLocalMeansPKfPfS1_fiii
	.globl	_Z17cudaNonLocalMeansPKfPfS1_fiii
	.p2align	8
	.type	_Z17cudaNonLocalMeansPKfPfS1_fiii,@function
_Z17cudaNonLocalMeansPKfPfS1_fiii:      ; @_Z17cudaNonLocalMeansPKfPfS1_fiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v4, 0x3ff, v0
	v_bfe_u32 v5, v0, 10, 10
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr16
                                        ; implicit-def: $sgpr19
	s_waitcnt lgkmcnt(0)
	s_and_b32 s17, s2, 0xffff
	s_lshr_b32 s18, s2, 16
	s_mul_i32 s12, s14, s17
	s_mul_i32 s13, s15, s18
	v_add_nc_u32_e32 v3, s12, v4
	v_add_nc_u32_e32 v0, s13, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v1, v3, v0
	v_cmp_gt_i32_e64 s8, s7, v1
	v_cmpx_le_i32_e64 s7, v1
; %bb.1:
	s_not_b32 s2, s7
	s_delay_alu instid0(VALU_DEP_2)
	s_and_not1_b32 s8, s8, exec_lo
	s_add_i32 s9, s2, s5
	s_add_i32 s2, s2, s6
	v_cmp_lt_i32_e32 vcc_lo, s9, v3
	v_cmp_lt_i32_e64 s2, s2, v0
	s_mov_b32 s19, -1
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, vcc_lo, s2
	s_and_b32 s2, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s8, s8, s2
; %bb.2:                                ; %Flow301
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b64 s[2:3], s[0:1], 0x28
	s_and_saveexec_b32 s9, s8
; %bb.3:
	s_and_not1_b32 s19, s19, exec_lo
	s_or_b32 s16, s16, exec_lo
; %bb.4:
	s_or_b32 exec_lo, exec_lo, s9
	s_load_b128 s[8:11], s[0:1], 0x0
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	v_cmp_gt_i32_e64 s0, s5, v3
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v6, 0
	s_and_b32 s1, vcc_lo, s19
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_11
; %bb.5:                                ; %_Z9computeFNPfiiiS_PKfiiiiii.exit
	v_mad_u64_u32 v[1:2], null, v3, s6, v[0:1]
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v7, 0
	s_add_i32 s1, s12, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_ge_u32 s12, s1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	v_mad_u32_u24 v2, v4, s18, v5
	v_lshl_add_u32 v2, v2, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v1
	s_cbranch_scc1 .LBB0_11
; %bb.6:                                ; %.preheader204.lr.ph
	v_div_scale_f32 v1, null, s4, s4, 0x80000000
	s_brev_b32 s19, 1
	s_mul_i32 s20, s14, s6
	v_div_scale_f32 v7, vcc_lo, s19, s4, s19
	s_delay_alu instid0(VALU_DEP_2)
	v_rcp_f32_e32 v2, v1
	s_add_i32 s19, s13, s18
	s_mul_i32 s20, s20, s17
	s_cmp_lt_u32 s13, s19
	s_cselect_b32 s19, -1, 0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v1, v2, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v6, v2
	v_mul_f32_e32 v6, v7, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, -v1, v6, v7
	v_fmac_f32_e32 v6, v8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v1, -v1, v6, v7
	v_div_fmas_f32 v1, v1, v2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v1, v1, s4, 0x80000000
	v_mul_f32_e32 v2, 0x3fb8aa3b, v1
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v6, 0x3fb8aa3b, v1, -v2
	v_rndne_f32_e32 v7, v2
	v_fmamk_f32 v6, v1, 0x32a5705f, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v2, v2, v7
	v_add_f32_e32 v2, v2, v6
	v_cvt_i32_f32_e32 v6, v7
	v_mov_b32_e32 v7, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v2, v2, v6
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v6, 0 :: v_dual_cndmask_b32 v1, 0x7f800000, v2
.LBB0_7:                                ; %.preheader204
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_9 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB0_10
; %bb.8:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_7 Depth=1
	s_mov_b32 s21, s18
	s_mov_b32 s22, s13
.LBB0_9:                                ; %_Z9computeFNPfiiiS_PKfiiiiii.exit193
                                        ;   Parent Loop BB0_7 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s24, s20, s22
	s_ashr_i32 s25, s24, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[24:25], s[24:25], 2
	s_add_u32 s24, s8, s24
	s_addc_u32 s25, s9, s25
	s_add_i32 s21, s21, -1
	s_load_b32 s23, s[24:25], 0x0
	v_add_f32_e32 v7, v1, v7
	s_add_i32 s22, s22, 1
	s_cmp_eq_u32 s21, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v6, s23, v1
	s_cbranch_scc0 .LBB0_9
.LBB0_10:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_7 Depth=1
	s_add_i32 s12, s12, 1
	s_add_i32 s20, s20, s6
	s_cmp_eq_u32 s12, s1
	s_cbranch_scc0 .LBB0_7
.LBB0_11:                               ; %.loopexit205
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_33
; %bb.12:                               ; %.preheader203.lr.ph
	v_div_scale_f32 v1, null, s4, s4, 0x80000000
	s_brev_b32 s0, 1
	s_mov_b32 s12, 0
	v_div_scale_f32 v9, vcc_lo, s0, s4, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_rcp_f32_e32 v2, v1
	s_mul_i32 s0, s18, s17
	s_mul_i32 s19, s6, s17
	s_lshl_b32 s0, s0, 2
	s_mov_b32 s21, s17
	s_add_i32 s0, s0, 0
	s_cmp_lt_i32 s3, 1
	s_cselect_b32 s1, -1, 0
	s_xor_b32 s20, s16, -1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v1, v2, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v8, v2
	v_mul_f32_e32 v8, v9, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, -v1, v8, v9
	v_fmac_f32_e32 v8, v10, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v1, -v1, v8, v9
	v_div_fmas_f32 v1, v1, v2, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v1, v1, s4, 0x80000000
	s_sub_i32 s4, s5, s7
	s_sub_i32 s7, s6, s7
	v_mul_f32_e32 v2, 0x3fb8aa3b, v1
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v8, 0x3fb8aa3b, v1, -v2
	v_rndne_f32_e32 v9, v2
	v_fmamk_f32 v8, v1, 0x32a5705f, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v2, v2, v9
	v_cvt_i32_f32_e32 v9, v9
	v_add_f32_e32 v2, v2, v8
	v_mul_u32_u24_e32 v8, s18, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v2, v2
	v_lshlrev_b32_e32 v8, 2, v8
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v1
	v_dual_cndmask_b32 v9, 0x7f800000, v2 :: v_dual_lshlrev_b32 v10, 2, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v8, s0, v10, v8
	v_mov_b32_e32 v2, 0
.LBB0_13:                               ; %.preheader203
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_18 Depth 2
                                        ;       Child Loop BB0_23 Depth 3
                                        ;         Child Loop BB0_25 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_15
; %bb.14:                               ; %.preheader203.._crit_edge232_crit_edge
                                        ;   in Loop: Header=BB0_13 Depth=1
	s_add_i32 s22, s12, 1
	s_mov_b32 s0, 0
	s_branch .LBB0_16
.LBB0_15:                               ;   in Loop: Header=BB0_13 Depth=1
	s_mov_b32 s0, -1
                                        ; implicit-def: $sgpr22
.LBB0_16:                               ; %Flow293
                                        ;   in Loop: Header=BB0_13 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_31
; %bb.17:                               ; %.lr.ph231
                                        ;   in Loop: Header=BB0_13 Depth=1
	s_mul_i32 s23, s12, s17
	s_cmp_eq_u32 s12, s14
	v_add_nc_u32_e32 v1, s23, v4
	s_cselect_b32 s24, -1, 0
	s_add_i32 s0, s23, s17
	s_add_i32 s22, s12, 1
	s_cmp_lt_u32 s23, s0
	v_mul_lo_u32 v10, v1, s6
	v_cmp_ge_i32_e64 s0, s5, v1
	s_cselect_b32 s13, -1, 0
	s_mul_i32 s26, s19, s12
	s_and_b32 s25, s20, s13
	s_mov_b32 s27, 0
.LBB0_18:                               ;   Parent Loop BB0_13 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_23 Depth 3
                                        ;         Child Loop BB0_25 Depth 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s27, s15
	s_cselect_b32 s12, -1, 0
	s_or_b32 s12, s24, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB0_30
; %bb.19:                               ;   in Loop: Header=BB0_18 Depth=2
	s_mul_i32 s28, s27, s18
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s28, v5
	v_cmp_ge_i32_e32 vcc_lo, s6, v1
	s_and_b32 s13, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s12, s13
	s_cbranch_execz .LBB0_21
; %bb.20:                               ;   in Loop: Header=BB0_18 Depth=2
	v_add_nc_u32_e32 v1, v1, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[1:2]
	v_add_co_u32 v11, vcc_lo, s8, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s9, v12, vcc_lo
	global_load_b32 v1, v[11:12], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v1
.LBB0_21:                               ;   in Loop: Header=BB0_18 Depth=2
	s_or_b32 exec_lo, exec_lo, s12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s29, s25
	s_cbranch_execz .LBB0_29
; %bb.22:                               ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB0_18 Depth=2
	s_add_i32 s12, s28, s18
	s_mov_b32 s31, s26
	s_cmp_lt_u32 s28, s12
	s_mov_b32 s33, s23
	s_cselect_b32 s30, -1, 0
.LBB0_23:                               ; %.preheader
                                        ;   Parent Loop BB0_13 Depth=1
                                        ;     Parent Loop BB0_18 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_25 Depth 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s30
	s_cbranch_vccnz .LBB0_28
; %bb.24:                               ; %.lr.ph218
                                        ;   in Loop: Header=BB0_23 Depth=3
	s_cmp_gt_i32 s33, s4
	s_mov_b32 s12, s31
	s_cselect_b32 s34, -1, 0
	s_mov_b32 s35, s18
	s_mov_b32 s36, s28
.LBB0_25:                               ;   Parent Loop BB0_13 Depth=1
                                        ;     Parent Loop BB0_18 Depth=2
                                        ;       Parent Loop BB0_23 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_gt_i32 s36, s7
	s_cselect_b32 s13, -1, 0
	s_or_b32 s13, s34, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB0_27
; %bb.26:                               ; %_Z9computeFNPfiiiS_PKfiiiiii.exit197
                                        ;   in Loop: Header=BB0_25 Depth=4
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[38:39], s[12:13], 2
	s_add_u32 s38, s8, s38
	s_addc_u32 s39, s9, s39
	s_load_b32 s13, s[38:39], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_add_f32 v7, v9, v7 :: v_dual_fmac_f32 v6, s13, v9
.LBB0_27:                               ;   in Loop: Header=BB0_25 Depth=4
	s_add_i32 s35, s35, -1
	s_add_i32 s36, s36, 1
	s_add_i32 s12, s12, 1
	s_cmp_eq_u32 s35, 0
	s_cbranch_scc0 .LBB0_25
.LBB0_28:                               ; %._crit_edge219
                                        ;   in Loop: Header=BB0_23 Depth=3
	s_add_i32 s33, s33, 1
	s_add_i32 s31, s31, s6
	s_cmp_eq_u32 s33, s21
	s_cbranch_scc0 .LBB0_23
.LBB0_29:                               ; %Flow290
                                        ;   in Loop: Header=BB0_18 Depth=2
	s_or_b32 exec_lo, exec_lo, s29
.LBB0_30:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_18 Depth=2
	s_add_i32 s27, s27, 1
	s_add_i32 s26, s26, s18
	s_cmp_lg_u32 s27, s3
	s_cbranch_scc1 .LBB0_18
.LBB0_31:                               ; %._crit_edge232
                                        ;   in Loop: Header=BB0_13 Depth=1
	s_add_i32 s21, s21, s17
	s_cmp_lg_u32 s22, s2
	s_cbranch_scc0 .LBB0_33
; %bb.32:                               ;   in Loop: Header=BB0_13 Depth=1
	s_mov_b32 s12, s22
	s_branch .LBB0_13
.LBB0_33:                               ; %._crit_edge238
	v_div_scale_f32 v4, null, v7, v7, v6
	v_div_scale_f32 v8, vcc_lo, v6, v7, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v1, -v4, v5, 1.0
	v_fmac_f32_e32 v5, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, v8, v5
	v_fma_f32 v1, -v4, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v9, v1, v5
	v_mad_u64_u32 v[1:2], null, v3, s6, v[0:1]
	v_fma_f32 v0, -v4, v9, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_div_fmas_f32 v0, v0, v5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v3, v0, v7, v6
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v2, v3, 1.0, s16
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17cudaNonLocalMeansPKfPfS1_fiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 40
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17cudaNonLocalMeansPKfPfS1_fiii, .Lfunc_end0-_Z17cudaNonLocalMeansPKfPfS1_fiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1584
; NumSgprs: 42
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 42
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         160
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17cudaNonLocalMeansPKfPfS1_fiii
    .private_segment_fixed_size: 0
    .sgpr_count:     42
    .sgpr_spill_count: 0
    .symbol:         _Z17cudaNonLocalMeansPKfPfS1_fiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
