#include<iostream>
#include <fstream>
#include <string>
#include <stdio.h>
#include <stdlib.h>
using namespace std;

__global__ void kernel( float* r_gpu,  float* g_gpu,   float* b_gpu, int N) {
	
	int tId = threadIdx.x + blockIdx.x * blockDim.x;
	if(tId < N) {
		r_gpu[tId] = 1 - r_gpu[tId];
		g_gpu[tId] = 1 - g_gpu[tId];
		b_gpu[tId] = 1 - b_gpu[tId];
	}
}



void CambiarColores(float* r, float* g, float* b) {
	//cout << *r << "|" << 1-*r << endl;
	*r = 1 - *r;
	*g = 1 - *g;
	*b = 1 - *b;
}


int main(int argc, char const *argv[]) {
	FILE * pFile;
	int n, m;
	float* r, *g, *b; 



	pFile = fopen ("img.txt","r");
	fscanf(pFile, "%d %d", &m, &n);


	int block_size = 256;
	int grid_size = (int) ceil((float) n*m / block_size);


	float* r_gpu, *g_gpu, *b_gpu;

	cudaMalloc(&r_gpu, sizeof(float) * n * m);
	cudaMalloc(&g_gpu, sizeof(float) * n * m);
	cudaMalloc(&b_gpu, sizeof(float) * n * m);

	r = new float[n*m];
	g = new float[n*m];
	b = new float[n*m];

	for (int i = 0; i < n*m; ++i) {
		fscanf (pFile, "%f", &r[i]);
	}

	for (int i = 0; i < n*m; ++i) {
		fscanf (pFile, "%f", &g[i]);
	}

	for (int i = 0; i < n*m; ++i) {
		fscanf (pFile, "%f", &b[i]);
	}

	fclose (pFile);

	cudaMemcpy(r_gpu, r, sizeof(float) * n * m, cudaMemcpyHostToDevice);
	cudaMemcpy(g_gpu, g, sizeof(float) * n * m, cudaMemcpyHostToDevice);
	cudaMemcpy(b_gpu, b, sizeof(float) * n * m, cudaMemcpyHostToDevice);

	int tamanio = n * m;

	cudaEvent_t ct1, ct2;
	float dt;
	cudaEventCreate(&ct1);
	cudaEventCreate(&ct2);
	cudaEventRecord(ct1);

	kernel<<<grid_size, block_size>>>(r_gpu, g_gpu, b_gpu, tamanio);

	cudaEventRecord(ct2);
	cudaEventSynchronize(ct2);
	cudaEventElapsedTime(&dt, ct1, ct2);

	cout << "Tiempo GPU: " << dt << " [ms]" << endl; 

	cudaMemcpy(r, r_gpu, sizeof(float) * n * m, cudaMemcpyDeviceToHost);
	cudaMemcpy(g, g_gpu, sizeof(float) * n * m, cudaMemcpyDeviceToHost);
	cudaMemcpy(b, b_gpu, sizeof(float) * n * m, cudaMemcpyDeviceToHost);


	cudaFree(r_gpu);
	cudaFree(g_gpu);
	cudaFree(b_gpu);






	FILE * pSalida;
	pSalida = fopen ("img_salida.txt","w");
	fprintf(pSalida, "%d %d\n", m, n);
	for (int i = 0; i < n*m; ++i) {
		if(i == n*m - 1) {
			fprintf(pSalida, "%f", r[i]);
		} else {
			fprintf(pSalida, "%f ", r[i]);
		}
		
	}
	fprintf(pSalida, "\n");
	for (int i = 0; i < n*m; ++i) {
		if(i == n*m - 1) {
			fprintf(pSalida, "%f", g[i]);
		} else {
			fprintf(pSalida, "%f ", g[i]);
		}
	}
	fprintf(pSalida, "\n");
	for (int i = 0; i < n*m; ++i) {
		if(i == n*m - 1) {
			fprintf(pSalida, "%f", b[i]);
		} else {
			fprintf(pSalida, "%f ", b[i]);
		}
	}
	
	delete r;
	delete g;
	delete b;
	//cin.get();
	return 0;
}
	.file	"tmpxft_0025409b_00000000-6_invertir_colores_gpu.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3770:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3770:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z14CambiarColoresPfS_S_
	.type	_Z14CambiarColoresPfS_S_, @function
_Z14CambiarColoresPfS_S_:
.LFB3766:
	.cfi_startproc
	endbr64
	movss	.LC0(%rip), %xmm0
	movaps	%xmm0, %xmm1
	subss	(%rdi), %xmm1
	movss	%xmm1, (%rdi)
	movaps	%xmm0, %xmm1
	subss	(%rsi), %xmm1
	movss	%xmm1, (%rsi)
	subss	(%rdx), %xmm0
	movss	%xmm0, (%rdx)
	ret
	.cfi_endproc
.LFE3766:
	.size	_Z14CambiarColoresPfS_S_, .-_Z14CambiarColoresPfS_S_
	.globl	_Z30__device_stub__Z6kernelPfS_S_iPfS_S_i
	.type	_Z30__device_stub__Z6kernelPfS_S_iPfS_S_i, @function
_Z30__device_stub__Z6kernelPfS_S_iPfS_S_i:
.LFB3792:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6kernelPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L3:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3792:
	.size	_Z30__device_stub__Z6kernelPfS_S_iPfS_S_i, .-_Z30__device_stub__Z6kernelPfS_S_iPfS_S_i
	.globl	_Z6kernelPfS_S_i
	.type	_Z6kernelPfS_S_i, @function
_Z6kernelPfS_S_i:
.LFB3793:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6kernelPfS_S_iPfS_S_i
	.cfi_endproc
.LFE3793:
	.size	_Z6kernelPfS_S_i, .-_Z6kernelPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"r"
.LC2:
	.string	"img.txt"
.LC3:
	.string	"%d %d"
.LC5:
	.string	"%f"
.LC6:
	.string	"Tiempo GPU: "
.LC7:
	.string	" [ms]"
.LC8:
	.string	"w"
.LC9:
	.string	"img_salida.txt"
.LC10:
	.string	"%d %d\n"
.LC11:
	.string	"%f "
.LC12:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3767:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC1(%rip), %rsi
	leaq	.LC2(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movabsq	$2305843009213693950, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	leaq	16(%rsp), %rcx
	leaq	20(%rsp), %rdx
	movq	%rax, %rdi
	leaq	.LC3(%rip), %rsi
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movl	16(%rsp), %ebp
	movslq	20(%rsp), %r12
	cvtsi2ssl	%ebp, %xmm0
	cvtsi2ssl	%r12d, %xmm1
	mulss	%xmm1, %xmm0
	mulss	.LC4(%rip), %xmm0
	call	ceilf@PLT
	movslq	%ebp, %rsi
	leaq	24(%rsp), %rdi
	imulq	%r12, %rsi
	cvttss2sil	%xmm0, %r13d
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	16(%rsp), %rsi
	movslq	20(%rsp), %rax
	leaq	32(%rsp), %rdi
	imulq	%rax, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	16(%rsp), %rsi
	movslq	20(%rsp), %rax
	leaq	40(%rsp), %rdi
	imulq	%rax, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	16(%rsp), %edi
	imull	20(%rsp), %edi
	movslq	%edi, %rdi
	cmpq	%rdi, %r14
	jb	.L10
	salq	$2, %rdi
	call	_Znam@PLT
	movl	16(%rsp), %edi
	imull	20(%rsp), %edi
	movq	%rax, %r12
	movslq	%edi, %rdi
	cmpq	%rdi, %r14
	jnb	.L11
.L10:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L37
	call	__cxa_throw_bad_array_new_length@PLT
.L11:
	salq	$2, %rdi
	call	_Znam@PLT
	movl	16(%rsp), %edi
	imull	20(%rsp), %edi
	movq	%rax, %rbp
	movslq	%edi, %rdi
	cmpq	%rdi, %r14
	jb	.L10
	salq	$2, %rdi
	movq	%r12, %r15
	xorl	%ebx, %ebx
	call	_Znam@PLT
	movq	%rax, %r14
.L13:
	movl	16(%rsp), %eax
	imull	20(%rsp), %eax
	cmpl	%ebx, %eax
	jle	.L38
	movq	8(%rsp), %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	incl	%ebx
	leaq	.LC5(%rip), %rsi
	addq	$4, %r15
	call	__isoc23_fscanf@PLT
	jmp	.L13
.L38:
	movq	%rbp, %r15
	xorl	%ebx, %ebx
.L15:
	movl	16(%rsp), %eax
	imull	20(%rsp), %eax
	cmpl	%ebx, %eax
	jle	.L39
	movq	8(%rsp), %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	incl	%ebx
	leaq	.LC5(%rip), %rsi
	addq	$4, %r15
	call	__isoc23_fscanf@PLT
	jmp	.L15
.L39:
	movq	%r14, %r15
	xorl	%ebx, %ebx
.L17:
	movl	16(%rsp), %eax
	imull	20(%rsp), %eax
	cmpl	%ebx, %eax
	jle	.L40
	movq	8(%rsp), %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	incl	%ebx
	leaq	.LC5(%rip), %rsi
	addq	$4, %r15
	call	__isoc23_fscanf@PLT
	jmp	.L17
.L40:
	movq	8(%rsp), %rdi
	call	fclose@PLT
	movslq	16(%rsp), %rdx
	movslq	20(%rsp), %rax
	movq	%r12, %rsi
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	imulq	%rax, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	16(%rsp), %rdx
	movslq	20(%rsp), %rax
	movq	%rbp, %rsi
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	imulq	%rax, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	16(%rsp), %rdx
	movslq	20(%rsp), %rax
	movq	%r14, %rsi
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	imulq	%rax, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	leaq	48(%rsp), %rdi
	movl	16(%rsp), %ebx
	movl	20(%rsp), %r15d
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%r13d, 64(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$16777217, %edx
	movl	$1, %ecx
	movl	$1, 84(%rsp)
	movq	%rax, 68(%rsp)
	movq	64(%rsp), %rdi
	salq	$8, %rdx
	movl	72(%rsp), %esi
	movq	%rdx, 76(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movl	%ebx, %ecx
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	imull	%r15d, %ecx
	movq	24(%rsp), %rdi
	call	_Z30__device_stub__Z6kernelPfS_S_iPfS_S_i
.L19:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	xorl	%r15d, %r15d
	leaq	.LC11(%rip), %r13
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	76(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	76(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movslq	16(%rsp), %rdx
	movslq	20(%rsp), %rax
	movq	%r12, %rdi
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	imulq	%rax, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	16(%rsp), %rdx
	movslq	20(%rsp), %rax
	movq	%rbp, %rdi
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	imulq	%rax, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	16(%rsp), %rdx
	movslq	20(%rsp), %rax
	movq	%r14, %rdi
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	imulq	%rax, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC8(%rip), %rsi
	leaq	.LC9(%rip), %rdi
	call	fopen@PLT
	movl	16(%rsp), %r8d
	movl	20(%rsp), %ecx
	leaq	.LC10(%rip), %rdx
	movq	%rax, 8(%rsp)
	movq	%rax, %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L20:
	movl	16(%rsp), %eax
	imull	20(%rsp), %eax
	cmpl	%r15d, %eax
	jle	.L41
	decl	%eax
	leaq	.LC5(%rip), %rdx
	cvtss2sd	(%r12,%r15,4), %xmm0
	cmpl	%r15d, %eax
	je	.L34
	movq	%r13, %rdx
.L34:
	movq	8(%rsp), %rdi
	movl	$2, %esi
	movb	$1, %al
	incq	%r15
	call	__fprintf_chk@PLT
	jmp	.L20
.L41:
	movq	8(%rsp), %rdi
	leaq	.LC12(%rip), %r13
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	movq	%r13, %rdx
	movl	$2, %esi
	leaq	.LC11(%rip), %r15
	call	__fprintf_chk@PLT
.L24:
	movl	16(%rsp), %eax
	imull	20(%rsp), %eax
	cmpl	%ebx, %eax
	jle	.L42
	decl	%eax
	leaq	.LC5(%rip), %rdx
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	cmpl	%ebx, %eax
	je	.L35
	movq	%r15, %rdx
.L35:
	movq	8(%rsp), %rdi
	movl	$2, %esi
	movb	$1, %al
	incq	%rbx
	call	__fprintf_chk@PLT
	jmp	.L24
.L42:
	movq	8(%rsp), %rdi
	movq	%r13, %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	xorl	%r15d, %r15d
	leaq	.LC11(%rip), %r13
	call	__fprintf_chk@PLT
.L28:
	movl	16(%rsp), %eax
	imull	20(%rsp), %eax
	cmpl	%r15d, %eax
	jle	.L43
	decl	%eax
	leaq	.LC5(%rip), %rdx
	cvtss2sd	(%r14,%r15,4), %xmm0
	cmpl	%r15d, %eax
	je	.L36
	movq	%r13, %rdx
.L36:
	movq	8(%rsp), %rdi
	movl	$2, %esi
	movb	$1, %al
	incq	%r15
	call	__fprintf_chk@PLT
	jmp	.L28
.L43:
	movl	$4, %esi
	movq	%r12, %rdi
	call	_ZdlPvm@PLT
	movl	$4, %esi
	movq	%rbp, %rdi
	call	_ZdlPvm@PLT
	movl	$4, %esi
	movq	%r14, %rdi
	call	_ZdlPvm@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
.L37:
	call	__stack_chk_fail@PLT
.L32:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3767:
	.size	main, .-main
	.section	.rodata.str1.1
.LC13:
	.string	"_Z6kernelPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3795:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3795:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.align 4
.LC4:
	.long	998244352
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<iostream>
#include <fstream>
#include <string>
#include <stdio.h>
#include <stdlib.h>
using namespace std;

__global__ void kernel( float* r_gpu,  float* g_gpu,   float* b_gpu, int N) {
	
	int tId = threadIdx.x + blockIdx.x * blockDim.x;
	if(tId < N) {
		r_gpu[tId] = 1 - r_gpu[tId];
		g_gpu[tId] = 1 - g_gpu[tId];
		b_gpu[tId] = 1 - b_gpu[tId];
	}
}



void CambiarColores(float* r, float* g, float* b) {
	//cout << *r << "|" << 1-*r << endl;
	*r = 1 - *r;
	*g = 1 - *g;
	*b = 1 - *b;
}


int main(int argc, char const *argv[]) {
	FILE * pFile;
	int n, m;
	float* r, *g, *b; 



	pFile = fopen ("img.txt","r");
	fscanf(pFile, "%d %d", &m, &n);


	int block_size = 256;
	int grid_size = (int) ceil((float) n*m / block_size);


	float* r_gpu, *g_gpu, *b_gpu;

	hipMalloc(&r_gpu, sizeof(float) * n * m);
	hipMalloc(&g_gpu, sizeof(float) * n * m);
	hipMalloc(&b_gpu, sizeof(float) * n * m);

	r = new float[n*m];
	g = new float[n*m];
	b = new float[n*m];

	for (int i = 0; i < n*m; ++i) {
		fscanf (pFile, "%f", &r[i]);
	}

	for (int i = 0; i < n*m; ++i) {
		fscanf (pFile, "%f", &g[i]);
	}

	for (int i = 0; i < n*m; ++i) {
		fscanf (pFile, "%f", &b[i]);
	}

	fclose (pFile);

	hipMemcpy(r_gpu, r, sizeof(float) * n * m, hipMemcpyHostToDevice);
	hipMemcpy(g_gpu, g, sizeof(float) * n * m, hipMemcpyHostToDevice);
	hipMemcpy(b_gpu, b, sizeof(float) * n * m, hipMemcpyHostToDevice);

	int tamanio = n * m;

	hipEvent_t ct1, ct2;
	float dt;
	hipEventCreate(&ct1);
	hipEventCreate(&ct2);
	hipEventRecord(ct1);

	kernel<<<grid_size, block_size>>>(r_gpu, g_gpu, b_gpu, tamanio);

	hipEventRecord(ct2);
	hipEventSynchronize(ct2);
	hipEventElapsedTime(&dt, ct1, ct2);

	cout << "Tiempo GPU: " << dt << " [ms]" << endl; 

	hipMemcpy(r, r_gpu, sizeof(float) * n * m, hipMemcpyDeviceToHost);
	hipMemcpy(g, g_gpu, sizeof(float) * n * m, hipMemcpyDeviceToHost);
	hipMemcpy(b, b_gpu, sizeof(float) * n * m, hipMemcpyDeviceToHost);


	hipFree(r_gpu);
	hipFree(g_gpu);
	hipFree(b_gpu);






	FILE * pSalida;
	pSalida = fopen ("img_salida.txt","w");
	fprintf(pSalida, "%d %d\n", m, n);
	for (int i = 0; i < n*m; ++i) {
		if(i == n*m - 1) {
			fprintf(pSalida, "%f", r[i]);
		} else {
			fprintf(pSalida, "%f ", r[i]);
		}
		
	}
	fprintf(pSalida, "\n");
	for (int i = 0; i < n*m; ++i) {
		if(i == n*m - 1) {
			fprintf(pSalida, "%f", g[i]);
		} else {
			fprintf(pSalida, "%f ", g[i]);
		}
	}
	fprintf(pSalida, "\n");
	for (int i = 0; i < n*m; ++i) {
		if(i == n*m - 1) {
			fprintf(pSalida, "%f", b[i]);
		} else {
			fprintf(pSalida, "%f ", b[i]);
		}
	}
	
	delete r;
	delete g;
	delete b;
	//cin.get();
	return 0;
}
	.text
	.file	"invertir_colores_gpu.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__kernelPfS_S_i # -- Begin function _Z21__device_stub__kernelPfS_S_i
	.type	_Z21__device_stub__kernelPfS_S_i,@function
_Z21__device_stub__kernelPfS_S_i:       # @_Z21__device_stub__kernelPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__kernelPfS_S_i, .Lfunc_end0-_Z21__device_stub__kernelPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z14CambiarColoresPfS_S_
.LCPI1_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	_Z14CambiarColoresPfS_S_
	.type	_Z14CambiarColoresPfS_S_,@function
_Z14CambiarColoresPfS_S_:               # @_Z14CambiarColoresPfS_S_
	.cfi_startproc
# %bb.0:
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movaps	%xmm0, %xmm1
	subss	(%rdi), %xmm1
	movss	%xmm1, (%rdi)
	movaps	%xmm0, %xmm1
	subss	(%rsi), %xmm1
	movss	%xmm1, (%rsi)
	subss	(%rdx), %xmm0
	movss	%xmm0, (%rdx)
	retq
.Lfunc_end1:
	.size	_Z14CambiarColoresPfS_S_, .Lfunc_end1-_Z14CambiarColoresPfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x3b800000                      # float 0.00390625
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %r12
	leaq	12(%rsp), %rbx
	leaq	16(%rsp), %r14
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	movq	%rbx, %rdx
	movq	%r14, %rcx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movslq	(%r14), %r15
	cvtsi2ss	%r15d, %xmm1
	movslq	(%rbx), %r13
	cvtsi2ss	%r13d, %xmm0
	mulss	%xmm1, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	callq	ceilf@PLT
	movss	%xmm0, 20(%rsp)                 # 4-byte Spill
	imulq	%r13, %r15
	shlq	$2, %r15
	leaq	40(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movslq	(%r14), %rax
	movslq	(%rbx), %rsi
	imulq	%rax, %rsi
	shlq	$2, %rsi
	leaq	32(%rsp), %rdi
	callq	hipMalloc
	movslq	(%r14), %rax
	movslq	(%rbx), %rsi
	imulq	%rax, %rsi
	shlq	$2, %rsi
	leaq	24(%rsp), %rdi
	callq	hipMalloc
	movslq	(%r14), %rax
	movslq	(%rbx), %r13
	imulq	%rax, %r13
	movq	%r13, %rax
	shlq	$2, %rax
	testl	%r13d, %r13d
	movq	$-1, %r15
	cmovnsq	%rax, %r15
	movq	%r15, %rdi
	callq	_Znam
	movq	%rax, %rbx
	movq	%r15, %rdi
	callq	_Znam
	movq	%rax, %r14
	movq	%r15, %rdi
	callq	_Znam
	movq	%rax, %r15
	cvttss2si	20(%rsp), %eax          # 4-byte Folded Reload
	movl	%eax, 20(%rsp)                  # 4-byte Spill
	testl	%r13d, %r13d
	jle	.LBB2_9
# %bb.1:                                # %.lr.ph.preheader
	movq	%rbx, %r13
	xorl	%ebp, %ebp
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.3, %esi
	movq	%r12, %rdi
	movq	%r13, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%rbp
	movslq	16(%rsp), %rcx
	movslq	12(%rsp), %rax
	imulq	%rcx, %rax
	addq	$4, %r13
	cmpq	%rax, %rbp
	jl	.LBB2_2
# %bb.3:                                # %.preheader73
	testl	%eax, %eax
	jle	.LBB2_9
# %bb.4:                                # %.lr.ph76.preheader
	movq	%r14, %r13
	xorl	%ebp, %ebp
.LBB2_5:                                # %.lr.ph76
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.3, %esi
	movq	%r12, %rdi
	movq	%r13, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%rbp
	movslq	16(%rsp), %rcx
	movslq	12(%rsp), %rax
	imulq	%rcx, %rax
	addq	$4, %r13
	cmpq	%rax, %rbp
	jl	.LBB2_5
# %bb.6:                                # %.preheader
	testl	%eax, %eax
	jle	.LBB2_9
# %bb.7:                                # %.lr.ph78.preheader
	movq	%r15, %r13
	xorl	%ebp, %ebp
.LBB2_8:                                # %.lr.ph78
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.3, %esi
	movq	%r12, %rdi
	movq	%r13, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%rbp
	movslq	16(%rsp), %rax
	movslq	12(%rsp), %rcx
	imulq	%rax, %rcx
	addq	$4, %r13
	cmpq	%rcx, %rbp
	jl	.LBB2_8
.LBB2_9:                                # %._crit_edge
	movq	%r12, %rdi
	callq	fclose
	movq	40(%rsp), %rdi
	movslq	16(%rsp), %rax
	movslq	12(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	movslq	16(%rsp), %rax
	movslq	12(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movslq	16(%rsp), %rax
	movslq	12(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	16(%rsp), %r13d
	movl	12(%rsp), %ebp
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	48(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	20(%rsp), %edi                  # 4-byte Reload
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_11
# %bb.10:
	imull	%r13d, %ebp
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	%ebp, %ecx
	callq	_Z21__device_stub__kernelPfS_S_i
.LBB2_11:
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	48(%rsp), %rdi
	callq	hipEventSynchronize
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdx
	leaq	68(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	(%r12), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.5, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	40(%rsp), %rsi
	movslq	16(%rsp), %rax
	movslq	12(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rsi
	movslq	16(%rsp), %rax
	movslq	12(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movslq	16(%rsp), %rax
	movslq	12(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.6, %edi
	movl	$.L.str.7, %esi
	callq	fopen
	movq	%rax, %r12
	movl	12(%rsp), %edx
	movl	16(%rsp), %ecx
	movl	$.L.str.8, %esi
	movq	%rax, %rdi
	xorl	%eax, %eax
	callq	fprintf
	movl	12(%rsp), %eax
	imull	16(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB2_16
# %bb.12:                               # %.lr.ph81.preheader
	xorl	%r13d, %r13d
.LBB2_13:                               # %.lr.ph81
                                        # =>This Inner Loop Header: Depth=1
	decl	%eax
	movl	$.L.str.3, %esi
	cmpq	%rax, %r13
	je	.LBB2_15
# %bb.14:                               # %.lr.ph81
                                        #   in Loop: Header=BB2_13 Depth=1
	movl	$.L.str.9, %esi
.LBB2_15:                               # %.lr.ph81
                                        #   in Loop: Header=BB2_13 Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r13,4), %xmm0
	movq	%r12, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%r13
	movslq	16(%rsp), %rcx
	movslq	12(%rsp), %rax
	imulq	%rcx, %rax
	cmpq	%rax, %r13
	jl	.LBB2_13
.LBB2_16:                               # %._crit_edge82
	movl	$10, %edi
	movq	%r12, %rsi
	callq	fputc@PLT
	movl	12(%rsp), %eax
	imull	16(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB2_21
# %bb.17:                               # %.lr.ph85.preheader
	xorl	%r13d, %r13d
.LBB2_18:                               # %.lr.ph85
                                        # =>This Inner Loop Header: Depth=1
	decl	%eax
	movl	$.L.str.3, %esi
	cmpq	%rax, %r13
	je	.LBB2_20
# %bb.19:                               # %.lr.ph85
                                        #   in Loop: Header=BB2_18 Depth=1
	movl	$.L.str.9, %esi
.LBB2_20:                               # %.lr.ph85
                                        #   in Loop: Header=BB2_18 Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r13,4), %xmm0
	movq	%r12, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%r13
	movslq	16(%rsp), %rcx
	movslq	12(%rsp), %rax
	imulq	%rcx, %rax
	cmpq	%rax, %r13
	jl	.LBB2_18
.LBB2_21:                               # %._crit_edge86
	movl	$10, %edi
	movq	%r12, %rsi
	callq	fputc@PLT
	movl	12(%rsp), %eax
	imull	16(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB2_26
# %bb.22:                               # %.lr.ph89.preheader
	xorl	%r13d, %r13d
.LBB2_23:                               # %.lr.ph89
                                        # =>This Inner Loop Header: Depth=1
	decl	%eax
	movl	$.L.str.3, %esi
	cmpq	%rax, %r13
	je	.LBB2_25
# %bb.24:                               # %.lr.ph89
                                        #   in Loop: Header=BB2_23 Depth=1
	movl	$.L.str.9, %esi
.LBB2_25:                               # %.lr.ph89
                                        #   in Loop: Header=BB2_23 Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%r13,4), %xmm0
	movq	%r12, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%r13
	movslq	16(%rsp), %rcx
	movslq	12(%rsp), %rax
	imulq	%rcx, %rax
	cmpq	%rax, %r13
	jl	.LBB2_23
.LBB2_26:                               # %._crit_edge90
	movq	%rbx, %rdi
	callq	_ZdlPv
	movq	%r14, %rdi
	callq	_ZdlPv
	movq	%r15, %rdi
	callq	_ZdlPv
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6kernelPfS_S_i,@object        # @_Z6kernelPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelPfS_S_i
	.p2align	3, 0x0
_Z6kernelPfS_S_i:
	.quad	_Z21__device_stub__kernelPfS_S_i
	.size	_Z6kernelPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"img.txt"
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"r"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%d %d"
	.size	.L.str.2, 6

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%f"
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Tiempo GPU: "
	.size	.L.str.4, 13

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	" [ms]"
	.size	.L.str.5, 6

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"img_salida.txt"
	.size	.L.str.6, 15

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"w"
	.size	.L.str.7, 2

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"%d %d\n"
	.size	.L.str.8, 7

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"%f "
	.size	.L.str.9, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelPfS_S_i"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6kernelPfS_S_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6kernelPfS_S_i        ; -- Begin function _Z6kernelPfS_S_i
	.globl	_Z6kernelPfS_S_i
	.p2align	8
	.type	_Z6kernelPfS_S_i,@function
_Z6kernelPfS_S_i:                       ; @_Z6kernelPfS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v4, v[2:3], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v6, 1.0, v4
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[2:3], v6, off
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, 1.0, v2
	global_store_b32 v[4:5], v2, off
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, 1.0, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6kernelPfS_S_i, .Lfunc_end0-_Z6kernelPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 220
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
