/*
A small code to test the blelloch and Hillis algrithm
Blelloch can only perform on size = 2^d array; thus a artitary array with size N should seperate into 2 arrary ->
one is 2^d(cloest to N for maximum efficiency) with Blelloch sum and another is N-2^n by using Hillis 
*/

#include<iostream>
#include <cstdlib> 
#include <cmath> 
using namespace std;
int threads = 512;
int N=1536*17;
void exclusive_cpu(double* reference,double* host)
{
	for(int i=0;i<N;i++)
	{
		for(int ii=i-1;ii>=0;ii--)
		{
			reference[i]+=host[ii];
		}
	}
}

void generate_rand(double* h)
{
	for(int i = 0;i<N;i++){
		srand (i);
		h[i]=(double(rand())/RAND_MAX-0.5)*1000;
	}
	
}
__global__ void Belloch_sum_up(double* x, int i,int Nb)
{
	int idx = threadIdx.x+blockIdx.x*blockDim.x;
	int offset = 1<<i;
	if(idx>=Nb)return;
	if(idx%offset==offset-1&&idx>=offset/2)
	{
		x[idx]+=x[idx-(offset/2)];
	}
}
__global__ void Belloch_sum_down(double* x, int i,int Nb,int d)
{
	int idx = threadIdx.x+blockIdx.x*blockDim.x;
	if(idx>=Nb)return;
	int offset = 1<<i;
	if(idx%offset==offset-1&&idx>=offset/2)//idx%(offset)==0
	{
		double temp=x[idx];
		x[idx]+=x[idx-offset/2];
		x[idx-offset/2]=temp;
	}
}

__global__ void Hillis_sum(double* x,double* t, int i,int Nh)
{
	int idx = threadIdx.x+blockIdx.x*blockDim.x;
	if(idx>=Nh)return;
	if(idx>=i)t[idx]=x[idx]+x[idx-i];
	else t[idx]=x[idx];
	
}
__global__ void shift_offset (double*a,double b,int Nh)
{
	int idx = threadIdx.x+blockIdx.x*blockDim.x;
	if(idx>=Nh)return;
	a[idx]+=b;
}
int main (void)
{
	cudaDeviceReset();
	cudaSetDevice(0);
	int d = int(log2(double(N)));//d
	int Nb = 1<<d;//blelloch size, 2^d
	int bs = (Nb+threads-1)/threads;
	//cout<<"Nb="<<Nb<<endl;
	double host[N];
	double reference[N];
	double result_h[N];
	double *Belloch;
	generate_rand(host);
	memset(reference,0,sizeof(double)*N); 
	exclusive_cpu(reference,host);
	
	/*Blelloch part*/	
	cudaMalloc((void**)&Belloch,sizeof(double)*Nb); 
	cudaMemcpy(Belloch,host,sizeof(double)*Nb,cudaMemcpyHostToDevice);
	for(int i=1;i<=d;i++){Belloch_sum_up<<<bs,threads>>>(Belloch,i,Nb);}
	cudaMemset(&Belloch[Nb-1],0,sizeof(double));
	for(int i=d;i>=1;i--){Belloch_sum_down<<<bs,threads>>>(Belloch,i,Nb,d);}
	/**/
	
	/*Hillis part*/	
	if(Nb!=N)
	{
		int Nh = N-Nb;//Hillis size
		double offset=0;//offset of Hillis = sum of belloch part;
		cudaMemcpy(&offset,&Belloch[Nb-1],sizeof(double),cudaMemcpyDeviceToHost);
		double *Hillis,*temp;
		cudaMalloc((void**)&Hillis,sizeof(double)*Nh); 
		cudaMalloc((void**)&temp,sizeof(double)*Nh); 
		cudaMemcpy(Hillis,&host[Nb-1],sizeof(double)*Nh,cudaMemcpyHostToDevice);
		for(int i=1;i<Nh;i*=2)
		{
			Hillis_sum<<<bs,threads>>>(Hillis,temp,i,Nh);
			cudaMemcpy(Hillis,temp,sizeof(double)*Nh,cudaMemcpyDeviceToDevice);
		}
		shift_offset<<<bs,threads>>>(Hillis,offset,Nh);	
		cudaMemcpy(&result_h[Nb],Hillis,sizeof(double)*Nh,cudaMemcpyDeviceToHost);
		cudaFree(Hillis);
		cudaFree(temp);
	}
	cudaMemcpy(result_h,Belloch,sizeof(double)*Nb,cudaMemcpyDeviceToHost);
	double diff = 0;
	
	for(int i=0;i<N;i++)diff+=(result_h[i]-reference[i])*(result_h[i]-reference[i]);
	cout<<"N\t="<<N<<"\tstd divation\t=\t"<<sqrt(diff)/N<<endl;
	cudaFree(Belloch);
	
}

	.file	"tmpxft_00237be7_00000000-6_Blelloch.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z13exclusive_cpuPdS_
	.type	_Z13exclusive_cpuPdS_, @function
_Z13exclusive_cpuPdS_:
.LFB3635:
	.cfi_startproc
	endbr64
	movl	N(%rip), %ecx
	orq	$-1, %rax
.L3:
	leal	1(%rax), %edx
	cmpl	%edx, %ecx
	jle	.L8
	movq	%rax, %rdx
.L5:
	cmpl	$-1, %edx
	je	.L9
	movsd	8(%rdi,%rax,8), %xmm0
	addsd	(%rsi,%rdx,8), %xmm0
	decq	%rdx
	movsd	%xmm0, 8(%rdi,%rax,8)
	jmp	.L5
.L9:
	incq	%rax
	jmp	.L3
.L8:
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z13exclusive_cpuPdS_, .-_Z13exclusive_cpuPdS_
	.globl	_Z13generate_randPd
	.type	_Z13generate_randPd, @function
_Z13generate_randPd:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 32
.L11:
	cmpl	%ebx, N(%rip)
	jle	.L14
	movl	%ebx, %edi
	call	srand@PLT
	call	rand@PLT
	cvtsi2sdl	%eax, %xmm0
	divsd	.LC0(%rip), %xmm0
	subsd	.LC1(%rip), %xmm0
	mulsd	.LC2(%rip), %xmm0
	movsd	%xmm0, 0(%rbp,%rbx,8)
	incq	%rbx
	jmp	.L11
.L14:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z13generate_randPd, .-_Z13generate_randPd
	.globl	_Z36__device_stub__Z14Belloch_sum_upPdiiPdii
	.type	_Z36__device_stub__Z14Belloch_sum_upPdiiPdii, @function
_Z36__device_stub__Z14Belloch_sum_upPdiiPdii:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14Belloch_sum_upPdii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L15:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z36__device_stub__Z14Belloch_sum_upPdiiPdii, .-_Z36__device_stub__Z14Belloch_sum_upPdiiPdii
	.globl	_Z14Belloch_sum_upPdii
	.type	_Z14Belloch_sum_upPdii, @function
_Z14Belloch_sum_upPdii:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z14Belloch_sum_upPdiiPdii
	.cfi_endproc
.LFE3663:
	.size	_Z14Belloch_sum_upPdii, .-_Z14Belloch_sum_upPdii
	.globl	_Z39__device_stub__Z16Belloch_sum_downPdiiiPdiii
	.type	_Z39__device_stub__Z16Belloch_sum_downPdiiiPdiii, @function
_Z39__device_stub__Z16Belloch_sum_downPdiiiPdiii:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16Belloch_sum_downPdiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L20:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z39__device_stub__Z16Belloch_sum_downPdiiiPdiii, .-_Z39__device_stub__Z16Belloch_sum_downPdiiiPdiii
	.globl	_Z16Belloch_sum_downPdiii
	.type	_Z16Belloch_sum_downPdiii, @function
_Z16Belloch_sum_downPdiii:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16Belloch_sum_downPdiiiPdiii
	.cfi_endproc
.LFE3665:
	.size	_Z16Belloch_sum_downPdiii, .-_Z16Belloch_sum_downPdiii
	.globl	_Z34__device_stub__Z10Hillis_sumPdS_iiPdS_ii
	.type	_Z34__device_stub__Z10Hillis_sumPdS_iiPdS_ii, @function
_Z34__device_stub__Z10Hillis_sumPdS_iiPdS_ii:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10Hillis_sumPdS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L25:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z34__device_stub__Z10Hillis_sumPdS_iiPdS_ii, .-_Z34__device_stub__Z10Hillis_sumPdS_iiPdS_ii
	.globl	_Z10Hillis_sumPdS_ii
	.type	_Z10Hillis_sumPdS_ii, @function
_Z10Hillis_sumPdS_ii:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z10Hillis_sumPdS_iiPdS_ii
	.cfi_endproc
.LFE3667:
	.size	_Z10Hillis_sumPdS_ii, .-_Z10Hillis_sumPdS_ii
	.globl	_Z34__device_stub__Z12shift_offsetPddiPddi
	.type	_Z34__device_stub__Z12shift_offsetPddiPddi, @function
_Z34__device_stub__Z12shift_offsetPddiPddi:
.LFB3668:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	32(%rsp), %rdx
	movl	%esi, 12(%rsp)
	leaq	48(%rsp), %rdi
	leaq	60(%rsp), %rsi
	movsd	%xmm0, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12shift_offsetPddi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L30:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3668:
	.size	_Z34__device_stub__Z12shift_offsetPddiPddi, .-_Z34__device_stub__Z12shift_offsetPddiPddi
	.globl	_Z12shift_offsetPddi
	.type	_Z12shift_offsetPddi, @function
_Z12shift_offsetPddi:
.LFB3669:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z12shift_offsetPddiPddi
	.cfi_endproc
.LFE3669:
	.size	_Z12shift_offsetPddi, .-_Z12shift_offsetPddi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"N\t="
.LC5:
	.string	"\tstd divation\t=\t"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movl	$1, %ebx
	subq	$120, %rsp
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	call	cudaDeviceReset@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movslq	N(%rip), %r13
	cvtsi2sdl	%r13d, %xmm0
	salq	$3, %r13
	call	log2@PLT
	cvttsd2sil	%xmm0, %eax
	movl	%eax, -124(%rbp)
	movb	-124(%rbp), %cl
	sall	%cl, %ebx
	movl	threads(%rip), %ecx
	leal	-1(%rcx,%rbx), %eax
	cltd
	idivl	%ecx
	movq	%rsp, %rcx
	movl	%eax, %r12d
	leaq	15(%r13), %rax
	movq	%rax, %rsi
	movq	%rax, %rdx
	andq	$-4096, %rsi
	andq	$-16, %rdx
	subq	%rsi, %rcx
.L36:
	cmpq	%rcx, %rsp
	je	.L37
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L36
.L37:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L38
	orq	$0, -8(%rsp,%rdx)
.L38:
	movq	%rax, %rsi
	movq	%rsp, -136(%rbp)
	movq	%rax, %rdx
	movq	%rsp, %rcx
	andq	$-4096, %rsi
	andq	$-16, %rdx
	subq	%rsi, %rcx
.L39:
	cmpq	%rcx, %rsp
	je	.L40
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L39
.L40:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L41
	orq	$0, -8(%rsp,%rdx)
.L41:
	movq	%rsp, -144(%rbp)
	movq	%rax, %rdx
	movq	%rsp, %rcx
	andq	$-4096, %rax
	andq	$-16, %rdx
	subq	%rax, %rcx
.L42:
	cmpq	%rcx, %rsp
	je	.L43
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L42
.L43:
	movq	%rdx, %rax
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L44
	orq	$0, -8(%rsp,%rax)
.L44:
	movq	-136(%rbp), %rdi
	movq	%rsp, -152(%rbp)
	movabsq	$4294967297, %r14
	call	_Z13generate_randPd
	movslq	N(%rip), %rdx
	movq	-144(%rbp), %rdi
	xorl	%esi, %esi
	movq	%r13, %rcx
	movl	$1, %r13d
	salq	$3, %rdx
	call	__memset_chk@PLT
	movq	-136(%rbp), %rsi
	movq	-144(%rbp), %rdi
	call	_Z13exclusive_cpuPdS_
	movslq	%ebx, %rax
	leaq	-112(%rbp), %rdi
	salq	$3, %rax
	movq	%rax, %rsi
	movq	%rax, -120(%rbp)
	call	cudaMalloc@PLT
	movq	-120(%rbp), %rdx
	movq	-112(%rbp), %rdi
	movl	$1, %ecx
	movq	-136(%rbp), %rsi
	call	cudaMemcpy@PLT
.L45:
	movl	-124(%rbp), %eax
	cmpl	%eax, %r13d
	jg	.L69
	movl	threads(%rip), %eax
	movq	%r14, -64(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, -76(%rbp)
	movl	-60(%rbp), %ecx
	movl	%eax, -68(%rbp)
	movl	-72(%rbp), %esi
	movl	%r12d, -80(%rbp)
	movq	-68(%rbp), %rdx
	movq	-80(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	-112(%rbp), %rdi
	movl	%ebx, %edx
	movl	%r13d, %esi
	call	_Z36__device_stub__Z14Belloch_sum_upPdiiPdii
.L46:
	incl	%r13d
	jmp	.L45
.L69:
	movq	-120(%rbp), %rax
	movq	-112(%rbp), %rdi
	movl	$8, %edx
	xorl	%esi, %esi
	movabsq	$4294967297, %r15
	leaq	-8(%rax), %r13
	addq	%r13, %rdi
	call	cudaMemset@PLT
	movl	-124(%rbp), %r14d
.L48:
	testl	%r14d, %r14d
	jle	.L70
	movl	threads(%rip), %eax
	movq	%r15, -64(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, -76(%rbp)
	movl	-60(%rbp), %ecx
	movl	%eax, -68(%rbp)
	movl	-72(%rbp), %esi
	movl	%r12d, -80(%rbp)
	movq	-68(%rbp), %rdx
	movq	-80(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	movl	-124(%rbp), %ecx
	movq	-112(%rbp), %rdi
	movl	%ebx, %edx
	movl	%r14d, %esi
	call	_Z39__device_stub__Z16Belloch_sum_downPdiiiPdiii
.L49:
	decl	%r14d
	jmp	.L48
.L70:
	movl	N(%rip), %r14d
	cmpl	%ebx, %r14d
	je	.L51
	movq	-112(%rbp), %rsi
	movl	$2, %ecx
	subl	%ebx, %r14d
	leaq	-104(%rbp), %rdi
	movl	$8, %edx
	movq	$0x000000000, -104(%rbp)
	decl	%ebx
	addq	%r13, %rsi
	movslq	%ebx, %rbx
	movabsq	$4294967297, %r13
	call	cudaMemcpy@PLT
	movslq	%r14d, %rax
	leaq	-96(%rbp), %rdi
	leaq	0(,%rax,8), %r15
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	leaq	-88(%rbp), %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	movq	-136(%rbp), %rax
	movq	-96(%rbp), %rdi
	movq	%r15, %rdx
	movl	$1, %ecx
	leaq	(%rax,%rbx,8), %rsi
	movl	$1, %ebx
	call	cudaMemcpy@PLT
.L52:
	movl	threads(%rip), %eax
	movl	%eax, -68(%rbp)
	cmpl	%r14d, %ebx
	jge	.L71
	movq	%r13, -64(%rbp)
	movl	-60(%rbp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, -76(%rbp)
	movq	-68(%rbp), %rdx
	movl	%r12d, -80(%rbp)
	movl	-72(%rbp), %esi
	movq	-80(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L53
	movq	-88(%rbp), %rsi
	movq	-96(%rbp), %rdi
	movl	%r14d, %ecx
	movl	%ebx, %edx
	call	_Z34__device_stub__Z10Hillis_sumPdS_iiPdS_ii
.L53:
	movq	-88(%rbp), %rsi
	movq	-96(%rbp), %rdi
	movl	$3, %ecx
	movq	%r15, %rdx
	addl	%ebx, %ebx
	call	cudaMemcpy@PLT
	jmp	.L52
.L71:
	movabsq	$4294967297, %rax
	movl	%r12d, -80(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, -64(%rbp)
	movl	-60(%rbp), %ecx
	movq	%rax, -76(%rbp)
	movq	-68(%rbp), %rdx
	movq	-80(%rbp), %rdi
	movl	-72(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	movsd	-104(%rbp), %xmm0
	movq	-96(%rbp), %rdi
	movl	%r14d, %esi
	call	_Z34__device_stub__Z12shift_offsetPddiPddi
.L55:
	movq	-120(%rbp), %rbx
	movq	-96(%rbp), %rsi
	movl	$2, %ecx
	movq	%r15, %rdx
	movq	-152(%rbp), %rax
	leaq	(%rax,%rbx), %rdi
	call	cudaMemcpy@PLT
	movq	-96(%rbp), %rdi
	call	cudaFree@PLT
	movq	-88(%rbp), %rdi
	call	cudaFree@PLT
.L51:
	movq	-120(%rbp), %rdx
	movq	-112(%rbp), %rsi
	movl	$2, %ecx
	movq	-152(%rbp), %rdi
	call	cudaMemcpy@PLT
	movl	N(%rip), %edx
	xorl	%eax, %eax
	xorps	%xmm1, %xmm1
.L56:
	cmpl	%eax, %edx
	jle	.L72
	movq	-152(%rbp), %rbx
	movsd	(%rbx,%rax,8), %xmm0
	movq	-144(%rbp), %rbx
	subsd	(%rbx,%rax,8), %xmm0
	incq	%rax
	mulsd	%xmm0, %xmm0
	addsd	%xmm0, %xmm1
	jmp	.L56
.L72:
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movsd	%xmm1, -120(%rbp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	N(%rip), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	-120(%rbp), %xmm1
	movq	%rax, %rbx
	movaps	%xmm1, %xmm0
	call	sqrt@PLT
	cvtsi2sdl	N(%rip), %xmm1
	movq	%rbx, %rdi
	divsd	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	-112(%rbp), %rdi
	call	cudaFree@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L58
	call	__stack_chk_fail@PLT
.L58:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z12shift_offsetPddi"
.LC7:
	.string	"_Z10Hillis_sumPdS_ii"
.LC8:
	.string	"_Z16Belloch_sum_downPdiii"
.LC9:
	.string	"_Z14Belloch_sum_upPdii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3671:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12shift_offsetPddi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10Hillis_sumPdS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16Belloch_sum_downPdiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14Belloch_sum_upPdii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3671:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	N
	.data
	.align 4
	.type	N, @object
	.size	N, 4
N:
	.long	26112
	.globl	threads
	.align 4
	.type	threads, @object
	.size	threads, 4
threads:
	.long	512
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-4194304
	.long	1105199103
	.align 8
.LC1:
	.long	0
	.long	1071644672
	.align 8
.LC2:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
A small code to test the blelloch and Hillis algrithm
Blelloch can only perform on size = 2^d array; thus a artitary array with size N should seperate into 2 arrary ->
one is 2^d(cloest to N for maximum efficiency) with Blelloch sum and another is N-2^n by using Hillis 
*/


#include <hip/hip_runtime.h>
#include<iostream>
#include <cstdlib> 
#include <cmath> 
using namespace std;
int threads = 512;
int N=1536*17;
void exclusive_cpu(double* reference,double* host)
{
	for(int i=0;i<N;i++)
	{
		for(int ii=i-1;ii>=0;ii--)
		{
			reference[i]+=host[ii];
		}
	}
}

void generate_rand(double* h)
{
	for(int i = 0;i<N;i++){
		srand (i);
		h[i]=(double(rand())/RAND_MAX-0.5)*1000;
	}
	
}
__global__ void Belloch_sum_up(double* x, int i,int Nb)
{
	int idx = threadIdx.x+blockIdx.x*blockDim.x;
	int offset = 1<<i;
	if(idx>=Nb)return;
	if(idx%offset==offset-1&&idx>=offset/2)
	{
		x[idx]+=x[idx-(offset/2)];
	}
}
__global__ void Belloch_sum_down(double* x, int i,int Nb,int d)
{
	int idx = threadIdx.x+blockIdx.x*blockDim.x;
	if(idx>=Nb)return;
	int offset = 1<<i;
	if(idx%offset==offset-1&&idx>=offset/2)//idx%(offset)==0
	{
		double temp=x[idx];
		x[idx]+=x[idx-offset/2];
		x[idx-offset/2]=temp;
	}
}

__global__ void Hillis_sum(double* x,double* t, int i,int Nh)
{
	int idx = threadIdx.x+blockIdx.x*blockDim.x;
	if(idx>=Nh)return;
	if(idx>=i)t[idx]=x[idx]+x[idx-i];
	else t[idx]=x[idx];
	
}
__global__ void shift_offset (double*a,double b,int Nh)
{
	int idx = threadIdx.x+blockIdx.x*blockDim.x;
	if(idx>=Nh)return;
	a[idx]+=b;
}
int main (void)
{
	hipDeviceReset();
	hipSetDevice(0);
	int d = int(log2(double(N)));//d
	int Nb = 1<<d;//blelloch size, 2^d
	int bs = (Nb+threads-1)/threads;
	//cout<<"Nb="<<Nb<<endl;
	double host[N];
	double reference[N];
	double result_h[N];
	double *Belloch;
	generate_rand(host);
	memset(reference,0,sizeof(double)*N); 
	exclusive_cpu(reference,host);
	
	/*Blelloch part*/	
	hipMalloc((void**)&Belloch,sizeof(double)*Nb); 
	hipMemcpy(Belloch,host,sizeof(double)*Nb,hipMemcpyHostToDevice);
	for(int i=1;i<=d;i++){Belloch_sum_up<<<bs,threads>>>(Belloch,i,Nb);}
	hipMemset(&Belloch[Nb-1],0,sizeof(double));
	for(int i=d;i>=1;i--){Belloch_sum_down<<<bs,threads>>>(Belloch,i,Nb,d);}
	/**/
	
	/*Hillis part*/	
	if(Nb!=N)
	{
		int Nh = N-Nb;//Hillis size
		double offset=0;//offset of Hillis = sum of belloch part;
		hipMemcpy(&offset,&Belloch[Nb-1],sizeof(double),hipMemcpyDeviceToHost);
		double *Hillis,*temp;
		hipMalloc((void**)&Hillis,sizeof(double)*Nh); 
		hipMalloc((void**)&temp,sizeof(double)*Nh); 
		hipMemcpy(Hillis,&host[Nb-1],sizeof(double)*Nh,hipMemcpyHostToDevice);
		for(int i=1;i<Nh;i*=2)
		{
			Hillis_sum<<<bs,threads>>>(Hillis,temp,i,Nh);
			hipMemcpy(Hillis,temp,sizeof(double)*Nh,hipMemcpyDeviceToDevice);
		}
		shift_offset<<<bs,threads>>>(Hillis,offset,Nh);	
		hipMemcpy(&result_h[Nb],Hillis,sizeof(double)*Nh,hipMemcpyDeviceToHost);
		hipFree(Hillis);
		hipFree(temp);
	}
	hipMemcpy(result_h,Belloch,sizeof(double)*Nb,hipMemcpyDeviceToHost);
	double diff = 0;
	
	for(int i=0;i<N;i++)diff+=(result_h[i]-reference[i])*(result_h[i]-reference[i]);
	cout<<"N\t="<<N<<"\tstd divation\t=\t"<<sqrt(diff)/N<<endl;
	hipFree(Belloch);
	
}

	.text
	.file	"Blelloch.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z13exclusive_cpuPdS_           # -- Begin function _Z13exclusive_cpuPdS_
	.type	_Z13exclusive_cpuPdS_,@function
_Z13exclusive_cpuPdS_:                  # @_Z13exclusive_cpuPdS_
	.cfi_startproc
# %bb.0:
	movl	N(%rip), %eax
	testl	%eax, %eax
	jle	.LBB0_6
# %bb.1:                                # %.preheader.preheader
	movl	$1, %ecx
	xorl	%edx, %edx
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	testq	%rdx, %rdx
	je	.LBB0_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB0_2 Depth=1
	movsd	(%rdi,%rdx,8), %xmm0            # xmm0 = mem[0],zero
	movq	%rcx, %r8
.LBB0_4:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	-2(%r8), %r9d
	addsd	(%rsi,%r9,8), %xmm0
	movsd	%xmm0, (%rdi,%rdx,8)
	decq	%r8
	cmpq	$1, %r8
	jg	.LBB0_4
.LBB0_5:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%rdx
	incq	%rcx
	cmpq	%rax, %rdx
	jne	.LBB0_2
.LBB0_6:                                # %._crit_edge11
	retq
.Lfunc_end0:
	.size	_Z13exclusive_cpuPdS_, .Lfunc_end0-_Z13exclusive_cpuPdS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z13generate_randPd
.LCPI1_0:
	.quad	0x41dfffffffc00000              # double 2147483647
.LCPI1_1:
	.quad	0xbfe0000000000000              # double -0.5
.LCPI1_2:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	_Z13generate_randPd
	.type	_Z13generate_randPd,@function
_Z13generate_randPd:                    # @_Z13generate_randPd
	.cfi_startproc
# %bb.0:
	cmpl	$0, N(%rip)
	jle	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%r14d, %edi
	callq	srand
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
	addsd	.LCPI1_1(%rip), %xmm0
	mulsd	.LCPI1_2(%rip), %xmm0
	movsd	%xmm0, (%rbx,%r14,8)
	incq	%r14
	movslq	N(%rip), %rax
	cmpq	%rax, %r14
	jl	.LBB1_2
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
.LBB1_4:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z13generate_randPd, .Lfunc_end1-_Z13generate_randPd
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__Belloch_sum_upPdii # -- Begin function _Z29__device_stub__Belloch_sum_upPdii
	.type	_Z29__device_stub__Belloch_sum_upPdii,@function
_Z29__device_stub__Belloch_sum_upPdii:  # @_Z29__device_stub__Belloch_sum_upPdii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14Belloch_sum_upPdii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z29__device_stub__Belloch_sum_upPdii, .Lfunc_end2-_Z29__device_stub__Belloch_sum_upPdii
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__Belloch_sum_downPdiii # -- Begin function _Z31__device_stub__Belloch_sum_downPdiii
	.type	_Z31__device_stub__Belloch_sum_downPdiii,@function
_Z31__device_stub__Belloch_sum_downPdiii: # @_Z31__device_stub__Belloch_sum_downPdiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16Belloch_sum_downPdiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z31__device_stub__Belloch_sum_downPdiii, .Lfunc_end3-_Z31__device_stub__Belloch_sum_downPdiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__Hillis_sumPdS_ii # -- Begin function _Z25__device_stub__Hillis_sumPdS_ii
	.type	_Z25__device_stub__Hillis_sumPdS_ii,@function
_Z25__device_stub__Hillis_sumPdS_ii:    # @_Z25__device_stub__Hillis_sumPdS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10Hillis_sumPdS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z25__device_stub__Hillis_sumPdS_ii, .Lfunc_end4-_Z25__device_stub__Hillis_sumPdS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__shift_offsetPddi # -- Begin function _Z27__device_stub__shift_offsetPddi
	.type	_Z27__device_stub__shift_offsetPddi,@function
_Z27__device_stub__shift_offsetPddi:    # @_Z27__device_stub__shift_offsetPddi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	12(%rsp), %rdx
	movl	%esi, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12shift_offsetPddi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z27__device_stub__shift_offsetPddi, .Lfunc_end5-_Z27__device_stub__shift_offsetPddi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI6_0:
	.quad	0x0000000000000000              # double 0
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$104, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	hipDeviceReset
	xorl	%edi, %edi
	callq	hipSetDevice
	cvtsi2sdl	N(%rip), %xmm0
	callq	log2
	cvttsd2si	%xmm0, %ecx
	movl	$1, %r15d
	movl	%ecx, -48(%rbp)                 # 4-byte Spill
                                        # kill: def $cl killed $cl killed $ecx
	shll	%cl, %r15d
	movl	threads(%rip), %ecx
	leal	(%r15,%rcx), %eax
	decl	%eax
	cltd
	idivl	%ecx
	movl	%eax, -72(%rbp)                 # 4-byte Spill
	movl	N(%rip), %eax
	movq	%rsp, %r12
	leaq	15(,%rax,8), %rax
	andq	$-16, %rax
	subq	%rax, %r12
	movq	%r12, %rsp
	movq	%rsp, %rbx
	subq	%rax, %rbx
	movq	%rbx, %rsp
	movq	%rsp, %rcx
	subq	%rax, %rcx
	movq	%rcx, -96(%rbp)                 # 8-byte Spill
	movq	%rcx, %rsp
	movq	%r12, %rdi
	callq	_Z13generate_randPd
	movslq	N(%rip), %r14
	leaq	(,%r14,8), %rdx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	testq	%r14, %r14
	jle	.LBB6_7
# %bb.1:                                # %.preheader.preheader.i
	movl	%r14d, %eax
	movl	$1, %ecx
	xorl	%edx, %edx
.LBB6_2:                                # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_4 Depth 2
	testq	%rdx, %rdx
	je	.LBB6_6
# %bb.3:                                # %.lr.ph.i
                                        #   in Loop: Header=BB6_2 Depth=1
	movsd	(%rbx,%rdx,8), %xmm0            # xmm0 = mem[0],zero
	movq	%rcx, %rsi
.LBB6_4:                                #   Parent Loop BB6_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	-2(%rsi), %edi
	addsd	(%r12,%rdi,8), %xmm0
	decq	%rsi
	cmpq	$1, %rsi
	jg	.LBB6_4
# %bb.5:                                # %._crit_edge.i.loopexit
                                        #   in Loop: Header=BB6_2 Depth=1
	movsd	%xmm0, (%rbx,%rdx,8)
.LBB6_6:                                # %._crit_edge.i
                                        #   in Loop: Header=BB6_2 Depth=1
	incq	%rdx
	incq	%rcx
	cmpq	%rax, %rdx
	jne	.LBB6_2
.LBB6_7:                                # %_Z13exclusive_cpuPdS_.exit
	leal	-1(%r15), %eax
	movl	%eax, -80(%rbp)                 # 4-byte Spill
	movq	%r15, -104(%rbp)                # 8-byte Spill
	movslq	%r15d, %rax
	movq	%rax, -120(%rbp)                # 8-byte Spill
	leaq	(,%rax,8), %r13
	leaq	-64(%rbp), %r14
	movq	%r14, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$1, %r15d
	movq	%r12, %rsi
	movq	%r13, -128(%rbp)                # 8-byte Spill
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	-72(%rbp), %eax                 # 4-byte Reload
	movq	%rax, -72(%rbp)                 # 8-byte Spill
	cmpl	$0, -48(%rbp)                   # 4-byte Folded Reload
	jle	.LBB6_12
# %bb.8:                                # %.lr.ph
	movq	-72(%rbp), %r14                 # 8-byte Reload
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %r14
	movl	-48(%rbp), %eax                 # 4-byte Reload
	movl	%eax, %r13d
	negl	%r13d
.LBB6_9:                                # =>This Inner Loop Header: Depth=1
	movl	threads(%rip), %edx
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdx
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_11
# %bb.10:                               #   in Loop: Header=BB6_9 Depth=1
	movq	-64(%rbp), %rdi
	movl	%r15d, %esi
	movq	-104(%rbp), %rdx                # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	callq	_Z29__device_stub__Belloch_sum_upPdii
.LBB6_11:                               #   in Loop: Header=BB6_9 Depth=1
	leal	(%r15,%r13), %eax
	incl	%eax
	movl	%r15d, %ecx
	incl	%ecx
	movl	%ecx, %r15d
	cmpl	$1, %eax
	jne	.LBB6_9
.LBB6_12:                               # %._crit_edge
	movslq	-80(%rbp), %rax                 # 4-byte Folded Reload
	movq	%rax, -80(%rbp)                 # 8-byte Spill
	leaq	(,%rax,8), %rax
	movq	-64(%rbp), %rdi
	movq	%rax, -112(%rbp)                # 8-byte Spill
	addq	%rax, %rdi
	movl	$8, %edx
	xorl	%esi, %esi
	callq	hipMemset
	cmpl	$0, -48(%rbp)                   # 4-byte Folded Reload
	movq	-104(%rbp), %r13                # 8-byte Reload
	jle	.LBB6_17
# %bb.13:                               # %.lr.ph98
	movq	-72(%rbp), %r14                 # 8-byte Reload
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %r14
	movl	-48(%rbp), %eax                 # 4-byte Reload
	movl	%eax, %r15d
.LBB6_14:                               # =>This Inner Loop Header: Depth=1
	movl	threads(%rip), %edx
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdx
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_16
# %bb.15:                               #   in Loop: Header=BB6_14 Depth=1
	movq	-64(%rbp), %rdi
	movl	%r15d, %esi
	movl	%r13d, %edx
	movl	-48(%rbp), %ecx                 # 4-byte Reload
	callq	_Z31__device_stub__Belloch_sum_downPdiii
.LBB6_16:                               #   in Loop: Header=BB6_14 Depth=1
	leal	-1(%r15), %eax
	cmpl	$1, %r15d
	movl	%eax, %r15d
	jg	.LBB6_14
.LBB6_17:                               # %._crit_edge99
	movl	N(%rip), %r15d
	subl	%r13d, %r15d
	je	.LBB6_22
# %bb.18:
	leaq	-136(%rbp), %rdi
	movq	$0, (%rdi)
	movq	-112(%rbp), %rsi                # 8-byte Reload
	addq	-64(%rbp), %rsi
	movl	$8, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movslq	%r15d, %r13
	leaq	(,%r13,8), %r14
	leaq	-56(%rbp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	-88(%rbp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	-56(%rbp), %rax
	movq	(%rax), %rdi
	movq	-80(%rbp), %rax                 # 8-byte Reload
	leaq	(%r12,%rax,8), %rsi
	movl	$1, %r12d
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967296, %rax               # imm = 0x100000000
	movq	-72(%rbp), %rcx                 # 8-byte Reload
	orq	%rax, %rcx
	cmpl	$2, %r13d
	movq	%rcx, %r13
	jl	.LBB6_19
.LBB6_27:                               # %.lr.ph102
                                        # =>This Inner Loop Header: Depth=1
	movl	threads(%rip), %edx
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdx
	movq	%r13, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_29
# %bb.28:                               #   in Loop: Header=BB6_27 Depth=1
	movq	-56(%rbp), %rdi
	movq	-88(%rbp), %rsi
	movl	%r12d, %edx
	movl	%r15d, %ecx
	callq	_Z25__device_stub__Hillis_sumPdS_ii
.LBB6_29:                               #   in Loop: Header=BB6_27 Depth=1
	movq	-56(%rbp), %rdi
	movq	-88(%rbp), %rsi
	movq	%r14, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	addl	%r12d, %r12d
	cmpl	%r15d, %r12d
	jl	.LBB6_27
.LBB6_19:                               # %._crit_edge103
	movl	threads(%rip), %edx
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdx
	movq	%r13, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_21
# %bb.20:
	movq	-56(%rbp), %rdi
	movsd	-136(%rbp), %xmm0               # xmm0 = mem[0],zero
	movl	%r15d, %esi
	callq	_Z27__device_stub__shift_offsetPddi
.LBB6_21:
	movq	-96(%rbp), %rax                 # 8-byte Reload
	movq	-120(%rbp), %rcx                # 8-byte Reload
	leaq	(%rax,%rcx,8), %rdi
	movq	-56(%rbp), %rsi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	-56(%rbp), %rdi
	callq	hipFree
	movq	-88(%rbp), %rdi
	callq	hipFree
.LBB6_22:
	movq	-64(%rbp), %rsi
	movq	-96(%rbp), %r14                 # 8-byte Reload
	movq	%r14, %rdi
	movq	-128(%rbp), %rdx                # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movl	N(%rip), %eax
	xorpd	%xmm1, %xmm1
	testl	%eax, %eax
	jle	.LBB6_25
# %bb.23:                               # %.lr.ph107.preheader
	xorl	%ecx, %ecx
.LBB6_24:                               # %.lr.ph107
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%r14,%rcx,8), %xmm0            # xmm0 = mem[0],zero
	subsd	(%rbx,%rcx,8), %xmm0
	mulsd	%xmm0, %xmm0
	addsd	%xmm0, %xmm1
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB6_24
.LBB6_25:                               # %._crit_edge108
	movsd	%xmm1, -48(%rbp)                # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$3, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	N(%rip), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$16, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	-48(%rbp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	ucomisd	.LCPI6_0(%rip), %xmm0
	jb	.LBB6_30
# %bb.26:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB6_31
.LBB6_30:                               # %call.sqrt
	callq	sqrt
.LBB6_31:                               # %._crit_edge108.split
	xorps	%xmm1, %xmm1
	cvtsi2sdl	N(%rip), %xmm1
	divsd	%xmm1, %xmm0
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	-64(%rbp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14Belloch_sum_upPdii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16Belloch_sum_downPdiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10Hillis_sumPdS_ii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12shift_offsetPddi, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	threads,@object                 # @threads
	.data
	.globl	threads
	.p2align	2, 0x0
threads:
	.long	512                             # 0x200
	.size	threads, 4

	.type	N,@object                       # @N
	.globl	N
	.p2align	2, 0x0
N:
	.long	26112                           # 0x6600
	.size	N, 4

	.type	_Z14Belloch_sum_upPdii,@object  # @_Z14Belloch_sum_upPdii
	.section	.rodata,"a",@progbits
	.globl	_Z14Belloch_sum_upPdii
	.p2align	3, 0x0
_Z14Belloch_sum_upPdii:
	.quad	_Z29__device_stub__Belloch_sum_upPdii
	.size	_Z14Belloch_sum_upPdii, 8

	.type	_Z16Belloch_sum_downPdiii,@object # @_Z16Belloch_sum_downPdiii
	.globl	_Z16Belloch_sum_downPdiii
	.p2align	3, 0x0
_Z16Belloch_sum_downPdiii:
	.quad	_Z31__device_stub__Belloch_sum_downPdiii
	.size	_Z16Belloch_sum_downPdiii, 8

	.type	_Z10Hillis_sumPdS_ii,@object    # @_Z10Hillis_sumPdS_ii
	.globl	_Z10Hillis_sumPdS_ii
	.p2align	3, 0x0
_Z10Hillis_sumPdS_ii:
	.quad	_Z25__device_stub__Hillis_sumPdS_ii
	.size	_Z10Hillis_sumPdS_ii, 8

	.type	_Z12shift_offsetPddi,@object    # @_Z12shift_offsetPddi
	.globl	_Z12shift_offsetPddi
	.p2align	3, 0x0
_Z12shift_offsetPddi:
	.quad	_Z27__device_stub__shift_offsetPddi
	.size	_Z12shift_offsetPddi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"N\t="
	.size	.L.str, 4

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\tstd divation\t=\t"
	.size	.L.str.1, 17

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14Belloch_sum_upPdii"
	.size	.L__unnamed_1, 23

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16Belloch_sum_downPdiii"
	.size	.L__unnamed_2, 26

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10Hillis_sumPdS_ii"
	.size	.L__unnamed_3, 21

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z12shift_offsetPddi"
	.size	.L__unnamed_4, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__Belloch_sum_upPdii
	.addrsig_sym _Z31__device_stub__Belloch_sum_downPdiii
	.addrsig_sym _Z25__device_stub__Hillis_sumPdS_ii
	.addrsig_sym _Z27__device_stub__shift_offsetPddi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14Belloch_sum_upPdii
	.addrsig_sym _Z16Belloch_sum_downPdiii
	.addrsig_sym _Z10Hillis_sumPdS_ii
	.addrsig_sym _Z12shift_offsetPddi
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14Belloch_sum_upPdii  ; -- Begin function _Z14Belloch_sum_upPdii
	.globl	_Z14Belloch_sum_upPdii
	.p2align	8
	.type	_Z14Belloch_sum_upPdii,@function
_Z14Belloch_sum_upPdii:                 ; @_Z14Belloch_sum_upPdii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_4
; %bb.1:
	s_lshl_b32 s3, 1, s2
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s4, s3, 31
	s_bfm_b32 s2, s2, 0
	s_add_i32 s5, s3, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v4, v1, v2
	s_xor_b32 s4, s5, s4
	v_cvt_f32_u32_e32 v0, s4
	s_sub_i32 s5, 0, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, s5, v0
	v_mul_hi_u32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v3
	v_xor_b32_e32 v3, v4, v2
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v0, s4
	v_sub_nc_u32_e32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s4, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s4, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v2
	v_sub_nc_u32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, s2, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_4
; %bb.2:
	s_lshr_b32 s2, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, s2
	s_ashr_i32 s2, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_4
; %bb.3:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_subrev_nc_u32_e32 v3, s2, v1
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_clause 0x1
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	global_store_b64 v[0:1], v[2:3], off
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14Belloch_sum_upPdii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14Belloch_sum_upPdii, .Lfunc_end0-_Z14Belloch_sum_upPdii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 388
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16Belloch_sum_downPdiii ; -- Begin function _Z16Belloch_sum_downPdiii
	.globl	_Z16Belloch_sum_downPdiii
	.p2align	8
	.type	_Z16Belloch_sum_downPdiii,@function
_Z16Belloch_sum_downPdiii:              ; @_Z16Belloch_sum_downPdiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB1_4
; %bb.1:
	s_lshl_b32 s3, 1, s2
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s4, s3, 31
	s_bfm_b32 s2, s2, 0
	s_add_i32 s5, s3, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v4, v1, v2
	s_xor_b32 s4, s5, s4
	v_cvt_f32_u32_e32 v0, s4
	s_sub_i32 s5, 0, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, s5, v0
	v_mul_hi_u32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v3
	v_xor_b32_e32 v3, v4, v2
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v0, s4
	v_sub_nc_u32_e32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s4, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s4, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v2
	v_sub_nc_u32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, s2, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_4
; %bb.2:
	s_lshr_b32 s2, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, s2
	s_ashr_i32 s2, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_4
; %bb.3:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_subrev_nc_u32_e32 v3, s2, v1
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[2:3], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_clause 0x1
	global_load_b64 v[4:5], v[0:1], off
	global_load_b64 v[6:7], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[6:7], v[4:5], v[6:7]
	s_clause 0x1
	global_store_b64 v[0:1], v[6:7], off
	global_store_b64 v[2:3], v[4:5], off
.LBB1_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16Belloch_sum_downPdiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16Belloch_sum_downPdiii, .Lfunc_end1-_Z16Belloch_sum_downPdiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 404
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10Hillis_sumPdS_ii    ; -- Begin function _Z10Hillis_sumPdS_ii
	.globl	_Z10Hillis_sumPdS_ii
	.p2align	8
	.type	_Z10Hillis_sumPdS_ii,@function
_Z10Hillis_sumPdS_ii:                   ; @_Z10Hillis_sumPdS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB2_4
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	v_cmpx_le_i32_e64 s4, v1
	s_cbranch_execz .LBB2_3
; %bb.2:
	v_subrev_nc_u32_e32 v0, s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[4:5], v[4:5], v[0:1]
.LBB2_3:                                ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s5
	v_add_co_u32 v0, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v3, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[4:5], off
.LBB2_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10Hillis_sumPdS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10Hillis_sumPdS_ii, .Lfunc_end2-_Z10Hillis_sumPdS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 224
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12shift_offsetPddi    ; -- Begin function _Z12shift_offsetPddi
	.globl	_Z12shift_offsetPddi
	.p2align	8
	.type	_Z12shift_offsetPddi,@function
_Z12shift_offsetPddi:                   ; @_Z12shift_offsetPddi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[2:3], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], s[2:3]
	global_store_b64 v[0:1], v[2:3], off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12shift_offsetPddi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z12shift_offsetPddi, .Lfunc_end3-_Z12shift_offsetPddi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 144
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14Belloch_sum_upPdii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14Belloch_sum_upPdii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16Belloch_sum_downPdiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16Belloch_sum_downPdiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10Hillis_sumPdS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10Hillis_sumPdS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12shift_offsetPddi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12shift_offsetPddi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
