/*
 * Overdamped Brownian particle in symmetric piecewise linear potential
 *
 * \dot{x} = -V'(x) + Gaussian, Poissonian and dichotomous noise
 *
 */

#include <stdio.h>
#include <getopt.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>

#include <cuda.h>
#include <curand.h>
#include <curand_kernel.h>

#define PI 3.14159265358979f

//model
__constant__ float d_Dg, d_Dp, d_lambda, d_mean, d_fa, d_fb, d_mua, d_mub;
__constant__ int d_comp;
float h_lambda, h_fa, h_fb, h_mua, h_mub, h_mean;
int h_comp;

//simulation
float h_trans;
int h_dev, h_block, h_grid, h_spp, h_samples;
long h_paths, h_periods, h_threads, h_steps, h_trigger;
__constant__ int d_spp, d_samples;
__constant__ long d_paths;

//output
char *h_domain;
char h_domainx;
float h_beginx, h_endx;
int h_logx, h_points, h_moments;
__constant__ char d_domainx;
__constant__ int d_points;

//vector
float *h_x, *h_xb, *h_fx, *h_dx;
float *d_x, *d_fx, *d_dx;
int *d_pcd, *d_dcd, *d_dst;
unsigned int *h_seeds, *d_seeds;
curandState *d_states;

size_t size_f, size_i, size_ui, size_p;
curandGenerator_t gen;

static struct option options[] = {
    {"Dg", required_argument, NULL, 'a'},
    {"Dp", required_argument, NULL, 'b'},
    {"lambda", required_argument, NULL, 'c'},
    {"fa", required_argument, NULL, 'd'},
    {"fb", required_argument, NULL, 'e'},
    {"mua", required_argument, NULL, 'f'},
    {"mub", required_argument, NULL, 'g'},
    {"comp", required_argument, NULL, 'h'},
    {"mean", required_argument, NULL, 'i'},
    {"dev", required_argument, NULL, 'j'},
    {"block", required_argument, NULL, 'k'},
    {"paths", required_argument, NULL, 'l'},
    {"periods", required_argument, NULL, 'm'},
    {"trans", required_argument, NULL, 'n'},
    {"spp", required_argument, NULL, 'o'},
    {"samples", required_argument, NULL, 'p'},
    {"mode", required_argument, NULL, 'q'},
    {"domain", required_argument, NULL, 'r'},
    {"domainx", required_argument, NULL, 's'},
    {"logx", required_argument, NULL, 't'},
    {"points", required_argument, NULL, 'u'},
    {"beginx", required_argument, NULL, 'v'},
    {"endx", required_argument, NULL, 'w'}
};

void usage(char **argv)
{
    printf("Usage: %s <params> \n\n", argv[0]);
    printf("Model params:\n");
    printf("    -a, --Dg=FLOAT          set the Gaussian noise intensity 'D_G' to FLOAT\n");
    printf("    -b, --Dp=FLOAT          set the Poissonian noise intensity 'D_P' to FLOAT\n");
    printf("    -c, --lambda=FLOAT      set the Poissonian kicks frequency '\\lambda' to FLOAT\n");
    printf("    -d, --fa=FLOAT          set the first state of the dichotomous noise 'F_a' to FLOAT\n");
    printf("    -e, --fb=FLOAT          set the second state of the dichotomous noise 'F_b' to FLOAT\n");
    printf("    -f, --mua=FLOAT         set the transition rate of the first state of dichotomous noise '\\mu_a' to FLOAT\n");
    printf("    -g, --mub=FLOAT         set the transition rate of the second state of dichotomous noise '\\mu_b' to FLOAT\n");
    printf("    -h, --comp=INT          choose between biased and unbiased Poissonian or dichotomous noise. INT can be one of:\n");
    printf("                            0: biased; 1: unbiased\n");
    printf("    -i, --mean=FLOAT        if is nonzero, fix the mean value of Poissonian noise or dichotomous noise to FLOAT, matters only for domains p, l, a, b, m or n\n");
    printf("Simulation params:\n");
    printf("    -j, --dev=INT           set the gpu device to INT\n");
    printf("    -k, --block=INT         set the gpu block size to INT\n");
    printf("    -l, --paths=LONG        set the number of paths to LONG\n");
    printf("    -m, --periods=LONG      set the number of periods to LONG\n");
    printf("    -n, --trans=FLOAT       specify fraction FLOAT of periods which stands for transients\n");
    printf("    -o, --spp=INT           specify how many integration steps should be calculated for the smallest characteristic time scale\n");
    printf("    -p, --samples=INT       specify how many integration steps should be calculated for a single kernel call\n");
    printf("Output params:\n");
    printf("    -q, --mode=STRING       sets the output mode. STRING can be one of:\n");
    printf("                            moments: the first moment <<v>>\n");
    printf("    -r, --domain=STRING     simultaneously scan over one or two model params. STRING can be one of:\n");
    printf("                            1d: only one parameter\n");
    printf("    -s, --domainx=CHAR      sets the first domain of the moments. CHAR can be one of:\n");
    printf("                            D: Dg; p: Dp; l: lambda; a: fa; b: fb; m: mua; n: mub\n");
    printf("    -t, --logx=INT          choose between linear and logarithmic scale of the domainx\n");
    printf("                            0: linear; 1: logarithmic\n");
    printf("    -u, --points=INT        set the number of samples to generate between begin and end\n");
    printf("    -v, --beginx=FLOAT      set the starting value of the domainx to FLOAT\n");
    printf("    -w, --endx=FLOAT        set the end value of the domainx to FLOAT\n");
    printf("\n");
}

void parse_cla(int argc, char **argv)
{
    float ftmp;
    int c, itmp;

    while( (c = getopt_long(argc, argv, "a:b:c:d:e:f:g:h:i:j:k:l:m:n:o:p:q:r:s:t:u:v:w", options, NULL)) != EOF) {
        switch (c) {
            case 'a':
                ftmp = atof(optarg);
                cudaMemcpyToSymbol(d_Dg, &ftmp, sizeof(float));
                break;
            case 'b':
                ftmp = atof(optarg);
                cudaMemcpyToSymbol(d_Dp, &ftmp, sizeof(float));
                break;
            case 'c':
                h_lambda = atof(optarg);
                cudaMemcpyToSymbol(d_lambda, &h_lambda, sizeof(float));
                break;
            case 'd':
                h_fa = atof(optarg);
                cudaMemcpyToSymbol(d_fa, &h_fa, sizeof(float));
                break;
            case 'e':
                h_fb = atof(optarg);
                cudaMemcpyToSymbol(d_fb, &h_fb, sizeof(float));
                break;
            case 'f':
                h_mua = atof(optarg);
                cudaMemcpyToSymbol(d_mua, &h_mua, sizeof(float));
                break;
            case 'g':
                h_mub = atof(optarg);
                cudaMemcpyToSymbol(d_mub, &h_mub, sizeof(float));
                break;
            case 'h':
                h_comp = atoi(optarg);
                cudaMemcpyToSymbol(d_comp, &h_comp, sizeof(int));
                break;
            case 'i':
                h_mean = atof(optarg);
                cudaMemcpyToSymbol(d_mean, &h_mean, sizeof(float));
                break;
            case 'j':
                itmp = atoi(optarg);
                cudaSetDevice(itmp);
                break;
            case 'k':
                h_block = atoi(optarg);
                break;
            case 'l':
                h_paths = atol(optarg);
                cudaMemcpyToSymbol(d_paths, &h_paths, sizeof(long));
                break;
            case 'm':
                h_periods = atol(optarg);
                break;
            case 'n':
                h_trans = atof(optarg);
                break;
            case 'o':
                h_spp = atoi(optarg);
                cudaMemcpyToSymbol(d_spp, &h_spp, sizeof(int));
                break;
            case 'p':
                h_samples = atoi(optarg);
                cudaMemcpyToSymbol(d_samples, &h_samples, sizeof(int));
                break;
            case 'q':
                if ( !strcmp(optarg, "moments") ) {
                    h_moments = 1;
                }
                break;
            case 'r':
                h_domain = optarg;
                break;
            case 's':
                h_domainx = optarg[0]; 
                cudaMemcpyToSymbol(d_domainx, &h_domainx, sizeof(char));
                break;
            case 't':
                h_logx = atoi(optarg);
                break;
            case 'u':
                h_points = atoi(optarg);
                cudaMemcpyToSymbol(d_points, &h_points, sizeof(int));
                break;
            case 'v':
                h_beginx = atof(optarg);
                break;
            case 'w':
                h_endx = atof(optarg);
                break;
        }
    }
}

__global__ void init_dev_rng(unsigned int *d_seeds, curandState *d_states)
{
    long idx = blockIdx.x * blockDim.x + threadIdx.x;

    curand_init(d_seeds[idx], 0, 0, &d_states[idx]);
}

__device__ float drift(float l_x)
{    
    if (-sinf(PI*l_x) < 0.0f) {
        return -1.0f;
    } else {
        return 1.0f;
    }
}

__device__ float diffusion(float l_Dg, float l_dt, curandState *l_state)
{
    if (l_Dg != 0.0f) {
        float r = curand_uniform(l_state);
        float g = sqrtf(2.0f*l_Dg);
        if ( r <= 1.0f/6.0f ) {
            return -g*sqrtf(3.0f*l_dt);
        } else if ( r > 1.0f/6.0f && r <= 1.0f/3.0f ) {
            return g*sqrtf(3.0f*l_dt);
        } else {
            return 0.0f;
        }
    } else {
        return 0.0f;
    }
}

__global__ void init_noise(float *d_dx, int *d_pcd, int *d_dcd, int *d_dst, curandState *d_states)
//init noise
{
    long idx = blockIdx.x * blockDim.x + threadIdx.x;
    float l_dx; 
    curandState l_state;

    //cache model parameters in local variables
    l_state = d_states[idx];

    float l_Dp, l_lambda, l_mean, l_fa, l_fb, l_mua, l_mub;
    int l_comp;

    l_Dp = d_Dp;
    l_lambda = d_lambda;
    l_comp = d_comp;
    l_mean = d_mean;
    l_fa = d_fa;
    l_fb = d_fb;
    l_mua = d_mua;
    l_mub = d_mub;

    long ridx = (idx/d_paths) % d_points;
    l_dx = d_dx[ridx];

    switch(d_domainx) {
        case 'p':
            l_Dp = l_dx;
            if (l_mean != 0.0f) l_lambda = (l_mean*l_mean)/l_Dp;
            break;
        case 'l':
            l_lambda = l_dx;
            if (l_mean != 0.0f) l_Dp = (l_mean*l_mean)/l_lambda;
            break;
        case 'a':
            l_fa = l_dx;
            if (l_comp == 1) {
                l_fb = -l_fa*l_mub/l_mua;
            } else if (l_mean != 0.0f) {
                l_fb = (l_mean*(l_mua + l_mub) - l_fa*l_mub)/l_mua;
            }
            break;
        case 'b':
            l_fb = l_dx;
            if (l_comp == 1) {
                l_fa = -l_fb*l_mua/l_mub;
            } else if (l_mean != 0.0f) {
                l_fa = (l_mean*(l_mua + l_mub) - l_fb*l_mua)/l_mub;
            }
            break;
        case 'm':
            l_mua = l_dx;
            if (l_comp == 1) {
                l_mub = -l_fb*l_mua/l_fa;
            } else if (l_mean != 0.0f) {
                l_mub = (l_fb - l_mean)*l_mua/(l_mean - l_fa);
            }
            break;
        case 'n':
            l_mub = l_dx;
            if (l_comp == 1) {
                l_mua = -l_fa*l_mub/l_fb;
            } else if (l_mean != 0.0f) {
                l_mua = (l_fa - l_mean)*l_mub/(l_mean - l_fb);
            }
            break;
    }

    //step size
    float l_dt;
    int l_spp;

    l_spp = d_spp;

    if (l_lambda != 0.0f) {
        l_dt = 1.0f/l_lambda/l_spp;
    }

    if (l_mua != 0.0f) {
        float taua, taub;

        taua = 1.0f/l_mua;
        taub = 1.0f/l_mub;

        if (taua < taub) {
            l_dt = taua/l_spp;
        } else {
            l_dt = taub/l_spp;
        }
    }

    //jump countdowns
    int l_pcd, l_dcd, l_dst;
    
    if (l_lambda != 0.0f) l_pcd = (int) floorf( -logf( curand_uniform(&l_state) )/l_lambda/l_dt + 0.5f );

    if (l_mua != 0.0f) {
        float rn;
        rn = curand_uniform(&l_state);

        if (rn < 0.5f) {
            l_dst = 0;
            l_dcd = (int) floorf( -logf( curand_uniform(&l_state) )/l_mua/l_dt + 0.5f);
        } else {
            l_dst = 1;
            l_dcd = (int) floorf( -logf( curand_uniform(&l_state) )/l_mub/l_dt + 0.5f);
        }
    }
    
    //write back noise states to the global memory
    d_pcd[idx] = l_pcd;
    d_dcd[idx] = l_dcd;
    d_dst[idx] = l_dst;
    d_states[idx] = l_state;
}

__device__ float adapted_jump_poisson(int &npcd, int pcd, float l_lambda, float l_Dp, int l_comp, float l_dt, curandState *l_state)
{
    if (l_lambda != 0.0f) {
        if (pcd <= 0) {
            float ampmean = sqrtf(l_lambda/l_Dp);
           
            npcd = (int) floorf( -logf( curand_uniform(l_state) )/l_lambda/l_dt + 0.5f );

            if (l_comp) {
                float comp = sqrtf(l_Dp*l_lambda)*l_dt;
                
                return -logf( curand_uniform(l_state) )/ampmean - comp;
            } else {
                return -logf( curand_uniform(l_state) )/ampmean;
            }
        } else {
            npcd = pcd - 1;
            if (l_comp) {
                float comp = sqrtf(l_Dp*l_lambda)*l_dt;
                
                return -comp;
            } else {
                return 0.0f;
            }
        }
    } else {
        return 0.0f;
    }
}

__device__ float adapted_jump_dich(int &ndcd, int dcd, int &ndst, int dst, float l_fa, float l_fb, float l_mua, float l_mub, float l_dt, curandState *l_state)
{
    if (l_mua != 0.0f) {
        if (dcd <= 0) {
            if (dst == 0) {
                ndst = 1; 
                ndcd = (int) floorf( -logf( curand_uniform(l_state) )/l_mub/l_dt + 0.5f );
                return l_fb*l_dt;
            } else {
                ndst = 0;
                ndcd = (int) floorf( -logf( curand_uniform(l_state) )/l_mua/l_dt + 0.5f );
                return l_fa*l_dt;
            }
        } else {
            ndcd = dcd - 1;
            if (dst == 0) {
                return l_fa*l_dt;
            } else {
                return l_fb*l_dt;
            }
        }
    } else {
        return 0.0f;
    }
}

__device__ void predcorr(float &corrl_x, float l_x, int &npcd, int pcd, curandState *l_state, \
                         float l_Dg, float l_Dp, float l_lambda, int l_comp, \
                         int &ndcd, int dcd, int &ndst, int dst, float l_fa, float l_fb, float l_mua, float l_mub, float l_dt)
/* simplified weak order 2.0 adapted predictor-corrector scheme
( see E. Platen, N. Bruti-Liberati; Numerical Solution of Stochastic Differential Equations with Jumps in Finance; Springer 2010; p. 503, p. 532 )
*/
{
    float l_xt, l_xtt, predl_x;

    l_xt = drift(l_x);

    predl_x = l_x + l_xt*l_dt + diffusion(l_Dg, l_dt, l_state);

    l_xtt = drift(predl_x);

    predl_x = l_x + 0.5f*(l_xt + l_xtt)*l_dt + diffusion(l_Dg, l_dt, l_state);

    l_xtt = drift(predl_x);

    corrl_x = l_x + 0.5f*(l_xt + l_xtt)*l_dt + adapted_jump_dich(ndcd, dcd, ndst, dst, l_fa, l_fb, l_mua, l_mub, l_dt, l_state) + diffusion(l_Dg, l_dt, l_state) + adapted_jump_poisson(npcd, pcd, l_lambda, l_Dp, l_comp, l_dt, l_state);
}

__global__ void fold(float *d_x, float *d_fx)
{
    long idx = blockIdx.x * blockDim.x + threadIdx.x;
    float l_x, l_fx, f;

    l_x = d_x[idx];
    l_fx = d_fx[idx];

    f = floorf(l_x/2.0f)*2.0f;
    l_x = l_x - f;
    l_fx = l_fx + f;

    d_x[idx] = l_x;
    d_fx[idx] = l_fx;
}

void unfold(float *x, float *fx)
{
    int i;

    for (i = 0; i < h_threads; i++) {
        x[i] = x[i] + fx[i];
    }
}

__global__ void run_moments(float *d_x, float *d_dx, int *d_pcd, int *d_dcd, int *d_dst, curandState *d_states)
//actual moments kernel
{
    long idx = blockIdx.x * blockDim.x + threadIdx.x;
    float l_x, l_dx; 
    curandState l_state;

    //cache path and model parameters in local variables
    l_x = d_x[idx];
    l_state = d_states[idx];

    float l_Dg, l_Dp, l_lambda, l_mean, l_fa, l_fb, l_mua, l_mub;
    int l_comp;

    l_Dg = d_Dg;
    l_Dp = d_Dp;
    l_lambda = d_lambda;
    l_comp = d_comp;
    l_mean = d_mean;
    l_fa = d_fa;
    l_fb = d_fb;
    l_mua = d_mua;
    l_mub = d_mub;

    //run simulation for multiple values of the system parameters
    long ridx = (idx/d_paths) % d_points;
    l_dx = d_dx[ridx];

    switch(d_domainx) {
        case 'D':
            l_Dg = l_dx;
            break;
        case 'p':
            l_Dp = l_dx;
            if (l_mean != 0.0f) l_lambda = (l_mean*l_mean)/l_Dp;
            break;
        case 'l':
            l_lambda = l_dx;
            if (l_mean != 0.0f) l_Dp = (l_mean*l_mean)/l_lambda;
            break;
        case 'a':
            l_fa = l_dx;
            if (l_comp == 1) {
                l_fb = -l_fa*l_mub/l_mua;
            } else if (l_mean != 0.0f) {
                l_fb = (l_mean*(l_mua + l_mub) - l_fa*l_mub)/l_mua;
            }
            break;
        case 'b':
            l_fb = l_dx;
            if (l_comp == 1) {
                l_fa = -l_fb*l_mua/l_mub;
            } else if (l_mean != 0.0f) {
                l_fa = (l_mean*(l_mua + l_mub) - l_fb*l_mua)/l_mub;
            }
            break;
        case 'm':
            l_mua = l_dx;
            if (l_comp == 1) {
                l_mub = -l_fb*l_mua/l_fa;
            } else if (l_mean != 0.0f) {
                l_mub = (l_fb - l_mean)*l_mua/(l_mean - l_fa);
            }
            break;
        case 'n':
            l_mub = l_dx;
            if (l_comp == 1) {
                l_mua = -l_fa*l_mub/l_fb;
            } else if (l_mean != 0.0f) {
                l_mua = (l_fa - l_mean)*l_mub/(l_mean - l_fb);
            }
            break;
    }

    //step size & number of steps
    float l_dt;
    int i, l_spp, l_samples;

    l_spp = d_spp;

    if (l_lambda != 0.0f) {
        l_dt = 1.0f/l_lambda/l_spp;
    }

    if (l_mua != 0.0f) {
        float taua, taub;

        taua = 1.0f/l_mua;
        taub = 1.0f/l_mub;

        if (taua < taub) {
            l_dt = taua/l_spp;
        } else {
            l_dt = taub/l_spp;
        }
    }

    l_samples = d_samples;

    //jump countdowns
    int l_pcd, l_dcd, l_dst;
    
    l_pcd = d_pcd[idx];
    l_dcd = d_dcd[idx];
    l_dst = d_dst[idx];

    for (i = 0; i < l_samples; i++) {
        predcorr(l_x, l_x, l_pcd, l_pcd, &l_state, l_Dg, l_Dp, l_lambda, l_comp, \
                 l_dcd, l_dcd, l_dst, l_dst, l_fa, l_fb, l_mua, l_mub, l_dt); 
    }

    //write back path parameters to the global memory
    d_x[idx] = l_x;
    d_pcd[idx] = l_pcd;
    d_dcd[idx] = l_dcd;
    d_dst[idx] = l_dst;
    d_states[idx] = l_state;
}

void prepare()
//prepare simulation
{
    //grid size
    h_paths = (h_paths/h_block)*h_block;
    h_threads = h_paths;

    if (h_moments) h_threads *= h_points;

    h_grid = h_threads/h_block;

    //number of steps
    if (h_moments) h_steps = h_periods*h_spp;
     
    //host memory allocation
    size_f = h_threads*sizeof(float);
    size_i = h_threads*sizeof(int);
    size_ui = h_threads*sizeof(unsigned int);
    size_p = h_points*sizeof(float);

    h_x = (float*)malloc(size_f);
    h_fx = (float*)malloc(size_f);
    h_seeds = (unsigned int*)malloc(size_ui);

    //create & initialize host rng
    curandCreateGeneratorHost(&gen, CURAND_RNG_PSEUDO_DEFAULT);
    curandSetPseudoRandomGeneratorSeed(gen, time(NULL));

    curandGenerate(gen, h_seeds, h_threads);
 
    //device memory allocation
    cudaMalloc((void**)&d_x, size_f);
    cudaMalloc((void**)&d_fx, size_f);
    cudaMalloc((void**)&d_seeds, size_ui);
    cudaMalloc((void**)&d_pcd, size_i);
    cudaMalloc((void**)&d_dcd, size_i);
    cudaMalloc((void**)&d_dst, size_i);
    cudaMalloc((void**)&d_states, h_threads*sizeof(curandState));

    //copy seeds from host to device
    cudaMemcpy(d_seeds, h_seeds, size_ui, cudaMemcpyHostToDevice);

    //initialization of device rng
    init_dev_rng<<<h_grid, h_block>>>(d_seeds, d_states);

    free(h_seeds);
    cudaFree(d_seeds);

    //moments specific requirements
    if (h_moments) {
        h_trigger = h_steps*h_trans;

        h_xb = (float*)malloc(size_f);
        h_dx = (float*)malloc(size_p);

        float dxtmp = h_beginx;
        float dxstep = (h_endx - h_beginx)/h_points;

        int i;
        
        //set domainx
        for (i = 0; i < h_points; i++) {
            if (h_logx) {
                h_dx[i] = exp10f(dxtmp);
            } else {
                h_dx[i] = dxtmp;
            }
            dxtmp += dxstep;
        }
        
        cudaMalloc((void**)&d_dx, size_p);
    
        cudaMemcpy(d_dx, h_dx, size_p, cudaMemcpyHostToDevice);
    }
}

void copy_to_dev()
{
    cudaMemcpy(d_x, h_x, size_f, cudaMemcpyHostToDevice);
    cudaMemcpy(d_fx, h_fx, size_f, cudaMemcpyHostToDevice);
}

void copy_from_dev()
{
    cudaMemcpy(h_x, d_x, size_f, cudaMemcpyDeviceToHost);
    cudaMemcpy(h_fx, d_fx, size_f, cudaMemcpyDeviceToHost);
}

void initial_conditions()
//set initial conditions for path parameters
{
    int i;

    curandGenerateUniform(gen, h_x, h_threads); //x in (0,1]

    for (i = 0; i < h_threads; i++) {
        h_x[i] = 2.0f*h_x[i] - 1.0f; //x in (-1,1]
    }

    memset(h_fx, 0.0f, size_f);

    copy_to_dev();
}

void moments(float *av)
//calculate the first moment of v
{
    float sx, sxb, tmp, taua, taub, dt;
    int i, j;

    copy_from_dev();

    unfold(h_x, h_fx);

    for (j = 0; j < h_points; j++) {
        sx = 0.0f;
        sxb = 0.0f;

        for (i = 0; i < h_paths; i++) {
            sx += h_x[j*h_paths + i];
            sxb += h_xb[j*h_paths + i];
        }

        //Poissonian
        if (h_domainx == 'l') {
            dt = 1.0f/h_dx[j]/h_spp;
        } else if (h_domainx == 'p' && h_mean != 0.0f) {
            dt = 1.0f/(h_mean*h_mean/h_dx[j])/h_spp;
        } else if (h_lambda != 0.0f) {
            dt = 1.0f/h_lambda/h_spp;
        }

        //Dichotomous
        if (h_domainx == 'm') {
            taua = 1.0f/h_dx[j];
            taub = 1.0f/h_mub;

            if (h_comp) {
                tmp = 1.0f/(-h_fb*h_dx[j]/h_fa);
            } else if (h_mean != 0.0f) {
                tmp = 1.0f/((h_fb - h_mean)*h_dx[j]/(h_mean - h_fa));
            } else {
                tmp = taub;
            }

            if (taua <= tmp) {
                dt = taua/h_spp;
            } else {
                dt = tmp/h_spp;
            }
        } else if (h_domainx == 'n') {
            taua = 1.0f/h_mua;
            taub = 1.0f/h_dx[j];

            if (h_comp) {
                tmp = 1.0f/(-h_fa*h_dx[j]/h_fb);
            } else if (h_mean != 0.0f) {
                tmp = 1.0f/((h_fa - h_mean)*h_dx[j]/(h_mean - h_fb));
            } else {
                tmp = taua;
            }

            if (taub <= tmp) {
                dt = taub/h_spp;
            } else {
                dt = tmp/h_spp;
            }
        } else if (h_mua != 0.0f || h_mub != 0.0f) {
            taua = 1.0f/h_mua;
            taub = 1.0f/h_mub;

            if (taua < taub) {
                dt = taua/h_spp;
            } else {
                dt = taub/h_spp;
            }
        }
            
        av[j] = (sx - sxb)/( (1.0f - h_trans)*h_steps*dt )/h_paths;
    }
}

void finish()
//free memory
{

    free(h_x);
    free(h_fx);
    
    curandDestroyGenerator(gen);
    cudaFree(d_x);
    cudaFree(d_fx);
    cudaFree(d_pcd);
    cudaFree(d_dcd);
    cudaFree(d_dst);
    cudaFree(d_states);
    
    if (h_moments) {
        free(h_xb);
        free(h_dx);

        cudaFree(d_dx);
    }
}

int main(int argc, char **argv)
{
    parse_cla(argc, argv);
    if (!h_moments) {
        usage(argv);
        return -1;
    }
 
    prepare();
    
    initial_conditions();
    
    //asymptotic long time average velocity <<v>>
    if (h_moments) {
        float *av;
        int i;

        av = (float*)malloc(size_p);
 
        if ( !strcmp(h_domain, "1d") ) { 

            init_noise<<<h_grid, h_block>>>(d_dx, d_pcd, d_dcd, d_dst, d_states);

            for (i = 0; i < h_steps; i += h_samples) {
                run_moments<<<h_grid, h_block>>>(d_x, d_dx, d_pcd, d_dcd, d_dst, d_states);
                fold<<<h_grid, h_block>>>(d_x, d_fx);
                if (i == h_trigger) {
                    cudaMemcpy(h_xb, d_x, size_f, cudaMemcpyDeviceToHost);
                    cudaMemcpy(h_fx, d_fx, size_f, cudaMemcpyDeviceToHost);
                    unfold(h_xb, h_fx);
                }
            }

            moments(av);
 
            printf("#%c <<v>>\n", h_domainx);
            for (i = 0; i < h_points; i++) {
                printf("%e %e\n", h_dx[i], av[i]);
            }
        }

        free(av);
    }

    finish();
    
    return 0;
}

	.file	"tmpxft_003909b8_00000000-6_prog.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2258:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2258:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z18cudaMemcpyToSymbolIfE9cudaErrorRKT_PKvmm14cudaMemcpyKind.constprop.0.isra.0, @function
_Z18cudaMemcpyToSymbolIfE9cudaErrorRKT_PKvmm14cudaMemcpyKind.constprop.0.isra.0:
.LFB2410:
	.cfi_startproc
	movl	$1, %r8d
	xorl	%ecx, %ecx
	jmp	cudaMemcpyToSymbol@PLT
	.cfi_endproc
.LFE2410:
	.size	_Z18cudaMemcpyToSymbolIfE9cudaErrorRKT_PKvmm14cudaMemcpyKind.constprop.0.isra.0, .-_Z18cudaMemcpyToSymbolIfE9cudaErrorRKT_PKvmm14cudaMemcpyKind.constprop.0.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Usage: %s <params> \n\n"
.LC1:
	.string	"Model params:\n"
.LC2:
	.string	"    -a, --Dg=FLOAT          set the Gaussian noise intensity 'D_G' to FLOAT\n"
.LC3:
	.string	"    -b, --Dp=FLOAT          set the Poissonian noise intensity 'D_P' to FLOAT\n"
.LC4:
	.string	"    -c, --lambda=FLOAT      set the Poissonian kicks frequency '\\lambda' to FLOAT\n"
.LC5:
	.string	"    -d, --fa=FLOAT          set the first state of the dichotomous noise 'F_a' to FLOAT\n"
.LC6:
	.string	"    -e, --fb=FLOAT          set the second state of the dichotomous noise 'F_b' to FLOAT\n"
.LC7:
	.string	"    -f, --mua=FLOAT         set the transition rate of the first state of dichotomous noise '\\mu_a' to FLOAT\n"
.LC8:
	.string	"    -g, --mub=FLOAT         set the transition rate of the second state of dichotomous noise '\\mu_b' to FLOAT\n"
.LC9:
	.string	"    -h, --comp=INT          choose between biased and unbiased Poissonian or dichotomous noise. INT can be one of:\n"
.LC10:
	.string	"                            0: biased; 1: unbiased\n"
.LC11:
	.string	"    -i, --mean=FLOAT        if is nonzero, fix the mean value of Poissonian noise or dichotomous noise to FLOAT, matters only for domains p, l, a, b, m or n\n"
.LC12:
	.string	"Simulation params:\n"
.LC13:
	.string	"    -j, --dev=INT           set the gpu device to INT\n"
.LC14:
	.string	"    -k, --block=INT         set the gpu block size to INT\n"
.LC15:
	.string	"    -l, --paths=LONG        set the number of paths to LONG\n"
.LC16:
	.string	"    -m, --periods=LONG      set the number of periods to LONG\n"
.LC17:
	.string	"    -n, --trans=FLOAT       specify fraction FLOAT of periods which stands for transients\n"
.LC18:
	.string	"    -o, --spp=INT           specify how many integration steps should be calculated for the smallest characteristic time scale\n"
.LC19:
	.string	"    -p, --samples=INT       specify how many integration steps should be calculated for a single kernel call\n"
.LC20:
	.string	"Output params:\n"
.LC21:
	.string	"    -q, --mode=STRING       sets the output mode. STRING can be one of:\n"
.LC22:
	.string	"                            moments: the first moment <<v>>\n"
.LC23:
	.string	"    -r, --domain=STRING     simultaneously scan over one or two model params. STRING can be one of:\n"
.LC24:
	.string	"                            1d: only one parameter\n"
.LC25:
	.string	"    -s, --domainx=CHAR      sets the first domain of the moments. CHAR can be one of:\n"
.LC26:
	.string	"                            D: Dg; p: Dp; l: lambda; a: fa; b: fb; m: mua; n: mub\n"
.LC27:
	.string	"    -t, --logx=INT          choose between linear and logarithmic scale of the domainx\n"
.LC28:
	.string	"                            0: linear; 1: logarithmic\n"
.LC29:
	.string	"    -u, --points=INT        set the number of samples to generate between begin and end\n"
.LC30:
	.string	"    -v, --beginx=FLOAT      set the starting value of the domainx to FLOAT\n"
.LC31:
	.string	"    -w, --endx=FLOAT        set the end value of the domainx to FLOAT\n"
.LC32:
	.string	"\n"
	.text
	.globl	_Z5usagePPc
	.type	_Z5usagePPc, @function
_Z5usagePPc:
.LFB2241:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	(%rdi), %rdx
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
	movl	$2, %edi
	leaq	.LC16(%rip), %rsi
	call	__printf_chk@PLT
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC21(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC22(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC23(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC25(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC26(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC27(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC28(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC29(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC30(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC31(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC32(%rip), %rsi
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	movl	$2, %edi
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2241:
	.size	_Z5usagePPc, .-_Z5usagePPc
	.section	.rodata.str1.1
.LC33:
	.string	"moments"
.LC34:
	.string	"a:b:c:d:e:f:g:h:i:j:k:l:m:n:o:p:q:r:s:t:u:v:w"
	.text
	.globl	_Z9parse_claiPPc
	.type	_Z9parse_claiPPc, @function
_Z9parse_claiPPc:
.LFB2242:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	_ZL7options(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%edi, %ebx
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
.L6:
	xorl	%r8d, %r8d
	movq	%r12, %rcx
	leaq	.LC34(%rip), %rdx
	movq	%rbp, %rsi
	movl	%ebx, %edi
	call	getopt_long@PLT
	cmpl	$-1, %eax
	je	.L37
	subl	$97, %eax
	cmpl	$22, %eax
	ja	.L6
	leaq	.L9(%rip), %rdx
	movq	optarg(%rip), %rdi
	movslq	(%rdx,%rax,4), %rax
	addq	%rdx, %rax
	notrack jmp	*%rax
	.section	.rodata
	.align 4
	.align 4
.L9:
	.long	.L31-.L9
	.long	.L30-.L9
	.long	.L29-.L9
	.long	.L28-.L9
	.long	.L27-.L9
	.long	.L26-.L9
	.long	.L25-.L9
	.long	.L24-.L9
	.long	.L23-.L9
	.long	.L22-.L9
	.long	.L21-.L9
	.long	.L20-.L9
	.long	.L19-.L9
	.long	.L18-.L9
	.long	.L17-.L9
	.long	.L16-.L9
	.long	.L15-.L9
	.long	.L14-.L9
	.long	.L13-.L9
	.long	.L12-.L9
	.long	.L11-.L9
	.long	.L10-.L9
	.long	.L8-.L9
	.text
.L31:
	call	atof@PLT
	leaq	4(%rsp), %rsi
	movl	$4, %edx
	leaq	_ZL4d_Dg(%rip), %rdi
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 4(%rsp)
	jmp	.L35
.L30:
	call	atof@PLT
	leaq	4(%rsp), %rsi
	movl	$4, %edx
	leaq	_ZL4d_Dp(%rip), %rdi
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 4(%rsp)
	jmp	.L35
.L29:
	call	atof@PLT
	movl	$4, %edx
	leaq	h_lambda(%rip), %rsi
	leaq	_ZL8d_lambda(%rip), %rdi
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_lambda(%rip)
	jmp	.L35
.L28:
	call	atof@PLT
	movl	$4, %edx
	leaq	h_fa(%rip), %rsi
	leaq	_ZL4d_fa(%rip), %rdi
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_fa(%rip)
	jmp	.L35
.L27:
	call	atof@PLT
	movl	$4, %edx
	leaq	h_fb(%rip), %rsi
	leaq	_ZL4d_fb(%rip), %rdi
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_fb(%rip)
	jmp	.L35
.L26:
	call	atof@PLT
	movl	$4, %edx
	leaq	h_mua(%rip), %rsi
	leaq	_ZL5d_mua(%rip), %rdi
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_mua(%rip)
	jmp	.L35
.L25:
	call	atof@PLT
	movl	$4, %edx
	leaq	h_mub(%rip), %rsi
	leaq	_ZL5d_mub(%rip), %rdi
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_mub(%rip)
	jmp	.L35
.L24:
	call	atoi@PLT
	movl	$4, %edx
	leaq	h_comp(%rip), %rsi
	leaq	_ZL6d_comp(%rip), %rdi
	movl	%eax, h_comp(%rip)
	jmp	.L35
.L23:
	call	atof@PLT
	movl	$4, %edx
	leaq	h_mean(%rip), %rsi
	leaq	_ZL6d_mean(%rip), %rdi
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_mean(%rip)
	jmp	.L35
.L22:
	call	atoi@PLT
	movl	%eax, %edi
	call	cudaSetDevice@PLT
	jmp	.L6
.L21:
	call	atoi@PLT
	movl	%eax, h_block(%rip)
	jmp	.L6
.L20:
	call	atol@PLT
	movl	$8, %edx
	leaq	h_paths(%rip), %rsi
	leaq	_ZL7d_paths(%rip), %rdi
	movq	%rax, h_paths(%rip)
	jmp	.L35
.L19:
	call	atol@PLT
	movq	%rax, h_periods(%rip)
	jmp	.L6
.L18:
	call	atof@PLT
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_trans(%rip)
	jmp	.L6
.L17:
	call	atoi@PLT
	movl	$4, %edx
	leaq	h_spp(%rip), %rsi
	leaq	_ZL5d_spp(%rip), %rdi
	movl	%eax, h_spp(%rip)
	jmp	.L35
.L16:
	call	atoi@PLT
	movl	$4, %edx
	leaq	h_samples(%rip), %rsi
	leaq	_ZL9d_samples(%rip), %rdi
	movl	%eax, h_samples(%rip)
	jmp	.L35
.L15:
	leaq	.LC33(%rip), %rsi
	call	strcmp@PLT
	testl	%eax, %eax
	jne	.L6
	movl	$1, h_moments(%rip)
	jmp	.L6
.L14:
	movq	%rdi, h_domain(%rip)
	jmp	.L6
.L13:
	movb	(%rdi), %al
	movl	$1, %edx
	leaq	h_domainx(%rip), %rsi
	leaq	_ZL9d_domainx(%rip), %rdi
	movb	%al, h_domainx(%rip)
	jmp	.L35
.L12:
	call	atoi@PLT
	movl	%eax, h_logx(%rip)
	jmp	.L6
.L11:
	call	atoi@PLT
	movl	$4, %edx
	leaq	h_points(%rip), %rsi
	leaq	_ZL8d_points(%rip), %rdi
	movl	%eax, h_points(%rip)
.L35:
	call	_Z18cudaMemcpyToSymbolIfE9cudaErrorRKT_PKvmm14cudaMemcpyKind.constprop.0.isra.0
	jmp	.L6
.L10:
	call	atof@PLT
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_beginx(%rip)
	jmp	.L6
.L8:
	call	atof@PLT
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_endx(%rip)
	jmp	.L6
.L37:
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2242:
	.size	_Z9parse_claiPPc, .-_Z9parse_claiPPc
	.globl	_Z5driftf
	.type	_Z5driftf, @function
_Z5driftf:
.LFB2243:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2243:
	.size	_Z5driftf, .-_Z5driftf
	.globl	_Z9diffusionffP17curandStateXORWOW
	.type	_Z9diffusionffP17curandStateXORWOW, @function
_Z9diffusionffP17curandStateXORWOW:
.LFB2244:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2244:
	.size	_Z9diffusionffP17curandStateXORWOW, .-_Z9diffusionffP17curandStateXORWOW
	.globl	_Z20adapted_jump_poissonRiiffifP17curandStateXORWOW
	.type	_Z20adapted_jump_poissonRiiffifP17curandStateXORWOW, @function
_Z20adapted_jump_poissonRiiffifP17curandStateXORWOW:
.LFB2245:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2245:
	.size	_Z20adapted_jump_poissonRiiffifP17curandStateXORWOW, .-_Z20adapted_jump_poissonRiiffifP17curandStateXORWOW
	.globl	_Z17adapted_jump_dichRiiS_ifffffP17curandStateXORWOW
	.type	_Z17adapted_jump_dichRiiS_ifffffP17curandStateXORWOW, @function
_Z17adapted_jump_dichRiiS_ifffffP17curandStateXORWOW:
.LFB2246:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2246:
	.size	_Z17adapted_jump_dichRiiS_ifffffP17curandStateXORWOW, .-_Z17adapted_jump_dichRiiS_ifffffP17curandStateXORWOW
	.globl	_Z8predcorrRffRiiP17curandStateXORWOWfffiS0_iS0_ifffff
	.type	_Z8predcorrRffRiiP17curandStateXORWOWfffiS0_iS0_ifffff, @function
_Z8predcorrRffRiiP17curandStateXORWOWfffiS0_iS0_ifffff:
.LFB2247:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2247:
	.size	_Z8predcorrRffRiiP17curandStateXORWOWfffiS0_iS0_ifffff, .-_Z8predcorrRffRiiP17curandStateXORWOWfffiS0_iS0_ifffff
	.globl	_Z6unfoldPfS_
	.type	_Z6unfoldPfS_, @function
_Z6unfoldPfS_:
.LFB2248:
	.cfi_startproc
	endbr64
	movq	h_threads(%rip), %rdx
	xorl	%eax, %eax
.L49:
	cmpq	%rax, %rdx
	jle	.L51
	movss	(%rdi,%rax,4), %xmm0
	addss	(%rsi,%rax,4), %xmm0
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	jmp	.L49
.L51:
	ret
	.cfi_endproc
.LFE2248:
	.size	_Z6unfoldPfS_, .-_Z6unfoldPfS_
	.globl	_Z11copy_to_devv
	.type	_Z11copy_to_devv, @function
_Z11copy_to_devv:
.LFB2250:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	size_f(%rip), %rdx
	movl	$1, %ecx
	movq	h_x(%rip), %rsi
	movq	d_x(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	size_f(%rip), %rdx
	movl	$1, %ecx
	movq	h_fx(%rip), %rsi
	movq	d_fx(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 8
	jmp	cudaMemcpy@PLT
	.cfi_endproc
.LFE2250:
	.size	_Z11copy_to_devv, .-_Z11copy_to_devv
	.globl	_Z13copy_from_devv
	.type	_Z13copy_from_devv, @function
_Z13copy_from_devv:
.LFB2251:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	size_f(%rip), %rdx
	movl	$2, %ecx
	movq	d_x(%rip), %rsi
	movq	h_x(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	size_f(%rip), %rdx
	movl	$2, %ecx
	movq	d_fx(%rip), %rsi
	movq	h_fx(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 8
	jmp	cudaMemcpy@PLT
	.cfi_endproc
.LFE2251:
	.size	_Z13copy_from_devv, .-_Z13copy_from_devv
	.globl	_Z18initial_conditionsv
	.type	_Z18initial_conditionsv, @function
_Z18initial_conditionsv:
.LFB2252:
	.cfi_startproc
	endbr64
	pushq	%rdx
	.cfi_def_cfa_offset 16
	movq	h_threads(%rip), %rdx
	movq	h_x(%rip), %rsi
	movq	gen(%rip), %rdi
	call	curandGenerateUniform@PLT
	movq	h_threads(%rip), %rcx
	movq	h_x(%rip), %rdx
	xorl	%eax, %eax
	movss	.LC35(%rip), %xmm1
.L57:
	cmpq	%rax, %rcx
	jle	.L60
	movss	(%rdx,%rax,4), %xmm0
	addss	%xmm0, %xmm0
	subss	%xmm1, %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	jmp	.L57
.L60:
	movq	size_f(%rip), %rcx
	movq	h_fx(%rip), %rdi
	xorl	%eax, %eax
	rep stosb
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Z11copy_to_devv
	.cfi_endproc
.LFE2252:
	.size	_Z18initial_conditionsv, .-_Z18initial_conditionsv
	.globl	_Z7momentsPf
	.type	_Z7momentsPf, @function
_Z7momentsPf:
.LFB2253:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movss	%xmm0, 12(%rsp)
	call	_Z13copy_from_devv
	movq	h_x(%rip), %r11
	xorl	%r9d, %r9d
	xorps	%xmm4, %xmm4
	movq	h_fx(%rip), %rsi
	movq	%r11, %rdi
	call	_Z6unfoldPfS_
	movl	h_points(%rip), %r15d
	xorl	%eax, %eax
	movq	h_paths(%rip), %r10
	movb	h_domainx(%rip), %dil
	movl	h_spp(%rip), %edx
	movss	.LC37(%rip), %xmm6
	movq	h_dx(%rip), %r8
	movl	h_comp(%rip), %ebp
	movq	h_steps(%rip), %r14
	movq	h_xb(%rip), %r12
	movss	.LC35(%rip), %xmm1
	movss	12(%rsp), %xmm0
.L62:
	cmpl	%eax, %r15d
	jle	.L61
	leaq	0(,%r9,4), %rsi
	xorps	%xmm5, %xmm5
	xorl	%ecx, %ecx
	leaq	(%r11,%rsi), %r13
	movaps	%xmm5, %xmm2
	addq	%r12, %rsi
.L91:
	cmpq	%rcx, %r10
	jle	.L111
	addss	0(%r13,%rcx,4), %xmm2
	addss	(%rsi,%rcx,4), %xmm5
	incq	%rcx
	jmp	.L91
.L111:
	cmpb	$108, %dil
	jne	.L64
	movaps	%xmm1, %xmm0
	divss	(%r8,%rax,4), %xmm0
	jmp	.L106
.L64:
	cmpb	$112, %dil
	jne	.L66
	movss	h_mean(%rip), %xmm3
	ucomiss	%xmm4, %xmm3
	jp	.L92
	je	.L66
.L92:
	mulss	%xmm3, %xmm3
	movaps	%xmm1, %xmm0
	divss	(%r8,%rax,4), %xmm3
	divss	%xmm3, %xmm0
.L106:
	cvtsi2ssl	%edx, %xmm3
	divss	%xmm3, %xmm0
	jmp	.L78
.L66:
	movss	h_lambda(%rip), %xmm3
	ucomiss	%xmm4, %xmm3
	jp	.L93
	je	.L68
.L93:
	movaps	%xmm1, %xmm0
	divss	%xmm3, %xmm0
	cvtsi2ssl	%edx, %xmm3
	divss	%xmm3, %xmm0
.L68:
	cmpb	$109, %dil
	jne	.L70
	movss	(%r8,%rax,4), %xmm8
	movaps	%xmm1, %xmm7
	divss	%xmm8, %xmm7
	testl	%ebp, %ebp
	je	.L71
	movss	h_fb(%rip), %xmm0
	xorps	%xmm6, %xmm0
	movaps	%xmm0, %xmm3
	mulss	%xmm8, %xmm3
	divss	h_fa(%rip), %xmm3
	jmp	.L105
.L71:
	movss	h_mean(%rip), %xmm0
	ucomiss	%xmm4, %xmm0
	jp	.L73
	jne	.L73
	movaps	%xmm1, %xmm0
	divss	h_mub(%rip), %xmm0
	jmp	.L80
.L73:
	movss	h_fb(%rip), %xmm3
	subss	%xmm0, %xmm3
	subss	h_fa(%rip), %xmm0
	mulss	%xmm8, %xmm3
	jmp	.L110
.L70:
	cmpb	$110, %dil
	jne	.L78
	movss	(%r8,%rax,4), %xmm8
	movaps	%xmm1, %xmm7
	divss	%xmm8, %xmm7
	testl	%ebp, %ebp
	je	.L79
	movss	h_fa(%rip), %xmm3
	xorps	.LC37(%rip), %xmm3
	mulss	%xmm8, %xmm3
	divss	h_fb(%rip), %xmm3
	jmp	.L105
.L79:
	movss	h_mean(%rip), %xmm0
	xorps	%xmm3, %xmm3
	ucomiss	%xmm3, %xmm0
	jp	.L81
	jne	.L81
	movaps	%xmm1, %xmm0
	divss	h_mua(%rip), %xmm0
	jmp	.L80
.L81:
	movss	h_fa(%rip), %xmm3
	subss	%xmm0, %xmm3
	subss	h_fb(%rip), %xmm0
	mulss	%xmm8, %xmm3
.L110:
	divss	%xmm0, %xmm3
.L105:
	movaps	%xmm1, %xmm0
	divss	%xmm3, %xmm0
.L80:
	comiss	%xmm7, %xmm0
	cvtsi2ssl	%edx, %xmm3
	jb	.L102
	jmp	.L108
.L78:
	movss	h_mua(%rip), %xmm8
	movss	h_mub(%rip), %xmm3
	ucomiss	%xmm4, %xmm8
	jp	.L85
	jne	.L85
	ucomiss	%xmm4, %xmm3
	jp	.L85
	je	.L77
.L85:
	movaps	%xmm1, %xmm7
	movaps	%xmm1, %xmm0
	divss	%xmm3, %xmm0
	cvtsi2ssl	%edx, %xmm3
	divss	%xmm8, %xmm7
	comiss	%xmm7, %xmm0
	jbe	.L102
.L108:
	divss	%xmm3, %xmm7
	movaps	%xmm7, %xmm0
	jmp	.L77
.L102:
	divss	%xmm3, %xmm0
.L77:
	subss	%xmm5, %xmm2
	movaps	%xmm1, %xmm3
	subss	h_trans(%rip), %xmm3
	addq	%r10, %r9
	cvtsi2ssq	%r14, %xmm5
	mulss	%xmm5, %xmm3
	mulss	%xmm0, %xmm3
	divss	%xmm3, %xmm2
	cvtsi2ssq	%r10, %xmm3
	divss	%xmm3, %xmm2
	movss	%xmm2, (%rbx,%rax,4)
	incq	%rax
	jmp	.L62
.L61:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2253:
	.size	_Z7momentsPf, .-_Z7momentsPf
	.globl	_Z6finishv
	.type	_Z6finishv, @function
_Z6finishv:
.LFB2254:
	.cfi_startproc
	endbr64
	pushq	%rcx
	.cfi_def_cfa_offset 16
	movq	h_x(%rip), %rdi
	call	free@PLT
	movq	h_fx(%rip), %rdi
	call	free@PLT
	movq	gen(%rip), %rdi
	call	curandDestroyGenerator@PLT
	movq	d_x(%rip), %rdi
	call	cudaFree@PLT
	movq	d_fx(%rip), %rdi
	call	cudaFree@PLT
	movq	d_pcd(%rip), %rdi
	call	cudaFree@PLT
	movq	d_dcd(%rip), %rdi
	call	cudaFree@PLT
	movq	d_dst(%rip), %rdi
	call	cudaFree@PLT
	movq	d_states(%rip), %rdi
	call	cudaFree@PLT
	cmpl	$0, h_moments(%rip)
	je	.L112
	movq	h_xb(%rip), %rdi
	call	free@PLT
	movq	h_dx(%rip), %rdi
	call	free@PLT
	movq	d_dx(%rip), %rdi
	popq	%rdx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
.L112:
	.cfi_restore_state
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2254:
	.size	_Z6finishv, .-_Z6finishv
	.globl	_Z52__device_stub__Z12init_dev_rngPjP17curandStateXORWOWPjP17curandStateXORWOW
	.type	_Z52__device_stub__Z12init_dev_rngPjP17curandStateXORWOWPjP17curandStateXORWOW, @function
_Z52__device_stub__Z12init_dev_rngPjP17curandStateXORWOWPjP17curandStateXORWOW:
.LFB2280:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L115
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12init_dev_rngPjP17curandStateXORWOW(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L115:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L117
	call	__stack_chk_fail@PLT
.L117:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2280:
	.size	_Z52__device_stub__Z12init_dev_rngPjP17curandStateXORWOWPjP17curandStateXORWOW, .-_Z52__device_stub__Z12init_dev_rngPjP17curandStateXORWOWPjP17curandStateXORWOW
	.globl	_Z12init_dev_rngPjP17curandStateXORWOW
	.type	_Z12init_dev_rngPjP17curandStateXORWOW, @function
_Z12init_dev_rngPjP17curandStateXORWOW:
.LFB2281:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z12init_dev_rngPjP17curandStateXORWOWPjP17curandStateXORWOW
	.cfi_endproc
.LFE2281:
	.size	_Z12init_dev_rngPjP17curandStateXORWOW, .-_Z12init_dev_rngPjP17curandStateXORWOW
	.globl	_Z7preparev
	.type	_Z7preparev, @function
_Z7preparev:
.LFB2249:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	movq	h_paths(%rip), %rax
	movslq	h_block(%rip), %rcx
	movl	h_moments(%rip), %edi
	movslq	h_points(%rip), %rsi
	cqto
	idivq	%rcx
	imulq	%rcx, %rax
	testl	%edi, %edi
	movq	%rax, h_paths(%rip)
	movq	%rax, h_threads(%rip)
	je	.L121
	imulq	%rsi, %rax
	movq	%rax, h_threads(%rip)
.L121:
	movq	h_threads(%rip), %rbx
	movq	%rbx, %rax
	cqto
	idivq	%rcx
	movl	%eax, h_grid(%rip)
	testl	%edi, %edi
	je	.L122
	movslq	h_spp(%rip), %rax
	imulq	h_periods(%rip), %rax
	movq	%rax, h_steps(%rip)
.L122:
	salq	$2, %rbx
	salq	$2, %rsi
	movq	%rbx, %rdi
	movq	%rsi, size_p(%rip)
	movq	%rbx, size_f(%rip)
	movq	%rbx, size_i(%rip)
	movq	%rbx, size_ui(%rip)
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, h_x(%rip)
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, h_fx(%rip)
	call	malloc@PLT
	movl	$100, %esi
	leaq	gen(%rip), %rdi
	movq	%rax, h_seeds(%rip)
	call	curandCreateGeneratorHost@PLT
	xorl	%edi, %edi
	call	time@PLT
	movq	gen(%rip), %rdi
	movq	%rax, %rsi
	call	curandSetPseudoRandomGeneratorSeed@PLT
	movq	h_threads(%rip), %rdx
	movq	h_seeds(%rip), %rsi
	movq	gen(%rip), %rdi
	call	curandGenerate@PLT
	movq	size_f(%rip), %rsi
	leaq	d_x(%rip), %rdi
	call	cudaMalloc@PLT
	movq	size_f(%rip), %rsi
	leaq	d_fx(%rip), %rdi
	call	cudaMalloc@PLT
	movq	size_ui(%rip), %rsi
	leaq	d_seeds(%rip), %rdi
	call	cudaMalloc@PLT
	movq	size_i(%rip), %rsi
	leaq	d_pcd(%rip), %rdi
	call	cudaMalloc@PLT
	movq	size_i(%rip), %rsi
	leaq	d_dcd(%rip), %rdi
	call	cudaMalloc@PLT
	movq	size_i(%rip), %rsi
	leaq	d_dst(%rip), %rdi
	call	cudaMalloc@PLT
	imulq	$48, h_threads(%rip), %rsi
	leaq	d_states(%rip), %rdi
	call	cudaMalloc@PLT
	movq	size_ui(%rip), %rdx
	movl	$1, %ecx
	movq	h_seeds(%rip), %rsi
	movq	d_seeds(%rip), %rdi
	call	cudaMemcpy@PLT
	movl	h_block(%rip), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	h_grid(%rip), %edx
	movl	%eax, 36(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movl	44(%rsp), %ecx
	movl	%edx, 24(%rsp)
	movq	36(%rsp), %rdx
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L123
	movq	d_states(%rip), %rsi
	movq	d_seeds(%rip), %rdi
	call	_Z52__device_stub__Z12init_dev_rngPjP17curandStateXORWOWPjP17curandStateXORWOW
.L123:
	movq	h_seeds(%rip), %rdi
	call	free@PLT
	movq	d_seeds(%rip), %rdi
	call	cudaFree@PLT
	cmpl	$0, h_moments(%rip)
	je	.L120
	cvtsi2ssq	h_steps(%rip), %xmm0
	mulss	h_trans(%rip), %xmm0
	xorl	%ebx, %ebx
	movq	size_f(%rip), %rdi
	cvttss2siq	%xmm0, %rax
	movq	%rax, h_trigger(%rip)
	call	malloc@PLT
	movq	size_p(%rip), %rdi
	movq	%rax, h_xb(%rip)
	call	malloc@PLT
	movss	h_beginx(%rip), %xmm1
	movss	h_endx(%rip), %xmm0
	cvtsi2ssl	h_points(%rip), %xmm2
	movq	%rax, h_dx(%rip)
	subss	%xmm1, %xmm0
	divss	%xmm2, %xmm0
	movss	%xmm0, 8(%rsp)
.L125:
	cmpl	%ebx, h_points(%rip)
	jle	.L136
	movq	h_dx(%rip), %rax
	cmpl	$0, h_logx(%rip)
	movaps	%xmm1, %xmm0
	leaq	(%rax,%rbx,4), %rbp
	je	.L126
	movss	%xmm1, 12(%rsp)
	call	exp10f@PLT
	movss	12(%rsp), %xmm1
.L126:
	addss	8(%rsp), %xmm1
	movss	%xmm0, 0(%rbp)
	incq	%rbx
	jmp	.L125
.L136:
	movq	size_p(%rip), %rsi
	leaq	d_dx(%rip), %rdi
	call	cudaMalloc@PLT
	movq	size_p(%rip), %rdx
	movl	$1, %ecx
	movq	h_dx(%rip), %rsi
	movq	d_dx(%rip), %rdi
	addq	$56, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	cudaMemcpy@PLT
.L120:
	.cfi_restore_state
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2249:
	.size	_Z7preparev, .-_Z7preparev
	.globl	_Z58__device_stub__Z10init_noisePfPiS0_S0_P17curandStateXORWOWPfPiS0_S0_P17curandStateXORWOW
	.type	_Z58__device_stub__Z10init_noisePfPiS0_S0_P17curandStateXORWOWPfPiS0_S0_P17curandStateXORWOW, @function
_Z58__device_stub__Z10init_noisePfPiS0_S0_P17curandStateXORWOWPfPiS0_S0_P17curandStateXORWOW:
.LFB2282:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L137
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z10init_noisePfPiS0_S0_P17curandStateXORWOW(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L137:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L139
	call	__stack_chk_fail@PLT
.L139:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2282:
	.size	_Z58__device_stub__Z10init_noisePfPiS0_S0_P17curandStateXORWOWPfPiS0_S0_P17curandStateXORWOW, .-_Z58__device_stub__Z10init_noisePfPiS0_S0_P17curandStateXORWOWPfPiS0_S0_P17curandStateXORWOW
	.globl	_Z10init_noisePfPiS0_S0_P17curandStateXORWOW
	.type	_Z10init_noisePfPiS0_S0_P17curandStateXORWOW, @function
_Z10init_noisePfPiS0_S0_P17curandStateXORWOW:
.LFB2283:
	.cfi_startproc
	endbr64
	jmp	_Z58__device_stub__Z10init_noisePfPiS0_S0_P17curandStateXORWOWPfPiS0_S0_P17curandStateXORWOW
	.cfi_endproc
.LFE2283:
	.size	_Z10init_noisePfPiS0_S0_P17curandStateXORWOW, .-_Z10init_noisePfPiS0_S0_P17curandStateXORWOW
	.globl	_Z25__device_stub__Z4foldPfS_PfS_
	.type	_Z25__device_stub__Z4foldPfS_PfS_, @function
_Z25__device_stub__Z4foldPfS_PfS_:
.LFB2284:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L142
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z4foldPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L142:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L144
	call	__stack_chk_fail@PLT
.L144:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2284:
	.size	_Z25__device_stub__Z4foldPfS_PfS_, .-_Z25__device_stub__Z4foldPfS_PfS_
	.globl	_Z4foldPfS_
	.type	_Z4foldPfS_, @function
_Z4foldPfS_:
.LFB2285:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z4foldPfS_PfS_
	.cfi_endproc
.LFE2285:
	.size	_Z4foldPfS_, .-_Z4foldPfS_
	.globl	_Z61__device_stub__Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOWPfS_PiS0_S0_P17curandStateXORWOW
	.type	_Z61__device_stub__Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOWPfS_PiS0_S0_P17curandStateXORWOW, @function
_Z61__device_stub__Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOWPfS_PiS0_S0_P17curandStateXORWOW:
.LFB2286:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L147
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOW(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L147:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L149
	call	__stack_chk_fail@PLT
.L149:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2286:
	.size	_Z61__device_stub__Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOWPfS_PiS0_S0_P17curandStateXORWOW, .-_Z61__device_stub__Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOWPfS_PiS0_S0_P17curandStateXORWOW
	.globl	_Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOW
	.type	_Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOW, @function
_Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOW:
.LFB2287:
	.cfi_startproc
	endbr64
	jmp	_Z61__device_stub__Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOWPfS_PiS0_S0_P17curandStateXORWOW
	.cfi_endproc
.LFE2287:
	.size	_Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOW, .-_Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOW
	.section	.rodata.str1.1
.LC38:
	.string	"1d"
.LC39:
	.string	"#%c <<v>>\n"
.LC40:
	.string	"%e %e\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2255:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rsi, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	call	_Z9parse_claiPPc
	cmpl	$0, h_moments(%rip)
	jne	.L153
	movq	%rbx, %rdi
	call	_Z5usagePPc
	orl	$-1, %eax
	jmp	.L152
.L153:
	call	_Z7preparev
	call	_Z18initial_conditionsv
	cmpl	$0, h_moments(%rip)
	je	.L155
	movq	size_p(%rip), %rdi
	call	malloc@PLT
	movq	h_domain(%rip), %rdi
	leaq	.LC38(%rip), %rsi
	movq	%rax, %rbp
	call	strcmp@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L156
.L165:
	movq	%rbp, %rdi
	call	free@PLT
	jmp	.L155
.L156:
	movl	h_block(%rip), %eax
	movl	h_grid(%rip), %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%eax, 20(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 24(%rsp)
	movl	28(%rsp), %ecx
	movl	%edx, 8(%rsp)
	movq	20(%rsp), %rdx
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L157
	movq	d_states(%rip), %r8
	movq	d_dst(%rip), %rcx
	movq	d_dcd(%rip), %rdx
	movq	d_pcd(%rip), %rsi
	movq	d_dx(%rip), %rdi
	call	_Z58__device_stub__Z10init_noisePfPiS0_S0_P17curandStateXORWOWPfPiS0_S0_P17curandStateXORWOW
.L157:
	movabsq	$4294967297, %r12
.L158:
	movslq	%ebx, %r13
	cmpq	h_steps(%rip), %r13
	jge	.L167
	movl	h_block(%rip), %eax
	movq	%r12, 24(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r12, 12(%rsp)
	movl	28(%rsp), %ecx
	movl	%eax, 20(%rsp)
	movl	h_grid(%rip), %eax
	movq	20(%rsp), %rdx
	movl	16(%rsp), %esi
	movl	%eax, 8(%rsp)
	movq	8(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L159
	movq	d_states(%rip), %r9
	movq	d_dst(%rip), %r8
	movq	d_dcd(%rip), %rcx
	movq	d_pcd(%rip), %rdx
	movq	d_dx(%rip), %rsi
	movq	d_x(%rip), %rdi
	call	_Z61__device_stub__Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOWPfS_PiS0_S0_P17curandStateXORWOW
.L159:
	movl	h_block(%rip), %eax
	movq	%r12, 24(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r12, 12(%rsp)
	movl	28(%rsp), %ecx
	movl	%eax, 20(%rsp)
	movl	h_grid(%rip), %eax
	movq	20(%rsp), %rdx
	movl	16(%rsp), %esi
	movl	%eax, 8(%rsp)
	movq	8(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L160
	movq	d_fx(%rip), %rsi
	movq	d_x(%rip), %rdi
	call	_Z25__device_stub__Z4foldPfS_PfS_
.L160:
	cmpq	%r13, h_trigger(%rip)
	jne	.L161
	movq	size_f(%rip), %rdx
	movq	d_x(%rip), %rsi
	movl	$2, %ecx
	movq	h_xb(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	d_fx(%rip), %rsi
	movl	$2, %ecx
	movq	h_fx(%rip), %rdi
	movq	size_f(%rip), %rdx
	call	cudaMemcpy@PLT
	movq	h_fx(%rip), %rsi
	movq	h_xb(%rip), %rdi
	call	_Z6unfoldPfS_
.L161:
	addl	h_samples(%rip), %ebx
	jmp	.L158
.L167:
	movq	%rbp, %rdi
	xorl	%ebx, %ebx
	leaq	.LC40(%rip), %r12
	call	_Z7momentsPf
	movsbl	h_domainx(%rip), %edx
	leaq	.LC39(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L163:
	cmpl	%ebx, h_points(%rip)
	jle	.L165
	movq	h_dx(%rip), %rax
	movq	%r12, %rsi
	movl	$2, %edi
	cvtss2sd	0(%rbp,%rbx,4), %xmm1
	cvtss2sd	(%rax,%rbx,4), %xmm0
	movb	$2, %al
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L163
.L155:
	call	_Z6finishv
	xorl	%eax, %eax
.L152:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2255:
	.size	main, .-main
	.section	.rodata.str1.1
.LC41:
	.string	"_Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOW"
.LC42:
	.string	"_Z4foldPfS_"
.LC43:
	.string	"_Z10init_noisePfPiS0_S0_P17curandStateXORWOW"
.LC44:
	.string	"_Z12init_dev_rngPjP17curandStateXORWOW"
.LC45:
	.string	"precalc_xorwow_matrix"
.LC46:
	.string	"precalc_xorwow_offset_matrix"
.LC47:
	.string	"mrg32k3aM1"
.LC48:
	.string	"mrg32k3aM2"
.LC49:
	.string	"mrg32k3aM1SubSeq"
.LC50:
	.string	"mrg32k3aM2SubSeq"
.LC51:
	.string	"mrg32k3aM1Seq"
.LC52:
	.string	"mrg32k3aM2Seq"
.LC53:
	.string	"__cr_lgamma_table"
.LC54:
	.string	"d_Dg"
.LC55:
	.string	"d_Dp"
.LC56:
	.string	"d_lambda"
.LC57:
	.string	"d_mean"
.LC58:
	.string	"d_fa"
.LC59:
	.string	"d_fb"
.LC60:
	.string	"d_mua"
.LC61:
	.string	"d_mub"
.LC62:
	.string	"d_comp"
.LC63:
	.string	"d_spp"
.LC64:
	.string	"d_samples"
.LC65:
	.string	"d_paths"
.LC66:
	.string	"d_domainx"
.LC67:
	.string	"d_points"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2289:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC41(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11run_momentsPfS_PiS0_S0_P17curandStateXORWOW(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC42(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z4foldPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC43(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10init_noisePfPiS0_S0_P17curandStateXORWOW(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC44(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12init_dev_rngPjP17curandStateXORWOW(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC45(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC46(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC47(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC48(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC49(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC50(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC51(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC52(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC53(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$72, %r9d
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC54(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL4d_Dg(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC55(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL4d_Dp(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC56(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL8d_lambda(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC57(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL6d_mean(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC58(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL4d_fa(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC59(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL4d_fb(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC60(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL5d_mua(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC61(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL5d_mub(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC62(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL6d_comp(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC63(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL5d_spp(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC64(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL9d_samples(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC65(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL7d_paths(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC66(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZL9d_domainx(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC67(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$4, %r9d
	movq	%rdx, %rcx
	leaq	_ZL8d_points(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2289:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.str1.1
.LC68:
	.string	"Dg"
.LC69:
	.string	"Dp"
.LC70:
	.string	"lambda"
.LC71:
	.string	"fa"
.LC72:
	.string	"fb"
.LC73:
	.string	"mua"
.LC74:
	.string	"mub"
.LC75:
	.string	"comp"
.LC76:
	.string	"mean"
.LC77:
	.string	"dev"
.LC78:
	.string	"block"
.LC79:
	.string	"paths"
.LC80:
	.string	"periods"
.LC81:
	.string	"trans"
.LC82:
	.string	"spp"
.LC83:
	.string	"samples"
.LC84:
	.string	"mode"
.LC85:
	.string	"domain"
.LC86:
	.string	"domainx"
.LC87:
	.string	"logx"
.LC88:
	.string	"points"
.LC89:
	.string	"beginx"
.LC90:
	.string	"endx"
	.section	.data.rel.local,"aw"
	.align 32
	.type	_ZL7options, @object
	.size	_ZL7options, 736
_ZL7options:
	.quad	.LC68
	.long	1
	.zero	4
	.quad	0
	.long	97
	.zero	4
	.quad	.LC69
	.long	1
	.zero	4
	.quad	0
	.long	98
	.zero	4
	.quad	.LC70
	.long	1
	.zero	4
	.quad	0
	.long	99
	.zero	4
	.quad	.LC71
	.long	1
	.zero	4
	.quad	0
	.long	100
	.zero	4
	.quad	.LC72
	.long	1
	.zero	4
	.quad	0
	.long	101
	.zero	4
	.quad	.LC73
	.long	1
	.zero	4
	.quad	0
	.long	102
	.zero	4
	.quad	.LC74
	.long	1
	.zero	4
	.quad	0
	.long	103
	.zero	4
	.quad	.LC75
	.long	1
	.zero	4
	.quad	0
	.long	104
	.zero	4
	.quad	.LC76
	.long	1
	.zero	4
	.quad	0
	.long	105
	.zero	4
	.quad	.LC77
	.long	1
	.zero	4
	.quad	0
	.long	106
	.zero	4
	.quad	.LC78
	.long	1
	.zero	4
	.quad	0
	.long	107
	.zero	4
	.quad	.LC79
	.long	1
	.zero	4
	.quad	0
	.long	108
	.zero	4
	.quad	.LC80
	.long	1
	.zero	4
	.quad	0
	.long	109
	.zero	4
	.quad	.LC81
	.long	1
	.zero	4
	.quad	0
	.long	110
	.zero	4
	.quad	.LC82
	.long	1
	.zero	4
	.quad	0
	.long	111
	.zero	4
	.quad	.LC83
	.long	1
	.zero	4
	.quad	0
	.long	112
	.zero	4
	.quad	.LC84
	.long	1
	.zero	4
	.quad	0
	.long	113
	.zero	4
	.quad	.LC85
	.long	1
	.zero	4
	.quad	0
	.long	114
	.zero	4
	.quad	.LC86
	.long	1
	.zero	4
	.quad	0
	.long	115
	.zero	4
	.quad	.LC87
	.long	1
	.zero	4
	.quad	0
	.long	116
	.zero	4
	.quad	.LC88
	.long	1
	.zero	4
	.quad	0
	.long	117
	.zero	4
	.quad	.LC89
	.long	1
	.zero	4
	.quad	0
	.long	118
	.zero	4
	.quad	.LC90
	.long	1
	.zero	4
	.quad	0
	.long	119
	.zero	4
	.globl	gen
	.bss
	.align 8
	.type	gen, @object
	.size	gen, 8
gen:
	.zero	8
	.globl	size_p
	.align 8
	.type	size_p, @object
	.size	size_p, 8
size_p:
	.zero	8
	.globl	size_ui
	.align 8
	.type	size_ui, @object
	.size	size_ui, 8
size_ui:
	.zero	8
	.globl	size_i
	.align 8
	.type	size_i, @object
	.size	size_i, 8
size_i:
	.zero	8
	.globl	size_f
	.align 8
	.type	size_f, @object
	.size	size_f, 8
size_f:
	.zero	8
	.globl	d_states
	.align 8
	.type	d_states, @object
	.size	d_states, 8
d_states:
	.zero	8
	.globl	d_seeds
	.align 8
	.type	d_seeds, @object
	.size	d_seeds, 8
d_seeds:
	.zero	8
	.globl	h_seeds
	.align 8
	.type	h_seeds, @object
	.size	h_seeds, 8
h_seeds:
	.zero	8
	.globl	d_dst
	.align 8
	.type	d_dst, @object
	.size	d_dst, 8
d_dst:
	.zero	8
	.globl	d_dcd
	.align 8
	.type	d_dcd, @object
	.size	d_dcd, 8
d_dcd:
	.zero	8
	.globl	d_pcd
	.align 8
	.type	d_pcd, @object
	.size	d_pcd, 8
d_pcd:
	.zero	8
	.globl	d_dx
	.align 8
	.type	d_dx, @object
	.size	d_dx, 8
d_dx:
	.zero	8
	.globl	d_fx
	.align 8
	.type	d_fx, @object
	.size	d_fx, 8
d_fx:
	.zero	8
	.globl	d_x
	.align 8
	.type	d_x, @object
	.size	d_x, 8
d_x:
	.zero	8
	.globl	h_dx
	.align 8
	.type	h_dx, @object
	.size	h_dx, 8
h_dx:
	.zero	8
	.globl	h_fx
	.align 8
	.type	h_fx, @object
	.size	h_fx, 8
h_fx:
	.zero	8
	.globl	h_xb
	.align 8
	.type	h_xb, @object
	.size	h_xb, 8
h_xb:
	.zero	8
	.globl	h_x
	.align 8
	.type	h_x, @object
	.size	h_x, 8
h_x:
	.zero	8
	.local	_ZL8d_points
	.comm	_ZL8d_points,4,4
	.local	_ZL9d_domainx
	.comm	_ZL9d_domainx,1,1
	.globl	h_moments
	.align 4
	.type	h_moments, @object
	.size	h_moments, 4
h_moments:
	.zero	4
	.globl	h_points
	.align 4
	.type	h_points, @object
	.size	h_points, 4
h_points:
	.zero	4
	.globl	h_logx
	.align 4
	.type	h_logx, @object
	.size	h_logx, 4
h_logx:
	.zero	4
	.globl	h_endx
	.align 4
	.type	h_endx, @object
	.size	h_endx, 4
h_endx:
	.zero	4
	.globl	h_beginx
	.align 4
	.type	h_beginx, @object
	.size	h_beginx, 4
h_beginx:
	.zero	4
	.globl	h_domainx
	.type	h_domainx, @object
	.size	h_domainx, 1
h_domainx:
	.zero	1
	.globl	h_domain
	.align 8
	.type	h_domain, @object
	.size	h_domain, 8
h_domain:
	.zero	8
	.local	_ZL7d_paths
	.comm	_ZL7d_paths,8,8
	.local	_ZL9d_samples
	.comm	_ZL9d_samples,4,4
	.local	_ZL5d_spp
	.comm	_ZL5d_spp,4,4
	.globl	h_trigger
	.align 8
	.type	h_trigger, @object
	.size	h_trigger, 8
h_trigger:
	.zero	8
	.globl	h_steps
	.align 8
	.type	h_steps, @object
	.size	h_steps, 8
h_steps:
	.zero	8
	.globl	h_threads
	.align 8
	.type	h_threads, @object
	.size	h_threads, 8
h_threads:
	.zero	8
	.globl	h_periods
	.align 8
	.type	h_periods, @object
	.size	h_periods, 8
h_periods:
	.zero	8
	.globl	h_paths
	.align 8
	.type	h_paths, @object
	.size	h_paths, 8
h_paths:
	.zero	8
	.globl	h_samples
	.align 4
	.type	h_samples, @object
	.size	h_samples, 4
h_samples:
	.zero	4
	.globl	h_spp
	.align 4
	.type	h_spp, @object
	.size	h_spp, 4
h_spp:
	.zero	4
	.globl	h_grid
	.align 4
	.type	h_grid, @object
	.size	h_grid, 4
h_grid:
	.zero	4
	.globl	h_block
	.align 4
	.type	h_block, @object
	.size	h_block, 4
h_block:
	.zero	4
	.globl	h_dev
	.align 4
	.type	h_dev, @object
	.size	h_dev, 4
h_dev:
	.zero	4
	.globl	h_trans
	.align 4
	.type	h_trans, @object
	.size	h_trans, 4
h_trans:
	.zero	4
	.globl	h_comp
	.align 4
	.type	h_comp, @object
	.size	h_comp, 4
h_comp:
	.zero	4
	.globl	h_mean
	.align 4
	.type	h_mean, @object
	.size	h_mean, 4
h_mean:
	.zero	4
	.globl	h_mub
	.align 4
	.type	h_mub, @object
	.size	h_mub, 4
h_mub:
	.zero	4
	.globl	h_mua
	.align 4
	.type	h_mua, @object
	.size	h_mua, 4
h_mua:
	.zero	4
	.globl	h_fb
	.align 4
	.type	h_fb, @object
	.size	h_fb, 4
h_fb:
	.zero	4
	.globl	h_fa
	.align 4
	.type	h_fa, @object
	.size	h_fa, 4
h_fa:
	.zero	4
	.globl	h_lambda
	.align 4
	.type	h_lambda, @object
	.size	h_lambda, 4
h_lambda:
	.zero	4
	.local	_ZL6d_comp
	.comm	_ZL6d_comp,4,4
	.local	_ZL5d_mub
	.comm	_ZL5d_mub,4,4
	.local	_ZL5d_mua
	.comm	_ZL5d_mua,4,4
	.local	_ZL4d_fb
	.comm	_ZL4d_fb,4,4
	.local	_ZL4d_fa
	.comm	_ZL4d_fa,4,4
	.local	_ZL6d_mean
	.comm	_ZL6d_mean,4,4
	.local	_ZL8d_lambda
	.comm	_ZL8d_lambda,4,4
	.local	_ZL4d_Dp
	.comm	_ZL4d_Dp,4,4
	.local	_ZL4d_Dg
	.comm	_ZL4d_Dg,4,4
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC35:
	.long	1065353216
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC37:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 * Overdamped Brownian particle in symmetric piecewise linear potential
 *
 * \dot{x} = -V'(x) + Gaussian, Poissonian and dichotomous noise
 *
 */

#include <stdio.h>
#include <getopt.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>

#include <hip/hip_runtime.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>

#define PI 3.14159265358979f

//model
__constant__ float d_Dg, d_Dp, d_lambda, d_mean, d_fa, d_fb, d_mua, d_mub;
__constant__ int d_comp;
float h_lambda, h_fa, h_fb, h_mua, h_mub, h_mean;
int h_comp;

//simulation
float h_trans;
int h_dev, h_block, h_grid, h_spp, h_samples;
long h_paths, h_periods, h_threads, h_steps, h_trigger;
__constant__ int d_spp, d_samples;
__constant__ long d_paths;

//output
char *h_domain;
char h_domainx;
float h_beginx, h_endx;
int h_logx, h_points, h_moments;
__constant__ char d_domainx;
__constant__ int d_points;

//vector
float *h_x, *h_xb, *h_fx, *h_dx;
float *d_x, *d_fx, *d_dx;
int *d_pcd, *d_dcd, *d_dst;
unsigned int *h_seeds, *d_seeds;
hiprandState *d_states;

size_t size_f, size_i, size_ui, size_p;
hiprandGenerator_t gen;

static struct option options[] = {
    {"Dg", required_argument, NULL, 'a'},
    {"Dp", required_argument, NULL, 'b'},
    {"lambda", required_argument, NULL, 'c'},
    {"fa", required_argument, NULL, 'd'},
    {"fb", required_argument, NULL, 'e'},
    {"mua", required_argument, NULL, 'f'},
    {"mub", required_argument, NULL, 'g'},
    {"comp", required_argument, NULL, 'h'},
    {"mean", required_argument, NULL, 'i'},
    {"dev", required_argument, NULL, 'j'},
    {"block", required_argument, NULL, 'k'},
    {"paths", required_argument, NULL, 'l'},
    {"periods", required_argument, NULL, 'm'},
    {"trans", required_argument, NULL, 'n'},
    {"spp", required_argument, NULL, 'o'},
    {"samples", required_argument, NULL, 'p'},
    {"mode", required_argument, NULL, 'q'},
    {"domain", required_argument, NULL, 'r'},
    {"domainx", required_argument, NULL, 's'},
    {"logx", required_argument, NULL, 't'},
    {"points", required_argument, NULL, 'u'},
    {"beginx", required_argument, NULL, 'v'},
    {"endx", required_argument, NULL, 'w'}
};

void usage(char **argv)
{
    printf("Usage: %s <params> \n\n", argv[0]);
    printf("Model params:\n");
    printf("    -a, --Dg=FLOAT          set the Gaussian noise intensity 'D_G' to FLOAT\n");
    printf("    -b, --Dp=FLOAT          set the Poissonian noise intensity 'D_P' to FLOAT\n");
    printf("    -c, --lambda=FLOAT      set the Poissonian kicks frequency '\\lambda' to FLOAT\n");
    printf("    -d, --fa=FLOAT          set the first state of the dichotomous noise 'F_a' to FLOAT\n");
    printf("    -e, --fb=FLOAT          set the second state of the dichotomous noise 'F_b' to FLOAT\n");
    printf("    -f, --mua=FLOAT         set the transition rate of the first state of dichotomous noise '\\mu_a' to FLOAT\n");
    printf("    -g, --mub=FLOAT         set the transition rate of the second state of dichotomous noise '\\mu_b' to FLOAT\n");
    printf("    -h, --comp=INT          choose between biased and unbiased Poissonian or dichotomous noise. INT can be one of:\n");
    printf("                            0: biased; 1: unbiased\n");
    printf("    -i, --mean=FLOAT        if is nonzero, fix the mean value of Poissonian noise or dichotomous noise to FLOAT, matters only for domains p, l, a, b, m or n\n");
    printf("Simulation params:\n");
    printf("    -j, --dev=INT           set the gpu device to INT\n");
    printf("    -k, --block=INT         set the gpu block size to INT\n");
    printf("    -l, --paths=LONG        set the number of paths to LONG\n");
    printf("    -m, --periods=LONG      set the number of periods to LONG\n");
    printf("    -n, --trans=FLOAT       specify fraction FLOAT of periods which stands for transients\n");
    printf("    -o, --spp=INT           specify how many integration steps should be calculated for the smallest characteristic time scale\n");
    printf("    -p, --samples=INT       specify how many integration steps should be calculated for a single kernel call\n");
    printf("Output params:\n");
    printf("    -q, --mode=STRING       sets the output mode. STRING can be one of:\n");
    printf("                            moments: the first moment <<v>>\n");
    printf("    -r, --domain=STRING     simultaneously scan over one or two model params. STRING can be one of:\n");
    printf("                            1d: only one parameter\n");
    printf("    -s, --domainx=CHAR      sets the first domain of the moments. CHAR can be one of:\n");
    printf("                            D: Dg; p: Dp; l: lambda; a: fa; b: fb; m: mua; n: mub\n");
    printf("    -t, --logx=INT          choose between linear and logarithmic scale of the domainx\n");
    printf("                            0: linear; 1: logarithmic\n");
    printf("    -u, --points=INT        set the number of samples to generate between begin and end\n");
    printf("    -v, --beginx=FLOAT      set the starting value of the domainx to FLOAT\n");
    printf("    -w, --endx=FLOAT        set the end value of the domainx to FLOAT\n");
    printf("\n");
}

void parse_cla(int argc, char **argv)
{
    float ftmp;
    int c, itmp;

    while( (c = getopt_long(argc, argv, "a:b:c:d:e:f:g:h:i:j:k:l:m:n:o:p:q:r:s:t:u:v:w", options, NULL)) != EOF) {
        switch (c) {
            case 'a':
                ftmp = atof(optarg);
                hipMemcpyToSymbol(HIP_SYMBOL(d_Dg), &ftmp, sizeof(float));
                break;
            case 'b':
                ftmp = atof(optarg);
                hipMemcpyToSymbol(HIP_SYMBOL(d_Dp), &ftmp, sizeof(float));
                break;
            case 'c':
                h_lambda = atof(optarg);
                hipMemcpyToSymbol(HIP_SYMBOL(d_lambda), &h_lambda, sizeof(float));
                break;
            case 'd':
                h_fa = atof(optarg);
                hipMemcpyToSymbol(HIP_SYMBOL(d_fa), &h_fa, sizeof(float));
                break;
            case 'e':
                h_fb = atof(optarg);
                hipMemcpyToSymbol(HIP_SYMBOL(d_fb), &h_fb, sizeof(float));
                break;
            case 'f':
                h_mua = atof(optarg);
                hipMemcpyToSymbol(HIP_SYMBOL(d_mua), &h_mua, sizeof(float));
                break;
            case 'g':
                h_mub = atof(optarg);
                hipMemcpyToSymbol(HIP_SYMBOL(d_mub), &h_mub, sizeof(float));
                break;
            case 'h':
                h_comp = atoi(optarg);
                hipMemcpyToSymbol(HIP_SYMBOL(d_comp), &h_comp, sizeof(int));
                break;
            case 'i':
                h_mean = atof(optarg);
                hipMemcpyToSymbol(HIP_SYMBOL(d_mean), &h_mean, sizeof(float));
                break;
            case 'j':
                itmp = atoi(optarg);
                hipSetDevice(itmp);
                break;
            case 'k':
                h_block = atoi(optarg);
                break;
            case 'l':
                h_paths = atol(optarg);
                hipMemcpyToSymbol(HIP_SYMBOL(d_paths), &h_paths, sizeof(long));
                break;
            case 'm':
                h_periods = atol(optarg);
                break;
            case 'n':
                h_trans = atof(optarg);
                break;
            case 'o':
                h_spp = atoi(optarg);
                hipMemcpyToSymbol(HIP_SYMBOL(d_spp), &h_spp, sizeof(int));
                break;
            case 'p':
                h_samples = atoi(optarg);
                hipMemcpyToSymbol(HIP_SYMBOL(d_samples), &h_samples, sizeof(int));
                break;
            case 'q':
                if ( !strcmp(optarg, "moments") ) {
                    h_moments = 1;
                }
                break;
            case 'r':
                h_domain = optarg;
                break;
            case 's':
                h_domainx = optarg[0]; 
                hipMemcpyToSymbol(HIP_SYMBOL(d_domainx), &h_domainx, sizeof(char));
                break;
            case 't':
                h_logx = atoi(optarg);
                break;
            case 'u':
                h_points = atoi(optarg);
                hipMemcpyToSymbol(HIP_SYMBOL(d_points), &h_points, sizeof(int));
                break;
            case 'v':
                h_beginx = atof(optarg);
                break;
            case 'w':
                h_endx = atof(optarg);
                break;
        }
    }
}

__global__ void init_dev_rng(unsigned int *d_seeds, hiprandState *d_states)
{
    long idx = blockIdx.x * blockDim.x + threadIdx.x;

    hiprand_init(d_seeds[idx], 0, 0, &d_states[idx]);
}

__device__ float drift(float l_x)
{    
    if (-sinf(PI*l_x) < 0.0f) {
        return -1.0f;
    } else {
        return 1.0f;
    }
}

__device__ float diffusion(float l_Dg, float l_dt, hiprandState *l_state)
{
    if (l_Dg != 0.0f) {
        float r = hiprand_uniform(l_state);
        float g = sqrtf(2.0f*l_Dg);
        if ( r <= 1.0f/6.0f ) {
            return -g*sqrtf(3.0f*l_dt);
        } else if ( r > 1.0f/6.0f && r <= 1.0f/3.0f ) {
            return g*sqrtf(3.0f*l_dt);
        } else {
            return 0.0f;
        }
    } else {
        return 0.0f;
    }
}

__global__ void init_noise(float *d_dx, int *d_pcd, int *d_dcd, int *d_dst, hiprandState *d_states)
//init noise
{
    long idx = blockIdx.x * blockDim.x + threadIdx.x;
    float l_dx; 
    hiprandState l_state;

    //cache model parameters in local variables
    l_state = d_states[idx];

    float l_Dp, l_lambda, l_mean, l_fa, l_fb, l_mua, l_mub;
    int l_comp;

    l_Dp = d_Dp;
    l_lambda = d_lambda;
    l_comp = d_comp;
    l_mean = d_mean;
    l_fa = d_fa;
    l_fb = d_fb;
    l_mua = d_mua;
    l_mub = d_mub;

    long ridx = (idx/d_paths) % d_points;
    l_dx = d_dx[ridx];

    switch(d_domainx) {
        case 'p':
            l_Dp = l_dx;
            if (l_mean != 0.0f) l_lambda = (l_mean*l_mean)/l_Dp;
            break;
        case 'l':
            l_lambda = l_dx;
            if (l_mean != 0.0f) l_Dp = (l_mean*l_mean)/l_lambda;
            break;
        case 'a':
            l_fa = l_dx;
            if (l_comp == 1) {
                l_fb = -l_fa*l_mub/l_mua;
            } else if (l_mean != 0.0f) {
                l_fb = (l_mean*(l_mua + l_mub) - l_fa*l_mub)/l_mua;
            }
            break;
        case 'b':
            l_fb = l_dx;
            if (l_comp == 1) {
                l_fa = -l_fb*l_mua/l_mub;
            } else if (l_mean != 0.0f) {
                l_fa = (l_mean*(l_mua + l_mub) - l_fb*l_mua)/l_mub;
            }
            break;
        case 'm':
            l_mua = l_dx;
            if (l_comp == 1) {
                l_mub = -l_fb*l_mua/l_fa;
            } else if (l_mean != 0.0f) {
                l_mub = (l_fb - l_mean)*l_mua/(l_mean - l_fa);
            }
            break;
        case 'n':
            l_mub = l_dx;
            if (l_comp == 1) {
                l_mua = -l_fa*l_mub/l_fb;
            } else if (l_mean != 0.0f) {
                l_mua = (l_fa - l_mean)*l_mub/(l_mean - l_fb);
            }
            break;
    }

    //step size
    float l_dt;
    int l_spp;

    l_spp = d_spp;

    if (l_lambda != 0.0f) {
        l_dt = 1.0f/l_lambda/l_spp;
    }

    if (l_mua != 0.0f) {
        float taua, taub;

        taua = 1.0f/l_mua;
        taub = 1.0f/l_mub;

        if (taua < taub) {
            l_dt = taua/l_spp;
        } else {
            l_dt = taub/l_spp;
        }
    }

    //jump countdowns
    int l_pcd, l_dcd, l_dst;
    
    if (l_lambda != 0.0f) l_pcd = (int) floorf( -logf( hiprand_uniform(&l_state) )/l_lambda/l_dt + 0.5f );

    if (l_mua != 0.0f) {
        float rn;
        rn = hiprand_uniform(&l_state);

        if (rn < 0.5f) {
            l_dst = 0;
            l_dcd = (int) floorf( -logf( hiprand_uniform(&l_state) )/l_mua/l_dt + 0.5f);
        } else {
            l_dst = 1;
            l_dcd = (int) floorf( -logf( hiprand_uniform(&l_state) )/l_mub/l_dt + 0.5f);
        }
    }
    
    //write back noise states to the global memory
    d_pcd[idx] = l_pcd;
    d_dcd[idx] = l_dcd;
    d_dst[idx] = l_dst;
    d_states[idx] = l_state;
}

__device__ float adapted_jump_poisson(int &npcd, int pcd, float l_lambda, float l_Dp, int l_comp, float l_dt, hiprandState *l_state)
{
    if (l_lambda != 0.0f) {
        if (pcd <= 0) {
            float ampmean = sqrtf(l_lambda/l_Dp);
           
            npcd = (int) floorf( -logf( hiprand_uniform(l_state) )/l_lambda/l_dt + 0.5f );

            if (l_comp) {
                float comp = sqrtf(l_Dp*l_lambda)*l_dt;
                
                return -logf( hiprand_uniform(l_state) )/ampmean - comp;
            } else {
                return -logf( hiprand_uniform(l_state) )/ampmean;
            }
        } else {
            npcd = pcd - 1;
            if (l_comp) {
                float comp = sqrtf(l_Dp*l_lambda)*l_dt;
                
                return -comp;
            } else {
                return 0.0f;
            }
        }
    } else {
        return 0.0f;
    }
}

__device__ float adapted_jump_dich(int &ndcd, int dcd, int &ndst, int dst, float l_fa, float l_fb, float l_mua, float l_mub, float l_dt, hiprandState *l_state)
{
    if (l_mua != 0.0f) {
        if (dcd <= 0) {
            if (dst == 0) {
                ndst = 1; 
                ndcd = (int) floorf( -logf( hiprand_uniform(l_state) )/l_mub/l_dt + 0.5f );
                return l_fb*l_dt;
            } else {
                ndst = 0;
                ndcd = (int) floorf( -logf( hiprand_uniform(l_state) )/l_mua/l_dt + 0.5f );
                return l_fa*l_dt;
            }
        } else {
            ndcd = dcd - 1;
            if (dst == 0) {
                return l_fa*l_dt;
            } else {
                return l_fb*l_dt;
            }
        }
    } else {
        return 0.0f;
    }
}

__device__ void predcorr(float &corrl_x, float l_x, int &npcd, int pcd, hiprandState *l_state, \
                         float l_Dg, float l_Dp, float l_lambda, int l_comp, \
                         int &ndcd, int dcd, int &ndst, int dst, float l_fa, float l_fb, float l_mua, float l_mub, float l_dt)
/* simplified weak order 2.0 adapted predictor-corrector scheme
( see E. Platen, N. Bruti-Liberati; Numerical Solution of Stochastic Differential Equations with Jumps in Finance; Springer 2010; p. 503, p. 532 )
*/
{
    float l_xt, l_xtt, predl_x;

    l_xt = drift(l_x);

    predl_x = l_x + l_xt*l_dt + diffusion(l_Dg, l_dt, l_state);

    l_xtt = drift(predl_x);

    predl_x = l_x + 0.5f*(l_xt + l_xtt)*l_dt + diffusion(l_Dg, l_dt, l_state);

    l_xtt = drift(predl_x);

    corrl_x = l_x + 0.5f*(l_xt + l_xtt)*l_dt + adapted_jump_dich(ndcd, dcd, ndst, dst, l_fa, l_fb, l_mua, l_mub, l_dt, l_state) + diffusion(l_Dg, l_dt, l_state) + adapted_jump_poisson(npcd, pcd, l_lambda, l_Dp, l_comp, l_dt, l_state);
}

__global__ void fold(float *d_x, float *d_fx)
{
    long idx = blockIdx.x * blockDim.x + threadIdx.x;
    float l_x, l_fx, f;

    l_x = d_x[idx];
    l_fx = d_fx[idx];

    f = floorf(l_x/2.0f)*2.0f;
    l_x = l_x - f;
    l_fx = l_fx + f;

    d_x[idx] = l_x;
    d_fx[idx] = l_fx;
}

void unfold(float *x, float *fx)
{
    int i;

    for (i = 0; i < h_threads; i++) {
        x[i] = x[i] + fx[i];
    }
}

__global__ void run_moments(float *d_x, float *d_dx, int *d_pcd, int *d_dcd, int *d_dst, hiprandState *d_states)
//actual moments kernel
{
    long idx = blockIdx.x * blockDim.x + threadIdx.x;
    float l_x, l_dx; 
    hiprandState l_state;

    //cache path and model parameters in local variables
    l_x = d_x[idx];
    l_state = d_states[idx];

    float l_Dg, l_Dp, l_lambda, l_mean, l_fa, l_fb, l_mua, l_mub;
    int l_comp;

    l_Dg = d_Dg;
    l_Dp = d_Dp;
    l_lambda = d_lambda;
    l_comp = d_comp;
    l_mean = d_mean;
    l_fa = d_fa;
    l_fb = d_fb;
    l_mua = d_mua;
    l_mub = d_mub;

    //run simulation for multiple values of the system parameters
    long ridx = (idx/d_paths) % d_points;
    l_dx = d_dx[ridx];

    switch(d_domainx) {
        case 'D':
            l_Dg = l_dx;
            break;
        case 'p':
            l_Dp = l_dx;
            if (l_mean != 0.0f) l_lambda = (l_mean*l_mean)/l_Dp;
            break;
        case 'l':
            l_lambda = l_dx;
            if (l_mean != 0.0f) l_Dp = (l_mean*l_mean)/l_lambda;
            break;
        case 'a':
            l_fa = l_dx;
            if (l_comp == 1) {
                l_fb = -l_fa*l_mub/l_mua;
            } else if (l_mean != 0.0f) {
                l_fb = (l_mean*(l_mua + l_mub) - l_fa*l_mub)/l_mua;
            }
            break;
        case 'b':
            l_fb = l_dx;
            if (l_comp == 1) {
                l_fa = -l_fb*l_mua/l_mub;
            } else if (l_mean != 0.0f) {
                l_fa = (l_mean*(l_mua + l_mub) - l_fb*l_mua)/l_mub;
            }
            break;
        case 'm':
            l_mua = l_dx;
            if (l_comp == 1) {
                l_mub = -l_fb*l_mua/l_fa;
            } else if (l_mean != 0.0f) {
                l_mub = (l_fb - l_mean)*l_mua/(l_mean - l_fa);
            }
            break;
        case 'n':
            l_mub = l_dx;
            if (l_comp == 1) {
                l_mua = -l_fa*l_mub/l_fb;
            } else if (l_mean != 0.0f) {
                l_mua = (l_fa - l_mean)*l_mub/(l_mean - l_fb);
            }
            break;
    }

    //step size & number of steps
    float l_dt;
    int i, l_spp, l_samples;

    l_spp = d_spp;

    if (l_lambda != 0.0f) {
        l_dt = 1.0f/l_lambda/l_spp;
    }

    if (l_mua != 0.0f) {
        float taua, taub;

        taua = 1.0f/l_mua;
        taub = 1.0f/l_mub;

        if (taua < taub) {
            l_dt = taua/l_spp;
        } else {
            l_dt = taub/l_spp;
        }
    }

    l_samples = d_samples;

    //jump countdowns
    int l_pcd, l_dcd, l_dst;
    
    l_pcd = d_pcd[idx];
    l_dcd = d_dcd[idx];
    l_dst = d_dst[idx];

    for (i = 0; i < l_samples; i++) {
        predcorr(l_x, l_x, l_pcd, l_pcd, &l_state, l_Dg, l_Dp, l_lambda, l_comp, \
                 l_dcd, l_dcd, l_dst, l_dst, l_fa, l_fb, l_mua, l_mub, l_dt); 
    }

    //write back path parameters to the global memory
    d_x[idx] = l_x;
    d_pcd[idx] = l_pcd;
    d_dcd[idx] = l_dcd;
    d_dst[idx] = l_dst;
    d_states[idx] = l_state;
}

void prepare()
//prepare simulation
{
    //grid size
    h_paths = (h_paths/h_block)*h_block;
    h_threads = h_paths;

    if (h_moments) h_threads *= h_points;

    h_grid = h_threads/h_block;

    //number of steps
    if (h_moments) h_steps = h_periods*h_spp;
     
    //host memory allocation
    size_f = h_threads*sizeof(float);
    size_i = h_threads*sizeof(int);
    size_ui = h_threads*sizeof(unsigned int);
    size_p = h_points*sizeof(float);

    h_x = (float*)malloc(size_f);
    h_fx = (float*)malloc(size_f);
    h_seeds = (unsigned int*)malloc(size_ui);

    //create & initialize host rng
    hiprandCreateGeneratorHost(&gen, HIPRAND_RNG_PSEUDO_DEFAULT);
    hiprandSetPseudoRandomGeneratorSeed(gen, time(NULL));

    hiprandGenerate(gen, h_seeds, h_threads);
 
    //device memory allocation
    hipMalloc((void**)&d_x, size_f);
    hipMalloc((void**)&d_fx, size_f);
    hipMalloc((void**)&d_seeds, size_ui);
    hipMalloc((void**)&d_pcd, size_i);
    hipMalloc((void**)&d_dcd, size_i);
    hipMalloc((void**)&d_dst, size_i);
    hipMalloc((void**)&d_states, h_threads*sizeof(hiprandState));

    //copy seeds from host to device
    hipMemcpy(d_seeds, h_seeds, size_ui, hipMemcpyHostToDevice);

    //initialization of device rng
    init_dev_rng<<<h_grid, h_block>>>(d_seeds, d_states);

    free(h_seeds);
    hipFree(d_seeds);

    //moments specific requirements
    if (h_moments) {
        h_trigger = h_steps*h_trans;

        h_xb = (float*)malloc(size_f);
        h_dx = (float*)malloc(size_p);

        float dxtmp = h_beginx;
        float dxstep = (h_endx - h_beginx)/h_points;

        int i;
        
        //set domainx
        for (i = 0; i < h_points; i++) {
            if (h_logx) {
                h_dx[i] = exp10f(dxtmp);
            } else {
                h_dx[i] = dxtmp;
            }
            dxtmp += dxstep;
        }
        
        hipMalloc((void**)&d_dx, size_p);
    
        hipMemcpy(d_dx, h_dx, size_p, hipMemcpyHostToDevice);
    }
}

void copy_to_dev()
{
    hipMemcpy(d_x, h_x, size_f, hipMemcpyHostToDevice);
    hipMemcpy(d_fx, h_fx, size_f, hipMemcpyHostToDevice);
}

void copy_from_dev()
{
    hipMemcpy(h_x, d_x, size_f, hipMemcpyDeviceToHost);
    hipMemcpy(h_fx, d_fx, size_f, hipMemcpyDeviceToHost);
}

void initial_conditions()
//set initial conditions for path parameters
{
    int i;

    hiprandGenerateUniform(gen, h_x, h_threads); //x in (0,1]

    for (i = 0; i < h_threads; i++) {
        h_x[i] = 2.0f*h_x[i] - 1.0f; //x in (-1,1]
    }

    memset(h_fx, 0.0f, size_f);

    copy_to_dev();
}

void moments(float *av)
//calculate the first moment of v
{
    float sx, sxb, tmp, taua, taub, dt;
    int i, j;

    copy_from_dev();

    unfold(h_x, h_fx);

    for (j = 0; j < h_points; j++) {
        sx = 0.0f;
        sxb = 0.0f;

        for (i = 0; i < h_paths; i++) {
            sx += h_x[j*h_paths + i];
            sxb += h_xb[j*h_paths + i];
        }

        //Poissonian
        if (h_domainx == 'l') {
            dt = 1.0f/h_dx[j]/h_spp;
        } else if (h_domainx == 'p' && h_mean != 0.0f) {
            dt = 1.0f/(h_mean*h_mean/h_dx[j])/h_spp;
        } else if (h_lambda != 0.0f) {
            dt = 1.0f/h_lambda/h_spp;
        }

        //Dichotomous
        if (h_domainx == 'm') {
            taua = 1.0f/h_dx[j];
            taub = 1.0f/h_mub;

            if (h_comp) {
                tmp = 1.0f/(-h_fb*h_dx[j]/h_fa);
            } else if (h_mean != 0.0f) {
                tmp = 1.0f/((h_fb - h_mean)*h_dx[j]/(h_mean - h_fa));
            } else {
                tmp = taub;
            }

            if (taua <= tmp) {
                dt = taua/h_spp;
            } else {
                dt = tmp/h_spp;
            }
        } else if (h_domainx == 'n') {
            taua = 1.0f/h_mua;
            taub = 1.0f/h_dx[j];

            if (h_comp) {
                tmp = 1.0f/(-h_fa*h_dx[j]/h_fb);
            } else if (h_mean != 0.0f) {
                tmp = 1.0f/((h_fa - h_mean)*h_dx[j]/(h_mean - h_fb));
            } else {
                tmp = taua;
            }

            if (taub <= tmp) {
                dt = taub/h_spp;
            } else {
                dt = tmp/h_spp;
            }
        } else if (h_mua != 0.0f || h_mub != 0.0f) {
            taua = 1.0f/h_mua;
            taub = 1.0f/h_mub;

            if (taua < taub) {
                dt = taua/h_spp;
            } else {
                dt = taub/h_spp;
            }
        }
            
        av[j] = (sx - sxb)/( (1.0f - h_trans)*h_steps*dt )/h_paths;
    }
}

void finish()
//free memory
{

    free(h_x);
    free(h_fx);
    
    hiprandDestroyGenerator(gen);
    hipFree(d_x);
    hipFree(d_fx);
    hipFree(d_pcd);
    hipFree(d_dcd);
    hipFree(d_dst);
    hipFree(d_states);
    
    if (h_moments) {
        free(h_xb);
        free(h_dx);

        hipFree(d_dx);
    }
}

int main(int argc, char **argv)
{
    parse_cla(argc, argv);
    if (!h_moments) {
        usage(argv);
        return -1;
    }
 
    prepare();
    
    initial_conditions();
    
    //asymptotic long time average velocity <<v>>
    if (h_moments) {
        float *av;
        int i;

        av = (float*)malloc(size_p);
 
        if ( !strcmp(h_domain, "1d") ) { 

            init_noise<<<h_grid, h_block>>>(d_dx, d_pcd, d_dcd, d_dst, d_states);

            for (i = 0; i < h_steps; i += h_samples) {
                run_moments<<<h_grid, h_block>>>(d_x, d_dx, d_pcd, d_dcd, d_dst, d_states);
                fold<<<h_grid, h_block>>>(d_x, d_fx);
                if (i == h_trigger) {
                    hipMemcpy(h_xb, d_x, size_f, hipMemcpyDeviceToHost);
                    hipMemcpy(h_fx, d_fx, size_f, hipMemcpyDeviceToHost);
                    unfold(h_xb, h_fx);
                }
            }

            moments(av);
 
            printf("#%c <<v>>\n", h_domainx);
            for (i = 0; i < h_points; i++) {
                printf("%e %e\n", h_dx[i], av[i]);
            }
        }

        free(av);
    }

    finish();
    
    return 0;
}

	.text
	.file	"prog.hip"
	.globl	_Z5usagePPc                     # -- Begin function _Z5usagePPc
	.type	_Z5usagePPc,@function
_Z5usagePPc:                            # @_Z5usagePPc
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	(%rdi), %rsi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	movl	$.Lstr.7, %edi
	callq	puts@PLT
	movl	$.Lstr.8, %edi
	callq	puts@PLT
	movl	$.Lstr.9, %edi
	callq	puts@PLT
	movl	$.Lstr.10, %edi
	callq	puts@PLT
	movl	$.Lstr.11, %edi
	callq	puts@PLT
	movl	$.Lstr.12, %edi
	callq	puts@PLT
	movl	$.Lstr.13, %edi
	callq	puts@PLT
	movl	$.Lstr.14, %edi
	callq	puts@PLT
	movl	$.Lstr.15, %edi
	callq	puts@PLT
	movl	$.Lstr.16, %edi
	callq	puts@PLT
	movl	$.Lstr.17, %edi
	callq	puts@PLT
	movl	$.Lstr.18, %edi
	callq	puts@PLT
	movl	$.Lstr.19, %edi
	callq	puts@PLT
	movl	$.Lstr.20, %edi
	callq	puts@PLT
	movl	$.Lstr.21, %edi
	callq	puts@PLT
	movl	$.Lstr.22, %edi
	callq	puts@PLT
	movl	$.Lstr.23, %edi
	callq	puts@PLT
	movl	$.Lstr.24, %edi
	callq	puts@PLT
	movl	$.Lstr.25, %edi
	callq	puts@PLT
	movl	$.Lstr.26, %edi
	callq	puts@PLT
	movl	$.Lstr.27, %edi
	callq	puts@PLT
	movl	$.Lstr.28, %edi
	callq	puts@PLT
	movl	$.Lstr.29, %edi
	callq	puts@PLT
	movl	$.Lstr.30, %edi
	callq	puts@PLT
	movl	$10, %edi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end0:
	.size	_Z5usagePPc, .Lfunc_end0-_Z5usagePPc
	.cfi_endproc
                                        # -- End function
	.globl	_Z9parse_claiPPc                # -- Begin function _Z9parse_claiPPc
	.type	_Z9parse_claiPPc,@function
_Z9parse_claiPPc:                       # @_Z9parse_claiPPc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	leaq	12(%rsp), %r14
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	$.L.str.33, %edx
	movl	$_ZL7options, %ecx
	movl	%ebp, %edi
	movq	%rbx, %rsi
	xorl	%r8d, %r8d
	callq	getopt_long
                                        # kill: def $eax killed $eax def $rax
	leal	-97(%rax), %ecx
	cmpl	$22, %ecx
	ja	.LBB1_2
# %bb.4:                                #   in Loop: Header=BB1_1 Depth=1
	jmpq	*.LJTI1_0(,%rcx,8)
.LBB1_5:                                #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 12(%rsp)
	movl	$d_Dg, %edi
	jmp	.LBB1_6
.LBB1_2:                                #   in Loop: Header=BB1_1 Depth=1
	cmpl	$-1, %eax
	jne	.LBB1_1
	jmp	.LBB1_3
.LBB1_24:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	movl	$.L.str.34, %esi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB1_1
# %bb.25:                               #   in Loop: Header=BB1_1 Depth=1
	movl	$1, h_moments(%rip)
	jmp	.LBB1_1
.LBB1_22:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atoi
	movl	%eax, h_spp(%rip)
	movl	$d_spp, %edi
	movl	$h_spp, %esi
	jmp	.LBB1_14
.LBB1_19:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atol
	movq	%rax, h_paths(%rip)
	movl	$d_paths, %edi
	movl	$h_paths, %esi
	movl	$8, %edx
	jmp	.LBB1_15
.LBB1_10:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_fb(%rip)
	movl	$d_fb, %edi
	movl	$h_fb, %esi
	jmp	.LBB1_14
.LBB1_20:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atol
	movq	%rax, h_periods(%rip)
	jmp	.LBB1_1
.LBB1_17:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atoi
	movl	%eax, %edi
	callq	hipSetDevice
	jmp	.LBB1_1
.LBB1_8:                                #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_lambda(%rip)
	movl	$d_lambda, %edi
	movl	$h_lambda, %esi
	jmp	.LBB1_14
.LBB1_23:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atoi
	movl	%eax, h_samples(%rip)
	movl	$d_samples, %edi
	movl	$h_samples, %esi
	jmp	.LBB1_14
.LBB1_9:                                #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_fa(%rip)
	movl	$d_fa, %edi
	movl	$h_fa, %esi
	jmp	.LBB1_14
.LBB1_13:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atoi
	movl	%eax, h_comp(%rip)
	movl	$d_comp, %edi
	movl	$h_comp, %esi
	jmp	.LBB1_14
.LBB1_7:                                #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 12(%rsp)
	movl	$d_Dp, %edi
.LBB1_6:                                #   in Loop: Header=BB1_1 Depth=1
	movl	$4, %edx
	movq	%r14, %rsi
	jmp	.LBB1_15
.LBB1_26:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rax
	movq	%rax, h_domain(%rip)
	jmp	.LBB1_1
.LBB1_29:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atoi
	movl	%eax, h_points(%rip)
	movl	$d_points, %edi
	movl	$h_points, %esi
	jmp	.LBB1_14
.LBB1_11:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_mua(%rip)
	movl	$d_mua, %edi
	movl	$h_mua, %esi
	jmp	.LBB1_14
.LBB1_30:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_beginx(%rip)
	jmp	.LBB1_1
.LBB1_21:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_trans(%rip)
	jmp	.LBB1_1
.LBB1_12:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_mub(%rip)
	movl	$d_mub, %edi
	movl	$h_mub, %esi
	jmp	.LBB1_14
.LBB1_27:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rax
	movb	(%rax), %al
	movb	%al, h_domainx(%rip)
	movl	$d_domainx, %edi
	movl	$h_domainx, %esi
	movl	$1, %edx
	jmp	.LBB1_15
.LBB1_18:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atoi
	movl	%eax, h_block(%rip)
	jmp	.LBB1_1
.LBB1_16:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_mean(%rip)
	movl	$d_mean, %edi
	movl	$h_mean, %esi
.LBB1_14:                               #   in Loop: Header=BB1_1 Depth=1
	movl	$4, %edx
.LBB1_15:                               #   in Loop: Header=BB1_1 Depth=1
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	jmp	.LBB1_1
.LBB1_31:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, h_endx(%rip)
	jmp	.LBB1_1
.LBB1_28:                               #   in Loop: Header=BB1_1 Depth=1
	movq	optarg(%rip), %rdi
	callq	atoi
	movl	%eax, h_logx(%rip)
	jmp	.LBB1_1
.LBB1_3:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z9parse_claiPPc, .Lfunc_end1-_Z9parse_claiPPc
	.cfi_endproc
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
.LJTI1_0:
	.quad	.LBB1_5
	.quad	.LBB1_7
	.quad	.LBB1_8
	.quad	.LBB1_9
	.quad	.LBB1_10
	.quad	.LBB1_11
	.quad	.LBB1_12
	.quad	.LBB1_13
	.quad	.LBB1_16
	.quad	.LBB1_17
	.quad	.LBB1_18
	.quad	.LBB1_19
	.quad	.LBB1_20
	.quad	.LBB1_21
	.quad	.LBB1_22
	.quad	.LBB1_23
	.quad	.LBB1_24
	.quad	.LBB1_26
	.quad	.LBB1_27
	.quad	.LBB1_28
	.quad	.LBB1_29
	.quad	.LBB1_30
	.quad	.LBB1_31
                                        # -- End function
	.text
	.globl	_Z27__device_stub__init_dev_rngPjP12hiprandState # -- Begin function _Z27__device_stub__init_dev_rngPjP12hiprandState
	.type	_Z27__device_stub__init_dev_rngPjP12hiprandState,@function
_Z27__device_stub__init_dev_rngPjP12hiprandState: # @_Z27__device_stub__init_dev_rngPjP12hiprandState
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12init_dev_rngPjP12hiprandState, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z27__device_stub__init_dev_rngPjP12hiprandState, .Lfunc_end2-_Z27__device_stub__init_dev_rngPjP12hiprandState
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__init_noisePfPiS0_S0_P12hiprandState # -- Begin function _Z25__device_stub__init_noisePfPiS0_S0_P12hiprandState
	.type	_Z25__device_stub__init_noisePfPiS0_S0_P12hiprandState,@function
_Z25__device_stub__init_noisePfPiS0_S0_P12hiprandState: # @_Z25__device_stub__init_noisePfPiS0_S0_P12hiprandState
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10init_noisePfPiS0_S0_P12hiprandState, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z25__device_stub__init_noisePfPiS0_S0_P12hiprandState, .Lfunc_end3-_Z25__device_stub__init_noisePfPiS0_S0_P12hiprandState
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__foldPfS_     # -- Begin function _Z19__device_stub__foldPfS_
	.type	_Z19__device_stub__foldPfS_,@function
_Z19__device_stub__foldPfS_:            # @_Z19__device_stub__foldPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4foldPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z19__device_stub__foldPfS_, .Lfunc_end4-_Z19__device_stub__foldPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z6unfoldPfS_                   # -- Begin function _Z6unfoldPfS_
	.type	_Z6unfoldPfS_,@function
_Z6unfoldPfS_:                          # @_Z6unfoldPfS_
	.cfi_startproc
# %bb.0:
	movq	h_threads(%rip), %rax
	testq	%rax, %rax
	jle	.LBB5_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%ecx, %ecx
.LBB5_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%rsi,%rcx,4), %xmm0
	movss	%xmm0, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB5_2
.LBB5_3:                                # %._crit_edge
	retq
.Lfunc_end5:
	.size	_Z6unfoldPfS_, .Lfunc_end5-_Z6unfoldPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__run_momentsPfS_PiS0_S0_P12hiprandState # -- Begin function _Z26__device_stub__run_momentsPfS_PiS0_S0_P12hiprandState
	.type	_Z26__device_stub__run_momentsPfS_PiS0_S0_P12hiprandState,@function
_Z26__device_stub__run_momentsPfS_PiS0_S0_P12hiprandState: # @_Z26__device_stub__run_momentsPfS_PiS0_S0_P12hiprandState
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11run_momentsPfS_PiS0_S0_P12hiprandState, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z26__device_stub__run_momentsPfS_PiS0_S0_P12hiprandState, .Lfunc_end6-_Z26__device_stub__run_momentsPfS_PiS0_S0_P12hiprandState
	.cfi_endproc
                                        # -- End function
	.globl	_Z7preparev                     # -- Begin function _Z7preparev
	.type	_Z7preparev,@function
_Z7preparev:                            # @_Z7preparev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	h_paths(%rip), %rcx
	movslq	h_block(%rip), %rsi
	movq	%rcx, %rax
	cqto
	idivq	%rsi
	movq	%rcx, %rbx
	subq	%rdx, %rbx
	movq	%rbx, h_paths(%rip)
	movq	%rbx, h_threads(%rip)
	cmpl	$0, h_moments(%rip)
	movslq	h_points(%rip), %rdi
	je	.LBB7_2
# %bb.1:
	imulq	%rdi, %rbx
	movq	%rbx, h_threads(%rip)
	movslq	h_spp(%rip), %rax
	imulq	h_periods(%rip), %rax
	movq	%rax, h_steps(%rip)
	movq	%rbx, %rcx
.LBB7_2:                                # %.thread
	movq	%rcx, %rax
	cqto
	idivq	%rsi
	movl	%eax, h_grid(%rip)
	shlq	$2, %rbx
	movq	%rbx, size_f(%rip)
	movq	%rbx, size_i(%rip)
	movq	%rbx, size_ui(%rip)
	shlq	$2, %rdi
	movq	%rdi, size_p(%rip)
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, h_x(%rip)
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, h_fx(%rip)
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, h_seeds(%rip)
	movl	$gen, %edi
	movl	$400, %esi                      # imm = 0x190
	callq	hiprandCreateGeneratorHost
	movq	gen(%rip), %rbx
	xorl	%edi, %edi
	callq	time
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	hiprandSetPseudoRandomGeneratorSeed
	movq	gen(%rip), %rdi
	movq	h_seeds(%rip), %rsi
	movq	h_threads(%rip), %rdx
	callq	hiprandGenerate
	movq	size_f(%rip), %rsi
	movl	$d_x, %edi
	callq	hipMalloc
	movq	size_f(%rip), %rsi
	movl	$d_fx, %edi
	callq	hipMalloc
	movq	size_ui(%rip), %rsi
	movl	$d_seeds, %edi
	callq	hipMalloc
	movq	size_i(%rip), %rsi
	movl	$d_pcd, %edi
	callq	hipMalloc
	movq	size_i(%rip), %rsi
	movl	$d_dcd, %edi
	callq	hipMalloc
	movq	size_i(%rip), %rsi
	movl	$d_dst, %edi
	callq	hipMalloc
	movq	h_threads(%rip), %rax
	shlq	$4, %rax
	leaq	(%rax,%rax,2), %rsi
	movl	$d_states, %edi
	callq	hipMalloc
	movq	d_seeds(%rip), %rdi
	movq	h_seeds(%rip), %rsi
	movq	size_ui(%rip), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	h_grid(%rip), %edi
	movl	h_block(%rip), %edx
	btsq	$32, %rdi
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_4
# %bb.3:
	movq	d_seeds(%rip), %rdi
	movq	d_states(%rip), %rsi
	callq	_Z27__device_stub__init_dev_rngPjP12hiprandState
.LBB7_4:
	movq	h_seeds(%rip), %rdi
	callq	free
	movq	d_seeds(%rip), %rdi
	callq	hipFree
	cmpl	$0, h_moments(%rip)
	je	.LBB7_13
# %bb.5:
	cvtsi2ssq	h_steps(%rip), %xmm0
	mulss	h_trans(%rip), %xmm0
	cvttss2si	%xmm0, %rax
	movq	%rax, h_trigger(%rip)
	movq	size_f(%rip), %rdi
	callq	malloc
	movq	%rax, h_xb(%rip)
	movq	size_p(%rip), %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, h_dx(%rip)
	movl	h_points(%rip), %ecx
	testl	%ecx, %ecx
	jle	.LBB7_12
# %bb.6:                                # %.lr.ph.preheader
	movss	h_beginx(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movss	h_endx(%rip), %xmm2             # xmm2 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ecx, %xmm0
	subss	%xmm1, %xmm2
	divss	%xmm0, %xmm2
	movss	%xmm2, 8(%rsp)                  # 4-byte Spill
	movl	h_logx(%rip), %edx
	xorl	%ebx, %ebx
.LBB7_7:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	testl	%edx, %edx
	je	.LBB7_9
# %bb.8:                                #   in Loop: Header=BB7_7 Depth=1
	movaps	%xmm1, %xmm0
	movss	%xmm1, 12(%rsp)                 # 4-byte Spill
	callq	exp10f
	movss	12(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movq	h_dx(%rip), %rax
	movss	%xmm0, (%rax,%rbx,4)
	movl	h_logx(%rip), %edx
	movl	h_points(%rip), %ecx
	jmp	.LBB7_10
.LBB7_9:                                #   in Loop: Header=BB7_7 Depth=1
	movss	%xmm1, (%rax,%rbx,4)
	xorl	%edx, %edx
.LBB7_10:                               #   in Loop: Header=BB7_7 Depth=1
	addss	8(%rsp), %xmm1                  # 4-byte Folded Reload
	incq	%rbx
	movslq	%ecx, %rsi
	cmpq	%rsi, %rbx
	jl	.LBB7_7
# %bb.11:                               # %._crit_edge.loopexit
	movq	size_p(%rip), %rbx
.LBB7_12:                               # %._crit_edge
	movl	$d_dx, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	d_dx(%rip), %rdi
	movq	h_dx(%rip), %rsi
	movq	size_p(%rip), %rdx
	movl	$1, %ecx
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	hipMemcpy                       # TAILCALL
.LBB7_13:
	.cfi_def_cfa_offset 32
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z7preparev, .Lfunc_end7-_Z7preparev
	.cfi_endproc
                                        # -- End function
	.globl	_Z11copy_to_devv                # -- Begin function _Z11copy_to_devv
	.type	_Z11copy_to_devv,@function
_Z11copy_to_devv:                       # @_Z11copy_to_devv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	d_x(%rip), %rdi
	movq	h_x(%rip), %rsi
	movq	size_f(%rip), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	d_fx(%rip), %rdi
	movq	h_fx(%rip), %rsi
	movq	size_f(%rip), %rdx
	movl	$1, %ecx
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipMemcpy                       # TAILCALL
.Lfunc_end8:
	.size	_Z11copy_to_devv, .Lfunc_end8-_Z11copy_to_devv
	.cfi_endproc
                                        # -- End function
	.globl	_Z13copy_from_devv              # -- Begin function _Z13copy_from_devv
	.type	_Z13copy_from_devv,@function
_Z13copy_from_devv:                     # @_Z13copy_from_devv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	h_x(%rip), %rdi
	movq	d_x(%rip), %rsi
	movq	size_f(%rip), %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	h_fx(%rip), %rdi
	movq	d_fx(%rip), %rsi
	movq	size_f(%rip), %rdx
	movl	$2, %ecx
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipMemcpy                       # TAILCALL
.Lfunc_end9:
	.size	_Z13copy_from_devv, .Lfunc_end9-_Z13copy_from_devv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z18initial_conditionsv
.LCPI10_0:
	.long	0xbf800000                      # float -1
	.text
	.globl	_Z18initial_conditionsv
	.type	_Z18initial_conditionsv,@function
_Z18initial_conditionsv:                # @_Z18initial_conditionsv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	gen(%rip), %rdi
	movq	h_x(%rip), %rsi
	movq	h_threads(%rip), %rdx
	callq	hiprandGenerateUniform
	movq	h_threads(%rip), %rax
	testq	%rax, %rax
	jle	.LBB10_3
# %bb.1:                                # %.lr.ph
	movq	h_x(%rip), %rcx
	xorl	%edx, %edx
	movss	.LCPI10_0(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
.LBB10_2:                               # =>This Inner Loop Header: Depth=1
	movss	(%rcx,%rdx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	addss	%xmm1, %xmm1
	addss	%xmm0, %xmm1
	movss	%xmm1, (%rcx,%rdx,4)
	incq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB10_2
.LBB10_3:                               # %._crit_edge
	movq	h_fx(%rip), %rdi
	movq	size_f(%rip), %rdx
	xorl	%esi, %esi
	callq	memset@PLT
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Z11copy_to_devv                # TAILCALL
.Lfunc_end10:
	.size	_Z18initial_conditionsv, .Lfunc_end10-_Z18initial_conditionsv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z7momentsPf
.LCPI11_0:
	.long	0x3f800000                      # float 1
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI11_1:
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.text
	.globl	_Z7momentsPf
	.type	_Z7momentsPf,@function
_Z7momentsPf:                           # @_Z7momentsPf
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	callq	_Z13copy_from_devv
	movq	h_x(%rip), %rax
	movq	h_threads(%rip), %rcx
	testq	%rcx, %rcx
	jle	.LBB11_3
# %bb.1:                                # %.lr.ph.i.preheader
	movq	h_fx(%rip), %rdx
	xorl	%esi, %esi
.LBB11_2:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rax,%rsi,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%rdx,%rsi,4), %xmm0
	movss	%xmm0, (%rax,%rsi,4)
	incq	%rsi
	cmpq	%rsi, %rcx
	jne	.LBB11_2
.LBB11_3:                               # %_Z6unfoldPfS_.exit
	movl	h_points(%rip), %ecx
	testl	%ecx, %ecx
	jle	.LBB11_30
# %bb.4:                                # %.preheader.lr.ph
	movq	h_paths(%rip), %rdx
	movq	h_xb(%rip), %rsi
	movzbl	h_domainx(%rip), %edi
	movq	h_dx(%rip), %r8
	xorps	%xmm0, %xmm0
	cvtsi2ssl	h_spp(%rip), %xmm0
	movl	h_comp(%rip), %r9d
	cvtsi2ssq	h_steps(%rip), %xmm1
	cvtsi2ss	%rdx, %xmm2
	leaq	(,%rdx,4), %r10
	xorl	%r11d, %r11d
	movss	.LCPI11_0(%rip), %xmm3          # xmm3 = mem[0],zero,zero,zero
	xorps	%xmm4, %xmm4
	movaps	.LCPI11_1(%rip), %xmm5          # xmm5 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
                                        # implicit-def: $xmm8
.LBB11_5:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_7 Depth 2
	xorps	%xmm6, %xmm6
	xorps	%xmm7, %xmm7
	testq	%rdx, %rdx
	jle	.LBB11_8
# %bb.6:                                # %.lr.ph
                                        #   in Loop: Header=BB11_5 Depth=1
	xorl	%r14d, %r14d
.LBB11_7:                               #   Parent Loop BB11_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	addss	(%rax,%r14,4), %xmm6
	addss	(%rsi,%r14,4), %xmm7
	incq	%r14
	cmpq	%r14, %rdx
	jne	.LBB11_7
.LBB11_8:                               # %._crit_edge
                                        #   in Loop: Header=BB11_5 Depth=1
	cmpl	$108, %edi
	jne	.LBB11_10
# %bb.9:                                #   in Loop: Header=BB11_5 Depth=1
	movaps	%xmm3, %xmm8
	divss	(%r8,%r11,4), %xmm8
	jmp	.LBB11_13
.LBB11_10:                              #   in Loop: Header=BB11_5 Depth=1
	movss	h_mean(%rip), %xmm9             # xmm9 = mem[0],zero,zero,zero
	cmpl	$112, %edi
	jne	.LBB11_18
# %bb.11:                               #   in Loop: Header=BB11_5 Depth=1
	ucomiss	%xmm4, %xmm9
	jne	.LBB11_12
	jnp	.LBB11_18
.LBB11_12:                              #   in Loop: Header=BB11_5 Depth=1
	mulss	%xmm9, %xmm9
	divss	(%r8,%r11,4), %xmm9
	movaps	%xmm3, %xmm8
	divss	%xmm9, %xmm8
.LBB11_13:                              # %.thread
                                        #   in Loop: Header=BB11_5 Depth=1
	divss	%xmm0, %xmm8
.LBB11_14:                              # %.thread
                                        #   in Loop: Header=BB11_5 Depth=1
	movss	h_mua(%rip), %xmm9              # xmm9 = mem[0],zero,zero,zero
	ucomiss	%xmm4, %xmm9
	movss	h_mub(%rip), %xmm10             # xmm10 = mem[0],zero,zero,zero
	jne	.LBB11_16
	jp	.LBB11_16
# %bb.15:                               # %.thread
                                        #   in Loop: Header=BB11_5 Depth=1
	ucomiss	%xmm4, %xmm10
	jne	.LBB11_16
	jnp	.LBB11_29
.LBB11_16:                              #   in Loop: Header=BB11_5 Depth=1
	movaps	%xmm3, %xmm8
	divss	%xmm9, %xmm8
	movaps	%xmm3, %xmm9
	divss	%xmm10, %xmm9
	ucomiss	%xmm8, %xmm9
	jbe	.LBB11_17
.LBB11_28:                              #   in Loop: Header=BB11_5 Depth=1
	divss	%xmm0, %xmm8
	jmp	.LBB11_29
.LBB11_18:                              #   in Loop: Header=BB11_5 Depth=1
	cmpl	$110, %edi
	je	.LBB11_31
# %bb.19:                               #   in Loop: Header=BB11_5 Depth=1
	cmpl	$109, %edi
	jne	.LBB11_20
# %bb.21:                               #   in Loop: Header=BB11_5 Depth=1
	movss	(%r8,%r11,4), %xmm10            # xmm10 = mem[0],zero,zero,zero
	testl	%r9d, %r9d
	je	.LBB11_23
# %bb.22:                               #   in Loop: Header=BB11_5 Depth=1
	movss	h_fb(%rip), %xmm11              # xmm11 = mem[0],zero,zero,zero
	xorps	%xmm5, %xmm11
	mulss	%xmm10, %xmm11
	divss	h_fa(%rip), %xmm11
	jmp	.LBB11_27
.LBB11_31:                              #   in Loop: Header=BB11_5 Depth=1
	movss	(%r8,%r11,4), %xmm10            # xmm10 = mem[0],zero,zero,zero
	testl	%r9d, %r9d
	je	.LBB11_33
# %bb.32:                               #   in Loop: Header=BB11_5 Depth=1
	movss	h_fa(%rip), %xmm11              # xmm11 = mem[0],zero,zero,zero
	xorps	%xmm5, %xmm11
	mulss	%xmm10, %xmm11
	divss	h_fb(%rip), %xmm11
	jmp	.LBB11_27
.LBB11_20:                              #   in Loop: Header=BB11_5 Depth=1
	movss	h_lambda(%rip), %xmm9           # xmm9 = mem[0],zero,zero,zero
	xorps	%xmm10, %xmm10
	cvtsi2ssl	h_spp(%rip), %xmm10
	movaps	%xmm3, %xmm11
	divss	%xmm9, %xmm11
	divss	%xmm10, %xmm11
	cmpneqss	%xmm4, %xmm9
	andps	%xmm9, %xmm11
	andnps	%xmm8, %xmm9
	orps	%xmm11, %xmm9
	movaps	%xmm9, %xmm8
	jmp	.LBB11_14
.LBB11_23:                              #   in Loop: Header=BB11_5 Depth=1
	ucomiss	%xmm4, %xmm9
	jne	.LBB11_25
	jnp	.LBB11_24
.LBB11_25:                              #   in Loop: Header=BB11_5 Depth=1
	movss	h_fb(%rip), %xmm11              # xmm11 = mem[0],zero,zero,zero
	subss	%xmm9, %xmm11
	mulss	%xmm10, %xmm11
	subss	h_fa(%rip), %xmm9
	jmp	.LBB11_26
.LBB11_33:                              #   in Loop: Header=BB11_5 Depth=1
	ucomiss	%xmm4, %xmm9
	jne	.LBB11_35
	jnp	.LBB11_34
.LBB11_35:                              #   in Loop: Header=BB11_5 Depth=1
	movss	h_fa(%rip), %xmm11              # xmm11 = mem[0],zero,zero,zero
	subss	%xmm9, %xmm11
	mulss	%xmm10, %xmm11
	subss	h_fb(%rip), %xmm9
.LBB11_26:                              #   in Loop: Header=BB11_5 Depth=1
	divss	%xmm9, %xmm11
	jmp	.LBB11_27
.LBB11_24:                              #   in Loop: Header=BB11_5 Depth=1
	movss	h_mub(%rip), %xmm11             # xmm11 = mem[0],zero,zero,zero
	jmp	.LBB11_27
.LBB11_34:                              #   in Loop: Header=BB11_5 Depth=1
	movss	h_mua(%rip), %xmm11             # xmm11 = mem[0],zero,zero,zero
.LBB11_27:                              #   in Loop: Header=BB11_5 Depth=1
	movaps	%xmm3, %xmm8
	divss	%xmm10, %xmm8
	movaps	%xmm3, %xmm9
	divss	%xmm11, %xmm9
	ucomiss	%xmm8, %xmm9
	jae	.LBB11_28
.LBB11_17:                              #   in Loop: Header=BB11_5 Depth=1
	divss	%xmm0, %xmm9
	movaps	%xmm9, %xmm8
.LBB11_29:                              #   in Loop: Header=BB11_5 Depth=1
	subss	%xmm7, %xmm6
	movaps	%xmm3, %xmm7
	subss	h_trans(%rip), %xmm7
	mulss	%xmm1, %xmm7
	mulss	%xmm8, %xmm7
	divss	%xmm7, %xmm6
	divss	%xmm2, %xmm6
	movss	%xmm6, (%rbx,%r11,4)
	incq	%r11
	addq	%r10, %rsi
	addq	%r10, %rax
	cmpq	%rcx, %r11
	jne	.LBB11_5
.LBB11_30:                              # %._crit_edge68
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z7momentsPf, .Lfunc_end11-_Z7momentsPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z6finishv                      # -- Begin function _Z6finishv
	.type	_Z6finishv,@function
_Z6finishv:                             # @_Z6finishv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	h_x(%rip), %rdi
	callq	free
	movq	h_fx(%rip), %rdi
	callq	free
	movq	gen(%rip), %rdi
	callq	hiprandDestroyGenerator
	movq	d_x(%rip), %rdi
	callq	hipFree
	movq	d_fx(%rip), %rdi
	callq	hipFree
	movq	d_pcd(%rip), %rdi
	callq	hipFree
	movq	d_dcd(%rip), %rdi
	callq	hipFree
	movq	d_dst(%rip), %rdi
	callq	hipFree
	movq	d_states(%rip), %rdi
	callq	hipFree
	cmpl	$0, h_moments(%rip)
	je	.LBB12_1
# %bb.2:
	movq	h_xb(%rip), %rdi
	callq	free
	movq	h_dx(%rip), %rdi
	callq	free
	movq	d_dx(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.LBB12_1:
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z6finishv, .Lfunc_end12-_Z6finishv
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	callq	_Z9parse_claiPPc
	cmpl	$0, h_moments(%rip)
	je	.LBB13_1
# %bb.2:
	callq	_Z7preparev
	callq	_Z18initial_conditionsv
	cmpl	$0, h_moments(%rip)
	je	.LBB13_21
# %bb.3:
	movq	size_p(%rip), %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	h_domain(%rip), %rdi
	movl	$.L.str.35, %esi
	callq	strcmp
	testl	%eax, %eax
	jne	.LBB13_20
# %bb.4:
	movl	h_grid(%rip), %edi
	movl	h_block(%rip), %edx
	btsq	$32, %rdi
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_6
# %bb.5:
	movq	d_dx(%rip), %rdi
	movq	d_pcd(%rip), %rsi
	movq	d_dcd(%rip), %rdx
	movq	d_dst(%rip), %rcx
	movq	d_states(%rip), %r8
	callq	_Z25__device_stub__init_noisePfPiS0_S0_P12hiprandState
.LBB13_6:
	cmpq	$0, h_steps(%rip)
	jle	.LBB13_17
# %bb.7:                                # %.lr.ph.preheader
	movabsq	$4294967296, %r14               # imm = 0x100000000
	xorl	%r15d, %r15d
.LBB13_8:                               # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB13_15 Depth 2
	movl	h_grid(%rip), %edi
	movl	h_block(%rip), %edx
	orq	%r14, %rdi
	orq	%r14, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_10
# %bb.9:                                #   in Loop: Header=BB13_8 Depth=1
	movq	d_x(%rip), %rdi
	movq	d_dx(%rip), %rsi
	movq	d_pcd(%rip), %rdx
	movq	d_dcd(%rip), %rcx
	movq	d_dst(%rip), %r8
	movq	d_states(%rip), %r9
	callq	_Z26__device_stub__run_momentsPfS_PiS0_S0_P12hiprandState
.LBB13_10:                              #   in Loop: Header=BB13_8 Depth=1
	movl	h_grid(%rip), %edi
	movl	h_block(%rip), %edx
	orq	%r14, %rdi
	orq	%r14, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_12
# %bb.11:                               #   in Loop: Header=BB13_8 Depth=1
	movq	d_x(%rip), %rdi
	movq	d_fx(%rip), %rsi
	callq	_Z19__device_stub__foldPfS_
.LBB13_12:                              #   in Loop: Header=BB13_8 Depth=1
	cmpq	%r15, h_trigger(%rip)
	jne	.LBB13_16
# %bb.13:                               #   in Loop: Header=BB13_8 Depth=1
	movq	h_xb(%rip), %rdi
	movq	d_x(%rip), %rsi
	movq	size_f(%rip), %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	h_fx(%rip), %rdi
	movq	d_fx(%rip), %rsi
	movq	size_f(%rip), %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	h_threads(%rip), %rax
	testq	%rax, %rax
	jle	.LBB13_16
# %bb.14:                               # %.lr.ph.i.preheader
                                        #   in Loop: Header=BB13_8 Depth=1
	movq	h_xb(%rip), %rcx
	movq	h_fx(%rip), %rdx
	xorl	%esi, %esi
.LBB13_15:                              # %.lr.ph.i
                                        #   Parent Loop BB13_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rcx,%rsi,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%rdx,%rsi,4), %xmm0
	movss	%xmm0, (%rcx,%rsi,4)
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB13_15
.LBB13_16:                              # %_Z6unfoldPfS_.exit
                                        #   in Loop: Header=BB13_8 Depth=1
	movslq	h_samples(%rip), %rax
	movslq	%r15d, %r15
	addq	%rax, %r15
	cmpq	%r15, h_steps(%rip)
	jg	.LBB13_8
.LBB13_17:                              # %._crit_edge
	movq	%rbx, %rdi
	callq	_Z7momentsPf
	movsbl	h_domainx(%rip), %esi
	movl	$.L.str.36, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, h_points(%rip)
	jle	.LBB13_20
# %bb.18:                               # %.lr.ph48.preheader
	xorl	%r14d, %r14d
.LBB13_19:                              # %.lr.ph48
                                        # =>This Inner Loop Header: Depth=1
	movq	h_dx(%rip), %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r14,4), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	(%rbx,%r14,4), %xmm1
	movl	$.L.str.37, %edi
	movb	$2, %al
	callq	printf
	incq	%r14
	movslq	h_points(%rip), %rax
	cmpq	%rax, %r14
	jl	.LBB13_19
.LBB13_20:                              # %.loopexit
	movq	%rbx, %rdi
	callq	free
.LBB13_21:
	callq	_Z6finishv
	xorl	%eax, %eax
	jmp	.LBB13_22
.LBB13_1:
	movq	%rbx, %rdi
	callq	_Z5usagePPc
	movl	$-1, %eax
.LBB13_22:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	main, .Lfunc_end13-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB14_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB14_2:
	subq	$32, %rsp
	.cfi_adjust_cfa_offset 32
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12init_dev_rngPjP12hiprandState, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10init_noisePfPiS0_S0_P12hiprandState, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4foldPfS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11run_momentsPfS_PiS0_S0_P12hiprandState, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$d_Dg, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_Dp, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_lambda, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_mean, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_fa, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_fb, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_mua, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_mub, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_comp, %esi
	movl	$.L__unnamed_13, %edx
	movl	$.L__unnamed_13, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_spp, %esi
	movl	$.L__unnamed_14, %edx
	movl	$.L__unnamed_14, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_samples, %esi
	movl	$.L__unnamed_15, %edx
	movl	$.L__unnamed_15, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_paths, %esi
	movl	$.L__unnamed_16, %edx
	movl	$.L__unnamed_16, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_domainx, %esi
	movl	$.L__unnamed_17, %edx
	movl	$.L__unnamed_17, %ecx
	movl	$1, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_points, %esi
	movl	$.L__unnamed_18, %edx
	movl	$.L__unnamed_18, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$__hip_module_dtor, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end14:
	.size	__hip_module_ctor, .Lfunc_end14-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB15_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB15_2:
	retq
.Lfunc_end15:
	.size	__hip_module_dtor, .Lfunc_end15-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	d_Dg,@object                    # @d_Dg
	.local	d_Dg
	.comm	d_Dg,4,4
	.type	d_Dp,@object                    # @d_Dp
	.local	d_Dp
	.comm	d_Dp,4,4
	.type	d_lambda,@object                # @d_lambda
	.local	d_lambda
	.comm	d_lambda,4,4
	.type	d_mean,@object                  # @d_mean
	.local	d_mean
	.comm	d_mean,4,4
	.type	d_fa,@object                    # @d_fa
	.local	d_fa
	.comm	d_fa,4,4
	.type	d_fb,@object                    # @d_fb
	.local	d_fb
	.comm	d_fb,4,4
	.type	d_mua,@object                   # @d_mua
	.local	d_mua
	.comm	d_mua,4,4
	.type	d_mub,@object                   # @d_mub
	.local	d_mub
	.comm	d_mub,4,4
	.type	d_comp,@object                  # @d_comp
	.local	d_comp
	.comm	d_comp,4,4
	.type	h_lambda,@object                # @h_lambda
	.bss
	.globl	h_lambda
	.p2align	2, 0x0
h_lambda:
	.long	0x00000000                      # float 0
	.size	h_lambda, 4

	.type	h_fa,@object                    # @h_fa
	.globl	h_fa
	.p2align	2, 0x0
h_fa:
	.long	0x00000000                      # float 0
	.size	h_fa, 4

	.type	h_fb,@object                    # @h_fb
	.globl	h_fb
	.p2align	2, 0x0
h_fb:
	.long	0x00000000                      # float 0
	.size	h_fb, 4

	.type	h_mua,@object                   # @h_mua
	.globl	h_mua
	.p2align	2, 0x0
h_mua:
	.long	0x00000000                      # float 0
	.size	h_mua, 4

	.type	h_mub,@object                   # @h_mub
	.globl	h_mub
	.p2align	2, 0x0
h_mub:
	.long	0x00000000                      # float 0
	.size	h_mub, 4

	.type	h_mean,@object                  # @h_mean
	.globl	h_mean
	.p2align	2, 0x0
h_mean:
	.long	0x00000000                      # float 0
	.size	h_mean, 4

	.type	h_comp,@object                  # @h_comp
	.globl	h_comp
	.p2align	2, 0x0
h_comp:
	.long	0                               # 0x0
	.size	h_comp, 4

	.type	h_trans,@object                 # @h_trans
	.globl	h_trans
	.p2align	2, 0x0
h_trans:
	.long	0x00000000                      # float 0
	.size	h_trans, 4

	.type	h_dev,@object                   # @h_dev
	.globl	h_dev
	.p2align	2, 0x0
h_dev:
	.long	0                               # 0x0
	.size	h_dev, 4

	.type	h_block,@object                 # @h_block
	.globl	h_block
	.p2align	2, 0x0
h_block:
	.long	0                               # 0x0
	.size	h_block, 4

	.type	h_grid,@object                  # @h_grid
	.globl	h_grid
	.p2align	2, 0x0
h_grid:
	.long	0                               # 0x0
	.size	h_grid, 4

	.type	h_spp,@object                   # @h_spp
	.globl	h_spp
	.p2align	2, 0x0
h_spp:
	.long	0                               # 0x0
	.size	h_spp, 4

	.type	h_samples,@object               # @h_samples
	.globl	h_samples
	.p2align	2, 0x0
h_samples:
	.long	0                               # 0x0
	.size	h_samples, 4

	.type	h_paths,@object                 # @h_paths
	.globl	h_paths
	.p2align	3, 0x0
h_paths:
	.quad	0                               # 0x0
	.size	h_paths, 8

	.type	h_periods,@object               # @h_periods
	.globl	h_periods
	.p2align	3, 0x0
h_periods:
	.quad	0                               # 0x0
	.size	h_periods, 8

	.type	h_threads,@object               # @h_threads
	.globl	h_threads
	.p2align	3, 0x0
h_threads:
	.quad	0                               # 0x0
	.size	h_threads, 8

	.type	h_steps,@object                 # @h_steps
	.globl	h_steps
	.p2align	3, 0x0
h_steps:
	.quad	0                               # 0x0
	.size	h_steps, 8

	.type	h_trigger,@object               # @h_trigger
	.globl	h_trigger
	.p2align	3, 0x0
h_trigger:
	.quad	0                               # 0x0
	.size	h_trigger, 8

	.type	d_spp,@object                   # @d_spp
	.local	d_spp
	.comm	d_spp,4,4
	.type	d_samples,@object               # @d_samples
	.local	d_samples
	.comm	d_samples,4,4
	.type	d_paths,@object                 # @d_paths
	.local	d_paths
	.comm	d_paths,8,8
	.type	h_domain,@object                # @h_domain
	.globl	h_domain
	.p2align	3, 0x0
h_domain:
	.quad	0
	.size	h_domain, 8

	.type	h_domainx,@object               # @h_domainx
	.globl	h_domainx
h_domainx:
	.byte	0                               # 0x0
	.size	h_domainx, 1

	.type	h_beginx,@object                # @h_beginx
	.globl	h_beginx
	.p2align	2, 0x0
h_beginx:
	.long	0x00000000                      # float 0
	.size	h_beginx, 4

	.type	h_endx,@object                  # @h_endx
	.globl	h_endx
	.p2align	2, 0x0
h_endx:
	.long	0x00000000                      # float 0
	.size	h_endx, 4

	.type	h_logx,@object                  # @h_logx
	.globl	h_logx
	.p2align	2, 0x0
h_logx:
	.long	0                               # 0x0
	.size	h_logx, 4

	.type	h_points,@object                # @h_points
	.globl	h_points
	.p2align	2, 0x0
h_points:
	.long	0                               # 0x0
	.size	h_points, 4

	.type	h_moments,@object               # @h_moments
	.globl	h_moments
	.p2align	2, 0x0
h_moments:
	.long	0                               # 0x0
	.size	h_moments, 4

	.type	d_domainx,@object               # @d_domainx
	.local	d_domainx
	.comm	d_domainx,1,1
	.type	d_points,@object                # @d_points
	.local	d_points
	.comm	d_points,4,4
	.type	h_x,@object                     # @h_x
	.globl	h_x
	.p2align	3, 0x0
h_x:
	.quad	0
	.size	h_x, 8

	.type	h_xb,@object                    # @h_xb
	.globl	h_xb
	.p2align	3, 0x0
h_xb:
	.quad	0
	.size	h_xb, 8

	.type	h_fx,@object                    # @h_fx
	.globl	h_fx
	.p2align	3, 0x0
h_fx:
	.quad	0
	.size	h_fx, 8

	.type	h_dx,@object                    # @h_dx
	.globl	h_dx
	.p2align	3, 0x0
h_dx:
	.quad	0
	.size	h_dx, 8

	.type	d_x,@object                     # @d_x
	.globl	d_x
	.p2align	3, 0x0
d_x:
	.quad	0
	.size	d_x, 8

	.type	d_fx,@object                    # @d_fx
	.globl	d_fx
	.p2align	3, 0x0
d_fx:
	.quad	0
	.size	d_fx, 8

	.type	d_dx,@object                    # @d_dx
	.globl	d_dx
	.p2align	3, 0x0
d_dx:
	.quad	0
	.size	d_dx, 8

	.type	d_pcd,@object                   # @d_pcd
	.globl	d_pcd
	.p2align	3, 0x0
d_pcd:
	.quad	0
	.size	d_pcd, 8

	.type	d_dcd,@object                   # @d_dcd
	.globl	d_dcd
	.p2align	3, 0x0
d_dcd:
	.quad	0
	.size	d_dcd, 8

	.type	d_dst,@object                   # @d_dst
	.globl	d_dst
	.p2align	3, 0x0
d_dst:
	.quad	0
	.size	d_dst, 8

	.type	h_seeds,@object                 # @h_seeds
	.globl	h_seeds
	.p2align	3, 0x0
h_seeds:
	.quad	0
	.size	h_seeds, 8

	.type	d_seeds,@object                 # @d_seeds
	.globl	d_seeds
	.p2align	3, 0x0
d_seeds:
	.quad	0
	.size	d_seeds, 8

	.type	d_states,@object                # @d_states
	.globl	d_states
	.p2align	3, 0x0
d_states:
	.quad	0
	.size	d_states, 8

	.type	size_f,@object                  # @size_f
	.globl	size_f
	.p2align	3, 0x0
size_f:
	.quad	0                               # 0x0
	.size	size_f, 8

	.type	size_i,@object                  # @size_i
	.globl	size_i
	.p2align	3, 0x0
size_i:
	.quad	0                               # 0x0
	.size	size_i, 8

	.type	size_ui,@object                 # @size_ui
	.globl	size_ui
	.p2align	3, 0x0
size_ui:
	.quad	0                               # 0x0
	.size	size_ui, 8

	.type	size_p,@object                  # @size_p
	.globl	size_p
	.p2align	3, 0x0
size_p:
	.quad	0                               # 0x0
	.size	size_p, 8

	.type	gen,@object                     # @gen
	.globl	gen
	.p2align	3, 0x0
gen:
	.quad	0
	.size	gen, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Usage: %s <params> \n\n"
	.size	.L.str, 22

	.type	.L.str.33,@object               # @.str.33
.L.str.33:
	.asciz	"a:b:c:d:e:f:g:h:i:j:k:l:m:n:o:p:q:r:s:t:u:v:w"
	.size	.L.str.33, 46

	.type	_ZL7options,@object             # @_ZL7options
	.data
	.p2align	4, 0x0
_ZL7options:
	.quad	.L.str.38
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	97                              # 0x61
	.zero	4
	.quad	.L.str.39
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	98                              # 0x62
	.zero	4
	.quad	.L.str.40
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	99                              # 0x63
	.zero	4
	.quad	.L.str.41
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	100                             # 0x64
	.zero	4
	.quad	.L.str.42
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	101                             # 0x65
	.zero	4
	.quad	.L.str.43
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	102                             # 0x66
	.zero	4
	.quad	.L.str.44
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	103                             # 0x67
	.zero	4
	.quad	.L.str.45
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	104                             # 0x68
	.zero	4
	.quad	.L.str.46
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	105                             # 0x69
	.zero	4
	.quad	.L.str.47
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	106                             # 0x6a
	.zero	4
	.quad	.L.str.48
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	107                             # 0x6b
	.zero	4
	.quad	.L.str.49
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	108                             # 0x6c
	.zero	4
	.quad	.L.str.50
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	109                             # 0x6d
	.zero	4
	.quad	.L.str.51
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	110                             # 0x6e
	.zero	4
	.quad	.L.str.52
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	111                             # 0x6f
	.zero	4
	.quad	.L.str.53
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	112                             # 0x70
	.zero	4
	.quad	.L.str.54
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	113                             # 0x71
	.zero	4
	.quad	.L.str.55
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	114                             # 0x72
	.zero	4
	.quad	.L.str.56
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	115                             # 0x73
	.zero	4
	.quad	.L.str.57
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	116                             # 0x74
	.zero	4
	.quad	.L.str.58
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	117                             # 0x75
	.zero	4
	.quad	.L.str.59
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	118                             # 0x76
	.zero	4
	.quad	.L.str.60
	.long	1                               # 0x1
	.zero	4
	.quad	0
	.long	119                             # 0x77
	.zero	4
	.size	_ZL7options, 736

	.type	.L.str.34,@object               # @.str.34
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.34:
	.asciz	"moments"
	.size	.L.str.34, 8

	.type	_Z12init_dev_rngPjP12hiprandState,@object # @_Z12init_dev_rngPjP12hiprandState
	.section	.rodata,"a",@progbits
	.globl	_Z12init_dev_rngPjP12hiprandState
	.p2align	3, 0x0
_Z12init_dev_rngPjP12hiprandState:
	.quad	_Z27__device_stub__init_dev_rngPjP12hiprandState
	.size	_Z12init_dev_rngPjP12hiprandState, 8

	.type	_Z10init_noisePfPiS0_S0_P12hiprandState,@object # @_Z10init_noisePfPiS0_S0_P12hiprandState
	.globl	_Z10init_noisePfPiS0_S0_P12hiprandState
	.p2align	3, 0x0
_Z10init_noisePfPiS0_S0_P12hiprandState:
	.quad	_Z25__device_stub__init_noisePfPiS0_S0_P12hiprandState
	.size	_Z10init_noisePfPiS0_S0_P12hiprandState, 8

	.type	_Z4foldPfS_,@object             # @_Z4foldPfS_
	.globl	_Z4foldPfS_
	.p2align	3, 0x0
_Z4foldPfS_:
	.quad	_Z19__device_stub__foldPfS_
	.size	_Z4foldPfS_, 8

	.type	_Z11run_momentsPfS_PiS0_S0_P12hiprandState,@object # @_Z11run_momentsPfS_PiS0_S0_P12hiprandState
	.globl	_Z11run_momentsPfS_PiS0_S0_P12hiprandState
	.p2align	3, 0x0
_Z11run_momentsPfS_PiS0_S0_P12hiprandState:
	.quad	_Z26__device_stub__run_momentsPfS_PiS0_S0_P12hiprandState
	.size	_Z11run_momentsPfS_PiS0_S0_P12hiprandState, 8

	.type	.L.str.35,@object               # @.str.35
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.35:
	.asciz	"1d"
	.size	.L.str.35, 3

	.type	.L.str.36,@object               # @.str.36
.L.str.36:
	.asciz	"#%c <<v>>\n"
	.size	.L.str.36, 11

	.type	.L.str.37,@object               # @.str.37
.L.str.37:
	.asciz	"%e %e\n"
	.size	.L.str.37, 7

	.type	.L.str.38,@object               # @.str.38
.L.str.38:
	.asciz	"Dg"
	.size	.L.str.38, 3

	.type	.L.str.39,@object               # @.str.39
.L.str.39:
	.asciz	"Dp"
	.size	.L.str.39, 3

	.type	.L.str.40,@object               # @.str.40
.L.str.40:
	.asciz	"lambda"
	.size	.L.str.40, 7

	.type	.L.str.41,@object               # @.str.41
.L.str.41:
	.asciz	"fa"
	.size	.L.str.41, 3

	.type	.L.str.42,@object               # @.str.42
.L.str.42:
	.asciz	"fb"
	.size	.L.str.42, 3

	.type	.L.str.43,@object               # @.str.43
.L.str.43:
	.asciz	"mua"
	.size	.L.str.43, 4

	.type	.L.str.44,@object               # @.str.44
.L.str.44:
	.asciz	"mub"
	.size	.L.str.44, 4

	.type	.L.str.45,@object               # @.str.45
.L.str.45:
	.asciz	"comp"
	.size	.L.str.45, 5

	.type	.L.str.46,@object               # @.str.46
.L.str.46:
	.asciz	"mean"
	.size	.L.str.46, 5

	.type	.L.str.47,@object               # @.str.47
.L.str.47:
	.asciz	"dev"
	.size	.L.str.47, 4

	.type	.L.str.48,@object               # @.str.48
.L.str.48:
	.asciz	"block"
	.size	.L.str.48, 6

	.type	.L.str.49,@object               # @.str.49
.L.str.49:
	.asciz	"paths"
	.size	.L.str.49, 6

	.type	.L.str.50,@object               # @.str.50
.L.str.50:
	.asciz	"periods"
	.size	.L.str.50, 8

	.type	.L.str.51,@object               # @.str.51
.L.str.51:
	.asciz	"trans"
	.size	.L.str.51, 6

	.type	.L.str.52,@object               # @.str.52
.L.str.52:
	.asciz	"spp"
	.size	.L.str.52, 4

	.type	.L.str.53,@object               # @.str.53
.L.str.53:
	.asciz	"samples"
	.size	.L.str.53, 8

	.type	.L.str.54,@object               # @.str.54
.L.str.54:
	.asciz	"mode"
	.size	.L.str.54, 5

	.type	.L.str.55,@object               # @.str.55
.L.str.55:
	.asciz	"domain"
	.size	.L.str.55, 7

	.type	.L.str.56,@object               # @.str.56
.L.str.56:
	.asciz	"domainx"
	.size	.L.str.56, 8

	.type	.L.str.57,@object               # @.str.57
.L.str.57:
	.asciz	"logx"
	.size	.L.str.57, 5

	.type	.L.str.58,@object               # @.str.58
.L.str.58:
	.asciz	"points"
	.size	.L.str.58, 7

	.type	.L.str.59,@object               # @.str.59
.L.str.59:
	.asciz	"beginx"
	.size	.L.str.59, 7

	.type	.L.str.60,@object               # @.str.60
.L.str.60:
	.asciz	"endx"
	.size	.L.str.60, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12init_dev_rngPjP12hiprandState"
	.size	.L__unnamed_1, 34

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10init_noisePfPiS0_S0_P12hiprandState"
	.size	.L__unnamed_2, 40

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z4foldPfS_"
	.size	.L__unnamed_3, 12

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z11run_momentsPfS_PiS0_S0_P12hiprandState"
	.size	.L__unnamed_4, 43

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"d_Dg"
	.size	.L__unnamed_5, 5

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"d_Dp"
	.size	.L__unnamed_6, 5

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"d_lambda"
	.size	.L__unnamed_7, 9

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"d_mean"
	.size	.L__unnamed_8, 7

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"d_fa"
	.size	.L__unnamed_9, 5

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"d_fb"
	.size	.L__unnamed_10, 5

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"d_mua"
	.size	.L__unnamed_11, 6

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"d_mub"
	.size	.L__unnamed_12, 6

	.type	.L__unnamed_13,@object          # @12
.L__unnamed_13:
	.asciz	"d_comp"
	.size	.L__unnamed_13, 7

	.type	.L__unnamed_14,@object          # @13
.L__unnamed_14:
	.asciz	"d_spp"
	.size	.L__unnamed_14, 6

	.type	.L__unnamed_15,@object          # @14
.L__unnamed_15:
	.asciz	"d_samples"
	.size	.L__unnamed_15, 10

	.type	.L__unnamed_16,@object          # @15
.L__unnamed_16:
	.asciz	"d_paths"
	.size	.L__unnamed_16, 8

	.type	.L__unnamed_17,@object          # @16
.L__unnamed_17:
	.asciz	"d_domainx"
	.size	.L__unnamed_17, 10

	.type	.L__unnamed_18,@object          # @17
.L__unnamed_18:
	.asciz	"d_points"
	.size	.L__unnamed_18, 9

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Model params:"
	.size	.Lstr, 14

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"    -a, --Dg=FLOAT          set the Gaussian noise intensity 'D_G' to FLOAT"
	.size	.Lstr.1, 76

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"    -b, --Dp=FLOAT          set the Poissonian noise intensity 'D_P' to FLOAT"
	.size	.Lstr.2, 78

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"    -c, --lambda=FLOAT      set the Poissonian kicks frequency '\\lambda' to FLOAT"
	.size	.Lstr.3, 82

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"    -d, --fa=FLOAT          set the first state of the dichotomous noise 'F_a' to FLOAT"
	.size	.Lstr.4, 88

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"    -e, --fb=FLOAT          set the second state of the dichotomous noise 'F_b' to FLOAT"
	.size	.Lstr.5, 89

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"    -f, --mua=FLOAT         set the transition rate of the first state of dichotomous noise '\\mu_a' to FLOAT"
	.size	.Lstr.6, 109

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"    -g, --mub=FLOAT         set the transition rate of the second state of dichotomous noise '\\mu_b' to FLOAT"
	.size	.Lstr.7, 110

	.type	.Lstr.8,@object                 # @str.8
.Lstr.8:
	.asciz	"    -h, --comp=INT          choose between biased and unbiased Poissonian or dichotomous noise. INT can be one of:"
	.size	.Lstr.8, 115

	.type	.Lstr.9,@object                 # @str.9
.Lstr.9:
	.asciz	"                            0: biased; 1: unbiased"
	.size	.Lstr.9, 51

	.type	.Lstr.10,@object                # @str.10
.Lstr.10:
	.asciz	"    -i, --mean=FLOAT        if is nonzero, fix the mean value of Poissonian noise or dichotomous noise to FLOAT, matters only for domains p, l, a, b, m or n"
	.size	.Lstr.10, 157

	.type	.Lstr.11,@object                # @str.11
.Lstr.11:
	.asciz	"Simulation params:"
	.size	.Lstr.11, 19

	.type	.Lstr.12,@object                # @str.12
.Lstr.12:
	.asciz	"    -j, --dev=INT           set the gpu device to INT"
	.size	.Lstr.12, 54

	.type	.Lstr.13,@object                # @str.13
.Lstr.13:
	.asciz	"    -k, --block=INT         set the gpu block size to INT"
	.size	.Lstr.13, 58

	.type	.Lstr.14,@object                # @str.14
.Lstr.14:
	.asciz	"    -l, --paths=LONG        set the number of paths to LONG"
	.size	.Lstr.14, 60

	.type	.Lstr.15,@object                # @str.15
.Lstr.15:
	.asciz	"    -m, --periods=LONG      set the number of periods to LONG"
	.size	.Lstr.15, 62

	.type	.Lstr.16,@object                # @str.16
.Lstr.16:
	.asciz	"    -n, --trans=FLOAT       specify fraction FLOAT of periods which stands for transients"
	.size	.Lstr.16, 90

	.type	.Lstr.17,@object                # @str.17
.Lstr.17:
	.asciz	"    -o, --spp=INT           specify how many integration steps should be calculated for the smallest characteristic time scale"
	.size	.Lstr.17, 127

	.type	.Lstr.18,@object                # @str.18
.Lstr.18:
	.asciz	"    -p, --samples=INT       specify how many integration steps should be calculated for a single kernel call"
	.size	.Lstr.18, 109

	.type	.Lstr.19,@object                # @str.19
.Lstr.19:
	.asciz	"Output params:"
	.size	.Lstr.19, 15

	.type	.Lstr.20,@object                # @str.20
.Lstr.20:
	.asciz	"    -q, --mode=STRING       sets the output mode. STRING can be one of:"
	.size	.Lstr.20, 72

	.type	.Lstr.21,@object                # @str.21
.Lstr.21:
	.asciz	"                            moments: the first moment <<v>>"
	.size	.Lstr.21, 60

	.type	.Lstr.22,@object                # @str.22
.Lstr.22:
	.asciz	"    -r, --domain=STRING     simultaneously scan over one or two model params. STRING can be one of:"
	.size	.Lstr.22, 100

	.type	.Lstr.23,@object                # @str.23
.Lstr.23:
	.asciz	"                            1d: only one parameter"
	.size	.Lstr.23, 51

	.type	.Lstr.24,@object                # @str.24
.Lstr.24:
	.asciz	"    -s, --domainx=CHAR      sets the first domain of the moments. CHAR can be one of:"
	.size	.Lstr.24, 86

	.type	.Lstr.25,@object                # @str.25
.Lstr.25:
	.asciz	"                            D: Dg; p: Dp; l: lambda; a: fa; b: fb; m: mua; n: mub"
	.size	.Lstr.25, 82

	.type	.Lstr.26,@object                # @str.26
.Lstr.26:
	.asciz	"    -t, --logx=INT          choose between linear and logarithmic scale of the domainx"
	.size	.Lstr.26, 87

	.type	.Lstr.27,@object                # @str.27
.Lstr.27:
	.asciz	"                            0: linear; 1: logarithmic"
	.size	.Lstr.27, 54

	.type	.Lstr.28,@object                # @str.28
.Lstr.28:
	.asciz	"    -u, --points=INT        set the number of samples to generate between begin and end"
	.size	.Lstr.28, 88

	.type	.Lstr.29,@object                # @str.29
.Lstr.29:
	.asciz	"    -v, --beginx=FLOAT      set the starting value of the domainx to FLOAT"
	.size	.Lstr.29, 75

	.type	.Lstr.30,@object                # @str.30
.Lstr.30:
	.asciz	"    -w, --endx=FLOAT        set the end value of the domainx to FLOAT"
	.size	.Lstr.30, 70

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__init_dev_rngPjP12hiprandState
	.addrsig_sym _Z25__device_stub__init_noisePfPiS0_S0_P12hiprandState
	.addrsig_sym _Z19__device_stub__foldPfS_
	.addrsig_sym _Z26__device_stub__run_momentsPfS_PiS0_S0_P12hiprandState
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym d_Dg
	.addrsig_sym d_Dp
	.addrsig_sym d_lambda
	.addrsig_sym d_mean
	.addrsig_sym d_fa
	.addrsig_sym d_fb
	.addrsig_sym d_mua
	.addrsig_sym d_mub
	.addrsig_sym d_comp
	.addrsig_sym h_lambda
	.addrsig_sym h_fa
	.addrsig_sym h_fb
	.addrsig_sym h_mua
	.addrsig_sym h_mub
	.addrsig_sym h_mean
	.addrsig_sym h_comp
	.addrsig_sym h_spp
	.addrsig_sym h_samples
	.addrsig_sym h_paths
	.addrsig_sym d_spp
	.addrsig_sym d_samples
	.addrsig_sym d_paths
	.addrsig_sym h_domainx
	.addrsig_sym h_points
	.addrsig_sym d_domainx
	.addrsig_sym d_points
	.addrsig_sym d_x
	.addrsig_sym d_fx
	.addrsig_sym d_dx
	.addrsig_sym d_pcd
	.addrsig_sym d_dcd
	.addrsig_sym d_dst
	.addrsig_sym d_seeds
	.addrsig_sym d_states
	.addrsig_sym gen
	.addrsig_sym _ZL7options
	.addrsig_sym _Z12init_dev_rngPjP12hiprandState
	.addrsig_sym _Z10init_noisePfPiS0_S0_P12hiprandState
	.addrsig_sym _Z4foldPfS_
	.addrsig_sym _Z11run_momentsPfS_PiS0_S0_P12hiprandState
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12init_dev_rngPjP12hiprandState ; -- Begin function _Z12init_dev_rngPjP12hiprandState
	.globl	_Z12init_dev_rngPjP12hiprandState
	.p2align	8
	.type	_Z12init_dev_rngPjP12hiprandState,@function
_Z12init_dev_rngPjP12hiprandState:      ; @_Z12init_dev_rngPjP12hiprandState
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v2, 0xa96f9d04
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s15, s4, v[0:1]
	v_mov_b32_e32 v5, 0
	v_dual_mov_b32 v3, 0x8f14727c :: v_dual_mov_b32 v6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	v_mad_u64_u32 v[7:8], null, v4, 48, s[2:3]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v0, 0x2c7f967f, v0
	v_mul_lo_u32 v9, 0x493c4aa1, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v4, 0x8ac25218, v9
	v_add_nc_u32_e32 v0, 0x75bcd15, v9
	v_xor_b32_e32 v1, 0x159a55e5, v9
	v_add_nc_u32_e32 v9, 0x583f19, v9
	s_clause 0x2
	global_store_b96 v[7:8], v[4:6], off
	global_store_b128 v[7:8], v[0:3], off offset:24
	global_store_b32 v[7:8], v9, off offset:40
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12init_dev_rngPjP12hiprandState
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12init_dev_rngPjP12hiprandState, .Lfunc_end0-_Z12init_dev_rngPjP12hiprandState
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 212
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10init_noisePfPiS0_S0_P12hiprandState ; -- Begin function _Z10init_noisePfPiS0_S0_P12hiprandState
	.globl	_Z10init_noisePfPiS0_S0_P12hiprandState
	.p2align	8
	.type	_Z10init_noisePfPiS0_S0_P12hiprandState,@function
_Z10init_noisePfPiS0_S0_P12hiprandState: ; @_Z10init_noisePfPiS0_S0_P12hiprandState
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[2:3], 0x34
	s_load_b64 s[4:5], s[2:3], 0x20
	v_and_b32_e32 v4, 0x3ff, v0
	s_load_b64 s[0:1], s[0:1], 0x4
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s6, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[11:12], null, s15, s6, v[4:5]
	v_bfe_u32 v5, v0, 10, 10
	s_lshr_b32 s0, s0, 16
	v_bfe_u32 v0, v0, 20, 10
	s_mul_i32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v4, s0, v4
	v_mad_u64_u32 v[7:8], null, v11, 48, s[4:5]
	v_mul_u32_u24_e32 v5, s1, v5
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_paths@rel32@lo+4
	s_addc_u32 s1, s1, d_paths@rel32@hi+12
	s_load_b256 s[4:11], s[2:3], 0x0
	s_load_b64 s[0:1], s[0:1], 0x0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_lambda@rel32@lo+4
	s_addc_u32 s3, s3, d_lambda@rel32@hi+12
	v_add3_u32 v0, v4, v5, v0
	global_load_b96 v[1:3], v[7:8], off offset:12
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, d_comp@rel32@lo+4
	s_addc_u32 s13, s13, d_comp@rel32@hi+12
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, d_mean@rel32@lo+4
	s_addc_u32 s15, s15, d_mean@rel32@hi+12
	s_getpc_b64 s[16:17]
	s_add_u32 s16, s16, d_fa@rel32@lo+4
	s_addc_u32 s17, s17, d_fa@rel32@hi+12
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, d_fb@rel32@lo+4
	s_addc_u32 s19, s19, d_fb@rel32@hi+12
	v_mul_lo_u32 v15, v0, 12
	s_getpc_b64 s[20:21]
	s_add_u32 s20, s20, d_mua@rel32@lo+4
	s_addc_u32 s21, s21, d_mua@rel32@hi+12
	v_add_co_u32 v9, vcc_lo, v7, 12
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v8, vcc_lo
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v15, v1, v2 offset1:1
	ds_store_b32 v15, v3 offset:8
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s24, s1, 31
	s_getpc_b64 s[22:23]
	s_add_u32 s22, s22, d_mub@rel32@lo+4
	s_addc_u32 s23, s23, d_mub@rel32@hi+12
	s_add_u32 s0, s0, s24
	s_mov_b32 s25, s24
	s_addc_u32 s1, s1, s24
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b64 s[26:27], s[0:1], s[24:25]
	v_cvt_f32_u32_e32 v0, s26
	v_cvt_f32_u32_e32 v1, s27
	s_sub_u32 s25, 0, s26
	s_subb_u32 s30, 0, s27
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_points@rel32@lo+4
	s_addc_u32 s1, s1, d_points@rel32@hi+12
	v_fmac_f32_e32 v0, 0x4f800000, v1
	s_load_b32 s28, s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x5f7ffffc, v0
	v_dual_mov_b32 v12, 0 :: v_dual_mul_f32 v1, 0x2f800000, v0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s0, s28, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_add_u32 s28, s28, s0
	s_mov_b32 s1, s0
	v_trunc_f32_e32 v1, v1
	s_addc_u32 s29, s0, s0
	s_xor_b64 s[28:29], s[28:29], s[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v0, 0xcf800000, v1
	v_cvt_u32_f32_e32 v1, v1
	v_cvt_f32_u32_e32 v4, s28
	v_cvt_f32_u32_e32 v5, s29
	s_sub_u32 s1, 0, s28
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s25, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v4, 0x4f800000, v5
	v_mul_hi_u32 v3, s25, v0
	v_mul_lo_u32 v6, s30, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v4, v4
	v_add_nc_u32_e32 v2, v3, v2
	v_mul_lo_u32 v3, s25, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v2, v6
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x5f7ffffc, v4
	v_mul_hi_u32 v5, v0, v3
	v_mul_lo_u32 v6, v0, v2
	v_mul_hi_u32 v13, v0, v2
	v_mul_hi_u32 v14, v1, v3
	v_mul_lo_u32 v3, v1, v3
	v_mul_hi_u32 v16, v1, v2
	v_mul_lo_u32 v2, v1, v2
	v_add_co_u32 v5, vcc_lo, v5, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v5, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, v6, v14, vcc_lo
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v16, vcc_lo
	v_mul_f32_e32 v6, 0x2f800000, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v3, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_trunc_f32_e32 v5, v6
	v_add_co_u32 v0, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
	v_fmac_f32_e32 v4, 0xcf800000, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v2, s25, v0
	v_cvt_u32_f32_e32 v6, v5
	v_mul_lo_u32 v3, s25, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cvt_u32_f32_e32 v13, v4
	v_mul_lo_u32 v4, s30, v0
	v_mul_lo_u32 v5, s1, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v14, s1, v13
	v_add_nc_u32_e32 v2, v2, v3
	v_mul_lo_u32 v3, s25, v0
	s_subb_u32 s25, 0, s29
	v_mul_lo_u32 v16, s1, v13
	v_add_nc_u32_e32 v2, v2, v4
	v_mul_lo_u32 v4, s25, v13
	v_add_nc_u32_e32 v5, v14, v5
	v_mul_hi_u32 v14, v0, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_lo_u32 v17, v0, v2
	v_mul_hi_u32 v19, v0, v2
	v_mul_hi_u32 v21, v1, v3
	v_mul_lo_u32 v3, v1, v3
	v_mul_hi_u32 v22, v1, v2
	v_mul_lo_u32 v2, v1, v2
	v_add_nc_u32_e32 v4, v5, v4
	v_mul_hi_u32 v18, v13, v16
	v_add_co_u32 v14, vcc_lo, v14, v17
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v19, v13, v4
	v_add_co_u32 v3, vcc_lo, v14, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, v17, v21, vcc_lo
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v22, vcc_lo
	v_mul_hi_u32 v17, v13, v4
	v_add_co_u32 v2, vcc_lo, v3, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v14, vcc_lo
	v_mul_hi_u32 v22, v6, v4
	v_add_co_u32 v5, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v1, v3, vcc_lo
	v_mul_lo_u32 v23, v6, v4
	v_mul_hi_u32 v21, v11, v5
	v_mad_u64_u32 v[2:3], null, 0, v5, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[0:1], null, v11, v14, 0
	v_mad_u64_u32 v[4:5], null, 0, v14, 0
	v_mul_hi_u32 v20, v6, v16
	v_mul_lo_u32 v16, v6, v16
	v_add_co_u32 v0, vcc_lo, v21, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v14, vcc_lo, v18, v19
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, v0, v2
	v_add_co_ci_u32_e32 v0, vcc_lo, v1, v3, vcc_lo
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v5, vcc_lo
	v_add_co_u32 v2, vcc_lo, v14, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s0, v0, v4
	v_add_co_ci_u32_e64 v4, s0, 0, v1, s0
	v_add_co_ci_u32_e32 v2, vcc_lo, v17, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v14, s27, v3
	v_mad_u64_u32 v[0:1], null, s26, v3, 0
	v_mul_lo_u32 v16, s26, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v22, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, v23
	v_add_co_u32 v17, s0, v3, 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	v_add3_u32 v1, v1, v16, v14
	v_add_co_u32 v2, vcc_lo, v13, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, v6, v5, vcc_lo
	v_sub_nc_u32_e32 v20, 0, v1
	v_sub_co_u32 v0, vcc_lo, v11, v0
	v_add_co_ci_u32_e64 v18, s0, 0, v4, s0
	v_add_co_u32 v13, s0, v3, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v19, s0, 0, v4, s0
	v_subrev_co_ci_u32_e64 v20, s0, s27, v20, vcc_lo
	v_sub_co_u32 v23, s0, v0, s26
	v_sub_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_subrev_co_ci_u32_e64 v20, s0, 0, v20, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s26, v23
	v_mul_hi_u32 v6, s1, v2
	v_mul_lo_u32 v21, s1, v5
	v_mul_lo_u32 v16, s25, v2
	v_cmp_eq_u32_e64 s0, s27, v1
	v_cndmask_b32_e64 v23, 0, -1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s27, v20
	v_mul_lo_u32 v14, s1, v2
	v_add_nc_u32_e32 v6, v6, v21
	v_cndmask_b32_e64 v24, 0, -1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s26, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v6, v6, v16
	v_mul_hi_u32 v22, v5, v14
	v_cndmask_b32_e64 v0, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s27, v20
	v_cndmask_b32_e32 v20, v24, v23, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s27, v1
	v_mul_lo_u32 v23, v5, v14
	v_mul_hi_u32 v1, v2, v14
	v_mul_lo_u32 v14, v2, v6
	v_cndmask_b32_e64 v21, 0, -1, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v0, v21, v0, s0
	v_dual_cndmask_b32 v16, v19, v18 :: v_dual_cndmask_b32 v13, v13, v17
	v_mul_hi_u32 v17, v5, v6
	v_cmp_ne_u32_e32 vcc_lo, 0, v0
	v_mul_hi_u32 v0, v2, v6
	v_mul_lo_u32 v6, v5, v6
	v_dual_cndmask_b32 v3, v3, v13 :: v_dual_cndmask_b32 v4, v4, v16
	v_add_co_u32 v1, vcc_lo, v1, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v0, vcc_lo, 0, v0, vcc_lo
	v_xor_b32_e32 v3, s24, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v4, s24, v4
	v_add_co_u32 v1, vcc_lo, v1, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v0, vcc_lo, v0, v22, vcc_lo
	v_sub_co_u32 v1, s0, v3, s24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e64 v3, s0, s24, v4, s0
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v17, vcc_lo
	v_add_co_u32 v0, vcc_lo, v0, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v13, 31, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, v1, v13
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v13, vcc_lo
	v_add_co_u32 v6, vcc_lo, v2, v0
	v_add_co_ci_u32_e32 v14, vcc_lo, v5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v16, v1, v13
	v_xor_b32_e32 v17, v3, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[0:1], null, v16, v14, 0
	v_mul_hi_u32 v18, v16, v6
	v_mad_u64_u32 v[2:3], null, v17, v6, 0
	v_mad_u64_u32 v[4:5], null, v17, v14, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v18, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v0, vcc_lo, v1, v3, vcc_lo
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v5, vcc_lo
	v_add_co_u32 v2, vcc_lo, v0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo
	v_mul_lo_u32 v4, s29, v2
	v_mad_u64_u32 v[0:1], null, s28, v2, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, s28, v3
	v_sub_co_u32 v0, vcc_lo, v16, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v2, v4
	v_sub_nc_u32_e32 v2, v17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e64 v2, s0, s29, v2, vcc_lo
	v_sub_co_ci_u32_e32 v1, vcc_lo, v17, v1, vcc_lo
	v_sub_co_u32 v3, vcc_lo, v0, s28
	v_subrev_co_ci_u32_e64 v4, s0, 0, v2, vcc_lo
	v_cmp_le_u32_e64 s0, s28, v0
	v_subrev_co_ci_u32_e32 v2, vcc_lo, s29, v2, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s29, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, 0, -1, s0
	v_cmp_le_u32_e64 s0, s28, v3
	v_cndmask_b32_e64 v16, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s29, v4
	v_cndmask_b32_e64 v6, 0, -1, s0
	v_cmp_le_u32_e64 s0, s29, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v14, 0, -1, s0
	v_cmp_eq_u32_e64 s0, s29, v1
	v_cndmask_b32_e32 v6, v14, v6, vcc_lo
	v_sub_co_u32 v14, vcc_lo, v3, s28
	v_subrev_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_ne_u32_e32 vcc_lo, 0, v6
	v_cndmask_b32_e64 v5, v16, v5, s0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_domainx@rel32@lo+4
	s_addc_u32 s1, s1, d_domainx@rel32@hi+12
	global_load_u8 v19, v12, s[0:1]
	v_cndmask_b32_e32 v2, v4, v2, vcc_lo
	v_cndmask_b32_e32 v3, v3, v14, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v0, v0, v3 :: v_dual_cndmask_b32 v1, v1, v2
	v_xor_b32_e32 v0, v0, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v1, v13
	v_sub_co_u32 v0, vcc_lo, v0, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e32 v1, vcc_lo, v1, v13, vcc_lo
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v16, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v1, vcc_lo
	s_clause 0x2
	global_load_b64 v[13:14], v[7:8], off offset:40
	global_load_b96 v[4:6], v[7:8], off
	global_load_b128 v[0:3], v[7:8], off offset:24
	global_load_b32 v18, v[16:17], off
	s_load_b32 s2, s[2:3], 0x0
	s_load_b32 s12, s[12:13], 0x0
	s_load_b32 s5, s[14:15], 0x0
	s_load_b32 s3, s[16:17], 0x0
	s_load_b32 s4, s[18:19], 0x0
	s_load_b32 s0, s[20:21], 0x0
	s_load_b32 s1, s[22:23], 0x0
	s_mov_b32 s13, -1
	s_waitcnt vmcnt(4)
	v_cmp_gt_i16_e32 vcc_lo, 0x6e, v19
	s_cbranch_vccnz .LBB1_6
; %bb.1:                                ; %NodeBlock183
	v_cmp_gt_i16_e32 vcc_lo, 0x70, v19
	s_cbranch_vccnz .LBB1_7
; %bb.2:                                ; %LeafBlock181
	v_cmp_eq_u16_e32 vcc_lo, 0x70, v19
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v20, s2
	s_cbranch_vccz .LBB1_5
; %bb.3:
	v_cmp_eq_f32_e64 s13, s5, 0
	v_mov_b32_e32 v20, s2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB1_5
; %bb.4:
	v_mul_f32_e64 v16, s5, s5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v17, null, v18, v18, v16
	v_rcp_f32_e32 v20, v17
	s_waitcnt_depctr 0xfff
	v_fma_f32 v21, -v17, v20, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v20, v21, v20
	v_div_scale_f32 v21, vcc_lo, v16, v18, v16
	v_mul_f32_e32 v22, v21, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v23, -v17, v22, v21
	v_fmac_f32_e32 v22, v23, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v17, -v17, v22, v21
	v_div_fmas_f32 v17, v17, v20, v22
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v20, v17, v18, v16
.LBB1_5:                                ; %Flow189
	s_mov_b32 s13, 0
	s_branch .LBB1_8
.LBB1_6:
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr17
                                        ; implicit-def: $vgpr16
	s_branch .LBB1_19
.LBB1_7:
                                        ; implicit-def: $vgpr20
.LBB1_8:                                ; %Flow194
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v17, s0 :: v_dual_mov_b32 v16, s1
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB1_18
; %bb.9:                                ; %LeafBlock179
	v_cmp_eq_u16_e32 vcc_lo, 0x6e, v19
	v_dual_mov_b32 v17, s0 :: v_dual_mov_b32 v16, s1
	s_cbranch_vccz .LBB1_17
; %bb.10:
	s_cmp_lg_u32 s12, 1
	s_cbranch_scc0 .LBB1_13
; %bb.11:
	v_cmp_eq_f32_e64 s13, s5, 0
	v_mov_b32_e32 v17, s0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s13
	s_mov_b32 s13, 0
	s_cbranch_vccnz .LBB1_14
; %bb.12:
	v_sub_f32_e64 v16, s3, s5
	v_sub_f32_e64 v17, s5, s4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v16, v18
	v_div_scale_f32 v20, null, v17, v17, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v21, v20
	s_waitcnt_depctr 0xfff
	v_fma_f32 v22, -v20, v21, 1.0
	v_fmac_f32_e32 v21, v22, v21
	v_div_scale_f32 v22, vcc_lo, v16, v17, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v23, v22, v21
	v_fma_f32 v24, -v20, v23, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, v24, v21
	v_fma_f32 v20, -v20, v23, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v20, v20, v21, v23
	v_div_fixup_f32 v17, v20, v17, v16
	s_branch .LBB1_14
.LBB1_13:
	s_mov_b32 s13, -1
                                        ; implicit-def: $vgpr17
.LBB1_14:                               ; %Flow191
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB1_16
; %bb.15:
	s_waitcnt vmcnt(0)
	v_mul_f32_e64 v16, v18, -s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v17, null, s4, s4, v16
	v_rcp_f32_e32 v20, v17
	s_waitcnt_depctr 0xfff
	v_fma_f32 v21, -v17, v20, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v20, v21, v20
	v_div_scale_f32 v21, vcc_lo, v16, s4, v16
	v_mul_f32_e32 v22, v21, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v23, -v17, v22, v21
	v_fmac_f32_e32 v22, v23, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v17, -v17, v22, v21
	v_div_fmas_f32 v17, v17, v20, v22
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v17, v17, s4, v16
.LBB1_16:                               ; %Flow192
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v16, v18
.LBB1_17:                               ; %Flow193
	v_mov_b32_e32 v20, s2
.LBB1_18:                               ; %Flow195
	s_mov_b32 s13, 0
.LBB1_19:                               ; %Flow202
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB1_34
; %bb.20:                               ; %NodeBlock
	v_cmp_lt_i16_e32 vcc_lo, 0x6c, v19
	s_cbranch_vccz .LBB1_24
; %bb.21:
	s_waitcnt lgkmcnt(0)
	s_cmp_lg_u32 s12, 1
	s_cbranch_scc0 .LBB1_25
; %bb.22:
	v_cmp_eq_f32_e64 s12, s5, 0
	v_mov_b32_e32 v16, s1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s12
	s_mov_b32 s12, 0
	s_cbranch_vccnz .LBB1_26
; %bb.23:
	v_sub_f32_e64 v16, s4, s5
	v_sub_f32_e64 v17, s5, s3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v16, v18
	v_div_scale_f32 v20, null, v17, v17, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v21, v20
	s_waitcnt_depctr 0xfff
	v_fma_f32 v22, -v20, v21, 1.0
	v_fmac_f32_e32 v21, v22, v21
	v_div_scale_f32 v22, vcc_lo, v16, v17, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v23, v22, v21
	v_fma_f32 v24, -v20, v23, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, v24, v21
	v_fma_f32 v20, -v20, v23, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v20, v20, v21, v23
	v_div_fixup_f32 v16, v20, v17, v16
	s_branch .LBB1_26
.LBB1_24:
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s3, -1
                                        ; implicit-def: $vgpr16
	s_branch .LBB1_29
.LBB1_25:
	s_mov_b32 s12, -1
                                        ; implicit-def: $vgpr16
.LBB1_26:                               ; %Flow197
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB1_28
; %bb.27:
	s_waitcnt vmcnt(0)
	v_mul_f32_e64 v16, v18, -s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v17, null, s3, s3, v16
	v_rcp_f32_e32 v20, v17
	s_waitcnt_depctr 0xfff
	v_fma_f32 v21, -v17, v20, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v20, v21, v20
	v_div_scale_f32 v21, vcc_lo, v16, s3, v16
	v_mul_f32_e32 v22, v21, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v23, -v17, v22, v21
	v_fmac_f32_e32 v22, v23, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v17, -v17, v22, v21
	v_div_fmas_f32 v17, v17, v20, v22
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v16, v17, s3, v16
.LBB1_28:                               ; %Flow198
	s_mov_b32 s3, 0
.LBB1_29:                               ; %Flow200
	v_mov_b32_e32 v20, s2
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB1_33
; %bb.30:                               ; %LeafBlock
	v_cmp_eq_u16_e32 vcc_lo, 0x6c, v19
	v_mov_b32_e32 v20, s2
	s_cbranch_vccz .LBB1_32
; %bb.31:
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v20, v18
.LBB1_32:                               ; %Flow199
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v18, s0
	v_mov_b32_e32 v16, s1
.LBB1_33:                               ; %Flow201
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v17, v18
.LBB1_34:
	s_waitcnt lgkmcnt(0)
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_spp@rel32@lo+4
	s_addc_u32 s1, s1, d_spp@rel32@hi+12
                                        ; implicit-def: $vgpr18
	s_load_b32 s0, s[0:1], 0x0
	v_cmp_neq_f32_e64 s1, 0, v20
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_i32_e32 v19, s0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_36
; %bb.35:
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v18, null, v20, v20, 1.0
	v_div_scale_f32 v23, vcc_lo, 1.0, v20, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v21, v18
	s_waitcnt_depctr 0xfff
	v_fma_f32 v22, -v18, v21, 1.0
	v_fmac_f32_e32 v21, v22, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v22, v23, v21
	v_fma_f32 v24, -v18, v22, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v22, v24, v21
	v_fma_f32 v18, -v18, v22, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v18, v18, v21, v22
	v_div_fixup_f32 v18, v18, v20, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v21, null, v19, v19, v18
	v_rcp_f32_e32 v22, v21
	s_waitcnt_depctr 0xfff
	v_fma_f32 v23, -v21, v22, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v22, v23, v22
	v_div_scale_f32 v23, vcc_lo, v18, v19, v18
	v_mul_f32_e32 v24, v23, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v25, -v21, v24, v23
	v_fmac_f32_e32 v24, v25, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v21, -v21, v24, v23
	v_div_fmas_f32 v21, v21, v22, v24
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v18, v21, v19, v18
.LBB1_36:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_neq_f32_e64 s0, 0, v17
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB1_42
; %bb.37:
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v18, null, v17, v17, 1.0
	v_div_scale_f32 v21, null, v16, v16, 1.0
	v_div_scale_f32 v26, vcc_lo, 1.0, v17, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v22, v18
	v_rcp_f32_e32 v23, v21
	s_waitcnt_depctr 0xfff
	v_fma_f32 v24, -v18, v22, 1.0
	v_fma_f32 v25, -v21, v23, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v22, v24, v22 :: v_dual_fmac_f32 v23, v25, v23
	v_div_scale_f32 v24, s2, 1.0, v16, 1.0
	v_mul_f32_e32 v25, v26, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v27, v24, v23
	v_fma_f32 v28, -v18, v25, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v29, -v21, v27, v24
	v_fmac_f32_e32 v25, v28, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v27, v29, v23
	v_fma_f32 v18, -v18, v25, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v21, -v21, v27, v24
	v_div_fmas_f32 v18, v18, v22, v25
	s_mov_b32 vcc_lo, s2
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v22, v21, v23, v27
	v_div_fixup_f32 v21, v18, v17, 1.0
                                        ; implicit-def: $vgpr18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v22, v22, v16, 1.0
	v_cmpx_nlt_f32_e32 v21, v22
	s_xor_b32 s2, exec_lo, s2
; %bb.38:
	v_div_scale_f32 v18, null, v19, v19, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v21, v18
	s_waitcnt_depctr 0xfff
	v_fma_f32 v23, -v18, v21, 1.0
	v_fmac_f32_e32 v21, v23, v21
	v_div_scale_f32 v23, vcc_lo, v22, v19, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v24, v23, v21
	v_fma_f32 v25, -v18, v24, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v24, v25, v21
	v_fma_f32 v18, -v18, v24, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v18, v18, v21, v24
                                        ; implicit-def: $vgpr21
	v_div_fixup_f32 v18, v18, v19, v22
                                        ; implicit-def: $vgpr19
; %bb.39:                               ; %Flow
	s_and_not1_saveexec_b32 s2, s2
; %bb.40:
	v_div_scale_f32 v18, null, v19, v19, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v22, v18
	s_waitcnt_depctr 0xfff
	v_fma_f32 v23, -v18, v22, 1.0
	v_fmac_f32_e32 v22, v23, v22
	v_div_scale_f32 v23, vcc_lo, v21, v19, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v24, v23, v22
	v_fma_f32 v25, -v18, v24, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v24, v25, v22
	v_fma_f32 v18, -v18, v24, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v18, v18, v22, v24
	v_div_fixup_f32 v18, v18, v19, v21
; %bb.41:                               ; %Flow187
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_42:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(1)
	v_dual_mov_b32 v19, v13 :: v_dual_mov_b32 v22, v2
	v_dual_mov_b32 v23, v3 :: v_dual_mov_b32 v24, v1
                                        ; implicit-def: $vgpr21
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB1_44
; %bb.43:
	v_lshrrev_b32_e32 v19, 2, v0
	v_add_nc_u32_e32 v4, 0x587c5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v0, v19, v0
	v_lshlrev_b32_e32 v19, 4, v13
	v_lshlrev_b32_e32 v21, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v19, v21, v19
	v_xor3_b32 v19, v19, v0, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v19, v4
	v_cvt_f32_u32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v0, 0x2f800000, v0, 0x2f800000
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
	v_cndmask_b32_e64 v21, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v0, v0, v21
	v_log_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v21, 0x3f317217, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v22, 0x3f317217, v0, -v21
	v_fmamk_f32 v22, v0, 0x3377d1cf, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v21, v21, v22
	v_cndmask_b32_e64 v22, 0, 0x41b17218, vcc_lo
	v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
	v_cndmask_b32_e32 v0, v0, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v0, v0, v22
	v_div_scale_f32 v21, null, v20, v20, v0
	v_div_scale_f32 v24, vcc_lo, v0, v20, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v22, v21
	s_waitcnt_depctr 0xfff
	v_fma_f32 v23, -v21, v22, 1.0
	v_fmac_f32_e32 v22, v23, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v23, v24, v22
	v_fma_f32 v25, -v21, v23, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, v25, v22
	v_fma_f32 v21, -v21, v23, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v21, v21, v22, v23
	v_div_fixup_f32 v0, v21, v20, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v20, null, v18, v18, v0
	v_div_scale_f32 v23, vcc_lo, v0, v18, v0
	v_rcp_f32_e32 v21, v20
	s_waitcnt_depctr 0xfff
	v_fma_f32 v22, -v20, v21, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v21, v22, v21
	v_mul_f32_e32 v22, v23, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v24, -v20, v22, v23
	v_fmac_f32_e32 v22, v24, v21
	v_mov_b32_e32 v24, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v20, -v20, v22, v23
	v_mov_b32_e32 v23, v13
	v_div_fmas_f32 v20, v20, v21, v22
	v_mov_b32_e32 v22, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v0, v20, v18, v0
	v_sub_f32_e32 v0, 0.5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_floor_f32_e32 v0, v0
	v_cvt_i32_f32_e32 v21, v0
	v_mov_b32_e32 v0, v1
.LBB1_44:
	s_or_b32 exec_lo, exec_lo, s2
	v_dual_mov_b32 v13, v19 :: v_dual_mov_b32 v2, v22
	v_mov_b32_e32 v3, v23
                                        ; implicit-def: $vgpr25
                                        ; implicit-def: $vgpr20
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_46
; %bb.45:
	v_lshrrev_b32_e32 v1, 2, v0
	v_lshrrev_b32_e32 v3, 2, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v0, v1, v0
	v_lshlrev_b32_e32 v1, 4, v19
	v_lshlrev_b32_e32 v2, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v1, v2
	v_xor_b32_e32 v2, v3, v24
	v_xor3_b32 v3, v1, v19, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 1, v2
	v_lshlrev_b32_e32 v1, 4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v0, v0, v1
	v_add3_u32 v1, v4, v3, 0x587c5
	v_add_nc_u32_e32 v4, 0xb0f8a, v4
	v_xor3_b32 v13, v0, v2, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, v1
	v_dual_fmaak_f32 v1, 0x2f800000, v1, 0x2f800000 :: v_dual_add_nc_u32 v0, v13, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v0, v0
	v_cmp_ngt_f32_e64 s0, 0.5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v0, 0x2f800000, v0, 0x2f800000
	v_cndmask_b32_e64 v1, v17, v16, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
	v_cndmask_b32_e64 v2, 1.0, 0x4f800000, vcc_lo
	v_mul_f32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_log_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x3f317217, v0
	v_fma_f32 v20, 0x3f317217, v0, -v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v20, v0, 0x3377d1cf, v20
	v_add_f32_e32 v2, v2, v20
	v_cndmask_b32_e64 v20, 0, 0x41b17218, vcc_lo
	v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v2, vcc_lo
	v_sub_f32_e32 v0, v0, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v2, null, v1, v1, v0
	v_div_scale_f32 v20, vcc_lo, v0, v1, v0
	v_rcp_f32_e32 v16, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v17, -v2, v16, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v17, v16
	v_mul_f32_e32 v17, v20, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v24, -v2, v17, v20
	v_dual_fmac_f32 v17, v24, v16 :: v_dual_mov_b32 v24, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, -v2, v17, v20
	v_div_fmas_f32 v2, v2, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v0, v2, v1, v0
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v1, null, v18, v18, v0
	v_div_scale_f32 v17, vcc_lo, v0, v18, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v2, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v16, -v1, v2, 1.0
	v_fmac_f32_e32 v2, v16, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v17, v2
	v_fma_f32 v20, -v1, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v16, v20, v2
	v_cndmask_b32_e64 v20, 0, 1, s0
	v_fma_f32 v1, -v1, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v1, v1, v2, v16
	v_mov_b32_e32 v2, v19
	v_div_fixup_f32 v0, v1, v18, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v0, 0.5, v0
	v_floor_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v25, v0
	v_mov_b32_e32 v0, v22
.LBB1_46:
	s_or_b32 exec_lo, exec_lo, s1
	ds_load_2addr_b32 v[16:17], v15 offset1:1
	s_waitcnt vmcnt(0)
	ds_load_b32 v18, v15 offset:8
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_mov_b32_e32 v1, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v22, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v23, vcc_lo, s7, v12, vcc_lo
	v_add_co_u32 v26, vcc_lo, s8, v11
	v_add_co_ci_u32_e32 v27, vcc_lo, s9, v12, vcc_lo
	v_add_co_u32 v11, vcc_lo, s10, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v12, vcc_lo
	global_store_b32 v[22:23], v21, off
	global_store_b32 v[26:27], v25, off
	global_store_b32 v[11:12], v20, off
	s_clause 0x1
	global_store_b96 v[7:8], v[4:6], off
	global_store_b128 v[7:8], v[0:3], off offset:24
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b96 v[9:10], v[16:18], off
	global_store_b64 v[7:8], v[13:14], off offset:40
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10init_noisePfPiS0_S0_P12hiprandState
		.amdhsa_group_segment_fixed_size 12288
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 1
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 30
		.amdhsa_next_free_sgpr 31
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10init_noisePfPiS0_S0_P12hiprandState, .Lfunc_end1-_Z10init_noisePfPiS0_S0_P12hiprandState
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4804
; NumSgprs: 33
; NumVgprs: 30
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 12288 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 33
; NumVGPRsForWavesPerEU: 30
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z4foldPfS_             ; -- Begin function _Z4foldPfS_
	.globl	_Z4foldPfS_
	.p2align	8
	.type	_Z4foldPfS_,@function
_Z4foldPfS_:                            ; @_Z4foldPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v4, v[2:3], off
	global_load_b32 v5, v[0:1], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v6, 0.5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_floor_f32_e32 v6, v6
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, 2.0, v6
	v_fmac_f32_e32 v4, -2.0, v6
	global_store_b32 v[2:3], v4, off
	global_store_b32 v[0:1], v5, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4foldPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z4foldPfS_, .Lfunc_end2-_Z4foldPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2align	2                               ; -- Begin function _Z5driftf
	.type	_Z5driftf,@function
_Z5driftf:                              ; @_Z5driftf
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v0, 0x40490fdb, v0
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr2
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v1, 0x7fffffff, v0
	v_cmpx_ngt_f32_e64 0x48000000, |v0|
	s_xor_b32 s2, exec_lo, s1
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_mov_b32 s0, 0x7fffff
	v_mov_b32_e32 v4, 0
	v_and_or_b32 v12, v1, s0, 0x800000
	v_lshrrev_b32_e32 v9, 23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, 0xfe5163ab, v12, 0
	v_add_nc_u32_e32 v10, 0xffffff88, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e32 vcc_lo, 63, v10
	v_mad_u64_u32 v[5:6], null, 0x3c439041, v12, v[3:4]
	v_cndmask_b32_e64 v11, 0, 0xffffffc0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v6
	v_add_nc_u32_e32 v11, v11, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[6:7], null, 0xdb629599, v12, v[3:4]
	v_cmp_lt_u32_e64 s0, 31, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, 0, 0xffffffe0, s0
	v_dual_mov_b32 v3, v7 :: v_dual_cndmask_b32 v2, v6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v13, v13, v11
	v_mad_u64_u32 v[7:8], null, 0xf534ddc0, v12, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s1, 31, v13
	v_mov_b32_e32 v3, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v5, v7, v5, vcc_lo
	v_mad_u64_u32 v[8:9], null, 0xfc2757d1, v12, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v2, v5, v2, s0
	v_mov_b32_e32 v3, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, 0x4e441529, v12, v[3:4]
	v_mov_b32_e32 v3, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, 0xa2f9836e, v12, v[3:4]
	v_cndmask_b32_e64 v3, 0, 0xffffffe0, s1
	v_dual_cndmask_b32 v4, v9, v7 :: v_dual_add_nc_u32 v3, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v10, v10, v8 :: v_dual_cndmask_b32 v9, v11, v9
	v_cndmask_b32_e32 v8, v8, v6, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v7, v10, v4, s0
	v_cndmask_b32_e64 v9, v9, v10, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v4, v4, v8, s0
	v_sub_nc_u32_e32 v10, 32, v3
	v_cndmask_b32_e64 v8, v8, v5, s0
	v_cndmask_b32_e64 v9, v9, v7, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v7, v7, v4, s1
	v_cndmask_b32_e64 v4, v4, v8, s1
	v_cndmask_b32_e64 v2, v8, v2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v11, v9, v7, v10
	v_alignbit_b32 v6, v7, v4, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v3, v11, v9, vcc_lo
	v_alignbit_b32 v9, v4, v2, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v5, v6, v7, vcc_lo
	v_bfe_u32 v6, v3, 29, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v4, v9, v4, vcc_lo
	v_alignbit_b32 v7, v3, v5, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v8, 0, v6
	v_alignbit_b32 v5, v5, v4, 30
	v_alignbit_b32 v2, v4, v2, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v7, v7, v8
	v_xor_b32_e32 v4, v5, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v2, v2, v8
	v_clz_i32_u32_e32 v9, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v9, 32, v9
	v_sub_nc_u32_e32 v5, 31, v9
	v_lshlrev_b32_e32 v11, 23, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_alignbit_b32 v7, v7, v4, v5
	v_alignbit_b32 v2, v4, v2, v5
	v_lshrrev_b32_e32 v5, 29, v3
	v_alignbit_b32 v4, v7, v2, 9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v5, 31, v5
	v_lshrrev_b32_e32 v7, 9, v7
	v_clz_i32_u32_e32 v8, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v10, 0.5, v5
	v_min_u32_e32 v8, 32, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v10, v10, v11
	v_sub_nc_u32_e32 v12, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v2, v4, v2, v12
	v_or_b32_e32 v4, v7, v10
	v_add_lshl_u32 v7, v8, v9, 23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v2, 9, v2
	v_mul_f32_e32 v8, 0x3fc90fda, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v7
	v_fma_f32 v7, 0x3fc90fda, v4, -v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, 0x33000000, v2
	v_fmamk_f32 v4, v4, 0x33a22168, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v2, v2, v5
	v_fmac_f32_e32 v4, 0x3fc90fda, v2
	v_lshrrev_b32_e32 v3, 30, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_add_f32 v2, v8, v4 :: v_dual_add_nc_u32 v3, v6, v3
.LBB3_2:                                ; %Flow
	s_and_not1_saveexec_b32 s0, s2
; %bb.3:
	v_mul_f32_e64 v2, 0x3f22f983, |v0|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v3, v2
	v_fma_f32 v2, 0xbfc90fda, v3, |v0|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v2, v3, 0xb3a22168, v2
	v_fmamk_f32 v2, v3, 0xa7c234c4, v2
	v_cvt_i32_f32_e32 v3, v3
; %bb.4:                                ; %_ZL4sinff.exit
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v4, v2, v2 :: v_dual_and_b32 v7, 1, v3
	s_mov_b32 s0, 0xb94c1982
	s_mov_b32 s1, 0x37d75334
	v_xor_b32_e32 v1, v1, v0
	v_fmaak_f32 v5, s0, v4, 0x3c0881c4
	v_cmp_eq_u32_e32 vcc_lo, 0, v7
	v_lshlrev_b32_e32 v3, 30, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmaak_f32 v5, v4, v5, 0xbe2aaa9d
	v_fmaak_f32 v6, s1, v4, 0xbab64f3b
	v_and_b32_e32 v3, 0x80000000, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v5, v4, v5
	v_fmaak_f32 v6, v4, v6, 0x3d2aabf7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v2, v2, v5
	v_fmaak_f32 v6, v4, v6, 0xbf000004
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, v4, v6, 1.0
	v_cndmask_b32_e32 v2, v4, v2, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v0, 0x1f8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v1, v3, v2
	v_cndmask_b32_e32 v0, 0x7fc00000, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_lt_f32_e32 vcc_lo, 0, v0
	v_cndmask_b32_e64 v0, 1.0, -1.0, vcc_lo
	s_setpc_b64 s[30:31]
.Lfunc_end3:
	.size	_Z5driftf, .Lfunc_end3-_Z5driftf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 976
; NumSgprs: 34
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z11run_momentsPfS_PiS0_S0_P12hiprandState ; -- Begin function _Z11run_momentsPfS_PiS0_S0_P12hiprandState
	.globl	_Z11run_momentsPfS_PiS0_S0_P12hiprandState
	.p2align	8
	.type	_Z11run_momentsPfS_PiS0_S0_P12hiprandState,@function
_Z11run_momentsPfS_PiS0_S0_P12hiprandState: ; @_Z11run_momentsPfS_PiS0_S0_P12hiprandState
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[2:3], 0x3c
	s_load_b128 s[16:19], s[2:3], 0x20
	v_and_b32_e32 v6, 0x3ff, v0
	s_load_b64 s[0:1], s[0:1], 0x4
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[6:7]
	v_bfe_u32 v2, v0, 10, 10
	s_lshr_b32 s0, s0, 16
	v_bfe_u32 v0, v0, 20, 10
	s_mul_i32 s0, s0, s1
	s_load_b256 s[4:11], s[2:3], 0x0
	v_mul_lo_u32 v6, s0, v6
	s_delay_alu instid0(VALU_DEP_4)
	v_mad_u64_u32 v[23:24], null, v1, 48, s[18:19]
	v_mul_u32_u24_e32 v2, s1, v2
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_paths@rel32@lo+4
	s_addc_u32 s1, s1, d_paths@rel32@hi+12
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_Dg@rel32@lo+4
	s_addc_u32 s3, s3, d_Dg@rel32@hi+12
	s_load_b64 s[0:1], s[0:1], 0x0
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, d_Dp@rel32@lo+4
	s_addc_u32 s13, s13, d_Dp@rel32@hi+12
	v_add3_u32 v0, v6, v2, v0
	global_load_b96 v[3:5], v[23:24], off offset:12
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, d_lambda@rel32@lo+4
	s_addc_u32 s15, s15, d_lambda@rel32@hi+12
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, d_comp@rel32@lo+4
	s_addc_u32 s19, s19, d_comp@rel32@hi+12
	s_getpc_b64 s[20:21]
	s_add_u32 s20, s20, d_mean@rel32@lo+4
	s_addc_u32 s21, s21, d_mean@rel32@hi+12
	s_getpc_b64 s[22:23]
	s_add_u32 s22, s22, d_fa@rel32@lo+4
	s_addc_u32 s23, s23, d_fa@rel32@hi+12
	s_getpc_b64 s[24:25]
	s_add_u32 s24, s24, d_fb@rel32@lo+4
	s_addc_u32 s25, s25, d_fb@rel32@hi+12
	v_mul_lo_u32 v37, v0, 12
	s_getpc_b64 s[26:27]
	s_add_u32 s26, s26, d_mua@rel32@lo+4
	s_addc_u32 s27, s27, d_mua@rel32@hi+12
	v_add_co_u32 v25, vcc_lo, v23, 12
	v_add_co_ci_u32_e32 v26, vcc_lo, 0, v24, vcc_lo
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v37, v3, v4 offset1:1
	ds_store_b32 v37, v5 offset:8
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s30, s1, 31
	s_getpc_b64 s[28:29]
	s_add_u32 s28, s28, d_mub@rel32@lo+4
	s_addc_u32 s29, s29, d_mub@rel32@hi+12
	s_add_u32 s0, s0, s30
	s_mov_b32 s31, s30
	s_addc_u32 s1, s1, s30
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b64 s[34:35], s[0:1], s[30:31]
	v_cvt_f32_u32_e32 v0, s34
	v_cvt_f32_u32_e32 v3, s35
	s_sub_u32 s31, 0, s34
	s_subb_u32 s33, 0, s35
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_points@rel32@lo+4
	s_addc_u32 s1, s1, d_points@rel32@hi+12
	v_fmac_f32_e32 v0, 0x4f800000, v3
	s_load_b32 s36, s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x5f7ffffc, v0
	v_dual_mov_b32 v2, 0 :: v_dual_mul_f32 v3, 0x2f800000, v0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s0, s36, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_add_u32 s36, s36, s0
	s_mov_b32 s1, s0
	v_trunc_f32_e32 v3, v3
	s_addc_u32 s37, s0, s0
	s_xor_b64 s[36:37], s[36:37], s[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v0, 0xcf800000, v3
	v_cvt_u32_f32_e32 v3, v3
	v_cvt_f32_u32_e32 v6, s36
	v_cvt_f32_u32_e32 v7, s37
	s_sub_u32 s1, 0, s36
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v4, s31, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v6, 0x4f800000, v7
	v_mul_hi_u32 v5, s31, v0
	v_mul_lo_u32 v8, s33, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v6, v6
	v_add_nc_u32_e32 v4, v5, v4
	v_mul_lo_u32 v5, s31, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v8
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, 0x5f7ffffc, v6
	v_mul_hi_u32 v7, v0, v5
	v_mul_lo_u32 v8, v0, v4
	v_mul_hi_u32 v9, v0, v4
	v_mul_hi_u32 v10, v3, v5
	v_mul_lo_u32 v5, v3, v5
	v_mul_hi_u32 v11, v3, v4
	v_mul_lo_u32 v4, v3, v4
	v_add_co_u32 v7, vcc_lo, v7, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v7, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, v8, v10, vcc_lo
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v11, vcc_lo
	v_mul_f32_e32 v8, 0x2f800000, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v5, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_trunc_f32_e32 v7, v8
	v_add_co_u32 v0, vcc_lo, v0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v5, vcc_lo
	v_fmac_f32_e32 v6, 0xcf800000, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v4, s31, v0
	v_cvt_u32_f32_e32 v9, v7
	v_mul_lo_u32 v5, s31, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cvt_u32_f32_e32 v10, v6
	v_mul_lo_u32 v6, s33, v0
	v_mul_lo_u32 v7, s1, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v8, s1, v10
	v_add_nc_u32_e32 v4, v4, v5
	v_mul_lo_u32 v5, s31, v0
	s_subb_u32 s31, 0, s37
	v_mul_lo_u32 v11, s1, v10
	v_add_nc_u32_e32 v4, v4, v6
	v_mul_lo_u32 v6, s31, v10
	v_add_nc_u32_e32 v7, v8, v7
	v_mul_hi_u32 v8, v0, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_lo_u32 v12, v0, v4
	v_mul_hi_u32 v14, v0, v4
	v_mul_hi_u32 v16, v3, v5
	v_mul_lo_u32 v5, v3, v5
	v_mul_hi_u32 v17, v3, v4
	v_mul_lo_u32 v4, v3, v4
	v_add_nc_u32_e32 v6, v7, v6
	v_mul_hi_u32 v13, v10, v11
	v_add_co_u32 v8, vcc_lo, v8, v12
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v14, v10, v6
	v_add_co_u32 v5, vcc_lo, v8, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, v12, v16, vcc_lo
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v17, vcc_lo
	v_mul_lo_u32 v16, v10, v6
	v_add_co_u32 v4, vcc_lo, v5, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v8, vcc_lo
	v_mul_hi_u32 v18, v9, v6
	v_add_co_u32 v0, vcc_lo, v0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v12, vcc_lo, v3, v5, vcc_lo
	v_mul_lo_u32 v19, v9, v6
	v_mul_hi_u32 v17, v1, v0
	v_mad_u64_u32 v[5:6], null, 0, v0, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[3:4], null, v1, v12, 0
	v_mad_u64_u32 v[7:8], null, 0, v12, 0
	v_mul_hi_u32 v15, v9, v11
	v_mul_lo_u32 v11, v9, v11
	v_add_co_u32 v0, vcc_lo, v17, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v4, vcc_lo
	v_add_co_u32 v4, vcc_lo, v13, v16
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, v0, v5
	v_add_co_ci_u32_e32 v0, vcc_lo, v3, v6, vcc_lo
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v8, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, s0, v0, v7
	v_add_co_ci_u32_e64 v6, s0, 0, v3, s0
	v_add_co_ci_u32_e32 v5, vcc_lo, v12, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v8, s35, v0
	v_mad_u64_u32 v[3:4], null, s34, v0, 0
	v_mul_lo_u32 v11, s34, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v18, vcc_lo
	v_add_co_u32 v5, vcc_lo, v5, v19
	v_add_co_u32 v12, s0, v0, 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_add3_u32 v4, v4, v11, v8
	v_add_co_u32 v5, vcc_lo, v10, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, v9, v7, vcc_lo
	v_sub_nc_u32_e32 v15, 0, v4
	v_sub_co_u32 v3, vcc_lo, v1, v3
	v_add_co_ci_u32_e64 v13, s0, 0, v6, s0
	v_add_co_u32 v10, s0, v0, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v14, s0, 0, v6, s0
	v_subrev_co_ci_u32_e64 v15, s0, s35, v15, vcc_lo
	v_sub_co_u32 v18, s0, v3, s34
	v_sub_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	v_subrev_co_ci_u32_e64 v15, s0, 0, v15, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s34, v18
	v_mul_hi_u32 v8, s1, v5
	v_mul_lo_u32 v16, s1, v7
	v_mul_lo_u32 v11, s31, v5
	v_cmp_eq_u32_e64 s0, s35, v4
	v_cndmask_b32_e64 v18, 0, -1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s35, v15
	v_mul_lo_u32 v9, s1, v5
	v_add_nc_u32_e32 v8, v8, v16
	v_cndmask_b32_e64 v19, 0, -1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s34, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v8, v8, v11
	v_mul_hi_u32 v17, v7, v9
	v_cndmask_b32_e64 v3, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s35, v15
	v_cndmask_b32_e32 v15, v19, v18, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s35, v4
	v_mul_lo_u32 v18, v7, v9
	v_mul_hi_u32 v4, v5, v9
	v_mul_lo_u32 v9, v5, v8
	v_cndmask_b32_e64 v16, 0, -1, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v3, v16, v3, s0
	v_cndmask_b32_e32 v11, v14, v13, vcc_lo
	v_cndmask_b32_e32 v10, v10, v12, vcc_lo
	v_mul_hi_u32 v12, v7, v8
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	v_mul_hi_u32 v3, v5, v8
	v_mul_lo_u32 v8, v7, v8
	v_cndmask_b32_e32 v0, v0, v10, vcc_lo
	v_cndmask_b32_e32 v6, v6, v11, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, v9
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v0, s30, v0
	v_xor_b32_e32 v6, s30, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, v4, v18
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_co_u32 v0, s0, v0, s30
	v_subrev_co_ci_u32_e64 v4, s0, s30, v6, s0
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, v3, v8
	v_ashrrev_i32_e32 v9, 31, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	v_add_co_u32 v0, vcc_lo, v0, v9
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v9, vcc_lo
	v_add_co_u32 v8, vcc_lo, v5, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v10, vcc_lo, v7, v6, vcc_lo
	v_xor_b32_e32 v0, v0, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v11, v4, v9
	v_mad_u64_u32 v[3:4], null, v0, v10, 0
	v_mul_hi_u32 v12, v0, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[5:6], null, v11, v8, 0
	v_mad_u64_u32 v[7:8], null, v11, v10, 0
	v_add_co_u32 v3, vcc_lo, v12, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, v5
	v_add_co_ci_u32_e32 v3, vcc_lo, v4, v6, vcc_lo
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v3, v7
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v7, s37, v5
	v_mad_u64_u32 v[3:4], null, s36, v5, 0
	v_mul_lo_u32 v5, s36, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v0, vcc_lo, v0, v3
	v_add3_u32 v4, v4, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v11, v4
	v_subrev_co_ci_u32_e64 v3, s0, s37, v5, vcc_lo
	v_sub_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_sub_co_u32 v5, vcc_lo, v0, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e64 v6, s0, 0, v3, vcc_lo
	v_cmp_le_u32_e64 s0, s36, v0
	v_subrev_co_ci_u32_e32 v3, vcc_lo, s37, v3, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s37, v4
	v_cndmask_b32_e64 v7, 0, -1, s0
	v_cmp_le_u32_e64 s0, s36, v5
	v_cndmask_b32_e64 v11, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s37, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, 0, -1, s0
	v_cmp_le_u32_e64 s0, s37, v6
	v_cndmask_b32_e64 v10, 0, -1, s0
	v_cmp_eq_u32_e64 s0, s37, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v8, v10, v8, vcc_lo
	v_sub_co_u32 v10, vcc_lo, v5, s36
	v_subrev_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v8
	v_cndmask_b32_e64 v7, v11, v7, s0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_domainx@rel32@lo+4
	s_addc_u32 s1, s1, d_domainx@rel32@hi+12
	v_cndmask_b32_e32 v3, v6, v3, vcc_lo
	v_cndmask_b32_e32 v5, v5, v10, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v3, v4, v3, vcc_lo
	v_cndmask_b32_e32 v0, v0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v3, v9
	v_xor_b32_e32 v0, v0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_co_u32 v3, vcc_lo, v0, v9
	v_sub_co_ci_u32_e32 v4, vcc_lo, v4, v9, vcc_lo
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	global_load_u8 v2, v2, s[0:1]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v29, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v30, vcc_lo, s5, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v14, v[29:30], off
	s_clause 0x2
	global_load_b64 v[27:28], v[23:24], off offset:40
	global_load_b96 v[20:22], v[23:24], off
	global_load_b128 v[16:19], v[23:24], off offset:24
	global_load_b32 v3, v[3:4], off
	s_load_b32 s6, s[2:3], 0x0
	s_load_b32 s0, s[12:13], 0x0
	s_load_b32 s1, s[14:15], 0x0
	s_load_b32 s7, s[18:19], 0x0
	s_load_b32 s12, s[20:21], 0x0
	s_load_b32 s4, s[22:23], 0x0
	s_load_b32 s5, s[24:25], 0x0
	s_load_b32 s2, s[26:27], 0x0
	s_load_b32 s3, s[28:29], 0x0
	s_mov_b32 s13, -1
	s_waitcnt vmcnt(5)
	v_cmp_gt_i16_e32 vcc_lo, 0x6c, v2
	s_cbranch_vccnz .LBB4_8
; %bb.1:                                ; %NodeBlock260
	v_cmp_gt_i16_e32 vcc_lo, 0x6e, v2
	s_cbranch_vccnz .LBB4_9
; %bb.2:                                ; %NodeBlock258
	v_cmp_gt_i16_e32 vcc_lo, 0x70, v2
	s_cbranch_vccnz .LBB4_10
; %bb.3:                                ; %LeafBlock256
	v_cmp_eq_u16_e32 vcc_lo, 0x70, v2
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v4, s0
	v_mov_b32_e32 v42, s1
	s_cbranch_vccz .LBB4_7
; %bb.4:
	v_cmp_eq_f32_e64 s13, s12, 0
	v_mov_b32_e32 v42, s1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB4_6
; %bb.5:
	v_mul_f32_e64 v4, s12, s12
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v5, null, v3, v3, v4
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v5, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v6
	v_div_scale_f32 v7, vcc_lo, v4, v3, v4
	v_mul_f32_e32 v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v5, v8, v7
	v_fmac_f32_e32 v8, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -v5, v8, v7
	v_div_fmas_f32 v5, v5, v6, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v42, v5, v3, v4
.LBB4_6:                                ; %Flow276
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v4, v3
.LBB4_7:                                ; %Flow277
	s_mov_b32 s13, 0
	s_branch .LBB4_11
.LBB4_8:
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr42
                                        ; implicit-def: $vgpr38
                                        ; implicit-def: $vgpr39
	s_branch .LBB4_37
.LBB4_9:
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr42
                                        ; implicit-def: $vgpr38
                                        ; implicit-def: $vgpr39
	s_branch .LBB4_22
.LBB4_10:
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr42
.LBB4_11:                               ; %Flow282
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v38, s2 :: v_dual_mov_b32 v39, s3
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB4_21
; %bb.12:                               ; %LeafBlock254
	v_cmp_eq_u16_e32 vcc_lo, 0x6e, v2
	v_dual_mov_b32 v38, s2 :: v_dual_mov_b32 v39, s3
	s_cbranch_vccz .LBB4_20
; %bb.13:
	s_cmp_lg_u32 s7, 1
	s_cbranch_scc0 .LBB4_16
; %bb.14:
	v_cmp_eq_f32_e64 s13, s12, 0
	v_mov_b32_e32 v38, s2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s13
	s_mov_b32 s13, 0
	s_cbranch_vccnz .LBB4_17
; %bb.15:
	v_sub_f32_e64 v4, s4, s12
	v_sub_f32_e64 v5, s12, s5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v4, v3
	v_div_scale_f32 v6, null, v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v6, v7, 1.0
	v_fmac_f32_e32 v7, v8, v7
	v_div_scale_f32 v8, vcc_lo, v4, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, v8, v7
	v_fma_f32 v10, -v6, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v10, v7
	v_fma_f32 v6, -v6, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v6, v6, v7, v9
	v_div_fixup_f32 v38, v6, v5, v4
	s_branch .LBB4_17
.LBB4_16:
	s_mov_b32 s13, -1
                                        ; implicit-def: $vgpr38
.LBB4_17:                               ; %Flow279
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB4_19
; %bb.18:
	s_waitcnt vmcnt(0)
	v_mul_f32_e64 v4, v3, -s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v5, null, s5, s5, v4
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v5, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v6
	v_div_scale_f32 v7, vcc_lo, v4, s5, v4
	v_mul_f32_e32 v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v5, v8, v7
	v_fmac_f32_e32 v8, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -v5, v8, v7
	v_div_fmas_f32 v5, v5, v6, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v38, v5, s5, v4
.LBB4_19:                               ; %Flow280
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v39, v3
.LBB4_20:                               ; %Flow281
	v_mov_b32_e32 v4, s0
	v_mov_b32_e32 v42, s1
.LBB4_21:                               ; %Flow283
	s_mov_b32 s13, 0
.LBB4_22:                               ; %Flow290
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB4_36
; %bb.23:                               ; %NodeBlock252
	v_cmp_lt_i16_e32 vcc_lo, 0x6c, v2
	s_cbranch_vccz .LBB4_27
; %bb.24:
	s_waitcnt lgkmcnt(0)
	s_cmp_lg_u32 s7, 1
	s_cbranch_scc0 .LBB4_28
; %bb.25:
	v_cmp_eq_f32_e64 s13, s12, 0
	v_mov_b32_e32 v39, s3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s13
	s_mov_b32 s13, 0
	s_cbranch_vccnz .LBB4_29
; %bb.26:
	v_sub_f32_e64 v4, s5, s12
	v_sub_f32_e64 v5, s12, s4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v4, v3
	v_div_scale_f32 v6, null, v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v6, v7, 1.0
	v_fmac_f32_e32 v7, v8, v7
	v_div_scale_f32 v8, vcc_lo, v4, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, v8, v7
	v_fma_f32 v10, -v6, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v10, v7
	v_fma_f32 v6, -v6, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v6, v6, v7, v9
	v_div_fixup_f32 v39, v6, v5, v4
	s_branch .LBB4_29
.LBB4_27:
	s_mov_b32 s13, -1
                                        ; implicit-def: $vgpr38
                                        ; implicit-def: $vgpr39
	s_branch .LBB4_32
.LBB4_28:
	s_mov_b32 s13, -1
                                        ; implicit-def: $vgpr39
.LBB4_29:                               ; %Flow285
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB4_31
; %bb.30:
	s_waitcnt vmcnt(0)
	v_mul_f32_e64 v4, v3, -s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v5, null, s4, s4, v4
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v5, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v6
	v_div_scale_f32 v7, vcc_lo, v4, s4, v4
	v_mul_f32_e32 v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v5, v8, v7
	v_fmac_f32_e32 v8, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -v5, v8, v7
	v_div_fmas_f32 v5, v5, v6, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v39, v5, s4, v4
.LBB4_31:                               ; %Flow286
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v38, v3
	s_mov_b32 s13, 0
.LBB4_32:                               ; %Flow288
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v4, s0
	v_mov_b32_e32 v42, s1
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB4_36
; %bb.33:
	v_cmp_eq_f32_e64 s13, s12, 0
	v_mov_b32_e32 v4, s0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB4_35
; %bb.34:
	v_mul_f32_e64 v4, s12, s12
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v5, null, v3, v3, v4
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v5, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v6
	v_div_scale_f32 v7, vcc_lo, v4, v3, v4
	v_mul_f32_e32 v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v5, v8, v7
	v_fmac_f32_e32 v8, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -v5, v8, v7
	v_div_fmas_f32 v5, v5, v6, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v4, v5, v3, v4
.LBB4_35:                               ; %Flow287
	v_dual_mov_b32 v38, s2 :: v_dual_mov_b32 v39, s3
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v42, v3
.LBB4_36:                               ; %Flow291
	s_mov_b32 s13, 0
.LBB4_37:                               ; %Flow304
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v41, s5 :: v_dual_mov_b32 v40, s4
	v_mov_b32_e32 v5, s6
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB4_65
; %bb.38:                               ; %NodeBlock250
	v_cmp_gt_i16_e32 vcc_lo, 0x61, v2
	s_cbranch_vccnz .LBB4_44
; %bb.39:                               ; %NodeBlock
	v_cmp_gt_i16_e32 vcc_lo, 0x62, v2
	s_cbranch_vccnz .LBB4_45
; %bb.40:                               ; %LeafBlock248
	v_cmp_eq_u16_e32 vcc_lo, 0x62, v2
	v_dual_mov_b32 v40, s4 :: v_dual_mov_b32 v41, s5
	s_cbranch_vccz .LBB4_50
; %bb.41:
	s_cmp_lg_u32 s7, 1
	s_cbranch_scc0 .LBB4_46
; %bb.42:
	v_cmp_eq_f32_e64 s13, s12, 0
	v_mov_b32_e32 v40, s4
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s13
	s_mov_b32 s13, 0
	s_cbranch_vccnz .LBB4_47
; %bb.43:
	v_add_f32_e64 v4, s2, s3
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v5, s2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, s12, v4, -v5
	v_div_scale_f32 v5, null, s3, s3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v5, v6, 1.0
	v_fmac_f32_e32 v6, v7, v6
	v_div_scale_f32 v7, vcc_lo, v4, s3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v7, v6
	v_fma_f32 v9, -v5, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v6
	v_fma_f32 v5, -v5, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v5, v5, v6, v8
	v_div_fixup_f32 v40, v5, s3, v4
	s_branch .LBB4_47
.LBB4_44:
	s_mov_b32 s12, -1
                                        ; implicit-def: $vgpr40
                                        ; implicit-def: $vgpr41
	s_branch .LBB4_60
.LBB4_45:
	s_mov_b32 s13, -1
                                        ; implicit-def: $vgpr40
                                        ; implicit-def: $vgpr41
	s_branch .LBB4_51
.LBB4_46:
	s_mov_b32 s13, -1
                                        ; implicit-def: $vgpr40
.LBB4_47:                               ; %Flow293
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB4_49
; %bb.48:
	s_waitcnt vmcnt(0)
	v_mul_f32_e64 v4, s2, -v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v5, null, s3, s3, v4
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v5, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v6
	v_div_scale_f32 v7, vcc_lo, v4, s3, v4
	v_mul_f32_e32 v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v5, v8, v7
	v_fmac_f32_e32 v8, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -v5, v8, v7
	v_div_fmas_f32 v5, v5, v6, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v40, v5, s3, v4
.LBB4_49:                               ; %Flow294
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v41, v3
.LBB4_50:                               ; %Flow295
	s_mov_b32 s13, 0
.LBB4_51:                               ; %Flow299
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB4_59
; %bb.52:
	s_cmp_lg_u32 s7, 1
	s_cbranch_scc0 .LBB4_55
; %bb.53:
	v_cmp_eq_f32_e64 s13, s12, 0
	v_mov_b32_e32 v41, s5
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s13
	s_mov_b32 s13, 0
	s_cbranch_vccnz .LBB4_56
; %bb.54:
	v_add_f32_e64 v4, s2, s3
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v5, s3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, s12, v4, -v5
	v_div_scale_f32 v5, null, s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v5, v6, 1.0
	v_fmac_f32_e32 v6, v7, v6
	v_div_scale_f32 v7, vcc_lo, v4, s2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v7, v6
	v_fma_f32 v9, -v5, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v6
	v_fma_f32 v5, -v5, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v5, v5, v6, v8
	v_div_fixup_f32 v41, v5, s2, v4
	s_branch .LBB4_56
.LBB4_55:
	s_mov_b32 s13, -1
                                        ; implicit-def: $vgpr41
.LBB4_56:                               ; %Flow297
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB4_58
; %bb.57:
	s_waitcnt vmcnt(0)
	v_mul_f32_e64 v4, s3, -v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v5, null, s2, s2, v4
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v5, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v6
	v_div_scale_f32 v7, vcc_lo, v4, s2, v4
	v_mul_f32_e32 v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v5, v8, v7
	v_fmac_f32_e32 v8, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -v5, v8, v7
	v_div_fmas_f32 v5, v5, v6, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v41, v5, s2, v4
.LBB4_58:                               ; %Flow298
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v40, v3
.LBB4_59:                               ; %Flow300
	s_mov_b32 s12, 0
.LBB4_60:                               ; %Flow302
	v_mov_b32_e32 v5, s6
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB4_64
; %bb.61:                               ; %LeafBlock
	v_cmp_ne_u16_e32 vcc_lo, 0x44, v2
	v_mov_b32_e32 v5, s6
	s_cbranch_vccnz .LBB4_63
; %bb.62:
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v5, v3
.LBB4_63:                               ; %Flow301
	v_dual_mov_b32 v40, s4 :: v_dual_mov_b32 v41, s5
.LBB4_64:                               ; %Flow303
	v_dual_mov_b32 v39, s3 :: v_dual_mov_b32 v38, s2
	v_mov_b32_e32 v42, s1
	v_mov_b32_e32 v4, s0
.LBB4_65:
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_spp@rel32@lo+4
	s_addc_u32 s1, s1, d_spp@rel32@hi+12
	v_cmp_neq_f32_e64 s3, 0, v42
	s_load_b32 s2, s[0:1], 0x0
                                        ; implicit-def: $vgpr43
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB4_67
; %bb.66:
	v_div_scale_f32 v2, null, v42, v42, 1.0
	v_div_scale_f32 v7, vcc_lo, 1.0, v42, 1.0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v7, v3
	v_fma_f32 v8, -v2, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v8, v3
	v_fma_f32 v2, -v2, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v2, v2, v3, v6
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_i32_e32 v3, s2
	v_div_fixup_f32 v2, v2, v42, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v6, null, v3, v3, v2
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v6, v7, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v7
	v_div_scale_f32 v8, vcc_lo, v2, v3, v2
	v_mul_f32_e32 v9, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, -v6, v9, v8
	v_fmac_f32_e32 v9, v10, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v6, v9, v8
	v_div_fmas_f32 v6, v6, v7, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v43, v6, v3, v2
.LBB4_67:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_neq_f32_e64 s4, 0, v38
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s4
	s_cbranch_execz .LBB4_73
; %bb.68:
	v_div_scale_f32 v2, null, v38, v38, 1.0
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v3, null, v39, v39, 1.0
	v_div_scale_f32 v10, vcc_lo, 1.0, v38, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v6, v2
	v_rcp_f32_e32 v7, v3
                                        ; implicit-def: $vgpr43
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v2, v6, 1.0
	v_fma_f32 v9, -v3, v7, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v6, v8, v6 :: v_dual_fmac_f32 v7, v9, v7
	v_div_scale_f32 v8, s0, 1.0, v39, 1.0
	v_mul_f32_e32 v9, v10, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v11, v8, v7
	v_fma_f32 v12, -v2, v9, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v13, -v3, v11, v8
	v_fmac_f32_e32 v9, v12, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v11, v13, v7
	v_fma_f32 v2, -v2, v9, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v3, -v3, v11, v8
	v_div_fmas_f32 v2, v2, v6, v9
	s_mov_b32 vcc_lo, s0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v6, v3, v7, v11
	v_div_fixup_f32 v3, v2, v38, 1.0
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_i32_e32 v2, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v6, v6, v39, 1.0
	v_cmpx_nlt_f32_e32 v3, v6
	s_xor_b32 s0, exec_lo, s0
; %bb.69:
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v3, null, v2, v2, v6
	v_rcp_f32_e32 v7, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v3, v7, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v7
	v_div_scale_f32 v8, vcc_lo, v6, v2, v6
	v_mul_f32_e32 v9, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, -v3, v9, v8
	v_fmac_f32_e32 v9, v10, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, -v3, v9, v8
	v_div_fmas_f32 v3, v3, v7, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v43, v3, v2, v6
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr3
; %bb.70:                               ; %Flow274
	s_and_not1_saveexec_b32 s0, s0
; %bb.71:
	v_div_scale_f32 v6, null, v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v6, v7, 1.0
	v_fmac_f32_e32 v7, v8, v7
	v_div_scale_f32 v8, vcc_lo, v3, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, v8, v7
	v_fma_f32 v10, -v6, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v10, v7
	v_fma_f32 v6, -v6, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v6, v6, v7, v9
	v_div_fixup_f32 v43, v6, v2, v3
; %bb.72:                               ; %Flow275
	s_or_b32 exec_lo, exec_lo, s0
.LBB4_73:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v31, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v32, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v33, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v34, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v35, vcc_lo, s16, v0
	v_add_co_ci_u32_e32 v36, vcc_lo, s17, v1, vcc_lo
	global_load_b32 v46, v[31:32], off
	global_load_b32 v44, v[33:34], off
	global_load_b32 v45, v[35:36], off
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_samples@rel32@lo+4
	s_addc_u32 s1, s1, d_samples@rel32@hi+12
	s_load_b32 s8, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s8, 1
	s_cbranch_scc1 .LBB4_104
; %bb.74:                               ; %.lr.ph
	v_div_scale_f32 v0, null, v4, v4, v42
	s_waitcnt vmcnt(3)
	v_div_scale_f32 v3, vcc_lo, v42, v4, v42
	v_cmp_neq_f32_e64 s5, 0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v1, v0
	s_cmp_eq_u32 s7, 0
	v_dual_mul_f32 v6, 0x40400000, v43 :: v_dual_mul_f32 v7, v42, v4
	v_dual_mul_f32 v10, 0x4f800000, v6 :: v_dual_mul_f32 v11, 0x4f800000, v7
	v_cmp_gt_f32_e64 s1, 0xf800000, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v2, -v0, v1, 1.0
	v_cmp_gt_f32_e64 s2, 0xf800000, v7
	v_cndmask_b32_e64 v6, v6, v10, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v1, v2, v1
	v_add_f32_e32 v2, v5, v5
	v_cndmask_b32_e64 v7, v7, v11, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v8, v3, v1 :: v_dual_mul_f32 v9, 0x4f800000, v2
	v_cmp_gt_f32_e64 s0, 0xf800000, v2
	v_sqrt_f32_e32 v10, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, -v0, v8, v3
	v_cndmask_b32_e64 v2, v2, v9, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v8, v12, v1
	v_sqrt_f32_e32 v9, v2
	v_mul_f32_e32 v47, v40, v43
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f32 v0, -v0, v8, v3
	v_sqrt_f32_e32 v3, v6
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v5, -1, v3
	v_div_fmas_f32 v0, v0, v1, v8
	v_add_nc_u32_e32 v8, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_div_fixup_f32 v0, v0, v4, v42
	v_add_nc_u32_e32 v1, -1, v9
	v_add_nc_u32_e32 v4, 1, v9
	v_fma_f32 v49, -v8, v3, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v12, 0x4f800000, v0
	v_fma_f32 v15, -v1, v9, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v0
	v_add_nc_u32_e32 v11, -1, v10
	v_fma_f32 v48, -v4, v9, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cmp_ge_f32_e64 s6, 0, v15
	v_cndmask_b32_e32 v0, v0, v12, vcc_lo
	v_fma_f32 v12, -v5, v3, v6
	v_fma_f32 v50, -v11, v10, v7
	v_cndmask_b32_e64 v1, v9, v1, s6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sqrt_f32_e32 v52, v0
	v_cmp_ge_f32_e64 s6, 0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v3, v5, s6
	v_cmp_ge_f32_e64 s6, 0, v50
	v_cndmask_b32_e64 v5, v10, v11, s6
	v_cmp_lt_f32_e64 s6, 0, v48
	v_mul_f32_e32 v48, v41, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v1, v1, v4, s6
	v_cmp_lt_f32_e64 s6, 0, v49
	v_add_nc_u32_e32 v13, 1, v10
	v_cndmask_b32_e64 v3, v3, v8, s6
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v8, 0x37800000, v1
	v_add_nc_u32_e32 v4, -1, v52
	v_fma_f32 v51, -v13, v10, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v9, 0x37800000, v3 :: v_dual_add_nc_u32 v10, 1, v52
	v_cndmask_b32_e64 v1, v1, v8, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v11, -v4, v52, v0
	v_cmp_lt_f32_e64 s6, 0, v51
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v8, -v10, v52, v0
	v_cndmask_b32_e64 v3, v3, v9, s1
	v_cmp_ge_f32_e64 s0, 0, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v13, s6
	v_cndmask_b32_e64 v4, v52, v4, s0
	v_cmp_class_f32_e64 s0, v2, 0x260
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v12, 0x37800000, v5
	v_cndmask_b32_e64 v1, v1, v2, s0
	v_cmp_lt_f32_e64 s0, 0, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v12, s2
	v_cndmask_b32_e64 v2, v4, v10, s0
	v_cmp_class_f32_e64 s0, v6, 0x260
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v3, v3, v6, s0
	v_cmp_class_f32_e64 s0, v7, 0x260
	v_mul_f32_e64 v49, v3, -v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, v5, v7, s0
	v_dual_mul_f32 v5, 0x37800000, v2 :: v_dual_mul_f32 v50, v1, v3
	s_cselect_b32 s0, -1, 0
	v_mul_f32_e64 v6, v43, -v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v1, v2, v5 :: v_dual_mul_f32 v2, v4, v43
	v_cmp_class_f32_e64 vcc_lo, v0, 0x260
	v_cndmask_b32_e64 v51, v6, 0, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v53, v2, 0, s0
	v_cndmask_b32_e32 v52, v1, v0, vcc_lo
.LBB4_75:                               ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v54, 0 :: v_dual_mov_b32 v5, v19
	v_dual_mov_b32 v4, v27 :: v_dual_mov_b32 v7, v17
	v_dual_mov_b32 v6, v18 :: v_dual_mov_b32 v55, 0
	s_and_saveexec_b32 s1, s5
	s_cbranch_execz .LBB4_79
; %bb.76:                               ;   in Loop: Header=BB4_75 Depth=1
	v_lshrrev_b32_e32 v0, 2, v16
	v_lshlrev_b32_e32 v1, 4, v27
	v_add_nc_u32_e32 v20, 0x587c5, v20
	s_mov_b32 s2, exec_lo
	v_mov_b32_e32 v55, v49
	v_xor_b32_e32 v0, v0, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v0
	v_xor_b32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v4, v1, v27, v0
	v_add_nc_u32_e32 v0, v4, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, v0
	v_fmaak_f32 v0, 0x2f800000, v0, 0x2f800000
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_nge_f32_e32 0x3e2aaaab, v0
; %bb.77:                               ;   in Loop: Header=BB4_75 Depth=1
	v_cmp_lt_f32_e32 vcc_lo, 0x3e2aaaab, v0
	v_cmp_ge_f32_e64 s0, 0x3eaaaaab, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, vcc_lo, s0
	v_cndmask_b32_e32 v55, 0, v50, vcc_lo
; %bb.78:                               ; %Flow271
                                        ;   in Loop: Header=BB4_75 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_dual_mov_b32 v5, v27 :: v_dual_mov_b32 v16, v17
	v_dual_mov_b32 v6, v19 :: v_dual_mov_b32 v7, v18
.LBB4_79:                               ; %_Z9diffusionffP12hiprandState.exit.i
                                        ;   in Loop: Header=BB4_75 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_and_saveexec_b32 s1, s5
	s_cbranch_execz .LBB4_83
; %bb.80:                               ;   in Loop: Header=BB4_75 Depth=1
	v_lshrrev_b32_e32 v0, 2, v16
	v_dual_mov_b32 v54, v49 :: v_dual_lshlrev_b32 v1, 4, v4
	v_add_nc_u32_e32 v20, 0x587c5, v20
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v16
	v_lshlrev_b32_e32 v2, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v1, v2
	v_xor3_b32 v0, v1, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v0, v20
	v_cvt_f32_u32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v1, 0x2f800000, v1, 0x2f800000
	v_cmpx_nge_f32_e32 0x3e2aaaab, v1
; %bb.81:                               ;   in Loop: Header=BB4_75 Depth=1
	v_cmp_lt_f32_e32 vcc_lo, 0x3e2aaaab, v1
	v_cmp_ge_f32_e64 s0, 0x3eaaaaab, v1
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, vcc_lo, s0
	v_cndmask_b32_e32 v54, 0, v50, vcc_lo
; %bb.82:                               ; %Flow270
                                        ;   in Loop: Header=BB4_75 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_dual_mov_b32 v1, v4 :: v_dual_mov_b32 v2, v5
	v_dual_mov_b32 v3, v6 :: v_dual_mov_b32 v16, v7
.LBB4_83:                               ; %_Z9diffusionffP12hiprandState.exit43.i
                                        ;   in Loop: Header=BB4_75 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v56, 0 :: v_dual_mov_b32 v57, 0
	s_and_saveexec_b32 s1, s4
	s_cbranch_execz .LBB4_93
; %bb.84:                               ;   in Loop: Header=BB4_75 Depth=1
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr57
	s_waitcnt vmcnt(1)
	v_cmpx_lt_i32_e32 0, v44
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB4_86
; %bb.85:                               ;   in Loop: Header=BB4_75 Depth=1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v45
	v_cndmask_b32_e32 v4, v41, v40, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mul_f32 v57, v4, v43 :: v_dual_add_nc_u32 v44, -1, v44
.LBB4_86:                               ; %Flow268
                                        ;   in Loop: Header=BB4_75 Depth=1
	s_and_not1_saveexec_b32 s2, s0
	s_cbranch_execz .LBB4_92
; %bb.87:                               ;   in Loop: Header=BB4_75 Depth=1
	v_lshrrev_b32_e32 v4, 2, v16
	v_lshlrev_b32_e32 v5, 4, v0
	v_add_nc_u32_e32 v20, 0x587c5, v20
                                        ; implicit-def: $sgpr6
                                        ; implicit-def: $vgpr44
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v16
	v_lshlrev_b32_e32 v6, 1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v5, v6
	v_xor3_b32 v4, v5, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v4, v20
	v_cvt_f32_u32_e32 v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v5, 0x2f800000, v5, 0x2f800000
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v5
	v_cndmask_b32_e64 v6, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, v5, v6
	v_log_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, 0x3f317217, v5
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v5|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, 0x3f317217, v5, -v6
	v_fmac_f32_e32 v7, 0x3377d1cf, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v6, v7
	v_cndmask_b32_e64 v5, v5, v6, s0
	v_cndmask_b32_e64 v6, 0, 0x41b17218, vcc_lo
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_f32_e32 v5, v5, v6
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 0, v45
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB4_89
; %bb.88:                               ;   in Loop: Header=BB4_75 Depth=1
	v_div_scale_f32 v6, null, v38, v38, v5
	v_div_scale_f32 v9, vcc_lo, v5, v38, v5
	s_mov_b32 s6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v6, v7, 1.0
	v_fmac_f32_e32 v7, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v9, v7
	v_fma_f32 v10, -v6, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v10, v7
	v_fma_f32 v6, -v6, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v6, v6, v7, v8
	v_div_fixup_f32 v5, v6, v38, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v6, null, v43, v43, v5
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v6, v7, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v7
	v_div_scale_f32 v8, vcc_lo, v5, v43, v5
	v_mul_f32_e32 v9, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, -v6, v9, v8
	v_fmac_f32_e32 v9, v10, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v6, v9, v8
	v_div_fmas_f32 v6, v6, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v5, v6, v43, v5
	v_sub_f32_e32 v5, 0.5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_floor_f32_e32 v5, v5
	v_cvt_i32_f32_e32 v44, v5
                                        ; implicit-def: $vgpr5
.LBB4_89:                               ; %Flow266
                                        ;   in Loop: Header=BB4_75 Depth=1
	s_or_saveexec_b32 s0, s0
	v_mov_b32_e32 v45, s6
	v_mov_b32_e32 v57, v47
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB4_91
; %bb.90:                               ;   in Loop: Header=BB4_75 Depth=1
	v_div_scale_f32 v6, null, v39, v39, v5
	v_div_scale_f32 v9, vcc_lo, v5, v39, v5
	v_mov_b32_e32 v45, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v7, v6
	v_mov_b32_e32 v57, v48
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v6, v7, 1.0
	v_fmac_f32_e32 v7, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v9, v7
	v_fma_f32 v10, -v6, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v10, v7
	v_fma_f32 v6, -v6, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v6, v6, v7, v8
	v_div_fixup_f32 v5, v6, v39, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v6, null, v43, v43, v5
	v_div_scale_f32 v9, vcc_lo, v5, v43, v5
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v6, v7, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v7
	v_mul_f32_e32 v8, v9, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, -v6, v8, v9
	v_fmac_f32_e32 v8, v10, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v6, v8, v9
	v_div_fmas_f32 v6, v6, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v5, v6, v43, v5
	v_sub_f32_e32 v5, 0.5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_floor_f32_e32 v5, v5
	v_cvt_i32_f32_e32 v44, v5
.LBB4_91:                               ; %Flow267
                                        ;   in Loop: Header=BB4_75 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v16, v3 :: v_dual_mov_b32 v3, v2
	v_dual_mov_b32 v2, v1 :: v_dual_mov_b32 v1, v0
	v_mov_b32_e32 v0, v4
.LBB4_92:                               ; %Flow269
                                        ;   in Loop: Header=BB4_75 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB4_93:                               ; %_Z17adapted_jump_dichRiiS_ifffffP12hiprandState.exit.i
                                        ;   in Loop: Header=BB4_75 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v27, v0 :: v_dual_mov_b32 v18, v2
	v_mov_b32_e32 v19, v1
	v_mov_b32_e32 v17, v3
	s_and_saveexec_b32 s1, s5
	s_cbranch_execz .LBB4_97
; %bb.94:                               ;   in Loop: Header=BB4_75 Depth=1
	v_lshrrev_b32_e32 v4, 2, v16
	v_dual_mov_b32 v56, v49 :: v_dual_lshlrev_b32 v5, 4, v0
	v_add_nc_u32_e32 v20, 0x587c5, v20
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v16
	v_lshlrev_b32_e32 v6, 1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v5, v6
	v_xor3_b32 v27, v5, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v27, v20
	v_cvt_f32_u32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v4, 0x2f800000, v4, 0x2f800000
	v_cmpx_nge_f32_e32 0x3e2aaaab, v4
; %bb.95:                               ;   in Loop: Header=BB4_75 Depth=1
	v_cmp_lt_f32_e32 vcc_lo, 0x3e2aaaab, v4
	v_cmp_ge_f32_e64 s0, 0x3eaaaaab, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, vcc_lo, s0
	v_cndmask_b32_e32 v56, 0, v50, vcc_lo
; %bb.96:                               ; %Flow265
                                        ;   in Loop: Header=BB4_75 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_dual_mov_b32 v19, v0 :: v_dual_mov_b32 v18, v1
	v_dual_mov_b32 v17, v2 :: v_dual_mov_b32 v16, v3
.LBB4_97:                               ; %_Z9diffusionffP12hiprandState.exit47.i
                                        ;   in Loop: Header=BB4_75 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v58, 0
	s_and_saveexec_b32 s1, s3
	s_cbranch_execz .LBB4_103
; %bb.98:                               ;   in Loop: Header=BB4_75 Depth=1
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(2)
	v_cmpx_lt_i32_e32 0, v46
	s_xor_b32 s0, exec_lo, s0
; %bb.99:                               ;   in Loop: Header=BB4_75 Depth=1
	v_add_nc_u32_e32 v46, -1, v46
; %bb.100:                              ; %Flow
                                        ;   in Loop: Header=BB4_75 Depth=1
	s_or_saveexec_b32 s2, s0
	v_mov_b32_e32 v58, v51
	s_xor_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB4_102
; %bb.101:                              ;   in Loop: Header=BB4_75 Depth=1
	v_lshrrev_b32_e32 v0, 2, v16
	v_lshlrev_b32_e32 v1, 4, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v0, v0, v16
	v_mov_b32_e32 v16, v18
	v_mov_b32_e32 v18, v27
	v_lshlrev_b32_e32 v2, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v1, v2
	v_xor3_b32 v0, v1, v27, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v20, v0, 0x587c5
	v_lshlrev_b32_e32 v6, 4, v0
	v_cvt_f32_u32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v1, 0x2f800000, v1, 0x2f800000
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v1
	v_cndmask_b32_e64 v2, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v1, v1, v2
	v_lshrrev_b32_e32 v2, 2, v17
	v_log_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v17
	v_mov_b32_e32 v17, v19
	v_mov_b32_e32 v19, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x3f317217, v1
	v_fma_f32 v4, 0x3f317217, v1, -v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v4, 0x3377d1cf, v1 :: v_dual_lshlrev_b32 v5, 1, v2
	v_add_f32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v4, v5, v6
	v_cndmask_b32_e64 v5, 0, 0x41b17218, vcc_lo
	v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v1|
	v_add_nc_u32_e32 v20, 0xb0f8a, v20
	v_xor3_b32 v2, v4, v2, v0
	v_cndmask_b32_e32 v1, v1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v2, v20
	v_mov_b32_e32 v27, v2
	v_cvt_f32_u32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v3, 0x2f800000, v3, 0x2f800000
	v_cmp_gt_f32_e64 s0, 0x800000, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v6, 1.0, 0x4f800000, s0
	v_mul_f32_e32 v3, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_log_f32_e32 v3, v3
	v_sub_f32_e32 v1, v1, v5
	v_div_scale_f32 v4, null, v42, v42, v1
	v_div_scale_f32 v6, vcc_lo, v1, v42, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v9, 0x3f317217, v3
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v4, v5, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v7, v5
	v_mul_f32_e32 v7, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, -v4, v7, v6
	v_fmac_f32_e32 v7, v8, v5
	v_fma_f32 v8, 0x3f317217, v3, -v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v4, -v4, v7, v6
	v_fmac_f32_e32 v8, 0x3377d1cf, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v4, v4, v5, v7
	v_add_f32_e32 v5, v9, v8
	v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v3|
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_div_fixup_f32 v1, v4, v42, v1
	v_cndmask_b32_e64 v4, 0, 0x41b17218, s0
	v_cndmask_b32_e32 v3, v3, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v5, null, v43, v43, v1
	v_sub_f32_e32 v3, v3, v4
	v_div_scale_f32 v9, vcc_lo, v1, v43, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v4, v5
	v_div_scale_f32 v6, null, v52, v52, -v3
	v_div_scale_f32 v11, s0, -v3, v52, -v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v5, v4, 1.0
	v_fmac_f32_e32 v4, v8, v4
	v_fma_f32 v8, -v6, v7, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v10, v9, v4 :: v_dual_fmac_f32 v7, v8, v7
	v_fma_f32 v8, -v5, v10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v12, v11, v7
	v_fmac_f32_e32 v10, v8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v8, -v6, v12, v11
	v_fma_f32 v5, -v5, v10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v12, v8, v7
	v_div_fmas_f32 v4, v5, v4, v10
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v5, -v6, v12, v11
	v_div_fixup_f32 v1, v4, v43, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v4, v5, v7, v12
	v_sub_f32_e32 v1, 0.5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v3, v4, v52, -v3
	v_floor_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v58, v3, v53
	v_cvt_i32_f32_e32 v46, v1
.LBB4_102:                              ; %Flow264
                                        ;   in Loop: Header=BB4_75 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB4_103:                              ; %_Z8predcorrRffRiiP12hiprandStatefffiS0_iS0_ifffff.exit
                                        ;   in Loop: Header=BB4_75 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v0, v14
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, _Z5driftf@rel32@lo+4
	s_addc_u32 s7, s7, _Z5driftf@rel32@hi+12
	s_swappc_b64 s[30:31], s[6:7]
	v_mov_b32_e32 v15, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v0, v43, v15, v14
	v_add_f32_e32 v0, v55, v0
	s_swappc_b64 s[30:31], s[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v15, v0
	v_mul_f32_e32 v0, 0.5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v0, v43, v0, v14
	v_add_f32_e32 v0, v54, v0
	s_swappc_b64 s[30:31], s[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_f32_e32 v0, v15, v0
	s_add_i32 s8, s8, -1
	s_cmp_lg_u32 s8, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v0, 0.5, v0
	v_fmac_f32_e32 v14, v43, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v57, v14
	v_add_f32_e32 v0, v56, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v14, v58, v0
	s_cbranch_scc1 .LBB4_75
.LBB4_104:                              ; %._crit_edge
	ds_load_2addr_b32 v[0:1], v37 offset1:1
	ds_load_b32 v2, v37 offset:8
	s_waitcnt vmcnt(7)
	global_store_b32 v[29:30], v14, off
	s_waitcnt vmcnt(2)
	global_store_b32 v[31:32], v46, off
	s_waitcnt vmcnt(1)
	global_store_b32 v[33:34], v44, off
	s_waitcnt vmcnt(0)
	global_store_b32 v[35:36], v45, off
	s_clause 0x1
	global_store_b96 v[23:24], v[20:22], off
	global_store_b128 v[23:24], v[16:19], off offset:24
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b96 v[25:26], v[0:2], off
	global_store_b64 v[23:24], v[27:28], off offset:40
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11run_momentsPfS_PiS0_S0_P12hiprandState
		.amdhsa_group_segment_fixed_size 12288
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 1
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 59
		.amdhsa_next_free_sgpr 38
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z11run_momentsPfS_PiS0_S0_P12hiprandState, .Lfunc_end4-_Z11run_momentsPfS_PiS0_S0_P12hiprandState
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7756
; NumSgprs: 40
; NumVgprs: 59
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 12288 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 7
; NumSGPRsForWavesPerEU: 40
; NumVGPRsForWavesPerEU: 59
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	d_Dg                    ; @d_Dg
	.type	d_Dg,@object
	.section	.bss,"aw",@nobits
	.globl	d_Dg
	.p2align	2, 0x0
d_Dg:
	.long	0x00000000                      ; float 0
	.size	d_Dg, 4

	.protected	d_Dp                    ; @d_Dp
	.type	d_Dp,@object
	.globl	d_Dp
	.p2align	2, 0x0
d_Dp:
	.long	0x00000000                      ; float 0
	.size	d_Dp, 4

	.protected	d_lambda                ; @d_lambda
	.type	d_lambda,@object
	.globl	d_lambda
	.p2align	2, 0x0
d_lambda:
	.long	0x00000000                      ; float 0
	.size	d_lambda, 4

	.protected	d_mean                  ; @d_mean
	.type	d_mean,@object
	.globl	d_mean
	.p2align	2, 0x0
d_mean:
	.long	0x00000000                      ; float 0
	.size	d_mean, 4

	.protected	d_fa                    ; @d_fa
	.type	d_fa,@object
	.globl	d_fa
	.p2align	2, 0x0
d_fa:
	.long	0x00000000                      ; float 0
	.size	d_fa, 4

	.protected	d_fb                    ; @d_fb
	.type	d_fb,@object
	.globl	d_fb
	.p2align	2, 0x0
d_fb:
	.long	0x00000000                      ; float 0
	.size	d_fb, 4

	.protected	d_mua                   ; @d_mua
	.type	d_mua,@object
	.globl	d_mua
	.p2align	2, 0x0
d_mua:
	.long	0x00000000                      ; float 0
	.size	d_mua, 4

	.protected	d_mub                   ; @d_mub
	.type	d_mub,@object
	.globl	d_mub
	.p2align	2, 0x0
d_mub:
	.long	0x00000000                      ; float 0
	.size	d_mub, 4

	.protected	d_comp                  ; @d_comp
	.type	d_comp,@object
	.globl	d_comp
	.p2align	2, 0x0
d_comp:
	.long	0                               ; 0x0
	.size	d_comp, 4

	.protected	d_spp                   ; @d_spp
	.type	d_spp,@object
	.globl	d_spp
	.p2align	2, 0x0
d_spp:
	.long	0                               ; 0x0
	.size	d_spp, 4

	.protected	d_samples               ; @d_samples
	.type	d_samples,@object
	.globl	d_samples
	.p2align	2, 0x0
d_samples:
	.long	0                               ; 0x0
	.size	d_samples, 4

	.protected	d_paths                 ; @d_paths
	.type	d_paths,@object
	.globl	d_paths
	.p2align	3, 0x0
d_paths:
	.quad	0                               ; 0x0
	.size	d_paths, 8

	.protected	d_domainx               ; @d_domainx
	.type	d_domainx,@object
	.globl	d_domainx
d_domainx:
	.byte	0                               ; 0x0
	.size	d_domainx, 1

	.protected	d_points                ; @d_points
	.type	d_points,@object
	.globl	d_points
	.p2align	2, 0x0
d_points:
	.long	0                               ; 0x0
	.size	d_points, 4

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym d_Dg
	.addrsig_sym d_Dp
	.addrsig_sym d_lambda
	.addrsig_sym d_mean
	.addrsig_sym d_fa
	.addrsig_sym d_fb
	.addrsig_sym d_mua
	.addrsig_sym d_mub
	.addrsig_sym d_comp
	.addrsig_sym d_spp
	.addrsig_sym d_samples
	.addrsig_sym d_paths
	.addrsig_sym d_domainx
	.addrsig_sym d_points
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12init_dev_rngPjP12hiprandState
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12init_dev_rngPjP12hiprandState.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 12288
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10init_noisePfPiS0_S0_P12hiprandState
    .private_segment_fixed_size: 0
    .sgpr_count:     33
    .sgpr_spill_count: 0
    .symbol:         _Z10init_noisePfPiS0_S0_P12hiprandState.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     30
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4foldPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4foldPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 12288
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11run_momentsPfS_PiS0_S0_P12hiprandState
    .private_segment_fixed_size: 0
    .sgpr_count:     40
    .sgpr_spill_count: 0
    .symbol:         _Z11run_momentsPfS_PiS0_S0_P12hiprandState.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     59
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
