#include <iostream>
#include <fstream>
#include <chrono>
#include <iomanip>
#include <math.h>
#include <stdint.h>
#include <float.h>
#include <limits.h>
#include <stdlib.h>
#include <cuda_runtime.h>

struct Pixel {
  unsigned char r, g, b;
};

struct Vec {
  float x,y,z;
  __forceinline__ __device__ Vec(float v = 0) {x = y = z = v;}
  __forceinline__ __device__ Vec(float a, float b, float c = 0) {x = a;y = b;z = c;}
  __forceinline__ __device__ Vec operator+(const Vec r) const  { return Vec(x + r.x , y + r.y , z + r.z); }
  __forceinline__ __device__ Vec operator*(const Vec r) const { return   Vec(x * r.x , y * r.y , z * r.z); }
  __forceinline__ __device__ float operator%(const Vec r) const {return     x * r.x + y * r.y + z * r.z;}
  __forceinline__ __device__ Vec operator!() { return *this * (1.0/sqrtf(*this % *this)); }
};

__forceinline__ __device__
float randomVal(unsigned int& x) {
  x = (214013*x+2531011);
  return ((x>>16)&0x7FFF) / (float)66635;
}

// Rectangle CSG equation. Returns minimum signed distance from
// space carved by
// lowerLeft vertex and opposite rectangle vertex upperRight.
__forceinline__ __device__
float BoxTest(const Vec& position, Vec lowerLeft, Vec upperRight) {
  lowerLeft = position + lowerLeft * -1.0f;
  upperRight = upperRight + position * -1.0f;
  return -fminf(fminf(fminf(lowerLeft.x, upperRight.x), 
                      fminf(lowerLeft.y, upperRight.y)),
                fminf(lowerLeft.z, upperRight.z));
}

#define HIT_NONE 0
#define HIT_LETTER 1
#define HIT_WALL 2
#define HIT_SUN 3

// Sample the world using Signed Distance Fields.
__forceinline__ __device__
float QueryDatabase(const Vec& position, int &hitType) {
  float distance = 1e9;//FLT_MAX;
  Vec f = position; // Flattened position (z=0)
  f.z = 0;
  const float lines[10*4] = {
    -20.0f,  0.0f, -20.0f, 16.0f,
    -20.0f,  0.0f, -14.0f,  0.0f,
    -11.0f,  0.0f,  -7.0f, 16.0f, 
     -3.0f,  0.0f,  -7.0f, 16.0f,
     -5.5f,  5.0f,  -9.5f,  5.0f,
      0.0f,  0.0f,   0.0f, 16.0f,
      6.0f,  0.0f,   6.0f, 16.0f,
      0.0f, 16.0f,   6.0f,  0.0f,
      9.0f,  0.0f,   9.0f, 16.0f,
      9.0f,  0.0f,  15.0f,  0.0f
  };

  for (unsigned i = 0; i < sizeof(lines)/sizeof(float); i += sizeof(float)) {
    Vec begin = Vec(lines[i], lines[i + 1]) * 0.5f;
    Vec e = Vec(lines[i + 2], lines[i + 3]) * 0.5f + begin * -1.0f;
    Vec o = f + (begin + e * fminf(-fminf((((begin + f * -1) % e )/(e % e)), 0),1)) * -1.0f;
    distance = fminf(distance, o % o); // compare squared distance.
  }

  distance = sqrtf(distance); // Get real distance, not square distance.
  distance = powf(powf(distance, 8)+powf(position.z, 8), 0.125f) - 0.5f;
  hitType = HIT_LETTER;

  float roomDist ;
  roomDist = fminf(-fminf(
      BoxTest(position, Vec(-30.0f, -0.5f, -30.0f), Vec(30.0f, 18.0f, 30.0f)),
      BoxTest(position, Vec(-25.0f, 17.0f, -25.0f), Vec(25.0f, 20.0f, 25.0f))),
                   BoxTest( // Ceiling "planks" spaced 8 units apart.
                       Vec(fmodf(fabsf(position.x), 8.0f), position.y, position.z),
                       Vec(1.5f, 18.5f, -25.0f),
                       Vec(6.5f, 20.0f,  25.0f)));
  if (roomDist < distance) {
    distance = roomDist;
    hitType = HIT_WALL;
  }
  float sun = 19.9f - position.y; // Everything above 19.9 is light source.
  if (sun < distance) {
    distance = sun;
    hitType = HIT_SUN;
  }
  return distance;
}

// Perform signed sphere marching
// Returns hitType 0, 1, 2, or 3 and update hit position/normal
__forceinline__ __device__
int RayMarching(const Vec& origin, const Vec& direction, Vec& hitPos, Vec& hitNorm) {
  int hitType = HIT_NONE;
  int noHitCount = 0;

  // Signed distance marching
  float d; // distance from closest object in world.
  for (float total_d = 0.0f; total_d < 100.0f; total_d += d) {
    d = QueryDatabase(hitPos = origin + direction * total_d, hitType);
    if (d < .01f || ++noHitCount > 99) {
      hitNorm = !Vec(QueryDatabase(hitPos + Vec(0.01f, 0.00f), noHitCount) - d,
                     QueryDatabase(hitPos + Vec(0.00f, 0.01f), noHitCount) - d,
                     QueryDatabase(hitPos + Vec(0.00f, 0.00f, 0.01f), noHitCount) - d);
      return hitType;
    }
  }
  return HIT_NONE;
}

__forceinline__ __device__
Vec Trace(Vec origin, Vec direction, unsigned int& rn) {
  Vec sampledPosition;
  Vec normal;
  Vec color(0.0f, 0.0f, 0.0f);
  Vec attenuation(1.0f);
  Vec lightDirection(!Vec(0.6f, 0.6f, 1.0f)); // Directional light

  for (int bounceCount = 8; bounceCount--;) {
    int hitType = RayMarching(origin, direction, sampledPosition, normal);
    if (hitType == HIT_NONE)
      break;                     // No hit. This is over, return color.
    else if (hitType == HIT_LETTER) { // Specular bounce on a letter. No color acc.
      direction = direction + normal * (normal % direction * -2);
      origin = sampledPosition + direction * 0.1f;
      attenuation = attenuation * 0.2f; // Attenuation via distance traveled.
    } else if (hitType == HIT_WALL) { // Wall hit uses color yellow?
      float incidence = normal % lightDirection;
      float p = 6.283185f * randomVal(rn);
      float c = randomVal(rn);
      float s = sqrtf(1.0f - c);
      float g = normal.z < 0.0f ? -1.0f : 1.0f;
      float u = (-1.0f / (g + normal.z));
      float v = normal.x * normal.y * u;
      float cosp;
      float sinp;
      sinp = sinf(p);
      cosp = cosf(p);
      //sincosf(p, &sinp, &cosp);
      direction = Vec(v, g + normal.y * normal.y * u, -normal.y) * (cosp * s) +
                  Vec(1 + g * normal.x * normal.x * u, g * v, -g * normal.x) *
                  (sinp * s) + normal * sqrtf(c);
      origin = sampledPosition + direction * 0.1f;
      attenuation = attenuation * 0.2f;

      if (incidence > 0.0f &&
          RayMarching(sampledPosition + normal * 0.1f, lightDirection,
                      sampledPosition, normal) == HIT_SUN)
        color = color + attenuation * Vec(500, 400, 100) * incidence;
    }
    else if (hitType == HIT_SUN) { //
      color = color + attenuation * Vec(50, 80, 100);
      break; // Sun Color
    }
  }
  return color;
}

__global__
void PathTracer(int sampleCount, Pixel *img, int totalPixels, 
                unsigned imgWidth, unsigned imgHeight) {
  unsigned int index  = blockIdx.x * blockDim.x + threadIdx.x;
  if (index < totalPixels) {
    int x = index % imgWidth;
    int y = index / imgWidth;
    const Vec position(-12.0f, 5.0f, 25.0f);
    const Vec goal = !(Vec(-3.0f, 4.0f, 0.0f) + position * -1.0f);
    const Vec left = !Vec(goal.z, 0, -goal.x) * (1.0f / imgWidth);
    // Cross-product to get the up vector
    const Vec up(goal.y *left.z - goal.z * left.y,
                 goal.z *left.x - goal.x * left.z,
                 goal.x *left.y - goal.y * left.x);
    Vec color;
    for (unsigned int p = sampleCount, v = index; p--;) {
      Vec rand_left = Vec(randomVal(v), randomVal(v), randomVal(v))*.001;
      float xf = x + randomVal(v);
      float yf = y + randomVal(v);
      color = color + Trace(position, !((goal+rand_left) + left *
			           ((xf - imgWidth / 2.0f) + randomVal(v)) + up *
			           ((yf - imgHeight / 2.0f) + randomVal(v))), v);
    }                                    
    // Reinhard tone mapping
    color = color * (1.0f / sampleCount) + 14.0f / 241.0f;
    Vec o = color + 1.0f;
    color = Vec(color.x / o.x, color.y / o.y, color.z / o.z) * 255.0f;
    img[index].r = (unsigned char)color.x;
    img[index].g = (unsigned char)color.y;
    img[index].b = (unsigned char)color.z;
  }
}

int main(int argc, char **argv) {
  using namespace std;

  unsigned int sampleCount = 1 << 7;
  unsigned int imageWidth = 1280;
  unsigned int imageHeight = 1024;

  if (argc > 1) {
    if (argc == 2)
      sampleCount = atoi(argv[1]);
    else if (argc == 4) {
      imageWidth = atoi(argv[2]);
      sampleCount = atoi(argv[1]);
      imageHeight = atoi(argv[3]);
    } else {
      cout << "usage: raytracer [#samples] [img-width img-height]\n";
      return 1;   
    }
  }

  cout << "\n";
  cout << "---- Raytracer benchmark (cuda) ----\n"
       << "  Image size    : " << imageWidth << "x" << imageHeight << "\n"
       << "  Samples/pixel : " << sampleCount << "\n\n";

  cout << "  Allocating image..." << std::flush;
  cudaError_t err = cudaSuccess;
  Pixel *img;
  size_t totalPixels = imageWidth * imageHeight;
  err = cudaMallocManaged(&img, totalPixels * sizeof(Pixel));
  if (err != cudaSuccess) {
    fprintf(stderr, "failed to allocate managed memory!\n");
    return 1;
  }
  cout << "  done.\n\n";

  cout << "  Starting benchmark..." << std::flush;
  auto start_time = chrono::steady_clock::now();
  int threadsPerBlock = 256;
  int blocksPerGrid = (totalPixels + threadsPerBlock - 1) / threadsPerBlock;
  PathTracer<<<blocksPerGrid, threadsPerBlock>>>(sampleCount, img, totalPixels,
                                                 imageWidth, imageHeight);
  cudaDeviceSynchronize();                                                 
  err = cudaGetLastError();
  if (err != cudaSuccess) {
    fprintf(stderr, "Failed to launch vectorAdd kernel (error code %s)!\n", cudaGetErrorString(err));
    exit(EXIT_FAILURE);
  }
  auto end_time = chrono::steady_clock::now();
  double elapsed_time = chrono::duration<double>(end_time-start_time).count();

  cout << "\n\n  Total time: " << elapsed_time << " seconds.\n";
  cout << "  Pixels/second: " << totalPixels / elapsed_time << ".\n\n";

  cout << "  Saving image..." << std::flush;
  std::ofstream img_file;
  img_file.open ("raytrace-cuda.ppm");
  img_file << "P6 " << imageWidth << " " << imageHeight << " 255 ";
  for(int i = totalPixels-1; i >= 0; i--)
    img_file << img[i].r << img[i].g << img[i].b;
  img_file.close();
  cout << "  done.\n\n"
       << "*** " << elapsed_time << ", " << elapsed_time << "\n"            
       << "----\n\n";
  return 0;
}

	.file	"tmpxft_00238913_00000000-6_raytracer.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4125:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4125:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z39__device_stub__Z10PathTraceriP5PixelijjiP5Pixelijj
	.type	_Z39__device_stub__Z10PathTraceriP5PixelijjiP5Pixelijj, @function
_Z39__device_stub__Z10PathTraceriP5PixelijjiP5Pixelijj:
.LFB4147:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10PathTraceriP5Pixelijj(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4147:
	.size	_Z39__device_stub__Z10PathTraceriP5PixelijjiP5Pixelijj, .-_Z39__device_stub__Z10PathTraceriP5PixelijjiP5Pixelijj
	.globl	_Z10PathTraceriP5Pixelijj
	.type	_Z10PathTraceriP5Pixelijj, @function
_Z10PathTraceriP5Pixelijj:
.LFB4148:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z10PathTraceriP5PixelijjiP5Pixelijj
	.cfi_endproc
.LFE4148:
	.size	_Z10PathTraceriP5Pixelijj, .-_Z10PathTraceriP5Pixelijj
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z10PathTraceriP5Pixelijj"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4150:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10PathTraceriP5Pixelijj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4150:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC1:
	.string	"usage: raytracer [#samples] [img-width img-height]\n"
.LC2:
	.string	"\n"
.LC3:
	.string	"---- Raytracer benchmark (cuda) ----\n"
.LC4:
	.string	"  Image size    : "
.LC5:
	.string	"x"
.LC6:
	.string	"  Samples/pixel : "
.LC7:
	.string	"\n\n"
.LC8:
	.string	"  Allocating image..."
.LC9:
	.string	"failed to allocate managed memory!\n"
.LC10:
	.string	"  done.\n\n"
.LC11:
	.string	"  Starting benchmark..."
.LC12:
	.string	"Failed to launch vectorAdd kernel (error code %s)!\n"
.LC14:
	.string	"\n\n  Total time: "
.LC15:
	.string	" seconds.\n"
.LC16:
	.string	"  Pixels/second: "
.LC17:
	.string	".\n\n"
.LC18:
	.string	"  Saving image..."
.LC19:
	.string	"raytrace-cuda.ppm"
.LC20:
	.string	"P6 "
.LC21:
	.string	" "
.LC22:
	.string	" 255 "
.LC23:
	.string	"*** "
.LC24:
	.string	", "
.LC25:
	.string	"----\n\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4119:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4119
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$600, %rsp
	.cfi_def_cfa_offset 656
	movq	%fs:40, %rax
	movq	%rax, 584(%rsp)
	xorl	%eax, %eax
	cmpl	$1, %edi
	jle	.L26
	movq	%rsi, %rbx
	cmpl	$2, %edi
	jne	.L12
	movq	8(%rsi), %rdi
	movl	$1024, %r13d
	movl	$1280, %r12d
	call	atoi@PLT
	movl	%eax, %ebp
	jmp	.L11
.L12:
	cmpl	$4, %edi
	jne	.L13
	movq	16(%rsi), %rdi
	call	atoi@PLT
	movq	8(%rbx), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	movq	24(%rbx), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movl	%eax, %r13d
	jmp	.L11
.L13:
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
.LEHB0:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L14
.L26:
	movl	$1024, %r13d
	movl	$1280, %r12d
	movl	$128, %ebp
.L11:
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movl	%r12d, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	imull	%r13d, %ebx
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	movl	%ebx, %r14d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	movl	%r12d, %eax
	movq	%rax, 16(%rsp)
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r13d, %esi
	movq	%rax, %rdi
	movl	%r13d, %eax
	movq	%rax, 24(%rsp)
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC8(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt5flushIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	(%r14,%r14,2), %rsi
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	call	cudaMallocManaged@PLT
	testl	%eax, %eax
	je	.L15
	movq	stderr(%rip), %rdi
	leaq	.LC9(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L14:
	movl	$1, %eax
	jmp	.L10
.L15:
	leaq	.LC10(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	addq	$255, %r14
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC11(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	shrq	$8, %r14
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt5flushIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movl	%r14d, 48(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, %r15
	movl	$16777217, %edx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%rax, 52(%rsp)
	movl	56(%rsp), %esi
	salq	$8, %rdx
	movq	48(%rsp), %rdi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	40(%rsp), %rsi
	movl	%r13d, %r8d
	movl	%r12d, %ecx
	movl	%ebx, %edx
	movl	%ebp, %edi
	call	_Z39__device_stub__Z10PathTraceriP5PixelijjiP5Pixelijj
.L17:
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L18
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L18:
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	leaq	.LC14(%rip), %rsi
	leaq	72(%rsp), %rbp
	subq	%r15, %rax
	leaq	_ZSt4cout(%rip), %rdi
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC13(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	8(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC16(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%ebx, %eax
	cvtsi2sdq	%rax, %xmm0
	divsd	8(%rsp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC17(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC18(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt5flushIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%rbp, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
	movl	$16, %edx
	leaq	.LC19(%rip), %rsi
	movq	%rbp, %rdi
.LEHB1:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	leaq	.LC20(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	16(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC21(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	24(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC22(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	decl	%ebx
	movslq	%ebx, %r12
	leaq	(%r12,%r12,2), %r12
.L21:
	testl	%ebx, %ebx
	js	.L30
	movq	40(%rsp), %rax
	movq	%rbp, %rdi
	movsbl	(%rax,%r12), %esi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movq	%rax, %rdi
	movq	40(%rsp), %rax
	movsbl	1(%rax,%r12), %esi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movq	%rax, %rdi
	movq	40(%rsp), %rax
	movsbl	2(%rax,%r12), %esi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	decl	%ebx
	subq	$3, %r12
	jmp	.L21
.L30:
	movq	%rbp, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
	leaq	.LC10(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	leaq	.LC23(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	8(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC24(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	8(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC2(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	leaq	.LC25(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.LEHE1:
	movq	%rbp, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	xorl	%eax, %eax
	jmp	.L10
.L27:
	endbr64
	movq	%rax, %rbx
.L23:
	movq	%rbp, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	584(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L29
	movq	%rbx, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L10:
	movq	584(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L25
.L29:
	call	__stack_chk_fail@PLT
.L25:
	addq	$600, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4119:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4119:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4119-.LLSDACSB4119
.LLSDACSB4119:
	.uleb128 .LEHB0-.LFB4119
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4119
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L27-.LFB4119
	.uleb128 0
	.uleb128 .LEHB2-.LFB4119
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE4119:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC13:
	.long	0
	.long	1104006501
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <fstream>
#include <chrono>
#include <iomanip>
#include <math.h>
#include <stdint.h>
#include <float.h>
#include <limits.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>

struct Pixel {
  unsigned char r, g, b;
};

struct Vec {
  float x,y,z;
  __forceinline__ __device__ Vec(float v = 0) {x = y = z = v;}
  __forceinline__ __device__ Vec(float a, float b, float c = 0) {x = a;y = b;z = c;}
  __forceinline__ __device__ Vec operator+(const Vec r) const  { return Vec(x + r.x , y + r.y , z + r.z); }
  __forceinline__ __device__ Vec operator*(const Vec r) const { return   Vec(x * r.x , y * r.y , z * r.z); }
  __forceinline__ __device__ float operator%(const Vec r) const {return     x * r.x + y * r.y + z * r.z;}
  __forceinline__ __device__ Vec operator!() { return *this * (1.0/sqrtf(*this % *this)); }
};

__forceinline__ __device__
float randomVal(unsigned int& x) {
  x = (214013*x+2531011);
  return ((x>>16)&0x7FFF) / (float)66635;
}

// Rectangle CSG equation. Returns minimum signed distance from
// space carved by
// lowerLeft vertex and opposite rectangle vertex upperRight.
__forceinline__ __device__
float BoxTest(const Vec& position, Vec lowerLeft, Vec upperRight) {
  lowerLeft = position + lowerLeft * -1.0f;
  upperRight = upperRight + position * -1.0f;
  return -fminf(fminf(fminf(lowerLeft.x, upperRight.x), 
                      fminf(lowerLeft.y, upperRight.y)),
                fminf(lowerLeft.z, upperRight.z));
}

#define HIT_NONE 0
#define HIT_LETTER 1
#define HIT_WALL 2
#define HIT_SUN 3

// Sample the world using Signed Distance Fields.
__forceinline__ __device__
float QueryDatabase(const Vec& position, int &hitType) {
  float distance = 1e9;//FLT_MAX;
  Vec f = position; // Flattened position (z=0)
  f.z = 0;
  const float lines[10*4] = {
    -20.0f,  0.0f, -20.0f, 16.0f,
    -20.0f,  0.0f, -14.0f,  0.0f,
    -11.0f,  0.0f,  -7.0f, 16.0f, 
     -3.0f,  0.0f,  -7.0f, 16.0f,
     -5.5f,  5.0f,  -9.5f,  5.0f,
      0.0f,  0.0f,   0.0f, 16.0f,
      6.0f,  0.0f,   6.0f, 16.0f,
      0.0f, 16.0f,   6.0f,  0.0f,
      9.0f,  0.0f,   9.0f, 16.0f,
      9.0f,  0.0f,  15.0f,  0.0f
  };

  for (unsigned i = 0; i < sizeof(lines)/sizeof(float); i += sizeof(float)) {
    Vec begin = Vec(lines[i], lines[i + 1]) * 0.5f;
    Vec e = Vec(lines[i + 2], lines[i + 3]) * 0.5f + begin * -1.0f;
    Vec o = f + (begin + e * fminf(-fminf((((begin + f * -1) % e )/(e % e)), 0),1)) * -1.0f;
    distance = fminf(distance, o % o); // compare squared distance.
  }

  distance = sqrtf(distance); // Get real distance, not square distance.
  distance = powf(powf(distance, 8)+powf(position.z, 8), 0.125f) - 0.5f;
  hitType = HIT_LETTER;

  float roomDist ;
  roomDist = fminf(-fminf(
      BoxTest(position, Vec(-30.0f, -0.5f, -30.0f), Vec(30.0f, 18.0f, 30.0f)),
      BoxTest(position, Vec(-25.0f, 17.0f, -25.0f), Vec(25.0f, 20.0f, 25.0f))),
                   BoxTest( // Ceiling "planks" spaced 8 units apart.
                       Vec(fmodf(fabsf(position.x), 8.0f), position.y, position.z),
                       Vec(1.5f, 18.5f, -25.0f),
                       Vec(6.5f, 20.0f,  25.0f)));
  if (roomDist < distance) {
    distance = roomDist;
    hitType = HIT_WALL;
  }
  float sun = 19.9f - position.y; // Everything above 19.9 is light source.
  if (sun < distance) {
    distance = sun;
    hitType = HIT_SUN;
  }
  return distance;
}

// Perform signed sphere marching
// Returns hitType 0, 1, 2, or 3 and update hit position/normal
__forceinline__ __device__
int RayMarching(const Vec& origin, const Vec& direction, Vec& hitPos, Vec& hitNorm) {
  int hitType = HIT_NONE;
  int noHitCount = 0;

  // Signed distance marching
  float d; // distance from closest object in world.
  for (float total_d = 0.0f; total_d < 100.0f; total_d += d) {
    d = QueryDatabase(hitPos = origin + direction * total_d, hitType);
    if (d < .01f || ++noHitCount > 99) {
      hitNorm = !Vec(QueryDatabase(hitPos + Vec(0.01f, 0.00f), noHitCount) - d,
                     QueryDatabase(hitPos + Vec(0.00f, 0.01f), noHitCount) - d,
                     QueryDatabase(hitPos + Vec(0.00f, 0.00f, 0.01f), noHitCount) - d);
      return hitType;
    }
  }
  return HIT_NONE;
}

__forceinline__ __device__
Vec Trace(Vec origin, Vec direction, unsigned int& rn) {
  Vec sampledPosition;
  Vec normal;
  Vec color(0.0f, 0.0f, 0.0f);
  Vec attenuation(1.0f);
  Vec lightDirection(!Vec(0.6f, 0.6f, 1.0f)); // Directional light

  for (int bounceCount = 8; bounceCount--;) {
    int hitType = RayMarching(origin, direction, sampledPosition, normal);
    if (hitType == HIT_NONE)
      break;                     // No hit. This is over, return color.
    else if (hitType == HIT_LETTER) { // Specular bounce on a letter. No color acc.
      direction = direction + normal * (normal % direction * -2);
      origin = sampledPosition + direction * 0.1f;
      attenuation = attenuation * 0.2f; // Attenuation via distance traveled.
    } else if (hitType == HIT_WALL) { // Wall hit uses color yellow?
      float incidence = normal % lightDirection;
      float p = 6.283185f * randomVal(rn);
      float c = randomVal(rn);
      float s = sqrtf(1.0f - c);
      float g = normal.z < 0.0f ? -1.0f : 1.0f;
      float u = (-1.0f / (g + normal.z));
      float v = normal.x * normal.y * u;
      float cosp;
      float sinp;
      sinp = sinf(p);
      cosp = cosf(p);
      //sincosf(p, &sinp, &cosp);
      direction = Vec(v, g + normal.y * normal.y * u, -normal.y) * (cosp * s) +
                  Vec(1 + g * normal.x * normal.x * u, g * v, -g * normal.x) *
                  (sinp * s) + normal * sqrtf(c);
      origin = sampledPosition + direction * 0.1f;
      attenuation = attenuation * 0.2f;

      if (incidence > 0.0f &&
          RayMarching(sampledPosition + normal * 0.1f, lightDirection,
                      sampledPosition, normal) == HIT_SUN)
        color = color + attenuation * Vec(500, 400, 100) * incidence;
    }
    else if (hitType == HIT_SUN) { //
      color = color + attenuation * Vec(50, 80, 100);
      break; // Sun Color
    }
  }
  return color;
}

__global__
void PathTracer(int sampleCount, Pixel *img, int totalPixels, 
                unsigned imgWidth, unsigned imgHeight) {
  unsigned int index  = blockIdx.x * blockDim.x + threadIdx.x;
  if (index < totalPixels) {
    int x = index % imgWidth;
    int y = index / imgWidth;
    const Vec position(-12.0f, 5.0f, 25.0f);
    const Vec goal = !(Vec(-3.0f, 4.0f, 0.0f) + position * -1.0f);
    const Vec left = !Vec(goal.z, 0, -goal.x) * (1.0f / imgWidth);
    // Cross-product to get the up vector
    const Vec up(goal.y *left.z - goal.z * left.y,
                 goal.z *left.x - goal.x * left.z,
                 goal.x *left.y - goal.y * left.x);
    Vec color;
    for (unsigned int p = sampleCount, v = index; p--;) {
      Vec rand_left = Vec(randomVal(v), randomVal(v), randomVal(v))*.001;
      float xf = x + randomVal(v);
      float yf = y + randomVal(v);
      color = color + Trace(position, !((goal+rand_left) + left *
			           ((xf - imgWidth / 2.0f) + randomVal(v)) + up *
			           ((yf - imgHeight / 2.0f) + randomVal(v))), v);
    }                                    
    // Reinhard tone mapping
    color = color * (1.0f / sampleCount) + 14.0f / 241.0f;
    Vec o = color + 1.0f;
    color = Vec(color.x / o.x, color.y / o.y, color.z / o.z) * 255.0f;
    img[index].r = (unsigned char)color.x;
    img[index].g = (unsigned char)color.y;
    img[index].b = (unsigned char)color.z;
  }
}

int main(int argc, char **argv) {
  using namespace std;

  unsigned int sampleCount = 1 << 7;
  unsigned int imageWidth = 1280;
  unsigned int imageHeight = 1024;

  if (argc > 1) {
    if (argc == 2)
      sampleCount = atoi(argv[1]);
    else if (argc == 4) {
      imageWidth = atoi(argv[2]);
      sampleCount = atoi(argv[1]);
      imageHeight = atoi(argv[3]);
    } else {
      cout << "usage: raytracer [#samples] [img-width img-height]\n";
      return 1;   
    }
  }

  cout << "\n";
  cout << "---- Raytracer benchmark (cuda) ----\n"
       << "  Image size    : " << imageWidth << "x" << imageHeight << "\n"
       << "  Samples/pixel : " << sampleCount << "\n\n";

  cout << "  Allocating image..." << std::flush;
  hipError_t err = hipSuccess;
  Pixel *img;
  size_t totalPixels = imageWidth * imageHeight;
  err = hipMallocManaged(&img, totalPixels * sizeof(Pixel));
  if (err != hipSuccess) {
    fprintf(stderr, "failed to allocate managed memory!\n");
    return 1;
  }
  cout << "  done.\n\n";

  cout << "  Starting benchmark..." << std::flush;
  auto start_time = chrono::steady_clock::now();
  int threadsPerBlock = 256;
  int blocksPerGrid = (totalPixels + threadsPerBlock - 1) / threadsPerBlock;
  PathTracer<<<blocksPerGrid, threadsPerBlock>>>(sampleCount, img, totalPixels,
                                                 imageWidth, imageHeight);
  hipDeviceSynchronize();                                                 
  err = hipGetLastError();
  if (err != hipSuccess) {
    fprintf(stderr, "Failed to launch vectorAdd kernel (error code %s)!\n", hipGetErrorString(err));
    exit(EXIT_FAILURE);
  }
  auto end_time = chrono::steady_clock::now();
  double elapsed_time = chrono::duration<double>(end_time-start_time).count();

  cout << "\n\n  Total time: " << elapsed_time << " seconds.\n";
  cout << "  Pixels/second: " << totalPixels / elapsed_time << ".\n\n";

  cout << "  Saving image..." << std::flush;
  std::ofstream img_file;
  img_file.open ("raytrace-cuda.ppm");
  img_file << "P6 " << imageWidth << " " << imageHeight << " 255 ";
  for(int i = totalPixels-1; i >= 0; i--)
    img_file << img[i].r << img[i].g << img[i].b;
  img_file.close();
  cout << "  done.\n\n"
       << "*** " << elapsed_time << ", " << elapsed_time << "\n"            
       << "----\n\n";
  return 0;
}

	.text
	.file	"raytracer.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z25__device_stub__PathTraceriP5Pixelijj # -- Begin function _Z25__device_stub__PathTraceriP5Pixelijj
	.type	_Z25__device_stub__PathTraceriP5Pixelijj,@function
_Z25__device_stub__PathTraceriP5Pixelijj: # @_Z25__device_stub__PathTraceriP5Pixelijj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10PathTraceriP5Pixelijj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__PathTraceriP5Pixelijj, .Lfunc_end0-_Z25__device_stub__PathTraceriP5Pixelijj
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$536, %rsp                      # imm = 0x218
	.cfi_def_cfa_offset 592
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$128, %ebp
	movl	$1280, %ebx                     # imm = 0x500
	movl	$1024, %r12d                    # imm = 0x400
	cmpl	$2, %edi
	jl	.LBB1_7
# %bb.1:
	movq	%rsi, %r14
	cmpl	$4, %edi
	je	.LBB1_6
# %bb.2:
	cmpl	$2, %edi
	jne	.LBB1_4
# %bb.3:
	movq	8(%r14), %rdi
	callq	atoi
	movl	%eax, %ebp
	jmp	.LBB1_7
.LBB1_6:
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	8(%r14), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	24(%r14), %rdi
	callq	atoi
	movl	%eax, %r12d
.LBB1_7:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$37, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %r15d
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r13
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r12d, %r14d
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r13
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.5, %esi
	movl	$18, %edx
	movq	%r13, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %esi
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.6, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$21, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	callq	_ZNSo5flushEv
	imull	%r12d, %ebx
	leaq	(%rbx,%rbx,2), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, %r12d
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.9:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	callq	_ZNSo5flushEv
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	%rax, %r12
	leaq	255(%rbx), %rdi
	shrq	$8, %rdi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.10:
	movq	16(%rsp), %rsi
	movl	%ebp, %edi
	movl	%ebx, %edx
	movl	%r15d, %ecx
	movl	%r14d, %r8d
	callq	_Z25__device_stub__PathTraceriP5Pixelijj
.LBB1_11:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_43
# %bb.12:
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	subq	%r12, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.12, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.13, %esi
	movl	$10, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.14, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rbx, %xmm0
	divsd	8(%rsp), %xmm0                  # 8-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.15, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.16, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	callq	_ZNSo5flushEv
	leaq	24(%rsp), %r12
	movq	%r12, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp0:
	movl	$.L.str.17, %esi
	movq	%r12, %rdi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp1:
# %bb.13:
.Ltmp2:
	leaq	24(%rsp), %rdi
	movl	$.L.str.18, %esi
	movl	$3, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp3:
# %bb.14:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
.Ltmp4:
	leaq	24(%rsp), %r12
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp5:
# %bb.15:                               # %_ZNSolsEj.exit
.Ltmp6:
	movq	%rax, %r15
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp7:
# %bb.16:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit53
.Ltmp8:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp9:
# %bb.17:                               # %_ZNSolsEj.exit54
.Ltmp10:
	movl	$.L.str.20, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp11:
# %bb.18:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit55.preheader
	decl	%ebx
	js	.LBB1_32
# %bb.19:                               # %.lr.ph.preheader
	movl	%ebx, %r15d
	leaq	(%r15,%r15,2), %r13
	incq	%r15
	leaq	7(%rsp), %rbx
.LBB1_20:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	16(%rsp), %rax
	movb	(%rax,%r13), %al
	movb	%al, 7(%rsp)
	movq	24(%rsp), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 40(%rsp,%rcx)
	je	.LBB1_23
# %bb.21:                               #   in Loop: Header=BB1_20 Depth=1
.Ltmp12:
	movl	$1, %edx
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp13:
# %bb.22:                               #   in Loop: Header=BB1_20 Depth=1
	movq	%rax, %r14
	jmp	.LBB1_24
.LBB1_23:                               #   in Loop: Header=BB1_20 Depth=1
.Ltmp14:
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
.Ltmp15:
	movq	%r12, %r14
.LBB1_24:                               #   in Loop: Header=BB1_20 Depth=1
	movq	16(%rsp), %rax
	movb	1(%rax,%r13), %al
	movb	%al, 7(%rsp)
	movq	(%r14), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%r14,%rcx)
	je	.LBB1_27
# %bb.25:                               #   in Loop: Header=BB1_20 Depth=1
.Ltmp16:
	movl	$1, %edx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp17:
# %bb.26:                               #   in Loop: Header=BB1_20 Depth=1
	movq	%rax, %r14
	jmp	.LBB1_28
.LBB1_27:                               #   in Loop: Header=BB1_20 Depth=1
.Ltmp18:
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
.Ltmp19:
.LBB1_28:                               #   in Loop: Header=BB1_20 Depth=1
	movq	16(%rsp), %rax
	movb	2(%rax,%r13), %al
	movb	%al, 7(%rsp)
	movq	(%r14), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%r14,%rcx)
	je	.LBB1_30
# %bb.29:                               #   in Loop: Header=BB1_20 Depth=1
.Ltmp20:
	movl	$1, %edx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp21:
	jmp	.LBB1_31
.LBB1_30:                               #   in Loop: Header=BB1_20 Depth=1
.Ltmp22:
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
.Ltmp23:
.LBB1_31:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_h.exit66
                                        #   in Loop: Header=BB1_20 Depth=1
	addq	$-3, %r13
	decq	%r15
	jg	.LBB1_20
.LBB1_32:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit55._crit_edge
.Ltmp25:
	leaq	24(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp26:
# %bb.33:
.Ltmp27:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp28:
# %bb.34:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit68
.Ltmp29:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.21, %esi
	movl	$4, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp30:
# %bb.35:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit70
.Ltmp31:
	movl	$_ZSt4cout, %edi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp32:
# %bb.36:                               # %_ZNSolsEd.exit
.Ltmp33:
	movq	%rax, %rbx
	movl	$.L.str.22, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp34:
# %bb.37:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit73
.Ltmp35:
	movq	%rbx, %rdi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp36:
# %bb.38:                               # %_ZNSolsEd.exit75
.Ltmp37:
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp38:
# %bb.39:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit77
.Ltmp39:
	movl	$.L.str.23, %esi
	movl	$6, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp40:
# %bb.40:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit79
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	32(%rsp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, 24(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	272(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	xorl	%r12d, %r12d
.LBB1_5:
	movl	%r12d, %eax
	addq	$536, %rsp                      # imm = 0x218
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_4:
	.cfi_def_cfa_offset 592
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$51, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$1, %r12d
	jmp	.LBB1_5
.LBB1_8:
	movq	stderr(%rip), %rcx
	movl	$.L.str.8, %edi
	movl	$35, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	jmp	.LBB1_5
.LBB1_43:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.11, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.LBB1_41:
.Ltmp41:
	jmp	.LBB1_42
.LBB1_44:
.Ltmp24:
.LBB1_42:
	movq	%rax, %rbx
	leaq	24(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp11-.Ltmp0                 #   Call between .Ltmp0 and .Ltmp11
	.uleb128 .Ltmp41-.Lfunc_begin0          #     jumps to .Ltmp41
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 3 <<
	.uleb128 .Ltmp23-.Ltmp12                #   Call between .Ltmp12 and .Ltmp23
	.uleb128 .Ltmp24-.Lfunc_begin0          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp40-.Ltmp25                #   Call between .Ltmp25 and .Ltmp40
	.uleb128 .Ltmp41-.Lfunc_begin0          #     jumps to .Ltmp41
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp40-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Lfunc_end1-.Ltmp40            #   Call between .Ltmp40 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10PathTraceriP5Pixelijj, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10PathTraceriP5Pixelijj,@object # @_Z10PathTraceriP5Pixelijj
	.section	.rodata,"a",@progbits
	.globl	_Z10PathTraceriP5Pixelijj
	.p2align	3, 0x0
_Z10PathTraceriP5Pixelijj:
	.quad	_Z25__device_stub__PathTraceriP5Pixelijj
	.size	_Z10PathTraceriP5Pixelijj, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"usage: raytracer [#samples] [img-width img-height]\n"
	.size	.L.str, 52

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\n"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"---- Raytracer benchmark (cuda) ----\n"
	.size	.L.str.2, 38

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"  Image size    : "
	.size	.L.str.3, 19

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"x"
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"  Samples/pixel : "
	.size	.L.str.5, 19

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"\n\n"
	.size	.L.str.6, 3

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"  Allocating image..."
	.size	.L.str.7, 22

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"failed to allocate managed memory!\n"
	.size	.L.str.8, 36

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"  done.\n\n"
	.size	.L.str.9, 10

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"  Starting benchmark..."
	.size	.L.str.10, 24

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Failed to launch vectorAdd kernel (error code %s)!\n"
	.size	.L.str.11, 52

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"\n\n  Total time: "
	.size	.L.str.12, 17

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	" seconds.\n"
	.size	.L.str.13, 11

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"  Pixels/second: "
	.size	.L.str.14, 18

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	".\n\n"
	.size	.L.str.15, 4

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"  Saving image..."
	.size	.L.str.16, 18

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"raytrace-cuda.ppm"
	.size	.L.str.17, 18

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"P6 "
	.size	.L.str.18, 4

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	" "
	.size	.L.str.19, 2

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	" 255 "
	.size	.L.str.20, 6

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"*** "
	.size	.L.str.21, 5

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	", "
	.size	.L.str.22, 3

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"----\n\n"
	.size	.L.str.23, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10PathTraceriP5Pixelijj"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__PathTraceriP5Pixelijj
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z10PathTraceriP5Pixelijj
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10PathTraceriP5Pixelijj ; -- Begin function _Z10PathTraceriP5Pixelijj
	.globl	_Z10PathTraceriP5Pixelijj
	.p2align	8
	.type	_Z10PathTraceriP5Pixelijj,@function
_Z10PathTraceriP5Pixelijj:              ; @_Z10PathTraceriP5Pixelijj
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s4, v1
	s_cbranch_execz .LBB0_123
; %bb.1:
	s_load_b32 s15, s[0:1], 0x0
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v9, 0
	v_mov_b32_e32 v10, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s15, 0
	s_cbranch_scc1 .LBB0_122
; %bb.2:                                ; %.lr.ph
	v_cvt_f32_u32_e32 v2, s5
	s_sub_i32 s2, 0, s5
	v_cvt_f32_u32_e32 v18, s6
	v_mov_b32_e32 v11, 0xbd1a0bc2
	s_mov_b32 s16, 0x343fd
	v_rcp_iflag_f32_e32 v0, v2
	v_div_scale_f32 v4, null, v2, v2, 1.0
	v_div_scale_f32 v6, vcc_lo, 1.0, v2, 1.0
	s_mov_b32 s17, 0x3a83126f
	s_delay_alu instid0(VALU_DEP_2)
	v_rcp_f32_e32 v5, v4
	s_mov_b32 s18, 0x3e76c4e1
	s_mov_b32 s19, 0x7fffff
	s_mov_b32 s20, 0xb94c1982
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_mov_b32 s21, 0x37d75334
	s_mov_b32 s22, s15
	v_mov_b32_e32 v12, 0xbf70b25f
	v_mov_b32_e32 v10, 0
	v_cvt_u32_f32_e32 v0, v0
	v_mul_f32_e32 v16, 0.5, v2
	v_dual_mul_f32 v18, 0.5, v18 :: v_dual_mov_b32 v47, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, s2, v0
	v_mul_hi_u32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v3
	v_fma_f32 v3, -v4, v5, 1.0
	v_fmac_f32_e32 v5, v3, v5
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v7, v6, v5
	v_mul_hi_u32 v0, v1, v0
	v_fma_f32 v9, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v8, v0, s5
	v_fmac_f32_e32 v7, v9, v5
	v_add_nc_u32_e32 v9, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v4, -v4, v7, v6
	v_sub_nc_u32_e32 v8, v1, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v4, v4, v5, v7
	v_subrev_nc_u32_e32 v6, s5, v8
	v_cmp_le_u32_e64 s2, s5, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v4, v4, v2, 1.0
	v_cndmask_b32_e64 v0, v0, v9, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, v8, v6, s2
	v_mul_f32_e32 v14, 0xbead6ca3, v4
	v_mul_f32_e32 v13, 0, v4
	v_mul_f32_e32 v15, 0xbf70ddff, v4
	v_add_nc_u32_e32 v6, 1, v0
	v_cmp_le_u32_e32 vcc_lo, s5, v5
	v_dual_mov_b32 v9, 0 :: v_dual_mul_f32 v4, 0x3ead4d3a, v14
	v_mul_f32_e32 v2, 0x3f70b25f, v13
	v_mul_f32_e32 v17, 0x3d1a0bc2, v15
	v_dual_cndmask_b32 v5, v0, v6 :: v_dual_mov_b32 v0, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v20, 0xbf70b25f, v15, -v4
	v_fmamk_f32 v19, v14, 0xbd1a0bc2, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v17, 0x3ead4d3a, v13
	v_mul_lo_u32 v6, v5, s5
	v_cvt_f32_i32_e32 v21, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v6, v1, v6
	v_cvt_f32_i32_e32 v22, v6
.LBB0_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
                                        ;         Child Loop BB0_6 Depth 4
                                        ;         Child Loop BB0_12 Depth 4
                                        ;       Child Loop BB0_20 Depth 3
                                        ;       Child Loop BB0_26 Depth 3
                                        ;       Child Loop BB0_30 Depth 3
                                        ;       Child Loop BB0_36 Depth 3
                                        ;       Child Loop BB0_40 Depth 3
                                        ;       Child Loop BB0_46 Depth 3
                                        ;       Child Loop BB0_62 Depth 3
                                        ;         Child Loop BB0_63 Depth 4
                                        ;         Child Loop BB0_69 Depth 4
                                        ;       Child Loop BB0_77 Depth 3
                                        ;       Child Loop BB0_83 Depth 3
                                        ;       Child Loop BB0_87 Depth 3
                                        ;       Child Loop BB0_93 Depth 3
                                        ;       Child Loop BB0_97 Depth 3
                                        ;       Child Loop BB0_103 Depth 3
	v_mad_u64_u32 v[4:5], null, v47, s16, 0x269ec3
	s_mov_b32 s23, 0
	s_mov_b32 s26, 7
                                        ; implicit-def: $sgpr25
                                        ; implicit-def: $sgpr24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v4, s16, 0x269ec3
	v_bfe_u32 v2, v4, 16, 15
	v_cvt_f32_u32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_bfe_u32 v4, v5, 16, 15
	v_mad_u64_u32 v[6:7], null, v5, s16, 0x269ec3
	v_div_scale_f32 v8, null, 0x47822580, 0x47822580, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cvt_f32_u32_e32 v23, v4
	v_div_scale_f32 v26, vcc_lo, v2, 0x47822580, v2
	v_bfe_u32 v7, v6, 16, 15
	v_mad_u64_u32 v[4:5], null, v6, s16, 0x269ec3
	v_rcp_f32_e32 v24, v8
	v_div_scale_f32 v25, null, 0x47822580, 0x47822580, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cvt_f32_u32_e32 v28, v7
	v_div_scale_f32 v27, s2, v23, 0x47822580, v23
	v_rcp_f32_e32 v29, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[5:6], null, v4, s16, 0x269ec3
	v_div_scale_f32 v30, null, 0x47822580, 0x47822580, v28
	v_bfe_u32 v7, v4, 16, 15
	s_delay_alu instid0(TRANS32_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v4, -v8, v24, 1.0
	v_div_scale_f32 v31, s3, v28, 0x47822580, v28
	v_rcp_f32_e32 v33, v30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f32_u32_e32 v32, v7
	v_fmac_f32_e32 v24, v4, v24
	v_bfe_u32 v4, v5, 16, 15
	v_mad_u64_u32 v[6:7], null, v5, s16, 0x269ec3
	v_fma_f32 v5, -v25, v29, 1.0
	v_div_scale_f32 v7, null, 0x47822580, 0x47822580, v32
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_cvt_f32_u32_e32 v36, v4
	v_fma_f32 v39, -v30, v33, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v29, v5, v29 :: v_dual_mul_f32 v34, v26, v24
	v_mad_u64_u32 v[4:5], null, v6, s16, 0x269ec3
	v_bfe_u32 v40, v6, 16, 15
	v_mul_f32_e32 v5, v27, v29
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f32 v38, -v8, v34, v26
	v_div_scale_f32 v6, null, 0x47822580, 0x47822580, v36
	v_fmac_f32_e32 v33, v39, v33
	v_rcp_f32_e32 v37, v7
	v_fmac_f32_e32 v34, v38, v24
	v_fma_f32 v38, -v25, v5, v27
	v_rcp_f32_e32 v42, v6
	v_mul_f32_e32 v41, v31, v33
	v_div_scale_f32 v35, s4, v32, 0x47822580, v32
	v_fma_f32 v8, -v8, v34, v26
	v_fmac_f32_e32 v5, v38, v29
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(TRANS32_DEP_2)
	v_fma_f32 v26, -v30, v41, v31
	v_fma_f32 v39, -v7, v37, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_fmas_f32 v8, v8, v24, v34
	v_fma_f32 v24, -v25, v5, v27
	s_delay_alu instid0(TRANS32_DEP_1)
	v_fma_f32 v27, -v6, v42, 1.0
	v_bfe_u32 v34, v4, 16, 15
	v_fmac_f32_e32 v41, v26, v33
	v_cvt_f32_u32_e32 v26, v40
	v_fmac_f32_e32 v37, v39, v37
	v_fmac_f32_e32 v42, v27, v42
	v_cvt_f32_u32_e32 v27, v34
	s_mov_b32 vcc_lo, s2
	v_div_scale_f32 v39, null, 0x47822580, 0x47822580, v26
	v_mul_f32_e32 v25, v35, v37
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_scale_f32 v43, null, 0x47822580, 0x47822580, v27
	v_rcp_f32_e32 v40, v39
	v_div_fmas_f32 v5, v24, v29, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f32 v38, -v7, v25, v35
	v_fma_f32 v24, -v30, v41, v31
	v_rcp_f32_e32 v30, v43
	s_mov_b32 vcc_lo, s3
	v_div_scale_f32 v34, s5, v36, 0x47822580, v36
	v_fmac_f32_e32 v25, v38, v37
	v_div_fixup_f32 v2, v8, 0x47822580, v2
	s_delay_alu instid0(TRANS32_DEP_2) | instskip(SKIP_3) | instid1(TRANS32_DEP_1)
	v_fma_f32 v31, -v39, v40, 1.0
	v_div_fixup_f32 v5, v5, 0x47822580, v23
	v_mov_b32_e32 v38, 0xc1400000
	v_fma_f32 v7, -v7, v25, v35
	v_fma_f32 v35, -v43, v30, 1.0
	v_fmac_f32_e32 v40, v31, v40
	v_div_fmas_f32 v24, v24, v33, v41
	s_mov_b32 vcc_lo, s4
	v_div_scale_f32 v31, s2, v26, 0x47822580, v26
	v_fmac_f32_e32 v30, v35, v30
	v_div_fmas_f32 v7, v7, v37, v25
	v_fmaak_f32 v2, s17, v2, 0x3ead4d3a
	v_mul_f32_e32 v29, v34, v42
	s_mov_b32 vcc_lo, s5
	v_mov_b32_e32 v37, 0x40a00000
	v_div_fixup_f32 v7, v7, 0x47822580, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v33, -v6, v29, v34
	v_add_f32_e32 v7, v7, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v29, v33, v42
	v_div_scale_f32 v33, s3, v27, 0x47822580, v27
	v_sub_f32_e32 v7, v7, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v6, -v6, v29, v34
	v_mul_f32_e32 v32, v33, v30
	v_mov_b32_e32 v34, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v6, v6, v42, v29
	v_fma_f32 v29, -v43, v32, v33
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v6, v6, 0x47822580, v36
	v_dual_mul_f32 v25, v31, v40 :: v_dual_fmac_f32 v32, v29, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v6, v6, v21
	v_fma_f32 v35, -v39, v25, v31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v23, -v43, v32, v33
	v_dual_mov_b32 v33, v3 :: v_dual_sub_f32 v6, v6, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v25, v35, v40
	v_fma_f32 v31, -v39, v25, v31
	v_mov_b32_e32 v39, 0x41c80000
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v25, v31, v40, v25
	s_mov_b32 vcc_lo, s3
	v_div_fmas_f32 v23, v23, v30, v32
	v_mov_b32_e32 v32, v3
	v_div_fixup_f32 v25, v25, 0x47822580, v26
	v_mov_b32_e32 v26, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_div_fixup_f32 v8, v23, 0x47822580, v27
	v_div_fixup_f32 v23, v24, 0x47822580, v28
	v_dual_add_f32 v7, v7, v25 :: v_dual_mov_b32 v28, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v27, 1.0 :: v_dual_add_f32 v6, v6, v8
	v_fmamk_f32 v29, v23, 0x3a83126f, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v2, v15, v7 :: v_dual_fmamk_f32 v5, v5, 0x3a83126f, v11
	v_dual_fmac_f32 v29, v14, v7 :: v_dual_fmac_f32 v2, v19, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v5, v13, v7
	v_fmac_f32_e32 v29, v17, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v20, v6
	v_mul_f32_e32 v7, v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v2, v2
	v_fmac_f32_e32 v7, v29, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v6, 0x4f800000, v7
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v7
	v_cndmask_b32_e32 v6, v7, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v8, -1, v7
	v_add_nc_u32_e32 v23, 1, v7
	v_fma_f32 v24, -v8, v7, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v25, -v23, v7, v6
	v_cmp_ge_f32_e64 s2, 0, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v7, v7, v8, s2
	v_cmp_lt_f32_e64 s2, 0, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, v7, v23, s2
	v_mul_f32_e32 v8, 0x37800000, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, v7, v8, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v6, 0x260
	v_cndmask_b32_e32 v6, v7, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v7, null, v6, v6, 1.0
	v_div_scale_f32 v24, vcc_lo, 1.0, v6, 1.0
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v23, -v7, v8, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v23, v8
	v_mul_f32_e32 v23, v24, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v25, -v7, v23, v24
	v_fmac_f32_e32 v23, v25, v8
	v_mov_b32_e32 v25, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v7, v23, v24
	v_mov_b32_e32 v24, v3
	v_div_fmas_f32 v7, v7, v8, v23
	v_mov_b32_e32 v23, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v6, v7, v6, 1.0
	v_mul_f32_e32 v36, v29, v6
	v_mul_f32_e32 v8, v2, v6
	v_mul_f32_e32 v35, v5, v6
	v_mov_b32_e32 v5, v4
.LBB0_4:                                ; %.preheader.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
                                        ;         Child Loop BB0_6 Depth 4
                                        ;         Child Loop BB0_12 Depth 4
                                        ;       Child Loop BB0_20 Depth 3
                                        ;       Child Loop BB0_26 Depth 3
                                        ;       Child Loop BB0_30 Depth 3
                                        ;       Child Loop BB0_36 Depth 3
                                        ;       Child Loop BB0_40 Depth 3
                                        ;       Child Loop BB0_46 Depth 3
                                        ;       Child Loop BB0_62 Depth 3
                                        ;         Child Loop BB0_63 Depth 4
                                        ;         Child Loop BB0_69 Depth 4
                                        ;       Child Loop BB0_77 Depth 3
                                        ;       Child Loop BB0_83 Depth 3
                                        ;       Child Loop BB0_87 Depth 3
                                        ;       Child Loop BB0_93 Depth 3
                                        ;       Child Loop BB0_97 Depth 3
                                        ;       Child Loop BB0_103 Depth 3
	v_mov_b32_e32 v6, 0
	s_mov_b32 s6, 0
	s_mov_b32 s10, 0
                                        ; implicit-def: $sgpr8
                                        ; implicit-def: $sgpr9
                                        ; implicit-def: $sgpr7
                                        ; implicit-def: $sgpr11
.LBB0_5:                                ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_6 Depth 4
                                        ;         Child Loop BB0_12 Depth 4
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v29, v8, v6, v38
	v_fma_f32 v30, v35, v6, v37
	v_mov_b32_e32 v7, 0x4e6e6b28
	s_mov_b32 s4, -4
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@lo+16
	s_addc_u32 s3, s3, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@hi+24
.LBB0_6:                                ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_add_u32 s12, s2, -12
	s_addc_u32 s13, s3, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_max_f32_e32 v7, v7, v7
	s_load_b128 s[28:31], s[12:13], 0x0
	s_add_i32 s4, s4, 4
	s_add_u32 s2, s2, 16
	s_addc_u32 s3, s3, 0
	s_cmp_gt_u32 s4, 35
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v2, s29, 0.5
	v_mul_f32_e64 v31, s28, 0.5
	v_fma_f32 v40, s29, 0.5, -v30
	v_fma_f32 v42, s28, 0.5, -v29
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v41, s31, 0.5, -v2
	v_fma_f32 v43, s30, 0.5, -v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v40, v40, v41
	v_mul_f32_e32 v44, v41, v41
	v_fmac_f32_e32 v40, v42, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v44, v43, v43
	v_add_f32_e32 v40, 0, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v42, null, v44, v44, v40
	v_rcp_f32_e32 v45, v42
	s_waitcnt_depctr 0xfff
	v_fma_f32 v46, -v42, v45, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v45, v46, v45
	v_div_scale_f32 v47, vcc_lo, v40, v44, v40
	v_mul_f32_e32 v46, v47, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v48, -v42, v46, v47
	v_fmac_f32_e32 v46, v48, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v42, -v42, v46, v47
	v_div_fmas_f32 v42, v42, v45, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v40, v42, v44, v40
	v_min_f32_e32 v40, 0, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_f32_e64 v40, -v40, 1.0
	v_fmac_f32_e32 v2, v41, v40
	v_fmac_f32_e32 v31, v43, v40
	v_fma_f32 v40, v40, 0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v2, v30, v2 :: v_dual_sub_f32 v31, v29, v31
	v_sub_f32_e32 v40, 0, v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v2, v2
	v_fmac_f32_e32 v2, v31, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v40, v40
	v_min_f32_e32 v7, v7, v2
	s_cbranch_scc0 .LBB0_6
; %bb.7:                                ;   in Loop: Header=BB0_5 Depth=3
	v_cmp_nlt_f32_e64 s2, 0x41000000, |v29|
                                        ; implicit-def: $vgpr2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_xor_b32 s2, exec_lo, s3
; %bb.8:                                ;   in Loop: Header=BB0_5 Depth=3
	v_cmp_neq_f32_e64 s3, 0x41000000, |v29|
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v2, 0, |v29|, s3
; %bb.9:                                ; %Flow768
                                        ;   in Loop: Header=BB0_5 Depth=3
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB0_15
; %bb.10:                               ;   in Loop: Header=BB0_5 Depth=3
	v_frexp_exp_i32_f32_e32 v40, v29
	v_frexp_mant_f32_e64 v2, |v29|
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v31, -4, v40
	v_ldexp_f32 v2, v2, 12
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_lt_i32_e32 12, v31
	s_cbranch_execz .LBB0_14
; %bb.11:                               ; %.preheader.i.i.i.i.i.preheader
                                        ;   in Loop: Header=BB0_5 Depth=3
	v_add_nc_u32_e32 v31, 8, v40
	s_mov_b32 s4, 0
.LBB0_12:                               ; %.preheader.i.i.i.i.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v40, v2
	v_sub_f32_e32 v2, v2, v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v40, v31
	v_cmp_gt_f32_e32 vcc_lo, 0, v2
	v_cndmask_b32_e64 v41, 0x80000000, 1.0, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v2, v2, v41 :: v_dual_add_nc_u32 v31, -12, v40
	v_cmp_gt_u32_e32 vcc_lo, 25, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ldexp_f32 v2, v2, 12
	s_or_b32 s4, vcc_lo, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_12
; %bb.13:                               ; %Flow766
                                        ;   in Loop: Header=BB0_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s4
	v_subrev_nc_u32_e32 v31, 24, v40
.LBB0_14:                               ; %Flow767
                                        ;   in Loop: Header=BB0_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v31, -11, v31
	v_and_b32_e32 v40, 0x7fffffff, v29
	v_ldexp_f32 v2, v2, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v31, v2
	v_sub_f32_e32 v2, v2, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0, v2
	v_cndmask_b32_e64 v31, 0x80000000, 1.0, vcc_lo
	v_dual_add_f32 v2, v2, v31 :: v_dual_and_b32 v31, 0x80000000, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v2, v2, 3
	v_xor_b32_e32 v2, v31, v2
.LBB0_15:                               ; %Flow769
                                        ;   in Loop: Header=BB0_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v7
	v_mul_f32_e32 v31, 0x4f800000, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v31, vcc_lo
	v_sqrt_f32_e32 v31, v7
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v40, -1, v31
	v_add_nc_u32_e32 v41, 1, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v42, -v40, v31, v7
	v_fma_f32 v43, -v41, v31, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v42
	v_cndmask_b32_e64 v40, v31, v40, s2
	v_fma_f32 v31, v36, v6, v39
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e64 s2, 0, v43
	v_cmp_eq_f32_e64 s3, 0, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v40, v40, v41, s2
	v_frexp_mant_f32_e64 v41, |v31|
	v_cmp_class_f32_e64 s12, v31, 0x204
	v_mul_f32_e32 v42, 0x37800000, v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f32_e64 s2, 0x3f2aaaab, v41
	v_cndmask_b32_e32 v40, v40, v42, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v43, 0, 1, s2
	v_cmp_class_f32_e64 vcc_lo, v7, 0x260
	v_ldexp_f32 v41, v41, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v7, v40, v7 :: v_dual_add_f32 v40, 1.0, v41
	v_frexp_mant_f32_e64 v42, |v7|
	v_add_f32_e32 v45, -1.0, v41
	v_cmp_eq_f32_e64 s5, 0, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f32_e32 v43, v40
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v42
	v_add_f32_e32 v47, -1.0, v40
	v_cndmask_b32_e64 v44, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v41, v41, v47
	v_ldexp_f32 v42, v42, v44
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v44, v45, v43
	v_add_f32_e32 v46, 1.0, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v48, v40, v44
	v_rcp_f32_e32 v49, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v40, v44, v40, -v48
	v_dual_add_f32 v47, -1.0, v42 :: v_dual_fmac_f32 v40, v44, v41
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v41, v47, v49 :: v_dual_add_f32 v50, v48, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v51, -1.0, v46 :: v_dual_mul_f32 v52, v46, v41
	v_dual_sub_f32 v53, v45, v50 :: v_dual_sub_f32 v42, v42, v51
	v_sub_f32_e32 v48, v50, v48
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v46, v41, v46, -v52
	v_dual_sub_f32 v45, v45, v53 :: v_dual_sub_f32 v40, v48, v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v46, v41, v42
	v_sub_f32_e32 v42, v45, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v40, v40, v42
	v_dual_add_f32 v45, v52, v46 :: v_dual_add_f32 v40, v53, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v48, v45, v52
	v_sub_f32_e32 v42, v47, v45
	v_mul_f32_e32 v40, v43, v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v47, v47, v42
	v_sub_f32_e32 v45, v47, v45
	v_sub_f32_e32 v43, v48, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v43, v43, v45
	v_add_f32_e32 v42, v42, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v42, v49, v42
	v_add_f32_e32 v47, v41, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v41, v47, v41 :: v_dual_add_f32 v46, v44, v40
	v_dual_sub_f32 v41, v42, v41 :: v_dual_mul_f32 v48, v47, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v43, v46, v46 :: v_dual_add_f32 v50, v41, v41
	v_fma_f32 v49, v47, v47, -v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v44, v46, v44 :: v_dual_fmac_f32 v49, v47, v50
	v_sub_f32_e32 v40, v40, v44
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v44, v46, v46, -v43
	v_add_f32_e32 v51, v48, v49
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v45, v40, v40
	v_fmac_f32_e32 v44, v46, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v45, v43, v44
	v_dual_sub_f32 v43, v45, v43 :: v_dual_fmaak_f32 v42, s18, v45, 0x3e91f4c4
	v_mul_f32_e32 v55, v46, v45
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v43, v44, v43 :: v_dual_fmaak_f32 v42, v45, v42, 0x3ecccdef
	v_fma_f32 v56, v45, v46, -v55
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v50, v45, v42
	v_fmac_f32_e32 v56, v45, v40
	v_ldexp_f32 v40, v40, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v44, v45, v42, -v50
	v_fmac_f32_e32 v56, v43, v46
	v_ldexp_f32 v46, v46, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v44, v43, v42
	v_fmaak_f32 v52, s18, v51, 0x3e91f4c4
	v_sub_f32_e32 v48, v51, v48
	v_add_f32_e32 v58, v55, v56
	v_fmaak_f32 v42, v51, v52, 0x3ecccdef
	v_add_f32_e32 v52, v50, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v48, v49, v48 :: v_dual_mul_f32 v53, v51, v42
	v_add_f32_e32 v54, 0x3f2aaaaa, v52
	v_sub_f32_e32 v50, v52, v50
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v49, v51, v42, -v53
	v_sub_f32_e32 v44, v44, v50
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v50, 0xbf2aaaaa, v54
	v_fmac_f32_e32 v49, v48, v42
	v_frexp_exp_i32_f32_e32 v42, v31
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v50, v52, v50
	v_add_f32_e32 v52, v53, v49
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_subrev_co_ci_u32_e64 v42, s2, 0, v42, s2
	v_sub_f32_e32 v45, v52, v53
	v_dual_mul_f32 v53, v47, v51 :: v_dual_add_f32 v44, 0x31739010, v44
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f32_i32_e32 v42, v42
	v_sub_f32_e32 v45, v49, v45
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v57, v51, v47, -v53
	v_add_f32_e32 v44, v44, v50
	v_add_f32_e32 v50, 0x3f2aaaaa, v52
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v45, 0x31739010, v45
	v_fmac_f32_e32 v57, v51, v41
	v_ldexp_f32 v41, v41, 1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v49, 0xbf2aaaaa, v50
	v_sub_f32_e32 v49, v52, v49
	v_add_f32_e32 v43, v54, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v52, v58, v55 :: v_dual_add_f32 v45, v45, v49
	v_dual_sub_f32 v54, v54, v43 :: v_dual_sub_f32 v49, v56, v52
	v_frexp_exp_i32_f32_e32 v56, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v52, v50, v45
	v_add_f32_e32 v44, v44, v54
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v50, v50, v52
	v_add_f32_e32 v45, v45, v50
	v_mul_f32_e32 v51, v58, v43
	v_fmac_f32_e32 v57, v48, v47
	v_ldexp_f32 v47, v47, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v48, v58, v43, -v51
	v_fmac_f32_e32 v48, v58, v44
	v_mul_f32_e32 v44, 0x3f317218, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v48, v49, v43
	v_fma_f32 v43, 0x3f317218, v42, -v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v43, 0xb102e308, v42 :: v_dual_add_f32 v54, v53, v57
	v_mul_f32_e32 v55, v54, v52
	v_sub_f32_e32 v49, v54, v53
	v_add_f32_e32 v53, v51, v48
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v50, v54, v52, -v55
	v_sub_f32_e32 v49, v57, v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v50, v54, v45
	v_subrev_co_ci_u32_e32 v54, vcc_lo, 0, v56, vcc_lo
	v_sub_f32_e32 v45, v53, v51
	v_dual_add_f32 v51, v46, v53 :: v_dual_fmac_f32 v50, v49, v52
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cvt_f32_i32_e32 v49, v54
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v31
	v_sub_f32_e32 v45, v48, v45
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v52, 0x3f317218, v49
	v_sub_f32_e32 v46, v51, v46
	v_add_f32_e32 v40, v40, v45
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v46, v53, v46
	v_fma_f32 v53, 0x3f317218, v49, -v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_add_f32 v40, v40, v46 :: v_dual_fmac_f32 v53, 0xb102e308, v49
	v_add_f32_e32 v48, v55, v50
	v_dual_sub_f32 v45, v48, v55 :: v_dual_add_f32 v42, v47, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v45, v50, v45 :: v_dual_add_f32 v50, v51, v40
	v_dual_sub_f32 v46, v42, v47 :: v_dual_add_f32 v41, v41, v45
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v49, v50, v51
	v_add_f32_e32 v47, v44, v43
	v_dual_sub_f32 v40, v40, v49 :: v_dual_add_f32 v45, v47, v50
	v_sub_f32_e32 v44, v47, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v43, v43, v44 :: v_dual_sub_f32 v46, v48, v46
	v_dual_add_f32 v48, v52, v53 :: v_dual_add_f32 v41, v41, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v46, v45, v47 :: v_dual_sub_f32 v49, v48, v52
	v_dual_add_f32 v51, v42, v41 :: v_dual_sub_f32 v54, v45, v46
	v_sub_f32_e32 v46, v50, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v47, v47, v54
	v_dual_add_f32 v46, v46, v47 :: v_dual_sub_f32 v47, v53, v49
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v44, v48, v51
	v_sub_f32_e32 v50, v44, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v49, v44, v50
	v_sub_f32_e32 v42, v51, v42
	v_dual_sub_f32 v48, v48, v49 :: v_dual_sub_f32 v41, v41, v42
	v_sub_f32_e32 v42, v51, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v51, v47, v41 :: v_dual_add_f32 v42, v42, v48
	v_sub_f32_e32 v48, v51, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_add_f32 v42, v51, v42 :: v_dual_sub_f32 v41, v41, v48
	v_add_f32_e32 v52, v43, v40
	v_sub_f32_e32 v53, v52, v43
	v_add_f32_e32 v46, v52, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v49, v52, v53 :: v_dual_add_f32 v50, v45, v46
	v_sub_f32_e32 v40, v40, v53
	v_sub_f32_e32 v43, v43, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v45, v50, v45 :: v_dual_add_f32 v40, v40, v43
	v_sub_f32_e32 v43, v46, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v45, v51, v48 :: v_dual_add_f32 v40, v40, v43
	v_dual_sub_f32 v43, v47, v45 :: v_dual_add_f32 v46, v44, v42
	v_cndmask_b32_e64 v45, 0x41000000, 1.0, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v47, v50, v40
	v_dual_add_f32 v41, v41, v43 :: v_dual_sub_f32 v44, v46, v44
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v52, 0.5, v45
	v_trunc_f32_e32 v55, v45
	v_dual_sub_f32 v43, v47, v50 :: v_dual_sub_f32 v42, v42, v44
	v_mul_f32_e32 v44, v45, v47
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_trunc_f32_e32 v56, v52
	v_dual_sub_f32 v40, v40, v43 :: v_dual_add_f32 v41, v41, v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f32 v42, v45, v47, -v44
	v_cndmask_b32_e64 v47, 0x41000000, 1.0, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v44, 0x204
	v_cmp_neq_f32_e64 s2, v56, v52
	v_dual_add_f32 v43, v46, v41 :: v_dual_fmac_f32 v42, v45, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v40, v43, v46
	v_mul_f32_e32 v46, v47, v43
	v_add_f32_e32 v48, v44, v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v40, v41, v40
	v_fma_f32 v41, v47, v43, -v46
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v43, v48, v44, vcc_lo
	v_sub_f32_e32 v44, v48, v44
	v_trunc_f32_e32 v48, v47
	v_fmac_f32_e32 v41, v47, v40
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v43
	v_sub_f32_e32 v42, v42, v44
	v_cmp_neq_f32_e64 s4, 0x7f800000, |v43|
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f32_e32 v49, v46, v41
	v_cndmask_b32_e64 v40, 0, 0x37000000, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v46, 0x204
	v_cndmask_b32_e64 v42, 0, v42, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v50, v43, v40 :: v_dual_cndmask_b32 v51, v49, v46
	v_sub_f32_e32 v43, v49, v46
	v_add_f32_e32 v40, v40, v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v53, 0x3fb8aa3b, v50
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v51
	v_cmp_ngt_f32_e64 s4, 0xc2ce8ed0, v50
	v_sub_f32_e32 v41, v41, v43
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f32 v57, 0x3fb8aa3b, v50, -v53
	v_cndmask_b32_e64 v54, 0, 0x37000000, vcc_lo
	v_rndne_f32_e32 v58, v53
	v_cmp_eq_f32_e32 vcc_lo, v55, v45
	v_fmac_f32_e32 v57, 0x32a5705f, v50
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v59, v51, v54
	v_sub_f32_e32 v45, v53, v58
	v_cvt_i32_f32_e32 v58, v58
	s_and_b32 s2, vcc_lo, s2
	v_cndmask_b32_e64 v53, 0x7f800000, 0, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v52, 0x3fb8aa3b, v59 :: v_dual_add_f32 v45, v45, v57
	v_cndmask_b32_e64 v55, 1.0, v31, s2
	v_cndmask_b32_e64 v60, 0, v31, s2
	v_cmp_eq_f32_e64 s2, v48, v47
	v_fma_f32 v56, 0x3fb8aa3b, v59, -v52
	v_rndne_f32_e32 v57, v52
	v_exp_f32_e32 v45, v45
	v_bfi_b32 v53, 0x7fffffff, v53, v60
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v56, 0x32a5705f, v59
	v_sub_f32_e32 v52, v52, v57
	v_cvt_i32_f32_e32 v46, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_dual_add_f32 v57, 0x41f00000, v31 :: v_dual_add_f32 v52, v52, v56
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v44, v45, v58
	v_mul_f32_e32 v56, 0.5, v47
	v_exp_f32_e32 v45, v52
	v_cndmask_b32_e64 v44, 0, v44, s4
	v_cmp_nlt_f32_e64 s4, 0x42b17218, v50
	v_add_f32_e32 v50, 0x41f00000, v29
	v_sub_f32_e32 v52, 0x41f00000, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
	v_cndmask_b32_e64 v42, 0x7f800000, v44, s4
	v_cmp_neq_f32_e64 s4, 0x7f800000, |v51|
	v_trunc_f32_e32 v44, v56
	v_ldexp_f32 v43, v45, v46
	v_add_f32_e32 v51, 0.5, v30
	v_fma_f32 v40, v42, v40, v42
	v_cndmask_b32_e64 v41, 0, v41, s4
	v_cmp_ngt_f32_e64 s4, 0xc2ce8ed0, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v41, v54, v41
	v_cndmask_b32_e64 v43, 0, v43, s4
	v_cmp_eq_f32_e64 s4, 0x7f800000, v42
	v_add_f32_e32 v54, 0xc1880000, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v40, v40, v42, s4
	v_cmp_nlt_f32_e64 s4, 0x42b17218, v59
	v_bfi_b32 v40, 0x7fffffff, v40, v55
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v42, 0x7f800000, v43, s4
	v_cmp_neq_f32_e64 s4, v44, v56
	v_cndmask_b32_e64 v43, 0x7f800000, 0, s5
	v_sub_f32_e32 v55, 0x41c80000, v29
	v_cndmask_b32_e32 v46, 0x7fc00000, v40, vcc_lo
	v_fma_f32 v41, v42, v41, v42
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v42
	s_and_b32 s2, s2, s4
	v_sub_f32_e32 v56, 0x41a00000, v30
	v_cndmask_b32_e64 v44, 1.0, v7, s2
	v_cndmask_b32_e64 v45, 0, v7, s2
	v_cndmask_b32_e32 v41, v41, v42, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v31
	v_cmp_class_f32_e64 s2, v7, 0x204
	s_mov_b32 s4, -1
	v_bfi_b32 v42, 0x7fffffff, v43, v45
	v_bfi_b32 v41, 0x7fffffff, v41, v44
	v_cndmask_b32_e32 v40, v40, v46, vcc_lo
	s_or_b32 vcc_lo, s3, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v40, v40, v53, vcc_lo
	s_or_b32 vcc_lo, s5, s2
	v_add_f32_e32 v53, 0x41c80000, v29
	v_cndmask_b32_e32 v41, v41, v42, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v31, v31
	v_cndmask_b32_e32 v40, 0x7fc00000, v40, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v7, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, 0x7fc00000, v41, vcc_lo
	v_add_f32_e32 v7, v40, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f32_e64 v40, |v7|
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v40
	v_cndmask_b32_e64 v41, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v40, v40, v41
	v_add_f32_e32 v41, 1.0, v40
	v_add_f32_e32 v43, -1.0, v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v42, v41
	v_add_f32_e32 v45, -1.0, v41
	v_sub_f32_e32 v40, v40, v45
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v44, v43, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v46, v41, v44
	v_fma_f32 v41, v44, v41, -v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v41, v44, v40
	v_add_f32_e32 v40, v46, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v45, v43, v40 :: v_dual_sub_f32 v46, v40, v46
	v_sub_f32_e32 v43, v43, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v41, v46, v41 :: v_dual_sub_f32 v40, v43, v40
	v_add_f32_e32 v40, v41, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v40, v45, v40
	v_mul_f32_e32 v40, v42, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v41, v44, v40
	v_sub_f32_e32 v42, v41, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v43, v41, v41 :: v_dual_sub_f32 v40, v40, v42
	v_fma_f32 v42, v41, v41, -v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v44, v40, v40
	v_fmac_f32_e32 v42, v41, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v44, v43, v42
	v_fmaak_f32 v45, s18, v44, 0x3e91f4c4
	v_dual_sub_f32 v43, v44, v43 :: v_dual_mul_f32 v48, v41, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v45, v44, v45, 0x3ecccdef
	v_fma_f32 v49, v44, v41, -v48
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v42, v42, v43
	v_mul_f32_e32 v46, v44, v45
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v49, v44, v40
	v_fma_f32 v43, v44, v45, -v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v49, v42, v41
	v_ldexp_f32 v41, v41, 1
	v_fmac_f32_e32 v43, v42, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v44, v48, v49 :: v_dual_add_f32 v45, v46, v43
	v_dual_sub_f32 v46, v45, v46 :: v_dual_add_f32 v47, 0x3f2aaaaa, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v43, v43, v46 :: v_dual_add_f32 v46, 0xbf2aaaaa, v47
	v_add_f32_e32 v43, 0x31739010, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v45, v45, v46
	v_add_f32_e32 v43, v43, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v42, v47, v43
	v_sub_f32_e32 v45, v47, v42
	v_mul_f32_e32 v46, v44, v42
	v_sub_f32_e32 v47, v44, v48
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v43, v43, v45
	v_fma_f32 v45, v44, v42, -v46
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v47, v49, v47
	v_fmac_f32_e32 v45, v44, v43
	v_frexp_exp_i32_f32_e32 v43, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v45, v47, v42
	v_subrev_co_ci_u32_e32 v42, vcc_lo, 0, v43, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v43, v46, v45
	v_cvt_f32_i32_e32 v42, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v44, v41, v43
	v_sub_f32_e32 v46, v43, v46
	v_mul_f32_e32 v47, 0x3f317218, v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v41, v44, v41
	v_sub_f32_e32 v45, v45, v46
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v46, 0x3f317218, v42, -v47
	v_sub_f32_e32 v41, v43, v41
	v_ldexp_f32 v40, v40, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v46, 0xb102e308, v42
	v_add_f32_e32 v40, v40, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v40, v40, v41 :: v_dual_add_f32 v41, v47, v46
	v_dual_add_f32 v42, v44, v40 :: v_dual_sub_f32 v47, v41, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v43, v41, v42 :: v_dual_sub_f32 v44, v42, v44
	v_dual_sub_f32 v46, v46, v47 :: v_dual_sub_f32 v45, v43, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v40, v40, v44
	v_sub_f32_e32 v48, v43, v45
	v_sub_f32_e32 v42, v42, v45
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v44, v46, v40
	v_sub_f32_e32 v41, v41, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v41, v42, v41 :: v_dual_sub_f32 v42, v44, v46
	v_add_f32_e32 v41, v44, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v44, v44, v42
	v_dual_sub_f32 v40, v40, v42 :: v_dual_add_f32 v45, v43, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v42, v46, v44 :: v_dual_sub_f32 v43, v45, v43
	v_add_f32_e32 v40, v40, v42
	v_cndmask_b32_e64 v42, 0x3e000000, 1.0, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v41, v41, v43
	v_add_f32_e32 v40, v40, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v41, v45, v40
	v_sub_f32_e32 v43, v41, v45
	v_mul_f32_e32 v44, v42, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v40, v40, v43
	v_fma_f32 v41, v42, v41, -v44
	v_cmp_class_f32_e64 vcc_lo, v44, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v41, v42, v40
	v_add_f32_e32 v40, v44, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v43, v40, v44, vcc_lo
	v_sub_f32_e32 v40, v40, v44
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v40, v41, v40 :: v_dual_sub_f32 v41, 0x41f00000, v31
	v_cndmask_b32_e64 v45, 0, 0x37000000, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v29, 0x1f8
	v_min_f32_e32 v41, v57, v41
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v46, v43, v45
	v_cndmask_b32_e32 v2, 0x7fc00000, v2, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v43|
	v_dual_mul_f32 v47, 0x3fb8aa3b, v46 :: v_dual_cndmask_b32 v40, 0, v40
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v48, 0x3fb8aa3b, v46, -v47
	v_rndne_f32_e32 v49, v47
	v_dual_add_f32 v40, v45, v40 :: v_dual_add_f32 v45, 0x41c80000, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v48, 0x32a5705f, v46 :: v_dual_sub_f32 v47, v47, v49
	v_cvt_i32_f32_e32 v44, v49
	v_add_f32_e32 v49, 0xc1940000, v30
	v_dual_add_f32 v47, v47, v48 :: v_dual_sub_f32 v48, 0x41900000, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v47, v47
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v44, v47, v44
	v_mul_f32_e32 v47, 0.5, v42
	v_cndmask_b32_e32 v43, 0, v44, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v46
	v_trunc_f32_e32 v44, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_trunc_f32_e32 v58, v47
	v_cndmask_b32_e32 v43, 0x7f800000, v43, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_f32_e32 vcc_lo, v44, v42
	v_cmp_neq_f32_e64 s2, v58, v47
	v_min_f32_e32 v42, v50, v52
	v_min_f32_e32 v44, v51, v48
	v_fma_f32 v40, v43, v40, v43
	v_cmp_eq_f32_e64 s3, 0x7f800000, v43
	s_and_b32 s2, vcc_lo, s2
	v_add_f32_e32 v48, 0xbfc00000, v2
	v_cndmask_b32_e64 v46, 1.0, v7, s2
	v_cndmask_b32_e64 v50, 0, v7, s2
	v_cndmask_b32_e64 v40, v40, v43, s3
	v_cmp_eq_f32_e64 s3, 0, v7
	v_cmp_class_f32_e64 s2, v7, 0x204
	v_sub_f32_e32 v2, 0x40d00000, v2
	v_sub_f32_e32 v43, 0x41c80000, v31
	v_bfi_b32 v40, 0x7fffffff, v40, v46
	v_cndmask_b32_e64 v46, 0x7f800000, 0, s3
	v_min_f32_e32 v47, v53, v55
	v_min_f32_e32 v51, v54, v56
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_min_f32 v43, v45, v43 :: v_dual_cndmask_b32 v52, 0x7fc00000, v40
	v_cmp_gt_f32_e32 vcc_lo, 0, v7
	v_bfi_b32 v46, 0x7fffffff, v46, v50
	v_min3_f32 v41, v42, v44, v41
	v_min3_f32 v42, v47, v51, v43
	v_cndmask_b32_e32 v40, v40, v52, vcc_lo
	s_or_b32 vcc_lo, s3, s2
	s_cmpk_lt_u32 s10, 0x63
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v40, v40, v46, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v7, v7
	s_or_b32 s11, s11, exec_lo
	v_add_f32_e32 v40, -0.5, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_min_f32 v2, v48, v2 :: v_dual_cndmask_b32 v7, 0x7fc00000, v40
	v_max3_f32 v2, -v2, -v49, -v56
	v_sub_f32_e32 v40, 0x419f3333, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_f32_e64 v2, v2, -v43
	v_maxmin_f32 v2, v41, v42, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, v2, v7
	v_cndmask_b32_e64 v2, v7, v2, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e32 vcc_lo, v40, v2
	v_cndmask_b32_e32 v2, v2, v40, vcc_lo
	v_cmp_ngt_f32_e64 s3, 0x3c23d70a, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s3, s5
                                        ; implicit-def: $sgpr5
	s_and_saveexec_b32 s12, s3
; %bb.16:                               ;   in Loop: Header=BB0_5 Depth=3
	v_add_f32_e32 v6, v6, v2
	s_add_i32 s10, s10, 1
	s_mov_b32 s5, 0
	s_and_not1_b32 s11, s11, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ngt_f32_e64 s3, 0x42c80000, v6
	s_or_not1_b32 s4, s3, exec_lo
; %bb.17:                               ; %Flow770
                                        ;   in Loop: Header=BB0_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s3, exec_lo, s4
	v_mov_b32_e32 v49, s5
	s_or_b32 s6, s3, s6
	s_and_not1_b32 s3, s7, exec_lo
	s_and_b32 s4, s11, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_or_b32 s7, s3, s4
	s_and_not1_b32 s3, s9, exec_lo
	s_and_not1_b32 s4, s8, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_or_b32 s9, s3, s2
	s_or_b32 s8, s4, s5
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_5
; %bb.18:                               ; %loop.exit.guard716
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s2, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s10, exec_lo, s2
	s_cbranch_execz .LBB0_50
; %bb.19:                               ;   in Loop: Header=BB0_4 Depth=2
	v_dual_add_f32 v7, 0x3c23d70a, v29 :: v_dual_add_f32 v6, 0, v30
	v_mov_b32_e32 v41, 0x4e6e6b28
	s_mov_b32 s4, -4
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@lo+16
	s_addc_u32 s3, s3, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@hi+24
.LBB0_20:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_u32 s6, s2, -12
	s_addc_u32 s7, s3, -1
	s_add_i32 s4, s4, 4
	s_load_b128 s[28:31], s[6:7], 0x0
	s_add_u32 s2, s2, 16
	s_addc_u32 s3, s3, 0
	s_cmp_gt_u32 s4, 35
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v32, s29, 0.5
	v_mul_f32_e64 v33, s28, 0.5
	v_fma_f32 v34, s29, 0.5, -v6
	v_fma_f32 v38, s28, 0.5, -v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v37, s31, 0.5, -v32
	v_fma_f32 v39, s30, 0.5, -v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v34, v34, v37
	v_mul_f32_e32 v40, v37, v37
	v_fmac_f32_e32 v34, v38, v39
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v40, v39, v39
	v_add_f32_e32 v34, 0, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v38, null, v40, v40, v34
	v_div_scale_f32 v44, vcc_lo, v34, v40, v34
	v_rcp_f32_e32 v42, v38
	s_waitcnt_depctr 0xfff
	v_fma_f32 v43, -v38, v42, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v42, v43, v42
	v_mul_f32_e32 v43, v44, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v45, -v38, v43, v44
	v_fmac_f32_e32 v43, v45, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v38, -v38, v43, v44
	v_div_fmas_f32 v38, v38, v42, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v34, v38, v40, v34
	v_min_f32_e32 v34, 0, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_f32_e64 v34, -v34, 1.0
	v_fmac_f32_e32 v32, v37, v34
	v_fmac_f32_e32 v33, v39, v34
	v_fma_f32 v34, v34, 0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v32, v6, v32 :: v_dual_sub_f32 v33, v7, v33
	v_sub_f32_e32 v34, 0, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v32, v32, v32
	v_fmac_f32_e32 v32, v33, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_max_f32 v33, v41, v41 :: v_dual_fmac_f32 v32, v34, v34
	v_min_f32_e32 v41, v33, v32
	s_cbranch_scc0 .LBB0_20
; %bb.21:                               ;   in Loop: Header=BB0_4 Depth=2
	v_cmp_nlt_f32_e64 s2, 0x41000000, |v7|
                                        ; implicit-def: $vgpr32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_xor_b32 s2, exec_lo, s3
; %bb.22:                               ;   in Loop: Header=BB0_4 Depth=2
	v_cmp_neq_f32_e64 s3, 0x41000000, |v7|
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v32, 0, |v7|, s3
; %bb.23:                               ; %Flow763
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB0_29
; %bb.24:                               ;   in Loop: Header=BB0_4 Depth=2
	v_frexp_exp_i32_f32_e32 v34, v7
	v_frexp_mant_f32_e64 v32, |v7|
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v33, -4, v34
	v_ldexp_f32 v32, v32, 12
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_lt_i32_e32 12, v33
	s_cbranch_execz .LBB0_28
; %bb.25:                               ; %.preheader.i.i.i41.i.i.preheader
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v33, 8, v34
	s_mov_b32 s4, 0
.LBB0_26:                               ; %.preheader.i.i.i41.i.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v34, v32
	v_sub_f32_e32 v32, v32, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v34, v33
	v_cmp_gt_f32_e32 vcc_lo, 0, v32
	v_cndmask_b32_e64 v37, 0x80000000, 1.0, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v32, v32, v37 :: v_dual_add_nc_u32 v33, -12, v34
	v_cmp_gt_u32_e32 vcc_lo, 25, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ldexp_f32 v32, v32, 12
	s_or_b32 s4, vcc_lo, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_26
; %bb.27:                               ; %Flow761
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	v_subrev_nc_u32_e32 v33, 24, v34
.LBB0_28:                               ; %Flow762
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v33, -11, v33
	v_and_b32_e32 v34, 0x7fffffff, v7
	v_ldexp_f32 v32, v32, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v33, v32
	v_sub_f32_e32 v32, v32, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0, v32
	v_cndmask_b32_e64 v33, 0x80000000, 1.0, vcc_lo
	v_dual_add_f32 v32, v32, v33 :: v_dual_and_b32 v33, 0x80000000, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v32, v32, 3
	v_xor_b32_e32 v32, v33, v32
.LBB0_29:                               ; %Flow764
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_dual_add_f32 v34, 0, v29 :: v_dual_add_f32 v33, 0x3c23d70a, v30
	v_mov_b32_e32 v39, 0x4e6e6b28
	s_mov_b32 s4, -4
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@lo+16
	s_addc_u32 s3, s3, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@hi+24
.LBB0_30:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_u32 s6, s2, -12
	s_addc_u32 s7, s3, -1
	s_add_i32 s4, s4, 4
	s_load_b128 s[28:31], s[6:7], 0x0
	s_add_u32 s2, s2, 16
	s_addc_u32 s3, s3, 0
	s_cmp_gt_u32 s4, 35
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v37, s29, 0.5
	v_mul_f32_e64 v38, s28, 0.5
	v_fma_f32 v40, s29, 0.5, -v33
	v_fma_f32 v43, s28, 0.5, -v34
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v42, s31, 0.5, -v37
	v_fma_f32 v44, s30, 0.5, -v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v40, v40, v42
	v_dual_mul_f32 v45, v42, v42 :: v_dual_fmac_f32 v40, v43, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v45, v44, v44
	v_add_f32_e32 v40, 0, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v43, null, v45, v45, v40
	v_rcp_f32_e32 v46, v43
	s_waitcnt_depctr 0xfff
	v_fma_f32 v47, -v43, v46, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v46, v47, v46
	v_div_scale_f32 v48, vcc_lo, v40, v45, v40
	v_mul_f32_e32 v47, v48, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v49, -v43, v47, v48
	v_fmac_f32_e32 v47, v49, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v43, -v43, v47, v48
	v_div_fmas_f32 v43, v43, v46, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v40, v43, v45, v40
	v_min_f32_e32 v40, 0, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_f32_e64 v40, -v40, 1.0
	v_fmac_f32_e32 v37, v42, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v37, v33, v37 :: v_dual_fmac_f32 v38, v44, v40
	v_fma_f32 v40, v40, 0, 0
	v_dual_mul_f32 v37, v37, v37 :: v_dual_sub_f32 v40, 0, v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v38, v34, v38
	v_dual_fmac_f32 v37, v38, v38 :: v_dual_max_f32 v38, v39, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v37, v40, v40
	v_min_f32_e32 v39, v38, v37
	s_cbranch_scc0 .LBB0_30
; %bb.31:                               ;   in Loop: Header=BB0_4 Depth=2
	v_cmp_nlt_f32_e64 s4, 0x41000000, |v34|
                                        ; implicit-def: $vgpr37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s4
	s_xor_b32 s2, exec_lo, s2
; %bb.32:                               ;   in Loop: Header=BB0_4 Depth=2
	v_cmp_neq_f32_e64 s3, 0x41000000, |v34|
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v37, 0, |v34|, s3
; %bb.33:                               ; %Flow759
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_saveexec_b32 s2, s2
	v_frexp_mant_f32_e64 v42, |v34|
	v_frexp_exp_i32_f32_e32 v45, v34
	v_and_b32_e32 v40, 0x7fffffff, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f32 v43, v42, 12
	v_add_nc_u32_e32 v44, -4, v45
	s_xor_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_39
; %bb.34:                               ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v38, -4, v45
	v_ldexp_f32 v37, v42, 12
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_lt_i32_e32 12, v38
	s_cbranch_execz .LBB0_38
; %bb.35:                               ; %.preheader.i.i.i57.i.i.preheader
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v38, 8, v45
	s_mov_b32 s5, 0
.LBB0_36:                               ; %.preheader.i.i.i57.i.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v42, v37
	v_dual_sub_f32 v37, v37, v42 :: v_dual_mov_b32 v42, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f32_e32 vcc_lo, 0, v37
	v_add_nc_u32_e32 v38, -12, v42
	v_cndmask_b32_e64 v46, 0x80000000, 1.0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, 25, v38
	v_add_f32_e32 v37, v37, v46
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f32 v37, v37, 12
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_36
; %bb.37:                               ; %Flow757
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	v_subrev_nc_u32_e32 v38, 24, v42
.LBB0_38:                               ; %Flow758
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v38, -11, v38
	v_ldexp_f32 v37, v37, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v38, v37
	v_sub_f32_e32 v37, v37, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0, v37
	v_cndmask_b32_e64 v38, 0x80000000, 1.0, vcc_lo
	v_dual_add_f32 v37, v37, v38 :: v_dual_and_b32 v38, 0x80000000, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v37, v37, 3
	v_xor_b32_e32 v37, v38, v37
.LBB0_39:                               ; %Flow760
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v42, 0x4e6e6b28
	s_mov_b32 s5, -4
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@lo+16
	s_addc_u32 s3, s3, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@hi+24
.LBB0_40:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_u32 s6, s2, -12
	s_addc_u32 s7, s3, -1
	s_add_i32 s5, s5, 4
	s_load_b128 s[28:31], s[6:7], 0x0
	s_add_u32 s2, s2, 16
	s_addc_u32 s3, s3, 0
	s_cmp_gt_u32 s5, 35
	v_max_f32_e32 v42, v42, v42
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v38, s29, 0.5
	v_mul_f32_e64 v46, s28, 0.5
	v_fma_f32 v47, s29, 0.5, -v6
	v_fma_f32 v49, s28, 0.5, -v34
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v48, s31, 0.5, -v38
	v_fma_f32 v50, s30, 0.5, -v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v47, v47, v48
	v_mul_f32_e32 v51, v48, v48
	v_fmac_f32_e32 v47, v49, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v51, v50, v50
	v_add_f32_e32 v47, 0, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v49, null, v51, v51, v47
	v_rcp_f32_e32 v52, v49
	s_waitcnt_depctr 0xfff
	v_fma_f32 v53, -v49, v52, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v52, v53, v52
	v_div_scale_f32 v54, vcc_lo, v47, v51, v47
	v_mul_f32_e32 v53, v54, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v55, -v49, v53, v54
	v_fmac_f32_e32 v53, v55, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v49, -v49, v53, v54
	v_div_fmas_f32 v49, v49, v52, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v47, v49, v51, v47
	v_min_f32_e32 v47, 0, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_f32_e64 v47, -v47, 1.0
	v_fmac_f32_e32 v38, v48, v47
	v_fmac_f32_e32 v46, v50, v47
	v_fma_f32 v47, v47, 0, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v38, v6, v38
	v_dual_sub_f32 v46, v34, v46 :: v_dual_sub_f32 v47, 0, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v38, v38, v38
	v_fmac_f32_e32 v38, v46, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v38, v47, v47
	v_min_f32_e32 v42, v42, v38
	s_cbranch_scc0 .LBB0_40
; %bb.41:                               ;   in Loop: Header=BB0_4 Depth=2
                                        ; implicit-def: $vgpr38
	s_and_saveexec_b32 s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s2
; %bb.42:                               ;   in Loop: Header=BB0_4 Depth=2
	v_cmp_neq_f32_e64 s3, 0x41000000, |v34|
                                        ; implicit-def: $vgpr40
                                        ; implicit-def: $vgpr43
                                        ; implicit-def: $vgpr44
                                        ; implicit-def: $vgpr45
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v38, 0, |v34|, s3
; %bb.43:                               ; %Flow753
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB0_49
; %bb.44:                               ;   in Loop: Header=BB0_4 Depth=2
	s_mov_b32 s3, exec_lo
	v_cmpx_lt_i32_e32 12, v44
	s_cbranch_execz .LBB0_48
; %bb.45:                               ; %.preheader.i.i.i73.i.i.preheader
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v38, 8, v45
	s_mov_b32 s4, 0
.LBB0_46:                               ; %.preheader.i.i.i73.i.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v44, v43
	v_dual_sub_f32 v43, v43, v44 :: v_dual_mov_b32 v44, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0, v43
	v_cndmask_b32_e64 v45, 0x80000000, 1.0, vcc_lo
	v_dual_add_f32 v43, v43, v45 :: v_dual_add_nc_u32 v38, -12, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, 25, v38
	v_ldexp_f32 v43, v43, 12
	s_or_b32 s4, vcc_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_46
; %bb.47:                               ; %Flow751
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	v_subrev_nc_u32_e32 v44, 24, v44
.LBB0_48:                               ; %Flow752
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v38, -11, v44
	v_and_b32_e32 v40, 0x80000000, v40
	v_ldexp_f32 v38, v43, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v43, v38
	v_sub_f32_e32 v38, v38, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0, v38
	v_cndmask_b32_e64 v43, 0x80000000, 1.0, vcc_lo
	v_add_f32_e32 v38, v38, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v38, v38, 3
	v_xor_b32_e32 v38, v40, v38
.LBB0_49:                               ; %Flow754
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_mul_f32_e32 v40, 0x4f800000, v39
	v_cmp_gt_f32_e64 s2, 0xf800000, v39
	v_cmp_gt_f32_e64 s4, 0xf800000, v42
	v_cmp_gt_f32_e64 s5, 0xf800000, v41
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v43, v39, v40, s2
	v_sqrt_f32_e32 v40, v43
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v45, -1, v40
	v_add_nc_u32_e32 v47, 1, v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v46, -v45, v40, v43
	v_fma_f32 v48, -v47, v40, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_ge_f32_e32 vcc_lo, 0, v46
	v_add_f32_e32 v39, 0, v31
	v_cmp_lt_f32_e64 s3, 0, v48
	v_mul_f32_e32 v48, 0x4f800000, v41
	v_cndmask_b32_e32 v40, v40, v45, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_frexp_mant_f32_e64 v44, |v39|
	v_frexp_exp_i32_f32_e32 v51, v39
	v_cndmask_b32_e64 v41, v41, v48, s5
	v_cmp_class_f32_e64 s11, v39, 0x204
	v_cndmask_b32_e64 v45, v40, v47, s3
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v44
	v_mul_f32_e32 v47, 0x4f800000, v42
	v_cmp_eq_f32_e64 s3, 1.0, v39
	v_add_f32_e32 v40, 0x3c23d70a, v31
	v_cndmask_b32_e64 v46, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v42, v42, v47, s4
	v_cndmask_b32_e64 v50, 0x41000000, 1.0, s3
	v_cmp_class_f32_e64 s3, v43, 0x260
	v_subrev_co_ci_u32_e32 v51, vcc_lo, 0, v51, vcc_lo
	v_ldexp_f32 v44, v44, v46
	v_mul_f32_e32 v46, 0x37800000, v45
	v_trunc_f32_e32 v48, v50
	v_sqrt_f32_e32 v58, v42
	v_cvt_f32_i32_e32 v51, v51
	v_add_f32_e32 v47, -1.0, v44
	v_cndmask_b32_e64 v45, v45, v46, s2
	v_add_f32_e32 v52, 1.0, v44
	v_cmp_eq_f32_e64 s2, 0, v39
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v49, v45, v43, s3
	v_rcp_f32_e32 v46, v52
	v_frexp_mant_f32_e64 v43, |v40|
	v_frexp_exp_i32_f32_e32 v45, v40
	v_cmp_eq_f32_e64 s3, v48, v50
	v_frexp_mant_f32_e64 v54, |v49|
	v_cndmask_b32_e64 v53, 0x7f800000, 0, s2
	v_cmp_gt_f32_e64 s7, 0x3f2aaaab, v43
	v_cmp_class_f32_e64 s12, v49, 0x204
	s_or_b32 s2, s2, s11
	v_cmp_gt_f32_e64 s6, 0x3f2aaaab, v54
	v_mul_f32_e32 v55, v47, v46
	v_mul_f32_e32 v57, 0.5, v50
	v_subrev_co_ci_u32_e64 v45, vcc_lo, 0, v45, s7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v56, 0, 1, s6
	v_mul_f32_e32 v60, v52, v55
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_trunc_f32_e32 v48, v57
	v_cvt_f32_i32_e32 v45, v45
	v_add_nc_u32_e32 v66, 1, v58
	v_ldexp_f32 v54, v54, v56
	v_add_f32_e32 v59, -1.0, v52
	v_fma_f32 v52, v55, v52, -v60
	v_cndmask_b32_e64 v56, 0, 1, s7
	v_cmp_neq_f32_e32 vcc_lo, v48, v57
	v_add_f32_e32 v62, -1.0, v54
	v_dual_sub_f32 v44, v44, v59 :: v_dual_add_f32 v61, 1.0, v54
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_ldexp_f32 v43, v43, v56
	v_add_nc_u32_e32 v57, -1, v58
	v_sqrt_f32_e32 v59, v41
	v_fmac_f32_e32 v52, v55, v44
	v_rcp_f32_e32 v44, v61
	v_add_f32_e32 v64, -1.0, v61
	s_and_b32 vcc_lo, s3, vcc_lo
	v_fma_f32 v68, -v57, v58, v42
	v_add_f32_e32 v56, v60, v52
	v_fma_f32 v70, -v66, v58, v42
	v_cndmask_b32_e32 v67, 1.0, v39, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_sub_f32_e32 v63, v47, v56
	s_delay_alu instid0(TRANS32_DEP_1) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v48, v62, v44 :: v_dual_sub_f32 v47, v47, v63
	v_sub_f32_e32 v60, v56, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v65, v61, v48
	v_sub_f32_e32 v47, v47, v56
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v52, v60, v52
	v_fma_f32 v56, v48, v61, -v65
	v_add_f32_e32 v60, -1.0, v43
	v_dual_sub_f32 v54, v54, v64 :: v_dual_add_f32 v61, 1.0, v43
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v47, v52, v47
	v_fmac_f32_e32 v56, v48, v54
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v71, -1.0, v61 :: v_dual_add_nc_u32 v54, 1, v59
	v_add_f32_e32 v47, v63, v47
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v63, 0x3f317218, v51 :: v_dual_add_f32 v64, v65, v56
	v_rcp_f32_e32 v73, v61
	v_mul_f32_e32 v47, v46, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v69, v62, v64 :: v_dual_add_nc_u32 v52, -1, v59
	v_dual_sub_f32 v65, v64, v65 :: v_dual_add_f32 v72, v55, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v62, v62, v69
	v_sub_f32_e32 v56, v65, v56
	v_fma_f32 v65, -v54, v59, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v55, v72, v55 :: v_dual_mul_f32 v46, 0x3f317218, v45
	v_sub_f32_e32 v62, v62, v64
	v_mul_f32_e32 v74, v72, v72
	v_fma_f32 v64, -v52, v59, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v55, v47, v55
	v_dual_add_f32 v47, v56, v62 :: v_dual_cndmask_b32 v56, 0, v39
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f32 v75, v72, v72, -v74
	v_cmp_ge_f32_e32 vcc_lo, 0, v68
	v_fma_f32 v62, 0x3f317218, v51, -v63
	v_add_f32_e32 v69, v69, v47
	v_add_f32_e32 v76, v55, v55
	v_fma_f32 v47, 0x3f317218, v45, -v46
	v_dual_cndmask_b32 v57, v58, v57 :: v_dual_sub_f32 v58, v43, v71
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v43, v44, v69
	v_fmac_f32_e32 v75, v72, v76
	v_cmp_ge_f32_e32 vcc_lo, 0, v64
	v_fmac_f32_e32 v62, 0xb102e308, v51
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_add_f32 v51, v74, v75 :: v_dual_cndmask_b32 v44, v59, v52
	v_bfi_b32 v52, 0x7fffffff, v53, v56
	v_cmp_lt_f32_e32 vcc_lo, 0, v70
	v_add_f32_e32 v53, v48, v43
	v_fmaak_f32 v59, s18, v51, 0x3e91f4c4
	v_cndmask_b32_e32 v56, v57, v66, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v48, v53, v48
	v_cmp_lt_f32_e32 vcc_lo, 0, v65
	v_mul_f32_e32 v57, v60, v73
	v_dual_mul_f32 v64, v53, v53 :: v_dual_sub_f32 v65, v51, v74
	v_sub_f32_e32 v48, v43, v48
	v_dual_cndmask_b32 v44, v44, v54 :: v_dual_fmaak_f32 v43, v51, v59, 0x3ecccdef
	v_dual_mul_f32 v59, 0x37800000, v56 :: v_dual_add_f32 v54, v63, v62
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v66, v53, v53, -v64
	v_mul_f32_e32 v71, 0x37800000, v44
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v69, v51, v43
	v_cndmask_b32_e64 v56, v56, v59, s4
	v_dual_sub_f32 v63, v54, v63 :: v_dual_add_f32 v68, v48, v48
	v_sub_f32_e32 v65, v75, v65
	v_cndmask_b32_e64 v44, v44, v71, s5
	v_cmp_class_f32_e64 vcc_lo, v42, 0x260
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v62, v62, v63
	v_fmac_f32_e32 v66, v53, v68
	v_mul_f32_e32 v70, v61, v57
	v_fma_f32 v68, v51, v43, -v69
	v_cmp_eq_f32_e64 s4, 0, v49
	v_fma_f32 v59, v57, v61, -v70
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_add_f32 v61, v64, v66 :: v_dual_fmac_f32 v68, v65, v43
	v_cndmask_b32_e32 v43, v56, v42, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v41, 0x260
	v_fmaak_f32 v71, s18, v61, 0x3e91f4c4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v63, v72, v51 :: v_dual_add_f32 v74, v69, v68
	v_fmac_f32_e32 v59, v57, v58
	v_sub_f32_e32 v64, v61, v64
	v_fma_f32 v58, v51, v72, -v63
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v42, v74, v69
	v_fmaak_f32 v56, v61, v71, 0x3ecccdef
	v_dual_add_f32 v69, 0x3f2aaaaa, v74 :: v_dual_fmac_f32 v58, v51, v55
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v51, v68, v42
	v_dual_mul_f32 v71, v61, v56 :: v_dual_add_f32 v68, 0xbf2aaaaa, v69
	v_sub_f32_e32 v64, v66, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v42, v44, v41 :: v_dual_add_f32 v41, 0x31739010, v51
	v_fma_f32 v66, v61, v56, -v71
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v44, v74, v68
	v_ldexp_f32 v55, v55, 1
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v49
	v_fmac_f32_e32 v66, v64, v56
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f32_e32 v41, v41, v44
	v_fmac_f32_e32 v58, v65, v72
	v_ldexp_f32 v72, v72, 1
	v_cndmask_b32_e64 v51, 0x41000000, 1.0, vcc_lo
	v_add_f32_e32 v65, v71, v66
	v_frexp_exp_i32_f32_e32 v56, v49
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v43
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v71, v65, v71
	v_add_f32_e32 v75, 0x3f2aaaaa, v65
	v_add_f32_e32 v68, v69, v41
	v_sub_f32_e32 v66, v66, v71
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v74, v53, v61 :: v_dual_add_f32 v71, 0xbf2aaaaa, v75
	v_dual_add_f32 v44, v63, v58 :: v_dual_sub_f32 v69, v69, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v77, v61, v53, -v74
	v_dual_sub_f32 v65, v65, v71 :: v_dual_mul_f32 v76, v44, v68
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f32_e32 v41, v41, v69
	v_sub_f32_e32 v63, v44, v63
	v_fmac_f32_e32 v77, v61, v48
	v_add_f32_e32 v61, 0x31739010, v66
	v_fma_f32 v69, v44, v68, -v76
	v_ldexp_f32 v48, v48, 1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v58, v58, v63 :: v_dual_fmac_f32 v77, v64, v53
	v_ldexp_f32 v53, v53, 1
	v_fmac_f32_e32 v69, v44, v41
	v_add_f32_e32 v41, v61, v65
	v_cndmask_b32_e64 v44, 0x41000000, 1.0, vcc_lo
	v_add_f32_e32 v61, v74, v77
	v_subrev_co_ci_u32_e64 v56, vcc_lo, 0, v56, s6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v69, v58, v68 :: v_dual_add_f32 v58, v75, v41
	v_sub_f32_e32 v74, v61, v74
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f32_i32_e32 v56, v56
	v_frexp_mant_f32_e64 v63, |v43|
	v_frexp_exp_i32_f32_e32 v64, v43
	v_sub_f32_e32 v68, v75, v58
	v_sub_f32_e32 v74, v77, v74
	v_mul_f32_e32 v71, v61, v58
	v_cmp_gt_f32_e64 s5, 0x3f2aaaab, v63
	v_cndmask_b32_e64 v66, 0x7f800000, 0, s4
	v_add_f32_e32 v41, v41, v68
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v68, v61, v58, -v71
	v_fmac_f32_e32 v68, v61, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v65, v76, v69 :: v_dual_fmac_f32 v68, v74, v58
	v_dual_sub_f32 v75, v65, v76 :: v_dual_add_f32 v76, v72, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v69, v69, v75
	v_sub_f32_e32 v41, v76, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v55, v55, v69
	v_sub_f32_e32 v41, v65, v41
	v_frexp_mant_f32_e64 v65, |v42|
	v_trunc_f32_e32 v69, v51
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v41, v55, v41
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v65
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_f32_e64 s6, v69, v51
	v_add_f32_e32 v74, v76, v41
	v_dual_add_f32 v58, v71, v68 :: v_dual_add_f32 v61, v70, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_add_f32 v72, v53, v58 :: v_dual_sub_f32 v71, v58, v71
	v_mul_f32_e32 v77, 0.5, v51
	v_sub_f32_e32 v53, v72, v53
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v68, v68, v71 :: v_dual_add_f32 v71, v54, v74
	v_dual_sub_f32 v53, v58, v53 :: v_dual_add_f32 v48, v48, v68
	v_mul_f32_e32 v55, 0x3f317218, v56
	v_sub_f32_e32 v58, v74, v76
	v_cndmask_b32_e64 v68, 0, 1, s5
	v_subrev_co_ci_u32_e64 v64, s5, 0, v64, s5
	v_add_f32_e32 v48, v48, v53
	v_fma_f32 v75, 0x3f317218, v56, -v55
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f32 v63, v63, v68
	v_dual_fmac_f32 v75, 0xb102e308, v56 :: v_dual_sub_f32 v56, v71, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v53, v71, v56
	v_dual_sub_f32 v56, v74, v56 :: v_dual_sub_f32 v41, v41, v58
	v_add_f32_e32 v58, v72, v48
	v_sub_f32_e32 v72, v58, v72
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v74, v62, v41
	v_add_f32_e32 v76, v55, v75
	v_sub_f32_e32 v48, v48, v72
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v80, v74, v62
	v_dual_sub_f32 v53, v54, v53 :: v_dual_add_f32 v78, v76, v58
	v_sub_f32_e32 v54, v61, v70
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v70, v60, v61 :: v_dual_sub_f32 v41, v41, v80
	v_add_f32_e32 v53, v56, v53
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v79, v78, v76
	v_sub_f32_e32 v54, v54, v59
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v60, v60, v70
	v_cndmask_b32_e64 v56, 0, 1, vcc_lo
	v_add_f32_e32 v53, v74, v53
	v_dual_sub_f32 v74, v74, v80 :: v_dual_sub_f32 v55, v76, v55
	v_trunc_f32_e32 v69, v77
	v_dual_sub_f32 v59, v60, v61 :: v_dual_sub_f32 v62, v62, v74
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v55, v75, v55
	v_sub_f32_e32 v75, v78, v79
	v_cmp_neq_f32_e64 s5, v69, v77
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v54, v54, v59
	v_sub_f32_e32 v72, v76, v75
	v_sub_f32_e32 v58, v58, v79
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_and_b32 s5, s6, s5
	v_add_f32_e32 v54, v70, v54
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f32_e32 v58, v58, v72
	v_add_f32_e32 v74, v55, v48
	v_add_f32_e32 v81, v71, v53
	v_dual_add_f32 v41, v41, v62 :: v_dual_sub_f32 v62, v74, v55
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v71, v81, v71 :: v_dual_add_f32 v58, v74, v58
	v_dual_sub_f32 v48, v48, v62 :: v_dual_sub_f32 v53, v53, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_add_f32 v68, v78, v58 :: v_dual_add_f32 v41, v41, v53
	v_sub_f32_e32 v53, v74, v62
	v_add_f32_e32 v71, v81, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v53, v55, v53 :: v_dual_mul_f32 v72, v50, v71
	v_sub_f32_e32 v62, v71, v81
	v_cmp_class_f32_e64 s7, v72, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v41, v41, v62
	v_sub_f32_e32 v55, v68, v78
	v_add_f32_e32 v48, v48, v53
	v_cndmask_b32_e64 v78, 0, v49, s5
	v_sub_f32_e32 v53, v58, v55
	v_ldexp_f32 v55, v65, v56
	v_fma_f32 v56, v50, v71, -v72
	v_add_f32_e32 v58, 1.0, v63
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v48, v48, v53
	v_add_f32_e32 v60, -1.0, v55
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v56, v50, v41
	v_rcp_f32_e32 v71, v58
	v_cvt_f32_i32_e32 v50, v64
	v_add_f32_e32 v41, v68, v48
	v_add_f32_e32 v53, -1.0, v63
	v_add_f32_e32 v61, v72, v56
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_add_f32 v69, -1.0, v58 :: v_dual_sub_f32 v62, v41, v68
	v_dual_mul_f32 v64, v51, v41 :: v_dual_add_f32 v65, 1.0, v55
	v_cndmask_b32_e64 v68, v61, v72, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v63, v63, v69 :: v_dual_sub_f32 v48, v48, v62
	v_fma_f32 v41, v51, v41, -v64
	v_mul_f32_e32 v69, v53, v71
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_eq_f32_e64 s6, 0x42b17218, v68
	v_add_f32_e32 v74, -1.0, v65
	v_cndmask_b32_e64 v62, 1.0, v49, s5
	v_fmac_f32_e32 v41, v51, v48
	v_mul_f32_e32 v83, v58, v69
	v_cndmask_b32_e64 v48, 0, 0x37000000, s6
	v_cmp_class_f32_e64 s6, v64, 0x204
	v_sub_f32_e32 v61, v61, v72
	v_rcp_f32_e32 v76, v65
	v_fma_f32 v58, v69, v58, -v83
	v_add_f32_e32 v59, v64, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v55, v55, v74 :: v_dual_fmac_f32 v58, v69, v63
	v_cndmask_b32_e64 v77, v59, v64, s6
	v_bfi_b32 v63, 0x7fffffff, v66, v78
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_f32_e64 s5, 0x42b17218, v77
	v_cndmask_b32_e64 v80, 0, 0x37000000, s5
	v_cmp_neq_f32_e64 s5, 0x7f800000, |v68|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v85, v77, v80
	v_dual_sub_f32 v75, v68, v48 :: v_dual_mul_f32 v70, 0x3fb8aa3b, v85
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rndne_f32_e32 v78, v70
	v_mul_f32_e32 v79, 0x3fb8aa3b, v75
	v_fma_f32 v66, 0x3fb8aa3b, v85, -v70
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v70, v70, v78
	v_fma_f32 v81, 0x3fb8aa3b, v75, -v79
	v_rndne_f32_e32 v82, v79
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v81, 0x32a5705f, v75
	v_sub_f32_e32 v79, v79, v82
	v_mul_f32_e32 v51, 0x3f317218, v50
	v_cvt_i32_f32_e32 v72, v82
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v74, v79, v81
	v_fma_f32 v84, 0x3f317218, v50, -v51
	v_add_f32_e32 v79, v83, v58
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v74, v74
	v_fmac_f32_e32 v84, 0xb102e308, v50
	v_sub_f32_e32 v50, v56, v61
	v_fmac_f32_e32 v66, 0x32a5705f, v85
	v_sub_f32_e32 v68, v53, v79
	v_sub_f32_e32 v56, v79, v83
	v_mul_f32_e32 v54, v73, v54
	v_cndmask_b32_e64 v50, 0, v50, s5
	v_add_f32_e32 v61, v70, v66
	v_cmp_ngt_f32_e64 s5, 0xc2ce8ed0, v75
	v_ldexp_f32 v66, v74, v72
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v53, v53, v68 :: v_dual_add_f32 v48, v48, v50
	v_sub_f32_e32 v50, v59, v64
	v_exp_f32_e32 v61, v61
	v_cndmask_b32_e64 v66, 0, v66, s5
	v_cmp_nlt_f32_e64 s5, 0x42b17218, v75
	v_cvt_i32_f32_e32 v59, v78
	v_sub_f32_e32 v41, v41, v50
	v_dual_sub_f32 v50, v56, v58 :: v_dual_sub_f32 v53, v53, v79
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
	v_cndmask_b32_e64 v64, 0x7f800000, v66, s5
	v_cmp_neq_f32_e64 s5, 0x7f800000, |v77|
	v_mul_f32_e32 v58, v60, v76
	v_ldexp_f32 v56, v61, v59
	v_add_f32_e32 v50, v50, v53
	v_fma_f32 v48, v64, v48, v64
	v_cndmask_b32_e64 v41, 0, v41, s5
	v_cmp_ngt_f32_e64 s5, 0xc2ce8ed0, v85
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v53, v51, v84 :: v_dual_add_f32 v50, v68, v50
	v_add_f32_e32 v41, v80, v41
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v56, 0, v56, s5
	v_cmp_eq_f32_e64 s5, 0x7f800000, v64
	v_dual_mul_f32 v50, v71, v50 :: v_dual_sub_f32 v51, v53, v51
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v48, v48, v64, s5
	v_cmp_nlt_f32_e64 s5, 0x42b17218, v85
	v_bfi_b32 v48, 0x7fffffff, v48, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v56, 0x7f800000, v56, s5
	v_cndmask_b32_e64 v59, 0x7fc00000, v48, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v41, v56, v41, v56
	v_cmp_eq_f32_e64 s3, 0x7f800000, v56
	v_cndmask_b32_e64 v41, v41, v56, s3
	v_cmp_gt_f32_e64 s3, 0, v39
	v_add_f32_e32 v56, v57, v54
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfi_b32 v41, 0x7fffffff, v41, v62
	v_cndmask_b32_e64 v48, v48, v59, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v57, v56, v57
	v_ldexp_f32 v62, v56, 1
	v_cndmask_b32_e64 v48, v48, v52, s2
	s_or_b32 s2, s4, s12
	v_add_f32_e32 v52, v69, v50
	v_cndmask_b32_e64 v41, v41, v63, s2
	v_cmp_o_f32_e64 s2, v39, v39
	v_sub_f32_e32 v54, v54, v57
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v59, v52, v69
	v_mul_f32_e32 v63, v52, v52
	v_cndmask_b32_e64 v48, 0x7fc00000, v48, s2
	v_cmp_o_f32_e64 s2, v49, v49
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v49, v65, v58 :: v_dual_sub_f32 v50, v50, v59
	v_ldexp_f32 v68, v54, 1
	v_cndmask_b32_e64 v41, 0x7fc00000, v41, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f32 v64, v58, v65, -v49
	v_fma_f32 v65, v52, v52, -v63
	v_add_f32_e32 v66, v50, v50
	v_dual_fmac_f32 v64, v58, v55 :: v_dual_add_f32 v41, v48, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v65, v52, v66 :: v_dual_add_f32 v66, v49, v64
	v_frexp_mant_f32_e64 v59, |v41|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v49, v66, v49
	v_cmp_gt_f32_e64 s2, 0x3f2aaaab, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v49, v49, v64
	v_cndmask_b32_e64 v67, 0, 1, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v57, v59, v67
	v_add_f32_e32 v64, -1.0, v57
	v_add_f32_e32 v67, v63, v65
	v_mul_f32_e32 v61, v56, v56
	v_add_f32_e32 v69, 1.0, v57
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v59, v54, v54 :: v_dual_fmaak_f32 v70, s18, v67, 0x3e91f4c4
	v_fma_f32 v55, v56, v56, -v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v78, -1.0, v69 :: v_dual_fmac_f32 v55, v56, v59
	v_sub_f32_e32 v57, v57, v78
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v72, v61, v55
	v_sub_f32_e32 v61, v72, v61
	v_mul_f32_e32 v77, v56, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v55, v55, v61
	v_sub_f32_e32 v59, v60, v66
	v_sub_f32_e32 v60, v60, v59
	v_dual_sub_f32 v51, v84, v51 :: v_dual_fmaak_f32 v70, v67, v70, 0x3ecccdef
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v63, v67, v63 :: v_dual_sub_f32 v60, v60, v66
	v_mul_f32_e32 v74, v67, v70
	v_rcp_f32_e32 v71, v69
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v63, v65, v63
	v_fma_f32 v65, v67, v70, -v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v65, v63, v70
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v75, v64, v71
	v_fma_f32 v70, v72, v56, -v77
	v_fmaak_f32 v73, s18, v72, 0x3e91f4c4
	v_dual_mul_f32 v79, v69, v75 :: v_dual_fmac_f32 v70, v72, v54
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fmaak_f32 v66, v72, v73, 0x3ecccdef
	v_mul_f32_e32 v73, v52, v67
	v_add_f32_e32 v49, v49, v60
	v_fma_f32 v69, v75, v69, -v79
	v_fmac_f32_e32 v70, v55, v56
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v54, v72, v66 :: v_dual_add_f32 v49, v59, v49
	v_fmac_f32_e32 v69, v75, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v59, v79, v69
	v_dual_sub_f32 v56, v64, v59 :: v_dual_add_f32 v61, v74, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v64, v64, v56 :: v_dual_sub_f32 v57, v61, v74
	v_fma_f32 v74, v67, v52, -v73
	v_fmac_f32_e32 v74, v67, v50
	v_ldexp_f32 v50, v50, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v74, v63, v52
	v_sub_f32_e32 v78, v59, v79
	v_sub_f32_e32 v59, v64, v59
	v_ldexp_f32 v52, v52, 1
	v_dual_add_f32 v64, v73, v74 :: v_dual_sub_f32 v67, v78, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v59, v67, v59
	v_add_f32_e32 v56, v56, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v56, v71, v56
	v_dual_add_f32 v60, 0x3f2aaaaa, v61 :: v_dual_add_f32 v71, v75, v56
	v_sub_f32_e32 v57, v65, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v65, 0xbf2aaaaa, v60
	v_add_f32_e32 v57, 0x31739010, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v61, v61, v65
	v_fma_f32 v65, v72, v66, -v54
	v_add_f32_e32 v57, v57, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v63, v60, v57
	v_sub_f32_e32 v59, v60, v63
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v60, v64, v63 :: v_dual_fmac_f32 v65, v55, v66
	v_add_f32_e32 v57, v57, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v59, v64, v63, -v60
	v_add_f32_e32 v69, v54, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v59, v64, v57
	v_add_f32_e32 v72, 0x3f2aaaaa, v69
	v_sub_f32_e32 v66, v64, v73
	v_sub_f32_e32 v64, v71, v75
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v54, v69, v54 :: v_dual_add_f32 v73, 0xbf2aaaaa, v72
	v_sub_f32_e32 v66, v74, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v56, v56, v64 :: v_dual_fmac_f32 v59, v66, v63
	v_add_f32_e32 v66, v56, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v64, v60, v59
	v_add_f32_e32 v74, v52, v64
	v_mul_f32_e32 v49, v76, v49
	v_sub_f32_e32 v60, v64, v60
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v52, v74, v52 :: v_dual_add_f32 v61, v77, v70
	v_sub_f32_e32 v59, v59, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v52, v64, v52 :: v_dual_mul_f32 v63, v71, v71
	v_add_f32_e32 v50, v50, v59
	v_sub_f32_e32 v54, v65, v54
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v65, v71, v71, -v63
	v_add_f32_e32 v50, v50, v52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v54, 0x31739010, v54
	v_dual_fmac_f32 v65, v71, v66 :: v_dual_sub_f32 v66, v69, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v54, v54, v66
	v_dual_add_f32 v55, v58, v49 :: v_dual_add_f32 v66, v72, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v57, v55, v58
	v_dual_mul_f32 v58, v55, v55 :: v_dual_sub_f32 v67, v61, v77
	v_sub_f32_e32 v49, v49, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v59, v55, v55, -v58
	v_add_f32_e32 v64, v49, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v59, v55, v64 :: v_dual_sub_f32 v64, v72, v66
	v_sub_f32_e32 v52, v70, v67
	v_mul_f32_e32 v70, v61, v66
	v_add_f32_e32 v67, v74, v50
	v_add_f32_e32 v54, v54, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v72, v61, v66, -v70
	v_sub_f32_e32 v74, v67, v74
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v72, v61, v54
	v_sub_f32_e32 v50, v50, v74
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v72, v52, v66 :: v_dual_add_f32 v73, v58, v59
	v_fmaak_f32 v54, s18, v73, 0x3e91f4c4
	v_add_f32_e32 v57, v63, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v60, s18, v57, 0x3e91f4c4 :: v_dual_sub_f32 v63, v57, v63
	v_fmaak_f32 v60, v57, v60, 0x3ecccdef
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v63, v65, v63
	v_mul_f32_e32 v69, v57, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v65, v57, v60, -v69
	v_fmac_f32_e32 v65, v63, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v61, v69, v65
	v_sub_f32_e32 v66, v61, v69
	v_dual_add_f32 v64, v53, v67 :: v_dual_mul_f32 v69, v71, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v65, v65, v66
	v_sub_f32_e32 v75, v64, v53
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v74, v57, v71, -v69
	v_dual_sub_f32 v52, v67, v75 :: v_dual_add_f32 v67, 0x3f2aaaaa, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v74, v57, v56
	v_add_f32_e32 v66, 0xbf2aaaaa, v67
	v_sub_f32_e32 v60, v64, v75
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v53, v53, v60 :: v_dual_add_f32 v60, v51, v50
	v_add_f32_e32 v52, v52, v53
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v74, v63, v71 :: v_dual_sub_f32 v61, v61, v66
	v_add_f32_e32 v52, v60, v52
	v_dual_sub_f32 v53, v60, v51 :: v_dual_fmaak_f32 v54, v73, v54, 0x3ecccdef
	v_dual_sub_f32 v58, v73, v58 :: v_dual_fmac_f32 v47, 0xb102e308, v45
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v57, v64, v52
	v_sub_f32_e32 v60, v60, v53
	v_sub_f32_e32 v50, v50, v53
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v58, v59, v58
	v_sub_f32_e32 v51, v51, v60
	v_sub_f32_e32 v60, v57, v64
	v_add_f32_e32 v63, v69, v74
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v65, 0x31739010, v65 :: v_dual_sub_f32 v52, v52, v60
	v_sub_f32_e32 v66, v63, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v66, v74, v66
	v_dual_add_f32 v50, v50, v51 :: v_dual_add_f32 v53, v65, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_add_f32 v50, v50, v52 :: v_dual_add_f32 v51, v67, v53
	v_frexp_exp_i32_f32_e32 v52, v41
	v_sub_f32_e32 v64, v67, v51
	v_mul_f32_e32 v65, v63, v51
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e64 v52, s2, 0, v52, s2
	v_add_f32_e32 v53, v53, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v64, v63, v51, -v65
	v_add_f32_e32 v61, v70, v72
	v_cvt_f32_i32_e32 v52, v52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v64, v63, v53
	v_sub_f32_e32 v60, v61, v70
	v_add_f32_e32 v67, v57, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v63, v62, v61 :: v_dual_sub_f32 v60, v72, v60
	v_dual_fmac_f32 v64, v66, v51 :: v_dual_sub_f32 v53, v67, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v57, v44, v67 :: v_dual_sub_f32 v62, v63, v62
	v_add_f32_e32 v60, v68, v60
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v50, v50, v53
	v_add_f32_e32 v66, v65, v64
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f32 v51, v44, v67, -v57
	v_ldexp_f32 v67, v71, 1
	v_sub_f32_e32 v45, v61, v62
	v_cmp_class_f32_e64 s2, v57, 0x204
	v_sub_f32_e32 v65, v66, v65
	v_mul_f32_e32 v53, 0x3f317218, v52
	v_add_f32_e32 v69, v67, v66
	v_fmac_f32_e32 v51, v44, v50
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v50, 0x3f317218, v52, -v53
	v_fmac_f32_e32 v50, 0xb102e308, v52
	v_ldexp_f32 v52, v56, 1
	v_sub_f32_e32 v56, v64, v65
	v_sub_f32_e32 v64, v69, v67
	v_add_f32_e32 v70, v57, v51
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v65, v73, v54 :: v_dual_add_f32 v52, v52, v56
	v_cndmask_b32_e64 v61, v70, v57, s2
	v_sub_f32_e32 v57, v70, v57
	v_mul_f32_e32 v70, v55, v73
	v_dual_add_f32 v45, v60, v45 :: v_dual_add_f32 v60, v46, v47
	v_fma_f32 v59, v73, v54, -v65
	v_cmp_eq_f32_e64 s2, 0x42b17218, v61
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v72, v73, v55, -v70
	v_sub_f32_e32 v46, v60, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v72, v73, v49
	v_ldexp_f32 v49, v49, 1
	v_sub_f32_e32 v46, v47, v46
	v_dual_fmac_f32 v59, v58, v54 :: v_dual_add_f32 v62, v63, v45
	v_cndmask_b32_e64 v54, 0, 0x37000000, s2
	v_fmac_f32_e32 v72, v58, v55
	v_ldexp_f32 v55, v55, 1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v67, v65, v59 :: v_dual_add_f32 v68, v60, v62
	v_sub_f32_e32 v71, v68, v60
	v_sub_f32_e32 v51, v51, v57
	v_sub_f32_e32 v57, v61, v54
	v_sub_f32_e32 v63, v62, v63
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v74, v68, v71 :: v_dual_sub_f32 v47, v67, v65
	v_add_f32_e32 v65, 0x3f2aaaaa, v67
	v_sub_f32_e32 v45, v45, v63
	v_sub_f32_e32 v62, v62, v71
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v60, v60, v74 :: v_dual_sub_f32 v47, v59, v47
	v_add_f32_e32 v59, 0xbf2aaaaa, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v59, v67, v59
	v_add_f32_e32 v67, v70, v72
	v_sub_f32_e32 v70, v67, v70
	v_dual_add_f32 v58, v46, v45 :: v_dual_add_f32 v47, 0x31739010, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v71, v58, v46
	v_add_f32_e32 v47, v47, v59
	v_add_f32_e32 v59, v62, v60
	v_mul_f32_e32 v63, 0x3fb8aa3b, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v59, v58, v59
	v_sub_f32_e32 v58, v58, v71
	v_fma_f32 v60, 0x3fb8aa3b, v57, -v63
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v74, v68, v59
	v_sub_f32_e32 v46, v46, v58
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v60, 0x32a5705f, v57
	v_dual_sub_f32 v58, v74, v68 :: v_dual_sub_f32 v45, v45, v71
	v_sub_f32_e32 v68, v72, v70
	v_add_f32_e32 v62, v65, v47
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v45, v45, v46
	v_sub_f32_e32 v46, v59, v58
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v73, v67, v62
	v_add_f32_e32 v45, v45, v46
	v_sub_f32_e32 v65, v65, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v47, v47, v65
	v_fma_f32 v65, v67, v62, -v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v65, v67, v47
	v_frexp_exp_i32_f32_e32 v67, v42
	v_rndne_f32_e32 v47, v63
	v_fmac_f32_e32 v65, v68, v62
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v58, vcc_lo, 0, v67, vcc_lo
	v_sub_f32_e32 v59, v63, v47
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v40
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v62, v73, v65
	v_cvt_f32_i32_e32 v46, v58
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_add_f32 v68, v74, v45 :: v_dual_add_f32 v59, v59, v60
	v_cndmask_b32_e64 v58, 0x41000000, 1.0, vcc_lo
	v_add_f32_e32 v63, v55, v62
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v67, v62, v73 :: v_dual_mul_f32 v70, 0x3f317218, v46
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v61|
	v_mul_f32_e32 v71, v58, v68
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v55, v63, v55
	v_sub_f32_e32 v65, v65, v67
	v_fma_f32 v72, 0x3f317218, v46, -v70
	v_cvt_i32_f32_e32 v47, v47
	v_fma_f32 v60, v58, v68, -v71
	v_sub_f32_e32 v55, v62, v55
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v49, v49, v65 :: v_dual_fmac_f32 v72, 0xb102e308, v46
	v_add_f32_e32 v46, v49, v55
	v_cndmask_b32_e32 v49, 0, v51, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f32_e32 v51, v70, v72
	v_cmp_class_f32_e64 vcc_lo, v71, 0x204
	v_add_f32_e32 v55, v63, v46
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v49, v54, v49
	v_sub_f32_e32 v63, v55, v63
	v_dual_sub_f32 v67, v68, v74 :: v_dual_add_f32 v54, v51, v55
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v46, v46, v63
	v_sub_f32_e32 v45, v45, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v60, v58, v45
	v_exp_f32_e32 v45, v59
	v_sub_f32_e32 v59, v66, v64
	v_dual_sub_f32 v64, v54, v51 :: v_dual_add_f32 v61, v71, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v66, v54, v64
	v_dual_sub_f32 v55, v55, v64 :: v_dual_cndmask_b32 v62, v61, v71
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v45, v45, v47
	v_sub_f32_e32 v47, v51, v70
	v_sub_f32_e32 v51, v51, v66
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v62
	v_cmp_neq_f32_e64 s2, 0x7f800000, |v62|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v47, v72, v47
	v_add_f32_e32 v51, v55, v51
	v_cndmask_b32_e64 v65, 0, 0x37000000, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_add_f32 v64, v47, v46 :: v_dual_sub_f32 v63, v62, v65
	v_cndmask_b32_e32 v45, 0, v45, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v57
	v_sub_f32_e32 v55, v64, v47
	v_add_f32_e32 v51, v64, v51
	v_mul_f32_e32 v57, 0x3fb8aa3b, v63
	v_cmp_ngt_f32_e64 s3, 0xc2ce8ed0, v63
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v45, 0x7f800000, v45 :: v_dual_sub_f32 v64, v64, v55
	v_sub_f32_e32 v46, v46, v55
	v_fma_f32 v56, 0x3fb8aa3b, v63, -v57
	v_rndne_f32_e32 v66, v57
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v49, v45, v49, v45
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v45
	v_dual_sub_f32 v47, v47, v64 :: v_dual_fmac_f32 v56, 0x32a5705f, v63
	s_delay_alu instid0(VALU_DEP_4)
	v_sub_f32_e32 v57, v57, v66
	v_trunc_f32_e32 v55, v44
	v_cndmask_b32_e32 v45, v49, v45, vcc_lo
	v_add_f32_e32 v49, v54, v51
	v_add_f32_e32 v46, v46, v47
	v_add_f32_e32 v56, v57, v56
	v_cmp_eq_f32_e32 vcc_lo, v55, v44
	v_cvt_i32_f32_e32 v55, v66
	v_sub_f32_e32 v54, v49, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v47, v51, v54
	v_exp_f32_e32 v54, v56
	v_dual_mul_f32 v51, 0.5, v44 :: v_dual_add_f32 v46, v46, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_trunc_f32_e32 v47, v51
	v_add_f32_e32 v56, v49, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v49, v56, v49
	v_dual_sub_f32 v46, v46, v49 :: v_dual_sub_f32 v61, v61, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v44, v60, v61
	v_cndmask_b32_e64 v44, 0, v44, s2
	v_cmp_eq_f32_e64 s2, 1.0, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v44, v65, v44
	v_cndmask_b32_e64 v57, 0x41000000, 1.0, s2
	v_cmp_neq_f32_e64 s2, v47, v51
	v_ldexp_f32 v47, v54, v55
	v_mul_f32_e32 v54, 0.5, v58
	v_trunc_f32_e32 v55, v58
	v_mul_f32_e32 v51, v57, v56
	s_and_b32 vcc_lo, vcc_lo, s2
	v_cndmask_b32_e64 v47, 0, v47, s3
	v_cmp_nlt_f32_e64 s3, 0x42b17218, v63
	v_cmp_eq_f32_e64 s2, v55, v58
	v_fma_f32 v49, v57, v56, -v51
	v_trunc_f32_e32 v56, v54
	v_cndmask_b32_e32 v60, 0, v43, vcc_lo
	v_cndmask_b32_e64 v47, 0x7f800000, v47, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v49, v57, v46
	v_cmp_neq_f32_e64 s3, v56, v54
	v_cndmask_b32_e32 v46, 1.0, v43, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f32 v44, v47, v44, v47
	v_cmp_eq_f32_e64 s4, 0x7f800000, v47
	v_add_f32_e32 v55, v51, v49
	s_and_b32 s3, s2, s3
	v_cmp_eq_f32_e32 vcc_lo, 0, v40
	v_cndmask_b32_e64 v54, 1.0, v40, s3
	v_cndmask_b32_e64 v44, v44, v47, s4
	v_cmp_class_f32_e64 s4, v51, 0x204
	v_cndmask_b32_e64 v62, 0, v40, s3
	v_cmp_class_f32_e64 s3, v40, 0x204
	v_bfi_b32 v45, 0x7fffffff, v45, v46
	v_bfi_b32 v44, 0x7fffffff, v44, v54
	v_cndmask_b32_e64 v47, v55, v51, s4
	v_cmp_eq_f32_e64 s4, 0, v43
	v_sub_f32_e32 v51, v55, v51
	v_add_f32_e32 v52, v52, v59
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_eq_f32_e64 s5, 0x42b17218, v47
	v_cndmask_b32_e64 v56, 0x7f800000, 0, s4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v49, v49, v51
	v_cndmask_b32_e64 v58, 0, 0x37000000, s5
	s_delay_alu instid0(VALU_DEP_3)
	v_bfi_b32 v54, 0x7fffffff, v56, v60
	v_cndmask_b32_e64 v56, 0x7fc00000, v44, s2
	v_cndmask_b32_e64 v60, 0x7f800000, 0, vcc_lo
	v_cmp_gt_f32_e64 s2, 0, v40
	v_cmp_class_f32_e64 s5, v43, 0x204
	s_or_b32 vcc_lo, vcc_lo, s3
	v_sub_f32_e32 v46, v47, v58
	v_bfi_b32 v60, 0x7fffffff, v60, v62
	v_cndmask_b32_e64 v44, v44, v56, s2
	s_or_b32 s2, s4, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v45, v45, v54, s2
	v_dual_mul_f32 v61, 0x3fb8aa3b, v46 :: v_dual_cndmask_b32 v44, v44, v60
	v_cmp_o_f32_e32 vcc_lo, v43, v43
	v_cmp_neq_f32_e64 s2, 0x7f800000, |v47|
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f32 v56, 0x3fb8aa3b, v46, -v61
	v_rndne_f32_e32 v63, v61
	v_cndmask_b32_e32 v43, 0x7fc00000, v45, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v40, v40
	v_cndmask_b32_e64 v47, 0, v49, s2
	v_fmac_f32_e32 v56, 0x32a5705f, v46
	v_sub_f32_e32 v54, v61, v63
	v_cvt_i32_f32_e32 v55, v63
	v_cndmask_b32_e32 v44, 0x7fc00000, v44, vcc_lo
	v_cmp_ngt_f32_e64 s2, 0xc2ce8ed0, v46
	v_add_f32_e32 v47, v58, v47
	v_dual_add_f32 v45, v54, v56 :: v_dual_add_f32 v54, v53, v50
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v43, v44, v43
	v_sub_f32_e32 v63, 0x41f00000, v39
	v_exp_f32_e32 v45, v45
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v44, v54, v53
	v_frexp_mant_f32_e64 v56, |v43|
	v_add_f32_e32 v53, v69, v52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v44, v50, v44
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v56
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_sub_f32_e32 v50, v53, v69
	v_ldexp_f32 v45, v45, v55
	v_cndmask_b32_e64 v51, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v50, v52, v50
	v_cndmask_b32_e64 v45, 0, v45, s2
	v_cmp_nlt_f32_e64 s2, 0x42b17218, v46
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_ldexp_f32 v49, v56, v51
	v_mul_f32_e32 v51, 0.5, v57
	v_trunc_f32_e32 v46, v57
	v_cndmask_b32_e64 v45, 0x7f800000, v45, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v56, 1.0, v49
	v_trunc_f32_e32 v55, v51
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_eq_f32_e64 s2, v46, v57
	v_add_f32_e32 v57, v54, v53
	v_fma_f32 v47, v45, v47, v45
	v_rcp_f32_e32 v46, v56
	v_cmp_neq_f32_e64 s3, v55, v51
	v_cmp_eq_f32_e64 s4, 0x7f800000, v45
	v_add_f32_e32 v51, -1.0, v49
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	s_and_b32 s2, s2, s3
	v_cmp_eq_f32_e64 s3, 0, v42
	v_cndmask_b32_e64 v45, v47, v45, s4
	v_cndmask_b32_e64 v47, 1.0, v42, s2
	v_cndmask_b32_e64 v55, 0, v42, s2
	v_cmp_class_f32_e64 s2, v42, 0x204
	v_cndmask_b32_e64 v52, 0x7f800000, 0, s3
	v_mul_f32_e32 v58, v51, v46
	v_bfi_b32 v45, 0x7fffffff, v45, v47
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_or_b32 s2, s3, s2
	v_bfi_b32 v47, 0x7fffffff, v52, v55
	v_dual_sub_f32 v52, v57, v54 :: v_dual_add_f32 v55, -1.0, v56
	v_mul_f32_e32 v59, v56, v58
	v_cmp_eq_f32_e64 s3, 1.0, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v45, v45, v47, s2
	v_cmp_o_f32_e64 s2, v42, v42
	v_sub_f32_e32 v47, v57, v52
	v_sub_f32_e32 v49, v49, v55
	v_fma_f32 v55, v58, v56, -v59
	v_cndmask_b32_e64 v42, 0x7fc00000, v45, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v45, v54, v47
	v_add_f32_e32 v47, v44, v50
	v_fmac_f32_e32 v55, v58, v49
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v49, v53, v52 :: v_dual_add_f32 v42, v48, v42
	v_sub_f32_e32 v48, v47, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v52, v59, v55 :: v_dual_add_f32 v45, v49, v45
	v_frexp_mant_f32_e64 v49, |v42|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v53, v47, v48
	v_sub_f32_e32 v54, v51, v52
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v45, v47, v45
	v_cmp_gt_f32_e64 s2, 0x3f2aaaab, v49
	v_sub_f32_e32 v48, v50, v48
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v44, v44, v53 :: v_dual_sub_f32 v51, v51, v54
	v_sub_f32_e32 v53, v52, v59
	v_cndmask_b32_e64 v47, 0, 1, s2
	v_add_f32_e32 v56, v57, v45
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v44, v48, v44
	v_sub_f32_e32 v50, v53, v55
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f32 v47, v49, v47
	v_sub_f32_e32 v49, v51, v52
	v_dual_sub_f32 v51, v56, v57 :: v_dual_add_f32 v52, 1.0, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_dual_add_f32 v48, v50, v49 :: v_dual_sub_f32 v45, v45, v51
	v_cndmask_b32_e64 v51, 0x3e000000, 1.0, s3
	v_cmp_class_f32_e64 s6, v43, 0x204
	v_rcp_f32_e32 v49, v52
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v48, v54, v48
	v_dual_add_f32 v44, v44, v45 :: v_dual_add_f32 v45, -1.0, v47
	v_add_f32_e32 v54, -1.0, v52
	v_mul_f32_e32 v46, v46, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_dual_add_f32 v48, v56, v44 :: v_dual_sub_f32 v47, v47, v54
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v50, v45, v49
	v_sub_f32_e32 v56, v48, v56
	v_mul_f32_e32 v57, v51, v48
	v_mul_f32_e32 v55, v52, v50
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v44, v44, v56
	v_fma_f32 v48, v51, v48, -v57
	v_cmp_class_f32_e64 s3, v57, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v52, v50, v52, -v55
	v_dual_fmac_f32 v48, v51, v44 :: v_dual_add_f32 v53, v58, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v52, v50, v47
	v_sub_f32_e32 v58, v53, v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v56, v55, v52
	v_dual_sub_f32 v46, v46, v58 :: v_dual_sub_f32 v59, v45, v56
	v_dual_sub_f32 v55, v56, v55 :: v_dual_add_f32 v58, v57, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v44, v46, v46 :: v_dual_sub_f32 v45, v45, v59
	v_sub_f32_e32 v52, v55, v52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v60, v58, v57, s3
	v_sub_f32_e32 v45, v45, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_f32_e64 s3, 0x42b17218, v60
	v_add_f32_e32 v45, v52, v45
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v62, 0, 0x37000000, s3
	v_cmp_neq_f32_e64 s3, 0x7f800000, |v60|
	v_add_f32_e32 v45, v59, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v45, v49, v45
	v_sub_f32_e32 v49, v58, v57
	v_sub_f32_e32 v48, v48, v49
	v_mul_f32_e32 v54, v53, v53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v48, 0, v48, s3
	v_fma_f32 v47, v53, v53, -v54
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v55, v60, v62 :: v_dual_add_f32 v48, v62, v48
	v_dual_fmac_f32 v47, v53, v44 :: v_dual_mul_f32 v52, 0x3fb8aa3b, v55
	v_add_f32_e32 v44, 0x41f00000, v39
	v_cmp_ngt_f32_e64 s3, 0xc2ce8ed0, v55
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v61, v54, v47
	v_fma_f32 v59, 0x3fb8aa3b, v55, -v52
	v_rndne_f32_e32 v65, v52
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmaak_f32 v64, s18, v61, 0x3e91f4c4
	v_sub_f32_e32 v54, v61, v54
	v_sub_f32_e32 v52, v52, v65
	v_cvt_i32_f32_e32 v65, v65
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v56, v61, v64, 0x3ecccdef :: v_dual_sub_f32 v47, v47, v54
	v_dual_fmac_f32 v59, 0x32a5705f, v55 :: v_dual_mul_f32 v64, v61, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v49, v52, v59
	v_fma_f32 v54, v61, v56, -v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v49, v49
	v_fmac_f32_e32 v54, v47, v56
	v_add_f32_e32 v56, v50, v45
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v52, v64, v54
	v_sub_f32_e32 v50, v56, v50
	v_mul_f32_e32 v58, v56, v56
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v49, v49, v65
	v_sub_f32_e32 v57, v52, v64
	v_dual_sub_f32 v45, v45, v50 :: v_dual_add_f32 v50, 0x3f2aaaaa, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v54, v54, v57
	v_fma_f32 v57, v56, v56, -v58
	v_add_f32_e32 v64, 0xbf2aaaaa, v50
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v60, v45, v45
	v_add_f32_e32 v54, 0x31739010, v54
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v52, v52, v64
	v_fmac_f32_e32 v57, v56, v60
	v_min_f32_e32 v44, v44, v63
	v_add_f32_e32 v63, 0x41c80000, v39
	v_frexp_exp_i32_f32_e32 v64, v43
	v_add_f32_e32 v52, v54, v52
	v_add_f32_e32 v60, v58, v57
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v64, vcc_lo, 0, v64, vcc_lo
	v_add_f32_e32 v54, v50, v52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v58, v60, v58
	v_dual_sub_f32 v50, v50, v54 :: v_dual_mul_f32 v59, v53, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v57, v57, v58
	v_add_f32_e32 v50, v52, v50
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v66, v61, v53, -v59
	v_fmac_f32_e32 v66, v61, v46
	v_ldexp_f32 v46, v46, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v66, v47, v53
	v_cndmask_b32_e64 v47, 0, v49, s3
	v_fmaak_f32 v49, s18, v60, 0x3e91f4c4
	v_cmp_nlt_f32_e64 s3, 0x42b17218, v55
	v_ldexp_f32 v53, v53, 1
	v_fmaak_f32 v49, v60, v49, 0x3ecccdef
	v_sub_f32_e32 v39, 0x41c80000, v39
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v47, 0x7f800000, v47, s3
	v_mul_f32_e32 v62, v60, v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v48, v47, v48, v47
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v47
	v_fma_f32 v58, v60, v49, -v62
	v_add_f32_e32 v61, v59, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v47, v48, v47 :: v_dual_fmac_f32 v58, v57, v49
	v_mul_f32_e32 v55, v61, v54
	v_sub_f32_e32 v59, v61, v59
	v_cvt_f32_i32_e32 v49, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v52, v61, v54, -v55
	v_dual_mul_f32 v48, 0x3f317218, v49 :: v_dual_sub_f32 v59, v66, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v52, v61, v50
	v_add_f32_e32 v50, v62, v58
	v_fmac_f32_e32 v52, v59, v54
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v59, v50, v62 :: v_dual_mul_f32 v62, v56, v60
	v_add_f32_e32 v54, v55, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v64, v60, v56, -v62
	v_dual_sub_f32 v55, v54, v55 :: v_dual_fmac_f32 v64, v60, v45
	v_ldexp_f32 v45, v45, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v52, v52, v55 :: v_dual_add_f32 v61, 0x3f2aaaaa, v50
	v_sub_f32_e32 v58, v58, v59
	v_fma_f32 v55, 0x3f317218, v49, -v48
	v_dual_add_f32 v46, v46, v52 :: v_dual_add_f32 v59, 0xbf2aaaaa, v61
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v58, 0x31739010, v58
	v_trunc_f32_e32 v52, v51
	v_sub_f32_e32 v50, v50, v59
	v_dual_min_f32 v39, v63, v39 :: v_dual_fmac_f32 v64, v57, v56
	v_add_f32_e32 v63, v53, v54
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_eq_f32_e32 vcc_lo, v52, v51
	v_dual_add_f32 v50, v58, v50 :: v_dual_fmac_f32 v55, 0xb102e308, v49
	v_frexp_exp_i32_f32_e32 v52, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v53, v63, v53
	v_add_f32_e32 v49, v61, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v58, v61, v49
	v_dual_add_f32 v50, v50, v58 :: v_dual_add_f32 v57, v48, v55
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v53, v54, v53
	v_add_f32_e32 v54, v62, v64
	v_sub_f32_e32 v48, v57, v48
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v46, v46, v53
	v_mul_f32_e32 v59, v54, v49
	v_sub_f32_e32 v62, v54, v62
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v48, v55, v48
	v_add_f32_e32 v60, v63, v46
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f32 v58, v54, v49, -v59
	v_mul_f32_e32 v53, 0.5, v51
	v_sub_f32_e32 v51, v64, v62
	v_fmac_f32_e32 v58, v54, v50
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_trunc_f32_e32 v61, v53
	v_dual_fmac_f32 v58, v51, v49 :: v_dual_add_f32 v65, v57, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_neq_f32_e64 s3, v61, v53
	v_subrev_co_ci_u32_e64 v51, s2, 0, v52, s2
	v_add_f32_e32 v54, v59, v58
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v50, v65, v57 :: v_dual_sub_f32 v53, v60, v63
	v_ldexp_f32 v52, v56, 1
	v_cvt_f32_i32_e32 v51, v51
	s_and_b32 s2, vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v49, v65, v50 :: v_dual_sub_f32 v46, v46, v53
	v_dual_add_f32 v53, v52, v54 :: v_dual_mul_f32 v56, 0x3f317218, v51
	v_sub_f32_e32 v55, v54, v59
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v49, v57, v49 :: v_dual_sub_f32 v50, v60, v50
	v_sub_f32_e32 v52, v53, v52
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v57, 0x3f317218, v51, -v56
	v_sub_f32_e32 v55, v58, v55
	v_cmp_class_f32_e64 s3, v41, 0x204
	v_add_f32_e32 v60, 0xc1880000, v33
	v_sub_f32_e32 v52, v54, v52
	v_cndmask_b32_e64 v54, 1.0, v41, s2
	v_fmac_f32_e32 v57, 0xb102e308, v51
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_bfi_b32 v47, 0x7fffffff, v47, v54
	v_dual_add_f32 v49, v50, v49 :: v_dual_add_f32 v50, v48, v46
	v_add_f32_e32 v45, v45, v55
	v_cndmask_b32_e32 v58, 0x7fc00000, v47, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v49, v50, v49
	v_add_f32_e32 v45, v45, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v55, v50, v48 :: v_dual_add_f32 v54, v53, v45
	v_sub_f32_e32 v50, v50, v55
	v_sub_f32_e32 v46, v46, v55
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v53, v54, v53 :: v_dual_sub_f32 v48, v48, v50
	v_dual_add_f32 v51, v65, v49 :: v_dual_add_f32 v46, v46, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v50, v51, v65
	v_add_f32_e32 v52, v56, v57
	v_add_f32_e32 v55, v52, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v48, v49, v50 :: v_dual_sub_f32 v49, v55, v52
	v_dual_cndmask_b32 v47, v47, v58 :: v_dual_add_f32 v46, v46, v48
	v_cmp_eq_f32_e32 vcc_lo, 0, v41
	v_sub_f32_e32 v48, v52, v56
	s_delay_alu instid0(VALU_DEP_4)
	v_sub_f32_e32 v56, v55, v49
	v_cndmask_b32_e64 v58, 0, v41, s2
	v_cmp_eq_f32_e64 s2, 1.0, v43
	v_cndmask_b32_e64 v50, 0x7f800000, 0, vcc_lo
	v_dual_add_f32 v59, v51, v46 :: v_dual_sub_f32 v48, v57, v48
	v_dual_sub_f32 v45, v45, v53 :: v_dual_sub_f32 v52, v52, v56
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v53, 0x3e000000, 1.0, s2
	v_sub_f32_e32 v49, v54, v49
	v_bfi_b32 v50, 0x7fffffff, v50, v58
	v_dual_add_f32 v54, v48, v45 :: v_dual_sub_f32 v51, v59, v51
	s_or_b32 vcc_lo, vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v49, v49, v52
	v_mul_f32_e32 v52, v53, v59
	v_dual_sub_f32 v56, v54, v48 :: v_dual_cndmask_b32 v47, v47, v50
	v_add_f32_e32 v58, 0.5, v33
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_f32_e32 v49, v54, v49
	v_sub_f32_e32 v46, v46, v51
	v_fma_f32 v50, v53, v59, -v52
	v_dual_sub_f32 v51, v54, v56 :: v_dual_add_f32 v54, 0x41f00000, v34
	v_add_f32_e32 v57, v55, v49
	v_sub_f32_e32 v45, v45, v56
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v50, v53, v46 :: v_dual_add_f32 v47, -0.5, v47
	v_sub_f32_e32 v46, v48, v51
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v48, v57, v55 :: v_dual_sub_f32 v51, 0x41f00000, v34
	v_dual_add_f32 v55, v52, v50 :: v_dual_sub_f32 v56, 0x41900000, v33
	v_cmp_class_f32_e64 vcc_lo, v52, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v45, v45, v46
	v_dual_sub_f32 v46, v49, v48 :: v_dual_min_f32 v49, v54, v51
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v59, 0x41c80000, v34 :: v_dual_cndmask_b32 v48, v55, v52
	v_dual_sub_f32 v52, v55, v52 :: v_dual_add_f32 v45, v45, v46
	v_min_f32_e32 v51, v58, v56
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v48
	v_sub_f32_e32 v50, v50, v52
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v56, v57, v45
	v_cndmask_b32_e64 v46, 0, 0x37000000, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v42
	v_sub_f32_e32 v57, v56, v57
	v_cndmask_b32_e64 v54, 0x3e000000, 1.0, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v41, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v58, v54, v56 :: v_dual_sub_f32 v45, v45, v57
	v_sub_f32_e32 v57, 0x41c80000, v34
	v_fma_f32 v56, v54, v56, -v58
	v_cndmask_b32_e32 v41, 0x7fc00000, v47, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v34, 0x1f8
	v_min3_f32 v47, v49, v51, v44
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v51, v48, v46 :: v_dual_fmac_f32 v56, v54, v45
	v_min_f32_e32 v45, v59, v57
	v_cndmask_b32_e32 v34, 0x7fc00000, v37, vcc_lo
	v_cmp_class_f32_e64 s2, v58, 0x204
	v_add_f32_e32 v57, v58, v56
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v59, 0xbfc00000, v34
	v_sub_f32_e32 v34, 0x40d00000, v34
	v_dual_mul_f32 v61, 0x3fb8aa3b, v51 :: v_dual_min_f32 v34, v59, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_rndne_f32_e32 v64, v61
	v_sub_f32_e32 v62, 0x41a00000, v33
	v_fma_f32 v63, 0x3fb8aa3b, v51, -v61
	v_sub_f32_e32 v37, v61, v64
	v_cndmask_b32_e64 v61, v57, v58, s2
	v_cvt_i32_f32_e32 v52, v64
	v_min_f32_e32 v59, v60, v62
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_f32_e64 s2, 0x42b17218, v61
	v_cndmask_b32_e64 v55, 0, 0x37000000, s2
	v_cmp_neq_f32_e64 s2, 0x7f800000, |v48|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v60, v61, v55
	v_cndmask_b32_e64 v48, 0, v50, s2
	v_fmac_f32_e32 v63, 0x32a5705f, v51
	v_cmp_ngt_f32_e64 s2, 0xc2ce8ed0, v51
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_add_f32 v46, v46, v48 :: v_dual_add_f32 v37, v37, v63
	v_add_f32_e32 v63, 0xc1940000, v33
	v_mul_f32_e32 v48, 0.5, v53
	v_exp_f32_e32 v37, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_max3_f32 v34, -v34, -v63, -v62
	v_trunc_f32_e32 v63, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_max_f32_e64 v34, v34, -v39
	v_cmp_neq_f32_e64 s3, v63, v48
	v_add_f32_e32 v48, 0.5, v6
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v37, v37, v52
	v_mul_f32_e32 v52, 0x3fb8aa3b, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v37, 0, v37, s2
	v_cmp_nlt_f32_e64 s2, 0x42b17218, v51
	v_trunc_f32_e32 v51, v53
	v_rndne_f32_e32 v62, v52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v37, 0x7f800000, v37, s2
	v_cmp_eq_f32_e64 s2, v51, v53
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v46, v37, v46, v37
	v_cmp_eq_f32_e64 s4, 0x7f800000, v37
	s_and_b32 s3, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v37, v46, v37, s4
	v_cndmask_b32_e64 v46, 1.0, v43, s3
	v_bfi_b32 v37, 0x7fffffff, v37, v46
	v_sub_f32_e32 v46, 0x41900000, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v33, 0x419f3333, v33 :: v_dual_min_f32 v46, v48, v46
	v_add_f32_e32 v48, 0x41f00000, v40
	v_min3_f32 v50, v45, v59, v39
	v_fma_f32 v59, 0x3fb8aa3b, v60, -v52
	v_sub_f32_e32 v52, v52, v62
	v_maxmin_f32 v34, v47, v50, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v59, 0x32a5705f, v60
	v_cvt_i32_f32_e32 v50, v62
	v_cmp_lt_f32_e64 s4, v34, v41
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v47, v52, v59
	v_trunc_f32_e32 v52, v54
	v_cndmask_b32_e64 v34, v41, v34, s4
	v_sub_f32_e32 v41, v57, v58
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_f32_e32 v41, v56, v41
	v_cndmask_b32_e64 v56, 0, v43, s3
	v_cmp_eq_f32_e64 s3, v52, v54
	v_sub_f32_e32 v52, 0x41a00000, v6
	v_exp_f32_e32 v47, v47
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v47, v47, v50
	v_cndmask_b32_e64 v50, 0x7fc00000, v37, s2
	v_cmp_neq_f32_e64 s2, 0x7f800000, |v61|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v41, 0, v41, s2
	v_cmp_ngt_f32_e64 s2, 0xc2ce8ed0, v60
	v_cndmask_b32_e64 v47, 0, v47, s2
	v_cmp_gt_f32_e64 s2, 0, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v37, v37, v50, s2
	v_mul_f32_e32 v50, 0.5, v54
	v_sub_f32_e32 v54, 0x41f00000, v40
	v_cmp_nlt_f32_e64 s2, 0x42b17218, v60
	v_add_f32_e32 v41, v55, v41
	v_trunc_f32_e32 v53, v50
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_min_f32_e32 v48, v48, v54
	v_cndmask_b32_e64 v47, 0x7f800000, v47, s2
	v_cmp_eq_f32_e64 s2, 0, v43
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f32_e64 s4, v53, v50
	v_fma_f32 v41, v47, v41, v47
	v_cmp_eq_f32_e64 s5, 0x7f800000, v47
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v55, 0x7f800000, 0, s2
	s_and_b32 s4, s3, s4
	s_or_b32 s2, s2, s6
	v_cndmask_b32_e64 v53, 0, v42, s4
	v_cndmask_b32_e64 v41, v41, v47, s5
	v_cndmask_b32_e64 v47, 1.0, v42, s4
	v_bfi_b32 v50, 0x7fffffff, v55, v56
	v_add_f32_e32 v55, 0x41c80000, v7
	v_add_f32_e32 v54, 0xc1940000, v6
	v_add_f32_e32 v51, 0xc1880000, v6
	v_bfi_b32 v41, 0x7fffffff, v41, v47
	v_cndmask_b32_e64 v37, v37, v50, s2
	v_cmp_eq_f32_e64 s2, 0, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_sub_f32 v6, 0x419f3333, v6 :: v_dual_min_f32 v47, v51, v52
	v_cndmask_b32_e64 v50, 0x7fc00000, v41, s3
	v_cmp_gt_f32_e64 s3, 0, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v51, 0x7f800000, 0, s2
	v_add_f32_e32 v37, -0.5, v37
	v_cndmask_b32_e64 v41, v41, v50, s3
	v_cmp_class_f32_e64 s3, v42, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_bfi_b32 v50, 0x7fffffff, v51, v53
	v_sub_f32_e32 v53, 0x41f00000, v7
	s_or_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v41, v41, v50, s2
	v_cmp_class_f32_e64 s2, v7, 0x1f8
	v_add_f32_e32 v50, 0x41f00000, v7
	v_sub_f32_e32 v7, 0x41c80000, v7
	v_add_f32_e32 v51, 0x41c80000, v40
	v_add_f32_e32 v41, -0.5, v41
	v_cndmask_b32_e64 v32, 0x7fc00000, v32, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_dual_min_f32 v50, v50, v53 :: v_dual_min_f32 v7, v55, v7
	v_min_f32_e32 v52, v54, v52
	v_sub_f32_e32 v40, 0x41c80000, v40
	v_add_f32_e32 v56, 0xbfc00000, v32
	v_sub_f32_e32 v32, 0x40d00000, v32
	v_cndmask_b32_e32 v38, 0x7fc00000, v38, vcc_lo
	v_min3_f32 v44, v50, v46, v44
	v_min3_f32 v7, v7, v47, v39
	v_cmp_o_f32_e32 vcc_lo, v42, v42
	v_max3_f32 v32, -v56, -v32, -v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_max_f32_e64 v32, v32, -v39
	v_dual_min_f32 v39, v51, v40 :: v_dual_cndmask_b32 v40, 0x7fc00000, v41
	v_maxmin_f32 v7, v44, v7, v32
	v_min3_f32 v32, v49, v46, v48
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_min3_f32 v41, v45, v47, v39
	v_cmp_lt_f32_e32 vcc_lo, v7, v40
	v_cndmask_b32_e32 v7, v40, v7, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v43, v43
	v_cndmask_b32_e32 v37, 0x7fc00000, v37, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, v33, v34
	v_add_f32_e32 v50, 0xbfc00000, v38
	v_dual_sub_f32 v38, 0x40d00000, v38 :: v_dual_cndmask_b32 v33, v34, v33
	v_cmp_lt_f32_e32 vcc_lo, v6, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_max3_f32 v38, -v50, -v38, -v52
	v_sub_f32_e32 v33, v33, v2
	v_cndmask_b32_e32 v7, v7, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_max_f32_e64 v38, v38, -v39
	v_sub_f32_e32 v7, v7, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_maxmin_f32 v32, v32, v41, v38
	v_cmp_lt_f32_e32 vcc_lo, v32, v37
	v_cndmask_b32_e32 v32, v37, v32, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e32 vcc_lo, v6, v32
	v_cndmask_b32_e32 v6, v32, v6, vcc_lo
	v_mul_f32_e32 v32, v33, v33
	v_sub_f32_e32 v2, v6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v32, v7, v7
	v_fmac_f32_e32 v32, v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v6, 0x4f800000, v32
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v32
	v_cndmask_b32_e32 v6, v32, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v32, v6
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v34, -1, v32
	v_add_nc_u32_e32 v37, 1, v32
	v_fma_f32 v38, -v34, v32, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v39, -v37, v32, v6
	v_cmp_ge_f32_e64 s2, 0, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v32, v32, v34, s2
	v_cmp_lt_f32_e64 s2, 0, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v32, v32, v37, s2
	v_mul_f32_e32 v34, 0x37800000, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v32, v32, v34, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v6, 0x260
	v_cndmask_b32_e32 v6, v32, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v32, null, v6, v6, 1.0
	v_rcp_f32_e32 v34, v32
	s_waitcnt_depctr 0xfff
	v_fma_f32 v37, -v32, v34, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v34, v37, v34
	v_div_scale_f32 v37, vcc_lo, 1.0, v6, 1.0
	v_mul_f32_e32 v38, v37, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v39, -v32, v38, v37
	v_fmac_f32_e32 v38, v39, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v32, -v32, v38, v37
	v_div_fmas_f32 v32, v32, v34, v38
	v_cndmask_b32_e64 v34, 1, 2, s9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v6, v32, v6, 1.0
	v_cndmask_b32_e64 v49, v34, 3, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f32_e32 v33, v33, v6
	v_mul_f32_e32 v34, v7, v6
	v_mul_f32_e32 v32, v2, v6
.LBB0_50:                               ; %Flow765
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr3
                                        ; implicit-def: $vgpr40
                                        ; implicit-def: $vgpr41
                                        ; implicit-def: $vgpr42
                                        ; implicit-def: $vgpr43
                                        ; implicit-def: $vgpr44
                                        ; implicit-def: $vgpr45
                                        ; implicit-def: $vgpr46
                                        ; implicit-def: $vgpr50
                                        ; implicit-def: $vgpr51
                                        ; implicit-def: $vgpr52
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr6
	s_mov_b32 s4, exec_lo
	v_cmpx_lt_i32_e32 1, v49
	s_xor_b32 s27, exec_lo, s4
	s_cbranch_execz .LBB0_112
; %bb.51:                               ; %NodeBlock
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_mov_b32 s11, 0
	s_mov_b32 s28, exec_lo
                                        ; implicit-def: $vgpr50
                                        ; implicit-def: $vgpr51
                                        ; implicit-def: $vgpr52
                                        ; implicit-def: $vgpr36
                                        ; implicit-def: $vgpr35
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr6
	v_cmpx_gt_i32_e32 3, v49
	s_cbranch_execz .LBB0_111
; %bb.52:                               ;   in Loop: Header=BB0_4 Depth=2
	v_mad_u64_u32 v[7:8], null, v5, s16, 0x269ec3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfe_u32 v2, v7, 16, 15
	v_cvt_f32_u32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v5, null, 0x47822580, 0x47822580, v2
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v5, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v8, v6
	v_div_scale_f32 v8, vcc_lo, v2, 0x47822580, v2
	v_mul_f32_e32 v35, v8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v36, -v5, v35, v8
	v_fmac_f32_e32 v35, v36, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -v5, v35, v8
                                        ; implicit-def: $vgpr8
	v_div_fmas_f32 v5, v5, v6, v35
                                        ; implicit-def: $vgpr35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v2, v5, 0x47822580, v2
	v_mul_f32_e32 v39, 0x40c90fda, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ngt_f32_e32 vcc_lo, 0x48000000, v39
	s_and_saveexec_b32 s2, vcc_lo
	s_xor_b32 s5, exec_lo, s2
	s_cbranch_execz .LBB0_54
; %bb.53:                               ;   in Loop: Header=BB0_4 Depth=2
	v_and_or_b32 v8, v39, s19, 0x800000
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, 0xfe5163ab, v8, 0
	v_mov_b32_e32 v2, v6
	v_lshrrev_b32_e32 v6, 23, v39
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[35:36], null, 0x3c439041, v8, v[2:3]
	v_add_nc_u32_e32 v6, 0xffffff88, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e64 s2, 63, v6
	v_mov_b32_e32 v2, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[36:37], null, 0xdb629599, v8, v[2:3]
	v_mov_b32_e32 v2, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v36, v5, s2
	v_mad_u64_u32 v[37:38], null, 0xf534ddc0, v8, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v2, v38
	v_cndmask_b32_e64 v38, 0, 0xffffffc0, s2
	v_mad_u64_u32 v[40:41], null, 0xfc2757d1, v8, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v38, v6
	v_cmp_lt_u32_e64 s3, 31, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v2, v41
	v_cndmask_b32_e64 v38, 0, 0xffffffe0, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[41:42], null, 0x4e441529, v8, v[2:3]
	v_add_nc_u32_e32 v6, v38, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v2, v42
	v_cmp_lt_u32_e64 s4, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[42:43], null, 0xa2f9836e, v8, v[2:3]
	v_cndmask_b32_e64 v2, 0, 0xffffffe0, s4
	v_cndmask_b32_e64 v8, v41, v37, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v2, v2, v6
	v_cndmask_b32_e64 v38, v42, v40, s2
	v_cndmask_b32_e64 v41, v43, v41, s2
	v_cndmask_b32_e64 v40, v40, v36, s2
	v_cndmask_b32_e64 v6, v37, v35, s2
	v_cmp_eq_u32_e64 s2, 0, v2
	v_cndmask_b32_e64 v35, v38, v8, s3
	v_cndmask_b32_e64 v37, v41, v38, s3
	v_cndmask_b32_e64 v8, v8, v40, s3
	v_sub_nc_u32_e32 v38, 32, v2
	v_cndmask_b32_e64 v40, v40, v6, s3
	v_cndmask_b32_e64 v5, v6, v5, s3
	v_cndmask_b32_e64 v37, v37, v35, s4
	v_cndmask_b32_e64 v35, v35, v8, s4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v8, v8, v40, s4
	v_cndmask_b32_e64 v5, v40, v5, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v41, v37, v35, v38
	v_alignbit_b32 v36, v35, v8, v38
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v38, v8, v5, v38
	v_cndmask_b32_e64 v2, v41, v37, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v6, v36, v35, s2
	v_cndmask_b32_e64 v8, v38, v8, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfe_u32 v35, v2, 29, 1
	v_alignbit_b32 v36, v2, v6, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_alignbit_b32 v6, v6, v8, 30
	v_alignbit_b32 v5, v8, v5, 30
	v_sub_nc_u32_e32 v37, 0, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v36, v36, v37
	v_xor_b32_e32 v6, v6, v37
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v5, v5, v37
	v_clz_i32_u32_e32 v38, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v38, 32, v38
	v_sub_nc_u32_e32 v8, 31, v38
	v_lshlrev_b32_e32 v41, 23, v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_alignbit_b32 v36, v36, v6, v8
	v_alignbit_b32 v5, v6, v5, v8
	v_lshrrev_b32_e32 v8, 29, v2
	v_lshrrev_b32_e32 v2, 30, v2
	v_alignbit_b32 v6, v36, v5, 9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b32_e32 v8, 31, v8
	v_lshrrev_b32_e32 v36, 9, v36
	v_add_nc_u32_e32 v35, v35, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_clz_i32_u32_e32 v37, v6
	v_or_b32_e32 v40, 0.5, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_u32_e32 v37, 32, v37
	v_sub_nc_u32_e32 v40, v40, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v42, 31, v37
	v_alignbit_b32 v5, v6, v5, v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v6, v36, v40
	v_add_lshl_u32 v36, v37, v38, 23
	v_lshrrev_b32_e32 v5, 9, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v37, 0x3fc90fda, v6
	v_sub_nc_u32_e32 v5, v5, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v36, 0x3fc90fda, v6, -v37
	v_add_nc_u32_e32 v5, 0x33000000, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v36, 0x33a22168, v6
	v_or_b32_e32 v5, v5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v36, 0x3fc90fda, v5
	v_add_f32_e32 v8, v37, v36
.LBB0_54:                               ; %Flow750
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_saveexec_b32 s2, s5
	v_mul_f32_e32 v2, 0x3f22f983, v39
	s_delay_alu instid0(VALU_DEP_1)
	v_rndne_f32_e32 v2, v2
	s_xor_b32 exec_lo, exec_lo, s2
; %bb.55:                               ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmamk_f32 v8, v2, 0xbfc90fda, v39
	v_cvt_i32_f32_e32 v35, v2
	v_fmac_f32_e32 v8, 0xb3a22168, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v8, 0xa7c234c4, v2
; %bb.56:                               ; %_ZL4sinff.exit.i
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr37
                                        ; implicit-def: $vgpr36
	s_and_saveexec_b32 s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s2
	s_cbranch_execz .LBB0_58
; %bb.57:                               ;   in Loop: Header=BB0_4 Depth=2
	v_and_or_b32 v45, v39, s19, 0x800000
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, 0xfe5163ab, v45, 0
	v_mov_b32_e32 v2, v6
	v_lshrrev_b32_e32 v6, 23, v39
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[36:37], null, 0x3c439041, v45, v[2:3]
	v_mov_b32_e32 v2, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[37:38], null, 0xdb629599, v45, v[2:3]
	v_add_nc_u32_e32 v6, 0xffffff88, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e32 vcc_lo, 63, v6
	v_mov_b32_e32 v2, v38
	v_cndmask_b32_e64 v38, 0, 0xffffffc0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[40:41], null, 0xf534ddc0, v45, v[2:3]
	v_dual_cndmask_b32 v5, v37, v5 :: v_dual_add_nc_u32 v6, v38, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v2, v41
	v_cmp_lt_u32_e64 s2, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[41:42], null, 0xfc2757d1, v45, v[2:3]
	v_cndmask_b32_e64 v38, 0, 0xffffffe0, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v6, v38, v6
	v_mov_b32_e32 v2, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s3, 31, v6
	v_mad_u64_u32 v[42:43], null, 0x4e441529, v45, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v2, v43
	v_cndmask_b32_e32 v38, v42, v40, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[43:44], null, 0xa2f9836e, v45, v[2:3]
	v_cndmask_b32_e64 v2, 0, 0xffffffe0, s3
	v_dual_cndmask_b32 v43, v43, v41 :: v_dual_add_nc_u32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v42, v44, v42 :: v_dual_cndmask_b32 v41, v41, v37
	v_cndmask_b32_e32 v6, v40, v36, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v36, v43, v38, s2
	v_cndmask_b32_e64 v40, v42, v43, s2
	v_cndmask_b32_e64 v38, v38, v41, s2
	v_sub_nc_u32_e32 v42, 32, v2
	v_cndmask_b32_e64 v41, v41, v6, s2
	v_cndmask_b32_e64 v5, v6, v5, s2
	v_cndmask_b32_e64 v40, v40, v36, s3
	v_cndmask_b32_e64 v36, v36, v38, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v38, v38, v41, s3
	v_cndmask_b32_e64 v5, v41, v5, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v43, v40, v36, v42
	v_alignbit_b32 v37, v36, v38, v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v41, v38, v5, v42
	v_cndmask_b32_e32 v2, v43, v40, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v6, v37, v36, vcc_lo
	v_cndmask_b32_e32 v38, v41, v38, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfe_u32 v37, v2, 29, 1
	v_alignbit_b32 v36, v2, v6, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_alignbit_b32 v6, v6, v38, 30
	v_alignbit_b32 v5, v38, v5, 30
	v_sub_nc_u32_e32 v40, 0, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v36, v36, v40
	v_xor_b32_e32 v6, v6, v40
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v5, v5, v40
	v_clz_i32_u32_e32 v41, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v41, 32, v41
	v_sub_nc_u32_e32 v38, 31, v41
	v_lshlrev_b32_e32 v43, 23, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_alignbit_b32 v36, v36, v6, v38
	v_alignbit_b32 v5, v6, v5, v38
	v_lshrrev_b32_e32 v38, 29, v2
	v_lshrrev_b32_e32 v2, 30, v2
	v_alignbit_b32 v6, v36, v5, 9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v38, 31, v38
	v_add_nc_u32_e32 v37, v37, v2
	v_lshrrev_b32_e32 v36, 9, v36
                                        ; implicit-def: $vgpr2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_clz_i32_u32_e32 v40, v6
	v_or_b32_e32 v42, 0.5, v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_u32_e32 v40, 32, v40
	v_sub_nc_u32_e32 v42, v42, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v44, 31, v40
	v_alignbit_b32 v5, v6, v5, v44
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v6, v36, v42
	v_add_lshl_u32 v36, v40, v41, 23
	v_lshrrev_b32_e32 v5, 9, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v40, 0x3fc90fda, v6
	v_sub_nc_u32_e32 v5, v5, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v36, 0x3fc90fda, v6, -v40
	v_add_nc_u32_e32 v5, 0x33000000, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v36, 0x33a22168, v6
	v_or_b32_e32 v5, v5, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v36, 0x3fc90fda, v5
	v_add_f32_e32 v36, v40, v36
.LBB0_58:                               ; %Flow749
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_and_not1_saveexec_b32 s2, s4
; %bb.59:                               ;   in Loop: Header=BB0_4 Depth=2
	v_fmamk_f32 v36, v2, 0xbfc90fda, v39
	v_cvt_i32_f32_e32 v37, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v36, 0xb3a22168, v2
	v_fmac_f32_e32 v36, 0xa7c234c4, v2
; %bb.60:                               ; %_ZL4cosff.exit.i
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_mad_u64_u32 v[5:6], null, v7, s16, 0x269ec3
	v_cmp_gt_f32_e64 s2, 0, v32
	s_mov_b32 s29, exec_lo
	v_and_b32_e32 v43, 1, v35
	v_dual_mul_f32 v47, 0x3eea3ce2, v33 :: v_dual_mov_b32 v52, v26
	v_mov_b32_e32 v51, v24
	v_bfe_u32 v2, v5, 16, 15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e64 s7, 0, v43
	v_fmac_f32_e32 v47, 0x3eea3ce2, v34
	v_mov_b32_e32 v53, v32
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f32_u32_e32 v7, v2
	v_fmac_f32_e32 v47, 0x3f4332bc, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v2, null, 0x47822580, 0x47822580, v7
	v_div_scale_f32 v41, vcc_lo, v7, 0x47822580, v7
	v_rcp_f32_e32 v6, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v38, -v2, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v6, v38, v6
	v_cndmask_b32_e64 v38, 1.0, -1.0, s2
	v_cmp_lg_f32_e64 s2, 0x7f800000, v39
	v_mul_f32_e32 v42, v41, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v40, -v2, v42, v41
	v_fmac_f32_e32 v42, v40, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, -v2, v42, v41
	v_div_fmas_f32 v39, v2, v6, v42
	v_and_b32_e32 v42, 1, v37
	v_mul_f32_e32 v2, 0x3e4ccccd, v27
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fixup_f32 v39, v39, 0x47822580, v7
	v_add_f32_e32 v40, v32, v38
	v_mov_b32_e32 v50, v23
	v_cmp_eq_u32_e64 s8, 0, v42
	v_mul_f32_e32 v7, 0x3e4ccccd, v25
	v_mul_f32_e32 v45, 0x4f800000, v39
	v_sub_f32_e32 v41, 1.0, v39
	v_div_scale_f32 v49, null, v40, v40, -1.0
	v_div_scale_f32 v55, vcc_lo, -1.0, v40, -1.0
	v_cmp_gt_f32_e64 s3, 0xf800000, v39
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v54, v49
	v_cmp_gt_f32_e64 s5, 0xf800000, v41
	v_cndmask_b32_e64 v39, v39, v45, s3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v44, -v49, v54, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v54, v44, v54
	v_dual_mul_f32 v6, 0x3e4ccccd, v28 :: v_dual_mul_f32 v57, v55, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v45, -v49, v57, v55
	v_dual_mul_f32 v46, 0x4f800000, v41 :: v_dual_fmac_f32 v57, v45, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v44, v41, v46, s5
	v_sqrt_f32_e32 v41, v39
	v_mov_b32_e32 v56, v33
	v_fma_f32 v49, -v49, v57, v55
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sqrt_f32_e32 v46, v44
	v_div_fmas_f32 v49, v49, v54, v57
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v43, -1, v41
	v_add_nc_u32_e32 v42, 1, v41
	v_add_nc_u32_e32 v48, -1, v46
	v_add_nc_u32_e32 v45, 1, v46
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v58, -v42, v41, v39
	v_fma_f32 v55, -v43, v41, v39
	v_fma_f32 v59, -v48, v46, v44
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_cmp_lt_f32_e64 s4, 0, v58
	v_mov_b32_e32 v58, v34
	v_fma_f32 v60, -v45, v46, v44
	v_cmp_ge_f32_e64 s6, 0, v55
	v_cmp_ge_f32_e64 s10, 0, v59
	v_cmp_lt_f32_e64 s9, 0, v60
	v_cmpx_lt_f32_e32 0, v47
	s_cbranch_execz .LBB0_110
; %bb.61:                               ;   in Loop: Header=BB0_4 Depth=2
	v_dual_fmamk_f32 v51, v34, 0x3dcccccd, v29 :: v_dual_fmamk_f32 v52, v33, 0x3dcccccd, v30
	v_dual_fmamk_f32 v53, v32, 0x3dcccccd, v31 :: v_dual_mov_b32 v56, 0
	s_mov_b32 s33, 0
	s_mov_b32 s35, 0
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr30
                                        ; implicit-def: $sgpr34
                                        ; implicit-def: $sgpr36
.LBB0_62:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_63 Depth 4
                                        ;         Child Loop BB0_69 Depth 4
	s_delay_alu instid0(VALU_DEP_1)
	v_fmamk_f32 v54, v56, 0x3eea3ce2, v51
	v_fmamk_f32 v55, v56, 0x3eea3ce2, v52
	v_mov_b32_e32 v57, 0x4e6e6b28
	s_mov_b32 s11, -4
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@lo+16
	s_addc_u32 s13, s13, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@hi+24
.LBB0_63:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_62 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_add_u32 s38, s12, -12
	s_addc_u32 s39, s13, -1
	s_add_i32 s11, s11, 4
	s_load_b128 s[40:43], s[38:39], 0x0
	s_add_u32 s12, s12, 16
	s_addc_u32 s13, s13, 0
	s_cmp_gt_u32 s11, 35
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v50, s41, 0.5
	v_mul_f32_e64 v58, s40, 0.5
	v_fma_f32 v59, s41, 0.5, -v55
	v_fma_f32 v61, s40, 0.5, -v54
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v60, s43, 0.5, -v50
	v_fma_f32 v62, s42, 0.5, -v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v59, v59, v60
	v_mul_f32_e32 v63, v60, v60
	v_fmac_f32_e32 v59, v61, v62
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v63, v62, v62
	v_add_f32_e32 v59, 0, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v61, null, v63, v63, v59
	v_rcp_f32_e32 v64, v61
	s_waitcnt_depctr 0xfff
	v_fma_f32 v65, -v61, v64, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v64, v65, v64
	v_div_scale_f32 v66, vcc_lo, v59, v63, v59
	v_mul_f32_e32 v65, v66, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v67, -v61, v65, v66
	v_fmac_f32_e32 v65, v67, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v61, -v61, v65, v66
	v_div_fmas_f32 v61, v61, v64, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v59, v61, v63, v59
	v_min_f32_e32 v59, 0, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_f32_e64 v59, -v59, 1.0
	v_fmac_f32_e32 v50, v60, v59
	v_fmac_f32_e32 v58, v62, v59
	v_fma_f32 v59, v59, 0, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v50, v55, v50
	v_dual_sub_f32 v58, v54, v58 :: v_dual_sub_f32 v59, 0, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v50, v50, v50
	v_dual_fmac_f32 v50, v58, v58 :: v_dual_max_f32 v57, v57, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v50, v59, v59
	v_min_f32_e32 v57, v57, v50
	s_cbranch_scc0 .LBB0_63
; %bb.64:                               ;   in Loop: Header=BB0_62 Depth=3
	v_cmp_nlt_f32_e64 s11, 0x41000000, |v54|
                                        ; implicit-def: $vgpr50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s12, s11
	s_xor_b32 s11, exec_lo, s12
; %bb.65:                               ;   in Loop: Header=BB0_62 Depth=3
	v_cmp_neq_f32_e64 s12, 0x41000000, |v54|
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v50, 0, |v54|, s12
; %bb.66:                               ; %Flow745
                                        ;   in Loop: Header=BB0_62 Depth=3
	s_and_not1_saveexec_b32 s11, s11
	s_cbranch_execz .LBB0_72
; %bb.67:                               ;   in Loop: Header=BB0_62 Depth=3
	v_frexp_exp_i32_f32_e32 v59, v54
	v_frexp_mant_f32_e64 v50, |v54|
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v58, -4, v59
	v_ldexp_f32 v50, v50, 12
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_lt_i32_e32 12, v58
	s_cbranch_execz .LBB0_71
; %bb.68:                               ; %.preheader.i.i.i.i165.i.preheader
                                        ;   in Loop: Header=BB0_62 Depth=3
	v_add_nc_u32_e32 v58, 8, v59
	s_mov_b32 s13, 0
.LBB0_69:                               ; %.preheader.i.i.i.i165.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_62 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v59, v50
	v_sub_f32_e32 v50, v50, v59
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v59, v58
	v_cmp_gt_f32_e32 vcc_lo, 0, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v58, -12, v59
	v_cndmask_b32_e64 v60, 0x80000000, 1.0, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, 25, v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v50, v50, v60
	s_or_b32 s13, vcc_lo, s13
	v_ldexp_f32 v50, v50, 12
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_69
; %bb.70:                               ; %Flow743
                                        ;   in Loop: Header=BB0_62 Depth=3
	s_or_b32 exec_lo, exec_lo, s13
	v_subrev_nc_u32_e32 v58, 24, v59
.LBB0_71:                               ; %Flow744
                                        ;   in Loop: Header=BB0_62 Depth=3
	s_or_b32 exec_lo, exec_lo, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v58, -11, v58
	v_and_b32_e32 v59, 0x7fffffff, v54
	v_ldexp_f32 v50, v50, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v58, v50
	v_sub_f32_e32 v50, v50, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0, v50
	v_cndmask_b32_e64 v58, 0x80000000, 1.0, vcc_lo
	v_add_f32_e32 v50, v50, v58
	v_and_b32_e32 v58, 0x80000000, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v50, v50, 3
	v_xor_b32_e32 v50, v58, v50
.LBB0_72:                               ; %Flow746
                                        ;   in Loop: Header=BB0_62 Depth=3
	s_or_b32 exec_lo, exec_lo, s11
	v_mul_f32_e32 v58, 0x4f800000, v57
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v57
	v_fmamk_f32 v63, v56, 0x3f4332bc, v53
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v57, v57, v58, vcc_lo
	v_cmp_eq_f32_e64 s12, 0, v63
	v_cmp_class_f32_e64 s37, v63, 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v58, v57
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v59, -1, v58
	v_add_nc_u32_e32 v60, 1, v58
	v_fma_f32 v61, -v59, v58, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v62, -v60, v58, v57
	v_cmp_ge_f32_e64 s11, 0, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v58, v58, v59, s11
	v_cmp_lt_f32_e64 s11, 0, v62
	v_frexp_mant_f32_e64 v59, |v63|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v58, v58, v60, s11
	v_cmp_gt_f32_e64 s11, 0x3f2aaaab, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v60, 0x37800000, v58
	v_cndmask_b32_e64 v61, 0, 1, s11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v58, v58, v60, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v57, 0x260
	v_ldexp_f32 v59, v59, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v57, v58, v57 :: v_dual_add_f32 v58, 1.0, v59
	v_add_f32_e32 v64, -1.0, v59
	v_frexp_mant_f32_e64 v60, |v57|
	v_cmp_eq_f32_e64 s14, 0, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v60
	v_cndmask_b32_e64 v62, 0, 1, vcc_lo
	v_ldexp_f32 v60, v60, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v65, 1.0, v60 :: v_dual_add_f32 v66, -1.0, v58
	v_rcp_f32_e32 v68, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v59, v59, v66
	v_rcp_f32_e32 v61, v58
	v_add_f32_e32 v70, -1.0, v65
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v62, v64, v61
	v_mul_f32_e32 v67, v58, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v58, v62, v58, -v67
	v_fmac_f32_e32 v58, v62, v59
	v_add_f32_e32 v66, -1.0, v60
	v_sub_f32_e32 v60, v60, v70
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v69, v67, v58
	v_dual_mul_f32 v59, v66, v68 :: v_dual_sub_f32 v72, v64, v69
	v_sub_f32_e32 v67, v69, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v71, v65, v59 :: v_dual_sub_f32 v64, v64, v72
	v_fma_f32 v65, v59, v65, -v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v65, v59, v60 :: v_dual_sub_f32 v60, v64, v69
	v_add_f32_e32 v64, v71, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v58, v67, v58 :: v_dual_sub_f32 v67, v64, v71
	v_add_f32_e32 v58, v58, v60
	v_sub_f32_e32 v60, v66, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v58, v72, v58
	v_sub_f32_e32 v66, v66, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v58, v61, v58 :: v_dual_sub_f32 v61, v67, v65
	v_sub_f32_e32 v64, v66, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v65, v62, v58
	v_add_f32_e32 v61, v61, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v62, v65, v62
	v_add_f32_e32 v60, v60, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v61, v65, v65 :: v_dual_sub_f32 v58, v58, v62
	v_mul_f32_e32 v60, v68, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v62, v65, v65, -v61
	v_add_f32_e32 v64, v58, v58
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v66, v59, v60
	v_sub_f32_e32 v59, v66, v59
	v_mul_f32_e32 v67, v66, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v59, v60, v59
	v_fma_f32 v68, v66, v66, -v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v69, v59, v59
	v_fmac_f32_e32 v68, v66, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v70, v67, v68
	v_dual_sub_f32 v67, v70, v67 :: v_dual_fmac_f32 v62, v65, v64
	v_fmaak_f32 v71, s18, v70, 0x3e91f4c4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v67, v68, v67 :: v_dual_add_f32 v64, v61, v62
	v_dual_fmaak_f32 v60, s18, v64, 0x3e91f4c4 :: v_dual_sub_f32 v61, v64, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v61, v62, v61 :: v_dual_fmaak_f32 v60, v64, v60, 0x3ecccdef
	v_mul_f32_e32 v69, v64, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v62, v64, v60, -v69
	v_fmac_f32_e32 v62, v61, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v60, v70, v71, 0x3ecccdef :: v_dual_add_f32 v71, v69, v62
	v_add_f32_e32 v73, 0x3f2aaaaa, v71
	v_sub_f32_e32 v69, v71, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v62, v62, v69
	v_dual_add_f32 v69, 0xbf2aaaaa, v73 :: v_dual_mul_f32 v74, v65, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v62, 0x31739010, v62 :: v_dual_sub_f32 v69, v71, v69
	v_fma_f32 v75, v64, v65, -v74
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v62, v62, v69
	v_dual_mul_f32 v72, v70, v60 :: v_dual_fmac_f32 v75, v64, v58
	v_ldexp_f32 v58, v58, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v75, v61, v65
	v_add_f32_e32 v61, v73, v62
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v68, v70, v60, -v72
	v_ldexp_f32 v65, v65, 1
	v_add_f32_e32 v77, v74, v75
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v73, v73, v61 :: v_dual_fmac_f32 v68, v67, v60
	v_frexp_exp_i32_f32_e32 v60, v63
	v_dual_add_f32 v62, v62, v73 :: v_dual_add_f32 v71, v72, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_subrev_co_ci_u32_e64 v60, s11, 0, v60, s11
	v_dual_sub_f32 v64, v71, v72 :: v_dual_add_f32 v69, 0x3f2aaaaa, v71
	v_mul_f32_e32 v72, v66, v70
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v60, v60
	v_fma_f32 v76, v70, v66, -v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v76, v70, v59
	v_mul_f32_e32 v70, v77, v61
	v_ldexp_f32 v59, v59, 1
	v_fmac_f32_e32 v76, v67, v66
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v67, v77, v61, -v70
	v_ldexp_f32 v66, v66, 1
	v_dual_fmac_f32 v67, v77, v62 :: v_dual_sub_f32 v64, v68, v64
	v_add_f32_e32 v68, 0xbf2aaaaa, v69
	v_mul_f32_e32 v62, 0x3f317218, v60
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v64, 0x31739010, v64
	v_dual_sub_f32 v68, v71, v68 :: v_dual_sub_f32 v71, v77, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v64, v64, v68
	v_sub_f32_e32 v68, v75, v71
	v_frexp_exp_i32_f32_e32 v75, v57
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v71, v69, v64
	v_fmac_f32_e32 v67, v68, v61
	v_fma_f32 v61, 0x3f317218, v60, -v62
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v69, v69, v71
	v_add_f32_e32 v73, v72, v76
	v_dual_fmac_f32 v61, 0xb102e308, v60 :: v_dual_add_f32 v64, v64, v69
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v74, v73, v71
	v_sub_f32_e32 v68, v73, v72
	v_add_f32_e32 v72, v70, v67
	v_fma_f32 v69, v73, v71, -v74
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v68, v76, v68
	v_dual_fmac_f32 v69, v73, v64 :: v_dual_sub_f32 v64, v72, v70
	v_add_f32_e32 v70, v65, v72
	v_subrev_co_ci_u32_e32 v73, vcc_lo, 0, v75, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v69, v68, v71 :: v_dual_sub_f32 v64, v67, v64
	v_sub_f32_e32 v65, v70, v65
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cvt_f32_i32_e32 v68, v73
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v63
	v_add_f32_e32 v67, v74, v69
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v58, v58, v64 :: v_dual_sub_f32 v65, v72, v65
	v_dual_mul_f32 v71, 0x3f317218, v68 :: v_dual_add_f32 v60, v66, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v58, v58, v65
	v_fma_f32 v72, 0x3f317218, v68, -v71
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v65, v60, v66
	v_sub_f32_e32 v65, v67, v65
	v_add_f32_e32 v66, v62, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v62, v66, v62
	v_sub_f32_e32 v61, v61, v62
	v_sub_f32_e32 v64, v67, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v64, v69, v64 :: v_dual_add_f32 v69, v70, v58
	v_dual_add_f32 v59, v59, v64 :: v_dual_add_f32 v64, v66, v69
	v_fmac_f32_e32 v72, 0xb102e308, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v68, v69, v70 :: v_dual_add_f32 v59, v59, v65
	v_sub_f32_e32 v65, v64, v66
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v67, v71, v72
	v_dual_sub_f32 v58, v58, v68 :: v_dual_sub_f32 v73, v64, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v65, v69, v65 :: v_dual_sub_f32 v68, v67, v71
	v_dual_add_f32 v71, v61, v58 :: v_dual_sub_f32 v66, v66, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v65, v65, v66 :: v_dual_sub_f32 v66, v72, v68
	v_sub_f32_e32 v72, v71, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v65, v71, v65 :: v_dual_add_f32 v70, v60, v59
	v_sub_f32_e32 v58, v58, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v62, v67, v70
	v_sub_f32_e32 v60, v70, v60
	v_sub_f32_e32 v69, v62, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v59, v59, v60 :: v_dual_sub_f32 v68, v62, v69
	v_sub_f32_e32 v60, v70, v69
	v_dual_add_f32 v70, v66, v59 :: v_dual_sub_f32 v67, v67, v68
	v_sub_f32_e32 v68, v71, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v60, v60, v67 :: v_dual_sub_f32 v67, v70, v66
	v_sub_f32_e32 v61, v61, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_add_f32 v60, v70, v60 :: v_dual_sub_f32 v59, v59, v67
	v_add_f32_e32 v69, v64, v65
	v_add_f32_e32 v58, v58, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v64, v69, v64
	v_dual_sub_f32 v61, v65, v64 :: v_dual_sub_f32 v64, v70, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v58, v58, v61
	v_sub_f32_e32 v61, v66, v64
	v_cndmask_b32_e64 v64, 0x41000000, 1.0, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v57
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v66, v69, v58 :: v_dual_add_f32 v59, v59, v61
	v_mul_f32_e32 v71, 0.5, v64
	v_trunc_f32_e32 v74, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v61, v66, v69
	v_add_f32_e32 v65, v62, v60
	v_trunc_f32_e32 v75, v71
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v58, v58, v61
	v_sub_f32_e32 v62, v65, v62
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_neq_f32_e64 s11, v75, v71
	v_sub_f32_e32 v60, v60, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v62, v64, v66 :: v_dual_add_f32 v59, v59, v60
	v_fma_f32 v60, v64, v66, -v62
	v_cndmask_b32_e64 v66, 0x41000000, 1.0, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v62, 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v61, v65, v59 :: v_dual_fmac_f32 v60, v64, v58
	v_sub_f32_e32 v58, v61, v65
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v65, v66, v61
	v_dual_add_f32 v67, v62, v60 :: v_dual_sub_f32 v58, v59, v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v59, v66, v61, -v65
	v_cndmask_b32_e32 v61, v67, v62, vcc_lo
	v_sub_f32_e32 v62, v67, v62
	v_trunc_f32_e32 v67, v66
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v59, v66, v58
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v61
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v60, v60, v62
	v_cmp_neq_f32_e64 s13, 0x7f800000, |v61|
	v_add_f32_e32 v68, v65, v59
	v_cndmask_b32_e64 v58, 0, 0x37000000, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v65, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v60, 0, v60, s13
	v_dual_sub_f32 v69, v61, v58 :: v_dual_cndmask_b32 v70, v68, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v61, v68, v65 :: v_dual_add_f32 v58, v58, v60
	v_mul_f32_e32 v72, 0x3fb8aa3b, v69
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v70
	v_cmp_ngt_f32_e64 s13, 0xc2ce8ed0, v69
	v_sub_f32_e32 v59, v59, v61
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f32 v76, 0x3fb8aa3b, v69, -v72
	v_cndmask_b32_e64 v73, 0, 0x37000000, vcc_lo
	v_rndne_f32_e32 v77, v72
	v_cmp_eq_f32_e32 vcc_lo, v74, v64
	v_fmac_f32_e32 v76, 0x32a5705f, v69
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v78, v70, v73
	v_sub_f32_e32 v64, v72, v77
	v_cvt_i32_f32_e32 v77, v77
	s_and_b32 s11, vcc_lo, s11
	v_cndmask_b32_e64 v72, 0x7f800000, 0, s12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v71, 0x3fb8aa3b, v78 :: v_dual_add_f32 v64, v64, v76
	v_cndmask_b32_e64 v74, 1.0, v63, s11
	v_cndmask_b32_e64 v79, 0, v63, s11
	v_cmp_eq_f32_e64 s11, v67, v66
	v_fma_f32 v75, 0x3fb8aa3b, v78, -v71
	v_rndne_f32_e32 v76, v71
	v_exp_f32_e32 v64, v64
	v_bfi_b32 v72, 0x7fffffff, v72, v79
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v75, 0x32a5705f, v78
	v_sub_f32_e32 v71, v71, v76
	v_cvt_i32_f32_e32 v65, v76
	v_add_f32_e32 v76, 0x41f00000, v63
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_add_f32_e32 v71, v71, v75
	v_ldexp_f32 v62, v64, v77
	v_mul_f32_e32 v75, 0.5, v66
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v64, v71
	v_cndmask_b32_e64 v62, 0, v62, s13
	v_cmp_nlt_f32_e64 s13, 0x42b17218, v69
	v_add_f32_e32 v69, 0x41f00000, v54
	v_sub_f32_e32 v71, 0x41f00000, v54
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(TRANS32_DEP_1)
	v_cndmask_b32_e64 v60, 0x7f800000, v62, s13
	v_cmp_neq_f32_e64 s13, 0x7f800000, |v70|
	v_trunc_f32_e32 v62, v75
	v_ldexp_f32 v61, v64, v65
	v_add_f32_e32 v70, 0.5, v55
	v_fma_f32 v58, v60, v58, v60
	v_cndmask_b32_e64 v59, 0, v59, s13
	v_cmp_ngt_f32_e64 s13, 0xc2ce8ed0, v78
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v59, v73, v59
	v_cndmask_b32_e64 v61, 0, v61, s13
	v_cmp_eq_f32_e64 s13, 0x7f800000, v60
	v_add_f32_e32 v73, 0xc1880000, v55
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v58, v58, v60, s13
	v_cmp_nlt_f32_e64 s13, 0x42b17218, v78
	v_bfi_b32 v58, 0x7fffffff, v58, v74
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v60, 0x7f800000, v61, s13
	v_cmp_neq_f32_e64 s13, v62, v75
	v_cndmask_b32_e64 v61, 0x7f800000, 0, s14
	v_sub_f32_e32 v74, 0x41c80000, v54
	v_cndmask_b32_e32 v65, 0x7fc00000, v58, vcc_lo
	v_fma_f32 v59, v60, v59, v60
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v60
	s_and_b32 s11, s11, s13
	v_sub_f32_e32 v75, 0x41a00000, v55
	v_cndmask_b32_e64 v62, 1.0, v57, s11
	v_cndmask_b32_e64 v64, 0, v57, s11
	v_cndmask_b32_e32 v59, v59, v60, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v63
	v_cmp_class_f32_e64 s11, v57, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_bfi_b32 v60, 0x7fffffff, v61, v64
	v_bfi_b32 v59, 0x7fffffff, v59, v62
	v_cndmask_b32_e32 v58, v58, v65, vcc_lo
	s_or_b32 vcc_lo, s12, s37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v58, v58, v72, vcc_lo
	s_or_b32 vcc_lo, s14, s11
	v_dual_add_f32 v72, 0x41c80000, v54 :: v_dual_cndmask_b32 v59, v59, v60
	v_cmp_o_f32_e32 vcc_lo, v63, v63
	v_cndmask_b32_e32 v58, 0x7fc00000, v58, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v57, v57
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v57, 0x7fc00000, v59, vcc_lo
	v_add_f32_e32 v57, v58, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f32_e64 v58, |v57|
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v58
	v_cndmask_b32_e64 v59, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v58, v58, v59
	v_add_f32_e32 v59, 1.0, v58
	v_add_f32_e32 v61, -1.0, v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v60, v59
	v_add_f32_e32 v64, -1.0, v59
	v_sub_f32_e32 v58, v58, v64
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v62, v61, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v65, v59, v62
	v_fma_f32 v59, v62, v59, -v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v59, v62, v58
	v_add_f32_e32 v58, v65, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v64, v61, v58 :: v_dual_sub_f32 v65, v58, v65
	v_sub_f32_e32 v61, v61, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v59, v65, v59
	v_sub_f32_e32 v58, v61, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v58, v59, v58
	v_add_f32_e32 v58, v64, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v58, v60, v58
	v_add_f32_e32 v59, v62, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v60, v59, v62
	v_dual_mul_f32 v61, v59, v59 :: v_dual_sub_f32 v58, v58, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v60, v59, v59, -v61
	v_add_f32_e32 v62, v58, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v60, v59, v62
	v_add_f32_e32 v62, v61, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v64, s18, v62, 0x3e91f4c4 :: v_dual_sub_f32 v61, v62, v61
	v_dual_mul_f32 v67, v59, v62 :: v_dual_fmaak_f32 v64, v62, v64, 0x3ecccdef
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v60, v60, v61
	v_fma_f32 v68, v62, v59, -v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v65, v62, v64
	v_fmac_f32_e32 v68, v62, v58
	v_ldexp_f32 v58, v58, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v61, v62, v64, -v65
	v_fmac_f32_e32 v68, v60, v59
	v_ldexp_f32 v59, v59, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v61, v60, v64
	v_add_f32_e32 v62, v67, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v64, v65, v61
	v_dual_sub_f32 v65, v64, v65 :: v_dual_add_f32 v66, 0x3f2aaaaa, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v61, v61, v65
	v_add_f32_e32 v65, 0xbf2aaaaa, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v61, 0x31739010, v61
	v_sub_f32_e32 v64, v64, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v61, v61, v64
	v_add_f32_e32 v60, v66, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v64, v66, v60
	v_mul_f32_e32 v65, v62, v60
	v_dual_sub_f32 v66, v62, v67 :: v_dual_add_f32 v61, v61, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v64, v62, v60, -v65
	v_sub_f32_e32 v66, v68, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v64, v62, v61
	v_frexp_exp_i32_f32_e32 v61, v57
	v_fmac_f32_e32 v64, v66, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v60, vcc_lo, 0, v61, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v57
	v_add_f32_e32 v61, v65, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v60, v60
	v_add_f32_e32 v62, v59, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v65, v61, v65 :: v_dual_mul_f32 v66, 0x3f317218, v60
	v_dual_sub_f32 v59, v62, v59 :: v_dual_sub_f32 v64, v64, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v65, 0x3f317218, v60, -v66
	v_dual_sub_f32 v59, v61, v59 :: v_dual_add_f32 v58, v58, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v65, 0xb102e308, v60 :: v_dual_add_f32 v58, v58, v59
	v_add_f32_e32 v59, v66, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v60, v62, v58
	v_sub_f32_e32 v66, v59, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v61, v59, v60 :: v_dual_sub_f32 v62, v60, v62
	v_sub_f32_e32 v65, v65, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v64, v61, v59
	v_dual_sub_f32 v58, v58, v62 :: v_dual_sub_f32 v67, v61, v64
	v_sub_f32_e32 v60, v60, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v62, v65, v58 :: v_dual_sub_f32 v59, v59, v67
	v_dual_add_f32 v59, v60, v59 :: v_dual_sub_f32 v60, v62, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v59, v62, v59
	v_sub_f32_e32 v62, v62, v60
	v_sub_f32_e32 v58, v58, v60
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v64, v61, v59
	v_dual_sub_f32 v60, v65, v62 :: v_dual_sub_f32 v61, v64, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v58, v58, v60
	v_cndmask_b32_e64 v60, 0x3e000000, 1.0, vcc_lo
	v_sub_f32_e32 v59, v59, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v58, v58, v59
	v_add_f32_e32 v59, v64, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v61, v59, v64 :: v_dual_mul_f32 v62, v60, v59
	v_sub_f32_e32 v58, v58, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v59, v60, v59, -v62
	v_cmp_class_f32_e64 vcc_lo, v62, 0x204
	v_fmac_f32_e32 v59, v60, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v58, v62, v59
	v_cndmask_b32_e32 v61, v58, v62, vcc_lo
	v_sub_f32_e32 v58, v58, v62
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v61
	v_dual_sub_f32 v58, v59, v58 :: v_dual_sub_f32 v59, 0x41f00000, v63
	v_cndmask_b32_e64 v64, 0, 0x37000000, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v54, 0x1f8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_min_f32_e32 v59, v76, v59
	v_dual_sub_f32 v65, v61, v64 :: v_dual_cndmask_b32 v50, 0x7fc00000, v50
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v61|
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v66, 0x3fb8aa3b, v65
	v_cndmask_b32_e32 v58, 0, v58, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v65
	v_fma_f32 v67, 0x3fb8aa3b, v65, -v66
	v_rndne_f32_e32 v68, v66
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v58, v64, v58
	v_add_f32_e32 v64, 0x41c80000, v63
	v_dual_fmac_f32 v67, 0x32a5705f, v65 :: v_dual_sub_f32 v66, v66, v68
	v_cvt_i32_f32_e32 v62, v68
	v_add_f32_e32 v68, 0xc1940000, v55
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v66, v66, v67
	v_sub_f32_e32 v67, 0x41900000, v55
	v_exp_f32_e32 v66, v66
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v62, v66, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v66, 0.5, v60 :: v_dual_cndmask_b32 v61, 0, v62
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v65
	v_trunc_f32_e32 v62, v60
	v_trunc_f32_e32 v77, v66
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v61, 0x7f800000, v61, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, v62, v60
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_neq_f32_e64 s11, v77, v66
	v_min_f32_e32 v60, v69, v71
	v_min_f32_e32 v62, v70, v67
	v_fma_f32 v58, v61, v58, v61
	v_cmp_eq_f32_e64 s12, 0x7f800000, v61
	s_and_b32 s11, vcc_lo, s11
	v_add_f32_e32 v67, 0xbfc00000, v50
	v_cndmask_b32_e64 v65, 1.0, v57, s11
	v_sub_f32_e32 v50, 0x40d00000, v50
	v_cndmask_b32_e64 v58, v58, v61, s12
	v_cmp_eq_f32_e64 s12, 0, v57
	v_cndmask_b32_e64 v69, 0, v57, s11
	v_cmp_class_f32_e64 s11, v57, 0x204
	v_sub_f32_e32 v61, 0x41c80000, v63
	v_bfi_b32 v58, 0x7fffffff, v58, v65
	v_cndmask_b32_e64 v65, 0x7f800000, 0, s12
	v_min_f32_e32 v50, v67, v50
	v_min_f32_e32 v66, v72, v74
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_min_f32 v70, v73, v75 :: v_dual_cndmask_b32 v71, 0x7fc00000, v58
	v_cmp_gt_f32_e32 vcc_lo, 0, v57
	v_bfi_b32 v65, 0x7fffffff, v65, v69
	v_min_f32_e32 v61, v64, v61
	v_max3_f32 v50, -v50, -v68, -v75
	v_min3_f32 v59, v60, v62, v59
	v_cndmask_b32_e32 v58, v58, v71, vcc_lo
	s_or_b32 vcc_lo, s12, s11
	v_min3_f32 v60, v66, v70, v61
	v_max_f32_e64 v50, v50, -v61
	s_cmpk_lt_u32 s35, 0x63
	v_cndmask_b32_e32 v58, v58, v65, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v57, v57
	s_cselect_b32 s13, -1, 0
	v_maxmin_f32 v50, v59, v60, v50
	s_mov_b32 s12, -1
	v_add_f32_e32 v58, -0.5, v58
	s_or_b32 s36, s36, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v57, 0x7fc00000, v58, vcc_lo
	v_sub_f32_e32 v58, 0x419f3333, v55
	v_cmp_lt_f32_e32 vcc_lo, v50, v57
	v_cndmask_b32_e32 v50, v57, v50, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e32 vcc_lo, v58, v50
	v_cndmask_b32_e32 v50, v50, v58, vcc_lo
	v_cmp_ngt_f32_e64 s11, 0x3c23d70a, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s11, s11, s13
                                        ; implicit-def: $sgpr13
	s_and_saveexec_b32 s14, s11
; %bb.73:                               ;   in Loop: Header=BB0_62 Depth=3
	v_add_f32_e32 v56, v56, v50
	s_add_i32 s35, s35, 1
	s_mov_b32 s13, 0
	s_and_not1_b32 s36, s36, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ngt_f32_e64 s11, 0x42c80000, v56
	s_or_not1_b32 s12, s11, exec_lo
; %bb.74:                               ; %Flow747
                                        ;   in Loop: Header=BB0_62 Depth=3
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s11, exec_lo, s12
	s_or_b32 s33, s11, s33
	s_and_not1_b32 s11, s34, exec_lo
	s_and_b32 s12, s36, exec_lo
	s_and_not1_b32 s14, s30, exec_lo
	s_or_b32 s34, s11, s12
	s_and_b32 s11, s13, exec_lo
	s_and_not1_b32 s12, s31, exec_lo
	s_and_b32 s13, vcc_lo, exec_lo
	s_or_b32 s30, s14, s11
	s_or_b32 s31, s12, s13
	s_and_not1_b32 exec_lo, exec_lo, s33
	s_cbranch_execnz .LBB0_62
; %bb.75:                               ; %loop.exit.guard722
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s33
	v_dual_mov_b32 v53, v32 :: v_dual_mov_b32 v56, v33
	v_mov_b32_e32 v58, v34
	s_and_saveexec_b32 s11, s34
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s14, exec_lo, s11
	s_cbranch_execz .LBB0_107
; %bb.76:                               ;   in Loop: Header=BB0_4 Depth=2
	v_dual_add_f32 v52, 0x3c23d70a, v54 :: v_dual_add_f32 v51, 0, v55
	v_mov_b32_e32 v62, 0x4e6e6b28
	s_mov_b32 s11, -4
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@lo+16
	s_addc_u32 s13, s13, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@hi+24
.LBB0_77:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_u32 s34, s12, -12
	s_addc_u32 s35, s13, -1
	s_add_i32 s11, s11, 4
	s_load_b128 s[36:39], s[34:35], 0x0
	s_add_u32 s12, s12, 16
	s_addc_u32 s13, s13, 0
	s_cmp_gt_u32 s11, 35
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v53, s37, 0.5
	v_mul_f32_e64 v56, s36, 0.5
	v_fma_f32 v57, s37, 0.5, -v51
	v_fma_f32 v59, s36, 0.5, -v52
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v58, s39, 0.5, -v53
	v_fma_f32 v60, s38, 0.5, -v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v57, v57, v58
	v_mul_f32_e32 v61, v58, v58
	v_fmac_f32_e32 v57, v59, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v61, v60, v60
	v_add_f32_e32 v57, 0, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v59, null, v61, v61, v57
	v_div_scale_f32 v66, vcc_lo, v57, v61, v57
	v_rcp_f32_e32 v64, v59
	s_waitcnt_depctr 0xfff
	v_fma_f32 v65, -v59, v64, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v64, v65, v64
	v_mul_f32_e32 v65, v66, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v67, -v59, v65, v66
	v_fmac_f32_e32 v65, v67, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v59, -v59, v65, v66
	v_div_fmas_f32 v59, v59, v64, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v57, v59, v61, v57
	v_min_f32_e32 v57, 0, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_f32_e64 v57, -v57, 1.0
	v_fmac_f32_e32 v53, v58, v57
	v_fmac_f32_e32 v56, v60, v57
	v_fma_f32 v57, v57, 0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v53, v51, v53 :: v_dual_sub_f32 v56, v52, v56
	v_sub_f32_e32 v57, 0, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v53, v53, v53
	v_dual_fmac_f32 v53, v56, v56 :: v_dual_max_f32 v56, v62, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v53, v57, v57
	v_min_f32_e32 v62, v56, v53
	s_cbranch_scc0 .LBB0_77
; %bb.78:                               ;   in Loop: Header=BB0_4 Depth=2
	v_cmp_nlt_f32_e64 s11, 0x41000000, |v52|
                                        ; implicit-def: $vgpr53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s12, s11
	s_xor_b32 s11, exec_lo, s12
; %bb.79:                               ;   in Loop: Header=BB0_4 Depth=2
	v_cmp_neq_f32_e64 s12, 0x41000000, |v52|
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v53, 0, |v52|, s12
; %bb.80:                               ; %Flow740
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_and_not1_saveexec_b32 s11, s11
	s_cbranch_execz .LBB0_86
; %bb.81:                               ;   in Loop: Header=BB0_4 Depth=2
	v_frexp_exp_i32_f32_e32 v57, v52
	v_frexp_mant_f32_e64 v53, |v52|
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v56, -4, v57
	v_ldexp_f32 v53, v53, 12
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_lt_i32_e32 12, v56
	s_cbranch_execz .LBB0_85
; %bb.82:                               ; %.preheader.i.i.i41.i163.i.preheader
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v56, 8, v57
	s_mov_b32 s13, 0
.LBB0_83:                               ; %.preheader.i.i.i41.i163.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v57, v53
	v_sub_f32_e32 v53, v53, v57
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v57, v56
	v_cmp_gt_f32_e32 vcc_lo, 0, v53
	v_cndmask_b32_e64 v58, 0x80000000, 1.0, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v53, v53, v58 :: v_dual_add_nc_u32 v56, -12, v57
	v_cmp_gt_u32_e32 vcc_lo, 25, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ldexp_f32 v53, v53, 12
	s_or_b32 s13, vcc_lo, s13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_83
; %bb.84:                               ; %Flow738
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s13
	v_subrev_nc_u32_e32 v56, 24, v57
.LBB0_85:                               ; %Flow739
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v56, -11, v56
	v_and_b32_e32 v57, 0x7fffffff, v52
	v_ldexp_f32 v53, v53, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v56, v53
	v_sub_f32_e32 v53, v53, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0, v53
	v_cndmask_b32_e64 v56, 0x80000000, 1.0, vcc_lo
	v_dual_add_f32 v53, v53, v56 :: v_dual_and_b32 v56, 0x80000000, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v53, v53, 3
	v_xor_b32_e32 v53, v56, v53
.LBB0_86:                               ; %Flow741
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s11
	v_dual_add_f32 v58, 0, v54 :: v_dual_add_f32 v57, 0x3c23d70a, v55
	v_mov_b32_e32 v61, 0x4e6e6b28
	s_mov_b32 s11, -4
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@lo+16
	s_addc_u32 s13, s13, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@hi+24
.LBB0_87:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_u32 s34, s12, -12
	s_addc_u32 s35, s13, -1
	s_add_i32 s11, s11, 4
	s_load_b128 s[36:39], s[34:35], 0x0
	s_add_u32 s12, s12, 16
	s_addc_u32 s13, s13, 0
	s_cmp_gt_u32 s11, 35
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v54, s37, 0.5
	v_mul_f32_e64 v55, s36, 0.5
	v_fma_f32 v56, s37, 0.5, -v57
	v_fma_f32 v60, s36, 0.5, -v58
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v59, s39, 0.5, -v54
	v_fma_f32 v64, s38, 0.5, -v55
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v56, v56, v59
	v_dual_mul_f32 v65, v59, v59 :: v_dual_fmac_f32 v56, v60, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v65, v64, v64
	v_add_f32_e32 v56, 0, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v60, null, v65, v65, v56
	v_rcp_f32_e32 v66, v60
	s_waitcnt_depctr 0xfff
	v_fma_f32 v67, -v60, v66, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v66, v67, v66
	v_div_scale_f32 v68, vcc_lo, v56, v65, v56
	v_mul_f32_e32 v67, v68, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v69, -v60, v67, v68
	v_fmac_f32_e32 v67, v69, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v60, -v60, v67, v68
	v_div_fmas_f32 v60, v60, v66, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v56, v60, v65, v56
	v_min_f32_e32 v56, 0, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_f32_e64 v56, -v56, 1.0
	v_fmac_f32_e32 v54, v59, v56
	v_fmac_f32_e32 v55, v64, v56
	v_fma_f32 v56, v56, 0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v54, v57, v54 :: v_dual_sub_f32 v55, v58, v55
	v_mul_f32_e32 v54, v54, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v54, v55, v55 :: v_dual_max_f32 v55, v61, v61
	v_sub_f32_e32 v56, 0, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v54, v56, v56
	v_min_f32_e32 v61, v55, v54
	s_cbranch_scc0 .LBB0_87
; %bb.88:                               ;   in Loop: Header=BB0_4 Depth=2
	v_cmp_nlt_f32_e64 s11, 0x41000000, |v58|
                                        ; implicit-def: $vgpr60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s12, s11
	s_xor_b32 s12, exec_lo, s12
; %bb.89:                               ;   in Loop: Header=BB0_4 Depth=2
	v_cmp_neq_f32_e64 s13, 0x41000000, |v58|
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v60, 0, |v58|, s13
; %bb.90:                               ; %Flow736
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_saveexec_b32 s12, s12
	v_frexp_mant_f32_e64 v54, |v58|
	v_frexp_exp_i32_f32_e32 v65, v58
	v_and_b32_e32 v55, 0x7fffffff, v58
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f32 v56, v54, 12
	v_add_nc_u32_e32 v59, -4, v65
	s_xor_b32 exec_lo, exec_lo, s12
	s_cbranch_execz .LBB0_96
; %bb.91:                               ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v60, -4, v65
	v_ldexp_f32 v54, v54, 12
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_lt_i32_e32 12, v60
	s_cbranch_execz .LBB0_95
; %bb.92:                               ; %.preheader.i.i.i57.i161.i.preheader
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v60, 8, v65
	s_mov_b32 s33, 0
.LBB0_93:                               ; %.preheader.i.i.i57.i161.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v64, v54
	v_sub_f32_e32 v54, v54, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v64, v60
	v_cmp_gt_f32_e32 vcc_lo, 0, v54
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v60, -12, v64
	v_cndmask_b32_e64 v66, 0x80000000, 1.0, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, 25, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v54, v54, v66
	s_or_b32 s33, vcc_lo, s33
	v_ldexp_f32 v54, v54, 12
	s_and_not1_b32 exec_lo, exec_lo, s33
	s_cbranch_execnz .LBB0_93
; %bb.94:                               ; %Flow734
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s33
	v_subrev_nc_u32_e32 v60, 24, v64
.LBB0_95:                               ; %Flow735
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v60, -11, v60
	v_ldexp_f32 v54, v54, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v60, v54
	v_sub_f32_e32 v54, v54, v60
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0, v54
	v_cndmask_b32_e64 v60, 0x80000000, 1.0, vcc_lo
	v_add_f32_e32 v54, v54, v60
	v_and_b32_e32 v60, 0x80000000, v55
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v54, v54, 3
	v_xor_b32_e32 v60, v60, v54
.LBB0_96:                               ; %Flow737
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s12
	v_mov_b32_e32 v64, 0x4e6e6b28
	s_mov_b32 s33, -4
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@lo+16
	s_addc_u32 s13, s13, __const._Z13QueryDatabaseRK3VecRi.lines@rel32@hi+24
.LBB0_97:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_u32 s34, s12, -12
	s_addc_u32 s35, s13, -1
	s_add_i32 s33, s33, 4
	s_load_b128 s[36:39], s[34:35], 0x0
	s_add_u32 s12, s12, 16
	s_addc_u32 s13, s13, 0
	s_cmp_gt_u32 s33, 35
	v_max_f32_e32 v64, v64, v64
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v54, s37, 0.5
	v_mul_f32_e64 v66, s36, 0.5
	v_fma_f32 v67, s37, 0.5, -v51
	v_fma_f32 v69, s36, 0.5, -v58
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v68, s39, 0.5, -v54
	v_fma_f32 v70, s38, 0.5, -v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v67, v67, v68
	v_mul_f32_e32 v71, v68, v68
	v_fmac_f32_e32 v67, v69, v70
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v71, v70, v70
	v_add_f32_e32 v67, 0, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v69, null, v71, v71, v67
	v_rcp_f32_e32 v72, v69
	s_waitcnt_depctr 0xfff
	v_fma_f32 v73, -v69, v72, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v72, v73, v72
	v_div_scale_f32 v74, vcc_lo, v67, v71, v67
	v_mul_f32_e32 v73, v74, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v75, -v69, v73, v74
	v_fmac_f32_e32 v73, v75, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v69, -v69, v73, v74
	v_div_fmas_f32 v69, v69, v72, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v67, v69, v71, v67
	v_min_f32_e32 v67, 0, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_f32_e64 v67, -v67, 1.0
	v_fmac_f32_e32 v54, v68, v67
	v_fmac_f32_e32 v66, v70, v67
	v_fma_f32 v67, v67, 0, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v54, v51, v54
	v_dual_sub_f32 v66, v58, v66 :: v_dual_sub_f32 v67, 0, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v54, v54, v54
	v_fmac_f32_e32 v54, v66, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v54, v67, v67
	v_min_f32_e32 v64, v64, v54
	s_cbranch_scc0 .LBB0_97
; %bb.98:                               ;   in Loop: Header=BB0_4 Depth=2
                                        ; implicit-def: $vgpr54
	s_and_saveexec_b32 s12, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s11, exec_lo, s12
; %bb.99:                               ;   in Loop: Header=BB0_4 Depth=2
	v_cmp_neq_f32_e64 s12, 0x41000000, |v58|
                                        ; implicit-def: $vgpr55
                                        ; implicit-def: $vgpr56
                                        ; implicit-def: $vgpr59
                                        ; implicit-def: $vgpr65
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v54, 0, |v58|, s12
; %bb.100:                              ; %Flow730
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_and_not1_saveexec_b32 s11, s11
	s_cbranch_execz .LBB0_106
; %bb.101:                              ;   in Loop: Header=BB0_4 Depth=2
	s_mov_b32 s12, exec_lo
	v_cmpx_lt_i32_e32 12, v59
	s_cbranch_execz .LBB0_105
; %bb.102:                              ; %.preheader.i.i.i73.i159.i.preheader
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v54, 8, v65
	s_mov_b32 s13, 0
.LBB0_103:                              ; %.preheader.i.i.i73.i159.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v59, v56
	v_dual_sub_f32 v56, v56, v59 :: v_dual_mov_b32 v59, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f32_e32 vcc_lo, 0, v56
	v_add_nc_u32_e32 v54, -12, v59
	v_cndmask_b32_e64 v65, 0x80000000, 1.0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, 25, v54
	v_add_f32_e32 v56, v56, v65
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f32 v56, v56, 12
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_103
; %bb.104:                              ; %Flow728
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s13
	v_subrev_nc_u32_e32 v59, 24, v59
.LBB0_105:                              ; %Flow729
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v54, -11, v59
	v_and_b32_e32 v55, 0x80000000, v55
	v_ldexp_f32 v54, v56, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v56, v54
	v_sub_f32_e32 v54, v54, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0, v54
	v_cndmask_b32_e64 v56, 0x80000000, 1.0, vcc_lo
	v_add_f32_e32 v54, v54, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v54, v54, 3
	v_xor_b32_e32 v54, v55, v54
.LBB0_106:                              ; %Flow731
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s11
	v_add_f32_e32 v55, 0, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v55
	v_frexp_mant_f32_e64 v59, |v55|
	v_cndmask_b32_e64 v56, 0x41000000, 1.0, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v59
	v_cndmask_b32_e64 v65, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v59, v59, v65
	v_add_f32_e32 v66, 1.0, v59
	v_add_f32_e32 v65, -1.0, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v67, -1.0, v66
	v_sub_f32_e32 v59, v59, v67
	v_rcp_f32_e32 v67, v66
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v68, v65, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v69, v66, v68
	v_fma_f32 v66, v68, v66, -v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v66, v68, v59
	v_add_f32_e32 v59, v69, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v70, v65, v59 :: v_dual_sub_f32 v69, v59, v69
	v_sub_f32_e32 v65, v65, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v59, v65, v59
	v_sub_f32_e32 v65, v69, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v59, v65, v59
	v_add_f32_e32 v59, v70, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v59, v67, v59
	v_add_f32_e32 v65, v68, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v66, v65, v68
	v_cmp_gt_f32_e64 s12, 0, v55
	v_dual_sub_f32 v59, v59, v66 :: v_dual_mul_f32 v66, v65, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v68, v59, v59
	v_fma_f32 v67, v65, v65, -v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v67, v65, v68
	v_add_f32_e32 v68, v66, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v66, v68, v66 :: v_dual_fmaak_f32 v69, s18, v68, 0x3e91f4c4
	v_dual_sub_f32 v66, v67, v66 :: v_dual_mul_f32 v67, v65, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v69, v68, v69, 0x3ecccdef
	v_fma_f32 v70, v68, v65, -v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v70, v68, v59
	v_ldexp_f32 v59, v59, 1
	v_fmac_f32_e32 v70, v66, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v71, v67, v70
	v_sub_f32_e32 v67, v71, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v67, v70, v67 :: v_dual_mul_f32 v70, v68, v69
	v_fma_f32 v68, v68, v69, -v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v68, v66, v69
	v_add_f32_e32 v66, v70, v68
	v_ldexp_f32 v65, v65, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v69, 0x3f2aaaaa, v66
	v_sub_f32_e32 v70, v66, v70
	v_sub_f32_e32 v68, v68, v70
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v70, 0xbf2aaaaa, v69
	v_add_f32_e32 v68, 0x31739010, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v66, v66, v70
	v_add_f32_e32 v66, v68, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v69, v66
	v_sub_f32_e32 v69, v69, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v66, v66, v69 :: v_dual_mul_f32 v69, v71, v68
	v_fma_f32 v70, v71, v68, -v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v70, v71, v66
	v_frexp_exp_i32_f32_e32 v66, v55
	v_fmac_f32_e32 v70, v67, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v66, vcc_lo, 0, v66, vcc_lo
	v_cvt_f32_i32_e32 v66, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v67, 0x3f317218, v66
	v_fma_f32 v68, 0x3f317218, v66, -v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v68, 0xb102e308, v66
	v_add_f32_e32 v66, v67, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v67, v66, v67
	v_dual_sub_f32 v67, v68, v67 :: v_dual_add_f32 v68, v69, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v68, v69
	v_dual_sub_f32 v69, v70, v69 :: v_dual_add_f32 v70, v65, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v59, v59, v69
	v_sub_f32_e32 v65, v70, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v65, v68, v65
	v_add_f32_e32 v59, v59, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v65, v70, v59
	v_sub_f32_e32 v68, v65, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v59, v59, v68 :: v_dual_add_f32 v68, v66, v65
	v_sub_f32_e32 v69, v68, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v70, v68, v69
	v_dual_sub_f32 v65, v65, v69 :: v_dual_sub_f32 v66, v66, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v65, v65, v66 :: v_dual_add_f32 v66, v67, v59
	v_sub_f32_e32 v69, v66, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v70, v66, v69
	v_add_f32_e32 v65, v66, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v67, v67, v70 :: v_dual_add_f32 v66, v68, v65
	v_sub_f32_e32 v59, v59, v69
	v_add_f32_e32 v59, v59, v67
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v67, v66, v68
	v_sub_f32_e32 v65, v65, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v59, v59, v65
	v_add_f32_e32 v65, v66, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v66, v65, v66
	v_dual_sub_f32 v59, v59, v66 :: v_dual_mul_f32 v66, v56, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v65, v56, v65, -v66
	v_cmp_class_f32_e64 vcc_lo, v66, 0x204
	v_fmac_f32_e32 v65, v56, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v59, v66, v65
	v_sub_f32_e32 v67, v59, v66
	v_cndmask_b32_e32 v59, v59, v66, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v65, v65, v67
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v59|
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v65, 0, v65, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v59
	v_cndmask_b32_e64 v66, 0, 0x37000000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v59, v59, v66
	v_dual_add_f32 v65, v66, v65 :: v_dual_mul_f32 v66, 0x3fb8aa3b, v59
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v67, 0x3fb8aa3b, v59, -v66
	v_rndne_f32_e32 v68, v66
	v_dual_fmac_f32 v67, 0x32a5705f, v59 :: v_dual_sub_f32 v66, v66, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v66, v66, v67
	v_cvt_i32_f32_e32 v67, v68
	v_exp_f32_e32 v66, v66
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v66, v66, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v66, 0, v66, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v59
	v_cndmask_b32_e32 v59, 0x7f800000, v66, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v65, v59, v65, v59
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v59
	v_cndmask_b32_e32 v59, v65, v59, vcc_lo
	v_trunc_f32_e32 v65, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_f32_e32 vcc_lo, v65, v56
	v_mul_f32_e32 v56, 0.5, v56
	v_trunc_f32_e32 v65, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_neq_f32_e64 s11, v65, v56
	s_and_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v56, 1.0, v55, s11
	v_cndmask_b32_e64 v65, 0, v55, s11
	v_bfi_b32 v56, 0x7fffffff, v59, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v59, 0x7fc00000, v56, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0, v55
	v_cndmask_b32_e64 v56, v56, v59, s12
	v_cndmask_b32_e64 v59, 0x7f800000, 0, vcc_lo
	v_cmp_class_f32_e64 s12, v55, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfi_b32 v59, 0x7fffffff, v59, v65
	s_or_b32 s12, vcc_lo, s12
	v_cmp_o_f32_e32 vcc_lo, v55, v55
	v_sub_f32_e32 v65, 0x41f00000, v55
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v56, v56, v59, s12
	v_cndmask_b32_e32 v59, 0x7fc00000, v56, vcc_lo
	v_add_f32_e32 v56, 0x41f00000, v55
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_min_f32 v56, v56, v65 :: v_dual_add_f32 v65, 0x41c80000, v55
	v_sub_f32_e32 v55, 0x41c80000, v55
	v_min_f32_e32 v55, v65, v55
	v_mul_f32_e32 v65, 0x4f800000, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v61, v61, v65, vcc_lo
	v_sqrt_f32_e32 v65, v61
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v66, -1, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v67, -v66, v65, v61
	v_cmp_ge_f32_e64 s11, 0, v67
	v_add_nc_u32_e32 v67, 1, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v66, v65, v66, s11
	v_fma_f32 v65, -v67, v65, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s11, 0, v65
	v_cndmask_b32_e64 v65, v66, v67, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v66, 0x37800000, v65
	v_cndmask_b32_e32 v65, v65, v66, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v61, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v61, v65, v61, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v61
	v_frexp_mant_f32_e64 v66, |v61|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v65, 0x41000000, 1.0, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v66
	v_cndmask_b32_e64 v67, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v66, v66, v67
	v_add_f32_e32 v68, 1.0, v66
	v_add_f32_e32 v67, -1.0, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v69, -1.0, v68
	v_sub_f32_e32 v66, v66, v69
	v_rcp_f32_e32 v69, v68
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v70, v67, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v71, v68, v70
	v_fma_f32 v68, v70, v68, -v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v68, v70, v66
	v_add_f32_e32 v66, v71, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v72, v67, v66 :: v_dual_sub_f32 v71, v66, v71
	v_sub_f32_e32 v67, v67, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v66, v67, v66
	v_sub_f32_e32 v67, v71, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v66, v67, v66
	v_add_f32_e32 v66, v72, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v66, v69, v66
	v_add_f32_e32 v67, v70, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v68, v67, v70
	v_sub_f32_e32 v66, v66, v68
	v_mul_f32_e32 v68, v67, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v70, v66, v66
	v_fma_f32 v69, v67, v67, -v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v69, v67, v70
	v_add_f32_e32 v70, v68, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v68, v70, v68 :: v_dual_fmaak_f32 v71, s18, v70, 0x3e91f4c4
	v_dual_sub_f32 v68, v69, v68 :: v_dual_mul_f32 v69, v67, v70
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v71, v70, v71, 0x3ecccdef
	v_fma_f32 v72, v70, v67, -v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v72, v70, v66
	v_ldexp_f32 v66, v66, 1
	v_fmac_f32_e32 v72, v68, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v73, v69, v72
	v_sub_f32_e32 v69, v73, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v69, v72, v69 :: v_dual_mul_f32 v72, v70, v71
	v_fma_f32 v70, v70, v71, -v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v70, v68, v71
	v_add_f32_e32 v68, v72, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v71, 0x3f2aaaaa, v68
	v_sub_f32_e32 v72, v68, v72
	v_sub_f32_e32 v70, v70, v72
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v72, 0xbf2aaaaa, v71
	v_cmp_class_f32_e64 s12, v61, 0x204
	v_add_f32_e32 v70, 0x31739010, v70
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v68, v68, v72
	v_add_f32_e32 v68, v70, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v70, v71, v68
	v_ldexp_f32 v67, v67, 1
	v_sub_f32_e32 v71, v71, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v68, v68, v71 :: v_dual_mul_f32 v71, v73, v70
	v_fma_f32 v72, v73, v70, -v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v72, v73, v68
	v_frexp_exp_i32_f32_e32 v68, v61
	v_fmac_f32_e32 v72, v69, v70
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v68, vcc_lo, 0, v68, vcc_lo
	v_cvt_f32_i32_e32 v68, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v69, 0x3f317218, v68
	v_fma_f32 v70, 0x3f317218, v68, -v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v70, 0xb102e308, v68
	v_add_f32_e32 v68, v69, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v68, v69
	v_dual_sub_f32 v69, v70, v69 :: v_dual_add_f32 v70, v71, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v71, v70, v71
	v_dual_sub_f32 v71, v72, v71 :: v_dual_add_f32 v72, v67, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v66, v66, v71
	v_sub_f32_e32 v67, v72, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v67, v70, v67
	v_add_f32_e32 v66, v66, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v67, v72, v66
	v_sub_f32_e32 v70, v67, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v66, v66, v70
	v_add_f32_e32 v70, v68, v67
	v_sub_f32_e32 v71, v70, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v72, v70, v71
	v_dual_sub_f32 v67, v67, v71 :: v_dual_sub_f32 v68, v68, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v67, v67, v68 :: v_dual_add_f32 v68, v69, v66
	v_sub_f32_e32 v71, v68, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v72, v68, v71
	v_add_f32_e32 v67, v68, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v69, v69, v72 :: v_dual_add_f32 v68, v70, v67
	v_sub_f32_e32 v66, v66, v71
	v_dual_add_f32 v66, v66, v69 :: v_dual_sub_f32 v69, v68, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v67, v67, v69
	v_add_f32_e32 v66, v66, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v67, v68, v66
	v_sub_f32_e32 v68, v67, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v66, v66, v68
	v_mul_f32_e32 v68, v65, v67
	v_fma_f32 v67, v65, v67, -v68
	v_cmp_class_f32_e64 vcc_lo, v68, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v67, v65, v66
	v_add_f32_e32 v66, v68, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v66, v68
	v_dual_sub_f32 v67, v67, v69 :: v_dual_cndmask_b32 v66, v66, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v66|
	v_cndmask_b32_e32 v67, 0, v67, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v66
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v68, 0, 0x37000000, vcc_lo
	v_dual_sub_f32 v66, v66, v68 :: v_dual_add_f32 v67, v68, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v68, 0x3fb8aa3b, v66
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v66
	v_fma_f32 v69, 0x3fb8aa3b, v66, -v68
	v_rndne_f32_e32 v70, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v69, 0x32a5705f, v66
	v_sub_f32_e32 v68, v68, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v68, v68, v69
	v_cvt_i32_f32_e32 v69, v70
	v_exp_f32_e32 v68, v68
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v68, v68, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v68, 0, v68, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v66
	v_cndmask_b32_e32 v66, 0x7f800000, v68, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v67, v66, v67, v66
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v66
	v_cndmask_b32_e32 v66, v67, v66, vcc_lo
	v_trunc_f32_e32 v67, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_f32_e32 vcc_lo, v67, v65
	v_mul_f32_e32 v65, 0.5, v65
	v_trunc_f32_e32 v67, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_neq_f32_e64 s11, v67, v65
	s_and_b32 vcc_lo, vcc_lo, s11
	v_cmp_eq_f32_e64 s11, 0, v61
	v_cndmask_b32_e32 v65, 1.0, v61, vcc_lo
	v_cndmask_b32_e32 v67, 0, v61, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v61, v61
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_or_b32 s12, s11, s12
	v_bfi_b32 v65, 0x7fffffff, v66, v65
	v_cndmask_b32_e64 v66, 0x7f800000, 0, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v66, 0x7fffffff, v66, v67
	v_cndmask_b32_e64 v65, v65, v66, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v61, 0x7fc00000, v65, vcc_lo
	v_add_f32_e32 v61, v59, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v61
	v_frexp_mant_f32_e64 v66, |v61|
	v_cndmask_b32_e64 v65, 0x3e000000, 1.0, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v66
	v_cndmask_b32_e64 v67, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v66, v66, v67
	v_add_f32_e32 v68, 1.0, v66
	v_add_f32_e32 v67, -1.0, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v69, -1.0, v68
	v_sub_f32_e32 v66, v66, v69
	v_rcp_f32_e32 v69, v68
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v70, v67, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v71, v68, v70
	v_fma_f32 v68, v70, v68, -v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v68, v70, v66
	v_add_f32_e32 v66, v71, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v72, v67, v66 :: v_dual_sub_f32 v71, v66, v71
	v_sub_f32_e32 v67, v67, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v66, v67, v66
	v_sub_f32_e32 v67, v71, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v66, v67, v66
	v_add_f32_e32 v66, v72, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v66, v69, v66
	v_cmp_gt_f32_e64 s12, 0, v61
	v_add_f32_e32 v67, v70, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v68, v67, v70
	v_sub_f32_e32 v66, v66, v68
	v_mul_f32_e32 v68, v67, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v70, v66, v66
	v_fma_f32 v69, v67, v67, -v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v69, v67, v70
	v_add_f32_e32 v70, v68, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v68, v70, v68
	v_dual_sub_f32 v68, v69, v68 :: v_dual_mul_f32 v69, v67, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v72, v70, v67, -v69
	v_fmac_f32_e32 v72, v70, v66
	v_fmaak_f32 v71, s18, v70, 0x3e91f4c4
	v_ldexp_f32 v66, v66, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v72, v68, v67
	v_fmaak_f32 v71, v70, v71, 0x3ecccdef
	v_ldexp_f32 v67, v67, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v73, v69, v72
	v_sub_f32_e32 v69, v73, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v69, v72, v69 :: v_dual_mul_f32 v72, v70, v71
	v_fma_f32 v70, v70, v71, -v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v70, v68, v71
	v_add_f32_e32 v68, v72, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v72, v68, v72
	v_sub_f32_e32 v70, v70, v72
	v_add_f32_e32 v71, 0x3f2aaaaa, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v70, 0x31739010, v70
	v_add_f32_e32 v72, 0xbf2aaaaa, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v68, v68, v72
	v_add_f32_e32 v68, v70, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v70, v71, v68
	v_sub_f32_e32 v71, v71, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v68, v68, v71 :: v_dual_mul_f32 v71, v73, v70
	v_fma_f32 v72, v73, v70, -v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v72, v73, v68
	v_frexp_exp_i32_f32_e32 v68, v61
	v_fmac_f32_e32 v72, v69, v70
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v68, vcc_lo, 0, v68, vcc_lo
	v_cvt_f32_i32_e32 v68, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v69, 0x3f317218, v68
	v_fma_f32 v70, 0x3f317218, v68, -v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v70, 0xb102e308, v68
	v_add_f32_e32 v68, v69, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v68, v69
	v_dual_sub_f32 v69, v70, v69 :: v_dual_add_f32 v70, v71, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v71, v70, v71
	v_dual_sub_f32 v71, v72, v71 :: v_dual_add_f32 v72, v67, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v66, v66, v71
	v_sub_f32_e32 v67, v72, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v67, v70, v67
	v_add_f32_e32 v66, v66, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v67, v72, v66
	v_sub_f32_e32 v70, v67, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v66, v66, v70
	v_add_f32_e32 v70, v68, v67
	v_sub_f32_e32 v71, v70, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v72, v70, v71
	v_dual_sub_f32 v67, v67, v71 :: v_dual_sub_f32 v68, v68, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v67, v67, v68 :: v_dual_add_f32 v68, v69, v66
	v_sub_f32_e32 v71, v68, v69
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v67, v68, v67
	v_sub_f32_e32 v72, v68, v71
	v_sub_f32_e32 v66, v66, v71
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v68, v70, v67 :: v_dual_sub_f32 v69, v69, v72
	v_dual_add_f32 v66, v66, v69 :: v_dual_sub_f32 v69, v68, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v67, v67, v69
	v_add_f32_e32 v66, v66, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v67, v68, v66
	v_sub_f32_e32 v68, v67, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v66, v66, v68
	v_mul_f32_e32 v68, v65, v67
	v_fma_f32 v67, v65, v67, -v68
	v_cmp_class_f32_e64 vcc_lo, v68, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v67, v65, v66
	v_add_f32_e32 v66, v68, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v66, v68
	v_dual_cndmask_b32 v66, v66, v68 :: v_dual_sub_f32 v67, v67, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v66|
	v_cndmask_b32_e32 v67, 0, v67, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v66
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v68, 0, 0x37000000, vcc_lo
	v_dual_sub_f32 v66, v66, v68 :: v_dual_add_f32 v67, v68, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v68, 0x3fb8aa3b, v66
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v66
	v_fma_f32 v69, 0x3fb8aa3b, v66, -v68
	v_rndne_f32_e32 v70, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v69, 0x32a5705f, v66
	v_sub_f32_e32 v68, v68, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v68, v68, v69
	v_cvt_i32_f32_e32 v69, v70
	v_sub_f32_e32 v70, 0x41a00000, v57
	v_exp_f32_e32 v68, v68
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v68, v68, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v69, 0x41c80000, v58 :: v_dual_cndmask_b32 v68, 0, v68
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v66
	v_cndmask_b32_e32 v66, 0x7f800000, v68, vcc_lo
	v_sub_f32_e32 v68, 0x41900000, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v67, v66, v67, v66
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v66
	v_cndmask_b32_e32 v66, v67, v66, vcc_lo
	v_trunc_f32_e32 v67, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_f32_e32 vcc_lo, v67, v65
	v_mul_f32_e32 v65, 0.5, v65
	v_trunc_f32_e32 v67, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_neq_f32_e64 s11, v67, v65
	s_and_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v65, 1.0, v61, s11
	v_cndmask_b32_e64 v67, 0, v61, s11
	v_bfi_b32 v65, 0x7fffffff, v66, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v66, 0x7fc00000, v65, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0, v61
	v_cndmask_b32_e64 v65, v65, v66, s12
	v_cndmask_b32_e64 v66, 0x7f800000, 0, vcc_lo
	v_cmp_class_f32_e64 s12, v61, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfi_b32 v66, 0x7fffffff, v66, v67
	s_or_b32 s12, vcc_lo, s12
	v_cmp_o_f32_e32 vcc_lo, v61, v61
	v_sub_f32_e32 v67, 0x41f00000, v58
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v65, v65, v66, s12
	v_add_f32_e32 v66, 0.5, v57
	v_dual_add_f32 v65, -0.5, v65 :: v_dual_min_f32 v66, v66, v68
	v_add_f32_e32 v68, 0xc1880000, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v61, 0x7fc00000, v65, vcc_lo
	v_add_f32_e32 v65, 0x41f00000, v58
	v_cmp_class_f32_e64 vcc_lo, v58, 0x1f8
	v_dual_min_f32 v68, v68, v70 :: v_dual_min_f32 v65, v65, v67
	v_add_f32_e32 v67, 0x41c80000, v58
	v_cndmask_b32_e32 v58, 0x7fc00000, v60, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min3_f32 v66, v65, v66, v56
	v_dual_min_f32 v67, v67, v69 :: v_dual_add_f32 v60, 0xbfc00000, v58
	v_sub_f32_e32 v58, 0x40d00000, v58
	v_add_f32_e32 v69, 0xc1940000, v57
	v_sub_f32_e32 v57, 0x419f3333, v57
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_min3_f32 v68, v67, v68, v55
	v_min_f32_e32 v58, v60, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max3_f32 v58, -v58, -v69, -v70
	v_max_f32_e64 v58, v58, -v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_maxmin_f32 v58, v66, v68, v58
	v_cmp_lt_f32_e64 s11, v58, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v66, v61, v58, s11
	v_cmp_lt_f32_e64 s11, v57, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v57, v66, v57, s11
	v_add_f32_e32 v66, 0x3c23d70a, v63
	v_cmp_gt_f32_e64 s11, 0xf800000, v64
	v_mul_f32_e32 v63, 0x4f800000, v64
	v_sub_f32_e32 v57, v57, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v63, v64, v63, s11
	v_sqrt_f32_e32 v64, v63
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v68, -1, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v69, -v68, v64, v63
	v_cmp_ge_f32_e64 s12, 0, v69
	v_add_nc_u32_e32 v69, 1, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v68, v64, v68, s12
	v_fma_f32 v64, -v69, v64, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s12, 0, v64
	v_cndmask_b32_e64 v64, v68, v69, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v68, 0x37800000, v64
	v_cndmask_b32_e64 v64, v64, v68, s11
	v_cmp_class_f32_e64 s11, v63, 0x260
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v63, v64, v63, s11
	v_cmp_eq_f32_e64 s11, 1.0, v63
	v_frexp_mant_f32_e64 v68, |v63|
	v_cmp_class_f32_e64 s13, v63, 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v64, 0x41000000, 1.0, s11
	v_cmp_gt_f32_e64 s11, 0x3f2aaaab, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v69, 0, 1, s11
	v_ldexp_f32 v68, v68, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v70, 1.0, v68
	v_add_f32_e32 v69, -1.0, v68
	v_add_f32_e32 v71, -1.0, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v68, v68, v71
	v_rcp_f32_e32 v71, v70
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v72, v69, v71
	v_mul_f32_e32 v73, v70, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v70, v72, v70, -v73
	v_fmac_f32_e32 v70, v72, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v73, v70
	v_dual_sub_f32 v74, v69, v68 :: v_dual_sub_f32 v73, v68, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v58, 0.5, v51 :: v_dual_sub_f32 v69, v69, v74
	v_sub_f32_e32 v68, v69, v68
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v73, v70
	v_add_f32_e32 v68, v69, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v74, v68
	v_mul_f32_e32 v68, v71, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v69, v72, v68
	v_sub_f32_e32 v70, v69, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v68, v68, v70
	v_mul_f32_e32 v70, v69, v69
	v_add_f32_e32 v72, v68, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v71, v69, v69, -v70
	v_fmac_f32_e32 v71, v69, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v72, v70, v71
	v_dual_sub_f32 v70, v72, v70 :: v_dual_fmaak_f32 v73, s18, v72, 0x3e91f4c4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v70, v71, v70 :: v_dual_mul_f32 v71, v69, v72
	v_fmaak_f32 v73, v72, v73, 0x3ecccdef
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v74, v72, v69, -v71
	v_fmac_f32_e32 v74, v72, v68
	v_ldexp_f32 v68, v68, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v74, v70, v69
	v_sub_f32_e32 v60, 0x41900000, v51
	v_ldexp_f32 v69, v69, 1
	v_add_f32_e32 v75, v71, v74
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_f32_e32 v61, v58, v60
	v_sub_f32_e32 v71, v75, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v71, v74, v71 :: v_dual_mul_f32 v74, v72, v73
	v_fma_f32 v72, v72, v73, -v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v72, v70, v73
	v_add_f32_e32 v70, v74, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v73, 0x3f2aaaaa, v70
	v_sub_f32_e32 v74, v70, v74
	v_sub_f32_e32 v72, v72, v74
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v74, 0xbf2aaaaa, v73
	v_add_f32_e32 v72, 0x31739010, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v70, v70, v74
	v_add_f32_e32 v70, v72, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v72, v73, v70
	v_add_f32_e32 v60, 0xc1880000, v51
	v_dual_sub_f32 v58, 0x41a00000, v51 :: v_dual_sub_f32 v73, v73, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v70, v70, v73 :: v_dual_mul_f32 v73, v75, v72
	v_fma_f32 v74, v75, v72, -v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v74, v75, v70
	v_frexp_exp_i32_f32_e32 v70, v63
	v_fmac_f32_e32 v74, v71, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e64 v70, s11, 0, v70, s11
	v_cvt_f32_i32_e32 v70, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v71, 0x3f317218, v70
	v_fma_f32 v72, 0x3f317218, v70, -v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v72, 0xb102e308, v70
	v_add_f32_e32 v70, v71, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_min_f32 v60, v60, v58 :: v_dual_sub_f32 v71, v70, v71
	v_dual_sub_f32 v71, v72, v71 :: v_dual_add_f32 v72, v73, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v73, v72, v73
	v_dual_sub_f32 v73, v74, v73 :: v_dual_add_f32 v74, v69, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v68, v68, v73
	v_sub_f32_e32 v69, v74, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v72, v69
	v_add_f32_e32 v68, v68, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v69, v74, v68
	v_sub_f32_e32 v72, v69, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v68, v68, v72
	v_add_f32_e32 v72, v70, v69
	v_sub_f32_e32 v73, v72, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v74, v72, v73
	v_dual_sub_f32 v69, v69, v73 :: v_dual_sub_f32 v70, v70, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v69, v69, v70 :: v_dual_add_f32 v70, v71, v68
	v_sub_f32_e32 v73, v70, v71
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v69, v70, v69
	v_sub_f32_e32 v74, v70, v73
	v_sub_f32_e32 v68, v68, v73
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v70, v72, v69 :: v_dual_sub_f32 v71, v71, v74
	v_dual_add_f32 v68, v68, v71 :: v_dual_sub_f32 v71, v70, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v69, v71
	v_add_f32_e32 v68, v68, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v69, v70, v68
	v_sub_f32_e32 v70, v69, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v68, v68, v70
	v_mul_f32_e32 v70, v64, v69
	v_fma_f32 v69, v64, v69, -v70
	v_cmp_class_f32_e64 s11, v70, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v69, v64, v68
	v_add_f32_e32 v68, v70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v71, v68, v70
	v_cndmask_b32_e64 v68, v68, v70, s11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v69, v69, v71
	v_cmp_neq_f32_e64 s11, 0x7f800000, |v68|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v69, 0, v69, s11
	v_cmp_eq_f32_e64 s11, 0x42b17218, v68
	v_cndmask_b32_e64 v70, 0, 0x37000000, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v68, v68, v70 :: v_dual_add_f32 v69, v70, v69
	v_mul_f32_e32 v70, 0x3fb8aa3b, v68
	v_cmp_ngt_f32_e64 s11, 0xc2ce8ed0, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v71, 0x3fb8aa3b, v68, -v70
	v_rndne_f32_e32 v72, v70
	v_fmac_f32_e32 v71, 0x32a5705f, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v70, v70, v72
	v_add_f32_e32 v70, v70, v71
	v_cvt_i32_f32_e32 v71, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v70, v70
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v70, v70, v71
	v_cndmask_b32_e64 v70, 0, v70, s11
	v_cmp_nlt_f32_e64 s11, 0x42b17218, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v68, 0x7f800000, v70, s11
	v_fma_f32 v69, v68, v69, v68
	v_cmp_eq_f32_e64 s11, 0x7f800000, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v68, v69, v68, s11
	v_trunc_f32_e32 v69, v64
	v_cmp_eq_f32_e64 s11, v69, v64
	v_mul_f32_e32 v64, 0.5, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v69, v64
	v_cmp_neq_f32_e64 s12, v69, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	s_and_b32 s11, s11, s12
	v_cmp_eq_f32_e64 s12, 0, v63
	v_cndmask_b32_e64 v64, 1.0, v63, s11
	v_cndmask_b32_e64 v69, 0, v63, s11
	v_cmp_o_f32_e64 s11, v63, v63
	s_or_b32 s13, s12, s13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_bfi_b32 v64, 0x7fffffff, v68, v64
	v_cndmask_b32_e64 v68, 0x7f800000, 0, s12
	v_bfi_b32 v68, 0x7fffffff, v68, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v64, v64, v68, s13
	v_frexp_mant_f32_e64 v68, |v66|
	v_cmp_gt_f32_e64 s13, 0, v66
	v_cndmask_b32_e64 v63, 0x7fc00000, v64, s11
	v_cmp_eq_f32_e64 s11, 1.0, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, 0x41000000, 1.0, s11
	v_cmp_gt_f32_e64 s11, 0x3f2aaaab, v68
	v_cndmask_b32_e64 v69, 0, 1, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v68, v68, v69
	v_add_f32_e32 v70, 1.0, v68
	v_add_f32_e32 v69, -1.0, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v71, -1.0, v70
	v_sub_f32_e32 v68, v68, v71
	v_rcp_f32_e32 v71, v70
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v72, v69, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v73, v70, v72
	v_fma_f32 v70, v72, v70, -v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v70, v72, v68
	v_add_f32_e32 v68, v73, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v74, v69, v68 :: v_dual_sub_f32 v73, v68, v73
	v_sub_f32_e32 v69, v69, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v68, v69, v68
	v_sub_f32_e32 v69, v73, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v69, v68
	v_add_f32_e32 v68, v74, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v68, v71, v68
	v_add_f32_e32 v69, v72, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v70, v69, v72
	v_sub_f32_e32 v68, v68, v70
	v_mul_f32_e32 v70, v69, v69
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v72, v68, v68
	v_fma_f32 v71, v69, v69, -v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v71, v69, v72
	v_add_f32_e32 v72, v70, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v70, v72, v70 :: v_dual_fmaak_f32 v73, s18, v72, 0x3e91f4c4
	v_dual_sub_f32 v70, v71, v70 :: v_dual_mul_f32 v71, v69, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v73, v72, v73, 0x3ecccdef
	v_fma_f32 v74, v72, v69, -v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v74, v72, v68
	v_ldexp_f32 v68, v68, 1
	v_fmac_f32_e32 v74, v70, v69
	v_ldexp_f32 v69, v69, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v75, v71, v74
	v_sub_f32_e32 v71, v75, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v71, v74, v71 :: v_dual_mul_f32 v74, v72, v73
	v_fma_f32 v72, v72, v73, -v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v72, v70, v73
	v_add_f32_e32 v70, v74, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v73, 0x3f2aaaaa, v70
	v_sub_f32_e32 v74, v70, v74
	v_sub_f32_e32 v72, v72, v74
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v74, 0xbf2aaaaa, v73
	v_add_f32_e32 v72, 0x31739010, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v70, v70, v74
	v_add_f32_e32 v70, v72, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v72, v73, v70
	v_sub_f32_e32 v73, v73, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v70, v70, v73 :: v_dual_mul_f32 v73, v75, v72
	v_fma_f32 v74, v75, v72, -v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v74, v75, v70
	v_frexp_exp_i32_f32_e32 v70, v66
	v_fmac_f32_e32 v74, v71, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e64 v70, s11, 0, v70, s11
	v_cvt_f32_i32_e32 v70, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v71, 0x3f317218, v70
	v_fma_f32 v72, 0x3f317218, v70, -v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v72, 0xb102e308, v70
	v_add_f32_e32 v70, v71, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v71, v70, v71
	v_dual_sub_f32 v71, v72, v71 :: v_dual_add_f32 v72, v73, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v73, v72, v73
	v_dual_sub_f32 v73, v74, v73 :: v_dual_add_f32 v74, v69, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v68, v68, v73
	v_sub_f32_e32 v69, v74, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v72, v69
	v_add_f32_e32 v68, v68, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v69, v74, v68
	v_sub_f32_e32 v72, v69, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v68, v68, v72
	v_add_f32_e32 v72, v70, v69
	v_sub_f32_e32 v73, v72, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v74, v72, v73
	v_dual_sub_f32 v69, v69, v73 :: v_dual_sub_f32 v70, v70, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v69, v69, v70 :: v_dual_add_f32 v70, v71, v68
	v_sub_f32_e32 v73, v70, v71
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v69, v70, v69
	v_sub_f32_e32 v74, v70, v73
	v_sub_f32_e32 v68, v68, v73
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v70, v72, v69 :: v_dual_sub_f32 v71, v71, v74
	v_dual_add_f32 v68, v68, v71 :: v_dual_sub_f32 v71, v70, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v69, v71
	v_add_f32_e32 v68, v68, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v69, v70, v68
	v_sub_f32_e32 v70, v69, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v68, v68, v70
	v_mul_f32_e32 v70, v64, v69
	v_fma_f32 v69, v64, v69, -v70
	v_cmp_class_f32_e64 s11, v70, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v69, v64, v68
	v_add_f32_e32 v68, v70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v71, v68, v70
	v_cndmask_b32_e64 v68, v68, v70, s11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v69, v69, v71
	v_cmp_neq_f32_e64 s11, 0x7f800000, |v68|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v69, 0, v69, s11
	v_cmp_eq_f32_e64 s11, 0x42b17218, v68
	v_cndmask_b32_e64 v70, 0, 0x37000000, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v68, v68, v70 :: v_dual_add_f32 v69, v70, v69
	v_mul_f32_e32 v70, 0x3fb8aa3b, v68
	v_cmp_ngt_f32_e64 s11, 0xc2ce8ed0, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v71, 0x3fb8aa3b, v68, -v70
	v_rndne_f32_e32 v72, v70
	v_fmac_f32_e32 v71, 0x32a5705f, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v70, v70, v72
	v_add_f32_e32 v70, v70, v71
	v_cvt_i32_f32_e32 v71, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v70, v70
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v70, v70, v71
	v_cndmask_b32_e64 v70, 0, v70, s11
	v_cmp_nlt_f32_e64 s11, 0x42b17218, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v68, 0x7f800000, v70, s11
	v_fma_f32 v69, v68, v69, v68
	v_cmp_eq_f32_e64 s11, 0x7f800000, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v68, v69, v68, s11
	v_trunc_f32_e32 v69, v64
	v_cmp_eq_f32_e64 s11, v69, v64
	v_mul_f32_e32 v64, 0.5, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v69, v64
	v_cmp_neq_f32_e64 s12, v69, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s12, s11, s12
	v_cndmask_b32_e64 v64, 1.0, v66, s12
	v_cndmask_b32_e64 v69, 0, v66, s12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v64, 0x7fffffff, v68, v64
	v_cndmask_b32_e64 v68, 0x7fc00000, v64, s11
	v_cmp_eq_f32_e64 s11, 0, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v64, v64, v68, s13
	v_cndmask_b32_e64 v68, 0x7f800000, 0, s11
	v_cmp_class_f32_e64 s13, v66, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfi_b32 v68, 0x7fffffff, v68, v69
	s_or_b32 s13, s11, s13
	v_cmp_o_f32_e64 s11, v66, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v64, v64, v68, s13
	v_cndmask_b32_e64 v64, 0x7fc00000, v64, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v63, v64, v63
	v_cmp_eq_f32_e64 s11, 1.0, v63
	v_frexp_mant_f32_e64 v68, |v63|
	v_cmp_gt_f32_e64 s13, 0, v63
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v64, 0x3e000000, 1.0, s11
	v_cmp_gt_f32_e64 s11, 0x3f2aaaab, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v69, 0, 1, s11
	v_ldexp_f32 v68, v68, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v70, 1.0, v68
	v_add_f32_e32 v69, -1.0, v68
	v_add_f32_e32 v71, -1.0, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v68, v68, v71
	v_rcp_f32_e32 v71, v70
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v72, v69, v71
	v_mul_f32_e32 v73, v70, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v70, v72, v70, -v73
	v_fmac_f32_e32 v70, v72, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v73, v70
	v_dual_sub_f32 v74, v69, v68 :: v_dual_sub_f32 v73, v68, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v69, v74
	v_sub_f32_e32 v68, v69, v68
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v73, v70
	v_add_f32_e32 v68, v69, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v74, v68
	v_mul_f32_e32 v68, v71, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v69, v72, v68
	v_sub_f32_e32 v70, v69, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v68, v68, v70
	v_mul_f32_e32 v70, v69, v69
	v_add_f32_e32 v72, v68, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v71, v69, v69, -v70
	v_fmac_f32_e32 v71, v69, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v72, v70, v71
	v_dual_sub_f32 v70, v72, v70 :: v_dual_fmaak_f32 v73, s18, v72, 0x3e91f4c4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v70, v71, v70 :: v_dual_mul_f32 v71, v69, v72
	v_fmaak_f32 v73, v72, v73, 0x3ecccdef
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v74, v72, v69, -v71
	v_fmac_f32_e32 v74, v72, v68
	v_ldexp_f32 v68, v68, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v74, v70, v69
	v_ldexp_f32 v69, v69, 1
	v_add_f32_e32 v75, v71, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v71, v75, v71
	v_dual_sub_f32 v71, v74, v71 :: v_dual_mul_f32 v74, v72, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v72, v72, v73, -v74
	v_fmac_f32_e32 v72, v70, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v70, v74, v72
	v_add_f32_e32 v73, 0x3f2aaaaa, v70
	v_sub_f32_e32 v74, v70, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v72, v72, v74
	v_add_f32_e32 v74, 0xbf2aaaaa, v73
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v72, 0x31739010, v72
	v_sub_f32_e32 v70, v70, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v70, v72, v70
	v_add_f32_e32 v72, v73, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v73, v73, v72
	v_dual_add_f32 v70, v70, v73 :: v_dual_mul_f32 v73, v75, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v74, v75, v72, -v73
	v_fmac_f32_e32 v74, v75, v70
	v_frexp_exp_i32_f32_e32 v70, v63
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v74, v71, v72
	v_subrev_co_ci_u32_e64 v70, s11, 0, v70, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v70, v70
	v_mul_f32_e32 v71, 0x3f317218, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v72, 0x3f317218, v70, -v71
	v_fmac_f32_e32 v72, 0xb102e308, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v70, v71, v72
	v_sub_f32_e32 v71, v70, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v71, v72, v71 :: v_dual_add_f32 v72, v73, v74
	v_sub_f32_e32 v73, v72, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v73, v74, v73 :: v_dual_add_f32 v74, v69, v72
	v_add_f32_e32 v68, v68, v73
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v74, v69
	v_sub_f32_e32 v69, v72, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v68, v69
	v_add_f32_e32 v69, v74, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v72, v69, v74
	v_sub_f32_e32 v68, v68, v72
	v_add_f32_e32 v72, v70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v73, v72, v70
	v_sub_f32_e32 v74, v72, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v69, v69, v73 :: v_dual_sub_f32 v70, v70, v74
	v_dual_add_f32 v69, v69, v70 :: v_dual_add_f32 v70, v71, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v73, v70, v71
	v_add_f32_e32 v69, v70, v69
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v74, v70, v73
	v_sub_f32_e32 v68, v68, v73
	v_dual_add_f32 v70, v72, v69 :: v_dual_sub_f32 v71, v71, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v68, v68, v71 :: v_dual_sub_f32 v71, v70, v72
	v_sub_f32_e32 v69, v69, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v68, v69
	v_add_f32_e32 v69, v70, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v70, v69, v70
	v_sub_f32_e32 v68, v68, v70
	v_mul_f32_e32 v70, v64, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v69, v64, v69, -v70
	v_cmp_class_f32_e64 s11, v70, 0x204
	v_fmac_f32_e32 v69, v64, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v70, v69
	v_sub_f32_e32 v71, v68, v70
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v68, v68, v70, s11
	v_sub_f32_e32 v69, v69, v71
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_neq_f32_e64 s11, 0x7f800000, |v68|
	v_cndmask_b32_e64 v69, 0, v69, s11
	v_cmp_eq_f32_e64 s11, 0x42b17218, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v70, 0, 0x37000000, s11
	v_dual_sub_f32 v68, v68, v70 :: v_dual_add_f32 v69, v70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v70, 0x3fb8aa3b, v68
	v_cmp_ngt_f32_e64 s11, 0xc2ce8ed0, v68
	v_fma_f32 v71, 0x3fb8aa3b, v68, -v70
	v_rndne_f32_e32 v72, v70
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v71, 0x32a5705f, v68
	v_sub_f32_e32 v70, v70, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v70, v70, v71
	v_cvt_i32_f32_e32 v71, v72
	v_exp_f32_e32 v70, v70
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v70, v70, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v70, 0, v70, s11
	v_cmp_nlt_f32_e64 s11, 0x42b17218, v68
	v_cndmask_b32_e64 v68, 0x7f800000, v70, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v69, v68, v69, v68
	v_cmp_eq_f32_e64 s11, 0x7f800000, v68
	v_cndmask_b32_e64 v68, v69, v68, s11
	v_trunc_f32_e32 v69, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_f32_e64 s11, v69, v64
	v_mul_f32_e32 v64, 0.5, v64
	v_trunc_f32_e32 v69, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_neq_f32_e64 s12, v69, v64
	s_and_b32 s12, s11, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v64, 1.0, v63, s12
	v_cndmask_b32_e64 v69, 0, v63, s12
	v_bfi_b32 v64, 0x7fffffff, v68, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v68, 0x7fc00000, v64, s11
	v_cmp_eq_f32_e64 s11, 0, v63
	v_cndmask_b32_e64 v64, v64, v68, s13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v68, 0x7f800000, 0, s11
	v_cmp_class_f32_e64 s13, v63, 0x204
	v_bfi_b32 v68, 0x7fffffff, v68, v69
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_or_b32 s13, s11, s13
	v_cmp_o_f32_e64 s11, v63, v63
	v_cndmask_b32_e64 v64, v64, v68, s13
	v_sub_f32_e32 v68, 0x41f00000, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v64, -0.5, v64
	v_cndmask_b32_e64 v63, 0x7fc00000, v64, s11
	v_add_f32_e32 v64, 0x41f00000, v66
	v_cmp_gt_f32_e64 s11, 0xf800000, v62
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_f32_e32 v64, v64, v68
	v_min3_f32 v64, v65, v61, v64
	v_add_f32_e32 v65, 0x41c80000, v66
	v_sub_f32_e32 v66, 0x41c80000, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_f32_e32 v66, v65, v66
	v_min3_f32 v65, v67, v60, v66
	v_mul_f32_e32 v67, 0x4f800000, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v62, v62, v67, s11
	v_sqrt_f32_e32 v67, v62
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v68, -1, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v69, -v68, v67, v62
	v_cmp_ge_f32_e64 s12, 0, v69
	v_add_nc_u32_e32 v69, 1, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v68, v67, v68, s12
	v_fma_f32 v67, -v69, v67, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s12, 0, v67
	v_cndmask_b32_e64 v67, v68, v69, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v68, 0x37800000, v67
	v_cndmask_b32_e64 v67, v67, v68, s11
	v_cmp_class_f32_e64 s11, v62, 0x260
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v62, v67, v62, s11
	v_cmp_eq_f32_e64 s11, 1.0, v62
	v_frexp_mant_f32_e64 v68, |v62|
	v_cmp_class_f32_e64 s13, v62, 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v67, 0x41000000, 1.0, s11
	v_cmp_gt_f32_e64 s11, 0x3f2aaaab, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v69, 0, 1, s11
	v_ldexp_f32 v68, v68, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v70, 1.0, v68
	v_add_f32_e32 v69, -1.0, v68
	v_add_f32_e32 v71, -1.0, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v68, v68, v71
	v_rcp_f32_e32 v71, v70
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v72, v69, v71
	v_mul_f32_e32 v73, v70, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v70, v72, v70, -v73
	v_fmac_f32_e32 v70, v72, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v73, v70
	v_dual_sub_f32 v74, v69, v68 :: v_dual_sub_f32 v73, v68, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v69, v74
	v_sub_f32_e32 v68, v69, v68
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v73, v70
	v_add_f32_e32 v68, v69, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v74, v68
	v_mul_f32_e32 v68, v71, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v69, v72, v68
	v_sub_f32_e32 v70, v69, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v68, v68, v70
	v_mul_f32_e32 v70, v69, v69
	v_add_f32_e32 v72, v68, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v71, v69, v69, -v70
	v_fmac_f32_e32 v71, v69, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v72, v70, v71
	v_dual_sub_f32 v70, v72, v70 :: v_dual_fmaak_f32 v73, s18, v72, 0x3e91f4c4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v70, v71, v70 :: v_dual_mul_f32 v71, v69, v72
	v_fmaak_f32 v73, v72, v73, 0x3ecccdef
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v74, v72, v69, -v71
	v_fmac_f32_e32 v74, v72, v68
	v_ldexp_f32 v68, v68, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v74, v70, v69
	v_ldexp_f32 v69, v69, 1
	v_add_f32_e32 v75, v71, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v71, v75, v71
	v_dual_sub_f32 v71, v74, v71 :: v_dual_mul_f32 v74, v72, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v72, v72, v73, -v74
	v_fmac_f32_e32 v72, v70, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v70, v74, v72
	v_add_f32_e32 v73, 0x3f2aaaaa, v70
	v_sub_f32_e32 v74, v70, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v72, v72, v74
	v_add_f32_e32 v74, 0xbf2aaaaa, v73
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v72, 0x31739010, v72
	v_sub_f32_e32 v70, v70, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v70, v72, v70
	v_add_f32_e32 v72, v73, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v73, v73, v72
	v_dual_add_f32 v70, v70, v73 :: v_dual_mul_f32 v73, v75, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v74, v75, v72, -v73
	v_fmac_f32_e32 v74, v75, v70
	v_frexp_exp_i32_f32_e32 v70, v62
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v74, v71, v72
	v_subrev_co_ci_u32_e64 v70, s11, 0, v70, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v70, v70
	v_mul_f32_e32 v71, 0x3f317218, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v72, 0x3f317218, v70, -v71
	v_fmac_f32_e32 v72, 0xb102e308, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v70, v71, v72
	v_sub_f32_e32 v71, v70, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v71, v72, v71 :: v_dual_add_f32 v72, v73, v74
	v_sub_f32_e32 v73, v72, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v73, v74, v73 :: v_dual_add_f32 v74, v69, v72
	v_add_f32_e32 v68, v68, v73
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v74, v69
	v_sub_f32_e32 v69, v72, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v68, v69
	v_add_f32_e32 v69, v74, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v72, v69, v74
	v_sub_f32_e32 v68, v68, v72
	v_add_f32_e32 v72, v70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v73, v72, v70
	v_sub_f32_e32 v74, v72, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v69, v69, v73 :: v_dual_sub_f32 v70, v70, v74
	v_dual_add_f32 v69, v69, v70 :: v_dual_add_f32 v70, v71, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v73, v70, v71
	v_add_f32_e32 v69, v70, v69
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v74, v70, v73
	v_sub_f32_e32 v68, v68, v73
	v_dual_add_f32 v70, v72, v69 :: v_dual_sub_f32 v71, v71, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v68, v68, v71 :: v_dual_sub_f32 v71, v70, v72
	v_sub_f32_e32 v69, v69, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v68, v69
	v_add_f32_e32 v69, v70, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v70, v69, v70
	v_sub_f32_e32 v68, v68, v70
	v_mul_f32_e32 v70, v67, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v69, v67, v69, -v70
	v_cmp_class_f32_e64 s11, v70, 0x204
	v_fmac_f32_e32 v69, v67, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v70, v69
	v_sub_f32_e32 v71, v68, v70
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v68, v68, v70, s11
	v_sub_f32_e32 v69, v69, v71
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_neq_f32_e64 s11, 0x7f800000, |v68|
	v_cndmask_b32_e64 v69, 0, v69, s11
	v_cmp_eq_f32_e64 s11, 0x42b17218, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v70, 0, 0x37000000, s11
	v_dual_sub_f32 v68, v68, v70 :: v_dual_add_f32 v69, v70, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v70, 0x3fb8aa3b, v68
	v_cmp_ngt_f32_e64 s11, 0xc2ce8ed0, v68
	v_fma_f32 v71, 0x3fb8aa3b, v68, -v70
	v_rndne_f32_e32 v72, v70
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v71, 0x32a5705f, v68
	v_sub_f32_e32 v70, v70, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v70, v70, v71
	v_cvt_i32_f32_e32 v71, v72
	v_exp_f32_e32 v70, v70
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v70, v70, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v70, 0, v70, s11
	v_cmp_nlt_f32_e64 s11, 0x42b17218, v68
	v_cndmask_b32_e64 v68, 0x7f800000, v70, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v69, v68, v69, v68
	v_cmp_eq_f32_e64 s11, 0x7f800000, v68
	v_cndmask_b32_e64 v68, v69, v68, s11
	v_trunc_f32_e32 v69, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_f32_e64 s11, v69, v67
	v_mul_f32_e32 v67, 0.5, v67
	v_trunc_f32_e32 v69, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_neq_f32_e64 s12, v69, v67
	s_and_b32 s11, s11, s12
	v_cmp_eq_f32_e64 s12, 0, v62
	v_cndmask_b32_e64 v67, 1.0, v62, s11
	v_cndmask_b32_e64 v69, 0, v62, s11
	v_cmp_o_f32_e64 s11, v62, v62
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_or_b32 s13, s12, s13
	v_bfi_b32 v67, 0x7fffffff, v68, v67
	v_cndmask_b32_e64 v68, 0x7f800000, 0, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v68, 0x7fffffff, v68, v69
	v_cndmask_b32_e64 v67, v67, v68, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v62, 0x7fc00000, v67, s11
	v_add_f32_e32 v59, v59, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_eq_f32_e64 s11, 1.0, v59
	v_frexp_mant_f32_e64 v67, |v59|
	v_cmp_gt_f32_e64 s13, 0, v59
	v_cndmask_b32_e64 v62, 0x3e000000, 1.0, s11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e64 s11, 0x3f2aaaab, v67
	v_cndmask_b32_e64 v68, 0, 1, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v67, v67, v68
	v_add_f32_e32 v69, 1.0, v67
	v_add_f32_e32 v68, -1.0, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v70, -1.0, v69
	v_sub_f32_e32 v67, v67, v70
	v_rcp_f32_e32 v70, v69
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v71, v68, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v72, v69, v71
	v_fma_f32 v69, v71, v69, -v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v69, v71, v67
	v_add_f32_e32 v67, v72, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v73, v68, v67 :: v_dual_sub_f32 v72, v67, v72
	v_sub_f32_e32 v68, v68, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v67, v68, v67
	v_sub_f32_e32 v68, v72, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v67, v68, v67
	v_add_f32_e32 v67, v73, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v67, v70, v67
	v_add_f32_e32 v68, v71, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v68, v71
	v_sub_f32_e32 v67, v67, v69
	v_mul_f32_e32 v69, v68, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v71, v67, v67
	v_fma_f32 v70, v68, v68, -v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v70, v68, v71
	v_add_f32_e32 v71, v69, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v69, v71, v69 :: v_dual_fmaak_f32 v72, s18, v71, 0x3e91f4c4
	v_dual_sub_f32 v69, v70, v69 :: v_dual_mul_f32 v70, v68, v71
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v72, v71, v72, 0x3ecccdef
	v_fma_f32 v73, v71, v68, -v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v73, v71, v67
	v_ldexp_f32 v67, v67, 1
	v_fmac_f32_e32 v73, v69, v68
	v_ldexp_f32 v68, v68, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v74, v70, v73
	v_sub_f32_e32 v70, v74, v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v70, v73, v70 :: v_dual_mul_f32 v73, v71, v72
	v_fma_f32 v71, v71, v72, -v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v71, v69, v72
	v_add_f32_e32 v69, v73, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v72, 0x3f2aaaaa, v69
	v_sub_f32_e32 v73, v69, v73
	v_sub_f32_e32 v71, v71, v73
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v73, 0xbf2aaaaa, v72
	v_add_f32_e32 v71, 0x31739010, v71
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v69, v73
	v_add_f32_e32 v69, v71, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v71, v72, v69
	v_sub_f32_e32 v72, v72, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v69, v69, v72 :: v_dual_mul_f32 v72, v74, v71
	v_fma_f32 v73, v74, v71, -v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v73, v74, v69
	v_frexp_exp_i32_f32_e32 v69, v59
	v_fmac_f32_e32 v73, v70, v71
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e64 v69, s11, 0, v69, s11
	v_cvt_f32_i32_e32 v69, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v70, 0x3f317218, v69
	v_fma_f32 v71, 0x3f317218, v69, -v70
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v71, 0xb102e308, v69
	v_add_f32_e32 v69, v70, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v70, v69, v70
	v_dual_sub_f32 v70, v71, v70 :: v_dual_add_f32 v71, v72, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v72, v71, v72
	v_dual_sub_f32 v72, v73, v72 :: v_dual_add_f32 v73, v68, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v67, v67, v72
	v_sub_f32_e32 v68, v73, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v68, v71, v68
	v_add_f32_e32 v67, v67, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v73, v67
	v_sub_f32_e32 v71, v68, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v67, v67, v71
	v_add_f32_e32 v71, v69, v68
	v_sub_f32_e32 v72, v71, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v73, v71, v72
	v_dual_sub_f32 v68, v68, v72 :: v_dual_sub_f32 v69, v69, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v68, v68, v69 :: v_dual_add_f32 v69, v70, v67
	v_sub_f32_e32 v72, v69, v70
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v68, v69, v68
	v_sub_f32_e32 v73, v69, v72
	v_sub_f32_e32 v67, v67, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v69, v71, v68 :: v_dual_sub_f32 v70, v70, v73
	v_dual_add_f32 v67, v67, v70 :: v_dual_sub_f32 v70, v69, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v68, v68, v70
	v_add_f32_e32 v67, v67, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v68, v69, v67
	v_sub_f32_e32 v69, v68, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v67, v67, v69
	v_mul_f32_e32 v69, v62, v68
	v_fma_f32 v68, v62, v68, -v69
	v_cmp_class_f32_e64 s11, v69, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v68, v62, v67
	v_add_f32_e32 v67, v69, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v70, v67, v69
	v_cndmask_b32_e64 v67, v67, v69, s11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v68, v68, v70
	v_cmp_neq_f32_e64 s11, 0x7f800000, |v67|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v68, 0, v68, s11
	v_cmp_eq_f32_e64 s11, 0x42b17218, v67
	v_cndmask_b32_e64 v69, 0, 0x37000000, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v67, v67, v69 :: v_dual_add_f32 v68, v69, v68
	v_mul_f32_e32 v69, 0x3fb8aa3b, v67
	v_cmp_ngt_f32_e64 s11, 0xc2ce8ed0, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v70, 0x3fb8aa3b, v67, -v69
	v_rndne_f32_e32 v71, v69
	v_fmac_f32_e32 v70, 0x32a5705f, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v69, v69, v71
	v_add_f32_e32 v69, v69, v70
	v_cvt_i32_f32_e32 v70, v71
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v69, v69
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v69, v69, v70
	v_cndmask_b32_e64 v69, 0, v69, s11
	v_cmp_nlt_f32_e64 s11, 0x42b17218, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v67, 0x7f800000, v69, s11
	v_fma_f32 v68, v67, v68, v67
	v_cmp_eq_f32_e64 s11, 0x7f800000, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v67, v68, v67, s11
	v_trunc_f32_e32 v68, v62
	v_cmp_eq_f32_e64 s11, v68, v62
	v_mul_f32_e32 v62, 0.5, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v68, v62
	v_cmp_neq_f32_e64 s12, v68, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s12, s11, s12
	v_cndmask_b32_e64 v62, 1.0, v59, s12
	v_cndmask_b32_e64 v68, 0, v59, s12
	s_and_b32 s12, s31, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v62, 0x7fffffff, v67, v62
	v_cndmask_b32_e64 v67, 0x7fc00000, v62, s11
	v_cmp_eq_f32_e64 s11, 0, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v62, v62, v67, s13
	v_cndmask_b32_e64 v67, 0x7f800000, 0, s11
	v_cmp_class_f32_e64 s13, v59, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfi_b32 v67, 0x7fffffff, v67, v68
	s_or_b32 s13, s11, s13
	v_cmp_o_f32_e64 s11, v59, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v62, v62, v67, s13
	v_dual_sub_f32 v67, 0x41f00000, v52 :: v_dual_add_f32 v62, -0.5, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v59, 0x7fc00000, v62, s11
	v_add_f32_e32 v62, 0x41f00000, v52
	v_cmp_class_f32_e64 s11, v52, 0x1f8
	v_min_f32_e32 v62, v62, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_min3_f32 v56, v62, v61, v56
	v_add_f32_e32 v61, 0x41c80000, v52
	v_sub_f32_e32 v62, 0x41c80000, v52
	v_cndmask_b32_e64 v52, 0x7fc00000, v53, s11
	v_min_f32_e32 v61, v61, v62
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v53, 0xbfc00000, v52
	v_sub_f32_e32 v52, 0x40d00000, v52
	v_min3_f32 v60, v61, v60, v55
	v_add_f32_e32 v61, 0xc1940000, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v51, 0x419f3333, v51 :: v_dual_min_f32 v58, v61, v58
	v_max3_f32 v52, -v53, -v52, -v58
	v_cndmask_b32_e32 v53, 0x7fc00000, v54, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_max_f32_e64 v52, v52, -v55
	v_add_f32_e32 v54, 0xbfc00000, v53
	v_sub_f32_e32 v53, 0x40d00000, v53
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_maxmin_f32 v52, v56, v60, v52
	v_max3_f32 v53, -v54, -v53, -v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e64 s11, v52, v59
	v_max_f32_e64 v53, v53, -v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v52, v59, v52, s11
	v_maxmin_f32 v53, v64, v65, v53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e64 s11, v51, v52
	v_cmp_lt_f32_e32 vcc_lo, v53, v63
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v51, s11
	v_dual_cndmask_b32 v53, v63, v53 :: v_dual_sub_f32 v52, v52, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e32 vcc_lo, v51, v53
	v_cndmask_b32_e32 v51, v53, v51, vcc_lo
	v_dual_sub_f32 v50, v51, v50 :: v_dual_mul_f32 v51, v57, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v51, v52, v52
	v_fmac_f32_e32 v51, v50, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v51
	v_mul_f32_e32 v53, 0x4f800000, v51
	v_cndmask_b32_e32 v51, v51, v53, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sqrt_f32_e32 v53, v51
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v54, -1, v53
	v_fma_f32 v55, -v54, v53, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_ge_f32_e64 s11, 0, v55
	v_add_nc_u32_e32 v55, 1, v53
	v_cndmask_b32_e64 v54, v53, v54, s11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v53, -v55, v53, v51
	v_cmp_lt_f32_e64 s11, 0, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v53, v54, v55, s11
	s_and_not1_b32 s11, s30, exec_lo
	s_or_b32 s30, s11, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v54, 0x37800000, v53
	v_cndmask_b32_e32 v53, v53, v54, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v51, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v51, v53, v51, vcc_lo
	v_div_scale_f32 v53, null, v51, v51, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v54, v53
	s_waitcnt_depctr 0xfff
	v_fma_f32 v55, -v53, v54, 1.0
	v_fmac_f32_e32 v54, v55, v54
	v_div_scale_f32 v55, vcc_lo, 1.0, v51, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v56, v55, v54
	v_fma_f32 v58, -v53, v56, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v56, v58, v54
	v_fma_f32 v53, -v53, v56, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v53, v53, v54, v56
	v_div_fixup_f32 v51, v53, v51, 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v53, v50, v51
	v_mul_f32_e32 v58, v52, v51
	v_mul_f32_e32 v56, v57, v51
.LBB0_107:                              ; %Flow742
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v50, v23 :: v_dual_mov_b32 v51, v24
	v_mov_b32_e32 v52, v26
	s_and_saveexec_b32 s11, s30
; %bb.108:                              ;   in Loop: Header=BB0_4 Depth=2
	v_mul_f32_e32 v50, 0x42c80000, v7
	v_mul_f32_e32 v51, 0x43c80000, v2
	v_mul_f32_e32 v52, 0x43fa0000, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v50, v50, v47, v23
	v_fma_f32 v51, v51, v47, v24
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f32 v52, v52, v47, v26
; %bb.109:                              ; %Flow
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s11
.LBB0_110:                              ; %Flow748
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	s_or_b32 exec_lo, exec_lo, s29
	v_mul_f32_e32 v47, v36, v36
	v_dual_mul_f32 v54, v8, v8 :: v_dual_lshlrev_b32 v35, 30, v35
	v_cndmask_b32_e64 v46, v46, v48, s10
	v_dual_mul_f32 v48, v34, v33 :: v_dual_fmaak_f32 v55, s20, v47, 0x3c0881c4
	v_fmaak_f32 v57, s21, v47, 0xbab64f3b
	v_div_fixup_f32 v40, v49, v40, -1.0
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v45, v46, v45, s9
	v_lshlrev_b32_e32 v37, 30, v37
	v_fmaak_f32 v49, v47, v55, 0xbe2aaa9d
	v_fmaak_f32 v55, v47, v57, 0x3d2aabf7
	v_fmaak_f32 v57, s20, v54, 0x3c0881c4
	v_cmp_class_f32_e64 vcc_lo, v44, 0x260
	v_and_b32_e32 v37, 0x80000000, v37
	v_cndmask_b32_e64 v41, v41, v43, s6
	v_mul_f32_e32 v43, v34, v38
	v_fmaak_f32 v46, v54, v57, 0xbe2aaa9d
	v_mul_f32_e32 v49, v47, v49
	v_fmaak_f32 v59, s21, v54, 0xbab64f3b
	v_cndmask_b32_e64 v41, v41, v42, s4
	v_mul_f32_e32 v42, v34, v43
	v_mul_f32_e32 v46, v54, v46
	v_fmac_f32_e32 v36, v36, v49
	v_mul_f32_e32 v49, 0x37800000, v45
	v_and_b32_e32 v35, 0x80000000, v35
	s_mov_b32 s11, exec_lo
	v_dual_fmac_f32 v8, v8, v46 :: v_dual_fmaak_f32 v55, v47, v55, 0xbf000004
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v45, v45, v49, s5
	v_fma_f32 v47, v47, v55, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v36, -v36, v47, s8
	v_mul_f32_e32 v47, v33, v33
	v_xor_b32_e32 v36, v37, v36
	v_cndmask_b32_e32 v37, v45, v44, vcc_lo
	v_dual_mul_f32 v44, v48, v40 :: v_dual_mul_f32 v45, 0x37800000, v41
	v_cmp_class_f32_e64 vcc_lo, v39, 0x260
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v36, 0x7fc00000, v36, s2
	v_cndmask_b32_e64 v41, v41, v45, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v36, v37, v36 :: v_dual_fmaak_f32 v57, v54, v59, 0x3d2aabf7
	v_cndmask_b32_e32 v39, v41, v39, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v55, v54, v57, 0xbf000004
	v_fma_f32 v46, v54, v55, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, v46, v8, s7
	v_xor_b32_e32 v8, v35, v8
	v_fma_f32 v35, v47, v40, v38
	v_fma_f32 v40, v42, v40, 1.0
	v_mul_f32_e32 v42, v38, v44
	v_mul_f32_e64 v38, v34, -v38
	v_cndmask_b32_e64 v43, 0x7fc00000, v8, s2
	v_mul_f32_e32 v8, v44, v36
	v_mul_f32_e32 v35, v35, v36
	v_mul_f32_e32 v36, v33, v36
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v37, v37, v43
	v_fmac_f32_e32 v8, v40, v37
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v35, v42, v37
	v_fma_f32 v36, v38, v37, -v36
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v8, v39, v34
	v_fmac_f32_e32 v35, v39, v33
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v36, v39, v32
	v_dual_mov_b32 v32, v53 :: v_dual_mov_b32 v33, v56
	v_mov_b32_e32 v34, v58
.LBB0_111:                              ; %Flow772
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s28
	v_dual_mov_b32 v40, v4 :: v_dual_mov_b32 v41, v23
	v_dual_mov_b32 v42, v24 :: v_dual_mov_b32 v43, v26
	v_dual_mov_b32 v44, v25 :: v_dual_mov_b32 v45, v27
	v_mov_b32_e32 v46, v28
	s_mov_b32 s3, -1
	s_and_b32 s2, s11, exec_lo
                                        ; implicit-def: $vgpr49
.LBB0_112:                              ; %Flow771
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_saveexec_b32 s4, s27
	v_mov_b32_e32 v48, v5
                                        ; implicit-def: $vgpr47
	s_xor_b32 exec_lo, exec_lo, s4
	s_cbranch_execz .LBB0_116
; %bb.113:                              ; %LeafBlock
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_mov_b32 s5, s2
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr6
	v_cmpx_eq_u32_e32 1, v49
; %bb.114:                              ;   in Loop: Header=BB0_4 Depth=2
	v_mul_f32_e32 v2, v35, v33
	s_or_b32 s5, s2, exec_lo
	v_mul_f32_e32 v6, 0x3e4ccccd, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v8, v34
	v_fmac_f32_e32 v2, v36, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v7, -2.0, v2 :: v_dual_mul_f32 v2, 0x3e4ccccd, v27
	v_fmac_f32_e32 v8, v34, v7
	v_fmac_f32_e32 v35, v33, v7
	v_dual_fmac_f32 v36, v32, v7 :: v_dual_mul_f32 v7, 0x3e4ccccd, v25
; %bb.115:                              ; %Flow774
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v47, v4 :: v_dual_mov_b32 v52, v26
	v_dual_mov_b32 v51, v24 :: v_dual_mov_b32 v50, v23
	v_dual_mov_b32 v40, v4 :: v_dual_mov_b32 v41, v23
	v_dual_mov_b32 v42, v24 :: v_dual_mov_b32 v43, v26
	v_dual_mov_b32 v44, v25 :: v_dual_mov_b32 v45, v27
	v_mov_b32_e32 v46, v28
	v_mov_b32_e32 v48, v4
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s5, s5, exec_lo
	s_and_not1_b32 s3, s3, exec_lo
	s_or_b32 s2, s2, s5
.LBB0_116:                              ; %Flow773
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s4, s24, exec_lo
	s_and_b32 s5, s3, exec_lo
	s_mov_b32 s3, -1
	s_or_b32 s24, s4, s5
                                        ; implicit-def: $vgpr38
                                        ; implicit-def: $vgpr37
                                        ; implicit-def: $vgpr39
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_118
; %bb.117:                              ; %.critedge80.i
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_dual_fmac_f32 v31, 0x3dcccccd, v36 :: v_dual_fmac_f32 v30, 0x3dcccccd, v35
	v_dual_fmac_f32 v29, 0x3dcccccd, v8 :: v_dual_mov_b32 v40, v4
	s_add_i32 s2, s26, -1
	s_cmp_eq_u32 s26, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v37, v30 :: v_dual_mov_b32 v38, v29
	v_dual_mov_b32 v39, v31 :: v_dual_mov_b32 v42, v24
	v_dual_mov_b32 v47, v48 :: v_dual_mov_b32 v44, v25
	v_dual_mov_b32 v41, v23 :: v_dual_mov_b32 v46, v28
	v_mov_b32_e32 v43, v26
	v_mov_b32_e32 v45, v27
	s_cselect_b32 s3, -1, 0
	s_and_not1_b32 s24, s24, exec_lo
	s_or_not1_b32 s3, s3, exec_lo
	s_mov_b32 s26, s2
.LBB0_118:                              ; %Flow775
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, exec_lo, s3
	v_dual_mov_b32 v4, v48 :: v_dual_mov_b32 v23, v50
	s_or_b32 s23, s2, s23
	v_dual_mov_b32 v24, v51 :: v_dual_mov_b32 v27, v2
	v_dual_mov_b32 v26, v52 :: v_dual_mov_b32 v25, v7
	v_mov_b32_e32 v28, v6
	s_and_not1_b32 s2, s25, exec_lo
	s_and_b32 s3, s24, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s25, s2, s3
	s_and_not1_b32 exec_lo, exec_lo, s23
	s_cbranch_execnz .LBB0_4
; %bb.119:                              ; %loop.exit.guard
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s23
	s_and_saveexec_b32 s2, s25
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s2
; %bb.120:                              ;   in Loop: Header=BB0_3 Depth=1
	v_dual_fmac_f32 v42, 0x42a00000, v45 :: v_dual_mov_b32 v47, v40
	v_fmac_f32_e32 v41, 0x42c80000, v44
	v_fmac_f32_e32 v43, 0x42480000, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v51, v42 :: v_dual_mov_b32 v50, v41
	v_mov_b32_e32 v52, v43
; %bb.121:                              ; %_Z5Trace3VecS_Rj.exit
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v10, v10, v52 :: v_dual_add_f32 v9, v9, v51
	v_add_f32_e32 v0, v0, v50
	s_add_i32 s22, s22, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s22, 0
	s_cbranch_scc0 .LBB0_3
.LBB0_122:                              ; %Flow777
	v_cvt_f32_i32_e32 v2, s15
	s_load_b64 s[0:1], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v3, null, v2, v2, 1.0
	v_div_scale_f32 v6, vcc_lo, 1.0, v2, 1.0
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v3, v4, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v5, v4
	v_mul_f32_e32 v5, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, -v3, v5, v6
	v_fmac_f32_e32 v5, v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, -v3, v5, v6
	v_div_fmas_f32 v3, v3, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v2, v3, v2, 1.0
	v_fmaak_f32 v4, v2, v9, 0x3d6df121
	v_fmaak_f32 v3, v2, v10, 0x3d6df121
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v0, v2, v0, 0x3d6df121 :: v_dual_add_f32 v5, 1.0, v3
	v_add_f32_e32 v7, 1.0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_scale_f32 v6, null, v5, v5, v3
	v_div_scale_f32 v14, vcc_lo, v3, v5, v3
	v_div_scale_f32 v10, null, v7, v7, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v9, v6
	v_rcp_f32_e32 v12, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v6, v9, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v2, 1.0, v4 :: v_dual_fmac_f32 v9, v13, v9
	v_div_scale_f32 v8, null, v2, v2, v4
	v_div_scale_f32 v16, s2, v4, v2, v4
	v_fma_f32 v13, -v10, v12, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v11, v8
	v_dual_mul_f32 v17, v14, v9 :: v_dual_fmac_f32 v12, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f32 v18, -v6, v17, v14
	s_waitcnt_depctr 0xfff
	v_fma_f32 v15, -v8, v11, 1.0
	v_fmac_f32_e32 v17, v18, v9
	v_fmac_f32_e32 v11, v15, v11
	v_div_scale_f32 v15, s3, v0, v7, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v6, -v6, v17, v14
	v_mul_f32_e32 v13, v16, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v19, v15, v12
	v_div_fmas_f32 v6, v6, v9, v17
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v20, -v8, v13, v16
	v_fma_f32 v18, -v10, v19, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v3, v6, v5, v3
	v_fmac_f32_e32 v13, v20, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v19, v18, v12
	v_mul_f32_e32 v3, 0x437f0000, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v8, -v8, v13, v16
	v_fma_f32 v9, -v10, v19, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v8, v8, v11, v13
	s_mov_b32 vcc_lo, s3
	v_div_fixup_f32 v2, v8, v2, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v4, v9, v12, v19
	v_mul_f32_e32 v2, 0x437f0000, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v0, v4, v7, v0
	v_cvt_i32_f32_e32 v4, v3
	v_cvt_i32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v0, 0x437f0000, v0
	v_lshlrev_b16 v5, 8, v2
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[2:3], null, v1, 3, s[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_i32_f32_e32 v0, v0
	v_or_b32_e32 v1, v4, v5
	s_clause 0x1
	global_store_b8 v[2:3], v0, off offset:2
	global_store_b16 v[2:3], v1, off
.LBB0_123:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10PathTraceriP5Pixelijj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 86
		.amdhsa_next_free_sgpr 44
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10PathTraceriP5Pixelijj, .Lfunc_end0-_Z10PathTraceriP5Pixelijj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 37464
; NumSgprs: 46
; NumVgprs: 86
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 10
; NumSGPRsForWavesPerEU: 46
; NumVGPRsForWavesPerEU: 86
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__const._Z13QueryDatabaseRK3VecRi.lines,@object ; @__const._Z13QueryDatabaseRK3VecRi.lines
	.section	.rodata,"a",@progbits
	.p2align	4, 0x0
__const._Z13QueryDatabaseRK3VecRi.lines:
	.long	0xc1a00000                      ; float -20
	.long	0x00000000                      ; float 0
	.long	0xc1a00000                      ; float -20
	.long	0x41800000                      ; float 16
	.long	0xc1a00000                      ; float -20
	.long	0x00000000                      ; float 0
	.long	0xc1600000                      ; float -14
	.long	0x00000000                      ; float 0
	.long	0xc1300000                      ; float -11
	.long	0x00000000                      ; float 0
	.long	0xc0e00000                      ; float -7
	.long	0x41800000                      ; float 16
	.long	0xc0400000                      ; float -3
	.long	0x00000000                      ; float 0
	.long	0xc0e00000                      ; float -7
	.long	0x41800000                      ; float 16
	.long	0xc0b00000                      ; float -5.5
	.long	0x40a00000                      ; float 5
	.long	0xc1180000                      ; float -9.5
	.long	0x40a00000                      ; float 5
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x00000000                      ; float 0
	.long	0x41800000                      ; float 16
	.long	0x40c00000                      ; float 6
	.long	0x00000000                      ; float 0
	.long	0x40c00000                      ; float 6
	.long	0x41800000                      ; float 16
	.long	0x00000000                      ; float 0
	.long	0x41800000                      ; float 16
	.long	0x40c00000                      ; float 6
	.long	0x00000000                      ; float 0
	.long	0x41100000                      ; float 9
	.long	0x00000000                      ; float 0
	.long	0x41100000                      ; float 9
	.long	0x41800000                      ; float 16
	.long	0x41100000                      ; float 9
	.long	0x00000000                      ; float 0
	.long	0x41700000                      ; float 15
	.long	0x00000000                      ; float 0
	.size	__const._Z13QueryDatabaseRK3VecRi.lines, 160

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10PathTraceriP5Pixelijj
    .private_segment_fixed_size: 0
    .sgpr_count:     46
    .sgpr_spill_count: 0
    .symbol:         _Z10PathTraceriP5Pixelijj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     86
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
