#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <ctime>
#include <bits/stdc++.h>
using namespace std;
#include <iostream>



//Function that verify cuda calls and return cuda error if any

#define gpuCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
   if (code != cudaSuccess)
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}


/**
 * Intialize ascendant array
 */
void init_array(int* array, int size, int const adder=10)
{
    array[0] = rand()%adder;
    for(int i = 0; i < size;i++)
    {
        array[i] = array[i-1] + rand()%adder;
    }
    printf("\n");
}

//Function that initialise array with random values
void init_array_no_order(int* array, int size, int const adder=10)
{
    array[0] = rand()%adder;
    for(int i = 0; i < size;i++)
    {
        array[i] = rand()%adder;
    }
    printf("\n");
}

//Function that copy array in another
void copy_array(int* a, int* a_copy, int n){
    for(int i = 0;i < n;i++){
        a_copy[i] = a[i];
    }
}

//Function that print an array of size size
void print_array(int* a, int size)
{
    printf("[");
    for(int i = 0; i < size;i++)
    {
        //printf("i = %d | v = %d " ,i, a[i]);
        printf("%d " ,a[i]);
    }
    printf("]\n");
}

//Globall version of parallel merge of a and b in m with |m|<1024
__global__ void mergeSmallBatch_k(int* aGPU, int* bGPU, int* mGPU, int d, int nb_batch, int2 *indices, int2 *sizes)
{
    int tidx = threadIdx.x%d;
    int Qt = (threadIdx.x-tidx)/d;
    int gbx = Qt + blockIdx.x*(blockDim.x/d);
    int i = gbx*d + tidx;
    if(i < nb_batch*d)
    {
        int2 K;
        int2 P;
        int2 Q;
        if(tidx > sizes[gbx].x)
        {
            K.x = tidx - sizes[gbx].x;
            K.y = sizes[gbx].x;
            P.x = sizes[gbx].x;
            P.y = tidx - sizes[gbx].x;
        }
        else
        {
            K.x = 0;
            K.y = tidx;
            P.x = tidx;
            P.y = 0;
        }

        int offset = 0;
        while(1)
        {
            offset = abs(K.y - P.y)/2;
            Q.x = K.x + offset;
            Q.y = K.y - offset;
            if(Q.y >= 0 && Q.x <= sizes[gbx].y && (Q.y == sizes[gbx].x || Q.x == 0 || aGPU[indices[gbx].x + Q.y] > bGPU[indices[gbx].y + Q.x - 1]))
            {
                if(Q.x == sizes[gbx].y || Q.y == 0 || aGPU[indices[gbx].x + Q.y - 1] <= bGPU[indices[gbx].y + Q.x])
                {
                    if(Q.y < sizes[gbx].x && (Q.x == sizes[gbx].y || aGPU[indices[gbx].x + Q.y] <= bGPU[indices[gbx].y + Q.x]))
                    {
                        mGPU[i] = aGPU[indices[gbx].x + Q.y];
                      // printf("mGPU[%d] = %d | %d \n", i, mGPU[i], indices[gbx].x + Q.y);
                    }
                    else
                    {
                        mGPU[i] = bGPU[indices[gbx].y + Q.x];
                      // printf("mGPU[%d] = %d | %d\n", i, mGPU[i], indices[gbx].y + Q.x);
                    }
                    break;
                }
                else
                {
                    K.x = Q.x + 1;
                    K.y = Q.y - 1;
                }
            }
            else
            {
              P.x = Q.x - 1;
              P.y = Q.y + 1;

            }

        }
    }
}


//Fonction de prétraitement qui trie chaque paire contigüe d'éléments d'un tableau m
__global__ void pretraitementFusionSort(int* mGPU, int n){
    int blockId = blockIdx.x;
    int threadId = threadIdx.x;
    int i = blockId * blockDim.x + threadId;
    int tmp;
    if(i < n/2)
    {
        int indice = 2*i;
        if(mGPU[indice] > mGPU[indice+1])
        {
            tmp = mGPU[indice];
            mGPU[indice] = mGPU[indice+1];
            mGPU[indice+1] = tmp;
        }
    }
}

__global__ void arrangeBatch(int *A, int *B, int *m, int2 *sizes, int2 *indices, int n_m, int nb_batch, int d)
{
  int tidx = threadIdx.x%d;
  int Qt = (threadIdx.x-tidx)/d;
  int gbx = Qt + blockIdx.x*(blockDim.x/d);
  int i = gbx*d + tidx;
  if (i < n_m)
  {
    if (tidx < d/2)
    {
      A[gbx*d/2 + tidx] = m[i];
    }
    else
    {
      B[gbx*d/2 + tidx - d/2] = m[i];
    }
    if (tidx == 0)
    {
      indices[i/d].x = i/2;
      indices[i/d].y = i/2;
      sizes[i/d].x = d/2;
      sizes[i/d].y = d/2;
    }
  }
}

__global__ void truncate(int *mTrunc, int *m, int n_m, int k, int nb_batch, int d)
{
  int tidx = threadIdx.x%d;
  int Qt = (threadIdx.x-tidx)/d;
  int gbx = Qt + blockIdx.x*(blockDim.x/d);
  int i = gbx*d + tidx;
  if(i < nb_batch*d)
  {
    // printf("i : %d\n", i);
    if (tidx < k)
    {
      mTrunc[gbx*k + tidx] = m[i];
    }
  }
}

//Function that sort any array
void batchMerge_k(int *mGPU, int n_m, int k)
{
  int *M, *aGPU, *bGPU, *mTrunc;
  int2 *sizesGPU, *indicesGPU;
  int nb_batch, d;
  d = 4;
  nb_batch = n_m/d;

  M = (int*)malloc(n_m*sizeof(int));
  gpuCheck(cudaMalloc(&aGPU, n_m/2*sizeof(int)));
  gpuCheck(cudaMalloc(&bGPU, n_m/2*sizeof(int)));
  gpuCheck(cudaMalloc(&sizesGPU, nb_batch*sizeof(int2)));
  gpuCheck(cudaMalloc(&indicesGPU, nb_batch*sizeof(int2)));


  while(nb_batch >= 1)
  {
    arrangeBatch<<<nb_batch, d>>>(aGPU, bGPU, mGPU, sizesGPU, indicesGPU, n_m, nb_batch, d);
    gpuCheck( cudaPeekAtLastError() );
    gpuCheck( cudaDeviceSynchronize() );

    mergeSmallBatch_k<<<nb_batch, d>>>(aGPU, bGPU, mGPU, d, nb_batch, indicesGPU, sizesGPU);
    gpuCheck( cudaPeekAtLastError() );
    gpuCheck( cudaDeviceSynchronize() );

    if (d > k)
    {
      gpuCheck(cudaMalloc(&mTrunc, k*nb_batch*sizeof(int)));
      truncate<<<nb_batch, d>>>(mTrunc, mGPU, n_m, k, nb_batch, d);
      gpuCheck( cudaPeekAtLastError() );
      gpuCheck( cudaDeviceSynchronize() );
      gpuCheck(cudaMalloc(&mGPU, k*nb_batch*sizeof(int)));
      mGPU = mTrunc;
      n_m = k*nb_batch;
      d = k;
      gpuCheck(cudaMalloc(&mTrunc, n_m/2*sizeof(int)));
      gpuCheck(cudaMalloc(&aGPU, n_m/2*sizeof(int)));
      gpuCheck(cudaMalloc(&bGPU, n_m/2*sizeof(int)));
      gpuCheck(cudaMalloc(&sizesGPU, nb_batch*sizeof(int2)));
      gpuCheck(cudaMalloc(&indicesGPU, nb_batch*sizeof(int2)));

    }
    // print_array(M, n_m);
    nb_batch = nb_batch/2;
    d *= 2;
  }
  gpuCheck( cudaMemcpy(M, mGPU, n_m*sizeof(int), cudaMemcpyDeviceToHost) );
  print_array(M, n_m);
}

void indices_array(int2 *indices, int2 *sizes, int N)
{
  indices[0].x=0;
  indices[0].y=0;
  for (int i = 1; i < N; i++)
  {
    indices[i].x = indices[i-1].x+sizes[i-1].x;
    indices[i].y = indices[i-1].y+sizes[i-1].y;

  }
}


// Function to swap position of elements
void swap(int *a, int *b) {
  int t = *a;
  *a = *b;
  *b = t;
}

// Function to print eklements of an array
void printArray(int array[], int size) {
  int i;
  for (i = 0; i < size; i++)
    cout << array[i] << " ";
  cout << endl;
}

// Function to partition the array on the basis of pivot element
int partition(int array[], int low, int high) {
  // Select the pivot element
  int pivot = array[high];
  int i = (low - 1);

  // Put the elements smaller than pivot on the left
  // and greater than pivot on the right of pivot
  for (int j = low; j < high; j++) {
    if (array[j] <= pivot) {
      i++;
      swap(&array[i], &array[j]);
    }
  }
  swap(&array[i + 1], &array[high]);
  return (i + 1);
}

void quickSort(int array[], int low, int high) {
  if (low < high) {
    // Select pivot position and put all the elements smaller
    // than pivot on left and greater than pivot on right
    int pi = partition(array, low, high);

    // Sort the elements on the left of pivot
    quickSort(array, low, pi - 1);

    // Sort the elements on the right of pivot
    quickSort(array, pi + 1, high);
  }
}

void knnSeq(int knn[], int *m, int n_m, int k)
{
  for (int i = 0; i < k; i++)
  {
    knn[i] = m[i];
  }


  quickSort(knn, 0, k-1);
  for (int i = k; i < n_m; i++)
  {
    if (knn[k-1] > m[i])
    {
      knn[k-1] = m[i];
      quickSort(knn, 0, k-1);
    }
  }
}

int assertPretraitement(int *tab, int size)
{
  if(size % 2 == 1)
  {
      size -= 1;
  }
  for (int i=0; i<size/2; i++)
  {
    if (tab[2*i] > tab[2*i+1])
    {
      printf("WARNING : Unsuccessful pretreatment ... : unordered paired array on indice %d ...\n", i);
      printf("tab[i]= %d > tab[i+1] = %d\n", tab[i], tab[i+1]);
      return 0;
    }
  }
  printf("\nSuccessful pretreatment !\n");
  return 1;
}

//Fonction qui trie un tableau M en parallèle par tri fusion itératif (question 3)

//Fonctions de vérification

//Fonction qui vérifie qu'un tableau est bien trié (tous ses éléments rangés dans l'ordre croissant)
int assertOrder(int *tab, int size){
  for (int i=0; i<size-1; i++){
    if (tab[i] > tab[i+1]){
      printf("WARNING : Unsuccessful merge or sort ... : unordered array on indice %d ...\n", i);
      printf("tab[i]= %d > tab[i+1] = %d\n", tab[i], tab[i+1]);
      return 0;
    }
  }
  return 1;
}

//Fonction qui vérifie qu'on retrouve bien dans le nouveau tableau tous les éléments des deux tableaux qu'on veut fusionner
int assertMergeAllValuesPresent(int *tab, int n1, int *tab2, int n2, int* m, int size)
{
  int verif[size]; //tableau avec des 1 là où l'on a déjà vérifié qu'il correspond déjà à un élément de a ou de b
  for(int i = 0;i<size;i++){
      verif[i] = 0;
  }

  for (int i=0; i<size; i++){
    for(int j = 0;j < n1;j++){
      if(tab[j] == m[i] && verif[i] == 0){ //si il y a une valeur identique et que celle-ci n'a pas été vérifiée
          verif[i] = 1;
      }
    }
  }
  for (int i=0; i<size; i++){
    for(int j = 0;j < n2;j++){
      if(tab2[j] == m[i] && verif[i] == 0){
          verif[i] = 1;
      }
    }
  }

  for(int i = 0;i<size;i++){
    if(verif[i] != 1){
        printf("\nWARNING : Unsuccessful merge : incorrect elements...\n");
        return 0;
    }
  }

  return 1;
}

//Fonction qui vérifie qu'on retrouve bien dans le nouveau tableau tous les éléments du tableau qu'on veut trier
int assertSortAllValuesPresent(int* m, int* m_sorted, int size){
  int verif[size]; //tableau avec des 1 là où l'on a déjà vérifié qu'il correspond déjà à un élément de a ou de b
  for(int i = 0;i<size;i++){
      verif[i] = 0;
  }

  for (int i=0; i<size; i++){
    for(int j = 0;j < size;j++){
      if(m_sorted[j] == m[i]){ //si il y a une valeur identique
          verif[i] = 1;
      }
    }
  }

  for(int i = 0;i<size;i++){
    if(verif[i] != 1){
        printf("i : %d\n", i);
        printf("\nWARNING : Unsuccessful sort : incorrect elements...\n");
        return 0;
    }
  }

  return 1;
}

//Fonction qui vérifie qu'un tableau est bien trié et la fusion de deux tableaux
//tab et tab2 : les deux tableaux qu'on veut fusionner
//m : le tableau qui est la fusion triée de tab et tab2
int assertMerge(int *tab, int n1, int *tab2, int n2, int* m, int size){
    int successfulOrder = assertOrder(m, size);
    int successfulElements = assertMergeAllValuesPresent(tab, n1, tab2, n2, m, size);
    //assertMergeAllValuesPresent(int *tab, int n1, int *tab2, int n2, int* m, int size)
    if(successfulOrder && successfulElements){
        printf("\nSuccessful merge !\n");
        return 1;
    }
    else{
        printf("\nUnsuccessful merge !\n");
        return 0;
    }
}

//Fonction qui vérifie qu'un tableau est bien trié
//m : le tableau non trié qu'on veut trier
//m_sorted : le tableau m soi-disant trié (on veut vérifier si c'est bien le cas)
//size : la taille du tableau
int assertSorted(int* m, int* m_sorted, int size)
{
    int successfulOrder = assertOrder(m_sorted, size); // les éléments du tableau sont ils bien dans le bon ordre ?
    int successfulElements = assertSortAllValuesPresent(m, m_sorted, size); //retrouve t-on bien toutes les valeurs ?
    if(successfulOrder && successfulElements){
        printf("\nSuccessful sort !\n");
        return 1;
    }
    else{
        printf("\nUnsuccessful sort !\n");
        return 0;
    }
}

int main(int argc, char *argv[])
{
    std::clock_t startS, endS;
    float seqMergeTime, parMergeTime, DoH, HoD;

    srand(time(NULL));
    int n_m = pow(2, 20);
    int pas = 8; // 1024<1024
    int k = 8;

    if(argc== 3)
    {
      k = atoi(argv[1]);
      n_m = atoi(argv[2]);
    }
    int nbPartitions = n_m/pas+(n_m%pas!=0);
    int *m, *mGPU;
    int *knn = (int*)malloc(k*sizeof(int));
    m = (int*)malloc(n_m*sizeof(int));
    init_array_no_order(m, n_m, n_m);
    gpuCheck(cudaMalloc(&mGPU, n_m*sizeof(int)));

    startS = std::clock();
    gpuCheck(cudaMemcpy(mGPU, m, n_m*sizeof(int), cudaMemcpyHostToDevice));
    endS = std::clock();
    HoD = (endS - startS) / (float) CLOCKS_PER_SEC;

    printf("======== Parallel search of KNN =======\n");
    printf("* K : %d\n* Number of features : %d\n", k, n_m);

    //================ Parallel : =======================\\

    //Etape de prétraitement :
    startS = std::clock();
    pretraitementFusionSort<<<nbPartitions, pas>>>(mGPU, n_m);
    gpuCheck( cudaPeekAtLastError() );
    gpuCheck( cudaDeviceSynchronize() );

    //Sort array
    printf("========= Parallel merge : =============\n");
    printf("* K-Nearest Neighbors :");
    batchMerge_k(mGPU, n_m, k);
    gpuCheck( cudaDeviceSynchronize() );
    endS = std::clock();
    parMergeTime = (endS - startS) / (float) CLOCKS_PER_SEC;

    startS = std::clock();
    knnSeq(knn, m, n_m, k);
    endS = std::clock();
    seqMergeTime = (endS - startS) / (float) CLOCKS_PER_SEC;

    // startS = std::clock();
    // // gpuCheck( cudaMemcpy(knn, mGPU, k*sizeof(int), cudaMemcpyDeviceToHost) );
    // endS = std::clock();
    // DoH = (endS - startS) / (float) CLOCKS_PER_SEC;


    printf("Total time elapsed : %f s\n", parMergeTime+DoH+HoD);
    printf("Time running algorithm : %f s\n", parMergeTime);
    printf("Time to copy Host to Device : %f s\n", HoD);
    // printf("Time to copy Device to Host : %f s\n", DoH);
    printf("Parrallel algorithm is %f times faster than sequential merge !\n", seqMergeTime/parMergeTime);
    printf("Parrallel knn finding is %f times faster than sequential merge !\n\n", seqMergeTime/(parMergeTime+HoD));

    printf("========= Sequential merge : =============\n");
    printf("* K-Nearest Neighbors :");
    // print_array(knn, k);
    printf("Total time elapsed : %f s\n", seqMergeTime);



    // print_array(knn, k);


    return 0;
}

	.file	"tmpxft_00221186_00000000-6_knnParallel.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10847:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE10847:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB10825:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L8
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L2
	movl	%ebx, %edi
	call	exit@PLT
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L8:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE10825:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"\n"
	.text
	.globl	_Z10init_arrayPiii
	.type	_Z10init_arrayPiii, @function
_Z10init_arrayPiii:
.LFB10826:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%edx, %ebx
	call	rand@PLT
	cltd
	idivl	%ebx
	movl	%edx, (%r12)
.L13:
	cmpl	%ebp, %r13d
	jle	.L16
	movl	-4(%r12,%rbp,4), %r14d
	call	rand@PLT
	cltd
	idivl	%ebx
	addl	%r14d, %edx
	movl	%edx, (%r12,%rbp,4)
	incq	%rbp
	jmp	.L13
.L16:
	popq	%rbx
	.cfi_def_cfa_offset 40
	leaq	.LC1(%rip), %rsi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%r12
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE10826:
	.size	_Z10init_arrayPiii, .-_Z10init_arrayPiii
	.globl	_Z19init_array_no_orderPiii
	.type	_Z19init_array_no_orderPiii, @function
_Z19init_array_no_orderPiii:
.LFB10827:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%edx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
	call	rand@PLT
	cltd
	idivl	%ebx
	movl	%edx, (%r12)
.L18:
	cmpl	%ebp, %r13d
	jle	.L21
	call	rand@PLT
	cltd
	idivl	%ebx
	movl	%edx, (%r12,%rbp,4)
	incq	%rbp
	jmp	.L18
.L21:
	popq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC1(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE10827:
	.size	_Z19init_array_no_orderPiii, .-_Z19init_array_no_orderPiii
	.globl	_Z10copy_arrayPiS_i
	.type	_Z10copy_arrayPiS_i, @function
_Z10copy_arrayPiS_i:
.LFB10828:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L23:
	cmpl	%eax, %edx
	jle	.L25
	movl	(%rdi,%rax,4), %ecx
	movl	%ecx, (%rsi,%rax,4)
	incq	%rax
	jmp	.L23
.L25:
	ret
	.cfi_endproc
.LFE10828:
	.size	_Z10copy_arrayPiS_i, .-_Z10copy_arrayPiS_i
	.section	.rodata.str1.1
.LC2:
	.string	"["
.LC3:
	.string	"%d "
.LC4:
	.string	"]\n"
	.text
	.globl	_Z11print_arrayPii
	.type	_Z11print_arrayPii, @function
_Z11print_arrayPii:
.LFB10829:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%eax, %eax
	leaq	.LC3(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	movl	$2, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	leaq	.LC2(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
	call	__printf_chk@PLT
.L27:
	cmpl	%ebx, %ebp
	jle	.L30
	movl	(%r12,%rbx,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L27
.L30:
	popq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC4(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE10829:
	.size	_Z11print_arrayPii, .-_Z11print_arrayPii
	.globl	_Z13indices_arrayP4int2S0_i
	.type	_Z13indices_arrayP4int2S0_i, @function
_Z13indices_arrayP4int2S0_i:
.LFB10831:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	movq	%rax, (%rdi)
	xorl	%eax, %eax
.L32:
	incq	%rax
	cmpl	%eax, %edx
	jle	.L34
	movl	-8(%rsi,%rax,8), %ecx
	addl	-8(%rdi,%rax,8), %ecx
	movl	%ecx, (%rdi,%rax,8)
	movl	-4(%rsi,%rax,8), %ecx
	addl	-4(%rdi,%rax,8), %ecx
	movl	%ecx, 4(%rdi,%rax,8)
	jmp	.L32
.L34:
	ret
	.cfi_endproc
.LFE10831:
	.size	_Z13indices_arrayP4int2S0_i, .-_Z13indices_arrayP4int2S0_i
	.globl	_Z4swapPiS_
	.type	_Z4swapPiS_, @function
_Z4swapPiS_:
.LFB10832:
	.cfi_startproc
	endbr64
	movl	(%rdi), %eax
	movl	(%rsi), %edx
	movl	%edx, (%rdi)
	movl	%eax, (%rsi)
	ret
	.cfi_endproc
.LFE10832:
	.size	_Z4swapPiS_, .-_Z4swapPiS_
	.section	.rodata.str1.1
.LC5:
	.string	" "
	.text
	.globl	_Z10printArrayPii
	.type	_Z10printArrayPii, @function
_Z10printArrayPii:
.LFB10833:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	_ZSt4cout(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L37:
	cmpl	%ebx, %ebp
	jle	.L40
	movl	(%r12,%rbx,4), %esi
	movq	%r13, %rdi
	incq	%rbx
	call	_ZNSolsEi@PLT
	movl	$1, %edx
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	jmp	.L37
.L40:
	popq	%rax
	.cfi_def_cfa_offset 40
	movq	%r13, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	.cfi_endproc
.LFE10833:
	.size	_Z10printArrayPii, .-_Z10printArrayPii
	.globl	_Z9partitionPiii
	.type	_Z9partitionPiii, @function
_Z9partitionPiii:
.LFB10834:
	.cfi_startproc
	endbr64
	movslq	%edx, %rcx
	movq	%rdi, %rax
	leaq	(%rdi,%rcx,4), %r8
	leal	-1(%rsi), %ecx
	movslq	%esi, %rsi
	movl	(%r8), %r10d
.L42:
	leal	1(%rcx), %edi
	cmpl	%esi, %edx
	jle	.L45
	movl	(%rax,%rsi,4), %r9d
	cmpl	%r10d, %r9d
	jg	.L43
	movslq	%edi, %rcx
	leaq	(%rax,%rcx,4), %rcx
	movl	(%rcx), %r11d
	movl	%r9d, (%rcx)
	movl	%edi, %ecx
	movl	%r11d, (%rax,%rsi,4)
.L43:
	incq	%rsi
	jmp	.L42
.L45:
	movslq	%ecx, %rcx
	leaq	4(%rax,%rcx,4), %rax
	movl	(%r8), %ecx
	movl	(%rax), %edx
	movl	%ecx, (%rax)
	movl	%edi, %eax
	movl	%edx, (%r8)
	ret
	.cfi_endproc
.LFE10834:
	.size	_Z9partitionPiii, .-_Z9partitionPiii
	.globl	_Z9quickSortPiii
	.type	_Z9quickSortPiii, @function
_Z9quickSortPiii:
.LFB10835:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
.L48:
	cmpl	%r13d, %esi
	jge	.L46
	movl	%r13d, %edx
	movq	%r12, %rdi
	movl	%esi, 12(%rsp)
	call	_Z9partitionPiii
	movl	12(%rsp), %esi
	movq	%r12, %rdi
	movl	%eax, %ebp
	leal	-1(%rax), %edx
	call	_Z9quickSortPiii
	leal	1(%rbp), %esi
	jmp	.L48
.L46:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10835:
	.size	_Z9quickSortPiii, .-_Z9quickSortPiii
	.globl	_Z6knnSeqPiS_ii
	.type	_Z6knnSeqPiS_ii, @function
_Z6knnSeqPiS_ii:
.LFB10836:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%ecx, %rbx
	pushq	%r8
	.cfi_def_cfa_offset 64
.L51:
	cmpl	%eax, %ebx
	jle	.L57
	movl	0(%r13,%rax,4), %edx
	movl	%edx, 0(%rbp,%rax,4)
	incq	%rax
	jmp	.L51
.L57:
	leal	-1(%rbx), %r14d
	xorl	%esi, %esi
	leaq	-4(%rbp,%rbx,4), %r15
	movq	%rbp, %rdi
	movl	%r14d, %edx
	call	_Z9quickSortPiii
.L53:
	cmpl	%ebx, %r12d
	jle	.L58
	movl	0(%r13,%rbx,4), %eax
	cmpl	%eax, (%r15)
	jle	.L54
	movl	%eax, (%r15)
	movl	%r14d, %edx
	xorl	%esi, %esi
	movq	%rbp, %rdi
	call	_Z9quickSortPiii
.L54:
	incq	%rbx
	jmp	.L53
.L58:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10836:
	.size	_Z6knnSeqPiS_ii, .-_Z6knnSeqPiS_ii
	.section	.rodata.str1.1
.LC6:
	.string	"WARNING : Unsuccessful pretreatment ... : unordered paired array on indice %d ...\n"
.LC7:
	.string	"tab[i]= %d > tab[i+1] = %d\n"
.LC8:
	.string	"\nSuccessful pretreatment !\n"
	.text
	.globl	_Z19assertPretraitementPii
	.type	_Z19assertPretraitementPii, @function
_Z19assertPretraitementPii:
.LFB10837:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	cltd
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rcx
	.cfi_def_cfa_offset 32
	movl	$2, %ecx
	idivl	%ecx
	decl	%edx
	jne	.L60
	decl	%esi
.L60:
	movl	%esi, %eax
	movl	$2, %ecx
	xorl	%ebx, %ebx
	cltd
	idivl	%ecx
	movl	%eax, %esi
.L61:
	cmpl	%ebx, %esi
	jle	.L66
	movl	4(%rbp,%rbx,8), %edi
	leaq	1(%rbx), %rax
	cmpl	%edi, 0(%rbp,%rbx,8)
	jle	.L64
	movl	%ebx, %edx
	incl	%ebx
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	movslq	%ebx, %rbx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	0(%rbp,%rbx,4), %ecx
	movl	-4(%rbp,%rbx,4), %edx
	xorl	%eax, %eax
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	xorl	%eax, %eax
	jmp	.L59
.L64:
	movq	%rax, %rbx
	jmp	.L61
.L66:
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
.L59:
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10837:
	.size	_Z19assertPretraitementPii, .-_Z19assertPretraitementPii
	.section	.rodata.str1.1
.LC9:
	.string	"WARNING : Unsuccessful merge or sort ... : unordered array on indice %d ...\n"
	.text
	.globl	_Z11assertOrderPii
	.type	_Z11assertOrderPii, @function
_Z11assertOrderPii:
.LFB10838:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%edx, %edx
	decl	%esi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 32
.L68:
	cmpl	%edx, %esi
	jle	.L73
	movq	%rbx, %rbp
	addq	$4, %rbx
	movl	(%rbx), %eax
	cmpl	%eax, 0(%rbp)
	jle	.L69
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	(%rbx), %ecx
	movl	0(%rbp), %edx
	movl	$2, %edi
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
	jmp	.L67
.L69:
	incl	%edx
	jmp	.L68
.L73:
	movl	$1, %eax
.L67:
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10838:
	.size	_Z11assertOrderPii, .-_Z11assertOrderPii
	.section	.rodata.str1.1
.LC10:
	.string	"\nWARNING : Unsuccessful merge : incorrect elements...\n"
	.text
	.globl	_Z27assertMergeAllValuesPresentPiiS_iS_i
	.type	_Z27assertMergeAllValuesPresentPiiS_iS_i, @function
_Z27assertMergeAllValuesPresentPiiS_iS_i:
.LFB10839:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%esi, %r11d
	movq	%rdx, %rsi
	movq	%rdi, %r10
	movl	%ecx, %edi
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset 3, -24
	movq	%fs:40, %rax
	movq	%rax, -24(%rbp)
	xorl	%eax, %eax
	movslq	%r9d, %rax
	movq	%rsp, %rcx
	leaq	15(,%rax,4), %rdx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L75:
	cmpq	%rcx, %rsp
	je	.L76
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L75
.L76:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L77
	orq	$0, -8(%rsp,%rax)
.L77:
	movq	%rsp, %rax
	xorl	%edx, %edx
.L78:
	cmpl	%edx, %r9d
	jle	.L99
	xorl	%ecx, %ecx
	movl	%ecx, (%rax,%rdx,4)
	incq	%rdx
	jmp	.L78
.L99:
	xorl	%edx, %edx
.L80:
	cmpl	%edx, %r9d
	jle	.L100
	xorl	%ecx, %ecx
.L83:
	cmpl	%ecx, %r11d
	jle	.L101
	movl	(%r8,%rdx,4), %ebx
	cmpl	%ebx, (%r10,%rcx,4)
	jne	.L81
	cmpl	$0, (%rax,%rdx,4)
	jne	.L81
	movl	$1, (%rax,%rdx,4)
.L81:
	incq	%rcx
	jmp	.L83
.L101:
	incq	%rdx
	jmp	.L80
.L100:
	xorl	%edx, %edx
.L84:
	cmpl	%edx, %r9d
	jle	.L102
	xorl	%ecx, %ecx
.L87:
	cmpl	%ecx, %edi
	jle	.L103
	movl	(%r8,%rdx,4), %ebx
	cmpl	%ebx, (%rsi,%rcx,4)
	jne	.L85
	cmpl	$0, (%rax,%rdx,4)
	jne	.L85
	movl	$1, (%rax,%rdx,4)
.L85:
	incq	%rcx
	jmp	.L87
.L103:
	incq	%rdx
	jmp	.L84
.L102:
	xorl	%edx, %edx
.L88:
	cmpl	%edx, %r9d
	jle	.L104
	incq	%rdx
	cmpl	$1, -4(%rax,%rdx,4)
	je	.L88
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
	jmp	.L74
.L104:
	movl	$1, %eax
.L74:
	movq	-24(%rbp), %rdx
	subq	%fs:40, %rdx
	je	.L91
	call	__stack_chk_fail@PLT
.L91:
	movq	-8(%rbp), %rbx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10839:
	.size	_Z27assertMergeAllValuesPresentPiiS_iS_i, .-_Z27assertMergeAllValuesPresentPiiS_iS_i
	.section	.rodata.str1.1
.LC11:
	.string	"i : %d\n"
.LC12:
	.string	"\nWARNING : Unsuccessful sort : incorrect elements...\n"
	.text
	.globl	_Z26assertSortAllValuesPresentPiS_i
	.type	_Z26assertSortAllValuesPresentPiS_i, @function
_Z26assertSortAllValuesPresentPiS_i:
.LFB10840:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%edx, %eax
	movq	%rsi, %r8
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	subq	$16, %rsp
	movq	%fs:40, %rdx
	movq	%rdx, -8(%rbp)
	xorl	%edx, %edx
	movslq	%eax, %rdx
	movq	%rsp, %rsi
	leaq	15(,%rdx,4), %rcx
	movq	%rcx, %rdx
	andq	$-4096, %rcx
	andq	$-16, %rdx
	subq	%rcx, %rsi
.L106:
	cmpq	%rsi, %rsp
	je	.L107
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L106
.L107:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L108
	orq	$0, -8(%rsp,%rdx)
.L108:
	movq	%rsp, %rsi
	xorl	%edx, %edx
.L109:
	cmpl	%edx, %eax
	jle	.L125
	xorl	%ecx, %ecx
	movl	%ecx, (%rsi,%rdx,4)
	incq	%rdx
	jmp	.L109
.L125:
	xorl	%edx, %edx
.L111:
	cmpl	%edx, %eax
	jle	.L126
	movl	(%rdi,%rdx,4), %r9d
	xorl	%ecx, %ecx
.L113:
	cmpl	%r9d, (%r8,%rcx,4)
	jne	.L112
	movl	$1, (%rsi,%rdx,4)
.L112:
	incq	%rcx
	cmpl	%ecx, %eax
	jg	.L113
	incq	%rdx
	jmp	.L111
.L126:
	xorl	%edx, %edx
.L115:
	cmpl	%edx, %eax
	jle	.L127
	cmpl	$1, (%rsi,%rdx,4)
	leaq	1(%rdx), %rcx
	je	.L119
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
	jmp	.L105
.L119:
	movq	%rcx, %rdx
	jmp	.L115
.L127:
	movl	$1, %eax
.L105:
	movq	-8(%rbp), %rdx
	subq	%fs:40, %rdx
	je	.L118
	call	__stack_chk_fail@PLT
.L118:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10840:
	.size	_Z26assertSortAllValuesPresentPiS_i, .-_Z26assertSortAllValuesPresentPiS_i
	.section	.rodata.str1.1
.LC13:
	.string	"\nSuccessful merge !\n"
.LC14:
	.string	"\nUnsuccessful merge !\n"
	.text
	.globl	_Z11assertMergePiiS_iS_i
	.type	_Z11assertMergePiiS_iS_i, @function
_Z11assertMergePiiS_iS_i:
.LFB10841:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%esi, %r12d
	movl	%r9d, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	movq	%r8, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	%rdx, 24(%rsp)
	movl	%ecx, 20(%rsp)
	movl	%r9d, 16(%rsp)
	movq	%r8, 8(%rsp)
	call	_Z11assertOrderPii
	movl	16(%rsp), %r9d
	movl	%r12d, %esi
	movq	%rbp, %rdi
	movq	8(%rsp), %r8
	movl	20(%rsp), %ecx
	movl	%eax, %ebx
	movq	24(%rsp), %rdx
	call	_Z27assertMergeAllValuesPresentPiiS_iS_i
	testl	%ebx, %ebx
	je	.L129
	testl	%eax, %eax
	je	.L129
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L128
.L129:
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L128:
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10841:
	.size	_Z11assertMergePiiS_iS_i, .-_Z11assertMergePiiS_iS_i
	.section	.rodata.str1.1
.LC15:
	.string	"\nSuccessful sort !\n"
.LC16:
	.string	"\nUnsuccessful sort !\n"
	.text
	.globl	_Z12assertSortedPiS_i
	.type	_Z12assertSortedPiS_i, @function
_Z12assertSortedPiS_i:
.LFB10842:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rsi, %rbx
	movl	%edx, %esi
	movq	%rbx, %rdi
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	call	_Z11assertOrderPii
	movl	12(%rsp), %edx
	movq	%rbx, %rsi
	movq	%r13, %rdi
	movl	%eax, %r12d
	call	_Z26assertSortAllValuesPresentPiS_i
	testl	%r12d, %r12d
	je	.L139
	testl	%eax, %eax
	je	.L139
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L138
.L139:
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L138:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10842:
	.size	_Z12assertSortedPiS_i, .-_Z12assertSortedPiS_i
	.globl	_Z52__device_stub__Z17mergeSmallBatch_kPiS_S_iiP4int2S1_PiS_S_iiP4int2S1_
	.type	_Z52__device_stub__Z17mergeSmallBatch_kPiS_S_iiP4int2S1_PiS_S_iiP4int2S1_, @function
_Z52__device_stub__Z17mergeSmallBatch_kPiS_S_iiP4int2S1_PiS_S_iiP4int2S1_:
.LFB10869:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L148
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L148:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L150
	call	__stack_chk_fail@PLT
.L150:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10869:
	.size	_Z52__device_stub__Z17mergeSmallBatch_kPiS_S_iiP4int2S1_PiS_S_iiP4int2S1_, .-_Z52__device_stub__Z17mergeSmallBatch_kPiS_S_iiP4int2S1_PiS_S_iiP4int2S1_
	.globl	_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_
	.type	_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_, @function
_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_:
.LFB10870:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z17mergeSmallBatch_kPiS_S_iiP4int2S1_PiS_S_iiP4int2S1_
	.cfi_endproc
.LFE10870:
	.size	_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_, .-_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_
	.globl	_Z44__device_stub__Z23pretraitementFusionSortPiiPii
	.type	_Z44__device_stub__Z23pretraitementFusionSortPiiPii, @function
_Z44__device_stub__Z23pretraitementFusionSortPiiPii:
.LFB10871:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L153
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z23pretraitementFusionSortPii(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L153:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L155
	call	__stack_chk_fail@PLT
.L155:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10871:
	.size	_Z44__device_stub__Z23pretraitementFusionSortPiiPii, .-_Z44__device_stub__Z23pretraitementFusionSortPiiPii
	.globl	_Z23pretraitementFusionSortPii
	.type	_Z23pretraitementFusionSortPii, @function
_Z23pretraitementFusionSortPii:
.LFB10872:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z23pretraitementFusionSortPiiPii
	.cfi_endproc
.LFE10872:
	.size	_Z23pretraitementFusionSortPii, .-_Z23pretraitementFusionSortPii
	.globl	_Z48__device_stub__Z12arrangeBatchPiS_S_P4int2S1_iiiPiS_S_P4int2S1_iii
	.type	_Z48__device_stub__Z12arrangeBatchPiS_S_P4int2S1_iiiPiS_S_P4int2S1_iii, @function
_Z48__device_stub__Z12arrangeBatchPiS_S_P4int2S1_iiiPiS_S_P4int2S1_iii:
.LFB10873:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L158
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z12arrangeBatchPiS_S_P4int2S1_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L158:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L160
	call	__stack_chk_fail@PLT
.L160:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10873:
	.size	_Z48__device_stub__Z12arrangeBatchPiS_S_P4int2S1_iiiPiS_S_P4int2S1_iii, .-_Z48__device_stub__Z12arrangeBatchPiS_S_P4int2S1_iiiPiS_S_P4int2S1_iii
	.globl	_Z12arrangeBatchPiS_S_P4int2S1_iii
	.type	_Z12arrangeBatchPiS_S_P4int2S1_iii, @function
_Z12arrangeBatchPiS_S_P4int2S1_iii:
.LFB10874:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z12arrangeBatchPiS_S_P4int2S1_iiiPiS_S_P4int2S1_iii
	.cfi_endproc
.LFE10874:
	.size	_Z12arrangeBatchPiS_S_P4int2S1_iii, .-_Z12arrangeBatchPiS_S_P4int2S1_iii
	.globl	_Z33__device_stub__Z8truncatePiS_iiiiPiS_iiii
	.type	_Z33__device_stub__Z8truncatePiS_iiiiPiS_iiii, @function
_Z33__device_stub__Z8truncatePiS_iiiiPiS_iiii:
.LFB10875:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L163
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z8truncatePiS_iiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L163:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L165
	call	__stack_chk_fail@PLT
.L165:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10875:
	.size	_Z33__device_stub__Z8truncatePiS_iiiiPiS_iiii, .-_Z33__device_stub__Z8truncatePiS_iiiiPiS_iiii
	.globl	_Z8truncatePiS_iiii
	.type	_Z8truncatePiS_iiii, @function
_Z8truncatePiS_iiii:
.LFB10876:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z8truncatePiS_iiiiPiS_iiii
	.cfi_endproc
.LFE10876:
	.size	_Z8truncatePiS_iiii, .-_Z8truncatePiS_iiii
	.section	.rodata.str1.1
.LC17:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/homerdurand/HPCA/main/knnParallel.cu"
	.text
	.globl	_Z12batchMerge_kPiii
	.type	_Z12batchMerge_kPiii, @function
_Z12batchMerge_kPiii:
.LFB10830:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movabsq	$4294967297, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	movslq	%esi, %rdi
	movq	%rdi, %rbx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	movl	%edi, %eax
	salq	$2, %rdi
	cltd
	idivl	%ecx
	movl	%eax, %ebp
	call	malloc@PLT
	movl	$2, %ecx
	movq	%rax, 8(%rsp)
	movl	%ebx, %eax
	cltd
	idivl	%ecx
	cltq
	leaq	0(,%rax,4), %r12
	leaq	56(%rsp), %rax
	movq	%r12, %rsi
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$204, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	64(%rsp), %rax
	movq	%r12, %rsi
	movslq	%ebp, %r12
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	salq	$3, %r12
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$205, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	%r12, %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$206, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	%r12, %rsi
	leaq	88(%rsp), %rdi
	movl	$4, %r12d
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$207, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
.L169:
	testl	%ebp, %ebp
	jle	.L177
	movq	%r14, 112(%rsp)
	movl	116(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, 100(%rsp)
	movl	104(%rsp), %esi
	movl	%r12d, 108(%rsp)
	movq	108(%rsp), %rdx
	movl	%ebp, 96(%rsp)
	movq	96(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L170
	pushq	%r12
	.cfi_def_cfa_offset 200
	movl	%ebx, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 208
	movq	104(%rsp), %r8
	movq	96(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdi
	call	_Z48__device_stub__Z12arrangeBatchPiS_S_P4int2S1_iiiPiS_S_P4int2S1_iii
	popq	%rsi
	.cfi_def_cfa_offset 200
	popq	%rdi
	.cfi_def_cfa_offset 192
.L170:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$213, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movl	$1, %ecx
	movl	$214, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	%r14, 112(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, 100(%rsp)
	movl	116(%rsp), %ecx
	movl	%r12d, 108(%rsp)
	movl	104(%rsp), %esi
	movl	%ebp, 96(%rsp)
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L171
	pushq	%rax
	.cfi_def_cfa_offset 200
	movl	%r12d, %ecx
	movl	%ebp, %r8d
	pushq	88(%rsp)
	.cfi_def_cfa_offset 208
	movq	104(%rsp), %r9
	movq	56(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdi
	call	_Z52__device_stub__Z17mergeSmallBatch_kPiS_S_iiP4int2S1_PiS_S_iiP4int2S1_
	popq	%rdx
	.cfi_def_cfa_offset 200
	popq	%rcx
	.cfi_def_cfa_offset 192
.L171:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$217, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movl	$1, %ecx
	movl	$218, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	cmpl	%r13d, %r12d
	jle	.L172
	movl	%ebp, %r15d
	imull	%r13d, %r15d
	movslq	%r15d, %rax
	salq	$2, %rax
	movq	%rax, (%rsp)
	leaq	72(%rsp), %rax
	movq	(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$222, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	%r14, 112(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, 100(%rsp)
	movl	116(%rsp), %ecx
	movl	%r12d, 108(%rsp)
	movl	104(%rsp), %esi
	movl	%ebp, 96(%rsp)
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L173
	movq	40(%rsp), %rsi
	movq	72(%rsp), %rdi
	movl	%r12d, %r9d
	movl	%ebp, %r8d
	movl	%r13d, %ecx
	movl	%ebx, %edx
	call	_Z33__device_stub__Z8truncatePiS_iiiiPiS_iiii
.L173:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$224, %edx
	movl	%r13d, %r12d
	movl	%eax, %edi
	leaq	.LC17(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movl	$1, %ecx
	movl	$225, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$226, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	72(%rsp), %rax
	movl	$2, %ecx
	movq	32(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	%r15d, %eax
	cltd
	idivl	%ecx
	cltq
	leaq	0(,%rax,4), %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$230, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$231, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	24(%rsp), %rdi
	movq	%rbx, %rsi
	movslq	%ebp, %rbx
	salq	$3, %rbx
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$232, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	%rbx, %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$233, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	%rbx, %rsi
	leaq	88(%rsp), %rdi
	movl	%r15d, %ebx
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$234, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
.L172:
	sarl	%ebp
	addl	%r12d, %r12d
	jmp	.L169
.L177:
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdi
	movslq	%ebx, %rdx
	movl	$2, %ecx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$241, %edx
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	8(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z11print_arrayPii
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L175
	call	__stack_chk_fail@PLT
.L175:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10830:
	.size	_Z12batchMerge_kPiii, .-_Z12batchMerge_kPiii
	.section	.rodata.str1.1
.LC19:
	.string	"======== Parallel search of KNN =======\n"
.LC20:
	.string	"* K : %d\n* Number of features : %d\n"
.LC21:
	.string	"========= Parallel merge : =============\n"
.LC22:
	.string	"* K-Nearest Neighbors :"
.LC23:
	.string	"Total time elapsed : %f s\n"
.LC24:
	.string	"Time running algorithm : %f s\n"
.LC25:
	.string	"Time to copy Host to Device : %f s\n"
.LC26:
	.string	"Parrallel algorithm is %f times faster than sequential merge !\n"
.LC27:
	.string	"Parrallel knn finding is %f times faster than sequential merge !\n\n"
.LC28:
	.string	"========= Sequential merge : =============\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB10843:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	xorl	%edi, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	cmpl	$3, %ebp
	jne	.L182
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movl	%eax, %ebx
	jmp	.L179
.L182:
	movl	$8, %ebp
	movl	$1048576, %ebx
.L179:
	xorl	%r15d, %r15d
	movl	%ebx, %eax
	testb	$7, %bl
	movl	$8, %ecx
	setne	%r15b
	cltd
	leaq	.LC17(%rip), %r13
	movslq	%ebp, %rdi
	idivl	%ecx
	salq	$2, %rdi
	addl	%eax, %r15d
	call	malloc@PLT
	movq	%rax, 24(%rsp)
	movslq	%ebx, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movl	%ebx, %edx
	movl	%ebx, %esi
	movq	%rax, %rdi
	movq	%rax, %r12
	call	_Z19init_array_no_orderPiii
	movq	8(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$473, %edx
	movq	%r13, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	clock@PLT
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	movq	%rax, %r14
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$476, %edx
	movq	%r13, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	clock@PLT
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	subq	%r14, %rax
	cvtsi2ssq	%rax, %xmm0
	xorl	%eax, %eax
	divss	.LC18(%rip), %xmm0
	movss	%xmm0, 20(%rsp)
	call	__printf_chk@PLT
	movl	%ebx, %ecx
	movl	%ebp, %edx
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	clock@PLT
	movl	%r15d, 48(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, %r14
	movl	$536870913, %edx
	movl	$1, %ecx
	movabsq	$4294967297, %rax
	movq	%rax, 52(%rsp)
	movq	48(%rsp), %rdi
	salq	$3, %rdx
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L180
	movq	40(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z44__device_stub__Z23pretraitementFusionSortPiiPii
.L180:
	call	cudaPeekAtLastError@PLT
	movq	%r13, %rsi
	movl	$1, %ecx
	movl	$488, %edx
	movl	%eax, %edi
	leaq	.LC22(%rip), %r15
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movl	$1, %ecx
	movl	$489, %edx
	movq	%r13, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	.LC21(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	movl	%ebp, %edx
	movl	%ebx, %esi
	call	_Z12batchMerge_kPiii
	call	cudaDeviceSynchronize@PLT
	movq	%r13, %rsi
	movl	$1, %ecx
	movl	$495, %edx
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	clock@PLT
	subq	%r14, %rax
	cvtsi2ssq	%rax, %xmm0
	divss	.LC18(%rip), %xmm0
	movss	%xmm0, 8(%rsp)
	call	clock@PLT
	movq	24(%rsp), %rdi
	movl	%ebp, %ecx
	movl	%ebx, %edx
	movq	%r12, %rsi
	movq	%rax, %r13
	leaq	.LC23(%rip), %rbp
	call	_Z6knnSeqPiS_ii
	call	clock@PLT
	movq	%rbp, %rsi
	movl	$2, %edi
	subq	%r13, %rax
	cvtsi2ssq	%rax, %xmm0
	divss	.LC18(%rip), %xmm0
	movb	$1, %al
	movd	%xmm0, %ebx
	movss	8(%rsp), %xmm0
	addss	.LC29(%rip), %xmm0
	addss	20(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	leaq	.LC24(%rip), %rsi
	movb	$1, %al
	cvtss2sd	8(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC25(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	20(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	leaq	.LC26(%rip), %rsi
	movb	$1, %al
	movd	%ebx, %xmm0
	divss	8(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movd	%ebx, %xmm0
	movl	$2, %edi
	movb	$1, %al
	movss	20(%rsp), %xmm1
	addss	8(%rsp), %xmm1
	leaq	.LC27(%rip), %rsi
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC28(%rip), %rsi
	call	__printf_chk@PLT
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movd	%ebx, %xmm5
	movq	%rbp, %rsi
	movb	$1, %al
	movl	$2, %edi
	cvtss2sd	%xmm5, %xmm0
	call	__printf_chk@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L181
	call	__stack_chk_fail@PLT
.L181:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10843:
	.size	main, .-main
	.section	.rodata.str1.1
.LC30:
	.string	"_Z8truncatePiS_iiii"
.LC31:
	.string	"_Z12arrangeBatchPiS_S_P4int2S1_iii"
.LC32:
	.string	"_Z23pretraitementFusionSortPii"
.LC33:
	.string	"_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB10878:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC30(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8truncatePiS_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC31(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12arrangeBatchPiS_S_P4int2S1_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC32(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z23pretraitementFusionSortPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC33(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE10878:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC18:
	.long	1232348160
	.align 4
.LC29:
	.long	0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <ctime>
#include <bits/stdc++.h>
using namespace std;
#include <iostream>



//Function that verify cuda calls and return cuda error if any

#define gpuCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
   if (code != hipSuccess)
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}


/**
 * Intialize ascendant array
 */
void init_array(int* array, int size, int const adder=10)
{
    array[0] = rand()%adder;
    for(int i = 0; i < size;i++)
    {
        array[i] = array[i-1] + rand()%adder;
    }
    printf("\n");
}

//Function that initialise array with random values
void init_array_no_order(int* array, int size, int const adder=10)
{
    array[0] = rand()%adder;
    for(int i = 0; i < size;i++)
    {
        array[i] = rand()%adder;
    }
    printf("\n");
}

//Function that copy array in another
void copy_array(int* a, int* a_copy, int n){
    for(int i = 0;i < n;i++){
        a_copy[i] = a[i];
    }
}

//Function that print an array of size size
void print_array(int* a, int size)
{
    printf("[");
    for(int i = 0; i < size;i++)
    {
        //printf("i = %d | v = %d " ,i, a[i]);
        printf("%d " ,a[i]);
    }
    printf("]\n");
}

//Globall version of parallel merge of a and b in m with |m|<1024
__global__ void mergeSmallBatch_k(int* aGPU, int* bGPU, int* mGPU, int d, int nb_batch, int2 *indices, int2 *sizes)
{
    int tidx = threadIdx.x%d;
    int Qt = (threadIdx.x-tidx)/d;
    int gbx = Qt + blockIdx.x*(blockDim.x/d);
    int i = gbx*d + tidx;
    if(i < nb_batch*d)
    {
        int2 K;
        int2 P;
        int2 Q;
        if(tidx > sizes[gbx].x)
        {
            K.x = tidx - sizes[gbx].x;
            K.y = sizes[gbx].x;
            P.x = sizes[gbx].x;
            P.y = tidx - sizes[gbx].x;
        }
        else
        {
            K.x = 0;
            K.y = tidx;
            P.x = tidx;
            P.y = 0;
        }

        int offset = 0;
        while(1)
        {
            offset = abs(K.y - P.y)/2;
            Q.x = K.x + offset;
            Q.y = K.y - offset;
            if(Q.y >= 0 && Q.x <= sizes[gbx].y && (Q.y == sizes[gbx].x || Q.x == 0 || aGPU[indices[gbx].x + Q.y] > bGPU[indices[gbx].y + Q.x - 1]))
            {
                if(Q.x == sizes[gbx].y || Q.y == 0 || aGPU[indices[gbx].x + Q.y - 1] <= bGPU[indices[gbx].y + Q.x])
                {
                    if(Q.y < sizes[gbx].x && (Q.x == sizes[gbx].y || aGPU[indices[gbx].x + Q.y] <= bGPU[indices[gbx].y + Q.x]))
                    {
                        mGPU[i] = aGPU[indices[gbx].x + Q.y];
                      // printf("mGPU[%d] = %d | %d \n", i, mGPU[i], indices[gbx].x + Q.y);
                    }
                    else
                    {
                        mGPU[i] = bGPU[indices[gbx].y + Q.x];
                      // printf("mGPU[%d] = %d | %d\n", i, mGPU[i], indices[gbx].y + Q.x);
                    }
                    break;
                }
                else
                {
                    K.x = Q.x + 1;
                    K.y = Q.y - 1;
                }
            }
            else
            {
              P.x = Q.x - 1;
              P.y = Q.y + 1;

            }

        }
    }
}


//Fonction de prétraitement qui trie chaque paire contigüe d'éléments d'un tableau m
__global__ void pretraitementFusionSort(int* mGPU, int n){
    int blockId = blockIdx.x;
    int threadId = threadIdx.x;
    int i = blockId * blockDim.x + threadId;
    int tmp;
    if(i < n/2)
    {
        int indice = 2*i;
        if(mGPU[indice] > mGPU[indice+1])
        {
            tmp = mGPU[indice];
            mGPU[indice] = mGPU[indice+1];
            mGPU[indice+1] = tmp;
        }
    }
}

__global__ void arrangeBatch(int *A, int *B, int *m, int2 *sizes, int2 *indices, int n_m, int nb_batch, int d)
{
  int tidx = threadIdx.x%d;
  int Qt = (threadIdx.x-tidx)/d;
  int gbx = Qt + blockIdx.x*(blockDim.x/d);
  int i = gbx*d + tidx;
  if (i < n_m)
  {
    if (tidx < d/2)
    {
      A[gbx*d/2 + tidx] = m[i];
    }
    else
    {
      B[gbx*d/2 + tidx - d/2] = m[i];
    }
    if (tidx == 0)
    {
      indices[i/d].x = i/2;
      indices[i/d].y = i/2;
      sizes[i/d].x = d/2;
      sizes[i/d].y = d/2;
    }
  }
}

__global__ void truncate(int *mTrunc, int *m, int n_m, int k, int nb_batch, int d)
{
  int tidx = threadIdx.x%d;
  int Qt = (threadIdx.x-tidx)/d;
  int gbx = Qt + blockIdx.x*(blockDim.x/d);
  int i = gbx*d + tidx;
  if(i < nb_batch*d)
  {
    // printf("i : %d\n", i);
    if (tidx < k)
    {
      mTrunc[gbx*k + tidx] = m[i];
    }
  }
}

//Function that sort any array
void batchMerge_k(int *mGPU, int n_m, int k)
{
  int *M, *aGPU, *bGPU, *mTrunc;
  int2 *sizesGPU, *indicesGPU;
  int nb_batch, d;
  d = 4;
  nb_batch = n_m/d;

  M = (int*)malloc(n_m*sizeof(int));
  gpuCheck(hipMalloc(&aGPU, n_m/2*sizeof(int)));
  gpuCheck(hipMalloc(&bGPU, n_m/2*sizeof(int)));
  gpuCheck(hipMalloc(&sizesGPU, nb_batch*sizeof(int2)));
  gpuCheck(hipMalloc(&indicesGPU, nb_batch*sizeof(int2)));


  while(nb_batch >= 1)
  {
    arrangeBatch<<<nb_batch, d>>>(aGPU, bGPU, mGPU, sizesGPU, indicesGPU, n_m, nb_batch, d);
    gpuCheck( hipPeekAtLastError() );
    gpuCheck( hipDeviceSynchronize() );

    mergeSmallBatch_k<<<nb_batch, d>>>(aGPU, bGPU, mGPU, d, nb_batch, indicesGPU, sizesGPU);
    gpuCheck( hipPeekAtLastError() );
    gpuCheck( hipDeviceSynchronize() );

    if (d > k)
    {
      gpuCheck(hipMalloc(&mTrunc, k*nb_batch*sizeof(int)));
      truncate<<<nb_batch, d>>>(mTrunc, mGPU, n_m, k, nb_batch, d);
      gpuCheck( hipPeekAtLastError() );
      gpuCheck( hipDeviceSynchronize() );
      gpuCheck(hipMalloc(&mGPU, k*nb_batch*sizeof(int)));
      mGPU = mTrunc;
      n_m = k*nb_batch;
      d = k;
      gpuCheck(hipMalloc(&mTrunc, n_m/2*sizeof(int)));
      gpuCheck(hipMalloc(&aGPU, n_m/2*sizeof(int)));
      gpuCheck(hipMalloc(&bGPU, n_m/2*sizeof(int)));
      gpuCheck(hipMalloc(&sizesGPU, nb_batch*sizeof(int2)));
      gpuCheck(hipMalloc(&indicesGPU, nb_batch*sizeof(int2)));

    }
    // print_array(M, n_m);
    nb_batch = nb_batch/2;
    d *= 2;
  }
  gpuCheck( hipMemcpy(M, mGPU, n_m*sizeof(int), hipMemcpyDeviceToHost) );
  print_array(M, n_m);
}

void indices_array(int2 *indices, int2 *sizes, int N)
{
  indices[0].x=0;
  indices[0].y=0;
  for (int i = 1; i < N; i++)
  {
    indices[i].x = indices[i-1].x+sizes[i-1].x;
    indices[i].y = indices[i-1].y+sizes[i-1].y;

  }
}


// Function to swap position of elements
void swap(int *a, int *b) {
  int t = *a;
  *a = *b;
  *b = t;
}

// Function to print eklements of an array
void printArray(int array[], int size) {
  int i;
  for (i = 0; i < size; i++)
    cout << array[i] << " ";
  cout << endl;
}

// Function to partition the array on the basis of pivot element
int partition(int array[], int low, int high) {
  // Select the pivot element
  int pivot = array[high];
  int i = (low - 1);

  // Put the elements smaller than pivot on the left
  // and greater than pivot on the right of pivot
  for (int j = low; j < high; j++) {
    if (array[j] <= pivot) {
      i++;
      swap(&array[i], &array[j]);
    }
  }
  swap(&array[i + 1], &array[high]);
  return (i + 1);
}

void quickSort(int array[], int low, int high) {
  if (low < high) {
    // Select pivot position and put all the elements smaller
    // than pivot on left and greater than pivot on right
    int pi = partition(array, low, high);

    // Sort the elements on the left of pivot
    quickSort(array, low, pi - 1);

    // Sort the elements on the right of pivot
    quickSort(array, pi + 1, high);
  }
}

void knnSeq(int knn[], int *m, int n_m, int k)
{
  for (int i = 0; i < k; i++)
  {
    knn[i] = m[i];
  }


  quickSort(knn, 0, k-1);
  for (int i = k; i < n_m; i++)
  {
    if (knn[k-1] > m[i])
    {
      knn[k-1] = m[i];
      quickSort(knn, 0, k-1);
    }
  }
}

int assertPretraitement(int *tab, int size)
{
  if(size % 2 == 1)
  {
      size -= 1;
  }
  for (int i=0; i<size/2; i++)
  {
    if (tab[2*i] > tab[2*i+1])
    {
      printf("WARNING : Unsuccessful pretreatment ... : unordered paired array on indice %d ...\n", i);
      printf("tab[i]= %d > tab[i+1] = %d\n", tab[i], tab[i+1]);
      return 0;
    }
  }
  printf("\nSuccessful pretreatment !\n");
  return 1;
}

//Fonction qui trie un tableau M en parallèle par tri fusion itératif (question 3)

//Fonctions de vérification

//Fonction qui vérifie qu'un tableau est bien trié (tous ses éléments rangés dans l'ordre croissant)
int assertOrder(int *tab, int size){
  for (int i=0; i<size-1; i++){
    if (tab[i] > tab[i+1]){
      printf("WARNING : Unsuccessful merge or sort ... : unordered array on indice %d ...\n", i);
      printf("tab[i]= %d > tab[i+1] = %d\n", tab[i], tab[i+1]);
      return 0;
    }
  }
  return 1;
}

//Fonction qui vérifie qu'on retrouve bien dans le nouveau tableau tous les éléments des deux tableaux qu'on veut fusionner
int assertMergeAllValuesPresent(int *tab, int n1, int *tab2, int n2, int* m, int size)
{
  int verif[size]; //tableau avec des 1 là où l'on a déjà vérifié qu'il correspond déjà à un élément de a ou de b
  for(int i = 0;i<size;i++){
      verif[i] = 0;
  }

  for (int i=0; i<size; i++){
    for(int j = 0;j < n1;j++){
      if(tab[j] == m[i] && verif[i] == 0){ //si il y a une valeur identique et que celle-ci n'a pas été vérifiée
          verif[i] = 1;
      }
    }
  }
  for (int i=0; i<size; i++){
    for(int j = 0;j < n2;j++){
      if(tab2[j] == m[i] && verif[i] == 0){
          verif[i] = 1;
      }
    }
  }

  for(int i = 0;i<size;i++){
    if(verif[i] != 1){
        printf("\nWARNING : Unsuccessful merge : incorrect elements...\n");
        return 0;
    }
  }

  return 1;
}

//Fonction qui vérifie qu'on retrouve bien dans le nouveau tableau tous les éléments du tableau qu'on veut trier
int assertSortAllValuesPresent(int* m, int* m_sorted, int size){
  int verif[size]; //tableau avec des 1 là où l'on a déjà vérifié qu'il correspond déjà à un élément de a ou de b
  for(int i = 0;i<size;i++){
      verif[i] = 0;
  }

  for (int i=0; i<size; i++){
    for(int j = 0;j < size;j++){
      if(m_sorted[j] == m[i]){ //si il y a une valeur identique
          verif[i] = 1;
      }
    }
  }

  for(int i = 0;i<size;i++){
    if(verif[i] != 1){
        printf("i : %d\n", i);
        printf("\nWARNING : Unsuccessful sort : incorrect elements...\n");
        return 0;
    }
  }

  return 1;
}

//Fonction qui vérifie qu'un tableau est bien trié et la fusion de deux tableaux
//tab et tab2 : les deux tableaux qu'on veut fusionner
//m : le tableau qui est la fusion triée de tab et tab2
int assertMerge(int *tab, int n1, int *tab2, int n2, int* m, int size){
    int successfulOrder = assertOrder(m, size);
    int successfulElements = assertMergeAllValuesPresent(tab, n1, tab2, n2, m, size);
    //assertMergeAllValuesPresent(int *tab, int n1, int *tab2, int n2, int* m, int size)
    if(successfulOrder && successfulElements){
        printf("\nSuccessful merge !\n");
        return 1;
    }
    else{
        printf("\nUnsuccessful merge !\n");
        return 0;
    }
}

//Fonction qui vérifie qu'un tableau est bien trié
//m : le tableau non trié qu'on veut trier
//m_sorted : le tableau m soi-disant trié (on veut vérifier si c'est bien le cas)
//size : la taille du tableau
int assertSorted(int* m, int* m_sorted, int size)
{
    int successfulOrder = assertOrder(m_sorted, size); // les éléments du tableau sont ils bien dans le bon ordre ?
    int successfulElements = assertSortAllValuesPresent(m, m_sorted, size); //retrouve t-on bien toutes les valeurs ?
    if(successfulOrder && successfulElements){
        printf("\nSuccessful sort !\n");
        return 1;
    }
    else{
        printf("\nUnsuccessful sort !\n");
        return 0;
    }
}

int main(int argc, char *argv[])
{
    std::clock_t startS, endS;
    float seqMergeTime, parMergeTime, DoH, HoD;

    srand(time(NULL));
    int n_m = pow(2, 20);
    int pas = 8; // 1024<1024
    int k = 8;

    if(argc== 3)
    {
      k = atoi(argv[1]);
      n_m = atoi(argv[2]);
    }
    int nbPartitions = n_m/pas+(n_m%pas!=0);
    int *m, *mGPU;
    int *knn = (int*)malloc(k*sizeof(int));
    m = (int*)malloc(n_m*sizeof(int));
    init_array_no_order(m, n_m, n_m);
    gpuCheck(hipMalloc(&mGPU, n_m*sizeof(int)));

    startS = std::clock();
    gpuCheck(hipMemcpy(mGPU, m, n_m*sizeof(int), hipMemcpyHostToDevice));
    endS = std::clock();
    HoD = (endS - startS) / (float) CLOCKS_PER_SEC;

    printf("======== Parallel search of KNN =======\n");
    printf("* K : %d\n* Number of features : %d\n", k, n_m);

    //================ Parallel : =======================\\

    //Etape de prétraitement :
    startS = std::clock();
    pretraitementFusionSort<<<nbPartitions, pas>>>(mGPU, n_m);
    gpuCheck( hipPeekAtLastError() );
    gpuCheck( hipDeviceSynchronize() );

    //Sort array
    printf("========= Parallel merge : =============\n");
    printf("* K-Nearest Neighbors :");
    batchMerge_k(mGPU, n_m, k);
    gpuCheck( hipDeviceSynchronize() );
    endS = std::clock();
    parMergeTime = (endS - startS) / (float) CLOCKS_PER_SEC;

    startS = std::clock();
    knnSeq(knn, m, n_m, k);
    endS = std::clock();
    seqMergeTime = (endS - startS) / (float) CLOCKS_PER_SEC;

    // startS = std::clock();
    // // gpuCheck( cudaMemcpy(knn, mGPU, k*sizeof(int), cudaMemcpyDeviceToHost) );
    // endS = std::clock();
    // DoH = (endS - startS) / (float) CLOCKS_PER_SEC;


    printf("Total time elapsed : %f s\n", parMergeTime+DoH+HoD);
    printf("Time running algorithm : %f s\n", parMergeTime);
    printf("Time to copy Host to Device : %f s\n", HoD);
    // printf("Time to copy Device to Host : %f s\n", DoH);
    printf("Parrallel algorithm is %f times faster than sequential merge !\n", seqMergeTime/parMergeTime);
    printf("Parrallel knn finding is %f times faster than sequential merge !\n\n", seqMergeTime/(parMergeTime+HoD));

    printf("========= Sequential merge : =============\n");
    printf("* K-Nearest Neighbors :");
    // print_array(knn, k);
    printf("Total time elapsed : %f s\n", seqMergeTime);



    // print_array(knn, k);


    return 0;
}

	.text
	.file	"knnParallel.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z10init_arrayPiii              # -- Begin function _Z10init_arrayPiii
	.type	_Z10init_arrayPiii,@function
_Z10init_arrayPiii:                     # @_Z10init_arrayPiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %ebp
	movq	%rdi, %r14
	callq	rand
	cltd
	idivl	%ebx
	movl	%edx, (%r14)
	testl	%ebp, %ebp
	jle	.LBB0_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r15d
	xorl	%r12d, %r12d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	-4(%r14,%r12,4), %ebp
	callq	rand
	cltd
	idivl	%ebx
	addl	%ebp, %edx
	movl	%edx, (%r14,%r12,4)
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB0_2
.LBB0_3:                                # %._crit_edge
	movl	$10, %edi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end0:
	.size	_Z10init_arrayPiii, .Lfunc_end0-_Z10init_arrayPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z19init_array_no_orderPiii     # -- Begin function _Z19init_array_no_orderPiii
	.type	_Z19init_array_no_orderPiii,@function
_Z19init_array_no_orderPiii:            # @_Z19init_array_no_orderPiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %ebp
	movq	%rdi, %r14
	callq	rand
	cltd
	idivl	%ebx
	movl	%edx, (%r14)
	testl	%ebp, %ebp
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r15d
	xorl	%r12d, %r12d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltd
	idivl	%ebx
	movl	%edx, (%r14,%r12,4)
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	movl	$10, %edi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end1:
	.size	_Z19init_array_no_orderPiii, .Lfunc_end1-_Z19init_array_no_orderPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z10copy_arrayPiS_i             # -- Begin function _Z10copy_arrayPiS_i
	.type	_Z10copy_arrayPiS_i,@function
_Z10copy_arrayPiS_i:                    # @_Z10copy_arrayPiS_i
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB2_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %eax
	xorl	%ecx, %ecx
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rdi,%rcx,4), %edx
	movl	%edx, (%rsi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB2_2
.LBB2_3:                                # %._crit_edge
	retq
.Lfunc_end2:
	.size	_Z10copy_arrayPiS_i, .Lfunc_end2-_Z10copy_arrayPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z11print_arrayPii              # -- Begin function _Z11print_arrayPii
	.type	_Z11print_arrayPii,@function
_Z11print_arrayPii:                     # @_Z11print_arrayPii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movl	$91, %edi
	callq	putchar@PLT
	testl	%ebp, %ebp
	jle	.LBB3_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r14d
	xorl	%r15d, %r15d
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB3_2
.LBB3_3:                                # %._crit_edge
	movl	$.Lstr, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end3:
	.size	_Z11print_arrayPii, .Lfunc_end3-_Z11print_arrayPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_ # -- Begin function _Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.type	_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_,@function
_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_: # @_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_, .Lfunc_end4-_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__pretraitementFusionSortPii # -- Begin function _Z38__device_stub__pretraitementFusionSortPii
	.type	_Z38__device_stub__pretraitementFusionSortPii,@function
_Z38__device_stub__pretraitementFusionSortPii: # @_Z38__device_stub__pretraitementFusionSortPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23pretraitementFusionSortPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z38__device_stub__pretraitementFusionSortPii, .Lfunc_end5-_Z38__device_stub__pretraitementFusionSortPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii # -- Begin function _Z27__device_stub__arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
	.type	_Z27__device_stub__arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii,@function
_Z27__device_stub__arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii: # @_Z27__device_stub__arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z27__device_stub__arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii, .Lfunc_end6-_Z27__device_stub__arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__truncatePiS_iiii # -- Begin function _Z23__device_stub__truncatePiS_iiii
	.type	_Z23__device_stub__truncatePiS_iiii,@function
_Z23__device_stub__truncatePiS_iiii:    # @_Z23__device_stub__truncatePiS_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8truncatePiS_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z23__device_stub__truncatePiS_iiii, .Lfunc_end7-_Z23__device_stub__truncatePiS_iiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z12batchMerge_kPiii            # -- Begin function _Z12batchMerge_kPiii
	.type	_Z12batchMerge_kPiii,@function
_Z12batchMerge_kPiii:                   # @_Z12batchMerge_kPiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, 12(%rsp)                  # 4-byte Spill
	movl	%esi, %r13d
	movq	%rdi, 24(%rsp)
	leal	3(%r13), %r15d
	testl	%esi, %esi
	cmovnsl	%esi, %r15d
	movslq	%esi, %r14
	leaq	(,%r14,4), %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r12
	shrl	$31, %r14d
	addl	%r13d, %r14d
	sarl	%r14d
	movslq	%r14d, %r14
	shlq	$2, %r14
	leaq	64(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB8_1
# %bb.3:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	leaq	56(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB8_4
# %bb.5:                                # %_Z9gpuAssert10hipError_tPKcib.exit59
	sarl	$2, %r15d
	movslq	%r15d, %r14
	shlq	$3, %r14
	leaq	40(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB8_6
# %bb.7:                                # %_Z9gpuAssert10hipError_tPKcib.exit61
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB8_48
# %bb.8:                                # %_Z9gpuAssert10hipError_tPKcib.exit63.preheader
	cmpl	$4, %r13d
	movl	12(%rsp), %r14d                 # 4-byte Reload
	jl	.LBB8_45
# %bb.9:                                # %.lr.ph.preheader
	movq	%r12, 72(%rsp)                  # 8-byte Spill
	movl	$4, %r12d
.LBB8_10:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%r15d, %ebx
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rbx
	movl	%r12d, %r15d
	orq	%rax, %r15
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_12
# %bb.11:                               #   in Loop: Header=BB8_10 Depth=1
	movq	64(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	40(%rsp), %rcx
	movq	32(%rsp), %r8
	movl	%r13d, %r9d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z27__device_stub__arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB8_12:                               #   in Loop: Header=BB8_10 Depth=1
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB8_13
# %bb.14:                               # %_Z9gpuAssert10hipError_tPKcib.exit65
                                        #   in Loop: Header=BB8_10 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB8_15
# %bb.16:                               # %_Z9gpuAssert10hipError_tPKcib.exit67
                                        #   in Loop: Header=BB8_10 Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_18
# %bb.17:                               #   in Loop: Header=BB8_10 Depth=1
	movq	64(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	32(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	%r12d, %ecx
	movq	24(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB8_18:                               #   in Loop: Header=BB8_10 Depth=1
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB8_19
# %bb.20:                               # %_Z9gpuAssert10hipError_tPKcib.exit69
                                        #   in Loop: Header=BB8_10 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB8_21
# %bb.22:                               # %_Z9gpuAssert10hipError_tPKcib.exit71
                                        #   in Loop: Header=BB8_10 Depth=1
	cmpl	%r14d, %r12d
	jle	.LBB8_43
# %bb.23:                               #   in Loop: Header=BB8_10 Depth=1
	movq	%r13, 80(%rsp)                  # 8-byte Spill
	movq	16(%rsp), %rax                  # 8-byte Reload
	movl	%eax, %r13d
	imull	%r14d, %r13d
	movslq	%r13d, %rbp
	shlq	$2, %rbp
	leaq	48(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB8_49
# %bb.24:                               # %_Z9gpuAssert10hipError_tPKcib.exit73
                                        #   in Loop: Header=BB8_10 Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movl	12(%rsp), %ecx                  # 4-byte Reload
	jne	.LBB8_26
# %bb.25:                               #   in Loop: Header=BB8_10 Depth=1
	movq	48(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	80(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movq	16(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movl	%r12d, %r9d
	callq	_Z23__device_stub__truncatePiS_iiii
.LBB8_26:                               #   in Loop: Header=BB8_10 Depth=1
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB8_27
# %bb.29:                               # %_Z9gpuAssert10hipError_tPKcib.exit75
                                        #   in Loop: Header=BB8_10 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB8_30
# %bb.31:                               # %_Z9gpuAssert10hipError_tPKcib.exit77
                                        #   in Loop: Header=BB8_10 Depth=1
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB8_32
# %bb.33:                               # %_Z9gpuAssert10hipError_tPKcib.exit79
                                        #   in Loop: Header=BB8_10 Depth=1
	movq	48(%rsp), %rax
	movq	%rax, 24(%rsp)
	movl	%r13d, %eax
	shrl	$31, %eax
	addl	%r13d, %eax
	sarl	%eax
	movslq	%eax, %r14
	shlq	$2, %r14
	leaq	48(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB8_34
# %bb.35:                               # %_Z9gpuAssert10hipError_tPKcib.exit81
                                        #   in Loop: Header=BB8_10 Depth=1
	leaq	64(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB8_36
# %bb.37:                               # %_Z9gpuAssert10hipError_tPKcib.exit83
                                        #   in Loop: Header=BB8_10 Depth=1
	leaq	56(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB8_38
# %bb.39:                               # %_Z9gpuAssert10hipError_tPKcib.exit85
                                        #   in Loop: Header=BB8_10 Depth=1
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,8), %r14
	leaq	40(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB8_40
# %bb.41:                               # %_Z9gpuAssert10hipError_tPKcib.exit87
                                        #   in Loop: Header=BB8_10 Depth=1
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	12(%rsp), %r14d                 # 4-byte Reload
	movl	%r14d, %r12d
                                        # kill: def $r13d killed $r13d def $r13
	testl	%eax, %eax
	jne	.LBB8_42
.LBB8_43:                               # %_Z9gpuAssert10hipError_tPKcib.exit89
                                        #   in Loop: Header=BB8_10 Depth=1
	movq	16(%rsp), %rax                  # 8-byte Reload
	movl	%eax, %r15d
	shrl	%r15d
	addl	%r12d, %r12d
	cmpl	$1, %eax
	ja	.LBB8_10
# %bb.44:                               # %_Z9gpuAssert10hipError_tPKcib.exit63._crit_edge.loopexit
	movslq	%r13d, %rbx
	shlq	$2, %rbx
	movq	72(%rsp), %r12                  # 8-byte Reload
.LBB8_45:                               # %_Z9gpuAssert10hipError_tPKcib.exit63._crit_edge
	movq	24(%rsp), %rsi
	movq	%r12, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB8_46
# %bb.47:                               # %_Z9gpuAssert10hipError_tPKcib.exit91
	movq	%r12, %rdi
	movl	%r13d, %esi
	callq	_Z11print_arrayPii
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB8_21:
	.cfi_def_cfa_offset 144
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$220, %r8d
	jmp	.LBB8_2
.LBB8_19:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$219, %r8d
	jmp	.LBB8_2
.LBB8_15:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$216, %r8d
	jmp	.LBB8_2
.LBB8_13:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$215, %r8d
.LBB8_2:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB8_42:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$236, %r8d
	jmp	.LBB8_28
.LBB8_38:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$234, %r8d
	jmp	.LBB8_28
.LBB8_34:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$232, %r8d
	jmp	.LBB8_28
.LBB8_30:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$227, %r8d
	jmp	.LBB8_28
.LBB8_49:
	movl	%eax, %r14d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$224, %r8d
	xorl	%eax, %eax
	callq	fprintf
	movl	%r14d, %edi
	callq	exit
.LBB8_40:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$235, %r8d
	jmp	.LBB8_28
.LBB8_36:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$233, %r8d
	jmp	.LBB8_28
.LBB8_32:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$228, %r8d
	jmp	.LBB8_28
.LBB8_27:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$226, %r8d
.LBB8_28:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.LBB8_1:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$206, %r8d
	jmp	.LBB8_2
.LBB8_4:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$207, %r8d
	jmp	.LBB8_2
.LBB8_6:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$208, %r8d
	jmp	.LBB8_2
.LBB8_48:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$209, %r8d
	jmp	.LBB8_2
.LBB8_46:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$243, %r8d
	jmp	.LBB8_28
.Lfunc_end8:
	.size	_Z12batchMerge_kPiii, .Lfunc_end8-_Z12batchMerge_kPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i # -- Begin function _Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i
	.type	_Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i,@function
_Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i: # @_Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i
	.cfi_startproc
# %bb.0:
	movq	$0, (%rdi)
	cmpl	$2, %edx
	jl	.LBB9_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %eax
	decq	%rax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	xorl	%r8d, %r8d
.LBB9_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	addl	(%rsi,%rcx,8), %r8d
	movl	%r8d, 8(%rdi,%rcx,8)
	addl	4(%rsi,%rcx,8), %edx
	movl	%edx, 12(%rdi,%rcx,8)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB9_2
.LBB9_3:                                # %._crit_edge
	retq
.Lfunc_end9:
	.size	_Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i, .Lfunc_end9-_Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z4swapPiS_                     # -- Begin function _Z4swapPiS_
	.type	_Z4swapPiS_,@function
_Z4swapPiS_:                            # @_Z4swapPiS_
	.cfi_startproc
# %bb.0:
	movl	(%rdi), %eax
	movl	(%rsi), %ecx
	movl	%ecx, (%rdi)
	movl	%eax, (%rsi)
	retq
.Lfunc_end10:
	.size	_Z4swapPiS_, .Lfunc_end10-_Z4swapPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z10printArrayPii               # -- Begin function _Z10printArrayPii
	.type	_Z10printArrayPii,@function
_Z10printArrayPii:                      # @_Z10printArrayPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	testl	%esi, %esi
	jle	.LBB11_3
# %bb.1:                                # %.lr.ph.preheader
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB11_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r15,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str.5, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB11_2
.LBB11_3:                               # %._crit_edge
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end11:
	.size	_Z10printArrayPii, .Lfunc_end11-_Z10printArrayPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9partitionPiii                # -- Begin function _Z9partitionPiii
	.type	_Z9partitionPiii,@function
_Z9partitionPiii:                       # @_Z9partitionPiii
	.cfi_startproc
# %bb.0:
	movslq	%edx, %rcx
	movl	(%rdi,%rcx,4), %edx
	cmpl	%ecx, %esi
	jge	.LBB12_6
# %bb.1:                                # %.lr.ph.preheader
	movslq	%esi, %rax
	decl	%esi
.LBB12_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rdi,%rax,4), %r8d
	cmpl	%edx, %r8d
	jg	.LBB12_4
# %bb.3:                                #   in Loop: Header=BB12_2 Depth=1
	movslq	%esi, %r9
	incl	%esi
	movl	4(%rdi,%r9,4), %r10d
	movl	%r8d, 4(%rdi,%r9,4)
	movl	%r10d, (%rdi,%rax,4)
.LBB12_4:                               #   in Loop: Header=BB12_2 Depth=1
	incq	%rax
	cmpq	%rax, %rcx
	jne	.LBB12_2
# %bb.5:                                # %._crit_edge.loopexit
	movl	(%rdi,%rcx,4), %edx
	incl	%esi
.LBB12_6:                               # %._crit_edge
	movslq	%esi, %rax
	movl	(%rdi,%rax,4), %esi
	movl	%edx, (%rdi,%rax,4)
	movl	%esi, (%rdi,%rcx,4)
                                        # kill: def $eax killed $eax killed $rax
	retq
.Lfunc_end12:
	.size	_Z9partitionPiii, .Lfunc_end12-_Z9partitionPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9quickSortPiii                # -- Begin function _Z9quickSortPiii
	.type	_Z9quickSortPiii,@function
_Z9quickSortPiii:                       # @_Z9quickSortPiii
	.cfi_startproc
# %bb.0:
	cmpl	%edx, %esi
	jge	.LBB13_4
# %bb.1:                                # %tailrecurse.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %ebp
	movq	%rdi, %r14
.LBB13_2:                               # %tailrecurse
                                        # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebp, %esi
	movl	%ebx, %edx
	callq	_Z9partitionPiii
	movl	%eax, %r15d
	leal	-1(%r15), %edx
	movq	%r14, %rdi
	movl	%ebp, %esi
	callq	_Z9quickSortPiii
	incl	%r15d
	movl	%r15d, %ebp
	cmpl	%ebx, %r15d
	jl	.LBB13_2
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB13_4:                               # %tailrecurse._crit_edge
	retq
.Lfunc_end13:
	.size	_Z9quickSortPiii, .Lfunc_end13-_Z9quickSortPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z6knnSeqPiS_ii                 # -- Begin function _Z6knnSeqPiS_ii
	.type	_Z6knnSeqPiS_ii,@function
_Z6knnSeqPiS_ii:                        # @_Z6knnSeqPiS_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r15d
	movl	%edx, %ebx
	movq	%rsi, %r12
	movq	%rdi, %r14
	testl	%ecx, %ecx
	jle	.LBB14_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%r15d, %eax
	xorl	%ecx, %ecx
.LBB14_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r12,%rcx,4), %edx
	movl	%edx, (%r14,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB14_2
.LBB14_3:                               # %._crit_edge
	leal	-1(%r15), %ebp
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	%ebp, %edx
	callq	_Z9quickSortPiii
	subl	%r15d, %ebx
	jle	.LBB14_8
# %bb.4:                                # %.lr.ph28
	movslq	%ebp, %r13
	movslq	%r15d, %rax
	leaq	(%r12,%rax,4), %r15
	xorl	%r12d, %r12d
.LBB14_5:                               # =>This Inner Loop Header: Depth=1
	movl	(%r15,%r12,4), %eax
	cmpl	%eax, (%r14,%r13,4)
	jle	.LBB14_7
# %bb.6:                                #   in Loop: Header=BB14_5 Depth=1
	movl	%eax, (%r14,%r13,4)
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	%ebp, %edx
	callq	_Z9quickSortPiii
.LBB14_7:                               #   in Loop: Header=BB14_5 Depth=1
	incq	%r12
	cmpl	%r12d, %ebx
	jne	.LBB14_5
.LBB14_8:                               # %._crit_edge29
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_Z6knnSeqPiS_ii, .Lfunc_end14-_Z6knnSeqPiS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z19assertPretraitementPii      # -- Begin function _Z19assertPretraitementPii
	.type	_Z19assertPretraitementPii,@function
_Z19assertPretraitementPii:             # @_Z19assertPretraitementPii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
                                        # kill: def $esi killed $esi def $rsi
	movl	%esi, %eax
	andl	$-2147483647, %eax              # imm = 0x80000001
	xorl	%ecx, %ecx
	cmpl	$1, %eax
	sete	%cl
	subl	%ecx, %esi
	cmpl	$2, %esi
	jl	.LBB15_4
# %bb.1:                                # %.lr.ph.preheader
	movq	%rdi, %rbx
	shrl	%esi
	xorl	%r14d, %r14d
.LBB15_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r14,8), %eax
	cmpl	4(%rbx,%r14,8), %eax
	jg	.LBB15_6
# %bb.3:                                #   in Loop: Header=BB15_2 Depth=1
	incq	%r14
	cmpq	%r14, %rsi
	jne	.LBB15_2
.LBB15_4:                               # %._crit_edge
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$1, %ebp
	jmp	.LBB15_5
.LBB15_6:
	xorl	%ebp, %ebp
	movl	$.L.str.6, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%r14d, %eax
	movl	(%rbx,%rax,4), %esi
	movl	4(%rbx,%rax,4), %edx
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
.LBB15_5:
	movl	%ebp, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end15:
	.size	_Z19assertPretraitementPii, .Lfunc_end15-_Z19assertPretraitementPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11assertOrderPii              # -- Begin function _Z11assertOrderPii
	.type	_Z11assertOrderPii,@function
_Z11assertOrderPii:                     # @_Z11assertOrderPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%esi, %ebx
	movq	%rdi, %r14
	decl	%ebx
	xorl	%r12d, %r12d
	testl	%ebx, %ebx
	movl	$0, %eax
	cmovgl	%ebx, %eax
.LBB16_1:                               # =>This Inner Loop Header: Depth=1
	movq	%r12, %r15
	cmpq	%r12, %rax
	je	.LBB16_4
# %bb.2:                                #   in Loop: Header=BB16_1 Depth=1
	movl	(%r14,%r15,4), %ecx
	leaq	1(%r15), %r12
	cmpl	4(%r14,%r15,4), %ecx
	jle	.LBB16_1
# %bb.3:
	leal	-1(%r12), %esi
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	movl	-4(%r14,%r12,4), %esi
	movl	(%r14,%r12,4), %edx
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
.LBB16_4:                               # %.loopexit
	movslq	%ebx, %rcx
	xorl	%eax, %eax
	cmpq	%rcx, %r15
	setge	%al
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end16:
	.size	_Z11assertOrderPii, .Lfunc_end16-_Z11assertOrderPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27assertMergeAllValuesPresentPiiS_iS_i # -- Begin function _Z27assertMergeAllValuesPresentPiiS_iS_i
	.type	_Z27assertMergeAllValuesPresentPiiS_iS_i,@function
_Z27assertMergeAllValuesPresentPiiS_iS_i: # @_Z27assertMergeAllValuesPresentPiiS_iS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, %r14d
	movq	%rsp, %rbx
	leaq	15(,%r14,4), %rax
	andq	$-16, %rax
	subq	%rax, %rbx
	movq	%rbx, %rsp
	movb	$1, %r13b
	testl	%r9d, %r9d
	jle	.LBB17_24
# %bb.1:                                # %.preheader47.lr.ph
	movq	%rdx, %r12
	movl	%esi, %r10d
	movq	%rdi, %r15
	movl	%ecx, -44(%rbp)                 # 4-byte Spill
	leaq	(,%r14,4), %rdx
	xorl	%r13d, %r13d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movq	%r8, -64(%rbp)                  # 8-byte Spill
	movl	%r9d, -52(%rbp)                 # 4-byte Spill
	movl	%r10d, -48(%rbp)                # 4-byte Spill
	callq	memset@PLT
	movl	-48(%rbp), %r9d                 # 4-byte Reload
	movl	-52(%rbp), %edi                 # 4-byte Reload
	movq	-64(%rbp), %r8                  # 8-byte Reload
	movl	%r9d, %eax
.LBB17_2:                               # %.preheader47
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB17_4 Depth 2
	testl	%r9d, %r9d
	jle	.LBB17_7
# %bb.3:                                # %.lr.ph53
                                        #   in Loop: Header=BB17_2 Depth=1
	movl	(%r8,%r13,4), %ecx
	xorl	%edx, %edx
.LBB17_4:                               #   Parent Loop BB17_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpl	%ecx, (%r15,%rdx,4)
	jne	.LBB17_6
# %bb.5:                                #   in Loop: Header=BB17_4 Depth=2
	movl	(%rbx,%r13,4), %esi
	cmpl	$1, %esi
	adcl	$0, %esi
	movl	%esi, (%rbx,%r13,4)
.LBB17_6:                               #   in Loop: Header=BB17_4 Depth=2
	incq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB17_4
.LBB17_7:                               # %._crit_edge
                                        #   in Loop: Header=BB17_2 Depth=1
	incq	%r13
	cmpq	%r14, %r13
	jne	.LBB17_2
# %bb.8:                                # %.preheader46
	testl	%edi, %edi
	movb	$1, %r13b
	jle	.LBB17_24
# %bb.9:                                # %.preheader45.lr.ph
	movl	-44(%rbp), %r9d                 # 4-byte Reload
	movl	%r9d, %eax
	xorl	%ecx, %ecx
.LBB17_10:                              # %.preheader45
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB17_12 Depth 2
	testl	%r9d, %r9d
	jle	.LBB17_15
# %bb.11:                               # %.lr.ph56
                                        #   in Loop: Header=BB17_10 Depth=1
	movl	(%r8,%rcx,4), %edx
	xorl	%esi, %esi
.LBB17_12:                              #   Parent Loop BB17_10 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpl	%edx, (%r12,%rsi,4)
	jne	.LBB17_14
# %bb.13:                               #   in Loop: Header=BB17_12 Depth=2
	movl	(%rbx,%rcx,4), %edi
	cmpl	$1, %edi
	adcl	$0, %edi
	movl	%edi, (%rbx,%rcx,4)
.LBB17_14:                              #   in Loop: Header=BB17_12 Depth=2
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB17_12
.LBB17_15:                              # %._crit_edge57
                                        #   in Loop: Header=BB17_10 Depth=1
	incq	%rcx
	cmpq	%r14, %rcx
	jne	.LBB17_10
# %bb.16:                               # %.lr.ph62.preheader
	cmpl	$1, (%rbx)
	jne	.LBB17_17
# %bb.18:                               # %.lr.ph.preheader
	movl	$1, %eax
.LBB17_19:                              # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	cmpq	%rax, %r14
	je	.LBB17_23
# %bb.20:                               # %.lr.ph62
                                        #   in Loop: Header=BB17_19 Depth=1
	leaq	1(%rax), %rcx
	cmpl	$1, (%rbx,%rax,4)
	movq	%rcx, %rax
	je	.LBB17_19
# %bb.21:                               # %.lr.ph62._crit_edge.loopexit
	decq	%rcx
	cmpq	%r14, %rcx
	setae	%r13b
	jmp	.LBB17_22
.LBB17_17:
	xorl	%r13d, %r13d
.LBB17_22:                              # %.lr.ph62._crit_edge
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	jmp	.LBB17_24
.LBB17_23:                              # %.loopexit.loopexit
	cmpq	%r14, %rax
	setae	%r13b
.LBB17_24:                              # %.loopexit
	movzbl	%r13b, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end17:
	.size	_Z27assertMergeAllValuesPresentPiiS_iS_i, .Lfunc_end17-_Z27assertMergeAllValuesPresentPiiS_iS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z26assertSortAllValuesPresentPiS_i # -- Begin function _Z26assertSortAllValuesPresentPiS_i
	.type	_Z26assertSortAllValuesPresentPiS_i,@function
_Z26assertSortAllValuesPresentPiS_i:    # @_Z26assertSortAllValuesPresentPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r12d
	movq	%rsp, %rbx
	leaq	15(,%r12,4), %rax
	andq	$-16, %rax
	subq	%rax, %rbx
	movq	%rbx, %rsp
	testl	%edx, %edx
	jle	.LBB18_1
# %bb.2:                                # %.preheader30.lr.ph
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	(,%r12,4), %rdx
	xorl	%r13d, %r13d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB18_3:                               # %.lr.ph37
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB18_4 Depth 2
	movl	(%r15,%r13,4), %eax
	xorl	%ecx, %ecx
.LBB18_4:                               #   Parent Loop BB18_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpl	%eax, (%r14,%rcx,4)
	jne	.LBB18_6
# %bb.5:                                #   in Loop: Header=BB18_4 Depth=2
	movl	$1, (%rbx,%r13,4)
.LBB18_6:                               #   in Loop: Header=BB18_4 Depth=2
	incq	%rcx
	cmpq	%rcx, %r12
	jne	.LBB18_4
# %bb.7:                                # %._crit_edge
                                        #   in Loop: Header=BB18_3 Depth=1
	incq	%r13
	cmpq	%r12, %r13
	jne	.LBB18_3
# %bb.8:                                # %.lr.ph42.preheader
	xorl	%esi, %esi
	cmpl	$1, (%rbx)
	movl	$0, %r14d
	jne	.LBB18_13
# %bb.9:                                # %.lr.ph.preheader
	leaq	-1(%r12), %rcx
	xorl	%eax, %eax
.LBB18_10:                              # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	cmpq	%rax, %rcx
	je	.LBB18_14
# %bb.11:                               # %.lr.ph42
                                        #   in Loop: Header=BB18_10 Depth=1
	leaq	1(%rax), %rsi
	cmpl	$1, 4(%rbx,%rax,4)
	movq	%rsi, %rax
	je	.LBB18_10
# %bb.12:                               # %.lr.ph42._crit_edge
	cmpq	%r12, %rsi
	setae	%r14b
.LBB18_13:
	movl	$.L.str.11, %edi
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	jmp	.LBB18_15
.LBB18_1:
	movb	$1, %r14b
	jmp	.LBB18_15
.LBB18_14:                              # %.loopexit.loopexit
	incq	%rax
	cmpq	%r12, %rax
	setae	%r14b
.LBB18_15:                              # %.loopexit
	movzbl	%r14b, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end18:
	.size	_Z26assertSortAllValuesPresentPiS_i, .Lfunc_end18-_Z26assertSortAllValuesPresentPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z11assertMergePiiS_iS_i        # -- Begin function _Z11assertMergePiiS_iS_i
	.type	_Z11assertMergePiiS_iS_i,@function
_Z11assertMergePiiS_iS_i:               # @_Z11assertMergePiiS_iS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movl	%ecx, 4(%rsp)                   # 4-byte Spill
	movq	%rdx, %r15
	movl	%esi, %r12d
	movq	%rdi, %r13
	movq	%r8, %rdi
	movl	%r9d, %esi
	callq	_Z11assertOrderPii
	movl	%eax, %ebp
	movq	%r13, %rdi
	movl	%r12d, %esi
	movq	%r15, %rdx
	movl	4(%rsp), %ecx                   # 4-byte Reload
	movq	%r14, %r8
	movl	%ebx, %r9d
	callq	_Z27assertMergeAllValuesPresentPiiS_iS_i
	testl	%ebp, %ebp
	setne	%cl
	testl	%eax, %eax
	setne	%al
	andb	%cl, %al
	movl	$.Lstr.5, %ecx
	movl	$.Lstr.4, %edi
	cmovneq	%rcx, %rdi
	movzbl	%al, %ebx
	callq	puts@PLT
	movl	%ebx, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end19:
	.size	_Z11assertMergePiiS_iS_i, .Lfunc_end19-_Z11assertMergePiiS_iS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z12assertSortedPiS_i           # -- Begin function _Z12assertSortedPiS_i
	.type	_Z12assertSortedPiS_i,@function
_Z12assertSortedPiS_i:                  # @_Z12assertSortedPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movq	%rsi, %r14
	movq	%rdi, %r15
	movq	%rsi, %rdi
	movl	%edx, %esi
	callq	_Z11assertOrderPii
	movl	%eax, %ebp
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z26assertSortAllValuesPresentPiS_i
	testl	%ebp, %ebp
	setne	%cl
	testl	%eax, %eax
	setne	%al
	andb	%cl, %al
	movl	$.Lstr.7, %ecx
	movl	$.Lstr.6, %edi
	cmovneq	%rcx, %rdi
	movzbl	%al, %ebx
	callq	puts@PLT
	movl	%ebx, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end20:
	.size	_Z12assertSortedPiS_i, .Lfunc_end20-_Z12assertSortedPiS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI21_0:
	.long	0x49742400                      # float 1.0E+6
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI21_1:
	.quad	0x7ff8000000000000              # double NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movl	%edi, %ebx
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	cmpl	$3, %ebx
	jne	.LBB21_1
# %bb.2:
	movq	8(%r14), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %r14d
	jmp	.LBB21_3
.LBB21_1:
	movl	$1048576, %r14d                 # imm = 0x100000
	movl	$8, %ebp
.LBB21_3:
	leal	7(%r14), %ebx
	testl	%r14d, %r14d
	cmovnsl	%r14d, %ebx
	sarl	$3, %ebx
	movl	%r14d, %eax
	andl	$7, %eax
	cmpl	$1, %eax
	sbbl	$-1, %ebx
	movl	%ebp, 4(%rsp)                   # 4-byte Spill
	movslq	%ebp, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movslq	%r14d, %r13
	leaq	(,%r13,4), %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%rax, %rdi
	movl	%r13d, %esi
	movl	%r13d, %edx
	callq	_Z19init_array_no_orderPiii
	leaq	24(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB21_4
# %bb.6:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	callq	clock
	movq	%rax, %r13
	movq	24(%rsp), %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB21_7
# %bb.8:                                # %_Z9gpuAssert10hipError_tPKcib.exit48
	movq	%r13, 8(%rsp)                   # 8-byte Spill
	callq	clock
	movq	%rax, %rbp
	movl	$.Lstr.8, %edi
	callq	puts@PLT
	movl	$.L.str.18, %edi
	movl	4(%rsp), %esi                   # 4-byte Reload
	movl	%r14d, %edx
	xorl	%eax, %eax
	callq	printf
	callq	clock
	movq	%rax, %r15
	movl	%ebx, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$8, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB21_10
# %bb.9:
	movq	24(%rsp), %rdi
	movl	%r14d, %esi
	callq	_Z38__device_stub__pretraitementFusionSortPii
.LBB21_10:
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB21_11
# %bb.13:                               # %_Z9gpuAssert10hipError_tPKcib.exit50
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB21_14
# %bb.15:                               # %_Z9gpuAssert10hipError_tPKcib.exit52
	movl	$.Lstr.9, %edi
	callq	puts@PLT
	movl	$.L.str.20, %edi
	xorl	%eax, %eax
	callq	printf
	movq	24(%rsp), %rdi
	movl	%r14d, %esi
	movl	4(%rsp), %ebx                   # 4-byte Reload
	movl	%ebx, %edx
	callq	_Z12batchMerge_kPiii
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB21_16
# %bb.17:                               # %_Z9gpuAssert10hipError_tPKcib.exit54
	subq	8(%rsp), %rbp                   # 8-byte Folded Reload
	cvtsi2ss	%rbp, %xmm0
	divss	.LCPI21_0(%rip), %xmm0
	movss	%xmm0, 20(%rsp)                 # 4-byte Spill
	callq	clock
	subq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI21_0(%rip), %xmm0
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	callq	clock
	movq	%rax, %r15
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rsi
	movl	%r14d, %edx
	movl	%ebx, %ecx
	callq	_Z6knnSeqPiS_ii
	callq	clock
	subq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI21_0(%rip), %xmm0
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movsd	.LCPI21_1(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$.L.str.21, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	8(%rsp), %xmm0                  # 4-byte Folded Reload
	movl	$.L.str.22, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	20(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$.L.str.23, %edi
	movb	$1, %al
	callq	printf
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	8(%rsp), %xmm0                  # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.24, %edi
	movb	$1, %al
	callq	printf
	movss	8(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	addss	20(%rsp), %xmm1                 # 4-byte Folded Reload
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.25, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.10, %edi
	callq	puts@PLT
	movl	$.L.str.20, %edi
	xorl	%eax, %eax
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rsp), %xmm0                  # 4-byte Folded Reload
	movl	$.L.str.21, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB21_4:
	.cfi_def_cfa_offset 96
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$475, %r8d                      # imm = 0x1DB
	jmp	.LBB21_5
.LBB21_7:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$478, %r8d                      # imm = 0x1DE
.LBB21_5:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB21_11:
	movl	%eax, %r13d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$490, %r8d                      # imm = 0x1EA
	jmp	.LBB21_12
.LBB21_14:
	movl	%eax, %r13d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$491, %r8d                      # imm = 0x1EB
	jmp	.LBB21_12
.LBB21_16:
	movl	%eax, %r13d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.27, %esi
	movl	$.L.str.4, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$497, %r8d                      # imm = 0x1F1
.LBB21_12:
	xorl	%eax, %eax
	callq	fprintf
	movl	%r13d, %edi
	callq	exit
.Lfunc_end21:
	.size	main, .Lfunc_end21-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB22_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB22_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23pretraitementFusionSortPii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8truncatePiS_iiii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end22:
	.size	__hip_module_ctor, .Lfunc_end22-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB23_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB23_2:
	retq
.Lfunc_end23:
	.size	__hip_module_dtor, .Lfunc_end23-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"%d "
	.size	.L.str.2, 4

	.type	_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_,@object # @_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.section	.rodata,"a",@progbits
	.globl	_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.p2align	3, 0x0
_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_:
	.quad	_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.size	_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_, 8

	.type	_Z23pretraitementFusionSortPii,@object # @_Z23pretraitementFusionSortPii
	.globl	_Z23pretraitementFusionSortPii
	.p2align	3, 0x0
_Z23pretraitementFusionSortPii:
	.quad	_Z38__device_stub__pretraitementFusionSortPii
	.size	_Z23pretraitementFusionSortPii, 8

	.type	_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii,@object # @_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
	.globl	_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
	.p2align	3, 0x0
_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii:
	.quad	_Z27__device_stub__arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
	.size	_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii, 8

	.type	_Z8truncatePiS_iiii,@object     # @_Z8truncatePiS_iiii
	.globl	_Z8truncatePiS_iiii
	.p2align	3, 0x0
_Z8truncatePiS_iiii:
	.quad	_Z23__device_stub__truncatePiS_iiii
	.size	_Z8truncatePiS_iiii, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/homerdurand/HPCA/main/knnParallel.hip"
	.size	.L.str.4, 100

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	" "
	.size	.L.str.5, 2

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"WARNING : Unsuccessful pretreatment ... : unordered paired array on indice %d ...\n"
	.size	.L.str.6, 83

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"tab[i]= %d > tab[i+1] = %d\n"
	.size	.L.str.7, 28

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"WARNING : Unsuccessful merge or sort ... : unordered array on indice %d ...\n"
	.size	.L.str.9, 77

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"i : %d\n"
	.size	.L.str.11, 8

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"* K : %d\n* Number of features : %d\n"
	.size	.L.str.18, 36

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"* K-Nearest Neighbors :"
	.size	.L.str.20, 24

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"Total time elapsed : %f s\n"
	.size	.L.str.21, 27

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"Time running algorithm : %f s\n"
	.size	.L.str.22, 31

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"Time to copy Host to Device : %f s\n"
	.size	.L.str.23, 36

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"Parrallel algorithm is %f times faster than sequential merge !\n"
	.size	.L.str.24, 64

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"Parrallel knn finding is %f times faster than sequential merge !\n\n"
	.size	.L.str.25, 67

	.type	.L.str.27,@object               # @.str.27
.L.str.27:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.27, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_"
	.size	.L__unnamed_1, 58

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z23pretraitementFusionSortPii"
	.size	.L__unnamed_2, 31

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii"
	.size	.L__unnamed_3, 54

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z8truncatePiS_iiii"
	.size	.L__unnamed_4, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"]"
	.size	.Lstr, 2

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\nSuccessful pretreatment !"
	.size	.Lstr.1, 27

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\nWARNING : Unsuccessful merge : incorrect elements..."
	.size	.Lstr.2, 54

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"\nWARNING : Unsuccessful sort : incorrect elements..."
	.size	.Lstr.3, 53

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"\nUnsuccessful merge !"
	.size	.Lstr.4, 22

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"\nSuccessful merge !"
	.size	.Lstr.5, 20

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"\nUnsuccessful sort !"
	.size	.Lstr.6, 21

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"\nSuccessful sort !"
	.size	.Lstr.7, 19

	.type	.Lstr.8,@object                 # @str.8
.Lstr.8:
	.asciz	"======== Parallel search of KNN ======="
	.size	.Lstr.8, 40

	.type	.Lstr.9,@object                 # @str.9
.Lstr.9:
	.asciz	"========= Parallel merge : ============="
	.size	.Lstr.9, 41

	.type	.Lstr.10,@object                # @str.10
.Lstr.10:
	.asciz	"========= Sequential merge : ============="
	.size	.Lstr.10, 43

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.addrsig_sym _Z38__device_stub__pretraitementFusionSortPii
	.addrsig_sym _Z27__device_stub__arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
	.addrsig_sym _Z23__device_stub__truncatePiS_iiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.addrsig_sym _Z23pretraitementFusionSortPii
	.addrsig_sym _Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
	.addrsig_sym _Z8truncatePiS_iiii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_ ; -- Begin function _Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.globl	_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.p2align	8
	.type	_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_,@function
_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_: ; @_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x18
	s_load_b32 s4, s[0:1], 0x3c
	s_mov_b32 s8, 0
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_u32_e32 v1, s2
	s_sub_i32 s6, 0, s2
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v1
	s_mul_i32 s6, s6, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s6, s5, s6
	s_add_i32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_hi_u32 v1, v0, s5
	s_mul_hi_u32 s5, s4, s5
	s_mul_i32 s6, s5, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_sub_i32 s4, s4, s6
	s_add_i32 s6, s5, 1
	s_sub_i32 s7, s4, s2
	v_mul_lo_u32 v2, v1, s2
	v_add_nc_u32_e32 v3, 1, v1
	s_cmp_ge_u32 s4, s2
	s_cselect_b32 s5, s6, s5
	s_cselect_b32 s4, s7, s4
	s_add_i32 s6, s5, 1
	s_cmp_ge_u32 s4, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v0, v2
	s_cselect_b32 s4, s6, s5
	v_subrev_nc_u32_e32 v4, s2, v2
	v_cmp_le_u32_e32 vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v2, v2, v4 :: v_dual_cndmask_b32 v1, v1, v3
	v_cmp_le_u32_e32 vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 1, v1
	v_cndmask_b32_e32 v1, v1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, v1, s2
	v_mad_u64_u32 v[3:4], null, s4, s15, v[1:2]
	v_sub_nc_u32_e32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v3, s2, v[2:3]
	s_mul_i32 s2, s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_30
; %bb.1:
	s_load_b128 s[12:15], s[0:1], 0x20
	v_ashrrev_i32_e32 v4, 31, v3
                                        ; implicit-def: $sgpr9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s14, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s15, v10, vcc_lo
	global_load_b32 v5, v[3:4], off
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_add_u32 s10, s6, -4
	s_addc_u32 s11, s7, -1
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v1, v2, v5
	v_cmp_gt_i32_e32 vcc_lo, v2, v5
	v_min_i32_e32 v6, v2, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v8, 0, v1, vcc_lo
	v_add_co_u32 v1, vcc_lo, s12, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, s13, v10, vcc_lo
	v_mov_b32_e32 v10, v8
	s_add_u32 s12, s4, -4
	s_addc_u32 s13, s5, -1
.LBB0_2:                                ; %.outer
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_mov_b32 s15, 0
                                        ; implicit-def: $sgpr16
                                        ; implicit-def: $sgpr14
                                        ; implicit-def: $sgpr17
                                        ; implicit-def: $sgpr19
                                        ; implicit-def: $sgpr18
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_sub_nc_u32_e32 v7, v6, v8
	s_or_b32 s18, s18, exec_lo
	s_and_not1_b32 s19, s19, exec_lo
	s_or_b32 s17, s17, exec_lo
	s_mov_b32 s20, exec_lo
	v_sub_nc_u32_e32 v9, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v7, v7, v9
	v_lshrrev_b32_e32 v11, 1, v7
                                        ; implicit-def: $vgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v9, v6, v11
	v_cmpx_lt_i32_e32 -1, v9
	s_cbranch_execz .LBB0_15
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=2
	global_load_b32 v12, v[3:4], off offset:4
	v_add_nc_u32_e32 v7, v11, v10
	s_mov_b32 s0, -1
	s_mov_b32 s23, -1
	s_mov_b32 s21, exec_lo
                                        ; implicit-def: $sgpr22
	s_waitcnt vmcnt(0)
	v_cmpx_le_i32_e64 v7, v12
	s_cbranch_execz .LBB0_14
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, v9, v5
	v_cmp_eq_u32_e64 s0, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_xor_b32 s22, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s22
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_3 Depth=2
	global_load_b64 v[13:14], v[1:2], off
	s_and_not1_b32 s0, s0, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v13, v13, v9
	v_add_nc_u32_e32 v15, v14, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v14, 31, v13
	v_ashrrev_i32_e32 v16, 31, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	v_lshlrev_b64 v[15:16], 2, v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v13, vcc_lo, s4, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v15, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s11, v16, vcc_lo
	global_load_b32 v13, v[13:14], off
	global_load_b32 v14, v[15:16], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v13, v14
	s_and_b32 s22, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s0, s0, s22
.LBB0_7:                                ; %Flow171
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s1, -1
                                        ; implicit-def: $sgpr24
	s_and_saveexec_b32 s22, s0
	s_cbranch_execz .LBB0_13
; %bb.8:                                ;   in Loop: Header=BB0_3 Depth=2
	v_cmp_ne_u32_e64 s0, v7, v12
	v_cmp_ne_u32_e64 s1, v6, v11
	v_cmp_eq_u32_e32 vcc_lo, v7, v12
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s23, s1, s0
	s_mov_b32 s0, -1
	s_and_saveexec_b32 s1, s23
	s_cbranch_execz .LBB0_12
; %bb.9:                                ;   in Loop: Header=BB0_3 Depth=2
	global_load_b64 v[11:12], v[1:2], off
	s_mov_b32 s23, -1
	s_mov_b32 s24, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v11, v11, v9
	v_add_nc_u32_e32 v13, v12, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v12, 31, v11
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v11, s0, s12, v11
	v_add_co_ci_u32_e64 v12, s0, s13, v12, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s6, v13
	v_add_co_ci_u32_e64 v14, s0, s7, v14, s0
	global_load_b32 v11, v[11:12], off
	global_load_b32 v12, v[13:14], off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i32_e64 v11, v12
; %bb.10:                               ;   in Loop: Header=BB0_3 Depth=2
	v_add_nc_u32_e32 v10, 1, v7
	v_add_nc_u32_e32 v6, -1, v9
	s_xor_b32 s23, exec_lo, -1
                                        ; implicit-def: $vgpr9
; %bb.11:                               ; %Flow174
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s24
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, vcc_lo, exec_lo
	s_or_not1_b32 s0, s23, exec_lo
.LBB0_12:                               ; %Flow173
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s23, exec_lo, -1
	s_and_b32 s24, vcc_lo, exec_lo
	s_or_not1_b32 s1, s0, exec_lo
.LBB0_13:                               ; %Flow172
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s23, s23, exec_lo
	s_and_b32 s22, s24, exec_lo
	s_or_not1_b32 s0, s1, exec_lo
.LBB0_14:                               ; %Flow170
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s1, s18, exec_lo
	s_and_b32 s18, s23, exec_lo
	s_and_not1_b32 s17, s17, exec_lo
	s_or_b32 s18, s1, s18
	s_and_not1_b32 s1, s19, exec_lo
	s_and_b32 s19, s22, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s19, s1, s19
	s_or_b32 s17, s17, s0
.LBB0_15:                               ; %Flow169
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s17
	s_or_b32 s15, s0, s15
	s_and_not1_b32 s0, s14, exec_lo
	s_and_b32 s1, s18, exec_lo
	s_and_not1_b32 s16, s16, exec_lo
	s_and_b32 s20, s19, exec_lo
	s_or_b32 s14, s0, s1
	s_or_b32 s16, s16, s20
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB0_3
; %bb.16:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
	s_mov_b32 s1, -1
	s_xor_b32 s0, s16, -1
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s15, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s14, exec_lo, s15
; %bb.17:                               ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v8, 1, v9
	s_xor_b32 s1, exec_lo, -1
; %bb.18:                               ; %Flow175
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s1
	s_or_b32 s8, s1, s8
	s_and_not1_b32 s1, s9, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s9, s1, s0
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_2
; %bb.19:
	s_or_b32 exec_lo, exec_lo, s8
	v_cmp_ge_i32_e32 vcc_lo, v9, v5
	s_mov_b32 s0, 0
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr5_vgpr6
	s_and_saveexec_b32 s8, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB0_21
; %bb.20:                               ; %._crit_edge
	global_load_b32 v1, v[1:2], off offset:4
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v1, v7
                                        ; implicit-def: $vgpr1_vgpr2
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
.LBB0_21:                               ; %Flow
	s_or_saveexec_b32 s8, s8
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 exec_lo, exec_lo, s8
	s_cbranch_execz .LBB0_25
; %bb.22:
	global_load_b32 v3, v[1:2], off
	s_mov_b32 s0, -1
	s_mov_b32 s11, s1
                                        ; implicit-def: $vgpr5_vgpr6
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v3, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	s_and_saveexec_b32 s10, s9
	s_cbranch_execz .LBB0_24
; %bb.23:
	global_load_b32 v1, v[1:2], off offset:4
	s_and_not1_b32 s9, s1, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v1, v7
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_co_u32 v1, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	v_lshlrev_b64 v[7:8], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v1, v[1:2], off
	global_load_b32 v2, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v1, v2
	v_cmp_le_i32_e64 s0, v1, v2
	s_and_b32 s11, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_or_not1_b32 s0, s0, exec_lo
	s_or_b32 s11, s9, s11
.LBB0_24:                               ; %Flow167
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s9, s11, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s1, s1, s9
.LBB0_25:                               ; %Flow166
	s_or_b32 exec_lo, exec_lo, s8
                                        ; implicit-def: $vgpr1_vgpr2
	s_and_saveexec_b32 s8, s1
; %bb.26:
	v_lshlrev_b64 v[1:2], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
; %bb.27:                               ; %Flow168
	s_or_b32 exec_lo, exec_lo, s8
	s_and_saveexec_b32 s1, s0
; %bb.28:                               ; %._crit_edge114
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
; %bb.29:                               ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s1
	global_load_b32 v2, v[1:2], off
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB0_30:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 25
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_, .Lfunc_end0-_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1464
; NumSgprs: 27
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 27
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z23pretraitementFusionSortPii ; -- Begin function _Z23pretraitementFusionSortPii
	.globl	_Z23pretraitementFusionSortPii
	.p2align	8
	.type	_Z23pretraitementFusionSortPii,@function
_Z23pretraitementFusionSortPii:         ; @_Z23pretraitementFusionSortPii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_lshr_b32 s2, s3, 31
	s_add_i32 s3, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s2, s3, 1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_3
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[2:3], v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v2, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_3
; %bb.2:
	v_mov_b32_e32 v4, v2
	global_store_b64 v[0:1], v[3:4], off
.LBB1_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23pretraitementFusionSortPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z23pretraitementFusionSortPii, .Lfunc_end1-_Z23pretraitementFusionSortPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 172
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii ; -- Begin function _Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
	.globl	_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
	.p2align	8
	.type	_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii,@function
_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii: ; @_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x30
	s_load_b32 s3, s[0:1], 0x44
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_u32_e32 v1, s2
	s_sub_i32 s5, 0, s2
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s4, v1
	s_mul_i32 s5, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s5, s4, s5
	s_add_i32 s4, s4, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_hi_u32 v1, v0, s4
	s_mul_hi_u32 s4, s3, s4
	s_mul_i32 s5, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_sub_i32 s3, s3, s5
	s_add_i32 s5, s4, 1
	s_sub_i32 s6, s3, s2
	v_mul_lo_u32 v2, v1, s2
	v_add_nc_u32_e32 v3, 1, v1
	s_cmp_ge_u32 s3, s2
	s_cselect_b32 s4, s5, s4
	s_cselect_b32 s3, s6, s3
	s_add_i32 s5, s4, 1
	s_cmp_ge_u32 s3, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v0, v2
	s_cselect_b32 s3, s5, s4
	v_subrev_nc_u32_e32 v4, s2, v2
	v_cmp_le_u32_e32 vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v2, v2, v4 :: v_dual_cndmask_b32 v1, v1, v3
	v_cmp_le_u32_e32 vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 1, v1
	v_cndmask_b32_e32 v1, v1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s3, s15, v[1:2]
	s_load_b32 s3, s[0:1], 0x28
	v_mul_lo_u32 v1, v1, s2
	v_mul_lo_u32 v3, v2, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v0, v1
	v_add_nc_u32_e32 v0, v3, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB2_3
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_lshr_b32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s3, s2, s3
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	s_ashr_i32 s3, s3, 1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	v_dual_mov_b32 v7, s5 :: v_dual_mov_b32 v6, s4
	global_load_b32 v5, v[4:5], off
	v_lshrrev_b32_e32 v4, 31, v3
	v_cndmask_b32_e32 v7, s7, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v6, s6, v6 :: v_dual_add_nc_u32 v3, v3, v4
	v_cndmask_b32_e64 v4, s3, 0, vcc_lo
	v_ashrrev_i32_e32 v3, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v2, v4
	v_add_nc_u32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v7, v4, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_waitcnt vmcnt(0)
	global_store_b32 v[3:4], v5, off
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_3
; %bb.2:
	s_ashr_i32 s4, s2, 31
	v_add_nc_u32_e32 v4, v0, v1
	s_add_i32 s2, s2, s4
	s_load_b64 s[0:1], s[0:1], 0x20
	s_xor_b32 s2, s2, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v4, v1
	v_cvt_f32_u32_e32 v2, s2
	s_sub_i32 s5, 0, s2
	v_xor_b32_e32 v1, s4, v1
	v_rcp_iflag_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v2, v2
	v_mul_lo_u32 v3, s5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v2, v3
	v_add_nc_u32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v4, v2
	v_mul_lo_u32 v3, v2, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v2
	v_subrev_nc_u32_e32 v5, s2, v3
	v_cmp_le_u32_e32 vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v2, v2, v4
	v_cmp_le_u32_e32 vcc_lo, s2, v3
	v_lshrrev_b32_e32 v3, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v3, v0, v3
	v_add_nc_u32_e32 v4, 1, v2
	v_mov_b32_e32 v0, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v3, 1, v3
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v3
	v_xor_b32_e32 v2, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v2, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 3, v[1:2]
	v_mov_b32_e32 v1, s3
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v6, vcc_lo
	v_add_co_u32 v5, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	global_store_b64 v[7:8], v[3:4], off
	global_store_b64 v[5:6], v[0:1], off
.LBB2_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii, .Lfunc_end2-_Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 728
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8truncatePiS_iiii     ; -- Begin function _Z8truncatePiS_iiii
	.globl	_Z8truncatePiS_iiii
	.p2align	8
	.type	_Z8truncatePiS_iiii,@function
_Z8truncatePiS_iiii:                    ; @_Z8truncatePiS_iiii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x14
	s_load_b32 s2, s[0:1], 0x2c
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_u32_e32 v1, s6
	s_sub_i32 s7, 0, s6
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s3, v1
	s_mul_i32 s7, s7, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s7, s3, s7
	s_add_i32 s3, s3, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_hi_u32 v1, v0, s3
	s_mul_hi_u32 s3, s2, s3
	s_mul_i32 s7, s3, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_sub_i32 s2, s2, s7
	s_add_i32 s7, s3, 1
	s_sub_i32 s8, s2, s6
	v_mul_lo_u32 v2, v1, s6
	v_add_nc_u32_e32 v3, 1, v1
	s_cmp_ge_u32 s2, s6
	s_cselect_b32 s3, s7, s3
	s_cselect_b32 s2, s8, s2
	s_add_i32 s7, s3, 1
	s_cmp_ge_u32 s2, s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v0, v2
	s_cselect_b32 s2, s7, s3
	v_subrev_nc_u32_e32 v4, s6, v2
	v_cmp_le_u32_e32 vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v2, v2, v4 :: v_dual_cndmask_b32 v1, v1, v3
	v_cmp_le_u32_e32 vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 1, v1
	v_cndmask_b32_e32 v3, v1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v3, s6
	v_mad_u64_u32 v[1:2], null, s2, s15, v[3:4]
	v_sub_nc_u32_e32 v0, v0, v4
	s_mul_i32 s2, s6, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v1, s6, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	v_cmp_gt_i32_e64 s2, s4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, vcc_lo
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8truncatePiS_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z8truncatePiS_iiii, .Lfunc_end3-_Z8truncatePiS_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 388
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
    .private_segment_fixed_size: 0
    .sgpr_count:     27
    .sgpr_spill_count: 0
    .symbol:         _Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23pretraitementFusionSortPii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z23pretraitementFusionSortPii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12arrangeBatchPiS_S_P15HIP_vector_typeIiLj2EES2_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8truncatePiS_iiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8truncatePiS_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
