#include <ctime>
#include <iostream>

int rows = 1 << 13;
int cols = rows / 8;
int size = rows * cols;
int gens = 1000;
int space = size * sizeof(unsigned int);

void randomizeCells(unsigned int *cells) {
  for (int i = 0; i < size; ++i) {
    for (int j = 0; j < 4; ++j) {
      cells[i] <<= 8;
      cells[i] |= rand() & 0x11;
    }
  }
}

void printCells(unsigned int *cells) {
  std::cout << "\033[H\033[2J";
  for (int x = 0; x < rows && x < 16; ++x) {
    for (int y = 0; y < 16; ++y) {
      int idx = x * cols + y/8;
      bool on = ((cells[idx] >> (28-(y%8)*4))&1) == 1;
      std::cout << (on ? "o" : " ");
    }
    std::cout << std::endl;
  }
}

__global__
void neighborKernel(int size, int cols, unsigned int *cells, unsigned int *neighbors) {
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;
  for (int i = index; i < size; i += stride) {
    neighbors[i] = 0;
    for (int dx = -1; dx <= 1; ++dx) {
      for (int dy = -1; dy <= 1; ++dy) {
        if (dx != 0 || dy != 0) {
          int ni = (size + i + dx * cols) % size;
          int ny = (size + ni + dy) % size;
          unsigned int alive = cells[ni];
          unsigned int last = cells[ny];

          switch (dy) {
          case 1:
            alive <<= 4;
            last >>= 28;
            alive |= last;
            break;
          case -1:
            alive >>= 4;
            last <<= 28;
            alive |= last;
            break;
          }

          neighbors[i] += alive;
        }
      }
    }
  }
}

__global__
void lifeKernel(int size, unsigned int *cells, unsigned int *neighbors) {
  unsigned int all_on = 0x11111111;
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;
  for (int i = index; i < size; i += stride) {
    unsigned int b4 = (neighbors[i] & (all_on << 2)) >> 2;
    unsigned int b2 = (neighbors[i] & (all_on << 1)) >> 1;
    unsigned int b1 = neighbors[i] & all_on;
    cells[i] = b2 & (b1 | cells[i]) & ~b4;
  }
}

int main(void) {
  unsigned int *gen1 = new unsigned int[size];
  randomizeCells(gen1);

  unsigned int *cells, *neighbors;

  cudaMalloc(&cells, space);
  cudaMalloc(&neighbors, space);
  unsigned int *result = new unsigned int[size];

  std::clock_t start, stop;
  start = std::clock();

  cudaMemcpy(cells, gen1, space, cudaMemcpyHostToDevice);
  for (int i = 0; i < gens; ++i) {
    neighborKernel<<<(size+255)/256, 256>>>(size, cols, cells, neighbors);
    lifeKernel<<<(size+255)/256, 256>>>(size, cells, neighbors);
  }
  cudaMemcpy(result, cells, space, cudaMemcpyDeviceToHost);

  stop = std::clock();
  float efficiency = float(long(rows) * rows * gens) / (stop - start) * CLOCKS_PER_SEC;

  cudaFree(cells);
  cudaFree(neighbors);

  std::cout << "C++ Efficiency in cellhz: " << efficiency << std::endl;
}

	.file	"tmpxft_00388f7b_00000000-6_conway.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z14randomizeCellsPj
	.type	_Z14randomizeCellsPj, @function
_Z14randomizeCellsPj:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L3:
	cmpl	%ebx, size(%rip)
	jle	.L9
	movl	$4, %r12d
.L4:
	movd	0(%rbp,%rbx,4), %xmm0
	pslld	$8, %xmm0
	movd	%xmm0, 0(%rbp,%rbx,4)
	call	rand@PLT
	andl	$17, %eax
	orl	%eax, 0(%rbp,%rbx,4)
	decl	%r12d
	jne	.L4
	incq	%rbx
	jmp	.L3
.L9:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z14randomizeCellsPj, .-_Z14randomizeCellsPj
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"o"
.LC1:
	.string	" "
.LC2:
	.string	"\033[H\033[2J"
	.text
	.globl	_Z10printCellsPj
	.type	_Z10printCellsPj, @function
_Z10printCellsPj:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC2(%rip), %rsi
	leaq	.LC1(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	leaq	_ZSt4cout(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	movq	%r13, %rdi
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L11:
	cmpl	%ebx, rows(%rip)
	jle	.L10
	cmpl	$16, %ebx
	je	.L10
	xorl	%ebp, %ebp
.L13:
	movl	cols(%rip), %eax
	movl	%ebp, %edx
	movl	%ebp, %ecx
	movq	%r13, %rdi
	sarl	$3, %edx
	notl	%ecx
	leaq	.LC0(%rip), %rsi
	imull	%ebx, %eax
	andl	$7, %ecx
	sall	$2, %ecx
	addl	%edx, %eax
	cltq
	movl	(%r12,%rax,4), %eax
	shrl	%cl, %eax
	testb	$1, %al
	cmove	%r14, %rsi
	incl	%ebp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpl	$16, %ebp
	jne	.L13
	movq	%r13, %rdi
	incl	%ebx
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L11
.L10:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z10printCellsPj, .-_Z10printCellsPj
	.globl	_Z38__device_stub__Z14neighborKerneliiPjS_iiPjS_
	.type	_Z38__device_stub__Z14neighborKerneliiPjS_iiPjS_, @function
_Z38__device_stub__Z14neighborKerneliiPjS_iiPjS_:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14neighborKerneliiPjS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L22:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z38__device_stub__Z14neighborKerneliiPjS_iiPjS_, .-_Z38__device_stub__Z14neighborKerneliiPjS_iiPjS_
	.globl	_Z14neighborKerneliiPjS_
	.type	_Z14neighborKerneliiPjS_, @function
_Z14neighborKerneliiPjS_:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z14neighborKerneliiPjS_iiPjS_
	.cfi_endproc
.LFE3663:
	.size	_Z14neighborKerneliiPjS_, .-_Z14neighborKerneliiPjS_
	.globl	_Z33__device_stub__Z10lifeKerneliPjS_iPjS_
	.type	_Z33__device_stub__Z10lifeKerneliPjS_iPjS_, @function
_Z33__device_stub__Z10lifeKerneliPjS_iPjS_:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10lifeKerneliPjS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L27:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z33__device_stub__Z10lifeKerneliPjS_iPjS_, .-_Z33__device_stub__Z10lifeKerneliPjS_iPjS_
	.globl	_Z10lifeKerneliPjS_
	.type	_Z10lifeKerneliPjS_, @function
_Z10lifeKerneliPjS_:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z10lifeKerneliPjS_iPjS_
	.cfi_endproc
.LFE3665:
	.size	_Z10lifeKerneliPjS_, .-_Z10lifeKerneliPjS_
	.section	.rodata.str1.1
.LC4:
	.string	"C++ Efficiency in cellhz: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movabsq	$2305843009213693950, %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movslq	size(%rip), %rdi
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	cmpq	%rdi, %rbx
	jb	.L33
	salq	$2, %rdi
	call	_Znam@PLT
	movq	%rax, %rdi
	movq	%rax, %rbp
	call	_Z14randomizeCellsPj
	movslq	space(%rip), %rsi
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	movslq	space(%rip), %rsi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	movslq	size(%rip), %rdi
	cmpq	%rdi, %rbx
	jnb	.L34
.L33:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L42
	call	__cxa_throw_bad_array_new_length@PLT
.L34:
	salq	$2, %rdi
	xorl	%r13d, %r13d
	call	_Znam@PLT
	movq	%rax, %r12
	call	clock@PLT
	movslq	space(%rip), %rdx
	movq	16(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$16777217, %ebp
	movq	%rax, %rbx
	call	cudaMemcpy@PLT
	salq	$8, %rbp
.L36:
	cmpl	%r13d, gens(%rip)
	jle	.L43
	movl	$256, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbp, 44(%rsp)
	movl	size(%rip), %eax
	movl	$1, 52(%rsp)
	addl	$255, %eax
	cltd
	idivl	%ecx
	movq	%rbp, %rdx
	movl	$1, %ecx
	movl	%eax, 32(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 36(%rsp)
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movl	cols(%rip), %esi
	movl	size(%rip), %edi
	call	_Z38__device_stub__Z14neighborKerneliiPjS_iiPjS_
.L37:
	movl	$256, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbp, 44(%rsp)
	movl	size(%rip), %eax
	movl	$1, 52(%rsp)
	addl	$255, %eax
	cltd
	idivl	%ecx
	movq	%rbp, %rdx
	movl	$1, %ecx
	movl	%eax, 32(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 36(%rsp)
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	size(%rip), %edi
	call	_Z33__device_stub__Z10lifeKerneliPjS_iPjS_
.L38:
	incl	%r13d
	jmp	.L36
.L43:
	movq	16(%rsp), %rsi
	movslq	space(%rip), %rdx
	movl	$2, %ecx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	call	clock@PLT
	movslq	rows(%rip), %rdx
	movq	16(%rsp), %rdi
	movslq	gens(%rip), %rcx
	subq	%rbx, %rax
	imulq	%rdx, %rdx
	cvtsi2ssq	%rax, %xmm1
	imulq	%rcx, %rdx
	cvtsi2ssq	%rdx, %xmm0
	divss	%xmm1, %xmm0
	mulss	.LC3(%rip), %xmm0
	movss	%xmm0, 12(%rsp)
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	12(%rsp), %xmm0
	movq	%rax, %rdi
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
.L42:
	call	__stack_chk_fail@PLT
.L40:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z10lifeKerneliPjS_"
.LC6:
	.string	"_Z14neighborKerneliiPjS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3667:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10lifeKerneliPjS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14neighborKerneliiPjS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3667:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text.startup
	.type	_GLOBAL__sub_I_rows, @function
_GLOBAL__sub_I_rows:
.LFB4297:
	.cfi_startproc
	endbr64
	movl	rows(%rip), %ecx
	movl	$8, %esi
	movl	%ecx, %eax
	cltd
	idivl	%esi
	imull	%eax, %ecx
	movl	%eax, cols(%rip)
	movl	%ecx, size(%rip)
	sall	$2, %ecx
	movl	%ecx, space(%rip)
	ret
	.cfi_endproc
.LFE4297:
	.size	_GLOBAL__sub_I_rows, .-_GLOBAL__sub_I_rows
	.section	.init_array
	.align 8
	.quad	_GLOBAL__sub_I_rows
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	space
	.bss
	.align 4
	.type	space, @object
	.size	space, 4
space:
	.zero	4
	.globl	gens
	.data
	.align 4
	.type	gens, @object
	.size	gens, 4
gens:
	.long	1000
	.globl	size
	.bss
	.align 4
	.type	size, @object
	.size	size, 4
size:
	.zero	4
	.globl	cols
	.align 4
	.type	cols, @object
	.size	cols, 4
cols:
	.zero	4
	.globl	rows
	.data
	.align 4
	.type	rows, @object
	.size	rows, 4
rows:
	.long	8192
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <ctime>
#include <iostream>

int rows = 1 << 13;
int cols = rows / 8;
int size = rows * cols;
int gens = 1000;
int space = size * sizeof(unsigned int);

void randomizeCells(unsigned int *cells) {
  for (int i = 0; i < size; ++i) {
    for (int j = 0; j < 4; ++j) {
      cells[i] <<= 8;
      cells[i] |= rand() & 0x11;
    }
  }
}

void printCells(unsigned int *cells) {
  std::cout << "\033[H\033[2J";
  for (int x = 0; x < rows && x < 16; ++x) {
    for (int y = 0; y < 16; ++y) {
      int idx = x * cols + y/8;
      bool on = ((cells[idx] >> (28-(y%8)*4))&1) == 1;
      std::cout << (on ? "o" : " ");
    }
    std::cout << std::endl;
  }
}

__global__
void neighborKernel(int size, int cols, unsigned int *cells, unsigned int *neighbors) {
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;
  for (int i = index; i < size; i += stride) {
    neighbors[i] = 0;
    for (int dx = -1; dx <= 1; ++dx) {
      for (int dy = -1; dy <= 1; ++dy) {
        if (dx != 0 || dy != 0) {
          int ni = (size + i + dx * cols) % size;
          int ny = (size + ni + dy) % size;
          unsigned int alive = cells[ni];
          unsigned int last = cells[ny];

          switch (dy) {
          case 1:
            alive <<= 4;
            last >>= 28;
            alive |= last;
            break;
          case -1:
            alive >>= 4;
            last <<= 28;
            alive |= last;
            break;
          }

          neighbors[i] += alive;
        }
      }
    }
  }
}

__global__
void lifeKernel(int size, unsigned int *cells, unsigned int *neighbors) {
  unsigned int all_on = 0x11111111;
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;
  for (int i = index; i < size; i += stride) {
    unsigned int b4 = (neighbors[i] & (all_on << 2)) >> 2;
    unsigned int b2 = (neighbors[i] & (all_on << 1)) >> 1;
    unsigned int b1 = neighbors[i] & all_on;
    cells[i] = b2 & (b1 | cells[i]) & ~b4;
  }
}

int main(void) {
  unsigned int *gen1 = new unsigned int[size];
  randomizeCells(gen1);

  unsigned int *cells, *neighbors;

  hipMalloc(&cells, space);
  hipMalloc(&neighbors, space);
  unsigned int *result = new unsigned int[size];

  std::clock_t start, stop;
  start = std::clock();

  hipMemcpy(cells, gen1, space, hipMemcpyHostToDevice);
  for (int i = 0; i < gens; ++i) {
    neighborKernel<<<(size+255)/256, 256>>>(size, cols, cells, neighbors);
    lifeKernel<<<(size+255)/256, 256>>>(size, cells, neighbors);
  }
  hipMemcpy(result, cells, space, hipMemcpyDeviceToHost);

  stop = std::clock();
  float efficiency = float(long(rows) * rows * gens) / (stop - start) * CLOCKS_PER_SEC;

  hipFree(cells);
  hipFree(neighbors);

  std::cout << "C++ Efficiency in cellhz: " << efficiency << std::endl;
}

	.text
	.file	"conway.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z14randomizeCellsPj            # -- Begin function _Z14randomizeCellsPj
	.type	_Z14randomizeCellsPj,@function
_Z14randomizeCellsPj:                   # @_Z14randomizeCellsPj
	.cfi_startproc
# %bb.0:
	cmpl	$0, size(%rip)
	jle	.LBB0_6
# %bb.1:                                # %.preheader.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
	movl	(%rbx,%r14,4), %eax
	movl	$4, %ebp
.LBB0_3:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	shll	$8, %eax
	movl	%eax, (%rbx,%r14,4)
	callq	rand
	andl	$17, %eax
	orl	(%rbx,%r14,4), %eax
	movl	%eax, (%rbx,%r14,4)
	decl	%ebp
	jne	.LBB0_3
# %bb.4:                                #   in Loop: Header=BB0_2 Depth=1
	incq	%r14
	movslq	size(%rip), %rax
	cmpq	%rax, %r14
	jl	.LBB0_2
# %bb.5:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %rbp
.LBB0_6:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z14randomizeCellsPj, .Lfunc_end0-_Z14randomizeCellsPj
	.cfi_endproc
                                        # -- End function
	.globl	_Z10printCellsPj                # -- Begin function _Z10printCellsPj
	.type	_Z10printCellsPj,@function
_Z10printCellsPj:                       # @_Z10printCellsPj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movl	$_ZSt4cout, %r14d
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cmpl	$0, rows(%rip)
	jle	.LBB1_8
# %bb.1:                                # %.preheader.preheader
	xorl	%ebp, %ebp
.LBB1_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
	xorl	%r15d, %r15d
	xorl	%r12d, %r12d
.LBB1_3:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	cols(%rip), %eax
	imull	%ebp, %eax
	movl	%r12d, %ecx
	shrl	$3, %ecx
	addl	%eax, %ecx
	movslq	%ecx, %rax
	movl	(%rbx,%rax,4), %eax
	movl	%r15d, %ecx
	notb	%cl
	movzbl	%cl, %ecx
	andl	$28, %ecx
	btl	%ecx, %eax
	movl	$.L.str.4, %esi
	jae	.LBB1_5
# %bb.4:                                #   in Loop: Header=BB1_3 Depth=2
	movl	$.L.str.3, %esi
.LBB1_5:                                #   in Loop: Header=BB1_3 Depth=2
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incl	%r12d
	addl	$4, %r15d
	cmpl	$16, %r12d
	jne	.LBB1_3
# %bb.6:                                #   in Loop: Header=BB1_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	cmpl	$14, %ebp
	ja	.LBB1_8
# %bb.7:                                #   in Loop: Header=BB1_2 Depth=1
	incl	%ebp
	cmpl	rows(%rip), %ebp
	jl	.LBB1_2
.LBB1_8:                                # %._crit_edge
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z10printCellsPj, .Lfunc_end1-_Z10printCellsPj
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__neighborKerneliiPjS_ # -- Begin function _Z29__device_stub__neighborKerneliiPjS_
	.type	_Z29__device_stub__neighborKerneliiPjS_,@function
_Z29__device_stub__neighborKerneliiPjS_: # @_Z29__device_stub__neighborKerneliiPjS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14neighborKerneliiPjS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z29__device_stub__neighborKerneliiPjS_, .Lfunc_end2-_Z29__device_stub__neighborKerneliiPjS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__lifeKerneliPjS_ # -- Begin function _Z25__device_stub__lifeKerneliPjS_
	.type	_Z25__device_stub__lifeKerneliPjS_,@function
_Z25__device_stub__lifeKerneliPjS_:     # @_Z25__device_stub__lifeKerneliPjS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10lifeKerneliPjS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z25__device_stub__lifeKerneliPjS_, .Lfunc_end3-_Z25__device_stub__lifeKerneliPjS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI4_0:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movslq	size(%rip), %rax
	leaq	(,%rax,4), %rdi
	testq	%rax, %rax
	movq	$-1, %rbx
	cmovsq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %r15
	movq	%rax, %rdi
	callq	_Z14randomizeCellsPj
	movslq	space(%rip), %rsi
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	callq	hipMalloc
	movslq	space(%rip), %rsi
	leaq	16(%rsp), %rdi
	callq	hipMalloc
	movslq	size(%rip), %rax
	leaq	(,%rax,4), %rdi
	testq	%rax, %rax
	cmovsq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %r14
	callq	clock
	movq	%rax, %rbx
	movq	(%r12), %rdi
	movslq	space(%rip), %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	cmpl	$0, gens(%rip)
	jle	.LBB4_7
# %bb.1:                                # %.lr.ph.preheader
	xorl	%r12d, %r12d
	movabsq	$4294967296, %r13               # imm = 0x100000000
	leaq	256(%r13), %r15
.LBB4_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	size(%rip), %edi
	leal	255(%rdi), %eax
	addl	$510, %edi                      # imm = 0x1FE
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$8, %edi
	orq	%r13, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_4
# %bb.3:                                #   in Loop: Header=BB4_2 Depth=1
	movl	size(%rip), %edi
	movl	cols(%rip), %esi
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rcx
	callq	_Z29__device_stub__neighborKerneliiPjS_
.LBB4_4:                                #   in Loop: Header=BB4_2 Depth=1
	movl	size(%rip), %edi
	leal	255(%rdi), %eax
	addl	$510, %edi                      # imm = 0x1FE
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$8, %edi
	orq	%r13, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_6
# %bb.5:                                #   in Loop: Header=BB4_2 Depth=1
	movl	size(%rip), %edi
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z25__device_stub__lifeKerneliPjS_
.LBB4_6:                                #   in Loop: Header=BB4_2 Depth=1
	incl	%r12d
	cmpl	gens(%rip), %r12d
	jl	.LBB4_2
.LBB4_7:                                # %._crit_edge
	movq	8(%rsp), %rsi
	movslq	space(%rip), %rdx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	movslq	rows(%rip), %rcx
	imulq	%rcx, %rcx
	movslq	gens(%rip), %rdx
	imulq	%rcx, %rdx
	cvtsi2ss	%rdx, %xmm1
	subq	%rbx, %rax
	cvtsi2ss	%rax, %xmm0
	divss	%xmm0, %xmm1
	mulss	.LCPI4_0(%rip), %xmm1
	movss	%xmm1, 28(%rsp)                 # 4-byte Spill
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$26, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	28(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14neighborKerneliiPjS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10lifeKerneliPjS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	rows,@object                    # @rows
	.data
	.globl	rows
	.p2align	2, 0x0
rows:
	.long	8192                            # 0x2000
	.size	rows, 4

	.type	cols,@object                    # @cols
	.globl	cols
	.p2align	2, 0x0
cols:
	.long	1024                            # 0x400
	.size	cols, 4

	.type	size,@object                    # @size
	.globl	size
	.p2align	2, 0x0
size:
	.long	8388608                         # 0x800000
	.size	size, 4

	.type	gens,@object                    # @gens
	.globl	gens
	.p2align	2, 0x0
gens:
	.long	1000                            # 0x3e8
	.size	gens, 4

	.type	space,@object                   # @space
	.globl	space
	.p2align	2, 0x0
space:
	.long	33554432                        # 0x2000000
	.size	space, 4

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\033[H\033[2J"
	.size	.L.str, 8

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"o"
	.size	.L.str.3, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" "
	.size	.L.str.4, 2

	.type	_Z14neighborKerneliiPjS_,@object # @_Z14neighborKerneliiPjS_
	.section	.rodata,"a",@progbits
	.globl	_Z14neighborKerneliiPjS_
	.p2align	3, 0x0
_Z14neighborKerneliiPjS_:
	.quad	_Z29__device_stub__neighborKerneliiPjS_
	.size	_Z14neighborKerneliiPjS_, 8

	.type	_Z10lifeKerneliPjS_,@object     # @_Z10lifeKerneliPjS_
	.globl	_Z10lifeKerneliPjS_
	.p2align	3, 0x0
_Z10lifeKerneliPjS_:
	.quad	_Z25__device_stub__lifeKerneliPjS_
	.size	_Z10lifeKerneliPjS_, 8

	.type	.L.str.5,@object                # @.str.5
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.5:
	.asciz	"C++ Efficiency in cellhz: "
	.size	.L.str.5, 27

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14neighborKerneliiPjS_"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10lifeKerneliPjS_"
	.size	.L__unnamed_2, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__neighborKerneliiPjS_
	.addrsig_sym _Z25__device_stub__lifeKerneliPjS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z14neighborKerneliiPjS_
	.addrsig_sym _Z10lifeKerneliPjS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14neighborKerneliiPjS_ ; -- Begin function _Z14neighborKerneliiPjS_
	.globl	_Z14neighborKerneliiPjS_
	.p2align	8
	.type	_Z14neighborKerneliiPjS_,@function
_Z14neighborKerneliiPjS_:               ; @_Z14neighborKerneliiPjS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x0
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s6, 0xffff
	s_mov_b32 s6, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB0_18
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s6, s4, 31
	s_load_b32 s9, s[2:3], 0x0
	s_add_i32 s8, s4, s6
	s_load_b128 s[0:3], s[0:1], 0x8
	s_xor_b32 s6, s8, s6
	v_mov_b32_e32 v7, 0
	v_cvt_f32_u32_e32 v0, s6
	s_sub_i32 s8, 0, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s7, s9, s7
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s8, v0
	s_mov_b32 s8, 0
	v_mul_hi_u32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v0, v2
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;       Child Loop BB0_4 Depth 3
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_nc_u32_e32 v0, s4, v1
	v_mov_b32_e32 v8, 0
	s_mov_b32 s9, -1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_store_b32 v[2:3], v7, off
.LBB0_3:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_4 Depth 3
	v_mad_u64_u32 v[4:5], null, s9, s5, v[0:1]
	s_mov_b32 s10, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v4
	v_add_nc_u32_e32 v4, v4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v9
	v_mul_hi_u32 v5, v4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, v5, s6
	v_sub_nc_u32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s6, v4
	v_cmp_le_u32_e32 vcc_lo, s6, v4
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s6, v4
	v_cmp_le_u32_e32 vcc_lo, s6, v4
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v10, v4, v9
	v_sub_nc_u32_e32 v4, v10, v9
	v_add_nc_u32_e32 v10, s4, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_sub_nc_u32_e32 v9, v10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_or_b32 s11, s10, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s11, 0
	s_cbranch_scc1 .LBB0_15
; %bb.5:                                ; %NodeBlock
                                        ;   in Loop: Header=BB0_4 Depth=3
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v10, s10, v9
	s_cmp_lt_i32 s10, 1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_add_nc_u32_e32 v10, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v10, v10, v11
	v_mul_hi_u32 v12, v10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v12, v12, s6
	v_sub_nc_u32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v12, s6, v10
	v_cmp_le_u32_e32 vcc_lo, s6, v10
	v_cndmask_b32_e32 v10, v10, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v12, s6, v10
	v_cmp_le_u32_e32 vcc_lo, s6, v10
	v_cndmask_b32_e32 v10, v10, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v10, v10, v11
	v_sub_nc_u32_e32 v10, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v13, vcc_lo, s1, v11, vcc_lo
	s_clause 0x1
	global_load_b32 v10, v[4:5], off
	global_load_b32 v11, v[12:13], off
	s_cbranch_scc1 .LBB0_9
; %bb.6:                                ; %LeafBlock59
                                        ;   in Loop: Header=BB0_4 Depth=3
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v12, v10
	s_cmp_eq_u32 s10, 1
	s_cbranch_scc0 .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=3
	s_waitcnt vmcnt(0)
	v_alignbit_b32 v12, v10, v11, 28
.LBB0_8:                                ; %Flow
                                        ;   in Loop: Header=BB0_4 Depth=3
	s_mov_b32 s11, 0
	s_branch .LBB0_10
.LBB0_9:                                ;   in Loop: Header=BB0_4 Depth=3
	s_mov_b32 s11, -1
                                        ; implicit-def: $vgpr12
.LBB0_10:                               ; %Flow62
                                        ;   in Loop: Header=BB0_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s11
	s_cbranch_vccnz .LBB0_14
; %bb.11:                               ; %LeafBlock
                                        ;   in Loop: Header=BB0_4 Depth=3
	s_cmp_eq_u32 s10, -1
	s_cbranch_scc0 .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_4 Depth=3
	s_waitcnt vmcnt(0)
	v_alignbit_b32 v10, v11, v10, 4
.LBB0_13:                               ; %Flow61
                                        ;   in Loop: Header=BB0_4 Depth=3
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v12, v10
.LBB0_14:                               ;   in Loop: Header=BB0_4 Depth=3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v8, v12
	global_store_b32 v[2:3], v8, off
.LBB0_15:                               ;   in Loop: Header=BB0_4 Depth=3
	s_add_i32 s10, s10, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s10, 2
	s_cbranch_scc0 .LBB0_4
; %bb.16:                               ;   in Loop: Header=BB0_3 Depth=2
	s_add_i32 s9, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s9, 2
	s_cbranch_scc0 .LBB0_3
; %bb.17:                               ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v1, s7, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s4, v1
	s_or_b32 s8, vcc_lo, s8
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_2
.LBB0_18:                               ; %Flow65
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14neighborKerneliiPjS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14neighborKerneliiPjS_, .Lfunc_end0-_Z14neighborKerneliiPjS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 716
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10lifeKerneliPjS_     ; -- Begin function _Z10lifeKerneliPjS_
	.globl	_Z10lifeKerneliPjS_
	.p2align	8
	.type	_Z10lifeKerneliPjS_,@function
_Z10lifeKerneliPjS_:                    ; @_Z10lifeKerneliPjS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b32 s10, s[0:1], 0x0
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s10, v1
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s2, s[2:3], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s8
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[2:3], 2
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
	v_add_nc_u32_e32 v1, s2, v1
	global_load_b32 v0, v[4:5], off
	global_load_b32 v4, v[6:7], off
	v_add_co_u32 v2, vcc_lo, v2, s8
	v_cmp_le_i32_e64 s0, s10, v1
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s1, s0, s1
	s_waitcnt vmcnt(1)
	v_not_b32_e32 v5, v0
	v_lshrrev_b32_e32 v8, 1, v0
	s_waitcnt vmcnt(0)
	v_or_b32_e32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v4, 2, v5
	v_and_b32_e32 v0, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, v0, v4
	v_and_b32_e32 v0, 0x11111111, v0
	global_store_b32 v[6:7], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_2
.LBB1_3:                                ; %Flow31
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10lifeKerneliPjS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10lifeKerneliPjS_, .Lfunc_end1-_Z10lifeKerneliPjS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 276
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14neighborKerneliiPjS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14neighborKerneliiPjS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10lifeKerneliPjS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10lifeKerneliPjS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
