/**
    Giving a large number of arrays {A_i}1<=i<=N and
    {B_i}1<=i<=N with |A_i| + |B_i| = d < 1024, merges
    arrays twos by two and return a list of arrays {M_i}1<=i<=N

    @file batchMerge.cu
    @author Dang Vu Laurent Durand Homer
    @version 1.0 14/12/20
*/

#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <ctime>
#include <string>
#include <iostream>
#include <stdlib.h>


/**
    Verify cuda calls and return cuda error if any
*/
#define gpuCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
   if (code != cudaSuccess)
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}


/**
    Initialise ascendant array with random values
    @param array : the array to fill with random ascendant values
          size : Size of the arrays
          adder : Each x_i is higher than x_i-1 of a random value between 0 and adder
*/
void init_array(int* array, int size, int const adder=10)
{
  if (size >=1)
  {
    array[0] = rand()%adder;
    if (size >=2)
    {
      for(int i = 1; i < size;i++)
      {
          array[i] = array[i-1] + rand()%adder;
      }
    }
  }
}

/**
    Initialise two lists of ascendant arrays A and B with random values
    @param A : the first list of arrays to fill with random ascendant values
           B : the Second list of arrays to fill with random ascendant values
          sizes : Sizes of each subarrays
          d : for all 1<=i<=N, |A_i| + |B_i| = d
          N : number of subarrays in A and B
*/
void init_list_array(int **A, int **B, int N, int d, int2 *sizes)
{
    int sizeAi, sizeBi;
    for (int i = 0; i < N; i++)
    {
      //Initialiser les tailles de Ai et Bi
      sizeAi = rand()%d;
      sizeBi = d - sizeAi;

      //Stocker les tailles dans sizes
      sizes[i].x = sizeAi;
      sizes[i].y = sizeBi;

      //Allocation A et B
      A[i] = (int*)malloc(sizes[i].x*sizeof(int));
      B[i] = (int*)malloc(sizes[i].y*sizeof(int));

      //Initialisation A et B
      init_array(A[i], sizes[i].x);
      init_array(B[i], sizes[i].y);
    }
}

/**
    Return first indices of each arrays wich have their sizes in sizes for A and B as flat arrays
    @param indices : INdices of first element of each subarrays in A and B
           sizes : Sizes of each subarrays in A and B
           N : number of subarrays in A and B
*/
void indices_array(int2 *indices, int2 *sizes, int N)
{
  indices[0].x=0;
  indices[0].y=0;
  for (int i = 1; i < N; i++)
  {
    indices[i].x = indices[i-1].x+sizes[i-1].x;
    indices[i].y = indices[i-1].y+sizes[i-1].y;

  }
}

/**
    Return total sizes of A and B with A and B as flat arrays
    @param sizes : Sizes of each subarrays in A and B
           N : number of subarrays in A and B
*/
int2 get_totalSizes(int2 *sizes, int N)
{
  int2 totalSizes;
  totalSizes.x = 0;
  totalSizes.y = 0;
  for (int i = 0; i < N; i++)
  {
    totalSizes.x = totalSizes.x + sizes[i].x;
    totalSizes.y = totalSizes.y + sizes[i].y;
  }
  return totalSizes;
}


/**
    Return flat arrays of  A and B
    @param flatA : flat version of A
           flat B : flat version of B
           A : 2D array of int
           B : 2D array of int2
           N : Number of subarrays in A and B
           d : |A_i| + |B_i| = d
           sizes : sizes of subarrays in A and B
*/
void flat_arrays(int *flatA, int *flatB, int **A, int **B, int N, int d, int2 *sizes)
{
  int ia = 0;
  int ib = 0;
  for (int i = 0; i < N; i++)
  {

    for (int j = 0; j < sizes[i].x; j++)
    {
      flatA[ia] = A[i][j];
      ia = ia +1;
    }
    for (int j = 0; j < sizes[i].y; j++)
    {
      flatB[ib] = B[i][j];
      ib = ib +1;
    }
  }
}

/**
    Return 2D version of a flat array with N subarrays of sizes d
    @param unFlatM : unFLatversion of M
           flatM : flat version of M
           N : Number of subarrays in M
           d : Sizes of subarrays
*/
void unflat_arrays(int **unFlatM, int *flatM, int N, int d)
{
  for (int i = 0; i < N; i++)
  {
    for (int j = 0; j < d; j++)
    {
      unFlatM[i][j] = flatM[i*d + j];
    }
  }
}

/**
    Print an array of size size
    @param a : array to print
           size : size of arrays
*/
void print_array(int* a, int size)
{
    printf("[");
    for(int i = 0; i < size;i++)
    {
        //printf("i = %d | v = %d " ,i, a[i]);
        printf("%d " ,a[i]);
    }
    printf("]\n");
}

/**
    Sequential version of merge
    @param a_k, b_k : array to merge
           m_k : merge of a and b
           n_a, n_b, n_b : respective sizes of a_k, b_k, m_k
*/
void mergeSeq(int *a_k, int *b_k, int *m_k, int n_a, int n_b, int n_m)
{
  int i, j;
  i=0;
  j=0;
  while(i+j < n_m)
  {
    if (i>= n_a)
    {
      m_k[i+j]=b_k[j];
      j++;
    }
    else if (j>= n_b || a_k[i] < b_k[j])
    {
      m_k[i+j]=a_k[i];
      i++;
    }
    else
    {
      m_k[i+j]=b_k[j];
      j++;
    }
  }
}

void mergeSeqBatch(int **a, int **b, int **m, int N, int d, int2 *sizes)
{
  for (int i = 0; i < N; i++)
  {
    mergeSeq(a[i], b[i], m[i], sizes[i].x, sizes[i].y, d);
  }
}

/**
    Globall version of parallel merge of {A_i} and {B_i} in {M_i} with |M|<1024
    @param aGPU : flat version of arrays {A_i} in device
           bGPU : flat version of array {B_i } in device
           mGPU : flat version of array {M_i} in device
           d : |A| + |B| = |M| = d
           N : number of subarrays in A and B
           indices : indices of the start of each subarrays in A and B
           sizes : sizes of each subarrays in A and B
*/
__global__ void mergeSmallBatch_k(int* aGPU, int* bGPU, int* mGPU, int d, int N, int2 *indices, int2 *sizes)
{
    int tidx = threadIdx.x%d; // The indice of the thread in the "new" blocks of size d
    int Qt = (threadIdx.x-tidx)/d;
    int gbx = Qt + blockIdx.x*(blockDim.x/d); // The indice of "new" blocks of size d
    int i = gbx*d + tidx; // The global indice of the thread
    if(i < N*d)
    {
        int2 K;
        int2 P;
        int2 Q;
        if(tidx > sizes[gbx].x)
        {
            K.x = tidx - sizes[gbx].x;
            K.y = sizes[gbx].x;
            P.x = sizes[gbx].x;
            P.y = tidx - sizes[gbx].x;
        }
        else
        {
            K.x = 0;
            K.y = tidx;
            P.x = tidx;
            P.y = 0;
        }

        int offset = 0;
        while(1)
        {
            offset = abs(K.y - P.y)/2;
            Q.x = K.x + offset;
            Q.y = K.y - offset;
            if(Q.y >= 0 && Q.x <= sizes[gbx].y && (Q.y == sizes[gbx].x || Q.x == 0 || aGPU[indices[gbx].x + Q.y] > bGPU[indices[gbx].y + Q.x - 1]))
            {
                if(Q.x == sizes[gbx].y || Q.y == 0 || aGPU[indices[gbx].x + Q.y - 1] <= bGPU[indices[gbx].y + Q.x])
                {
                    if(Q.y < sizes[gbx].x && (Q.x == sizes[gbx].y || aGPU[indices[gbx].x + Q.y] <= bGPU[indices[gbx].y + Q.x]))
                    {
                        mGPU[i] = aGPU[indices[gbx].x + Q.y];
                    }
                    else
                    {
                        mGPU[i] = bGPU[indices[gbx].y + Q.x];
                    }
                    break;
                }
                else
                {
                    K.x = Q.x + 1;
                    K.y = Q.y - 1;
                }
            }
            else
            {
              P.x = Q.x - 1;
              P.y = Q.y + 1;

            }

        }
    }
}

/**
    verify that each tab_i < tab_i+1 in tab
    @param tab : array
    @return : 0 any tab_i > tab_i+1, either 1
*/
int assertOrder(int *tab, int size){
  for (int i=0; i<size-1; i++){
    if (tab[i] > tab[i+1]){
      printf("WARNING : Unsuccessful merge or sort ... : unordered array on indice %d ...\n", i);
      printf("tab[i]= %d > tab[i+1] = %d\n", tab[i], tab[i+1]);
      return 0;
    }
  }
  return 1;
}

/**
    verify that each element of tab is in tab_2
    @param tab : first array
            n1 : size of tab
            tab2 : second array
            n2 : size of tab2

    @return : 0 any tab_i > tab_i+1, either 1
*/
int assertMergeAllValuesPresent(int *tab, int n1, int *tab2, int n2, int* m, int size)
{
  int verif[size]; //tableau avec des 1 là où l'on a déjà vérifié qu'il correspond déjà à un élément de a ou de b
  for(int i = 0;i<size;i++){
      verif[i] = 0;
  }

  for (int i=0; i<size; i++){
    for(int j = 0;j < n1;j++){
      if(tab[j] == m[i] && verif[i] == 0){ //si il y a une valeur identique et que celle-ci n'a pas été vérifiée
          verif[i] = 1;
      }
    }
  }
  for (int i=0; i<size; i++){
    for(int j = 0;j < n2;j++){
      if(tab2[j] == m[i] && verif[i] == 0){
          verif[i] = 1;
      }
    }
  }

  for(int i = 0;i<size;i++){
    if(verif[i] != 1){
        printf("\nWARNING : Unsuccessful merge : incorrect elements...\n");
        return 0;
    }
  }

  return 1;
}


/**
    verify that m is sortes and that it merges tab and tab2
    @param tab et tab2 : les deux tableaux qu'on veut fusionner
            m : le tableau qui est la fusion triée de tab et tab2

    @return : 0 any error, either 1
*/
int assertMerge(int *tab, int n1, int *tab2, int n2, int* m, int size){
    int successfulOrder = assertOrder(m, size);
    int successfulElements = assertMergeAllValuesPresent(tab, n1, tab2, n2, m, size);
    //assertMergeAllValuesPresent(int *tab, int n1, int *tab2, int n2, int* m, int size)
    if(successfulOrder && successfulElements){
        // printf("\nSuccessful merge !\n");
        return 1;
    }
    else{
        // printf("\nUnsuccessful merge !\n");
        return 0;
    }
}


/**
    verify that a list of arrays {M_i}1<=i<=N have correctly merge {A_i} and {B_i}
    @param A : First list of arrays to merge
           B : Second list of arrays to merge
           M : Merge of A and B
           sizes : sizes of subarrays A_i and B_i
           N : number of subarrays in A and B
    @return : 0 any error, either 1
*/
int assertMerge2D(int **A, int **B, int **M, int2 *sizes, int N)
{
  for (int i = 0; i < N; i++)
  {
    if (assertMerge(A[i], sizes[i].x, B[i], sizes[i].y, M[i], sizes[i].x + sizes[i].y) == 0)
    {
      printf("Unsuccessful merge on array %d !\n", i);
      return 0;
    }
  }
  printf("Successful merge !\n");
  return 1;
}


/**
    Merge 2 lists of arrays {A_i} and {B_i} in {M_i}1<=i<=N
    @param argv[1] : number of subarrays in A and B
           argv[2] : size of |A_i| + |B_i|
*/
int main(int argc, char *argv[])
{
    std::clock_t startS, endS;
    float seqMergeTime, parMergeTime, DoH, HoD;

    srand(time(NULL));
    int **A, **B, **unFlatM, **M;
    int *flatM, *flatA, *flatB, *aGPU, *bGPU, *mGPU;
    int N, d;
    int2 *sizes, *indices, *sizesGPU, *indicesGPU;
    int2 totalSizes;

    if(argc== 3)
    {
      N = atoi(argv[1]);
      d = atoi(argv[2]);
    }
    else
    {
      N= 1000;
      d = 4;
    }



    A = (int**)malloc(N*sizeof(int*));
    B = (int**)malloc(N*sizeof(int*));
    M = (int**)malloc(N*sizeof(int*));
    for (int i = 0; i < N; i++)
    {
      M[i] = (int*)malloc(d*sizeof(int));
    }
    sizes = (int2*)malloc(N*sizeof(int2)); // Sizes of each subarrays in A and B
    indices = (int2*)malloc(N*sizeof(int2)); // First indices of each subarrays in flat version of A and B
    init_list_array(A, B, N, d, sizes);
    indices_array(indices, sizes, N);
    totalSizes = get_totalSizes(sizes, N);

    //Flat versions of A, B and M to give to devices
    flatA = (int*)malloc(totalSizes.x*sizeof(int));
    flatB = (int*)malloc(totalSizes.y*sizeof(int));
    flatM = (int*)malloc(N*d*sizeof(int));
    flat_arrays(flatA, flatB, A, B, N, d, sizes); //Falt A and B to give them to devices

    //Allocation of devies objects
    gpuCheck(cudaMalloc(&mGPU, N*d*sizeof(int)));
    gpuCheck(cudaMalloc(&aGPU, totalSizes.x*sizeof(int)));
    gpuCheck(cudaMalloc(&bGPU, totalSizes.y*sizeof(int)));
    gpuCheck(cudaMalloc(&sizesGPU, N*sizeof(int2)));
    gpuCheck(cudaMalloc(&indicesGPU, N*sizeof(int2)));

    //Copy host to device of arrays to merge, with their respective sizes and indices
    startS = std::clock();
    gpuCheck( cudaMemcpy(aGPU, flatA, totalSizes.x*sizeof(int), cudaMemcpyHostToDevice) );
    gpuCheck( cudaMemcpy(bGPU, flatB, totalSizes.y*sizeof(int), cudaMemcpyHostToDevice) );
    gpuCheck( cudaMemcpy(sizesGPU, sizes, N*sizeof(int2), cudaMemcpyHostToDevice) );
    gpuCheck( cudaMemcpy(indicesGPU, indices, N*sizeof(int2), cudaMemcpyHostToDevice) );
    endS = std::clock();
    HoD = (endS - startS) / (float) CLOCKS_PER_SEC;

    //Merge of batches parallel
    printf("======== batch merge =======\n");
    printf("* Number of batches : %d\n* Sizes of batches : %d\n", N, d);
    startS = std::clock();
    mergeSmallBatch_k<<<N*d/1024+1, d*1024/d>>>(aGPU, bGPU, mGPU, d, N, indicesGPU, sizesGPU);
    gpuCheck(cudaPeekAtLastError());
    gpuCheck( cudaDeviceSynchronize() );
    endS = std::clock();
    parMergeTime = (endS - startS) / (float) CLOCKS_PER_SEC;
    startS = std::clock();
    gpuCheck( cudaMemcpy(flatM, mGPU, N*d*sizeof(int), cudaMemcpyDeviceToHost) );
    endS = std::clock();
    DoH = (endS - startS) / (float) CLOCKS_PER_SEC;

    //Merge of batches parallel
    startS = std::clock();
    mergeSeqBatch(A, B, M, N, d, sizes);
    endS = std::clock();
    seqMergeTime = (endS - startS) / (float) CLOCKS_PER_SEC;

    //Allocation unFlat version of M
    unFlatM = (int**)malloc(N*sizeof(int*));
    for (int i = 0; i < N; i++)
    {
      unFlatM[i] = (int*)malloc(d*sizeof(int));
    }

    //unflat M
    unflat_arrays(unFlatM, flatM, N, d);

    //Verify that M is correctly merge


    printf("\n========= Sequential merge : =============\n");
    printf("Total time elapsed : %f s\n", seqMergeTime);
    assertMerge2D(A, B, M, sizes, N);
    printf("\n");

    printf("========= Parallel merge : =============\n");
    printf("Total time elapsed : %f s\n", parMergeTime+DoH+HoD);
    printf("Time running algorithm : %f s\n", parMergeTime);
    printf("Time to copy Host to Device : %f s\n", HoD);
    printf("Time to copy Device to Host : %f s\n", DoH);
    assertMerge2D(A, B, unFlatM, sizes, N);
    printf("Parrallel algorithm is %f times faster than sequential merge !\n", seqMergeTime/parMergeTime);
    printf("Parrallel merge is %f times faster than sequential merge !\n", seqMergeTime/(parMergeTime+HoD+DoH));



    //Free device mermory
    gpuCheck(cudaFree(aGPU));
    gpuCheck(cudaFree(bGPU));
    gpuCheck(cudaFree(mGPU));
    gpuCheck(cudaFree(indicesGPU));
    gpuCheck(cudaFree(sizesGPU));

    //Free host memory
    free(A);
    free(B);
    free(unFlatM);
    free(flatM);
    free(flatA);
    free(flatB);
    free(sizes);
    free(indices);


    return 0;
}

	.file	"tmpxft_00273976_00000000-6_batchMerge.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3652:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3652:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB3635:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L8
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L2
	movl	%ebx, %edi
	call	exit@PLT
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L8:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.text
	.globl	_Z10init_arrayPiii
	.type	_Z10init_arrayPiii, @function
_Z10init_arrayPiii:
.LFB3636:
	.cfi_startproc
	endbr64
	testl	%esi, %esi
	jle	.L20
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%edx, %ebx
	call	rand@PLT
	cltd
	idivl	%ebx
	movl	%edx, 0(%r13)
	cmpl	$1, %r12d
	je	.L12
	movl	$1, %ebp
.L14:
	movl	-4(%r13,%rbp,4), %r14d
	call	rand@PLT
	cltd
	idivl	%ebx
	addl	%r14d, %edx
	movl	%edx, 0(%r13,%rbp,4)
	incq	%rbp
	cmpl	%ebp, %r12d
	jg	.L14
.L12:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
.L20:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	.cfi_restore 13
	.cfi_restore 14
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z10init_arrayPiii, .-_Z10init_arrayPiii
	.globl	_Z15init_list_arrayPPiS0_iiP4int2
	.type	_Z15init_list_arrayPPiS0_iiP4int2, @function
_Z15init_list_arrayPPiS0_iiP4int2:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	%edx, 8(%rsp)
.L24:
	cmpl	%ebx, 8(%rsp)
	jle	.L27
	call	rand@PLT
	movl	%ebp, %r15d
	cltd
	idivl	%ebp
	movslq	%edx, %rdi
	subl	%edi, %r15d
	movl	%edi, (%r12,%rbx,8)
	movl	%r15d, 4(%r12,%rbx,8)
	movl	%edi, 12(%rsp)
	salq	$2, %rdi
	call	malloc@PLT
	movslq	%r15d, %rdi
	movq	%rax, 0(%r13,%rbx,8)
	salq	$2, %rdi
	call	malloc@PLT
	movl	12(%rsp), %esi
	movl	$10, %edx
	movq	%rax, (%r14,%rbx,8)
	movq	0(%r13,%rbx,8), %rdi
	call	_Z10init_arrayPiii
	movl	4(%r12,%rbx,8), %esi
	movq	(%r14,%rbx,8), %rdi
	movl	$10, %edx
	incq	%rbx
	call	_Z10init_arrayPiii
	jmp	.L24
.L27:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z15init_list_arrayPPiS0_iiP4int2, .-_Z15init_list_arrayPPiS0_iiP4int2
	.globl	_Z13indices_arrayP4int2S0_i
	.type	_Z13indices_arrayP4int2S0_i, @function
_Z13indices_arrayP4int2S0_i:
.LFB3638:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	movq	%rax, (%rdi)
	xorl	%eax, %eax
.L29:
	incq	%rax
	cmpl	%eax, %edx
	jle	.L31
	movl	-8(%rsi,%rax,8), %ecx
	addl	-8(%rdi,%rax,8), %ecx
	movl	%ecx, (%rdi,%rax,8)
	movl	-4(%rsi,%rax,8), %ecx
	addl	-4(%rdi,%rax,8), %ecx
	movl	%ecx, 4(%rdi,%rax,8)
	jmp	.L29
.L31:
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z13indices_arrayP4int2S0_i, .-_Z13indices_arrayP4int2S0_i
	.globl	_Z14get_totalSizesP4int2i
	.type	_Z14get_totalSizesP4int2i, @function
_Z14get_totalSizesP4int2i:
.LFB3639:
	.cfi_startproc
	endbr64
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	xorl	%eax, %eax
.L33:
	cmpl	%ecx, %esi
	jle	.L35
	addl	(%rdi,%rcx,8), %eax
	addl	4(%rdi,%rcx,8), %edx
	incq	%rcx
	jmp	.L33
.L35:
	salq	$32, %rdx
	orq	%rdx, %rax
	ret
	.cfi_endproc
.LFE3639:
	.size	_Z14get_totalSizesP4int2i, .-_Z14get_totalSizesP4int2i
	.globl	_Z11flat_arraysPiS_PS_S0_iiP4int2
	.type	_Z11flat_arraysPiS_PS_S0_iiP4int2, @function
_Z11flat_arraysPiS_PS_S0_iiP4int2:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %r9
	movq	%rdx, %r10
	movq	%rcx, %r11
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	24(%rsp), %rbx
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%eax, %eax
.L37:
	cmpl	%esi, %r8d
	jle	.L36
	cltq
	xorl	%ecx, %ecx
.L42:
	cmpl	%ecx, (%rbx,%rsi,8)
	jle	.L44
	movq	(%r10,%rsi,8), %rbp
	movl	0(%rbp,%rcx,4), %ebp
	incq	%rcx
	movl	%ebp, (%rdi,%rax,4)
	incq	%rax
	jmp	.L42
.L44:
	movslq	%edx, %rdx
	xorl	%ecx, %ecx
.L39:
	cmpl	%ecx, 4(%rbx,%rsi,8)
	jle	.L45
	movq	(%r11,%rsi,8), %rbp
	movl	0(%rbp,%rcx,4), %ebp
	incq	%rcx
	movl	%ebp, (%r9,%rdx,4)
	incq	%rdx
	jmp	.L39
.L45:
	incq	%rsi
	jmp	.L37
.L36:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3640:
	.size	_Z11flat_arraysPiS_PS_S0_iiP4int2, .-_Z11flat_arraysPiS_PS_S0_iiP4int2
	.globl	_Z13unflat_arraysPPiS_ii
	.type	_Z13unflat_arraysPPiS_ii, @function
_Z13unflat_arraysPPiS_ii:
.LFB3641:
	.cfi_startproc
	endbr64
	movq	%rdi, %r9
	xorl	%r8d, %r8d
	xorl	%edi, %edi
.L52:
	cmpl	%edi, %edx
	jle	.L59
	movslq	%r8d, %rax
	leaq	(%rsi,%rax,4), %r10
	xorl	%eax, %eax
	cmpl	%eax, %ecx
	jg	.L57
	incq	%rdi
	addl	%ecx, %r8d
	jmp	.L52
.L59:
	ret
.L57:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
.L48:
	movl	(%r10,%rax,4), %ebx
	movq	(%r9,%rdi,8), %r11
	movl	%ebx, (%r11,%rax,4)
	incq	%rax
.L50:
	cmpl	%eax, %ecx
	jg	.L48
	incq	%rdi
	addl	%ecx, %r8d
	cmpl	%edi, %edx
	jle	.L46
	movslq	%r8d, %rax
	leaq	(%rsi,%rax,4), %r10
	xorl	%eax, %eax
	jmp	.L50
.L46:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3641:
	.size	_Z13unflat_arraysPPiS_ii, .-_Z13unflat_arraysPPiS_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"["
.LC2:
	.string	"%d "
.LC3:
	.string	"]\n"
	.text
	.globl	_Z11print_arrayPii
	.type	_Z11print_arrayPii, @function
_Z11print_arrayPii:
.LFB3642:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%eax, %eax
	leaq	.LC2(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	movl	$2, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	leaq	.LC1(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
	call	__printf_chk@PLT
.L61:
	cmpl	%ebx, %ebp
	jle	.L64
	movl	(%r12,%rbx,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L61
.L64:
	popq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC3(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE3642:
	.size	_Z11print_arrayPii, .-_Z11print_arrayPii
	.globl	_Z8mergeSeqPiS_S_iii
	.type	_Z8mergeSeqPiS_S_iii, @function
_Z8mergeSeqPiS_S_iii:
.LFB3643:
	.cfi_startproc
	endbr64
	movq	%rdx, %r10
	xorl	%eax, %eax
	xorl	%edx, %edx
	movl	%ecx, %r11d
	leal	(%rdx,%rax), %ecx
	cmpl	%r9d, %ecx
	jl	.L74
	ret
.L74:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
.L71:
	movslq	%ecx, %rcx
	leaq	(%r10,%rcx,4), %rbp
	cmpl	%r11d, %edx
	jl	.L67
	movslq	%eax, %rcx
	movl	(%rsi,%rcx,4), %ecx
	jmp	.L70
.L67:
	movslq	%edx, %rcx
	movl	(%rdi,%rcx,4), %ebx
	cmpl	%r8d, %eax
	jge	.L69
	movslq	%eax, %rcx
	movl	(%rsi,%rcx,4), %ecx
	cmpl	%ebx, %ecx
	jle	.L70
.L69:
	incl	%edx
	movl	%ebx, %ecx
	jmp	.L68
.L70:
	incl	%eax
.L68:
	movl	%ecx, 0(%rbp)
	leal	(%rdx,%rax), %ecx
	cmpl	%r9d, %ecx
	jl	.L71
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3643:
	.size	_Z8mergeSeqPiS_S_iii, .-_Z8mergeSeqPiS_S_iii
	.globl	_Z13mergeSeqBatchPPiS0_S0_iiP4int2
	.type	_Z13mergeSeqBatchPPiS0_S0_iiP4int2, @function
_Z13mergeSeqBatchPPiS0_S0_iiP4int2:
.LFB3644:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r9, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	pushq	%r10
	.cfi_def_cfa_offset 64
	movl	%r8d, 4(%rsp)
.L76:
	cmpl	%ebx, %r12d
	jle	.L79
	movl	0(%rbp,%rbx,8), %ecx
	movq	(%r14,%rbx,8), %rdx
	movq	(%r15,%rbx,8), %rsi
	movq	0(%r13,%rbx,8), %rdi
	movl	4(%rbp,%rbx,8), %r8d
	movl	4(%rsp), %r9d
	incq	%rbx
	call	_Z8mergeSeqPiS_S_iii
	jmp	.L76
.L79:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3644:
	.size	_Z13mergeSeqBatchPPiS0_S0_iiP4int2, .-_Z13mergeSeqBatchPPiS0_S0_iiP4int2
	.section	.rodata.str1.1
.LC4:
	.string	"WARNING : Unsuccessful merge or sort ... : unordered array on indice %d ...\n"
.LC5:
	.string	"tab[i]= %d > tab[i+1] = %d\n"
	.text
	.globl	_Z11assertOrderPii
	.type	_Z11assertOrderPii, @function
_Z11assertOrderPii:
.LFB3645:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%edx, %edx
	decl	%esi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 32
.L81:
	cmpl	%edx, %esi
	jle	.L86
	movq	%rbx, %rbp
	addq	$4, %rbx
	movl	(%rbx), %eax
	cmpl	%eax, 0(%rbp)
	jle	.L82
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	(%rbx), %ecx
	movl	0(%rbp), %edx
	movl	$2, %edi
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
	jmp	.L80
.L82:
	incl	%edx
	jmp	.L81
.L86:
	movl	$1, %eax
.L80:
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3645:
	.size	_Z11assertOrderPii, .-_Z11assertOrderPii
	.section	.rodata.str1.1
.LC6:
	.string	"\nWARNING : Unsuccessful merge : incorrect elements...\n"
	.text
	.globl	_Z27assertMergeAllValuesPresentPiiS_iS_i
	.type	_Z27assertMergeAllValuesPresentPiiS_iS_i, @function
_Z27assertMergeAllValuesPresentPiiS_iS_i:
.LFB3646:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%esi, %r11d
	movq	%rdx, %rsi
	movq	%rdi, %r10
	movl	%ecx, %edi
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset 3, -24
	movq	%fs:40, %rax
	movq	%rax, -24(%rbp)
	xorl	%eax, %eax
	movslq	%r9d, %rax
	movq	%rsp, %rcx
	leaq	15(,%rax,4), %rdx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L88:
	cmpq	%rcx, %rsp
	je	.L89
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L88
.L89:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L90
	orq	$0, -8(%rsp,%rax)
.L90:
	movq	%rsp, %rax
	xorl	%edx, %edx
.L91:
	cmpl	%edx, %r9d
	jle	.L112
	xorl	%ecx, %ecx
	movl	%ecx, (%rax,%rdx,4)
	incq	%rdx
	jmp	.L91
.L112:
	xorl	%edx, %edx
.L93:
	cmpl	%edx, %r9d
	jle	.L113
	xorl	%ecx, %ecx
.L96:
	cmpl	%ecx, %r11d
	jle	.L114
	movl	(%r8,%rdx,4), %ebx
	cmpl	%ebx, (%r10,%rcx,4)
	jne	.L94
	cmpl	$0, (%rax,%rdx,4)
	jne	.L94
	movl	$1, (%rax,%rdx,4)
.L94:
	incq	%rcx
	jmp	.L96
.L114:
	incq	%rdx
	jmp	.L93
.L113:
	xorl	%edx, %edx
.L97:
	cmpl	%edx, %r9d
	jle	.L115
	xorl	%ecx, %ecx
.L100:
	cmpl	%ecx, %edi
	jle	.L116
	movl	(%r8,%rdx,4), %ebx
	cmpl	%ebx, (%rsi,%rcx,4)
	jne	.L98
	cmpl	$0, (%rax,%rdx,4)
	jne	.L98
	movl	$1, (%rax,%rdx,4)
.L98:
	incq	%rcx
	jmp	.L100
.L116:
	incq	%rdx
	jmp	.L97
.L115:
	xorl	%edx, %edx
.L101:
	cmpl	%edx, %r9d
	jle	.L117
	incq	%rdx
	cmpl	$1, -4(%rax,%rdx,4)
	je	.L101
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
	jmp	.L87
.L117:
	movl	$1, %eax
.L87:
	movq	-24(%rbp), %rdx
	subq	%fs:40, %rdx
	je	.L104
	call	__stack_chk_fail@PLT
.L104:
	movq	-8(%rbp), %rbx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3646:
	.size	_Z27assertMergeAllValuesPresentPiiS_iS_i, .-_Z27assertMergeAllValuesPresentPiiS_iS_i
	.globl	_Z11assertMergePiiS_iS_i
	.type	_Z11assertMergePiiS_iS_i, @function
_Z11assertMergePiiS_iS_i:
.LFB3647:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%esi, %r12d
	movl	%r9d, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	movq	%r8, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	%rdx, 24(%rsp)
	movl	%ecx, 20(%rsp)
	movl	%r9d, 16(%rsp)
	movq	%r8, 8(%rsp)
	call	_Z11assertOrderPii
	movq	24(%rsp), %rdx
	movl	%r12d, %esi
	movq	%rbp, %rdi
	movl	16(%rsp), %r9d
	movq	8(%rsp), %r8
	movl	%eax, %ebx
	movl	20(%rsp), %ecx
	call	_Z27assertMergeAllValuesPresentPiiS_iS_i
	testl	%ebx, %ebx
	setne	%dl
	testl	%eax, %eax
	setne	%al
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movzbl	%al, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	andl	%edx, %eax
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3647:
	.size	_Z11assertMergePiiS_iS_i, .-_Z11assertMergePiiS_iS_i
	.section	.rodata.str1.1
.LC7:
	.string	"Unsuccessful merge on array %d !\n"
.LC8:
	.string	"Successful merge !\n"
	.text
	.globl	_Z13assertMerge2DPPiS0_S0_P4int2i
	.type	_Z13assertMerge2DPPiS0_S0_P4int2i, @function
_Z13assertMerge2DPPiS0_S0_P4int2i:
.LFB3648:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	%r8d, 12(%rsp)
.L121:
	cmpl	%ebx, 12(%rsp)
	jle	.L126
	movl	(%r12,%rbx,8), %esi
	movl	4(%r12,%rbx,8), %ecx
	movq	(%r15,%rbx,8), %rdx
	movq	(%r14,%rbx,8), %rdi
	movq	0(%r13,%rbx,8), %r8
	leal	(%rsi,%rcx), %r9d
	call	_Z11assertMergePiiS_iS_i
	movl	%eax, %ebp
	leaq	1(%rbx), %rax
	testl	%ebp, %ebp
	jne	.L124
	movl	%ebx, %edx
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L120
.L124:
	movq	%rax, %rbx
	jmp	.L121
.L126:
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movl	$1, %ebp
	call	__printf_chk@PLT
.L120:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	movl	%ebp, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3648:
	.size	_Z13assertMerge2DPPiS0_S0_P4int2i, .-_Z13assertMerge2DPPiS0_S0_P4int2i
	.globl	_Z52__device_stub__Z17mergeSmallBatch_kPiS_S_iiP4int2S1_PiS_S_iiP4int2S1_
	.type	_Z52__device_stub__Z17mergeSmallBatch_kPiS_S_iiP4int2S1_PiS_S_iiP4int2S1_, @function
_Z52__device_stub__Z17mergeSmallBatch_kPiS_S_iiP4int2S1_PiS_S_iiP4int2S1_:
.LFB3674:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L127
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L127:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L129
	call	__stack_chk_fail@PLT
.L129:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3674:
	.size	_Z52__device_stub__Z17mergeSmallBatch_kPiS_S_iiP4int2S1_PiS_S_iiP4int2S1_, .-_Z52__device_stub__Z17mergeSmallBatch_kPiS_S_iiP4int2S1_PiS_S_iiP4int2S1_
	.globl	_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_
	.type	_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_, @function
_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_:
.LFB3675:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z17mergeSmallBatch_kPiS_S_iiP4int2S1_PiS_S_iiP4int2S1_
	.cfi_endproc
.LFE3675:
	.size	_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_, .-_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_
	.section	.rodata.str1.1
.LC9:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/homerdurand/HPCA/main/batchMerge.cu"
.LC11:
	.string	"======== batch merge =======\n"
.LC12:
	.string	"* Number of batches : %d\n* Sizes of batches : %d\n"
.LC13:
	.string	"\n========= Sequential merge : =============\n"
.LC14:
	.string	"Total time elapsed : %f s\n"
.LC15:
	.string	"\n"
.LC16:
	.string	"========= Parallel merge : =============\n"
.LC17:
	.string	"Time running algorithm : %f s\n"
.LC18:
	.string	"Time to copy Host to Device : %f s\n"
.LC19:
	.string	"Time to copy Device to Host : %f s\n"
.LC20:
	.string	"Parrallel algorithm is %f times faster than sequential merge !\n"
.LC21:
	.string	"Parrallel merge is %f times faster than sequential merge !\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3649:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	xorl	%edi, %edi
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	cmpl	$3, %ebx
	jne	.L140
	movq	8(%rbp), %rdi
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movl	%eax, %r12d
	jmp	.L133
.L140:
	movl	$4, %r12d
	movl	$1000, %ebx
.L133:
	movslq	%ebx, %rax
	xorl	%ebp, %ebp
	salq	$3, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	%rax, %r15
	movslq	%r12d, %rax
	salq	$2, %rax
	movq	%rax, 88(%rsp)
.L134:
	cmpl	%ebp, %ebx
	jle	.L142
	movq	88(%rsp), %rdi
	call	malloc@PLT
	movq	%rax, (%r15,%rbp,8)
	incq	%rbp
	jmp	.L134
.L142:
	movq	(%rsp), %rdi
	movl	%ebx, %r14d
	imull	%r12d, %r14d
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	16(%rsp), %rsi
	movl	%r12d, %ecx
	movq	%rbp, %r8
	movq	8(%rsp), %rdi
	movl	%ebx, %edx
	movq	%rax, 48(%rsp)
	call	_Z15init_list_arrayPPiS0_iiP4int2
	movq	48(%rsp), %rdi
	movl	%ebx, %edx
	movq	%rbp, %rsi
	call	_Z13indices_arrayP4int2S0_i
	movl	%ebx, %esi
	movq	%rbp, %rdi
	call	_Z14get_totalSizesP4int2i
	movq	%rax, %r13
	cltq
	salq	$2, %rax
	sarq	$32, %r13
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	%rax, 56(%rsp)
	leaq	0(,%r13,4), %rax
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
	call	malloc@PLT
	movq	%rax, 64(%rsp)
	movslq	%r14d, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 40(%rsp)
	call	malloc@PLT
	movl	%r12d, %r9d
	movl	%ebx, %r8d
	movq	%rax, 72(%rsp)
	pushq	%rsi
	.cfi_def_cfa_offset 248
	pushq	%rbp
	.cfi_def_cfa_offset 256
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdi
	call	_Z11flat_arraysPiS_PS_S0_iiP4int2
	popq	%rdi
	.cfi_def_cfa_offset 248
	popq	%r8
	.cfi_def_cfa_offset 240
	movq	40(%rsp), %rsi
	leaq	120(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$453, %edx
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	24(%rsp), %rsi
	leaq	104(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$454, %edx
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	32(%rsp), %rsi
	leaq	112(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$455, %edx
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rsi
	leaq	128(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$456, %edx
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rsi
	leaq	136(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$457, %edx
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	clock@PLT
	movq	24(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$1, %ecx
	movq	104(%rsp), %rdi
	movq	%rax, %r13
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$461, %edx
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	32(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$1, %ecx
	movq	112(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$462, %edx
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movq	%rbp, %rsi
	movq	128(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$463, %edx
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	$1, %ecx
	movq	136(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$464, %edx
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	clock@PLT
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	subq	%r13, %rax
	cvtsi2ssq	%rax, %xmm0
	xorl	%eax, %eax
	divss	.LC10(%rip), %xmm0
	movss	%xmm0, 32(%rsp)
	call	__printf_chk@PLT
	movl	%r12d, %ecx
	movl	%ebx, %edx
	movl	$2, %edi
	leaq	.LC12(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	clock@PLT
	movl	$1024, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, %r13
	movl	%r14d, %eax
	cltd
	idivl	%ecx
	movl	$4194305, %edx
	movl	$1, %ecx
	salq	$10, %rdx
	incl	%eax
	movl	%eax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 148(%rsp)
	movq	144(%rsp), %rdi
	movl	152(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L136
	pushq	%rax
	.cfi_def_cfa_offset 248
	movl	%r12d, %ecx
	movl	%ebx, %r8d
	pushq	136(%rsp)
	.cfi_def_cfa_offset 256
	movq	152(%rsp), %r9
	movq	136(%rsp), %rdx
	movq	128(%rsp), %rsi
	movq	120(%rsp), %rdi
	call	_Z52__device_stub__Z17mergeSmallBatch_kPiS_S_iiP4int2S1_PiS_S_iiP4int2S1_
	popq	%rdx
	.cfi_def_cfa_offset 248
	popq	%rcx
	.cfi_def_cfa_offset 240
.L136:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$473, %edx
	leaq	.LC9(%rip), %r14
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movq	%r14, %rsi
	movl	$1, %ecx
	movl	$474, %edx
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	clock@PLT
	subq	%r13, %rax
	cvtsi2ssq	%rax, %xmm0
	divss	.LC10(%rip), %xmm0
	movss	%xmm0, 24(%rsp)
	call	clock@PLT
	movq	40(%rsp), %rdx
	movq	120(%rsp), %rsi
	movl	$2, %ecx
	movq	72(%rsp), %rdi
	movq	%rax, %r13
	call	cudaMemcpy@PLT
	movq	%r14, %rsi
	movl	$1, %ecx
	xorl	%r14d, %r14d
	movl	%eax, %edi
	movl	$478, %edx
	call	_Z9gpuAssert9cudaErrorPKcib
	call	clock@PLT
	subq	%r13, %rax
	cvtsi2ssq	%rax, %xmm0
	divss	.LC10(%rip), %xmm0
	movss	%xmm0, 40(%rsp)
	call	clock@PLT
	movq	16(%rsp), %rsi
	movq	%rbp, %r9
	movl	%r12d, %r8d
	movq	8(%rsp), %rdi
	movl	%ebx, %ecx
	movq	%r15, %rdx
	movq	%rax, %r13
	call	_Z13mergeSeqBatchPPiS0_S0_iiP4int2
	call	clock@PLT
	movq	(%rsp), %rdi
	subq	%r13, %rax
	cvtsi2ssq	%rax, %xmm0
	divss	.LC10(%rip), %xmm0
	movss	%xmm0, 84(%rsp)
	call	malloc@PLT
	movq	%rax, %r13
.L137:
	cmpl	%r14d, %ebx
	jle	.L143
	movq	88(%rsp), %rdi
	call	malloc@PLT
	movq	%rax, 0(%r13,%r14,8)
	incq	%r14
	jmp	.L137
.L143:
	movq	72(%rsp), %rsi
	movl	%r12d, %ecx
	movl	%ebx, %edx
	movq	%r13, %rdi
	leaq	.LC14(%rip), %r12
	call	_Z13unflat_arraysPPiS_ii
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r12, %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	84(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	%ebx, %r8d
	movq	%rbp, %rcx
	movq	%r15, %rdx
	call	_Z13assertMerge2DPPiS0_S0_P4int2i
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movss	24(%rsp), %xmm0
	movq	%r12, %rsi
	movb	$1, %al
	addss	40(%rsp), %xmm0
	addss	32(%rsp), %xmm0
	movl	$2, %edi
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	leaq	.LC17(%rip), %rsi
	movb	$1, %al
	cvtss2sd	24(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	32(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC19(%rip), %rsi
	cvtss2sd	40(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	16(%rsp), %rsi
	movl	%ebx, %r8d
	movq	%rbp, %rcx
	movq	8(%rsp), %rdi
	movq	%r13, %rdx
	leaq	.LC9(%rip), %rbx
	call	_Z13assertMerge2DPPiS0_S0_P4int2i
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	84(%rsp), %xmm0
	divss	24(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movss	32(%rsp), %xmm1
	addss	24(%rsp), %xmm1
	movb	$1, %al
	addss	40(%rsp), %xmm1
	movss	84(%rsp), %xmm0
	movl	$2, %edi
	leaq	.LC21(%rip), %rsi
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$518, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$519, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$520, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$521, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$522, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	72(%rsp), %rdi
	call	free@PLT
	movq	56(%rsp), %rdi
	call	free@PLT
	movq	64(%rsp), %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	48(%rsp), %rdi
	call	free@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L139
	call	__stack_chk_fail@PLT
.L139:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3649:
	.size	main, .-main
	.section	.rodata.str1.1
.LC22:
	.string	"_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3677:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC22(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z17mergeSmallBatch_kPiS_S_iiP4int2S1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3677:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC10:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
    Giving a large number of arrays {A_i}1<=i<=N and
    {B_i}1<=i<=N with |A_i| + |B_i| = d < 1024, merges
    arrays twos by two and return a list of arrays {M_i}1<=i<=N

    @file batchMerge.cu
    @author Dang Vu Laurent Durand Homer
    @version 1.0 14/12/20
*/


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <ctime>
#include <string>
#include <iostream>
#include <stdlib.h>


/**
    Verify cuda calls and return cuda error if any
*/
#define gpuCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
   if (code != hipSuccess)
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}


/**
    Initialise ascendant array with random values
    @param array : the array to fill with random ascendant values
          size : Size of the arrays
          adder : Each x_i is higher than x_i-1 of a random value between 0 and adder
*/
void init_array(int* array, int size, int const adder=10)
{
  if (size >=1)
  {
    array[0] = rand()%adder;
    if (size >=2)
    {
      for(int i = 1; i < size;i++)
      {
          array[i] = array[i-1] + rand()%adder;
      }
    }
  }
}

/**
    Initialise two lists of ascendant arrays A and B with random values
    @param A : the first list of arrays to fill with random ascendant values
           B : the Second list of arrays to fill with random ascendant values
          sizes : Sizes of each subarrays
          d : for all 1<=i<=N, |A_i| + |B_i| = d
          N : number of subarrays in A and B
*/
void init_list_array(int **A, int **B, int N, int d, int2 *sizes)
{
    int sizeAi, sizeBi;
    for (int i = 0; i < N; i++)
    {
      //Initialiser les tailles de Ai et Bi
      sizeAi = rand()%d;
      sizeBi = d - sizeAi;

      //Stocker les tailles dans sizes
      sizes[i].x = sizeAi;
      sizes[i].y = sizeBi;

      //Allocation A et B
      A[i] = (int*)malloc(sizes[i].x*sizeof(int));
      B[i] = (int*)malloc(sizes[i].y*sizeof(int));

      //Initialisation A et B
      init_array(A[i], sizes[i].x);
      init_array(B[i], sizes[i].y);
    }
}

/**
    Return first indices of each arrays wich have their sizes in sizes for A and B as flat arrays
    @param indices : INdices of first element of each subarrays in A and B
           sizes : Sizes of each subarrays in A and B
           N : number of subarrays in A and B
*/
void indices_array(int2 *indices, int2 *sizes, int N)
{
  indices[0].x=0;
  indices[0].y=0;
  for (int i = 1; i < N; i++)
  {
    indices[i].x = indices[i-1].x+sizes[i-1].x;
    indices[i].y = indices[i-1].y+sizes[i-1].y;

  }
}

/**
    Return total sizes of A and B with A and B as flat arrays
    @param sizes : Sizes of each subarrays in A and B
           N : number of subarrays in A and B
*/
int2 get_totalSizes(int2 *sizes, int N)
{
  int2 totalSizes;
  totalSizes.x = 0;
  totalSizes.y = 0;
  for (int i = 0; i < N; i++)
  {
    totalSizes.x = totalSizes.x + sizes[i].x;
    totalSizes.y = totalSizes.y + sizes[i].y;
  }
  return totalSizes;
}


/**
    Return flat arrays of  A and B
    @param flatA : flat version of A
           flat B : flat version of B
           A : 2D array of int
           B : 2D array of int2
           N : Number of subarrays in A and B
           d : |A_i| + |B_i| = d
           sizes : sizes of subarrays in A and B
*/
void flat_arrays(int *flatA, int *flatB, int **A, int **B, int N, int d, int2 *sizes)
{
  int ia = 0;
  int ib = 0;
  for (int i = 0; i < N; i++)
  {

    for (int j = 0; j < sizes[i].x; j++)
    {
      flatA[ia] = A[i][j];
      ia = ia +1;
    }
    for (int j = 0; j < sizes[i].y; j++)
    {
      flatB[ib] = B[i][j];
      ib = ib +1;
    }
  }
}

/**
    Return 2D version of a flat array with N subarrays of sizes d
    @param unFlatM : unFLatversion of M
           flatM : flat version of M
           N : Number of subarrays in M
           d : Sizes of subarrays
*/
void unflat_arrays(int **unFlatM, int *flatM, int N, int d)
{
  for (int i = 0; i < N; i++)
  {
    for (int j = 0; j < d; j++)
    {
      unFlatM[i][j] = flatM[i*d + j];
    }
  }
}

/**
    Print an array of size size
    @param a : array to print
           size : size of arrays
*/
void print_array(int* a, int size)
{
    printf("[");
    for(int i = 0; i < size;i++)
    {
        //printf("i = %d | v = %d " ,i, a[i]);
        printf("%d " ,a[i]);
    }
    printf("]\n");
}

/**
    Sequential version of merge
    @param a_k, b_k : array to merge
           m_k : merge of a and b
           n_a, n_b, n_b : respective sizes of a_k, b_k, m_k
*/
void mergeSeq(int *a_k, int *b_k, int *m_k, int n_a, int n_b, int n_m)
{
  int i, j;
  i=0;
  j=0;
  while(i+j < n_m)
  {
    if (i>= n_a)
    {
      m_k[i+j]=b_k[j];
      j++;
    }
    else if (j>= n_b || a_k[i] < b_k[j])
    {
      m_k[i+j]=a_k[i];
      i++;
    }
    else
    {
      m_k[i+j]=b_k[j];
      j++;
    }
  }
}

void mergeSeqBatch(int **a, int **b, int **m, int N, int d, int2 *sizes)
{
  for (int i = 0; i < N; i++)
  {
    mergeSeq(a[i], b[i], m[i], sizes[i].x, sizes[i].y, d);
  }
}

/**
    Globall version of parallel merge of {A_i} and {B_i} in {M_i} with |M|<1024
    @param aGPU : flat version of arrays {A_i} in device
           bGPU : flat version of array {B_i } in device
           mGPU : flat version of array {M_i} in device
           d : |A| + |B| = |M| = d
           N : number of subarrays in A and B
           indices : indices of the start of each subarrays in A and B
           sizes : sizes of each subarrays in A and B
*/
__global__ void mergeSmallBatch_k(int* aGPU, int* bGPU, int* mGPU, int d, int N, int2 *indices, int2 *sizes)
{
    int tidx = threadIdx.x%d; // The indice of the thread in the "new" blocks of size d
    int Qt = (threadIdx.x-tidx)/d;
    int gbx = Qt + blockIdx.x*(blockDim.x/d); // The indice of "new" blocks of size d
    int i = gbx*d + tidx; // The global indice of the thread
    if(i < N*d)
    {
        int2 K;
        int2 P;
        int2 Q;
        if(tidx > sizes[gbx].x)
        {
            K.x = tidx - sizes[gbx].x;
            K.y = sizes[gbx].x;
            P.x = sizes[gbx].x;
            P.y = tidx - sizes[gbx].x;
        }
        else
        {
            K.x = 0;
            K.y = tidx;
            P.x = tidx;
            P.y = 0;
        }

        int offset = 0;
        while(1)
        {
            offset = abs(K.y - P.y)/2;
            Q.x = K.x + offset;
            Q.y = K.y - offset;
            if(Q.y >= 0 && Q.x <= sizes[gbx].y && (Q.y == sizes[gbx].x || Q.x == 0 || aGPU[indices[gbx].x + Q.y] > bGPU[indices[gbx].y + Q.x - 1]))
            {
                if(Q.x == sizes[gbx].y || Q.y == 0 || aGPU[indices[gbx].x + Q.y - 1] <= bGPU[indices[gbx].y + Q.x])
                {
                    if(Q.y < sizes[gbx].x && (Q.x == sizes[gbx].y || aGPU[indices[gbx].x + Q.y] <= bGPU[indices[gbx].y + Q.x]))
                    {
                        mGPU[i] = aGPU[indices[gbx].x + Q.y];
                    }
                    else
                    {
                        mGPU[i] = bGPU[indices[gbx].y + Q.x];
                    }
                    break;
                }
                else
                {
                    K.x = Q.x + 1;
                    K.y = Q.y - 1;
                }
            }
            else
            {
              P.x = Q.x - 1;
              P.y = Q.y + 1;

            }

        }
    }
}

/**
    verify that each tab_i < tab_i+1 in tab
    @param tab : array
    @return : 0 any tab_i > tab_i+1, either 1
*/
int assertOrder(int *tab, int size){
  for (int i=0; i<size-1; i++){
    if (tab[i] > tab[i+1]){
      printf("WARNING : Unsuccessful merge or sort ... : unordered array on indice %d ...\n", i);
      printf("tab[i]= %d > tab[i+1] = %d\n", tab[i], tab[i+1]);
      return 0;
    }
  }
  return 1;
}

/**
    verify that each element of tab is in tab_2
    @param tab : first array
            n1 : size of tab
            tab2 : second array
            n2 : size of tab2

    @return : 0 any tab_i > tab_i+1, either 1
*/
int assertMergeAllValuesPresent(int *tab, int n1, int *tab2, int n2, int* m, int size)
{
  int verif[size]; //tableau avec des 1 là où l'on a déjà vérifié qu'il correspond déjà à un élément de a ou de b
  for(int i = 0;i<size;i++){
      verif[i] = 0;
  }

  for (int i=0; i<size; i++){
    for(int j = 0;j < n1;j++){
      if(tab[j] == m[i] && verif[i] == 0){ //si il y a une valeur identique et que celle-ci n'a pas été vérifiée
          verif[i] = 1;
      }
    }
  }
  for (int i=0; i<size; i++){
    for(int j = 0;j < n2;j++){
      if(tab2[j] == m[i] && verif[i] == 0){
          verif[i] = 1;
      }
    }
  }

  for(int i = 0;i<size;i++){
    if(verif[i] != 1){
        printf("\nWARNING : Unsuccessful merge : incorrect elements...\n");
        return 0;
    }
  }

  return 1;
}


/**
    verify that m is sortes and that it merges tab and tab2
    @param tab et tab2 : les deux tableaux qu'on veut fusionner
            m : le tableau qui est la fusion triée de tab et tab2

    @return : 0 any error, either 1
*/
int assertMerge(int *tab, int n1, int *tab2, int n2, int* m, int size){
    int successfulOrder = assertOrder(m, size);
    int successfulElements = assertMergeAllValuesPresent(tab, n1, tab2, n2, m, size);
    //assertMergeAllValuesPresent(int *tab, int n1, int *tab2, int n2, int* m, int size)
    if(successfulOrder && successfulElements){
        // printf("\nSuccessful merge !\n");
        return 1;
    }
    else{
        // printf("\nUnsuccessful merge !\n");
        return 0;
    }
}


/**
    verify that a list of arrays {M_i}1<=i<=N have correctly merge {A_i} and {B_i}
    @param A : First list of arrays to merge
           B : Second list of arrays to merge
           M : Merge of A and B
           sizes : sizes of subarrays A_i and B_i
           N : number of subarrays in A and B
    @return : 0 any error, either 1
*/
int assertMerge2D(int **A, int **B, int **M, int2 *sizes, int N)
{
  for (int i = 0; i < N; i++)
  {
    if (assertMerge(A[i], sizes[i].x, B[i], sizes[i].y, M[i], sizes[i].x + sizes[i].y) == 0)
    {
      printf("Unsuccessful merge on array %d !\n", i);
      return 0;
    }
  }
  printf("Successful merge !\n");
  return 1;
}


/**
    Merge 2 lists of arrays {A_i} and {B_i} in {M_i}1<=i<=N
    @param argv[1] : number of subarrays in A and B
           argv[2] : size of |A_i| + |B_i|
*/
int main(int argc, char *argv[])
{
    std::clock_t startS, endS;
    float seqMergeTime, parMergeTime, DoH, HoD;

    srand(time(NULL));
    int **A, **B, **unFlatM, **M;
    int *flatM, *flatA, *flatB, *aGPU, *bGPU, *mGPU;
    int N, d;
    int2 *sizes, *indices, *sizesGPU, *indicesGPU;
    int2 totalSizes;

    if(argc== 3)
    {
      N = atoi(argv[1]);
      d = atoi(argv[2]);
    }
    else
    {
      N= 1000;
      d = 4;
    }



    A = (int**)malloc(N*sizeof(int*));
    B = (int**)malloc(N*sizeof(int*));
    M = (int**)malloc(N*sizeof(int*));
    for (int i = 0; i < N; i++)
    {
      M[i] = (int*)malloc(d*sizeof(int));
    }
    sizes = (int2*)malloc(N*sizeof(int2)); // Sizes of each subarrays in A and B
    indices = (int2*)malloc(N*sizeof(int2)); // First indices of each subarrays in flat version of A and B
    init_list_array(A, B, N, d, sizes);
    indices_array(indices, sizes, N);
    totalSizes = get_totalSizes(sizes, N);

    //Flat versions of A, B and M to give to devices
    flatA = (int*)malloc(totalSizes.x*sizeof(int));
    flatB = (int*)malloc(totalSizes.y*sizeof(int));
    flatM = (int*)malloc(N*d*sizeof(int));
    flat_arrays(flatA, flatB, A, B, N, d, sizes); //Falt A and B to give them to devices

    //Allocation of devies objects
    gpuCheck(hipMalloc(&mGPU, N*d*sizeof(int)));
    gpuCheck(hipMalloc(&aGPU, totalSizes.x*sizeof(int)));
    gpuCheck(hipMalloc(&bGPU, totalSizes.y*sizeof(int)));
    gpuCheck(hipMalloc(&sizesGPU, N*sizeof(int2)));
    gpuCheck(hipMalloc(&indicesGPU, N*sizeof(int2)));

    //Copy host to device of arrays to merge, with their respective sizes and indices
    startS = std::clock();
    gpuCheck( hipMemcpy(aGPU, flatA, totalSizes.x*sizeof(int), hipMemcpyHostToDevice) );
    gpuCheck( hipMemcpy(bGPU, flatB, totalSizes.y*sizeof(int), hipMemcpyHostToDevice) );
    gpuCheck( hipMemcpy(sizesGPU, sizes, N*sizeof(int2), hipMemcpyHostToDevice) );
    gpuCheck( hipMemcpy(indicesGPU, indices, N*sizeof(int2), hipMemcpyHostToDevice) );
    endS = std::clock();
    HoD = (endS - startS) / (float) CLOCKS_PER_SEC;

    //Merge of batches parallel
    printf("======== batch merge =======\n");
    printf("* Number of batches : %d\n* Sizes of batches : %d\n", N, d);
    startS = std::clock();
    mergeSmallBatch_k<<<N*d/1024+1, d*1024/d>>>(aGPU, bGPU, mGPU, d, N, indicesGPU, sizesGPU);
    gpuCheck(hipPeekAtLastError());
    gpuCheck( hipDeviceSynchronize() );
    endS = std::clock();
    parMergeTime = (endS - startS) / (float) CLOCKS_PER_SEC;
    startS = std::clock();
    gpuCheck( hipMemcpy(flatM, mGPU, N*d*sizeof(int), hipMemcpyDeviceToHost) );
    endS = std::clock();
    DoH = (endS - startS) / (float) CLOCKS_PER_SEC;

    //Merge of batches parallel
    startS = std::clock();
    mergeSeqBatch(A, B, M, N, d, sizes);
    endS = std::clock();
    seqMergeTime = (endS - startS) / (float) CLOCKS_PER_SEC;

    //Allocation unFlat version of M
    unFlatM = (int**)malloc(N*sizeof(int*));
    for (int i = 0; i < N; i++)
    {
      unFlatM[i] = (int*)malloc(d*sizeof(int));
    }

    //unflat M
    unflat_arrays(unFlatM, flatM, N, d);

    //Verify that M is correctly merge


    printf("\n========= Sequential merge : =============\n");
    printf("Total time elapsed : %f s\n", seqMergeTime);
    assertMerge2D(A, B, M, sizes, N);
    printf("\n");

    printf("========= Parallel merge : =============\n");
    printf("Total time elapsed : %f s\n", parMergeTime+DoH+HoD);
    printf("Time running algorithm : %f s\n", parMergeTime);
    printf("Time to copy Host to Device : %f s\n", HoD);
    printf("Time to copy Device to Host : %f s\n", DoH);
    assertMerge2D(A, B, unFlatM, sizes, N);
    printf("Parrallel algorithm is %f times faster than sequential merge !\n", seqMergeTime/parMergeTime);
    printf("Parrallel merge is %f times faster than sequential merge !\n", seqMergeTime/(parMergeTime+HoD+DoH));



    //Free device mermory
    gpuCheck(hipFree(aGPU));
    gpuCheck(hipFree(bGPU));
    gpuCheck(hipFree(mGPU));
    gpuCheck(hipFree(indicesGPU));
    gpuCheck(hipFree(sizesGPU));

    //Free host memory
    free(A);
    free(B);
    free(unFlatM);
    free(flatM);
    free(flatA);
    free(flatB);
    free(sizes);
    free(indices);


    return 0;
}

	.text
	.file	"batchMerge.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z10init_arrayPiii              # -- Begin function _Z10init_arrayPiii
	.type	_Z10init_arrayPiii,@function
_Z10init_arrayPiii:                     # @_Z10init_arrayPiii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_5
# %bb.1:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %ebp
	movq	%rdi, %r14
	callq	rand
	cltd
	idivl	%ebx
	movl	%edx, (%r14)
	cmpl	$1, %ebp
	je	.LBB0_4
# %bb.2:                                # %.lr.ph.preheader
	movl	%ebp, %r15d
	movl	$1, %r12d
.LBB0_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	-4(%r14,%r12,4), %ebp
	callq	rand
	cltd
	idivl	%ebx
	addl	%ebp, %edx
	movl	%edx, (%r14,%r12,4)
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB0_3
.LBB0_4:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB0_5:                                # %.loopexit
	retq
.Lfunc_end0:
	.size	_Z10init_arrayPiii, .Lfunc_end0-_Z10init_arrayPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z15init_list_arrayPPiS0_iiP15HIP_vector_typeIiLj2EE # -- Begin function _Z15init_list_arrayPPiS0_iiP15HIP_vector_typeIiLj2EE
	.type	_Z15init_list_arrayPPiS0_iiP15HIP_vector_typeIiLj2EE,@function
_Z15init_list_arrayPPiS0_iiP15HIP_vector_typeIiLj2EE: # @_Z15init_list_arrayPPiS0_iiP15HIP_vector_typeIiLj2EE
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %rbx
	movl	%ecx, %ebp
	movq	%rsi, %r14
	movq	%rdi, %r15
	movl	%edx, %r12d
	xorl	%r13d, %r13d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltd
	idivl	%ebp
	movl	%ebp, %eax
	subl	%edx, %eax
	movl	%edx, (%rbx,%r13,8)
	movl	%eax, 4(%rbx,%r13,8)
	movslq	%edx, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, (%r15,%r13,8)
	movslq	4(%rbx,%r13,8), %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, (%r14,%r13,8)
	movq	(%r15,%r13,8), %rdi
	movl	(%rbx,%r13,8), %esi
	movl	$10, %edx
	callq	_Z10init_arrayPiii
	movq	(%r14,%r13,8), %rdi
	movl	4(%rbx,%r13,8), %esi
	movl	$10, %edx
	callq	_Z10init_arrayPiii
	incq	%r13
	cmpq	%r13, %r12
	jne	.LBB1_2
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB1_4:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z15init_list_arrayPPiS0_iiP15HIP_vector_typeIiLj2EE, .Lfunc_end1-_Z15init_list_arrayPPiS0_iiP15HIP_vector_typeIiLj2EE
	.cfi_endproc
                                        # -- End function
	.globl	_Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i # -- Begin function _Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i
	.type	_Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i,@function
_Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i: # @_Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i
	.cfi_startproc
# %bb.0:
	movq	$0, (%rdi)
	cmpl	$2, %edx
	jl	.LBB2_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %eax
	decq	%rax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	xorl	%r8d, %r8d
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	addl	(%rsi,%rcx,8), %r8d
	movl	%r8d, 8(%rdi,%rcx,8)
	addl	4(%rsi,%rcx,8), %edx
	movl	%edx, 12(%rdi,%rcx,8)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB2_2
.LBB2_3:                                # %._crit_edge
	retq
.Lfunc_end2:
	.size	_Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i, .Lfunc_end2-_Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z14get_totalSizesP15HIP_vector_typeIiLj2EEi # -- Begin function _Z14get_totalSizesP15HIP_vector_typeIiLj2EEi
	.type	_Z14get_totalSizesP15HIP_vector_typeIiLj2EEi,@function
_Z14get_totalSizesP15HIP_vector_typeIiLj2EEi: # @_Z14get_totalSizesP15HIP_vector_typeIiLj2EEi
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
	testl	%esi, %esi
	jle	.LBB3_4
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %ecx
	xorl	%esi, %esi
	xorl	%edx, %edx
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	addl	(%rdi,%rsi,8), %edx
	addl	4(%rdi,%rsi,8), %eax
	incq	%rsi
	cmpq	%rsi, %rcx
	jne	.LBB3_2
# %bb.3:                                # %._crit_edge.loopexit
	shlq	$32, %rax
	movl	%edx, %ecx
	orq	%rcx, %rax
.LBB3_4:                                # %._crit_edge
	retq
.Lfunc_end3:
	.size	_Z14get_totalSizesP15HIP_vector_typeIiLj2EEi, .Lfunc_end3-_Z14get_totalSizesP15HIP_vector_typeIiLj2EEi
	.cfi_endproc
                                        # -- End function
	.globl	_Z11flat_arraysPiS_PS_S0_iiP15HIP_vector_typeIiLj2EE # -- Begin function _Z11flat_arraysPiS_PS_S0_iiP15HIP_vector_typeIiLj2EE
	.type	_Z11flat_arraysPiS_PS_S0_iiP15HIP_vector_typeIiLj2EE,@function
_Z11flat_arraysPiS_PS_S0_iiP15HIP_vector_typeIiLj2EE: # @_Z11flat_arraysPiS_PS_S0_iiP15HIP_vector_typeIiLj2EE
	.cfi_startproc
# %bb.0:
	testl	%r8d, %r8d
	jle	.LBB4_12
# %bb.1:                                # %.preheader27.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	48(%rsp), %rax
	movl	%r8d, %r8d
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
	xorl	%r11d, %r11d
.LBB4_2:                                # %.preheader27
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
                                        #     Child Loop BB4_8 Depth 2
	cmpl	$0, (%rax,%r9,8)
	jle	.LBB4_6
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB4_2 Depth=1
	movq	(%rdx,%r9,8), %rbx
	movslq	%r11d, %r14
	leaq	(%rdi,%r14,4), %r15
	xorl	%r14d, %r14d
.LBB4_4:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r14,4), %ebp
	movl	%ebp, (%r15,%r14,4)
	incq	%r14
	movslq	(%rax,%r9,8), %r12
	cmpq	%r12, %r14
	jl	.LBB4_4
# %bb.5:                                # %.preheader.loopexit
                                        #   in Loop: Header=BB4_2 Depth=1
	addl	%r14d, %r11d
.LBB4_6:                                # %.preheader
                                        #   in Loop: Header=BB4_2 Depth=1
	cmpl	$0, 4(%rax,%r9,8)
	jle	.LBB4_10
# %bb.7:                                # %.lr.ph36
                                        #   in Loop: Header=BB4_2 Depth=1
	movq	(%rcx,%r9,8), %rbx
	movslq	%r10d, %r14
	leaq	(%rsi,%r14,4), %r15
	xorl	%r14d, %r14d
.LBB4_8:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r14,4), %ebp
	movl	%ebp, (%r15,%r14,4)
	incq	%r14
	movslq	4(%rax,%r9,8), %r12
	cmpq	%r12, %r14
	jl	.LBB4_8
# %bb.9:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB4_2 Depth=1
	addl	%r14d, %r10d
.LBB4_10:                               # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	incq	%r9
	cmpq	%r8, %r9
	jne	.LBB4_2
# %bb.11:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB4_12:                               # %._crit_edge41
	retq
.Lfunc_end4:
	.size	_Z11flat_arraysPiS_PS_S0_iiP15HIP_vector_typeIiLj2EE, .Lfunc_end4-_Z11flat_arraysPiS_PS_S0_iiP15HIP_vector_typeIiLj2EE
	.cfi_endproc
                                        # -- End function
	.globl	_Z13unflat_arraysPPiS_ii        # -- Begin function _Z13unflat_arraysPPiS_ii
	.type	_Z13unflat_arraysPPiS_ii,@function
_Z13unflat_arraysPPiS_ii:               # @_Z13unflat_arraysPPiS_ii
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB5_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	movl	%edx, %eax
	movl	%ecx, %edx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
.LBB5_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_4 Depth 2
	testl	%ecx, %ecx
	jle	.LBB5_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB5_2 Depth=1
	movl	%r8d, %r10d
	leaq	(%rsi,%r10,4), %r10
	movq	(%rdi,%r9,8), %r11
	xorl	%ebx, %ebx
.LBB5_4:                                #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r10,%rbx,4), %ebp
	movl	%ebp, (%r11,%rbx,4)
	incq	%rbx
	cmpq	%rbx, %rdx
	jne	.LBB5_4
.LBB5_5:                                # %._crit_edge
                                        #   in Loop: Header=BB5_2 Depth=1
	incq	%r9
	addl	%ecx, %r8d
	cmpq	%rax, %r9
	jne	.LBB5_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %rbp
.LBB5_7:                                # %._crit_edge16
	retq
.Lfunc_end5:
	.size	_Z13unflat_arraysPPiS_ii, .Lfunc_end5-_Z13unflat_arraysPPiS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11print_arrayPii              # -- Begin function _Z11print_arrayPii
	.type	_Z11print_arrayPii,@function
_Z11print_arrayPii:                     # @_Z11print_arrayPii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movl	$91, %edi
	callq	putchar@PLT
	testl	%ebp, %ebp
	jle	.LBB6_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r14d
	xorl	%r15d, %r15d
.LBB6_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB6_2
.LBB6_3:                                # %._crit_edge
	movl	$.Lstr, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end6:
	.size	_Z11print_arrayPii, .Lfunc_end6-_Z11print_arrayPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z8mergeSeqPiS_S_iii            # -- Begin function _Z8mergeSeqPiS_S_iii
	.type	_Z8mergeSeqPiS_S_iii,@function
_Z8mergeSeqPiS_S_iii:                   # @_Z8mergeSeqPiS_S_iii
	.cfi_startproc
# %bb.0:
	testl	%r9d, %r9d
	jle	.LBB7_11
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	xorl	%r11d, %r11d
	xorl	%eax, %eax
	xorl	%r10d, %r10d
.LBB7_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	cmpl	%ecx, %r10d
	jge	.LBB7_3
# %bb.4:                                #   in Loop: Header=BB7_2 Depth=1
	movslq	%r10d, %rbx
	movl	(%rdi,%rbx,4), %ebx
	cmpl	%r8d, %eax
	jge	.LBB7_6
# %bb.5:                                #   in Loop: Header=BB7_2 Depth=1
	movslq	%eax, %r14
	movl	(%rsi,%r14,4), %ebp
	cmpl	%ebp, %ebx
	jge	.LBB7_7
.LBB7_6:                                # %._crit_edge35
                                        #   in Loop: Header=BB7_2 Depth=1
	movslq	%r11d, %r11
	movl	%ebx, (%rdx,%r11,4)
	incl	%r10d
	jmp	.LBB7_9
.LBB7_3:                                #   in Loop: Header=BB7_2 Depth=1
	cltq
	movl	(%rsi,%rax,4), %ebx
	movslq	%r11d, %r11
	movl	%ebx, (%rdx,%r11,4)
.LBB7_8:                                #   in Loop: Header=BB7_2 Depth=1
	incl	%eax
.LBB7_9:                                #   in Loop: Header=BB7_2 Depth=1
	leal	(%rax,%r10), %r11d
	cmpl	%r9d, %r11d
	jl	.LBB7_2
	jmp	.LBB7_10
.LBB7_7:                                #   in Loop: Header=BB7_2 Depth=1
	movslq	%r11d, %r11
	movl	%ebp, (%rdx,%r11,4)
	jmp	.LBB7_8
.LBB7_10:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %rbp
.LBB7_11:                               # %._crit_edge
	retq
.Lfunc_end7:
	.size	_Z8mergeSeqPiS_S_iii, .Lfunc_end7-_Z8mergeSeqPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13mergeSeqBatchPPiS0_S0_iiP15HIP_vector_typeIiLj2EE # -- Begin function _Z13mergeSeqBatchPPiS0_S0_iiP15HIP_vector_typeIiLj2EE
	.type	_Z13mergeSeqBatchPPiS0_S0_iiP15HIP_vector_typeIiLj2EE,@function
_Z13mergeSeqBatchPPiS0_S0_iiP15HIP_vector_typeIiLj2EE: # @_Z13mergeSeqBatchPPiS0_S0_iiP15HIP_vector_typeIiLj2EE
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB8_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movl	%r8d, %r14d
	movq	%rdx, %r15
	movq	%rsi, %r12
	movq	%rdi, %r13
	movl	%ecx, %ecx
	movq	%rcx, (%rsp)                    # 8-byte Spill
	xorl	%ebp, %ebp
.LBB8_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r13,%rbp,8), %rdi
	movq	(%r12,%rbp,8), %rsi
	movq	(%r15,%rbp,8), %rdx
	movl	(%rbx,%rbp,8), %ecx
	movl	4(%rbx,%rbp,8), %r8d
	movl	%r14d, %r9d
	callq	_Z8mergeSeqPiS_S_iii
	incq	%rbp
	cmpq	%rbp, (%rsp)                    # 8-byte Folded Reload
	jne	.LBB8_2
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB8_4:                                # %._crit_edge
	retq
.Lfunc_end8:
	.size	_Z13mergeSeqBatchPPiS0_S0_iiP15HIP_vector_typeIiLj2EE, .Lfunc_end8-_Z13mergeSeqBatchPPiS0_S0_iiP15HIP_vector_typeIiLj2EE
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_ # -- Begin function _Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.type	_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_,@function
_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_: # @_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_, .Lfunc_end9-_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.cfi_endproc
                                        # -- End function
	.globl	_Z11assertOrderPii              # -- Begin function _Z11assertOrderPii
	.type	_Z11assertOrderPii,@function
_Z11assertOrderPii:                     # @_Z11assertOrderPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%esi, %ebx
	movq	%rdi, %r14
	decl	%ebx
	xorl	%r12d, %r12d
	testl	%ebx, %ebx
	movl	$0, %eax
	cmovgl	%ebx, %eax
.LBB10_1:                               # =>This Inner Loop Header: Depth=1
	movq	%r12, %r15
	cmpq	%r12, %rax
	je	.LBB10_4
# %bb.2:                                #   in Loop: Header=BB10_1 Depth=1
	movl	(%r14,%r15,4), %ecx
	leaq	1(%r15), %r12
	cmpl	4(%r14,%r15,4), %ecx
	jle	.LBB10_1
# %bb.3:
	leal	-1(%r12), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	-4(%r14,%r12,4), %esi
	movl	(%r14,%r12,4), %edx
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
.LBB10_4:                               # %.loopexit
	movslq	%ebx, %rcx
	xorl	%eax, %eax
	cmpq	%rcx, %r15
	setge	%al
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z11assertOrderPii, .Lfunc_end10-_Z11assertOrderPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27assertMergeAllValuesPresentPiiS_iS_i # -- Begin function _Z27assertMergeAllValuesPresentPiiS_iS_i
	.type	_Z27assertMergeAllValuesPresentPiiS_iS_i,@function
_Z27assertMergeAllValuesPresentPiiS_iS_i: # @_Z27assertMergeAllValuesPresentPiiS_iS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, %r14d
	movq	%rsp, %rbx
	leaq	15(,%r14,4), %rax
	andq	$-16, %rax
	subq	%rax, %rbx
	movq	%rbx, %rsp
	movb	$1, %r13b
	testl	%r9d, %r9d
	jle	.LBB11_24
# %bb.1:                                # %.preheader47.lr.ph
	movq	%rdx, %r12
	movl	%esi, %r10d
	movq	%rdi, %r15
	movl	%ecx, -44(%rbp)                 # 4-byte Spill
	leaq	(,%r14,4), %rdx
	xorl	%r13d, %r13d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movq	%r8, -64(%rbp)                  # 8-byte Spill
	movl	%r9d, -52(%rbp)                 # 4-byte Spill
	movl	%r10d, -48(%rbp)                # 4-byte Spill
	callq	memset@PLT
	movl	-48(%rbp), %r9d                 # 4-byte Reload
	movl	-52(%rbp), %edi                 # 4-byte Reload
	movq	-64(%rbp), %r8                  # 8-byte Reload
	movl	%r9d, %eax
.LBB11_2:                               # %.preheader47
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_4 Depth 2
	testl	%r9d, %r9d
	jle	.LBB11_7
# %bb.3:                                # %.lr.ph53
                                        #   in Loop: Header=BB11_2 Depth=1
	movl	(%r8,%r13,4), %ecx
	xorl	%edx, %edx
.LBB11_4:                               #   Parent Loop BB11_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpl	%ecx, (%r15,%rdx,4)
	jne	.LBB11_6
# %bb.5:                                #   in Loop: Header=BB11_4 Depth=2
	movl	(%rbx,%r13,4), %esi
	cmpl	$1, %esi
	adcl	$0, %esi
	movl	%esi, (%rbx,%r13,4)
.LBB11_6:                               #   in Loop: Header=BB11_4 Depth=2
	incq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB11_4
.LBB11_7:                               # %._crit_edge
                                        #   in Loop: Header=BB11_2 Depth=1
	incq	%r13
	cmpq	%r14, %r13
	jne	.LBB11_2
# %bb.8:                                # %.preheader46
	testl	%edi, %edi
	movb	$1, %r13b
	jle	.LBB11_24
# %bb.9:                                # %.preheader45.lr.ph
	movl	-44(%rbp), %r9d                 # 4-byte Reload
	movl	%r9d, %eax
	xorl	%ecx, %ecx
.LBB11_10:                              # %.preheader45
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_12 Depth 2
	testl	%r9d, %r9d
	jle	.LBB11_15
# %bb.11:                               # %.lr.ph56
                                        #   in Loop: Header=BB11_10 Depth=1
	movl	(%r8,%rcx,4), %edx
	xorl	%esi, %esi
.LBB11_12:                              #   Parent Loop BB11_10 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpl	%edx, (%r12,%rsi,4)
	jne	.LBB11_14
# %bb.13:                               #   in Loop: Header=BB11_12 Depth=2
	movl	(%rbx,%rcx,4), %edi
	cmpl	$1, %edi
	adcl	$0, %edi
	movl	%edi, (%rbx,%rcx,4)
.LBB11_14:                              #   in Loop: Header=BB11_12 Depth=2
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB11_12
.LBB11_15:                              # %._crit_edge57
                                        #   in Loop: Header=BB11_10 Depth=1
	incq	%rcx
	cmpq	%r14, %rcx
	jne	.LBB11_10
# %bb.16:                               # %.lr.ph62.preheader
	cmpl	$1, (%rbx)
	jne	.LBB11_17
# %bb.18:                               # %.lr.ph.preheader
	movl	$1, %eax
.LBB11_19:                              # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	cmpq	%rax, %r14
	je	.LBB11_23
# %bb.20:                               # %.lr.ph62
                                        #   in Loop: Header=BB11_19 Depth=1
	leaq	1(%rax), %rcx
	cmpl	$1, (%rbx,%rax,4)
	movq	%rcx, %rax
	je	.LBB11_19
# %bb.21:                               # %.lr.ph62._crit_edge.loopexit
	decq	%rcx
	cmpq	%r14, %rcx
	setae	%r13b
	jmp	.LBB11_22
.LBB11_17:
	xorl	%r13d, %r13d
.LBB11_22:                              # %.lr.ph62._crit_edge
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	jmp	.LBB11_24
.LBB11_23:                              # %.loopexit.loopexit
	cmpq	%r14, %rax
	setae	%r13b
.LBB11_24:                              # %.loopexit
	movzbl	%r13b, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end11:
	.size	_Z27assertMergeAllValuesPresentPiiS_iS_i, .Lfunc_end11-_Z27assertMergeAllValuesPresentPiiS_iS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z11assertMergePiiS_iS_i        # -- Begin function _Z11assertMergePiiS_iS_i
	.type	_Z11assertMergePiiS_iS_i,@function
_Z11assertMergePiiS_iS_i:               # @_Z11assertMergePiiS_iS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movq	%r8, %r14
	movl	%ecx, 4(%rsp)                   # 4-byte Spill
	movq	%rdx, %r15
	movl	%esi, %r12d
	movq	%rdi, %r13
	movq	%r8, %rdi
	movl	%r9d, %esi
	callq	_Z11assertOrderPii
	movl	%eax, %ebp
	movq	%r13, %rdi
	movl	%r12d, %esi
	movq	%r15, %rdx
	movl	4(%rsp), %ecx                   # 4-byte Reload
	movq	%r14, %r8
	movl	%ebx, %r9d
	callq	_Z27assertMergeAllValuesPresentPiiS_iS_i
	testl	%ebp, %ebp
	setne	%cl
	testl	%eax, %eax
	setne	%al
	andb	%cl, %al
	movzbl	%al, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z11assertMergePiiS_iS_i, .Lfunc_end12-_Z11assertMergePiiS_iS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z13assertMerge2DPPiS0_S0_P15HIP_vector_typeIiLj2EEi # -- Begin function _Z13assertMerge2DPPiS0_S0_P15HIP_vector_typeIiLj2EEi
	.type	_Z13assertMerge2DPPiS0_S0_P15HIP_vector_typeIiLj2EEi,@function
_Z13assertMerge2DPPiS0_S0_P15HIP_vector_typeIiLj2EEi: # @_Z13assertMerge2DPPiS0_S0_P15HIP_vector_typeIiLj2EEi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movq	%rdx, 24(%rsp)                  # 8-byte Spill
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%r8d, %r8d
	jle	.LBB13_5
# %bb.1:                                # %.lr.ph.preheader
	movl	%r8d, %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	xorl	%r12d, %r12d
.LBB13_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	8(%rsp), %rax                   # 8-byte Reload
	movq	(%rax,%r12,8), %rax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movq	16(%rsp), %rax                  # 8-byte Reload
	movq	(%rax,%r12,8), %rax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	32(%rsp), %rax                  # 8-byte Reload
	movl	(%rax,%r12,8), %r15d
	movl	4(%rax,%r12,8), %r13d
	movq	24(%rsp), %rax                  # 8-byte Reload
	movq	(%rax,%r12,8), %rbx
	leal	(%r15,%r13), %r14d
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_Z11assertOrderPii
	movl	%eax, %ebp
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movl	%r15d, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	%r13d, %ecx
	movq	%rbx, %r8
	movl	%r14d, %r9d
	callq	_Z27assertMergeAllValuesPresentPiiS_iS_i
	testl	%ebp, %ebp
	je	.LBB13_7
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB13_2 Depth=1
	testl	%eax, %eax
	je	.LBB13_7
# %bb.4:                                #   in Loop: Header=BB13_2 Depth=1
	incq	%r12
	cmpq	%r12, (%rsp)                    # 8-byte Folded Reload
	jne	.LBB13_2
.LBB13_5:                               # %._crit_edge
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$1, %ebx
	jmp	.LBB13_6
.LBB13_7:
	xorl	%ebx, %ebx
	movl	$.L.str.6, %edi
	movl	%r12d, %esi
	xorl	%eax, %eax
	callq	printf
.LBB13_6:
	movl	%ebx, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z13assertMerge2DPPiS0_S0_P15HIP_vector_typeIiLj2EEi, .Lfunc_end13-_Z13assertMerge2DPPiS0_S0_P15HIP_vector_typeIiLj2EEi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI14_0:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	cmpl	$3, %ebp
	jne	.LBB14_1
# %bb.2:
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %r13d
	jmp	.LBB14_3
.LBB14_1:
	movl	$1000, %ebp                     # imm = 0x3E8
	movl	$4, %r13d
.LBB14_3:
	movslq	%ebp, %rbx
	leaq	(,%rbx,8), %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	%r14, 48(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %r15
	movslq	%r13d, %r12
	movl	%ebp, 20(%rsp)                  # 4-byte Spill
	movl	%ebp, %ebp
	testl	%ebx, %ebx
	jle	.LBB14_6
# %bb.4:                                # %.lr.ph
	leaq	(,%r12,4), %rbx
	xorl	%r14d, %r14d
.LBB14_5:                               # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, (%r15,%r14,8)
	incq	%r14
	cmpq	%r14, %rbp
	jne	.LBB14_5
.LBB14_6:                               # %._crit_edge
	movq	%r15, 128(%rsp)                 # 8-byte Spill
	movq	48(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movl	20(%rsp), %r14d                 # 4-byte Reload
	movl	%r14d, %edx
	movl	%r13d, %ecx
	movq	%r15, %r8
	callq	_Z15init_list_arrayPPiS0_iiP15HIP_vector_typeIiLj2EE
	movq	$0, (%rbx)
	cmpl	$2, %r14d
	jl	.LBB14_9
# %bb.7:                                # %.lr.ph.preheader.i
	leaq	-1(%rbp), %rax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	xorl	%esi, %esi
.LBB14_8:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r15,%rcx,8), %esi
	addl	4(%r15,%rcx,8), %edx
	movl	%esi, 8(%rbx,%rcx,8)
	movl	%edx, 12(%rbx,%rcx,8)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB14_8
.LBB14_9:                               # %_Z13indices_arrayP15HIP_vector_typeIiLj2EES1_i.exit
	movq	%rbx, 136(%rsp)                 # 8-byte Spill
	xorl	%r14d, %r14d
	cmpl	$0, 20(%rsp)                    # 4-byte Folded Reload
	movq	%r12, 192(%rsp)                 # 8-byte Spill
	jle	.LBB14_13
# %bb.10:                               # %.lr.ph.preheader.i123
	xorl	%ecx, %ecx
	xorl	%eax, %eax
.LBB14_11:                              # %.lr.ph.i125
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r15,%rcx,8), %eax
	addl	4(%r15,%rcx,8), %r14d
	incq	%rcx
	cmpq	%rcx, %rbp
	jne	.LBB14_11
# %bb.12:                               # %._crit_edge.loopexit.i
	shlq	$32, %r14
	movl	%eax, %eax
	orq	%rax, %r14
.LBB14_13:                              # %_Z14get_totalSizesP15HIP_vector_typeIiLj2EEi.exit
	movslq	%r14d, %rdi
	shlq	$2, %rdi
	movq	%rdi, 40(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	sarq	$30, %r14
	andq	$-4, %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %rbx
	movl	20(%rsp), %eax                  # 4-byte Reload
                                        # kill: def $eax killed $eax def $rax
	imull	%r13d, %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movslq	%eax, %r12
	shlq	$2, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movq	%r15, (%rsp)
	movq	80(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, 144(%rsp)                 # 8-byte Spill
	movq	%rbx, %rsi
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movq	56(%rsp), %rcx                  # 8-byte Reload
	movl	20(%rsp), %r8d                  # 4-byte Reload
	callq	_Z11flat_arraysPiS_PS_S0_iiP15HIP_vector_typeIiLj2EE
	leaq	104(%rsp), %rdi
	movq	%r12, 24(%rsp)                  # 8-byte Spill
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB14_60
# %bb.14:                               # %_Z9gpuAssert10hipError_tPKcib.exit
	leaq	120(%rsp), %rdi
	movq	40(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	movq	48(%rsp), %r12                  # 8-byte Reload
	jne	.LBB14_15
# %bb.17:                               # %_Z9gpuAssert10hipError_tPKcib.exit130
	leaq	112(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB14_18
# %bb.19:                               # %_Z9gpuAssert10hipError_tPKcib.exit132
	leaq	96(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB14_20
# %bb.21:                               # %_Z9gpuAssert10hipError_tPKcib.exit134
	leaq	88(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB14_22
# %bb.23:                               # %_Z9gpuAssert10hipError_tPKcib.exit136
	callq	clock
	movq	%rax, 184(%rsp)                 # 8-byte Spill
	movq	120(%rsp), %rdi
	movq	80(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB14_24
# %bb.26:                               # %_Z9gpuAssert10hipError_tPKcib.exit138
	movq	112(%rsp), %rdi
	movq	144(%rsp), %rsi                 # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB14_27
# %bb.28:                               # %_Z9gpuAssert10hipError_tPKcib.exit140
	movq	96(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	movq	136(%rsp), %rsi                 # 8-byte Reload
	movl	20(%rsp), %r14d                 # 4-byte Reload
	jne	.LBB14_29
# %bb.30:                               # %_Z9gpuAssert10hipError_tPKcib.exit142
	movq	88(%rsp), %rdi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB14_31
# %bb.32:                               # %_Z9gpuAssert10hipError_tPKcib.exit144
	callq	clock
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	$.L.str.10, %edi
	movl	%r14d, %esi
	movl	%r13d, %edx
	xorl	%eax, %eax
	callq	printf
	callq	clock
	movq	%rax, 176(%rsp)                 # 8-byte Spill
	movq	32(%rsp), %rax                  # 8-byte Reload
	leal	1023(%rax), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$10, %edi
	incl	%edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1024, %rdx                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB14_34
# %bb.33:
	movq	120(%rsp), %rdi
	movq	112(%rsp), %rsi
	movq	104(%rsp), %rdx
	movq	88(%rsp), %r9
	movq	96(%rsp), %rax
	movq	%rax, (%rsp)
	movl	%r13d, %ecx
	movl	%r14d, %r8d
	callq	_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
.LBB14_34:
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB14_35
# %bb.36:                               # %_Z9gpuAssert10hipError_tPKcib.exit146
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB14_37
# %bb.38:                               # %_Z9gpuAssert10hipError_tPKcib.exit148
	callq	clock
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	callq	clock
	movq	%rax, 168(%rsp)                 # 8-byte Spill
	movq	104(%rsp), %rsi
	movq	72(%rsp), %rdi                  # 8-byte Reload
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB14_39
# %bb.40:                               # %_Z9gpuAssert10hipError_tPKcib.exit150
	callq	clock
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	callq	clock
	movq	%rax, 160(%rsp)                 # 8-byte Spill
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	128(%rsp), %rdx                 # 8-byte Reload
	movl	%r14d, %ecx
	movl	%r13d, %r8d
	movq	%r15, %r9
	callq	_Z13mergeSeqBatchPPiS0_S0_iiP15HIP_vector_typeIiLj2EE
	callq	clock
	movq	%rax, 152(%rsp)                 # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movl	%r14d, %ecx
	movq	%rax, %r14
	testl	%ecx, %ecx
	movq	192(%rsp), %rbx                 # 8-byte Reload
	jle	.LBB14_43
# %bb.41:                               # %.lr.ph172
	shlq	$2, %rbx
	xorl	%r12d, %r12d
.LBB14_42:                              # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, (%r14,%r12,8)
	incq	%r12
	cmpq	%r12, %rbp
	jne	.LBB14_42
.LBB14_43:                              # %._crit_edge173
	movq	152(%rsp), %rax                 # 8-byte Reload
	subq	160(%rsp), %rax                 # 8-byte Folded Reload
	movq	24(%rsp), %rdx                  # 8-byte Reload
	subq	168(%rsp), %rdx                 # 8-byte Folded Reload
	movq	32(%rsp), %rcx                  # 8-byte Reload
	subq	176(%rsp), %rcx                 # 8-byte Folded Reload
	cvtsi2ss	%rax, %xmm1
	movq	40(%rsp), %rax                  # 8-byte Reload
	subq	184(%rsp), %rax                 # 8-byte Folded Reload
	cvtsi2ss	%rdx, %xmm2
	movss	.LCPI14_0(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	cvtsi2ss	%rcx, %xmm3
	divss	%xmm0, %xmm1
	movss	%xmm1, 40(%rsp)                 # 4-byte Spill
	xorps	%xmm1, %xmm1
	cvtsi2ss	%rax, %xmm1
	divss	%xmm0, %xmm2
	movss	%xmm2, 32(%rsp)                 # 4-byte Spill
	divss	%xmm0, %xmm3
	movss	%xmm3, 48(%rsp)                 # 4-byte Spill
	divss	%xmm0, %xmm1
	movss	%xmm1, 24(%rsp)                 # 4-byte Spill
	cmpl	$0, 20(%rsp)                    # 4-byte Folded Reload
	movq	64(%rsp), %r12                  # 8-byte Reload
	movq	72(%rsp), %r10                  # 8-byte Reload
	jle	.LBB14_49
# %bb.44:                               # %.preheader.lr.ph.i
	movl	%r13d, %eax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB14_45:                              # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB14_47 Depth 2
	testl	%r13d, %r13d
	jle	.LBB14_48
# %bb.46:                               # %.lr.ph.i152
                                        #   in Loop: Header=BB14_45 Depth=1
	movl	%ecx, %esi
	leaq	(%r10,%rsi,4), %rsi
	movq	(%r14,%rdx,8), %rdi
	xorl	%r8d, %r8d
.LBB14_47:                              #   Parent Loop BB14_45 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rsi,%r8,4), %r9d
	movl	%r9d, (%rdi,%r8,4)
	incq	%r8
	cmpq	%r8, %rax
	jne	.LBB14_47
.LBB14_48:                              # %._crit_edge.i
                                        #   in Loop: Header=BB14_45 Depth=1
	incq	%rdx
	addl	%r13d, %ecx
	cmpq	%rbp, %rdx
	jne	.LBB14_45
.LBB14_49:                              # %_Z13unflat_arraysPPiS_ii.exit
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	xorps	%xmm0, %xmm0
	cvtss2sd	40(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$.L.str.12, %edi
	movb	$1, %al
	callq	printf
	movq	%r12, %rdi
	movq	56(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	movq	128(%rsp), %rdx                 # 8-byte Reload
	movq	%r15, %rcx
	movl	20(%rsp), %ebp                  # 4-byte Reload
	movl	%ebp, %r8d
	callq	_Z13assertMerge2DPPiS0_S0_P15HIP_vector_typeIiLj2EEi
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movss	48(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	32(%rsp), %xmm0                 # 4-byte Folded Reload
	addss	24(%rsp), %xmm0                 # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.12, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	48(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$.L.str.15, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	24(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$.L.str.16, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	32(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$.L.str.17, %edi
	movb	$1, %al
	callq	printf
	movq	%r12, %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movq	%r15, %rcx
	movl	%ebp, %r8d
	callq	_Z13assertMerge2DPPiS0_S0_P15HIP_vector_typeIiLj2EEi
	movss	40(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	48(%rsp), %xmm0                 # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.18, %edi
	movb	$1, %al
	callq	printf
	movss	24(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	48(%rsp), %xmm0                 # 4-byte Folded Reload
	addss	32(%rsp), %xmm0                 # 4-byte Folded Reload
	movaps	%xmm0, %xmm1
	movss	40(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.19, %edi
	movb	$1, %al
	callq	printf
	movq	120(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB14_50
# %bb.51:                               # %_Z9gpuAssert10hipError_tPKcib.exit157
	movq	112(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB14_52
# %bb.53:                               # %_Z9gpuAssert10hipError_tPKcib.exit159
	movq	104(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB14_54
# %bb.55:                               # %_Z9gpuAssert10hipError_tPKcib.exit161
	movq	88(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB14_56
# %bb.57:                               # %_Z9gpuAssert10hipError_tPKcib.exit163
	movq	96(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB14_58
# %bb.59:                               # %_Z9gpuAssert10hipError_tPKcib.exit165
	movq	%r12, %rdi
	callq	free
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	72(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	80(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	144(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	136(%rsp), %rdi                 # 8-byte Reload
	callq	free
	xorl	%eax, %eax
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB14_60:
	.cfi_def_cfa_offset 256
	movl	%eax, %r12d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$455, %r8d                      # imm = 0x1C7
	xorl	%eax, %eax
	callq	fprintf
	movl	%r12d, %edi
	callq	exit
.LBB14_15:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	movl	%eax, %ebp
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$456, %r8d                      # imm = 0x1C8
	jmp	.LBB14_16
.LBB14_18:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	movl	%eax, %ebp
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$457, %r8d                      # imm = 0x1C9
	jmp	.LBB14_16
.LBB14_20:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	movl	%eax, %ebp
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$458, %r8d                      # imm = 0x1CA
	jmp	.LBB14_16
.LBB14_22:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	movl	%eax, %ebp
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$459, %r8d                      # imm = 0x1CB
.LBB14_16:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB14_24:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$463, %r8d                      # imm = 0x1CF
	jmp	.LBB14_25
.LBB14_27:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$464, %r8d                      # imm = 0x1D0
	jmp	.LBB14_25
.LBB14_29:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$465, %r8d                      # imm = 0x1D1
	jmp	.LBB14_25
.LBB14_31:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$466, %r8d                      # imm = 0x1D2
	jmp	.LBB14_25
.LBB14_35:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$475, %r8d                      # imm = 0x1DB
	jmp	.LBB14_25
.LBB14_37:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$476, %r8d                      # imm = 0x1DC
	jmp	.LBB14_25
.LBB14_39:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$480, %r8d                      # imm = 0x1E0
	jmp	.LBB14_25
.LBB14_50:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$520, %r8d                      # imm = 0x208
	jmp	.LBB14_25
.LBB14_52:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$521, %r8d                      # imm = 0x209
	jmp	.LBB14_25
.LBB14_54:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$522, %r8d                      # imm = 0x20A
	jmp	.LBB14_25
.LBB14_56:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$523, %r8d                      # imm = 0x20B
	jmp	.LBB14_25
.LBB14_58:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$524, %r8d                      # imm = 0x20C
.LBB14_25:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end14:
	.size	main, .Lfunc_end14-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB15_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB15_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end15:
	.size	__hip_module_ctor, .Lfunc_end15-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB16_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB16_2:
	retq
.Lfunc_end16:
	.size	__hip_module_dtor, .Lfunc_end16-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%d "
	.size	.L.str.1, 4

	.type	_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_,@object # @_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.section	.rodata,"a",@progbits
	.globl	_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.p2align	3, 0x0
_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_:
	.quad	_Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.size	_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"WARNING : Unsuccessful merge or sort ... : unordered array on indice %d ...\n"
	.size	.L.str.3, 77

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"tab[i]= %d > tab[i+1] = %d\n"
	.size	.L.str.4, 28

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Unsuccessful merge on array %d !\n"
	.size	.L.str.6, 34

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/homerdurand/HPCA/main/batchMerge.hip"
	.size	.L.str.8, 99

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"* Number of batches : %d\n* Sizes of batches : %d\n"
	.size	.L.str.10, 50

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Total time elapsed : %f s\n"
	.size	.L.str.12, 27

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Time running algorithm : %f s\n"
	.size	.L.str.15, 31

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Time to copy Host to Device : %f s\n"
	.size	.L.str.16, 36

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"Time to copy Device to Host : %f s\n"
	.size	.L.str.17, 36

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"Parrallel algorithm is %f times faster than sequential merge !\n"
	.size	.L.str.18, 64

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Parrallel merge is %f times faster than sequential merge !\n"
	.size	.L.str.19, 60

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.20, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_"
	.size	.L__unnamed_1, 58

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"]"
	.size	.Lstr, 2

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\nWARNING : Unsuccessful merge : incorrect elements..."
	.size	.Lstr.1, 54

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Successful merge !"
	.size	.Lstr.2, 19

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"======== batch merge ======="
	.size	.Lstr.3, 29

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"\n========= Sequential merge : ============="
	.size	.Lstr.4, 44

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"========= Parallel merge : ============="
	.size	.Lstr.5, 41

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_ ; -- Begin function _Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.globl	_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
	.p2align	8
	.type	_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_,@function
_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_: ; @_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x18
	s_load_b32 s4, s[0:1], 0x3c
	s_mov_b32 s8, 0
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_u32_e32 v1, s2
	s_sub_i32 s6, 0, s2
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v1
	s_mul_i32 s6, s6, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s6, s5, s6
	s_add_i32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_hi_u32 v1, v0, s5
	s_mul_hi_u32 s5, s4, s5
	s_mul_i32 s6, s5, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_sub_i32 s4, s4, s6
	s_add_i32 s6, s5, 1
	s_sub_i32 s7, s4, s2
	v_mul_lo_u32 v2, v1, s2
	v_add_nc_u32_e32 v3, 1, v1
	s_cmp_ge_u32 s4, s2
	s_cselect_b32 s5, s6, s5
	s_cselect_b32 s4, s7, s4
	s_add_i32 s6, s5, 1
	s_cmp_ge_u32 s4, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v0, v2
	s_cselect_b32 s4, s6, s5
	v_subrev_nc_u32_e32 v4, s2, v2
	v_cmp_le_u32_e32 vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v2, v2, v4 :: v_dual_cndmask_b32 v1, v1, v3
	v_cmp_le_u32_e32 vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 1, v1
	v_cndmask_b32_e32 v1, v1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, v1, s2
	v_mad_u64_u32 v[3:4], null, s4, s15, v[1:2]
	v_sub_nc_u32_e32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v3, s2, v[2:3]
	s_mul_i32 s2, s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_30
; %bb.1:
	s_load_b128 s[12:15], s[0:1], 0x20
	v_ashrrev_i32_e32 v4, 31, v3
                                        ; implicit-def: $sgpr9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s14, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s15, v10, vcc_lo
	global_load_b32 v5, v[3:4], off
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_add_u32 s10, s6, -4
	s_addc_u32 s11, s7, -1
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v1, v2, v5
	v_cmp_gt_i32_e32 vcc_lo, v2, v5
	v_min_i32_e32 v6, v2, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v8, 0, v1, vcc_lo
	v_add_co_u32 v1, vcc_lo, s12, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, s13, v10, vcc_lo
	v_mov_b32_e32 v10, v8
	s_add_u32 s12, s4, -4
	s_addc_u32 s13, s5, -1
.LBB0_2:                                ; %.outer
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_mov_b32 s15, 0
                                        ; implicit-def: $sgpr16
                                        ; implicit-def: $sgpr14
                                        ; implicit-def: $sgpr17
                                        ; implicit-def: $sgpr19
                                        ; implicit-def: $sgpr18
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_sub_nc_u32_e32 v7, v6, v8
	s_or_b32 s18, s18, exec_lo
	s_and_not1_b32 s19, s19, exec_lo
	s_or_b32 s17, s17, exec_lo
	s_mov_b32 s20, exec_lo
	v_sub_nc_u32_e32 v9, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v7, v7, v9
	v_lshrrev_b32_e32 v11, 1, v7
                                        ; implicit-def: $vgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v9, v6, v11
	v_cmpx_lt_i32_e32 -1, v9
	s_cbranch_execz .LBB0_15
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=2
	global_load_b32 v12, v[3:4], off offset:4
	v_add_nc_u32_e32 v7, v11, v10
	s_mov_b32 s0, -1
	s_mov_b32 s23, -1
	s_mov_b32 s21, exec_lo
                                        ; implicit-def: $sgpr22
	s_waitcnt vmcnt(0)
	v_cmpx_le_i32_e64 v7, v12
	s_cbranch_execz .LBB0_14
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, v9, v5
	v_cmp_eq_u32_e64 s0, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_xor_b32 s22, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s22
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_3 Depth=2
	global_load_b64 v[13:14], v[1:2], off
	s_and_not1_b32 s0, s0, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v13, v13, v9
	v_add_nc_u32_e32 v15, v14, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v14, 31, v13
	v_ashrrev_i32_e32 v16, 31, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	v_lshlrev_b64 v[15:16], 2, v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v13, vcc_lo, s4, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v15, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s11, v16, vcc_lo
	global_load_b32 v13, v[13:14], off
	global_load_b32 v14, v[15:16], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v13, v14
	s_and_b32 s22, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s0, s0, s22
.LBB0_7:                                ; %Flow171
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s1, -1
                                        ; implicit-def: $sgpr24
	s_and_saveexec_b32 s22, s0
	s_cbranch_execz .LBB0_13
; %bb.8:                                ;   in Loop: Header=BB0_3 Depth=2
	v_cmp_ne_u32_e64 s0, v7, v12
	v_cmp_ne_u32_e64 s1, v6, v11
	v_cmp_eq_u32_e32 vcc_lo, v7, v12
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s23, s1, s0
	s_mov_b32 s0, -1
	s_and_saveexec_b32 s1, s23
	s_cbranch_execz .LBB0_12
; %bb.9:                                ;   in Loop: Header=BB0_3 Depth=2
	global_load_b64 v[11:12], v[1:2], off
	s_mov_b32 s23, -1
	s_mov_b32 s24, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v11, v11, v9
	v_add_nc_u32_e32 v13, v12, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v12, 31, v11
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v11, s0, s12, v11
	v_add_co_ci_u32_e64 v12, s0, s13, v12, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s6, v13
	v_add_co_ci_u32_e64 v14, s0, s7, v14, s0
	global_load_b32 v11, v[11:12], off
	global_load_b32 v12, v[13:14], off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i32_e64 v11, v12
; %bb.10:                               ;   in Loop: Header=BB0_3 Depth=2
	v_add_nc_u32_e32 v10, 1, v7
	v_add_nc_u32_e32 v6, -1, v9
	s_xor_b32 s23, exec_lo, -1
                                        ; implicit-def: $vgpr9
; %bb.11:                               ; %Flow174
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s24
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, vcc_lo, exec_lo
	s_or_not1_b32 s0, s23, exec_lo
.LBB0_12:                               ; %Flow173
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s23, exec_lo, -1
	s_and_b32 s24, vcc_lo, exec_lo
	s_or_not1_b32 s1, s0, exec_lo
.LBB0_13:                               ; %Flow172
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s23, s23, exec_lo
	s_and_b32 s22, s24, exec_lo
	s_or_not1_b32 s0, s1, exec_lo
.LBB0_14:                               ; %Flow170
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s1, s18, exec_lo
	s_and_b32 s18, s23, exec_lo
	s_and_not1_b32 s17, s17, exec_lo
	s_or_b32 s18, s1, s18
	s_and_not1_b32 s1, s19, exec_lo
	s_and_b32 s19, s22, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s19, s1, s19
	s_or_b32 s17, s17, s0
.LBB0_15:                               ; %Flow169
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s17
	s_or_b32 s15, s0, s15
	s_and_not1_b32 s0, s14, exec_lo
	s_and_b32 s1, s18, exec_lo
	s_and_not1_b32 s16, s16, exec_lo
	s_and_b32 s20, s19, exec_lo
	s_or_b32 s14, s0, s1
	s_or_b32 s16, s16, s20
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB0_3
; %bb.16:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
	s_mov_b32 s1, -1
	s_xor_b32 s0, s16, -1
                                        ; implicit-def: $vgpr8
	s_and_saveexec_b32 s15, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s14, exec_lo, s15
; %bb.17:                               ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v8, 1, v9
	s_xor_b32 s1, exec_lo, -1
; %bb.18:                               ; %Flow175
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s1
	s_or_b32 s8, s1, s8
	s_and_not1_b32 s1, s9, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s9, s1, s0
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_2
; %bb.19:
	s_or_b32 exec_lo, exec_lo, s8
	v_cmp_ge_i32_e32 vcc_lo, v9, v5
	s_mov_b32 s0, 0
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr5_vgpr6
	s_and_saveexec_b32 s8, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB0_21
; %bb.20:                               ; %._crit_edge
	global_load_b32 v1, v[1:2], off offset:4
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v1, v7
                                        ; implicit-def: $vgpr1_vgpr2
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
.LBB0_21:                               ; %Flow
	s_or_saveexec_b32 s8, s8
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 exec_lo, exec_lo, s8
	s_cbranch_execz .LBB0_25
; %bb.22:
	global_load_b32 v3, v[1:2], off
	s_mov_b32 s0, -1
	s_mov_b32 s11, s1
                                        ; implicit-def: $vgpr5_vgpr6
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v3, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	s_and_saveexec_b32 s10, s9
	s_cbranch_execz .LBB0_24
; %bb.23:
	global_load_b32 v1, v[1:2], off offset:4
	s_and_not1_b32 s9, s1, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v1, v7
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_co_u32 v1, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	v_lshlrev_b64 v[7:8], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v1, v[1:2], off
	global_load_b32 v2, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v1, v2
	v_cmp_le_i32_e64 s0, v1, v2
	s_and_b32 s11, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_or_not1_b32 s0, s0, exec_lo
	s_or_b32 s11, s9, s11
.LBB0_24:                               ; %Flow167
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s9, s11, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s1, s1, s9
.LBB0_25:                               ; %Flow166
	s_or_b32 exec_lo, exec_lo, s8
                                        ; implicit-def: $vgpr1_vgpr2
	s_and_saveexec_b32 s8, s1
; %bb.26:
	v_lshlrev_b64 v[1:2], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
; %bb.27:                               ; %Flow168
	s_or_b32 exec_lo, exec_lo, s8
	s_and_saveexec_b32 s1, s0
; %bb.28:                               ; %._crit_edge114
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
; %bb.29:                               ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s1
	global_load_b32 v2, v[1:2], off
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB0_30:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 25
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_, .Lfunc_end0-_Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1464
; NumSgprs: 27
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 27
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_
    .private_segment_fixed_size: 0
    .sgpr_count:     27
    .sgpr_spill_count: 0
    .symbol:         _Z17mergeSmallBatch_kPiS_S_iiP15HIP_vector_typeIiLj2EES2_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
