#include <cuda.h>
#include <stdio.h>
#include <time.h>
//#define N 4

//> Kernel definition
__global__ void gpuMatmult(int* m1, int* m2, int* ans, int n){
	int k, sum = 0;
	int i = blockIdx.x * blockDim.x + threadIdx.x; 
  int j = blockIdx.y * blockDim.y + threadIdx.y;
  if (i < n && j < n) {
    for (k = 0; k < n; k++) {
      sum += m1[j * n + k] * m2[k * n + i];
    }
    ans[j * n + i] = sum;
  }
}

int main(int argc, char** argv ){
	//> Variables definition
	int N = 0;
	double timeGPU;
	int *h_m1, *h_m2, *h_ans, *d_m1, *d_m2, *d_ans;

	//> Arguments check
	if(argc != 2){
		N = 4;
	}else{
		N = atoi(argv[1]);//> Set size
	}

	size_t bytes = N * N * sizeof(int);//> Set data size

	//> Host memory allocation
	h_m1 = (int *)malloc(bytes);
	h_m2 = (int *)malloc(bytes);
	h_ans = (int *)malloc(bytes);

	//> Inititializations
	for(int i = 0; i < N * N ; i++){
		h_m1[i] = i;
		h_m2[i] = i;
		h_ans[i] = 0;
	}

	//> Device memory allocation
	if (cudaSuccess != cudaMalloc((void **) &d_m1, bytes)) printf("Error allocating mem. for d_m1\n");
	if (cudaSuccess != cudaMalloc((void **) &d_m2, bytes)) printf("Error allocating mem. for d_m2\n");
	if (cudaSuccess != cudaMalloc((void **) &d_ans, bytes)) printf("Error allocating mem. for d_ans\n");

	//> Data copy H -> D
	if (cudaSuccess != cudaMemcpy(d_m1, h_m1, bytes, cudaMemcpyHostToDevice)) printf("Error copying data for d_m1\n");
	if (cudaSuccess != cudaMemcpy(d_m2, h_m2, bytes, cudaMemcpyHostToDevice)) printf("Error copying data for d_m2\n");

	//> Struct defitinitions for kernel call
	dim3 blockDim(32,32);
	dim3 gridDim((int)ceil((float)N/blockDim.x), (int)ceil((float)N/blockDim.y));

	clock_t startGPU  = clock();//> Starting timer
	//> Kernel call
	gpuMatmult<<<gridDim, blockDim>>>(d_m1, d_m2, d_ans, N);
	if (cudaSuccess != cudaGetLastError()) printf("Error calling kernel\n");

	//> Data copy back D -> H
	if (cudaSuccess != cudaMemcpy(h_ans, d_ans, bytes, cudaMemcpyDeviceToHost)) printf("Error copying data for d_ans\n");
	timeGPU = ((double)(clock() - startGPU))/CLOCKS_PER_SEC;//> Ending timer

	printf("Size m1 = %d x %d, m2 = %d x %d\n",N,N,N,N);
	printf("GPU time = %.6f seconds\n",timeGPU);//> Print time (include data copy back)

	//> Print result
	if (N <= 4){
		for(int m = 0; m < N; m++){
			for(int n = 0; n < N; n++){
				printf("%d,",h_ans[m * N + n]);
			}
				printf("\n");
		}
	}

	//> Free memory
	free(h_m1); free(h_m2); free(h_ans);
	cudaFree(d_m1); cudaFree(d_m2); cudaFree(h_ans);

	return 0;
}
	.file	"tmpxft_0039045c_00000000-6_matmult.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z35__device_stub__Z10gpuMatmultPiS_S_iPiS_S_i
	.type	_Z35__device_stub__Z10gpuMatmultPiS_S_iPiS_S_i, @function
_Z35__device_stub__Z10gpuMatmultPiS_S_iPiS_S_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10gpuMatmultPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z35__device_stub__Z10gpuMatmultPiS_S_iPiS_S_i, .-_Z35__device_stub__Z10gpuMatmultPiS_S_iPiS_S_i
	.globl	_Z10gpuMatmultPiS_S_i
	.type	_Z10gpuMatmultPiS_S_i, @function
_Z10gpuMatmultPiS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10gpuMatmultPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2053:
	.size	_Z10gpuMatmultPiS_S_i, .-_Z10gpuMatmultPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error allocating mem. for d_m1\n"
.LC1:
	.string	"Error allocating mem. for d_m2\n"
.LC2:
	.string	"Error allocating mem. for d_ans\n"
.LC3:
	.string	"Error copying data for d_m1\n"
.LC4:
	.string	"Error copying data for d_m2\n"
.LC6:
	.string	"Error calling kernel\n"
.LC7:
	.string	"Error copying data for d_ans\n"
.LC9:
	.string	"Size m1 = %d x %d, m2 = %d x %d\n"
.LC10:
	.string	"GPU time = %.6f seconds\n"
.LC11:
	.string	"%d,"
.LC12:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	$4, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	jne	.L9
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movl	%eax, %ebx
.L9:
	movl	%ebx, %r15d
	imull	%ebx, %r15d
	movslq	%r15d, %r14
	salq	$2, %r14
	movq	%r14, %rdi
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%rax, %rbp
	xorl	%eax, %eax
.L10:
	cmpl	%eax, %r15d
	jle	.L51
	xorl	%edx, %edx
	movl	%eax, (%r12,%rax,4)
	movl	%eax, 0(%r13,%rax,4)
	movl	%edx, 0(%rbp,%rax,4)
	incq	%rax
	jmp	.L10
.L51:
	leaq	24(%rsp), %rdi
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L12
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L12:
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L13
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L13:
	leaq	40(%rsp), %rdi
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L14
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L14:
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rdx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L15
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L15:
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rdx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L16
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L16:
	cvtsi2ssl	%ebx, %xmm0
	mulss	.LC5(%rip), %xmm0
	call	ceilf@PLT
	movl	$1, 68(%rsp)
	cvttss2sil	%xmm0, %eax
	movl	%eax, 60(%rsp)
	movl	%eax, 64(%rsp)
	call	clock@PLT
	movq	60(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	68(%rsp), %esi
	movl	$1, %ecx
	movq	%rax, %r15
	movabsq	$137438953504, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebx, %ecx
	movq	24(%rsp), %rdi
	call	_Z35__device_stub__Z10gpuMatmultPiS_S_iPiS_S_i
.L17:
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L18
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L18:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%r14, %rdx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L19
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L19:
	call	clock@PLT
	leaq	.LC9(%rip), %rsi
	movl	%ebx, %ecx
	movl	%ebx, %edx
	subq	%r15, %rax
	movl	$2, %edi
	movl	%ebx, %r9d
	movl	%ebx, %r8d
	cvtsi2sdq	%rax, %xmm0
	xorl	%eax, %eax
	divsd	.LC8(%rip), %xmm0
	movsd	%xmm0, (%rsp)
	call	__printf_chk@PLT
	movsd	(%rsp), %xmm0
	leaq	.LC10(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$4, %ebx
	jg	.L20
	movslq	%ebx, %r15
	xorl	%r14d, %r14d
	leaq	0(,%r15,4), %rax
	movq	%rbp, %r15
	movq	%rax, (%rsp)
	jmp	.L21
.L20:
	movq	%r12, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L22:
	movl	(%r15), %edx
	leaq	.LC11(%rip), %rsi
	xorl	%eax, %eax
	addq	$4, %r15
	movl	$2, %edi
	movq	%r8, 8(%rsp)
	call	__printf_chk@PLT
	movq	8(%rsp), %r8
	cmpq	%r8, %r15
	jne	.L22
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%r14d
	call	__printf_chk@PLT
.L21:
	cmpl	%r14d, %ebx
	jle	.L20
	movq	(%rsp), %rax
	leaq	(%r15,%rax), %r8
	jmp	.L22
.L24:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC13:
	.string	"_Z10gpuMatmultPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10gpuMatmultPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC5:
	.long	1023410176
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC8:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
//#define N 4

//> Kernel definition
__global__ void gpuMatmult(int* m1, int* m2, int* ans, int n){
	int k, sum = 0;
	int i = blockIdx.x * blockDim.x + threadIdx.x; 
  int j = blockIdx.y * blockDim.y + threadIdx.y;
  if (i < n && j < n) {
    for (k = 0; k < n; k++) {
      sum += m1[j * n + k] * m2[k * n + i];
    }
    ans[j * n + i] = sum;
  }
}

int main(int argc, char** argv ){
	//> Variables definition
	int N = 0;
	double timeGPU;
	int *h_m1, *h_m2, *h_ans, *d_m1, *d_m2, *d_ans;

	//> Arguments check
	if(argc != 2){
		N = 4;
	}else{
		N = atoi(argv[1]);//> Set size
	}

	size_t bytes = N * N * sizeof(int);//> Set data size

	//> Host memory allocation
	h_m1 = (int *)malloc(bytes);
	h_m2 = (int *)malloc(bytes);
	h_ans = (int *)malloc(bytes);

	//> Inititializations
	for(int i = 0; i < N * N ; i++){
		h_m1[i] = i;
		h_m2[i] = i;
		h_ans[i] = 0;
	}

	//> Device memory allocation
	if (hipSuccess != hipMalloc((void **) &d_m1, bytes)) printf("Error allocating mem. for d_m1\n");
	if (hipSuccess != hipMalloc((void **) &d_m2, bytes)) printf("Error allocating mem. for d_m2\n");
	if (hipSuccess != hipMalloc((void **) &d_ans, bytes)) printf("Error allocating mem. for d_ans\n");

	//> Data copy H -> D
	if (hipSuccess != hipMemcpy(d_m1, h_m1, bytes, hipMemcpyHostToDevice)) printf("Error copying data for d_m1\n");
	if (hipSuccess != hipMemcpy(d_m2, h_m2, bytes, hipMemcpyHostToDevice)) printf("Error copying data for d_m2\n");

	//> Struct defitinitions for kernel call
	dim3 blockDim(32,32);
	dim3 gridDim((int)ceil((float)N/blockDim.x), (int)ceil((float)N/blockDim.y));

	clock_t startGPU  = clock();//> Starting timer
	//> Kernel call
	gpuMatmult<<<gridDim, blockDim>>>(d_m1, d_m2, d_ans, N);
	if (hipSuccess != hipGetLastError()) printf("Error calling kernel\n");

	//> Data copy back D -> H
	if (hipSuccess != hipMemcpy(h_ans, d_ans, bytes, hipMemcpyDeviceToHost)) printf("Error copying data for d_ans\n");
	timeGPU = ((double)(clock() - startGPU))/CLOCKS_PER_SEC;//> Ending timer

	printf("Size m1 = %d x %d, m2 = %d x %d\n",N,N,N,N);
	printf("GPU time = %.6f seconds\n",timeGPU);//> Print time (include data copy back)

	//> Print result
	if (N <= 4){
		for(int m = 0; m < N; m++){
			for(int n = 0; n < N; n++){
				printf("%d,",h_ans[m * N + n]);
			}
				printf("\n");
		}
	}

	//> Free memory
	free(h_m1); free(h_m2); free(h_ans);
	hipFree(d_m1); hipFree(d_m2); hipFree(h_ans);

	return 0;
}
	.text
	.file	"matmult.hip"
	.globl	_Z25__device_stub__gpuMatmultPiS_S_i # -- Begin function _Z25__device_stub__gpuMatmultPiS_S_i
	.type	_Z25__device_stub__gpuMatmultPiS_S_i,@function
_Z25__device_stub__gpuMatmultPiS_S_i:   # @_Z25__device_stub__gpuMatmultPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10gpuMatmultPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__gpuMatmultPiS_S_i, .Lfunc_end0-_Z25__device_stub__gpuMatmultPiS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3d000000                      # float 0.03125
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI1_1:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4, %ebx
	cmpl	$2, %edi
	jne	.LBB1_2
# %bb.1:
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
.LBB1_2:
	movl	%ebx, %ebp
	imull	%ebp, %ebp
	leaq	(,%rbp,4), %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, (%rsp)                    # 8-byte Spill
	testl	%ebx, %ebx
	je	.LBB1_5
# %bb.3:                                # %.lr.ph.preheader
	cmpq	$1, %rbp
	movq	%rbp, %rdx
	adcq	$0, %rdx
	shlq	$2, %rdx
	xorl	%r14d, %r14d
	movq	(%rsp), %rdi                    # 8-byte Reload
	xorl	%esi, %esi
	callq	memset@PLT
	cmpl	$2, %ebp
	movl	$1, %eax
	cmovael	%ebp, %eax
.LBB1_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%r14d, (%r15,%r14,4)
	movl	%r14d, (%r12,%r14,4)
	incq	%r14
	cmpq	%r14, %rax
	jne	.LBB1_4
.LBB1_5:                                # %._crit_edge
	leaq	16(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_7
# %bb.6:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB1_7:
	leaq	8(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_9
# %bb.8:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.LBB1_9:
	leaq	24(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_11
# %bb.10:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
.LBB1_11:
	movq	16(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_13
# %bb.12:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
.LBB1_13:
	movq	8(%rsp), %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_15
# %bb.14:
	movl	$.Lstr.4, %edi
	callq	puts@PLT
.LBB1_15:
	cvtsi2ss	%ebx, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %eax
	movq	%rax, %rbp
	shlq	$32, %rbp
	orq	%rax, %rbp
	callq	clock
	movq	%rax, %r14
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movq	%rbp, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_17
# %bb.16:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	%ebx, %ecx
	callq	_Z25__device_stub__gpuMatmultPiS_S_i
.LBB1_17:
	movq	%r12, 40(%rsp)                  # 8-byte Spill
	movq	%r15, 48(%rsp)                  # 8-byte Spill
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_19
# %bb.18:
	movl	$.Lstr.5, %edi
	callq	puts@PLT
.LBB1_19:
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdi                    # 8-byte Reload
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_21
# %bb.20:
	movl	$.Lstr.6, %edi
	callq	puts@PLT
.LBB1_21:
	callq	clock
	subq	%r14, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI1_1(%rip), %xmm0
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	movl	$.L.str.7, %edi
	movl	%ebx, %esi
	movl	%ebx, %edx
	movl	%ebx, %ecx
	movl	%ebx, %r8d
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.8, %edi
	movsd	32(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	leal	-1(%rbx), %eax
	cmpl	$3, %eax
	ja	.LBB1_26
# %bb.22:                               # %.preheader.lr.ph
	movl	%ebx, %r13d
	xorl	%ebp, %ebp
	xorl	%r14d, %r14d
.LBB1_23:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_24 Depth 2
	movl	%ebp, %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	xorl	%r12d, %r12d
.LBB1_24:                               #   Parent Loop BB1_23 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r15,%r12,4), %esi
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r12
	cmpq	%r12, %r13
	jne	.LBB1_24
# %bb.25:                               # %._crit_edge81
                                        #   in Loop: Header=BB1_23 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addl	%ebx, %ebp
	cmpq	%r13, %r14
	jne	.LBB1_23
.LBB1_26:                               # %.loopexit
	movq	48(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	(%rsp), %rbx                    # 8-byte Reload
	movq	%rbx, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10gpuMatmultPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10gpuMatmultPiS_S_i,@object   # @_Z10gpuMatmultPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z10gpuMatmultPiS_S_i
	.p2align	3, 0x0
_Z10gpuMatmultPiS_S_i:
	.quad	_Z25__device_stub__gpuMatmultPiS_S_i
	.size	_Z10gpuMatmultPiS_S_i, 8

	.type	.L.str.7,@object                # @.str.7
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.7:
	.asciz	"Size m1 = %d x %d, m2 = %d x %d\n"
	.size	.L.str.7, 33

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"GPU time = %.6f seconds\n"
	.size	.L.str.8, 25

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"%d,"
	.size	.L.str.9, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10gpuMatmultPiS_S_i"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Error allocating mem. for d_m1"
	.size	.Lstr, 31

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Error allocating mem. for d_m2"
	.size	.Lstr.1, 31

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Error allocating mem. for d_ans"
	.size	.Lstr.2, 32

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Error copying data for d_m1"
	.size	.Lstr.3, 28

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Error copying data for d_m2"
	.size	.Lstr.4, 28

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Error calling kernel"
	.size	.Lstr.5, 21

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"Error copying data for d_ans"
	.size	.Lstr.6, 29

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__gpuMatmultPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10gpuMatmultPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10gpuMatmultPiS_S_i   ; -- Begin function _Z10gpuMatmultPiS_S_i
	.globl	_Z10gpuMatmultPiS_S_i
	.p2align	8
	.type	_Z10gpuMatmultPiS_S_i,@function
_Z10gpuMatmultPiS_S_i:                  ; @_Z10gpuMatmultPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e64 s2, v2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v1, v1, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s3, s2
	v_mov_b32_e32 v5, v0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_add_i32 s3, s3, -1
	s_cmp_lg_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s6, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	global_load_b32 v8, v[3:4], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
	s_cbranch_scc1 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v2, 0
.LBB0_5:                                ; %._crit_edge
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10gpuMatmultPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10gpuMatmultPiS_S_i, .Lfunc_end0-_Z10gpuMatmultPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 352
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10gpuMatmultPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10gpuMatmultPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
