#include<stdio.h>
#include<iostream>
#include <stdlib.h>
#include <algorithm>

#define MAX_BLOCK_DIM_SIZE 65535

using namespace std;

__global__ void reduce(int *g_idata, int *g_odata, int num_bytes) {
	
	// create shared memory array
	extern __shared__ int sdata[];	

	// each thread loads one element from global to shared mem	
	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	sdata[tid] = g_idata[i];

	// sync threads 
	__syncthreads();
	
	
	// do reduction in shared mem
	// s = 1,2,4,8,...
	for(unsigned int s=1; s < blockDim.x; s *= 2) {
		// if tid is multiple of 2,4,8,....
		if (tid % (2*s) == 0) {
			// ie: sdata[4] += sdata[4+2]
			//   sdata[6] += sdata[6+2]
			sdata[tid] += sdata[tid + s];
		}
		__syncthreads();
	}
	// now they are all added up...
	// write result for this block to global mem
	if (tid == 0) g_odata[blockIdx.x] = sdata[0];
}




////////////////////////////////////////////////////////////////////////////////
// Compute the number of threads and blocks to use for the given reduction kernel
// For the kernels >= 3, we set threads / block to the minimum of maxThreads and
// n/2. For kernels < 3, we set to the minimum of maxThreads and n.  For kernel 
// 6, we observe the maximum specified number of blocks, because each thread in 
// that kernel can process a variable number of elements.
////////////////////////////////////////////////////////////////////////////////
unsigned int nextPow2( unsigned int x ) {
    --x;
    x |= x >> 1;
    x |= x >> 2;
    x |= x >> 4;
    x |= x >> 8;
    x |= x >> 16;
    return ++x;
}

#define MIN(x,y) ((x < y) ? x : y)


void getNumBlocksAndThreads(int whichKernel, int n, int maxBlocks, int maxThreads, int &blocks, int &threads)
{
    
    if (whichKernel < 3)
    {
        threads = (n < maxThreads) ? nextPow2(n) : maxThreads;
        blocks = (n + threads - 1) / threads;
    }
    else
    {
        threads = (n < maxThreads*2) ? nextPow2((n + 1)/ 2) : maxThreads;
        blocks = (n + (threads * 2 - 1)) / (threads * 2);
    }
        

    if (whichKernel == 6)
        blocks = MIN(maxBlocks, blocks);
}



int main()
{
	// Number of values to be added together / averaged / whatever.
	int Nvals = 1<<18; //pow(2,22);
	
	// Number of Threads
	int maxThreads = 256;
	//int Threads = 256;//Nvals;//256;
	//int numThreads = 256;//Nvals;//256;
	
	// Number of Blocks
	int maxBlocks = MIN( Nvals / maxThreads, MAX_BLOCK_DIM_SIZE);//64;
	//int numBlocks = 64;
	

	int num_bytes = Nvals*sizeof(int);
		
	// Allocate memory on host (CPU)
	int* h_idata = (int*)malloc(num_bytes);
	int* h_odata = (int*)malloc(num_bytes);

	int* d_idata=0;
	int* d_odata=0;	
	
	// Allocate memory on device (GPU)
    cudaMalloc((void**)&d_idata,num_bytes);
	cudaMalloc((void**)&d_odata,num_bytes);


	// Check to see that there was enough memory for both 
    // allocations.
    // If the memory allocation fails, it doesn't change the 
    // pointer value. That is why we set them to be 0 at declaration,
    // and then see if they have changed or stayed the same. 
    if (0==h_idata || 0==d_odata)
    {
        printf("couldn't allocate memory\n");
        return 1;
    }

	// Initialize array to all 0's
    cudaMemset(d_idata,0,num_bytes);
	cudaMemset(d_odata,0,num_bytes);


	// Let's create random numbers for input on CPU
	int sum=0;
	for(int i=0; i<Nvals; i++) {
		h_idata[i] = (int)(rand() % 100);
		sum += h_idata[i];
		//std::cout<<h_idata[i]<<std::endl;
	}

	

	// copy it over
	cudaMemcpy(d_idata,h_idata,num_bytes,cudaMemcpyHostToDevice);

	int s=Nvals;
	int threads=s;
	int blocks=256;
	
//	for(int j = 4; j>0; j--){
//		if(j==4) s=Nvals;
//		if(j==3) s=Nvals/(1<<6);
//		if(j==2) s=Nvals/(1<<12);
//		if(j==2) s=Nvals/(1<<18);
					
	//	getNumBlocksAndThreads(6, s, maxBlocks, maxThreads, blocks, threads);
	
		blocks=256;
		threads = blocks / 2;
				
		cout<<blocks<<" Blocks, "<<threads<<" Threads"<<endl; 
		
		// Still don't really know what I'm doing here 	
		dim3 grid,block;
		block.x = blocks;
		// block.y = 4;
		grid.x = Nvals/block.x;
		//grid.y = NPTS/block.y;
	
	
		int smemSize = (threads <= 32) ? 2 * threads * sizeof(int) : threads * sizeof(int);

		reduce<<< grid, block, smemSize >>>(d_idata, d_odata, num_bytes);

		block.x = 4;
		Nvals = Nvals / blocks;
		grid.x = Nvals/block.x;	
		
		
		

//	}
	// copy it back
	cudaMemcpy(h_odata,d_odata,num_bytes,cudaMemcpyDeviceToHost);

	for(int i=0; i<Nvals; i++) {
		if(h_odata[i] == 0) continue; 
			else{std::cout <<i<<" "<<h_odata[i]<<std::endl;}			
	}


	printf("%d \n",h_odata[0]);
	
	
	printf("Should be %d \n",sum);

	

 
	return 0;		

}

	.file	"tmpxft_0033c1b9_00000000-6_parallel_reduction.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3894:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3894:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8nextPow2j
	.type	_Z8nextPow2j, @function
_Z8nextPow2j:
.LFB3889:
	.cfi_startproc
	endbr64
	decl	%edi
	movl	%edi, %eax
	shrl	%eax
	orl	%edi, %eax
	movl	%eax, %edi
	shrl	$2, %edi
	orl	%eax, %edi
	movl	%edi, %eax
	shrl	$4, %eax
	orl	%edi, %eax
	movl	%eax, %edx
	shrl	$8, %edx
	orl	%eax, %edx
	movl	%edx, %eax
	shrl	$16, %eax
	orl	%edx, %eax
	incl	%eax
	ret
	.cfi_endproc
.LFE3889:
	.size	_Z8nextPow2j, .-_Z8nextPow2j
	.globl	_Z22getNumBlocksAndThreadsiiiiRiS_
	.type	_Z22getNumBlocksAndThreadsiiiiRiS_, @function
_Z22getNumBlocksAndThreadsiiiiRiS_:
.LFB3890:
	.cfi_startproc
	endbr64
	movl	%edi, %r11d
	movl	%edx, %r10d
	cmpl	$2, %edi
	jg	.L4
	cmpl	%esi, %ecx
	jle	.L5
	movl	%esi, %edi
	call	_Z8nextPow2j
	movl	%eax, %ecx
.L5:
	leal	-1(%rsi,%rcx), %eax
	cltd
	idivl	%ecx
	jmp	.L6
.L4:
	leal	(%rcx,%rcx), %eax
	cmpl	%esi, %eax
	jle	.L7
	leal	1(%rsi), %eax
	movl	$2, %ecx
	cltd
	idivl	%ecx
	movl	%eax, %edi
	call	_Z8nextPow2j
	movl	%eax, %ecx
.L7:
	leal	(%rcx,%rcx), %edi
	leal	-1(%rdi,%rsi), %eax
	cltd
	idivl	%edi
	cmpl	$6, %r11d
	jne	.L6
	cmpl	%r10d, %eax
	cmovg	%r10d, %eax
.L6:
	movl	%ecx, (%r9)
	movl	%eax, (%r8)
	ret
	.cfi_endproc
.LFE3890:
	.size	_Z22getNumBlocksAndThreadsiiiiRiS_, .-_Z22getNumBlocksAndThreadsiiiiRiS_
	.globl	_Z28__device_stub__Z6reducePiS_iPiS_i
	.type	_Z28__device_stub__Z6reducePiS_iPiS_i, @function
_Z28__device_stub__Z6reducePiS_iPiS_i:
.LFB3916:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6reducePiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L9:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3916:
	.size	_Z28__device_stub__Z6reducePiS_iPiS_i, .-_Z28__device_stub__Z6reducePiS_iPiS_i
	.globl	_Z6reducePiS_i
	.type	_Z6reducePiS_i, @function
_Z6reducePiS_i:
.LFB3917:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z6reducePiS_iPiS_i
	.cfi_endproc
.LFE3917:
	.size	_Z6reducePiS_i, .-_Z6reducePiS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"couldn't allocate memory\n"
.LC1:
	.string	" Blocks, "
.LC2:
	.string	" Threads"
.LC3:
	.string	" "
.LC4:
	.string	"%d \n"
.LC5:
	.string	"Should be %d \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3891:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$1048576, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$1048576, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rsp, %rdi
	movl	$1048576, %esi
	movq	%rax, %rbx
	xorl	%eax, %eax
	movq	%rax, (%rsp)
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$1048576, %esi
	call	cudaMalloc@PLT
	testq	%rbp, %rbp
	je	.L15
	cmpq	$0, 8(%rsp)
	jne	.L16
.L15:
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L14
.L16:
	movq	(%rsp), %rdi
	movl	$1048576, %edx
	xorl	%esi, %esi
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
	movl	$100, %r14d
	call	cudaMemset@PLT
	movq	8(%rsp), %rdi
	movl	$1048576, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
.L18:
	call	rand@PLT
	cltd
	idivl	%r14d
	movl	%edx, 0(%rbp,%r12,4)
	incq	%r12
	addl	%edx, %r13d
	cmpq	$262144, %r12
	jne	.L18
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$1048576, %edx
	movq	%rbp, %rsi
	leaq	_ZSt4cout(%rip), %r12
	call	cudaMemcpy@PLT
	movl	$256, %esi
	movq	%r12, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$128, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$16777217, %edx
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	salq	$8, %rdx
	salq	$10, %rdi
	movl	$512, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$1048576, %edx
	call	_Z28__device_stub__Z6reducePiS_iPiS_i
.L19:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	xorl	%ebp, %ebp
	movl	$1048576, %edx
	leaq	.LC3(%rip), %r14
	call	cudaMemcpy@PLT
.L21:
	cmpl	$0, (%rbx,%rbp,4)
	je	.L20
	movl	%ebp, %esi
	movq	%r12, %rdi
	call	_ZNSolsEi@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	(%rbx,%rbp,4), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L20:
	incq	%rbp
	cmpq	$1024, %rbp
	jne	.L21
	movl	(%rbx), %edx
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r13d, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC5(%rip), %rsi
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L14:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3891:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z6reducePiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3919:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6reducePiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3919:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdio.h>
#include<iostream>
#include <stdlib.h>
#include <algorithm>

#define MAX_BLOCK_DIM_SIZE 65535

using namespace std;

__global__ void reduce(int *g_idata, int *g_odata, int num_bytes) {
	
	// create shared memory array
	extern __shared__ int sdata[];	

	// each thread loads one element from global to shared mem	
	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	sdata[tid] = g_idata[i];

	// sync threads 
	__syncthreads();
	
	
	// do reduction in shared mem
	// s = 1,2,4,8,...
	for(unsigned int s=1; s < blockDim.x; s *= 2) {
		// if tid is multiple of 2,4,8,....
		if (tid % (2*s) == 0) {
			// ie: sdata[4] += sdata[4+2]
			//   sdata[6] += sdata[6+2]
			sdata[tid] += sdata[tid + s];
		}
		__syncthreads();
	}
	// now they are all added up...
	// write result for this block to global mem
	if (tid == 0) g_odata[blockIdx.x] = sdata[0];
}




////////////////////////////////////////////////////////////////////////////////
// Compute the number of threads and blocks to use for the given reduction kernel
// For the kernels >= 3, we set threads / block to the minimum of maxThreads and
// n/2. For kernels < 3, we set to the minimum of maxThreads and n.  For kernel 
// 6, we observe the maximum specified number of blocks, because each thread in 
// that kernel can process a variable number of elements.
////////////////////////////////////////////////////////////////////////////////
unsigned int nextPow2( unsigned int x ) {
    --x;
    x |= x >> 1;
    x |= x >> 2;
    x |= x >> 4;
    x |= x >> 8;
    x |= x >> 16;
    return ++x;
}

#define MIN(x,y) ((x < y) ? x : y)


void getNumBlocksAndThreads(int whichKernel, int n, int maxBlocks, int maxThreads, int &blocks, int &threads)
{
    
    if (whichKernel < 3)
    {
        threads = (n < maxThreads) ? nextPow2(n) : maxThreads;
        blocks = (n + threads - 1) / threads;
    }
    else
    {
        threads = (n < maxThreads*2) ? nextPow2((n + 1)/ 2) : maxThreads;
        blocks = (n + (threads * 2 - 1)) / (threads * 2);
    }
        

    if (whichKernel == 6)
        blocks = MIN(maxBlocks, blocks);
}



int main()
{
	// Number of values to be added together / averaged / whatever.
	int Nvals = 1<<18; //pow(2,22);
	
	// Number of Threads
	int maxThreads = 256;
	//int Threads = 256;//Nvals;//256;
	//int numThreads = 256;//Nvals;//256;
	
	// Number of Blocks
	int maxBlocks = MIN( Nvals / maxThreads, MAX_BLOCK_DIM_SIZE);//64;
	//int numBlocks = 64;
	

	int num_bytes = Nvals*sizeof(int);
		
	// Allocate memory on host (CPU)
	int* h_idata = (int*)malloc(num_bytes);
	int* h_odata = (int*)malloc(num_bytes);

	int* d_idata=0;
	int* d_odata=0;	
	
	// Allocate memory on device (GPU)
    hipMalloc((void**)&d_idata,num_bytes);
	hipMalloc((void**)&d_odata,num_bytes);


	// Check to see that there was enough memory for both 
    // allocations.
    // If the memory allocation fails, it doesn't change the 
    // pointer value. That is why we set them to be 0 at declaration,
    // and then see if they have changed or stayed the same. 
    if (0==h_idata || 0==d_odata)
    {
        printf("couldn't allocate memory\n");
        return 1;
    }

	// Initialize array to all 0's
    hipMemset(d_idata,0,num_bytes);
	hipMemset(d_odata,0,num_bytes);


	// Let's create random numbers for input on CPU
	int sum=0;
	for(int i=0; i<Nvals; i++) {
		h_idata[i] = (int)(rand() % 100);
		sum += h_idata[i];
		//std::cout<<h_idata[i]<<std::endl;
	}

	

	// copy it over
	hipMemcpy(d_idata,h_idata,num_bytes,hipMemcpyHostToDevice);

	int s=Nvals;
	int threads=s;
	int blocks=256;
	
//	for(int j = 4; j>0; j--){
//		if(j==4) s=Nvals;
//		if(j==3) s=Nvals/(1<<6);
//		if(j==2) s=Nvals/(1<<12);
//		if(j==2) s=Nvals/(1<<18);
					
	//	getNumBlocksAndThreads(6, s, maxBlocks, maxThreads, blocks, threads);
	
		blocks=256;
		threads = blocks / 2;
				
		cout<<blocks<<" Blocks, "<<threads<<" Threads"<<endl; 
		
		// Still don't really know what I'm doing here 	
		dim3 grid,block;
		block.x = blocks;
		// block.y = 4;
		grid.x = Nvals/block.x;
		//grid.y = NPTS/block.y;
	
	
		int smemSize = (threads <= 32) ? 2 * threads * sizeof(int) : threads * sizeof(int);

		reduce<<< grid, block, smemSize >>>(d_idata, d_odata, num_bytes);

		block.x = 4;
		Nvals = Nvals / blocks;
		grid.x = Nvals/block.x;	
		
		
		

//	}
	// copy it back
	hipMemcpy(h_odata,d_odata,num_bytes,hipMemcpyDeviceToHost);

	for(int i=0; i<Nvals; i++) {
		if(h_odata[i] == 0) continue; 
			else{std::cout <<i<<" "<<h_odata[i]<<std::endl;}			
	}


	printf("%d \n",h_odata[0]);
	
	
	printf("Should be %d \n",sum);

	

 
	return 0;		

}

	.text
	.file	"parallel_reduction.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__reducePiS_i  # -- Begin function _Z21__device_stub__reducePiS_i
	.type	_Z21__device_stub__reducePiS_i,@function
_Z21__device_stub__reducePiS_i:         # @_Z21__device_stub__reducePiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6reducePiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__reducePiS_i, .Lfunc_end0-_Z21__device_stub__reducePiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z8nextPow2j                    # -- Begin function _Z8nextPow2j
	.type	_Z8nextPow2j,@function
_Z8nextPow2j:                           # @_Z8nextPow2j
	.cfi_startproc
# %bb.0:
                                        # kill: def $edi killed $edi def $rdi
	leal	-1(%rdi), %eax
	movl	%eax, %ecx
	shrl	%ecx
	orl	%eax, %ecx
	movl	%ecx, %eax
	shrl	$2, %eax
	orl	%ecx, %eax
	movl	%eax, %ecx
	shrl	$4, %ecx
	orl	%eax, %ecx
	movl	%ecx, %edx
	shrl	$8, %edx
	orl	%ecx, %edx
	movl	%edx, %eax
	shrl	$16, %eax
	orl	%edx, %eax
	incl	%eax
	retq
.Lfunc_end1:
	.size	_Z8nextPow2j, .Lfunc_end1-_Z8nextPow2j
	.cfi_endproc
                                        # -- End function
	.globl	_Z22getNumBlocksAndThreadsiiiiRiS_ # -- Begin function _Z22getNumBlocksAndThreadsiiiiRiS_
	.type	_Z22getNumBlocksAndThreadsiiiiRiS_,@function
_Z22getNumBlocksAndThreadsiiiiRiS_:     # @_Z22getNumBlocksAndThreadsiiiiRiS_
	.cfi_startproc
# %bb.0:
                                        # kill: def $ecx killed $ecx def $rcx
                                        # kill: def $esi killed $esi def $rsi
	cmpl	$2, %edi
	jg	.LBB2_4
# %bb.1:
	leal	-1(%rsi), %eax
	cmpl	%ecx, %esi
	jge	.LBB2_3
# %bb.2:
	movl	%eax, %ecx
	shrl	%ecx
	orl	%eax, %ecx
	movl	%ecx, %edx
	shrl	$2, %edx
	orl	%ecx, %edx
	movl	%edx, %ecx
	shrl	$4, %ecx
	orl	%edx, %ecx
	movl	%ecx, %edx
	shrl	$8, %edx
	orl	%ecx, %edx
	movl	%edx, %ecx
	shrl	$16, %ecx
	orl	%edx, %ecx
	incl	%ecx
.LBB2_3:                                # %.thread
	movl	%ecx, (%r9)
	addl	%ecx, %eax
	cltd
	idivl	%ecx
	movl	%eax, %r10d
	jmp	.LBB2_8
.LBB2_4:
	movl	%edx, %r10d
	leal	(%rcx,%rcx), %r11d
	cmpl	%esi, %r11d
	jle	.LBB2_6
# %bb.5:
	leal	1(%rsi), %eax
	shrl	$31, %eax
	addl	%esi, %eax
	incl	%eax
	sarl	%eax
	decl	%eax
	movl	%eax, %ecx
	shrl	%ecx
	orl	%eax, %ecx
	movl	%ecx, %eax
	shrl	$2, %eax
	orl	%ecx, %eax
	movl	%eax, %ecx
	shrl	$4, %ecx
	orl	%eax, %ecx
	movl	%ecx, %eax
	shrl	$8, %eax
	orl	%ecx, %eax
	movl	%eax, %ecx
	shrl	$16, %ecx
	orl	%eax, %ecx
	leal	2(,%rcx,2), %r11d
                                        # kill: def $ecx killed $ecx killed $rcx def $rcx
	incl	%ecx
.LBB2_6:
	movl	%ecx, (%r9)
	leal	(%rsi,%r11), %eax
	decl	%eax
	cltd
	idivl	%r11d
	movl	%eax, (%r8)
	cmpl	$6, %edi
	jne	.LBB2_9
# %bb.7:
	cmpl	%r10d, %eax
	cmovll	%eax, %r10d
.LBB2_8:                                # %.sink.split
	movl	%r10d, (%r8)
.LBB2_9:
	retq
.Lfunc_end2:
	.size	_Z22getNumBlocksAndThreadsiiiiRiS_, .Lfunc_end2-_Z22getNumBlocksAndThreadsiiiiRiS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	movq	%rax, %r14
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	movq	%rax, %rbx
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	movq	%rax, (%rdi)
	leaq	8(%rsp), %r15
	movq	%rax, (%r15)
	movl	$1048576, %esi                  # imm = 0x100000
	callq	hipMalloc
	movl	$1048576, %esi                  # imm = 0x100000
	movq	%r15, %rdi
	callq	hipMalloc
	testq	%r14, %r14
	je	.LBB3_2
# %bb.1:
	cmpq	$0, 8(%rsp)
	je	.LBB3_2
# %bb.3:
	movq	16(%rsp), %rdi
	xorl	%r15d, %r15d
	movl	$1048576, %edx                  # imm = 0x100000
	xorl	%esi, %esi
	callq	hipMemset
	movq	8(%rsp), %rdi
	movl	$1048576, %edx                  # imm = 0x100000
	xorl	%esi, %esi
	callq	hipMemset
	xorl	%ebp, %ebp
.LBB3_4:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movl	%eax, (%r14,%r15,4)
	addl	%eax, %ebp
	incq	%r15
	cmpq	$262144, %r15                   # imm = 0x40000
	jne	.LBB3_4
# %bb.5:
	movq	16(%rsp), %rdi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$256, %esi                      # imm = 0x100
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.1, %esi
	movl	$9, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movl	$128, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.2, %esi
	movl	$8, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r14), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	leaq	768(%rdx), %rdi
	movl	$512, %r8d                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_7
# %bb.6:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	_Z21__device_stub__reducePiS_i
.LBB3_7:
	movq	8(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r14d, %r14d
.LBB3_8:                                # =>This Inner Loop Header: Depth=1
	cmpl	$0, (%rbx,%r14,4)
	je	.LBB3_10
# %bb.9:                                #   in Loop: Header=BB3_8 Depth=1
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.3, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%rbx,%r14,4), %esi
	movq	%r15, %rdi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB3_10:                               #   in Loop: Header=BB3_8 Depth=1
	incq	%r14
	cmpq	$1024, %r14                     # imm = 0x400
	jne	.LBB3_8
# %bb.11:
	movl	(%rbx), %esi
	xorl	%ebx, %ebx
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.5, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB3_12
.LBB3_2:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1, %ebx
.LBB3_12:
	movl	%ebx, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6reducePiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6reducePiS_i,@object          # @_Z6reducePiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z6reducePiS_i
	.p2align	3, 0x0
_Z6reducePiS_i:
	.quad	_Z21__device_stub__reducePiS_i
	.size	_Z6reducePiS_i, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	" Blocks, "
	.size	.L.str.1, 10

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" Threads"
	.size	.L.str.2, 9

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" "
	.size	.L.str.3, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%d \n"
	.size	.L.str.4, 5

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Should be %d \n"
	.size	.L.str.5, 15

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6reducePiS_i"
	.size	.L__unnamed_1, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"couldn't allocate memory"
	.size	.Lstr, 25

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__reducePiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6reducePiS_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6reducePiS_i          ; -- Begin function _Z6reducePiS_i
	.globl	_Z6reducePiS_i
	.p2align	8
	.type	_Z6reducePiS_i,@function
_Z6reducePiS_i:                         ; @_Z6reducePiS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x24
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	s_cmp_lt_u32 s5, 2
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph.preheader
	s_mov_b32 s1, 1
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s0, s1, 1
	s_add_i32 s6, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, s6, v0
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshl_add_u32 v2, s1, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_cmp_ge_u32 s0, s5
	s_mov_b32 s1, s0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_add_u32 s0, s2, s0
	ds_load_b32 v1, v0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB0_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6reducePiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6reducePiS_i, .Lfunc_end0-_Z6reducePiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 304
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6reducePiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6reducePiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
