#include <stdint.h>
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <iostream>
#include <stdio.h>
#include <algorithm>
#include <stddef.h>
// helper functions and utilities to work with CUDA
// #include <helper_functions.h>
// #include <helper_cuda.h>
#define CORRECTNONCE 235472032
#define MAXNONCE 10000000
#define NUMTHREAD 131072
#define BLOCKSIZE 256
#define NO_DEVICE 1
#define STARTATNONCE CORRECTNONCE-MAXNONCE+1

// -----------------------------------------------------------------------------------------------------------------------------------
typedef unsigned char BYTE; // 8-bit byte
typedef uint32_t  WORD; // 32-bit word
// -----------------------------------------------------------------------------------------------------------------------------------
#define ipad_elm 0x36363636
#define opad_elm 0x5c5c5c5c
#define SUM(a,b) (a+b) & 0xffffffff
// -----------------------------------------------------------------------------------------------------------------------------------
#define h0 0x6a09e667
#define h1 0xbb67ae85
#define h2 0x3c6ef372
#define h3 0xa54ff53a
#define h4 0x510e527f
#define h5 0x9b05688c
#define h6 0x1f83d9ab
#define h7 0x5be0cd19


// Macros
#define SHA256_BLOCK_SIZE 32 

#define ROTLEFT(a,b) (((a) << (b)) | ((a) >> (32-(b))))
#define ROTRIGHT(a,b) (((a) >> (b)) | ((a) << (32-(b))))

#define CH(x,y,z) (((x) & (y)) ^ (~(x) & (z)))
#define MAJ(x,y,z) (((x) & (y)) ^ ((x) & (z)) ^ ((y) & (z)))
#define EP0(x) (ROTRIGHT(x,2) ^ ROTRIGHT(x,13) ^ (ROTRIGHT(x,22)))
#define EP1(x) (ROTRIGHT(x,6) ^ ROTRIGHT(x,11) ^ (ROTRIGHT(x,25)))
#define SIG0(x) (ROTRIGHT(x,7) ^ ROTRIGHT(x,18) ^ ((x) >> 3))
#define SIG1(x) (ROTRIGHT(x,17) ^ ROTRIGHT(x,19) ^ ((x) >> 10))


typedef struct SHA256_CTX
{
    BYTE data[64];
    WORD datalen;
    unsigned long long bitlen;
    WORD state[8];
} SHA256_CTX;
typedef struct SHA256_CTX_W
{
    WORD data[16];
    WORD datalen;
    unsigned long long bitlen;
    WORD state[8];
} SHA256_CTX_W;



typedef struct SCRYPT_PKG{
    SHA256_CTX_W ctx;
    WORD input[20];
    WORD output[8];
    WORD mem[1024][32];
    WORD salt[21];
    WORD hmac_out[8];
    
    WORD in_ihash[37];
    WORD in_2_ihash[49];
    WORD pbkdf2_rm_out[32];
    WORD ihash[8];
    WORD khash[8];
    WORD in_ohash[24];
    
}SCRYPT_PKG;

// -----------------------------------------------------------------------------------------------------------------------------------

#define SALSA_MIX(destination ,a1, a2, b) (destination ^ (ROTLEFT(SUM(a1,a2),b)))






#define ipad_elm 0x36363636
#define opad_elm 0x5c5c5c5c
#define SUM(a,b) (a+b) & 0xffffffff


__device__ BYTE hex_char_to_byte(char hex_char){
    if(hex_char >= 'a' && hex_char <='f'){
        return hex_char - 'a' + 10;
    }
    else if(hex_char >='A' && hex_char <= 'F'){
        return hex_char - 'A' + 10;
    } else if (hex_char >='0' && hex_char <= '9')
    {
        return hex_char - '0';
    }
    return 0;
}

BYTE hex_char_to_byte_host(char hex_char){
    if(hex_char >= 'a' && hex_char <='f'){
        return hex_char - 'a' + 10;
    }
    else if(hex_char >='A' && hex_char <= 'F'){
        return hex_char - 'A' + 10;
    } else if (hex_char >='0' && hex_char <= '9')
    {
        return hex_char - '0';
    }
    return 0;
}
__device__ void hex_string_to_bytes(char hex_str_in[], unsigned long hex_str_len, BYTE bytes_out[]){
    for (int i = 0; i<hex_str_len-1; i+=2){
        bytes_out[i/2] = ((hex_char_to_byte(hex_str_in[i])) << 4) | (hex_char_to_byte(hex_str_in[i+1]));

    }
}

__device__ void hex_string_to_words(char hex_str_in[], unsigned long hex_str_len, WORD words_out[]){
    for (int i = 0; i<hex_str_len-1; i+=8){
        words_out[i/8] = (\
            hex_char_to_byte(hex_str_in[i])<<28|\
            (hex_char_to_byte(hex_str_in[i+1])<<24 & 0x0f000000)|\
            (hex_char_to_byte(hex_str_in[i+2])<<20 & 0x00f00000)|\
            (hex_char_to_byte(hex_str_in[i+3])<<16 & 0x000f0000)|\
            (hex_char_to_byte(hex_str_in[i+4])<<12 & 0x0000f000)|\
            (hex_char_to_byte(hex_str_in[i+5])<<8  & 0x00000f00)|\
            (hex_char_to_byte(hex_str_in[i+6])<<4  & 0x000000f0)|\
            (hex_char_to_byte(hex_str_in[i+7])     & 0x0000000f)\
        );
        // printf("%08x  %d\n", words_out[i/8], i/8);
    }
}

void hex_string_to_words_host(char hex_str_in[], unsigned long hex_str_len, WORD words_out[]){
    for (int i = 0; i<hex_str_len-1; i+=8){
        words_out[i/8] = (\
            hex_char_to_byte_host(hex_str_in[i])<<28|\
            (hex_char_to_byte_host(hex_str_in[i+1])<<24 & 0x0f000000)|\
            (hex_char_to_byte_host(hex_str_in[i+2])<<20 & 0x00f00000)|\
            (hex_char_to_byte_host(hex_str_in[i+3])<<16 & 0x000f0000)|\
            (hex_char_to_byte_host(hex_str_in[i+4])<<12 & 0x0000f000)|\
            (hex_char_to_byte_host(hex_str_in[i+5])<<8  & 0x00000f00)|\
            (hex_char_to_byte_host(hex_str_in[i+6])<<4  & 0x000000f0)|\
            (hex_char_to_byte_host(hex_str_in[i+7])     & 0x0000000f)\
        );
        // printf("%08x  %d\n", words_out[i/8], i/8);
    }
}
__device__ void half_byte_to_hex(BYTE half_byte_in, char *hex){
    BYTE half_byte_conv = half_byte_in & 0x0f;
    if(half_byte_conv<16){
        if (half_byte_conv>=10){
            *hex = 'a'+ half_byte_conv - 10;
            // printf("%c\n", *hex);
            return;
        }
        else{
            *hex = '0' + half_byte_conv;
            // printf("%c\n", *hex);
            return;
        }
    }
    printf("The half byte must be in range of [0:15]\n");
}

void half_byte_to_hex_host(BYTE half_byte_in, char *hex){
    BYTE half_byte_conv = half_byte_in & 0x0f;
    if(half_byte_conv<16){
        if (half_byte_conv>=10){
            *hex = 'a'+ half_byte_conv - 10;
            // printf("%c\n", *hex);
            return;
        }
        else{
            *hex = '0' + half_byte_conv;
            // printf("%c\n", *hex);
            return;
        }
    }
    printf("The half byte must be in range of [0:15]\n");
}
__device__ void word_to_hex_eight(WORD word_in, char *hex_eight, unsigned long hex_eight_size){
    if(hex_eight_size==8){
        half_byte_to_hex(word_in>>28, &hex_eight[0]);
        half_byte_to_hex(word_in>>24, &hex_eight[1]);
        half_byte_to_hex(word_in>>20, &hex_eight[2]);
        half_byte_to_hex(word_in>>16, &hex_eight[3]);
        half_byte_to_hex(word_in>>12, &hex_eight[4]);
        half_byte_to_hex(word_in>>8, &hex_eight[5]);
        half_byte_to_hex(word_in>>4, &hex_eight[6]);
        half_byte_to_hex(word_in, &hex_eight[7]);
        // printf("%c", hex_eight[0]);
        // printf("%d", word_in>>24);
        return;
    }
    printf("The hex_pair must have the length of two characters: %d\n", (int)hex_eight_size);
}

void word_to_hex_eight_host(WORD word_in, char *hex_eight, unsigned long hex_eight_size){
    if(hex_eight_size==8){
        half_byte_to_hex_host(word_in>>28, &hex_eight[0]);
        half_byte_to_hex_host(word_in>>24, &hex_eight[1]);
        half_byte_to_hex_host(word_in>>20, &hex_eight[2]);
        half_byte_to_hex_host(word_in>>16, &hex_eight[3]);
        half_byte_to_hex_host(word_in>>12, &hex_eight[4]);
        half_byte_to_hex_host(word_in>>8, &hex_eight[5]);
        half_byte_to_hex_host(word_in>>4, &hex_eight[6]);
        half_byte_to_hex_host(word_in, &hex_eight[7]);
        // printf("%c", hex_eight[0]);
        // printf("%d", word_in>>24);
        return;
    }
    printf("The hex_pair must have the length of two characters: %d\n", (int)hex_eight_size);
}

__device__ void words_to_hex_string(WORD *words_in, unsigned long words_len, char hex_str[], unsigned long hex_str_len){
    char hex_eight[8];
    if(hex_str_len == 8*words_len){
        for (int i = 0; i<words_len; ++i){
            // printf("\n w: %08x", words_in[i]);
            word_to_hex_eight(words_in[i], hex_eight, sizeof(hex_eight));
            hex_str[8*i] = hex_eight[0];
            hex_str[8*i+1] = hex_eight[1];
            hex_str[8*i+2] = hex_eight[2];
            hex_str[8*i+3] = hex_eight[3];
            hex_str[8*i+4] = hex_eight[4];
            hex_str[8*i+5] = hex_eight[5];
            hex_str[8*i+6] = hex_eight[6];
            hex_str[8*i+7] = hex_eight[7];
            // printf("%c \n", hex_eight[7]);
        }
        // printf("\n%s", hex_str);
        return;
    }
    printf("The hex_string must have the lenght of 4*bytes_len: %d\n", (int)hex_str_len);
}

__device__ void add_two_words_array_512_bit(WORD *a, WORD *b){
    
    for (int i = 15; i>=0; i--){

        a[i] += b[i];

    }
}

__device__ void add_two_words_array_512_bit_with_carry(WORD *a, WORD *b){
    WORD sum = 0;
    WORD sum1 = 0;
    
    for (int i = 15; i>=0; i--){

        sum = ((a[i]&0x0000ffff)+(b[i]&0x0000ffff)+(sum1>>16));
        sum1 = ((a[i]>>16)+(b[i]>>16)+(sum>>16));
        a[i]= (sum & 0x0000ffff) + (sum1<<16);

    }
}

__device__ void print_words_inline(WORD *w, unsigned long w_len){
    printf("\n");
    for (int i = 0; i< w_len; i++){
        printf("%08x", w[i]);
    }
    printf("\n");
}

void print_words_inline_host(WORD *w, unsigned long w_len){
    printf("\n");
    for (int i = 0; i< w_len; i++){
        printf("%08x", w[i]);
    }
    printf("\n");
}

void print_words_multiline_host(WORD *w, unsigned long w_len){
    printf("\n");
    for (int i = 0; i< w_len; i++){
        printf("%08x\n", w[i]);
    }
    printf("\n");
}

__device__ void print_words_multiline(WORD *w, unsigned long w_len){
    printf("\n");
    for (int i = 0; i< w_len; i++){
        printf("%08x\n", w[i]);
    }
    printf("\n");
}

__device__ void endian_cvt(WORD *w){
    WORD out;

    out = (*w>>24)|((*w>>8)&0x0000ff00)|((*w<<8)&0x00ff0000)|(*w<<24);

    *w = out;
}

__device__ void endian_full(WORD *w, unsigned long w_len){
    for (int i = 0; i < w_len; i++)
    {
        endian_cvt(&w[i]);
    }
}
void little_endian(char *c, unsigned long w_len){
    char *dc = (char*)malloc(w_len);

    for (int i = 0; i< w_len; i+=2){
        dc[w_len-2-i] = c[i];
        dc[w_len-1-i] = c[i+1];   
    }
    for (int i = 0; i< w_len; i++){
        c[i] = dc[i];

    }
    c[w_len] = '\0';
    
}

void endian_cvt_host(WORD *w){
    WORD out;

    out = (*w>>24)|((*w>>8)&0x0000ff00)|((*w<<8)&0x00ff0000)|(*w<<24);

    *w = out;
}

 
 // Create init state for SHA-256
 __device__ void sha256_init(SHA256_CTX *ctx)
 {
     ctx->datalen = 0;
     ctx->bitlen = 0;
     ctx->state[0] = h0;
     ctx->state[1] = h1;
     ctx->state[2] = h2;
     ctx->state[3] = h3;
     ctx->state[4] = h4;
     ctx->state[5] = h5;
     ctx->state[6] = h6;
     ctx->state[7] = h7;
 }
 
  // Create init state for SHA-256
  __device__ void sha256_init_words(SHA256_CTX_W *ctx)
  {
      ctx->datalen = 0;
      ctx->bitlen = 0;
      ctx->state[0] = h0;
      ctx->state[1] = h1;
      ctx->state[2] = h2;
      ctx->state[3] = h3;
      ctx->state[4] = h4;
      ctx->state[5] = h5;
      ctx->state[6] = h6;
      ctx->state[7] = h7;
  }
  
 __device__ void sha256_transform(SHA256_CTX *ctx, BYTE data[])
 {
    static const WORD k[64] = {0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5, \
        0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, \
        0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da, \
        0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967, \
        0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, \
        0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070, \
        0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3, \
        0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};
 // m is W in hardware design
   WORD a, b, c, d, e, f, g, h, i, j, t1, t2, m[64];
 // Calculate the first 16 m elements.
   for (i = 0, j = 0; i < 16; ++i, j += 4)
     m[i] = (data[j] << 24) | (data[j + 1] << 16) | (data[j + 2] << 8) | (data[j + 3]);
 // Calculate the remain elements.
   for ( ; i < 64; ++i)
     m[i] = SIG1(m[i - 2]) + m[i - 7] + SIG0(m[i - 15]) + m[i - 16];
 // update the new value of state after each block
   a = ctx->state[0];
   b = ctx->state[1];
   c = ctx->state[2];
   d = ctx->state[3];
   e = ctx->state[4];
   f = ctx->state[5];
   g = ctx->state[6];
   h = ctx->state[7];
 // process 64 rounds
   for (i = 0; i < 64; ++i) {
     t1 = h + EP1(e) + CH(e,f,g) + k[i] + m[i];
     t2 = EP0(a) + MAJ(a,b,c);
     h = g;
     g = f;
     f = e;
     e = d + t1;
     d = c;
     c = b;
     b = a;
     a = t1 + t2;
   }
 
   ctx->state[0] += a;
   ctx->state[1] += b;
   ctx->state[2] += c;
   ctx->state[3] += d;
   ctx->state[4] += e;
   ctx->state[5] += f;
   ctx->state[6] += g;
   ctx->state[7] += h;
 }

 __device__ void sha256_transform_words(SHA256_CTX_W *ctx, WORD data[])
 {
    static const WORD k[64] = {0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5, \
        0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, \
        0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da, \
        0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967, \
        0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, \
        0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070, \
        0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3, \
        0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};
 // m is W in hardware design
   WORD a, b, c, d, e, f, g, h, i, t1, t2, m[64];
 // Calculate the first 16 m elements.
   for (i = 0; i < 16; ++i)
     m[i] = data[i];
 // Calculate the remain elements.
   for ( ; i < 64; ++i)
     m[i] = SIG1(m[i - 2]) + m[i - 7] + SIG0(m[i - 15]) + m[i - 16];
 // update the new value of state after each block
   a = ctx->state[0];
   b = ctx->state[1];
   c = ctx->state[2];
   d = ctx->state[3];
   e = ctx->state[4];
   f = ctx->state[5];
   g = ctx->state[6];
   h = ctx->state[7];
 // process 64 rounds
   for (i = 0; i < 64; ++i) {
     t1 = h + EP1(e) + CH(e,f,g) + k[i] + m[i];
     t2 = EP0(a) + MAJ(a,b,c);
     h = g;
     g = f;
     f = e;
     e = d + t1;
     d = c;
     c = b;
     b = a;
     a = t1 + t2;
   }
 
   ctx->state[0] += a;
   ctx->state[1] += b;
   ctx->state[2] += c;
   ctx->state[3] += d;
   ctx->state[4] += e;
   ctx->state[5] += f;
   ctx->state[6] += g;
   ctx->state[7] += h;
 }
 // the total length of the message has to be specified
 __device__ void sha256_update(SHA256_CTX *ctx,  BYTE data[], size_t len)
 {
     WORD i;
 
     for (i = 0; i < len; ++i){
         ctx->data[ctx->datalen] = data[i];      // Pad data (message) for each 512-block in --> transform
         ctx->datalen++;
         // after browse for 64 bytes (512-bit block) -> transform the block.
         if(ctx->datalen == 64){
             sha256_transform(ctx, ctx->data);
             ctx->bitlen += 512; // increase the bit length by 512
             ctx->datalen = 0;
         }
     }
 }

 __device__ void sha256_update_words(SHA256_CTX_W *ctx, WORD data[], size_t len)
 {
     WORD i;
 
     for (i = 0; i < len; ++i){
         ctx->data[ctx->datalen] = data[i];      // Pad data (message) for each 512-block in --> transform
         ctx->datalen++;
         // after browse for 64 bytes (512-bit block) -> transform the block.
         if(ctx->datalen == 16){
             sha256_transform_words(ctx, ctx->data);
             ctx->bitlen += 512; // increase the bit length by 512
             ctx->datalen = 0;
         }
     }
 }
 // this function processes for the last block -> after all real data is browsed 
 __device__ void sha256_final(SHA256_CTX *ctx, WORD *hash){
     WORD i;
 // padding is processed from here
     i = ctx->datalen;
     if (ctx->datalen < 56){
         // add byte 0x80 at the first if the datalength is lower than 56
         ctx->data[i++] = 0x80;
         // pad the zero bytes until the byte 56th
         while (i<56)
         {
             ctx->data[i++]=0x00;
         }
     }
     else{
         // add byte at the first
         ctx->data[i++]=0x80;
         // pad zero bytes until the last block
         while (i<64){
             ctx->data[i++]=0x00;
         }
         // transform this block --> it's not the last block
         sha256_transform(ctx, ctx->data);
         // set 56 zero bytes from last_block[0:55]
         memset(ctx->data, 0, 56);
     }
 
     // Append to the padding the total message's length in bits and transform.
     ctx->bitlen += ctx->datalen * 8;
     ctx->data[63] = ctx->bitlen;
     ctx->data[62] = ctx->bitlen >> 8;
     ctx->data[61] = ctx->bitlen >> 16;
     ctx->data[60] = ctx->bitlen >> 24;
     ctx->data[59] = ctx->bitlen >> 32;
     ctx->data[58] = ctx->bitlen >> 40;
     ctx->data[57] = ctx->bitlen >> 48;
     ctx->data[56] = ctx->bitlen >> 56;
 // end padding
     sha256_transform(ctx, ctx->data);
 
     // Since this implementation uses little endian byte ordering and SHA uses big endian,
     // reverse all the bytes when copying the final state to the output hash.
 
 
         hash[0] = ctx->state[0];
         hash[1] = ctx->state[1];
         hash[2] = ctx->state[2];
         hash[3] = ctx->state[3];
         hash[4] = ctx->state[4];
         hash[5] = ctx->state[5];
         hash[6] = ctx->state[6];
         hash[7] = ctx->state[7]; 
  
 }
 
  // this function processes for the last block -> after all real data is browsed 
  __device__ void sha256_final_words(SHA256_CTX_W *ctx, WORD *hash){
    WORD i;
// padding is processed from here
    i = ctx->datalen;
    if (ctx->datalen < 14){
        // add byte 0x80 at the first if the datalength is lower than 56
        ctx->data[i++] = 0x80000000;
        // pad the zero bytes until the byte 56th
        while (i<14)
        {
            ctx->data[i++]=0x00000000;
        }
    }
    else{
        // add bit 1 at the first
        ctx->data[i++]=0x80000000;
        // pad zero bytes until the last block
        while (i<16){
            ctx->data[i++]=0x00000000;
        }
        // transform this block --> it's not the last block
        sha256_transform_words(ctx, ctx->data);
        // set 56 zero bytes from last_block[0:55]
        ctx->data[0] =0x00000000;
        ctx->data[1] =0x00000000;
        ctx->data[2] =0x00000000;
        ctx->data[3] =0x00000000;
        ctx->data[4] =0x00000000;
        ctx->data[5] =0x00000000;
        ctx->data[6] =0x00000000;
        ctx->data[7] =0x00000000;
        ctx->data[8] =0x00000000;
        ctx->data[9] =0x00000000;
        ctx->data[10]=0x00000000;
        ctx->data[11]=0x00000000;
        ctx->data[12]=0x00000000;
        ctx->data[13]=0x00000000;
    }

    // Append to the padding the total message's length in bits and transform.
    ctx->bitlen += ctx->datalen * 32;
    ctx->data[15] = ctx->bitlen;
    ctx->data[14] = ctx->bitlen>>32;


// end padding
    sha256_transform_words(ctx, ctx->data);

    // Since this implementation uses little endian byte ordering and SHA uses big endian,
    // reverse all the bytes when copying the final state to the output hash.


        hash[0] = ctx->state[0];
        hash[1] = ctx->state[1];
        hash[2] = ctx->state[2];
        hash[3] = ctx->state[3];
        hash[4] = ctx->state[4];
        hash[5] = ctx->state[5];
        hash[6] = ctx->state[6];
        hash[7] = ctx->state[7]; 
 
}

 __device__ void sha256_in_words(SHA256_CTX_W *ctx, WORD *words_in, unsigned long words_in_len, WORD *hash_w){

    // printf("\n%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", words_in[0], words_in[1], words_in[2], words_in[3], words_in[4], words_in[5], words_in[6], words_in[7], words_in[8], words_in[9], words_in[10], words_in[11], words_in[12], words_in[13], words_in[14], words_in[15], words_in[16], words_in[17], words_in[18], words_in[19], words_in[20], words_in[21], words_in[22], words_in[23]); // true

     sha256_init_words(ctx);
     
     sha256_update_words(ctx, words_in, words_in_len);
    //  print_words_inline(ctx->state, 8);
     sha256_final_words(ctx, hash_w);
     
 }
 
 __device__ void sha256_in_words_org(SHA256_CTX *ctx, WORD *words_in, unsigned long words_in_len, WORD *hash_w){
     unsigned long bytes_in_len = words_in_len * 4;
    //  printf("%d\n", words_in_len);
    // printf("\n%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", words_in[0], words_in[1], words_in[2], words_in[3], words_in[4], words_in[5], words_in[6], words_in[7], words_in[8], words_in[9], words_in[10], words_in[11], words_in[12], words_in[13], words_in[14], words_in[15], words_in[16], words_in[17], words_in[18], words_in[19], words_in[20], words_in[21], words_in[22], words_in[23]); // true
    BYTE *bytes_in = (BYTE *)malloc((bytes_in_len)*sizeof(BYTE));
     for (int i = 0; i<words_in_len; i++){
         bytes_in[4*i] = words_in[i] >> 24;
         bytes_in[4*i+1] = words_in[i] >> 16;
         bytes_in[4*i+2] = words_in[i] >> 8;
         bytes_in[4*i+3] = words_in[i];
        //  printf("%x %x %x %x ", bytes_in[4*i], bytes_in[4*i+1], bytes_in[4*i+2], bytes_in[4*i+3]);
     }
     sha256_init(ctx);
     
     sha256_update(ctx, bytes_in, bytes_in_len);
    //  print_words_inline(ctx->state, 8);
     sha256_final(ctx, hash_w);
     
 }
 __device__ void sha256_in_words_test(SHA256_CTX_W *ctx, WORD *words_in, unsigned long words_in_len, WORD *hash_w){

   //  printf("%d\n", words_in_len);
   // printf("\n%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", words_in[0], words_in[1], words_in[2], words_in[3], words_in[4], words_in[5], words_in[6], words_in[7], words_in[8], words_in[9], words_in[10], words_in[11], words_in[12], words_in[13], words_in[14], words_in[15], words_in[16], words_in[17], words_in[18], words_in[19], words_in[20], words_in[21], words_in[22], words_in[23]); // true
   
   

    sha256_init_words(ctx);
    
    sha256_update_words(ctx, words_in, words_in_len);
   //  print_words_inline(ctx->state, 8);
    sha256_final_words(ctx, hash_w);
    
}


__device__ void hmac(SHA256_CTX_W *ctx, WORD *salt, unsigned long salt_len, WORD *message, unsigned long message_len, WORD* out_hmac){
     WORD IPAD[8] = {ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm}; // 256-bit 363636...36   
     WORD OPAD[8] = {opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm}; // 256-bit 5c5c5c...5c
    WORD *khash = (WORD*) malloc(sizeof(WORD)*8);
    // print_words_inline(message, 20); // OK
 
    sha256_in_words(ctx, message, message_len, khash);
    
    // print_words_inline(khash, 8); // OK
    // for(int i=0;i<8; i++){
    //     printf("%08x", khash[i]);
    // }
    WORD ixor[16] = {\
        IPAD[0]^khash[0],\
        IPAD[1]^khash[1],\
        IPAD[2]^khash[2],\
        IPAD[3]^khash[3],\
        IPAD[4]^khash[4],\
        IPAD[5]^khash[5],\
        IPAD[6]^khash[6],\
        IPAD[7]^khash[7],\
        IPAD[0],\
        IPAD[1],\
        IPAD[2],\
        IPAD[3],\
        IPAD[4],\
        IPAD[5],\
        IPAD[6],\
        IPAD[7],\
    };

    WORD oxor[16] = {\
        OPAD[0]^khash[0],\
        OPAD[1]^khash[1],\
        OPAD[2]^khash[2],\
        OPAD[3]^khash[3],\
        OPAD[4]^khash[4],\
        OPAD[5]^khash[5],\
        OPAD[6]^khash[6],\
        OPAD[7]^khash[7],\
        OPAD[0],\
        OPAD[1],\
        OPAD[2],\
        OPAD[3],\
        OPAD[4],\
        OPAD[5],\
        OPAD[6],\
        OPAD[7],\
    };
    WORD *in_ihash = (WORD*)malloc((sizeof(ixor)/sizeof(WORD)+salt_len)*sizeof(WORD));
    unsigned long in_ihash_len = sizeof(ixor)/sizeof(WORD)+salt_len;

    int i;
    for(i = 0; i<sizeof(ixor)/sizeof(WORD); i++){
        in_ihash[i] = ixor[i];
    }
   
    for(;i<sizeof(ixor)/sizeof(WORD)+salt_len; i++){
        in_ihash[i] = salt[i-sizeof(ixor)/sizeof(WORD)];
    }
    
    WORD *ihash = (WORD*)malloc(8*sizeof(WORD));
    // print_words_inline(in_ihash, sizeof(ixor)/sizeof(WORD)+salt_len); // Problem
    sha256_in_words(ctx, in_ihash, in_ihash_len, ihash); // Why it's wrong
    // print_words_inline(ihash, 8); // OK
    unsigned long in_ohash_len = sizeof(oxor)/sizeof(WORD)+8;
    WORD *in_ohash = (WORD*)malloc(in_ohash_len*sizeof(WORD));  // WORD[24]

    // printf("%d\n", (in_ohash_len));
    // printf("%d\n", in_ohash_len); // 24 --> true
    for(i = 0; i<sizeof(oxor)/sizeof(WORD); i++){
        in_ohash[i] = oxor[i];
    }
    for(;i<sizeof(ixor)/sizeof(WORD)+salt_len; i++){
        in_ohash[i] = ihash[i-sizeof(oxor)/sizeof(WORD)];
    }

    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x %d\n", in_ohash[0], in_ohash[1], in_ohash[2], in_ohash[3], in_ohash[4], in_ohash[5], in_ohash[6], in_ohash[7], in_ohash[8], in_ohash[9], in_ohash[10], in_ohash[11], in_ohash[12], in_ohash[13], in_ohash[14], in_ohash[15], in_ohash[16], in_ohash[17], in_ohash[18], in_ohash[19], in_ohash[20], in_ohash[21], in_ohash[22], in_ohash[23], in_ohash_len); // true

    WORD temp[] = {in_ohash[0], in_ohash[1], in_ohash[2], in_ohash[3], in_ohash[4], in_ohash[5], in_ohash[6], in_ohash[7], in_ohash[8], in_ohash[9], in_ohash[10], in_ohash[11], in_ohash[12], in_ohash[13], in_ohash[14], in_ohash[15], in_ohash[16], in_ohash[17], in_ohash[18], in_ohash[19], in_ohash[20], in_ohash[21], in_ohash[22], in_ohash[23]};
    // static WORD ohash[8];
    // printf("\n");
    sha256_in_words(ctx, temp, in_ohash_len, out_hmac);
    // print_words_inline(ohash, 8); // OK
    
    // return ohash;
}
__device__ void hmac_2(SHA256_CTX_W *ctx, WORD *salt, unsigned long salt_len, WORD *message, unsigned long message_len, WORD* out_hmac, WORD khash[8], WORD in_ihash[49], WORD ihash[8], WORD in_ohash[24]){
     WORD IPAD[8] = {ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm}; // 256-bit 363636...36   
     WORD OPAD[8] = {opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm}; // 256-bit 5c5c5c...5c

    // print_words_inline(message, 20); // OK
 
    // sha256_in_words(ctx, message, message_len, khash);
    
    // print_words_inline(khash, 8); // OK
    // for(int i=0;i<8; i++){
    //     printf("%08x", khash[i]);
    // }
    WORD ixor[16] = {\
        IPAD[0]^khash[0],\
        IPAD[1]^khash[1],\
        IPAD[2]^khash[2],\
        IPAD[3]^khash[3],\
        IPAD[4]^khash[4],\
        IPAD[5]^khash[5],\
        IPAD[6]^khash[6],\
        IPAD[7]^khash[7],\
        IPAD[0],\
        IPAD[1],\
        IPAD[2],\
        IPAD[3],\
        IPAD[4],\
        IPAD[5],\
        IPAD[6],\
        IPAD[7],\
    };

    WORD oxor[16] = {\
        OPAD[0]^khash[0],\
        OPAD[1]^khash[1],\
        OPAD[2]^khash[2],\
        OPAD[3]^khash[3],\
        OPAD[4]^khash[4],\
        OPAD[5]^khash[5],\
        OPAD[6]^khash[6],\
        OPAD[7]^khash[7],\
        OPAD[0],\
        OPAD[1],\
        OPAD[2],\
        OPAD[3],\
        OPAD[4],\
        OPAD[5],\
        OPAD[6],\
        OPAD[7],\
    };

    unsigned long in_ihash_len = sizeof(ixor)/sizeof(WORD)+salt_len;
    // printf("%d\n", (sizeof(ixor)/sizeof(WORD)+salt_len));
    int i;
    for(i = 0; i<sizeof(ixor)/sizeof(WORD); i++){
        in_ihash[i] = ixor[i];
    }
   
    for(;i<sizeof(ixor)/sizeof(WORD)+salt_len; i++){
        in_ihash[i] = salt[i-sizeof(ixor)/sizeof(WORD)];
    }
    

    // print_words_inline(in_ihash, sizeof(ixor)/sizeof(WORD)+salt_len); // Problem
    sha256_in_words(ctx, in_ihash, in_ihash_len, ihash); // Why it's wrong
    // print_words_inline(ihash, 8); // OK
    unsigned long in_ohash_len = sizeof(oxor)/sizeof(WORD)+8;


    
    // printf("%d\n", in_ohash_len); // 24 --> true
    for(i = 0; i<sizeof(oxor)/sizeof(WORD); i++){
        in_ohash[i] = oxor[i];
    }
    for(;i<sizeof(ixor)/sizeof(WORD)+salt_len; i++){
        in_ohash[i] = ihash[i-sizeof(oxor)/sizeof(WORD)];
    }

    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x %d\n", in_ohash[0], in_ohash[1], in_ohash[2], in_ohash[3], in_ohash[4], in_ohash[5], in_ohash[6], in_ohash[7], in_ohash[8], in_ohash[9], in_ohash[10], in_ohash[11], in_ohash[12], in_ohash[13], in_ohash[14], in_ohash[15], in_ohash[16], in_ohash[17], in_ohash[18], in_ohash[19], in_ohash[20], in_ohash[21], in_ohash[22], in_ohash[23], in_ohash_len); // true

    WORD temp[] = {in_ohash[0], in_ohash[1], in_ohash[2], in_ohash[3], in_ohash[4], in_ohash[5], in_ohash[6], in_ohash[7], in_ohash[8], in_ohash[9], in_ohash[10], in_ohash[11], in_ohash[12], in_ohash[13], in_ohash[14], in_ohash[15], in_ohash[16], in_ohash[17], in_ohash[18], in_ohash[19], in_ohash[20], in_ohash[21], in_ohash[22], in_ohash[23]};
    // static WORD ohash[8];
    // printf("\n");
    sha256_in_words(ctx, temp, in_ohash_len, out_hmac);
    // print_words_inline(ohash, 8); // OK
    
    // return ohash;
}

__device__ void hmac_test(SHA256_CTX_W *ctx, WORD *salt, unsigned long salt_len, WORD *message, unsigned long message_len, WORD* out_hmac, WORD khash[8], WORD in_ihash[37], WORD ihash[8], WORD in_ohash[24]){
    // WORD IPAD[8] = {ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm}; // 256-bit 363636...36   
    // WORD OPAD[8] = {opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm}; // 256-bit 5c5c5c...5c

    // print_words_inline(message, 20); // OK
    
    sha256_in_words(ctx, message, message_len, khash);
    
    // print_words_inline(khash, 8); // OK
    // for(int i=0;i<8; i++){
    //     printf("%08x", khash[i]);
    // }
    
    WORD ixor[16] = {\
        0x36363636^khash[0],\
        0x36363636^khash[1],\
        0x36363636^khash[2],\
        0x36363636^khash[3],\
        0x36363636^khash[4],\
        0x36363636^khash[5],\
        0x36363636^khash[6],\
        0x36363636^khash[7],\
        0x36363636,\
        0x36363636,\
        0x36363636,\
        0x36363636,\
        0x36363636,\
        0x36363636,\
        0x36363636,\
        0x36363636,\
    };

    WORD oxor[16] = {\
        0x5C5C5C5C^khash[0],\
        0x5C5C5C5C^khash[1],\
        0x5C5C5C5C^khash[2],\
        0x5C5C5C5C^khash[3],\
        0x5C5C5C5C^khash[4],\
        0x5C5C5C5C^khash[5],\
        0x5C5C5C5C^khash[6],\
        0x5C5C5C5C^khash[7],\
        0x5C5C5C5C,\
        0x5C5C5C5C,\
        0x5C5C5C5C,\
        0x5C5C5C5C,\
        0x5C5C5C5C,\
        0x5C5C5C5C,\
        0x5C5C5C5C,\
        0x5C5C5C5C,\
    };
    // print_words_inline(IPAD, 8);
    // print_words_inline(OPAD, 8);
    unsigned long in_ihash_len = 37;
    int i;
    
    for(i = 0; i<sizeof(ixor)/sizeof(WORD); i++){
        in_ihash[i] = ixor[i];
    }
   
    for(;i<sizeof(ixor)/sizeof(WORD)+salt_len; i++){
        in_ihash[i] = salt[i-sizeof(ixor)/sizeof(WORD)];
    }
    
    // print_words_inline(in_ihash, sizeof(ixor)/sizeof(WORD)+salt_len); // Problem
    
    sha256_in_words(ctx, in_ihash, in_ihash_len, ihash); // Why it's wrong
    // printf("OK hmac_tes before in_ohash_len\n");
    // print_words_inline(ihash, 8); // OK
    unsigned long in_ohash_len = 24;
 

    
    // printf("in_ohash: %u\n", in_ohash); // 24 --> true
    for(i = 0; i<sizeof(oxor)/sizeof(WORD); i++){
        in_ohash[i] = oxor[i];
        // in_ohash[i] = 0x12341234;
    }
    for(;i<sizeof(ixor)/sizeof(WORD)+salt_len; i++){
        in_ohash[i] = ihash[i-sizeof(oxor)/sizeof(WORD)];
    }
    // printf("OK hmac_test in_ohash_len\n");
    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x %d\n", in_ohash[0], in_ohash[1], in_ohash[2], in_ohash[3], in_ohash[4], in_ohash[5], in_ohash[6], in_ohash[7], in_ohash[8], in_ohash[9], in_ohash[10], in_ohash[11], in_ohash[12], in_ohash[13], in_ohash[14], in_ohash[15], in_ohash[16], in_ohash[17], in_ohash[18], in_ohash[19], in_ohash[20], in_ohash[21], in_ohash[22], in_ohash[23], in_ohash_len); // true

    WORD temp[] = {in_ohash[0], in_ohash[1], in_ohash[2], in_ohash[3], in_ohash[4], in_ohash[5], in_ohash[6], in_ohash[7], in_ohash[8], in_ohash[9], in_ohash[10], in_ohash[11], in_ohash[12], in_ohash[13], in_ohash[14], in_ohash[15], in_ohash[16], in_ohash[17], in_ohash[18], in_ohash[19], in_ohash[20], in_ohash[21], in_ohash[22], in_ohash[23]};
    // static WORD ohash[8];
    // printf("\n");
    
    sha256_in_words(ctx, temp, in_ohash_len, out_hmac);
    
    // print_words_inline(out_hmac, 8); // OK
    
    // return ohash;
}
__device__ void pbkdf2(SHA256_CTX_W *ctx, WORD *block, unsigned long block_len, int dklenP, WORD *pbkdf2_out, WORD salt[21]){
    int num_loop = 1024/dklenP;
    // WORD *salt = (WORD*)malloc((block_len+1)*sizeof(WORD));
    WORD *hmac_out = (WORD*)malloc(8*sizeof(WORD));
    // int hmac_out_len = 8;
    
    // printf("pbkdf2: %08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", block[0], block[1], block[2], block[3], block[4], block[5], block[6], block[7], block[8], block[9], block[10], block[11], block[12], block[13], block[14], block[15], block[16], block[17], block[18], block[19]);
    for(int i = 0; i<block_len; i++){
        salt[i]=block[i];
    }
    
    for (int i = 1; i <= num_loop; i++)
    {
        salt[block_len] = i;
        hmac(ctx, salt, block_len+1, block, block_len, hmac_out);
        // print_words_inline(hmac_out, 8); // False 
        for(int j = 0; j<8; j++){
            pbkdf2_out[(i-1)*8+j] = hmac_out[j];
        }
        // printf("%08x%08x%08x%08x%08x%08x%08x%08x\n", hmac_out[0], hmac_out[1], hmac_out[2], hmac_out[3], hmac_out[4], hmac_out[5], hmac_out[6], hmac_out[7]); // wrong
        // }
    } 
}
__device__ void pbkdf2_test(SHA256_CTX_W *ctx, WORD block[20], unsigned long block_len, WORD pbkdf2_out[32], WORD salt[21], WORD hmac_out[8], WORD khash[8], WORD in_ihash[37], WORD ihash[8], WORD in_ohash[24]){

    // printf("OK\n");

    // int hmac_out_len = 8;
    
    
    // printf("pbkdf2: %08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", block[0], block[1], block[2], block[3], block[4], block[5], block[6], block[7], block[8], block[9], block[10], block[11], block[12], block[13], block[14], block[15], block[16], block[17], block[18], block[19]);
    for(int i = 0; i<block_len; i++){
        salt[i]=block[i];
    }
    // printf("pbkdf2_out: %u\n", pbkdf2_out); // 24 --> true
    // print_words_multiline(pbkdf2_out, 32);
    for (int i = 1; i <= 4; i++)
    {
        salt[block_len] = i;
        // printf("OK SALT\n");
        hmac_test(ctx, salt, block_len+1, block, block_len, hmac_out, khash, in_ihash, ihash, in_ohash);
        // printf("OK HMAC\n");
        // print_words_inline(hmac_out, 8); // False 
        for(int j = 0; j<8; j++){
            pbkdf2_out[(i-1)*8+j] = hmac_out[j];
            // pbkdf2_out[(i-1)*8+j] = 0xffffffff;
            // printf("%08x, %d\n", pbkdf2_out[(i-1)*8+j], (i-1)*8+j);
            // print_words_multiline(pbkdf2_out, 32);
        }
        // printf("%08x%08x%08x%08x%08x%08x%08x%08x\n", hmac_out[0], hmac_out[1], hmac_out[2], hmac_out[3], hmac_out[4], hmac_out[5], hmac_out[6], hmac_out[7]); // wrong
        // }
        
    
    } 
    // print_words_multiline(pbkdf2_out, 32);

}

__device__ void pbkdf2_2nd(SHA256_CTX_W *ctx, WORD *rm_out, unsigned long rm_out_len, WORD *block, unsigned long block_len, WORD* pbkdf2_out, WORD salt[21], WORD hmac_out[8], WORD khash[8], WORD in_ihash[37], WORD ihash[8], WORD in_ohash[24]){
  

    // int hmac_out_len = 8;
    
    for(int i = 0; i<rm_out_len; i++){
        salt[i]=rm_out[i];
    }


    salt[rm_out_len] = 1;
    
    hmac_2(ctx, salt, rm_out_len+1, block, block_len, hmac_out, khash, in_ihash, ihash, in_ohash);
    
    pbkdf2_out[0] = hmac_out[0];
    for(int j = 0; j<8; j++){
        //pbkdf2_out[(i-1)*8+j] = hmac_out[j];
        pbkdf2_out[j] = hmac_out[j];
        //printf("%d: %08x \n", j, hmac_out[j]);
        // printf("%d: %08x \n", j, hmac_out[j]);
    }

}
__device__ void salsa_mix_func(WORD *des, WORD *a1, WORD *a2, WORD b){
    // printf("%08x \n", *a1);
    WORD sum = *a1 + *a2;
    // printf("0x%08x + 0x%08x = 0x%08x \n", *a1, *a2,  sum);
    WORD rotl = (sum<<b) | (sum>>(32-b));
    WORD xorv = *des ^ rotl;
    
    *des = xorv;
    
}
__device__ void salsa_round(WORD *x1, WORD *x2, WORD *x3, WORD *x4){
    salsa_mix_func(x1, x4, x3, 7);
    // printf("%08x \n", *x1);
    salsa_mix_func(x2, x1, x4, 9);
    salsa_mix_func(x3, x2, x1, 13);
    salsa_mix_func(x4, x3, x2, 18);
}

__device__ WORD * salsa20_8(WORD *x){
    static WORD out[16];
    // for(int i = 0; i<4; i++){
    for(int i = 0; i<4; i++){
        // if(i==0){
        //     printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", x[0], x[1], x[2], x[3], x[4], x[5], x[6], x[7], x[8], x[9], x[10], x[11], x[12], x[13], x[14], x[15] );
        // }
        salsa_round(&x[4], &x[8], &x[12], &x[0]);
        salsa_round(&x[9], &x[13], &x[1], &x[5]);
        salsa_round(&x[14], &x[2], &x[6], &x[10]);
        salsa_round(&x[3], &x[7], &x[11], &x[15]);
        salsa_round(&x[1], &x[2], &x[3], &x[0]);
        salsa_round(&x[6], &x[7], &x[4], &x[5]);
        salsa_round(&x[11], &x[8], &x[9], &x[10]);
        salsa_round(&x[12], &x[13], &x[14], &x[15]);
    
        
    }
    for(int i=0; i<16; i++){
        out[i] = x[i];
    }
    return out;
}

__device__ void  blockmix(WORD *block){
    WORD x_arr[16];
    WORD x_arr_cpy[16];
    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", block[0], block[1], block[2], block[3], block[4], block[5], block[6], block[7], block[8], block[9], block[10], block[11], block[12], block[13], block[14], block[15]);
    for (int i = 0; i < 16; i++){
        x_arr[i] = block[i];                                        // 1
 
    }
    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", x_arr[0], x_arr[1], x_arr[2], x_arr[3], x_arr[4], x_arr[5], x_arr[6], x_arr[7], x_arr[8], x_arr[9], x_arr[10], x_arr[11], x_arr[12], x_arr[13], x_arr[14], x_arr[15]);
    for (int i = 0; i<2; i++){
        for (int j = 0; j < 16; j++){
            x_arr_cpy[j] = x_arr[j] ^ block[j+16];                  // 2


            x_arr[j] ^= block[j+16];                                // 3

        }
        // printf("xcp %08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", x_arr_cpy[0], x_arr_cpy[1], x_arr_cpy[2], x_arr_cpy[3], x_arr_cpy[4], x_arr_cpy[5], x_arr_cpy[6], x_arr_cpy[7], x_arr_cpy[8], x_arr_cpy[9], x_arr_cpy[10], x_arr_cpy[11], x_arr_cpy[12], x_arr_cpy[13], x_arr_cpy[14], x_arr_cpy[15] );
        salsa20_8(x_arr_cpy);
  
        add_two_words_array_512_bit(x_arr, x_arr_cpy);   // 4
        // printf("0x%08x + 0x%08x = 0x%08x\n", a[0], x_arr_cpy[0], x_arr[0]);
        for (int j = 0; j < 16; j++){

            block[(16*i)+j] = x_arr[j];                             // 5

        }
    }
}

__device__ void romix(WORD *block, int N, WORD mem[1024][32]){
    // WORD mem[1024][32];
    
    int j;
     for (int i = 0; i<N; i++){
        for (j = 0; j < 32; j++){
            mem[i][j] = block[j];
            //printf("N: %d, j: %d, i: %d, \n",N, j ,i);
        }
        // if(i == 1023){
            // printf("i: %d, \n",N, i);
        // }
        
        blockmix(block);
        
    }
    
    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", block[0], block[1], block[2], block[3], block[4], block[5], block[6], block[7], block[8], block[9], block[10], block[11], block[12], block[13], block[14], block[15], block[16], block[17], block[18], block[19], block[20], block[21], block[22], block[23], block[24], block[25], block[26], block[27], block[28], block[29], block[30], block[31]);
    for (int i = 0; i<N; i++){
        j = (block[16] & 0x000003ff);
 
        for (int k = 0; k<32; k++){
            // int a = block[k] ^ mem[j][k];
            // printf("j: %u, i: %u, k: %u\n",j ,i, k);
            block[k] ^= mem[j][k];
            // if(a != block[k])
            
        }
        blockmix(block);
    }
    

}

__device__ void scrypt( SHA256_CTX_W *ctx,\
                        WORD *block, \
                        unsigned long block_len, \
                        WORD scrypt_out[8], \
                        WORD mem[1024][32], \
                        WORD salt[21], \
                        WORD hmac_out[8], \
                        WORD khash[8], \
                        WORD in_ihash[37], \
                        WORD in_2_ihash[49], \
                        WORD ihash[8], \
                        WORD in_ohash[24], \
                        WORD pbkdf2_rm_out[32]){

    // WORD *pbkdf2_1_out = (WORD*)malloc(pbkdf2_out_len_1*sizeof(WORD));
    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", block[0], block[1], block[2], block[3], block[4], block[5], block[6], block[7], block[8], block[9], block[10], block[11], block[12], block[13], block[14], block[15], block[16], block[17], block[18], block[19]);
    
    // print_words_inline(&block[19], 1);
    // print_words_inline(block, 20); // OK
    pbkdf2_test(ctx, block, block_len, pbkdf2_rm_out, salt, hmac_out, khash, in_ihash, ihash, in_ohash);
    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", pbkdf2_rm_out[0], pbkdf2_rm_out[1], pbkdf2_rm_out[2], pbkdf2_rm_out[3], pbkdf2_rm_out[4], pbkdf2_rm_out[5], pbkdf2_rm_out[6], pbkdf2_rm_out[7], pbkdf2_rm_out[8], pbkdf2_rm_out[9], pbkdf2_rm_out[10], pbkdf2_rm_out[11], pbkdf2_rm_out[12], pbkdf2_rm_out[13], pbkdf2_rm_out[14], pbkdf2_rm_out[15], pbkdf2_rm_out[16], pbkdf2_rm_out[17], pbkdf2_rm_out[18], pbkdf2_rm_out[19], pbkdf2_rm_out[20], pbkdf2_rm_out[21], pbkdf2_rm_out[22], pbkdf2_rm_out[23], pbkdf2_rm_out[24], pbkdf2_rm_out[25], pbkdf2_rm_out[26], pbkdf2_rm_out[27], pbkdf2_rm_out[28], pbkdf2_rm_out[29], pbkdf2_rm_out[30], pbkdf2_rm_out[31]);
    // printf("OK\n");
    // print_words_multiline(pbkdf2_rm_out, 32);
    endian_full(pbkdf2_rm_out, 32);
  
    
    romix(pbkdf2_rm_out, 1024, mem);
    
    
    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", pbkdf2_rm_out[0], pbkdf2_rm_out[1], pbkdf2_rm_out[2], pbkdf2_rm_out[3], pbkdf2_rm_out[4], pbkdf2_rm_out[5], pbkdf2_rm_out[6], pbkdf2_rm_out[7], pbkdf2_rm_out[8], pbkdf2_rm_out[9], pbkdf2_rm_out[10], pbkdf2_rm_out[11], pbkdf2_rm_out[12], pbkdf2_rm_out[13], pbkdf2_rm_out[14], pbkdf2_rm_out[15], pbkdf2_rm_out[16], pbkdf2_rm_out[17], pbkdf2_rm_out[18], pbkdf2_rm_out[19], pbkdf2_rm_out[20], pbkdf2_rm_out[21], pbkdf2_rm_out[22], pbkdf2_rm_out[23], pbkdf2_rm_out[24], pbkdf2_rm_out[25], pbkdf2_rm_out[26], pbkdf2_rm_out[27], pbkdf2_rm_out[28], pbkdf2_rm_out[29], pbkdf2_rm_out[30], pbkdf2_rm_out[31]);
    
    endian_full(pbkdf2_rm_out, 32);
    // print_words_multiline(pbkdf2_1_out, 32);
    
    pbkdf2_2nd(ctx, pbkdf2_rm_out, 32, block, block_len, scrypt_out, salt, hmac_out, khash, in_2_ihash, ihash, in_ohash);

    // printf("%08x%08x%08x%08x%08x%08x%08x%08x\n", pbkdf2_2_out[0],pbkdf2_2_out[1],pbkdf2_2_out[2],pbkdf2_2_out[3],pbkdf2_2_out[4],pbkdf2_2_out[5],pbkdf2_2_out[6],pbkdf2_2_out[7]);
    // print_words_inline(pbkdf2_2_out, 20);
}






cudaError_t scryptWithCuda(SCRYPT_PKG **pkgs, int block_per_grid, int thread_per_block);




__global__ void scryptCuda(SCRYPT_PKG **pkgs)
{   
    int threadId = blockDim.x * blockIdx.x + threadIdx.x;
    // int blockId = blockIdx.y*gridDim.x+blockIdx.x;
    // uint32_t index = blockIdx.x * blockDim.x + threadIdx.x;
    // uint32_t stride = blockDim.x * gridDim.x;
    // char hex_str[65];
    SHA256_CTX *ctx = new SHA256_CTX();
    // int i;
    
    // for (i = 0; i<3000000000; i++){
       
    // }
    //WORD T_Nonce = pkgs[threadId]->input[19];
    
    if(threadId < NUMTHREAD){
        // for (uint32_t threadId = index; threadId < MAXNONCE; threadId += stride){
            WORD T_Nonce = pkgs[threadId]->input[19];
            endian_cvt(&T_Nonce);
            // if(threadId == 1024)
                // printf("Thread id %d: %08x maxnonce: %u\n", threadId, T_Nonce, MAXNONCE/NUMTHREAD);
        for(int i = 0; i<MAXNONCE/NUMTHREAD; i++){
            // if(threadId == NUMTHREAD-1 && i==MAXNONCE/NUMTHREAD-1){
            //     // print_words_inline(&in[20*threadId+19], 1);
            //     // printf("Thread ID (%d) = %08x%08x%08x%08x%08x%08x%08x%08x\n", threadId, out[8*threadId],out[8*threadId+1],out[8*threadId+2],out[8*threadId+3],out[8*threadId+4],out[8*threadId+5],out[8*threadId+6],out[8*threadId+7]);
            // }
            // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", pkgs[threadId]->input[0],pkgs[threadId]->input[1],pkgs[threadId]->input[2],pkgs[threadId]->input[3],pkgs[threadId]->input[4],pkgs[threadId]->input[5],pkgs[threadId]->input[6],pkgs[threadId]->input[7], pkgs[threadId]->input[8], pkgs[threadId]->input[9], pkgs[threadId]->input[10], pkgs[threadId]->input[11], pkgs[threadId]->input[12], pkgs[threadId]->input[13], pkgs[threadId]->input[14], pkgs[threadId]->input[15], pkgs[threadId]->input[16], pkgs[threadId]->input[17], pkgs[threadId]->input[18], pkgs[threadId]->input[19]);
            //printf("Thread id  %08x \n",pkgs[threadId]->input[19]);
            scrypt(     &(pkgs[threadId]->ctx), \
                        pkgs[threadId]->input, \
                        20, \
                        pkgs[threadId]->output, \
                        pkgs[threadId]->mem, \
                        pkgs[threadId]->salt, \
                        pkgs[threadId]->hmac_out, \
                        pkgs[threadId]->khash, \
                        pkgs[threadId]->in_ihash, \
                        pkgs[threadId]->in_2_ihash, \
                        pkgs[threadId]->ihash, \
                        pkgs[threadId]->in_ohash, \
                        pkgs[threadId]->pbkdf2_rm_out\
                    );
            // printf("!!!!Hello\n");
            // if(threadId == NUMTHREAD-1){
            //     // printf("i: %d\n", i);
            // }
            if(threadId == NUMTHREAD-1 && i==MAXNONCE/NUMTHREAD-1){
                 printf("Thread ID (%d) = %08x%08x%08x%08x%08x%08x%08x%08x\n", threadId, pkgs[threadId]->output[0],pkgs[threadId]->output[1],pkgs[threadId]->output[2],pkgs[threadId]->output[3],pkgs[threadId]->output[4],pkgs[threadId]->output[5],pkgs[threadId]->output[6],pkgs[threadId]->output[7]);
            }

            endian_cvt(&pkgs[threadId]->input[19]);
            pkgs[threadId]->input[19]++;
            // printf("Thread id %d: %u maxnonce: %u\n", threadId, pkgs[threadId]->input[19], MAXNONCE/NUMTHREAD);
            endian_cvt(&pkgs[threadId]->input[19]);
        }
        // printf("[%d]\n",\
        // threadId);
        
        // words_to_hex_string(out[threadId], 8, hex_str, 64);
        // printf("Thread ID: %d, %s", threadId, hex_str);
        // print_words_inline(&out[threadId], 8);
        

    }

}

int main()
{
  
    
    // static char test_scrypt_in[] =     "0000002056efd1943684c1fdc247d4759cc43b29afa1cac7ad14579de5f6abcbc6bdf448ee3de4c7b45e9496ab41ecde73d1a299ddbcc7a81aa52776e6c067e214233af097b6885c97df011aa004090e";
    // static char test_scrypt_in[] =     "0000002056efd1943684c1fdc247d4759cc43b29afa1cac7ad14579de5f6abcbc6bdf448ee3de4c7b45e9496ab41ecde73d1a299ddbcc7a81aa52776e6c067e214233af097b6885c97df011a";

    char ver[]="20000000";
    char prev_block[]="48f4bdc6cbabf6e59d5714adc7caa1af293bc49c75d447c2fdc1843694d1ef56";
    char mrkl_root[]="f03a2314e267c0e67627a51aa8c7bcdd99a2d173deec41ab96945eb4c7e43dee";
    char time[9];
    char bits[9];

    
    little_endian(ver, sizeof(ver) - 1);
    little_endian(prev_block, sizeof(prev_block) - 1);
    little_endian(mrkl_root, sizeof(mrkl_root) - 1);
    


    // Get time

    struct tm t;
    time_t t_of_day;

    t.tm_year = 2019-1900;  // Year - 1900
    t.tm_mon = 3-1;           // Month, where 1 = jan
    t.tm_mday = 13;          // Day of the month
    t.tm_hour = 7+9;
    t.tm_min = 51;
    t.tm_sec = 51;
    t.tm_isdst = -1;        // Is DST on? 1 = yes, 0 = no, -1 = unknown
    t_of_day = mktime(&t);
    
    WORD *wtime = new WORD(t_of_day);
    endian_cvt_host(wtime);
    word_to_hex_eight_host(*wtime, time, 8);

    word_to_hex_eight_host(436330391, bits, 8); // bits -- input
    little_endian(bits, 8);
    char test_scrypt_in[153];
   

  
    int in_index = 0;
    for(int i = 0; i < sizeof(ver)-1; i++){
        test_scrypt_in[i]=ver[i];
    }
    in_index += sizeof(ver)-1;
    for(int i = 0; i < sizeof(prev_block); i++){
        test_scrypt_in[in_index+i] = prev_block[i];
    }
    in_index += sizeof(prev_block)-1;
    for(int i = 0; i < sizeof(mrkl_root); i++){
        test_scrypt_in[in_index+i] = mrkl_root[i];
    }
    in_index += sizeof(mrkl_root)-1;
    for(int i = 0; i < sizeof(time); i++){
        test_scrypt_in[in_index+i] = time[i];
    }
    in_index += sizeof(time)-1;
    for(int i = 0; i < sizeof(bits); i++){
        test_scrypt_in[in_index+i] = bits[i];
    }
    WORD *nonce = (WORD*) malloc(sizeof(WORD));
    // WORD *nonce = new WORD(235472032);
    
    // WORD test_scrypt_out_w[8][NUMTHREAD];
    
    
    SCRYPT_PKG **pkgs = (SCRYPT_PKG**)malloc(NUMTHREAD*sizeof(SCRYPT_PKG*));

    // for(int k = 0; k<NUMTHREAD; k++){
    //     hex_string_to_words_host(test_scrypt_in, sizeof(test_scrypt_in), &test_scrypt_in_w[20*k]);
    //     *nonce = STARTATNONCE + (k * (MAXNONCE/NUMTHREAD));
    //     endian_cvt_host(nonce);
    //     test_scrypt_in_w[20*k+19] = *nonce;
        
    // }
    for(int k = 0; k<NUMTHREAD; k++){
        pkgs[k] = (SCRYPT_PKG*)malloc(sizeof(SCRYPT_PKG));
        hex_string_to_words_host(test_scrypt_in, sizeof(test_scrypt_in), pkgs[k]->input);
        *nonce = STARTATNONCE + (k * (MAXNONCE/NUMTHREAD));
        endian_cvt_host(nonce);
        pkgs[k]->input[19] = *nonce;
        // printf("%d \n", pkgs[k]);
        // printf("%08x", pkgs[k]->input);
        // print_words_inline_host(pkgs[k]->input, 20);
    }
   
    uint32_t threadsPerBlock = 256;
    uint32_t blocksPerGrid =(threadsPerBlock + MAXNONCE - 1) / threadsPerBlock;
    // Add vectors in parallel.
    cudaError_t cudaStatus = scryptWithCuda(pkgs, blocksPerGrid, threadsPerBlock);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "scryptWithCuda failed!\n");
        return 1;
    }

    // cudaDeviceReset must be called before exiting in order for profiling and
    // tracing tools such as Nsight and Visual Profiler to show complete traces.
    cudaStatus = cudaDeviceReset();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaDeviceReset failed!");
        return 1;
    }

    return 0;
}

SCRYPT_PKG* pkg_init(WORD* indata){
    SCRYPT_PKG* pkg;
    cudaMallocManaged(&pkg, sizeof(SCRYPT_PKG));
    for (int j = 0; j < 20; j++){
        pkg->input[j] = indata[j];
        // printf("%08x\n", pkg->input[j]);
    }
    return pkg;
}

// Helper function for using CUDA to add vectors in parallel.
cudaError_t scryptWithCuda(SCRYPT_PKG **pkgs, int block_per_grid, int thread_per_block)
{
    SCRYPT_PKG **pkgs_dev;
    cudaError_t cudaStatus;
    // SCRYPT_PKG *pkg_pointer;
    // Choose which GPU to run on, change this on a multi-GPU system.
    cudaStatus = cudaSetDevice(NO_DEVICE);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?");
        goto Error;
    }

    // Allocate GPU buffers for three vectors (two input, one output)    .
    cudaStatus = cudaMallocManaged((void**)&pkgs_dev, NUMTHREAD * sizeof(SCRYPT_PKG*));
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMalloc failed!");
        goto Error;
    }

    for(int i = 0; i<NUMTHREAD; i++){
        
        // Copy input vectors from host memory to GPU buffers.

        pkgs_dev[i] = pkg_init(pkgs[i]->input);
        // print_words_inline_host(pkgs[i]->input, 20);
        // printf("    %08x\n", pkgs_dev[i]);
        // cudaStatus = cudaMemcpy(pkgs_dev[i]->input, pkgs[i]->input, 20*sizeof(WORD), cudaMemcpyHostToDevice);
        // if (cudaStatus != cudaSuccess) {
        //     fprintf(stderr, "cudaMemcpy failed!");
        //     goto Error;
        // }
    }

    // Launch a kernel on the GPU with one thread for each element.

    scryptCuda<<<block_per_grid, thread_per_block>>>(pkgs_dev);

    // Check for any errors launching the kernel
    cudaStatus = cudaGetLastError();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "scryptCuda launch failed: %s\n", cudaGetErrorString(cudaStatus));
        goto Error;
    }
    
    // cudaDeviceSynchronize waits for the kernel to finish, and returns
    // any errors encountered during the launch.
    cudaStatus = cudaDeviceSynchronize();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching scryptCuda!\n", cudaStatus);
        goto Error;
    }

    // // Copy output vector from GPU buffer to host memory.

    // cudaStatus = cudaMemcpy(out, dev_out, NUMTHREAD * 8 * sizeof(WORD), cudaMemcpyDeviceToHost);
    // if (cudaStatus != cudaSuccess) {
    //     fprintf(stderr, "cudaMemcpy launch failed: %s\n", cudaGetErrorString(cudaStatus));
    //     goto Error;
    // }


Error:
    
    cudaFree(pkgs_dev);
    
    return cudaStatus;
}


	.file	"tmpxft_00277419_00000000-6_test_gpu_official_2.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3937:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3937:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z16hex_char_to_bytec
	.type	_Z16hex_char_to_bytec, @function
_Z16hex_char_to_bytec:
.LFB3889:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3889:
	.size	_Z16hex_char_to_bytec, .-_Z16hex_char_to_bytec
	.globl	_Z21hex_char_to_byte_hostc
	.type	_Z21hex_char_to_byte_hostc, @function
_Z21hex_char_to_byte_hostc:
.LFB3890:
	.cfi_startproc
	endbr64
	leal	-97(%rdi), %edx
	movl	%edi, %eax
	cmpb	$5, %dl
	ja	.L5
	subl	$87, %eax
	ret
.L5:
	leal	-65(%rdi), %edx
	cmpb	$5, %dl
	ja	.L7
	subl	$55, %eax
	ret
.L7:
	subl	$48, %eax
	cmpb	$9, %al
	jbe	.L4
	xorl	%eax, %eax
.L4:
	ret
	.cfi_endproc
.LFE3890:
	.size	_Z21hex_char_to_byte_hostc, .-_Z21hex_char_to_byte_hostc
	.globl	_Z19hex_string_to_bytesPcmPh
	.type	_Z19hex_string_to_bytesPcmPh, @function
_Z19hex_string_to_bytesPcmPh:
.LFB3891:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3891:
	.size	_Z19hex_string_to_bytesPcmPh, .-_Z19hex_string_to_bytesPcmPh
	.globl	_Z19hex_string_to_wordsPcmPj
	.type	_Z19hex_string_to_wordsPcmPj, @function
_Z19hex_string_to_wordsPcmPj:
.LFB4590:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4590:
	.size	_Z19hex_string_to_wordsPcmPj, .-_Z19hex_string_to_wordsPcmPj
	.globl	_Z24hex_string_to_words_hostPcmPj
	.type	_Z24hex_string_to_words_hostPcmPj, @function
_Z24hex_string_to_words_hostPcmPj:
.LFB3893:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r8
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	xorl	%esi, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	decq	%r12
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
.L14:
	cmpq	%r12, %rsi
	jnb	.L17
	movsbl	(%r8,%rsi), %edi
	call	_Z21hex_char_to_byte_hostc
	movsbl	1(%r8,%rsi), %edi
	movl	%eax, %ecx
	call	_Z21hex_char_to_byte_hostc
	movsbl	2(%r8,%rsi), %edi
	sall	$28, %ecx
	movl	%eax, %r14d
	call	_Z21hex_char_to_byte_hostc
	movsbl	3(%r8,%rsi), %edi
	sall	$24, %r14d
	movl	%eax, %ebp
	andl	$251658240, %r14d
	call	_Z21hex_char_to_byte_hostc
	movsbl	4(%r8,%rsi), %edi
	sall	$20, %ebp
	movl	%eax, %ebx
	andl	$15728640, %ebp
	call	_Z21hex_char_to_byte_hostc
	movsbl	5(%r8,%rsi), %edi
	sall	$16, %ebx
	movl	%eax, %r11d
	andl	$983040, %ebx
	call	_Z21hex_char_to_byte_hostc
	movsbl	6(%r8,%rsi), %edi
	sall	$12, %r11d
	movl	%eax, %r10d
	andl	$61440, %r11d
	call	_Z21hex_char_to_byte_hostc
	movsbl	7(%r8,%rsi), %edi
	sall	$8, %r10d
	movl	%eax, %r9d
	andl	$3840, %r10d
	call	_Z21hex_char_to_byte_hostc
	sall	$4, %r9d
	movl	%esi, %edx
	addq	$8, %rsi
	andl	$15, %eax
	sarl	$3, %edx
	andl	$240, %r9d
	orl	%ecx, %eax
	movslq	%edx, %rdx
	orl	%r14d, %eax
	orl	%ebp, %eax
	orl	%ebx, %eax
	orl	%r11d, %eax
	orl	%r10d, %eax
	orl	%r9d, %eax
	movl	%eax, 0(%r13,%rdx,4)
	jmp	.L14
.L17:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3893:
	.size	_Z24hex_string_to_words_hostPcmPj, .-_Z24hex_string_to_words_hostPcmPj
	.globl	_Z16half_byte_to_hexhPc
	.type	_Z16half_byte_to_hexhPc, @function
_Z16half_byte_to_hexhPc:
.LFB3894:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3894:
	.size	_Z16half_byte_to_hexhPc, .-_Z16half_byte_to_hexhPc
	.globl	_Z21half_byte_to_hex_hosthPc
	.type	_Z21half_byte_to_hex_hosthPc, @function
_Z21half_byte_to_hex_hosthPc:
.LFB3895:
	.cfi_startproc
	endbr64
	andl	$15, %edi
	leal	48(%rdi), %eax
	cmpb	$9, %dil
	jbe	.L22
	leal	87(%rdi), %eax
.L22:
	movb	%al, (%rsi)
	ret
	.cfi_endproc
.LFE3895:
	.size	_Z21half_byte_to_hex_hosthPc, .-_Z21half_byte_to_hex_hosthPc
	.type	_Z22word_to_hex_eight_hostjPcm.part.0, @function
_Z22word_to_hex_eight_hostjPcm.part.0:
.LFB4582:
	.cfi_startproc
	movl	%edi, %edx
	shrl	$28, %edi
	movq	%rsi, %rcx
	call	_Z21half_byte_to_hex_hosthPc
	movl	%edx, %edi
	leaq	1(%rsi), %rsi
	shrl	$24, %edi
	call	_Z21half_byte_to_hex_hosthPc
	movl	%edx, %edi
	leaq	2(%rcx), %rsi
	shrl	$20, %edi
	movzbl	%dil, %edi
	call	_Z21half_byte_to_hex_hosthPc
	movl	%edx, %edi
	leaq	3(%rcx), %rsi
	shrl	$16, %edi
	movzbl	%dil, %edi
	call	_Z21half_byte_to_hex_hosthPc
	movl	%edx, %edi
	leaq	4(%rcx), %rsi
	shrl	$12, %edi
	movzbl	%dil, %edi
	call	_Z21half_byte_to_hex_hosthPc
	leaq	5(%rcx), %rsi
	movzbl	%dh, %edi
	call	_Z21half_byte_to_hex_hosthPc
	movl	%edx, %edi
	leaq	6(%rcx), %rsi
	shrl	$4, %edi
	movzbl	%dil, %edi
	call	_Z21half_byte_to_hex_hosthPc
	leaq	7(%rcx), %rsi
	movzbl	%dl, %edi
	jmp	_Z21half_byte_to_hex_hosthPc
	.cfi_endproc
.LFE4582:
	.size	_Z22word_to_hex_eight_hostjPcm.part.0, .-_Z22word_to_hex_eight_hostjPcm.part.0
	.globl	_Z17word_to_hex_eightjPcm
	.type	_Z17word_to_hex_eightjPcm, @function
_Z17word_to_hex_eightjPcm:
.LFB3896:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3896:
	.size	_Z17word_to_hex_eightjPcm, .-_Z17word_to_hex_eightjPcm
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"The hex_pair must have the length of two characters: %d\n"
	.text
	.globl	_Z22word_to_hex_eight_hostjPcm
	.type	_Z22word_to_hex_eight_hostjPcm, @function
_Z22word_to_hex_eight_hostjPcm:
.LFB3897:
	.cfi_startproc
	endbr64
	cmpq	$8, %rdx
	jne	.L27
	jmp	_Z22word_to_hex_eight_hostjPcm.part.0
.L27:
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE3897:
	.size	_Z22word_to_hex_eight_hostjPcm, .-_Z22word_to_hex_eight_hostjPcm
	.globl	_Z19words_to_hex_stringPjmPcm
	.type	_Z19words_to_hex_stringPjmPcm, @function
_Z19words_to_hex_stringPjmPcm:
.LFB3898:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3898:
	.size	_Z19words_to_hex_stringPjmPcm, .-_Z19words_to_hex_stringPjmPcm
	.globl	_Z27add_two_words_array_512_bitPjS_
	.type	_Z27add_two_words_array_512_bitPjS_, @function
_Z27add_two_words_array_512_bitPjS_:
.LFB3899:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3899:
	.size	_Z27add_two_words_array_512_bitPjS_, .-_Z27add_two_words_array_512_bitPjS_
	.globl	_Z38add_two_words_array_512_bit_with_carryPjS_
	.type	_Z38add_two_words_array_512_bit_with_carryPjS_, @function
_Z38add_two_words_array_512_bit_with_carryPjS_:
.LFB4594:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4594:
	.size	_Z38add_two_words_array_512_bit_with_carryPjS_, .-_Z38add_two_words_array_512_bit_with_carryPjS_
	.globl	_Z18print_words_inlinePjm
	.type	_Z18print_words_inlinePjm, @function
_Z18print_words_inlinePjm:
.LFB3901:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3901:
	.size	_Z18print_words_inlinePjm, .-_Z18print_words_inlinePjm
	.section	.rodata.str1.1
.LC1:
	.string	"\n"
.LC2:
	.string	"%08x"
	.text
	.globl	_Z23print_words_inline_hostPjm
	.type	_Z23print_words_inline_hostPjm, @function
_Z23print_words_inline_hostPjm:
.LFB3902:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%eax, %eax
	leaq	.LC2(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	leaq	.LC1(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	movl	$2, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rsi, %rbp
	movq	%r13, %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
.L37:
	cmpq	%rbx, %rbp
	je	.L40
	movl	(%r12,%rbx,4), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L37
.L40:
	popq	%rbx
	.cfi_def_cfa_offset 40
	movq	%r13, %rsi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%r12
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE3902:
	.size	_Z23print_words_inline_hostPjm, .-_Z23print_words_inline_hostPjm
	.section	.rodata.str1.1
.LC3:
	.string	"%08x\n"
	.text
	.globl	_Z26print_words_multiline_hostPjm
	.type	_Z26print_words_multiline_hostPjm, @function
_Z26print_words_multiline_hostPjm:
.LFB3903:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%eax, %eax
	leaq	.LC3(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	leaq	.LC1(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	movl	$2, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rsi, %rbp
	movq	%r13, %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
.L42:
	cmpq	%rbx, %rbp
	je	.L45
	movl	(%r12,%rbx,4), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L42
.L45:
	popq	%rbx
	.cfi_def_cfa_offset 40
	movq	%r13, %rsi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%r12
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE3903:
	.size	_Z26print_words_multiline_hostPjm, .-_Z26print_words_multiline_hostPjm
	.globl	_Z21print_words_multilinePjm
	.type	_Z21print_words_multilinePjm, @function
_Z21print_words_multilinePjm:
.LFB4604:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z18print_words_inlinePjm
	.cfi_endproc
.LFE4604:
	.size	_Z21print_words_multilinePjm, .-_Z21print_words_multilinePjm
	.globl	_Z10endian_cvtPj
	.type	_Z10endian_cvtPj, @function
_Z10endian_cvtPj:
.LFB3905:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3905:
	.size	_Z10endian_cvtPj, .-_Z10endian_cvtPj
	.globl	_Z11endian_fullPjm
	.type	_Z11endian_fullPjm, @function
_Z11endian_fullPjm:
.LFB4606:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z18print_words_inlinePjm
	.cfi_endproc
.LFE4606:
	.size	_Z11endian_fullPjm, .-_Z11endian_fullPjm
	.globl	_Z13little_endianPcm
	.type	_Z13little_endianPcm, @function
_Z13little_endianPcm:
.LFB3907:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	movq	%rsi, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rsi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 32
	call	malloc@PLT
	xorl	%edx, %edx
	leaq	(%rax,%rbx), %rcx
.L53:
	subq	$2, %rcx
	cmpq	%rbx, %rdx
	jnb	.L58
	movb	0(%rbp,%rdx), %sil
	movb	%sil, (%rcx)
	movb	1(%rbp,%rdx), %sil
	addq	$2, %rdx
	movb	%sil, 1(%rcx)
	jmp	.L53
.L58:
	xorl	%edx, %edx
.L55:
	cmpq	%rdx, %rbx
	je	.L59
	movb	(%rax,%rdx), %cl
	movb	%cl, 0(%rbp,%rdx)
	incq	%rdx
	jmp	.L55
.L59:
	movb	$0, 0(%rbp,%rbx)
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3907:
	.size	_Z13little_endianPcm, .-_Z13little_endianPcm
	.globl	_Z15endian_cvt_hostPj
	.type	_Z15endian_cvt_hostPj, @function
_Z15endian_cvt_hostPj:
.LFB3908:
	.cfi_startproc
	endbr64
	movl	(%rdi), %eax
	bswap	%eax
	movl	%eax, (%rdi)
	ret
	.cfi_endproc
.LFE3908:
	.size	_Z15endian_cvt_hostPj, .-_Z15endian_cvt_hostPj
	.globl	_Z11sha256_initP10SHA256_CTX
	.type	_Z11sha256_initP10SHA256_CTX, @function
_Z11sha256_initP10SHA256_CTX:
.LFB4584:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z10endian_cvtPj
	.cfi_endproc
.LFE4584:
	.size	_Z11sha256_initP10SHA256_CTX, .-_Z11sha256_initP10SHA256_CTX
	.globl	_Z17sha256_init_wordsP12SHA256_CTX_W
	.type	_Z17sha256_init_wordsP12SHA256_CTX_W, @function
_Z17sha256_init_wordsP12SHA256_CTX_W:
.LFB4586:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z10endian_cvtPj
	.cfi_endproc
.LFE4586:
	.size	_Z17sha256_init_wordsP12SHA256_CTX_W, .-_Z17sha256_init_wordsP12SHA256_CTX_W
	.globl	_Z16sha256_transformP10SHA256_CTXPh
	.type	_Z16sha256_transformP10SHA256_CTXPh, @function
_Z16sha256_transformP10SHA256_CTXPh:
.LFB4596:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4596:
	.size	_Z16sha256_transformP10SHA256_CTXPh, .-_Z16sha256_transformP10SHA256_CTXPh
	.globl	_Z22sha256_transform_wordsP12SHA256_CTX_WPj
	.type	_Z22sha256_transform_wordsP12SHA256_CTX_WPj, @function
_Z22sha256_transform_wordsP12SHA256_CTX_WPj:
.LFB4598:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4598:
	.size	_Z22sha256_transform_wordsP12SHA256_CTX_WPj, .-_Z22sha256_transform_wordsP12SHA256_CTX_WPj
	.globl	_Z13sha256_updateP10SHA256_CTXPhm
	.type	_Z13sha256_updateP10SHA256_CTXPhm, @function
_Z13sha256_updateP10SHA256_CTXPhm:
.LFB3913:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3913:
	.size	_Z13sha256_updateP10SHA256_CTXPhm, .-_Z13sha256_updateP10SHA256_CTXPhm
	.globl	_Z19sha256_update_wordsP12SHA256_CTX_WPjm
	.type	_Z19sha256_update_wordsP12SHA256_CTX_WPjm, @function
_Z19sha256_update_wordsP12SHA256_CTX_WPjm:
.LFB4592:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4592:
	.size	_Z19sha256_update_wordsP12SHA256_CTX_WPjm, .-_Z19sha256_update_wordsP12SHA256_CTX_WPjm
	.globl	_Z12sha256_finalP10SHA256_CTXPj
	.type	_Z12sha256_finalP10SHA256_CTXPj, @function
_Z12sha256_finalP10SHA256_CTXPj:
.LFB4600:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4600:
	.size	_Z12sha256_finalP10SHA256_CTXPj, .-_Z12sha256_finalP10SHA256_CTXPj
	.globl	_Z18sha256_final_wordsP12SHA256_CTX_WPj
	.type	_Z18sha256_final_wordsP12SHA256_CTX_WPj, @function
_Z18sha256_final_wordsP12SHA256_CTX_WPj:
.LFB4602:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4602:
	.size	_Z18sha256_final_wordsP12SHA256_CTX_WPj, .-_Z18sha256_final_wordsP12SHA256_CTX_WPj
	.globl	_Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_
	.type	_Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_, @function
_Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_:
.LFB3917:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3917:
	.size	_Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_, .-_Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_
	.globl	_Z19sha256_in_words_orgP10SHA256_CTXPjmS1_
	.type	_Z19sha256_in_words_orgP10SHA256_CTXPjmS1_, @function
_Z19sha256_in_words_orgP10SHA256_CTXPjmS1_:
.LFB4608:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4608:
	.size	_Z19sha256_in_words_orgP10SHA256_CTXPjmS1_, .-_Z19sha256_in_words_orgP10SHA256_CTXPjmS1_
	.globl	_Z20sha256_in_words_testP12SHA256_CTX_WPjmS1_
	.type	_Z20sha256_in_words_testP12SHA256_CTX_WPjmS1_, @function
_Z20sha256_in_words_testP12SHA256_CTX_WPjmS1_:
.LFB4610:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4610:
	.size	_Z20sha256_in_words_testP12SHA256_CTX_WPjmS1_, .-_Z20sha256_in_words_testP12SHA256_CTX_WPjmS1_
	.globl	_Z4hmacP12SHA256_CTX_WPjmS1_mS1_
	.type	_Z4hmacP12SHA256_CTX_WPjmS1_mS1_, @function
_Z4hmacP12SHA256_CTX_WPjmS1_mS1_:
.LFB3920:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3920:
	.size	_Z4hmacP12SHA256_CTX_WPjmS1_mS1_, .-_Z4hmacP12SHA256_CTX_WPjmS1_mS1_
	.globl	_Z6hmac_2P12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_
	.type	_Z6hmac_2P12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_, @function
_Z6hmac_2P12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_:
.LFB3921:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3921:
	.size	_Z6hmac_2P12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_, .-_Z6hmac_2P12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_
	.globl	_Z9hmac_testP12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_
	.type	_Z9hmac_testP12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_, @function
_Z9hmac_testP12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_:
.LFB4612:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4612:
	.size	_Z9hmac_testP12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_, .-_Z9hmac_testP12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_
	.globl	_Z6pbkdf2P12SHA256_CTX_WPjmiS1_S1_
	.type	_Z6pbkdf2P12SHA256_CTX_WPjmiS1_S1_, @function
_Z6pbkdf2P12SHA256_CTX_WPjmiS1_S1_:
.LFB3923:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3923:
	.size	_Z6pbkdf2P12SHA256_CTX_WPjmiS1_S1_, .-_Z6pbkdf2P12SHA256_CTX_WPjmiS1_S1_
	.globl	_Z11pbkdf2_testP12SHA256_CTX_WPjmS1_S1_S1_S1_S1_S1_S1_
	.type	_Z11pbkdf2_testP12SHA256_CTX_WPjmS1_S1_S1_S1_S1_S1_S1_, @function
_Z11pbkdf2_testP12SHA256_CTX_WPjmS1_S1_S1_S1_S1_S1_S1_:
.LFB3924:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3924:
	.size	_Z11pbkdf2_testP12SHA256_CTX_WPjmS1_S1_S1_S1_S1_S1_S1_, .-_Z11pbkdf2_testP12SHA256_CTX_WPjmS1_S1_S1_S1_S1_S1_S1_
	.globl	_Z10pbkdf2_2ndP12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_S1_S1_
	.type	_Z10pbkdf2_2ndP12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_S1_S1_, @function
_Z10pbkdf2_2ndP12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_S1_S1_:
.LFB3925:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3925:
	.size	_Z10pbkdf2_2ndP12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_S1_S1_, .-_Z10pbkdf2_2ndP12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_S1_S1_
	.globl	_Z14salsa_mix_funcPjS_S_j
	.type	_Z14salsa_mix_funcPjS_S_j, @function
_Z14salsa_mix_funcPjS_S_j:
.LFB3926:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3926:
	.size	_Z14salsa_mix_funcPjS_S_j, .-_Z14salsa_mix_funcPjS_S_j
	.globl	_Z11salsa_roundPjS_S_S_
	.type	_Z11salsa_roundPjS_S_S_, @function
_Z11salsa_roundPjS_S_S_:
.LFB3927:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3927:
	.size	_Z11salsa_roundPjS_S_S_, .-_Z11salsa_roundPjS_S_S_
	.globl	_Z9salsa20_8Pj
	.type	_Z9salsa20_8Pj, @function
_Z9salsa20_8Pj:
.LFB3928:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3928:
	.size	_Z9salsa20_8Pj, .-_Z9salsa20_8Pj
	.globl	_Z8blockmixPj
	.type	_Z8blockmixPj, @function
_Z8blockmixPj:
.LFB4588:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z10endian_cvtPj
	.cfi_endproc
.LFE4588:
	.size	_Z8blockmixPj, .-_Z8blockmixPj
	.globl	_Z5romixPjiPA32_j
	.type	_Z5romixPjiPA32_j, @function
_Z5romixPjiPA32_j:
.LFB3930:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3930:
	.size	_Z5romixPjiPA32_j, .-_Z5romixPjiPA32_j
	.globl	_Z6scryptP12SHA256_CTX_WPjmS1_PA32_jS1_S1_S1_S1_S1_S1_S1_S1_
	.type	_Z6scryptP12SHA256_CTX_WPjmS1_PA32_jS1_S1_S1_S1_S1_S1_S1_S1_, @function
_Z6scryptP12SHA256_CTX_WPjmS1_PA32_jS1_S1_S1_S1_S1_S1_S1_S1_:
.LFB3931:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3931:
	.size	_Z6scryptP12SHA256_CTX_WPjmS1_PA32_jS1_S1_S1_S1_S1_S1_S1_S1_, .-_Z6scryptP12SHA256_CTX_WPjmS1_PA32_jS1_S1_S1_S1_S1_S1_S1_S1_
	.globl	_Z8pkg_initPj
	.type	_Z8pkg_initPj, @function
_Z8pkg_initPj:
.LFB3933:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	$1, %edx
	movq	%rdi, %rbx
	movl	$132048, %esi
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rdx
	xorl	%eax, %eax
.L108:
	movl	(%rbx,%rax), %ecx
	movl	%ecx, 112(%rdx,%rax)
	addq	$4, %rax
	cmpq	$80, %rax
	jne	.L108
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L109
	call	__stack_chk_fail@PLT
.L109:
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	movq	%rdx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3933:
	.size	_Z8pkg_initPj, .-_Z8pkg_initPj
	.globl	_Z42__device_stub__Z10scryptCudaPP10SCRYPT_PKGPP10SCRYPT_PKG
	.type	_Z42__device_stub__Z10scryptCudaPP10SCRYPT_PKGPP10SCRYPT_PKG, @function
_Z42__device_stub__Z10scryptCudaPP10SCRYPT_PKGPP10SCRYPT_PKG:
.LFB3959:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L112
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z10scryptCudaPP10SCRYPT_PKG(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L112:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L114
	call	__stack_chk_fail@PLT
.L114:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3959:
	.size	_Z42__device_stub__Z10scryptCudaPP10SCRYPT_PKGPP10SCRYPT_PKG, .-_Z42__device_stub__Z10scryptCudaPP10SCRYPT_PKGPP10SCRYPT_PKG
	.globl	_Z10scryptCudaPP10SCRYPT_PKG
	.type	_Z10scryptCudaPP10SCRYPT_PKG, @function
_Z10scryptCudaPP10SCRYPT_PKG:
.LFB3960:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z10scryptCudaPP10SCRYPT_PKGPP10SCRYPT_PKG
	.cfi_endproc
.LFE3960:
	.size	_Z10scryptCudaPP10SCRYPT_PKG, .-_Z10scryptCudaPP10SCRYPT_PKG
	.section	.rodata.str1.1
.LC4:
	.string	"cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?"
.LC5:
	.string	"cudaMalloc failed!"
.LC6:
	.string	"scryptCuda launch failed: %s\n"
.LC7:
	.string	"cudaDeviceSynchronize returned error code %d after launching scryptCuda!\n"
	.text
	.globl	_Z14scryptWithCudaPP10SCRYPT_PKGii
	.type	_Z14scryptWithCudaPP10SCRYPT_PKGii, @function
_Z14scryptWithCudaPP10SCRYPT_PKGii:
.LFB3934:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r14
	movl	$1, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	cudaSetDevice@PLT
	leaq	.LC4(%rip), %rdx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L131
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	movl	$1048576, %esi
	xorl	%ebp, %ebp
	call	cudaMallocManaged@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L120
	leaq	.LC5(%rip), %rdx
.L131:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L119
.L120:
	movq	(%r14,%rbp), %rax
	movq	8(%rsp), %rbx
	leaq	112(%rax), %rdi
	addq	%rbp, %rbx
	addq	$8, %rbp
	call	_Z8pkg_initPj
	movq	%rax, (%rbx)
	cmpq	$1048576, %rbp
	jne	.L120
	movabsq	$4294967297, %rax
	movl	%r13d, 28(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, 32(%rsp)
	movl	36(%rsp), %ecx
	movq	%rax, 20(%rsp)
	movq	28(%rsp), %rdx
	movl	%r12d, 16(%rsp)
	movl	24(%rsp), %esi
	movq	16(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L121
	movq	8(%rsp), %rdi
	call	_Z42__device_stub__Z10scryptCudaPP10SCRYPT_PKGPP10SCRYPT_PKG
.L121:
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L122
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L119
.L122:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L119
	movq	stderr(%rip), %rdi
	movl	%eax, %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC7(%rip), %rdx
	call	__fprintf_chk@PLT
.L119:
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L125
	call	__stack_chk_fail@PLT
.L125:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3934:
	.size	_Z14scryptWithCudaPP10SCRYPT_PKGii, .-_Z14scryptWithCudaPP10SCRYPT_PKGii
	.section	.rodata.str1.1
.LC10:
	.string	"scryptWithCuda failed!\n"
.LC11:
	.string	"cudaDeviceReset failed!"
.LC8:
	.string	"48f4bdc6cbabf6e59d5714adc7caa1af293bc49c75d447c2fdc1843694d1ef56"
.LC9:
	.string	"f03a2314e267c0e67627a51aa8c7bcdd99a2d173deec41ab96945eb4c7e43dee"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3932:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC8(%rip), %rsi
	movl	$65, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	$225472033, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$392, %rsp
	.cfi_def_cfa_offset 448
	movq	%fs:40, %rax
	movq	%rax, 376(%rsp)
	movabsq	$3472328296227680306, %rax
	leaq	93(%rsp), %rbp
	leaq	93(%rsp), %rdi
	movb	$0, 74(%rsp)
	rep movsb
	leaq	158(%rsp), %rdi
	leaq	.LC9(%rip), %rsi
	movl	$65, %ecx
	rep movsb
	leaq	66(%rsp), %rdi
	movl	$8, %esi
	leaq	158(%rsp), %rbx
	leaq	223(%rsp), %r15
	movq	%rax, 66(%rsp)
	call	_Z13little_endianPcm
	movq	%rbp, %rdi
	movl	$64, %esi
	call	_Z13little_endianPcm
	movl	$64, %esi
	movq	%rbx, %rdi
	call	_Z13little_endianPcm
	leaq	8(%rsp), %rdi
	movabsq	$219043332147, %rax
	movl	$-1, 40(%rsp)
	movq	%rax, 8(%rsp)
	movl	$3489660929, %eax
	salq	$4, %rax
	movq	%rax, 16(%rsp)
	movabsq	$511101108226, %rax
	movq	%rax, 24(%rsp)
	call	mktime@PLT
	movl	$4, %edi
	movq	%rax, %r12
	call	_Znwm@PLT
	leaq	84(%rsp), %r8
	leaq	75(%rsp), %rsi
	movl	%r12d, (%rax)
	movq	%rax, %rdx
	movq	%rax, %rdi
	call	_Z15endian_cvt_hostPj
	movl	(%rdx), %edi
	call	_Z22word_to_hex_eight_hostjPcm.part.0
	movq	%r8, %rsi
	movl	$436330391, %edi
	call	_Z22word_to_hex_eight_hostjPcm.part.0
	movq	%r8, %rdi
	movl	$8, %esi
	call	_Z13little_endianPcm
	movq	66(%rsp), %rax
	movq	%rbp, %rsi
	leaq	231(%rsp), %rdi
	movl	$65, %ecx
	rep movsb
	movq	%rax, 223(%rsp)
	movq	75(%rsp), %rax
	movl	$65, %ecx
	leaq	295(%rsp), %rdi
	movq	%rbx, %rsi
	rep movsb
	movq	%rax, 359(%rsp)
	movq	84(%rsp), %rax
	movl	$4, %edi
	movq	%rax, 367(%rsp)
	movb	92(%rsp), %al
	movb	%al, 375(%rsp)
	call	malloc@PLT
	movl	$1048576, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rax, %r12
	movq	%rax, %r14
.L133:
	movl	$132048, %edi
	addq	$8, %r14
	call	malloc@PLT
	movq	%r15, %rdi
	movl	$153, %esi
	movq	%rax, -8(%r14)
	leaq	112(%rax), %rdx
	movq	%rax, %rbx
	call	_Z24hex_string_to_words_hostPcmPj
	movl	%r13d, 0(%rbp)
	movq	%rbp, %rdi
	addl	$76, %r13d
	call	_Z15endian_cvt_hostPj
	movl	0(%rbp), %eax
	movl	%eax, 188(%rbx)
	cmpl	$235433505, %r13d
	jne	.L133
	movl	$256, %edx
	movl	$39063, %esi
	movq	%r12, %rdi
	call	_Z14scryptWithCudaPP10SCRYPT_PKGii
	testl	%eax, %eax
	je	.L134
	movq	stderr(%rip), %rdi
	leaq	.LC10(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	jmp	.L142
.L134:
	call	cudaDeviceReset@PLT
	movl	%eax, %edx
	xorl	%eax, %eax
	testl	%edx, %edx
	je	.L132
	movq	stderr(%rip), %rdi
	leaq	.LC11(%rip), %rdx
	movl	$2, %esi
.L142:
	call	__fprintf_chk@PLT
	movl	$1, %eax
.L132:
	movq	376(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L137
	call	__stack_chk_fail@PLT
.L137:
	addq	$392, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3932:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z10scryptCudaPP10SCRYPT_PKG"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3962:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10scryptCudaPP10SCRYPT_PKG(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3962:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdint.h>
#include "hip/hip_runtime.h"

#include <iostream>
#include <stdio.h>
#include <algorithm>
#include <stddef.h>
// helper functions and utilities to work with CUDA
// #include <helper_functions.h>
// #include <helper_cuda.h>
#define CORRECTNONCE 235472032
#define MAXNONCE 10000000
#define NUMTHREAD 131072
#define BLOCKSIZE 256
#define NO_DEVICE 1
#define STARTATNONCE CORRECTNONCE-MAXNONCE+1

// -----------------------------------------------------------------------------------------------------------------------------------
typedef unsigned char BYTE; // 8-bit byte
typedef uint32_t  WORD; // 32-bit word
// -----------------------------------------------------------------------------------------------------------------------------------
#define ipad_elm 0x36363636
#define opad_elm 0x5c5c5c5c
#define SUM(a,b) (a+b) & 0xffffffff
// -----------------------------------------------------------------------------------------------------------------------------------
#define h0 0x6a09e667
#define h1 0xbb67ae85
#define h2 0x3c6ef372
#define h3 0xa54ff53a
#define h4 0x510e527f
#define h5 0x9b05688c
#define h6 0x1f83d9ab
#define h7 0x5be0cd19


// Macros
#define SHA256_BLOCK_SIZE 32 

#define ROTLEFT(a,b) (((a) << (b)) | ((a) >> (32-(b))))
#define ROTRIGHT(a,b) (((a) >> (b)) | ((a) << (32-(b))))

#define CH(x,y,z) (((x) & (y)) ^ (~(x) & (z)))
#define MAJ(x,y,z) (((x) & (y)) ^ ((x) & (z)) ^ ((y) & (z)))
#define EP0(x) (ROTRIGHT(x,2) ^ ROTRIGHT(x,13) ^ (ROTRIGHT(x,22)))
#define EP1(x) (ROTRIGHT(x,6) ^ ROTRIGHT(x,11) ^ (ROTRIGHT(x,25)))
#define SIG0(x) (ROTRIGHT(x,7) ^ ROTRIGHT(x,18) ^ ((x) >> 3))
#define SIG1(x) (ROTRIGHT(x,17) ^ ROTRIGHT(x,19) ^ ((x) >> 10))


typedef struct SHA256_CTX
{
    BYTE data[64];
    WORD datalen;
    unsigned long long bitlen;
    WORD state[8];
} SHA256_CTX;
typedef struct SHA256_CTX_W
{
    WORD data[16];
    WORD datalen;
    unsigned long long bitlen;
    WORD state[8];
} SHA256_CTX_W;



typedef struct SCRYPT_PKG{
    SHA256_CTX_W ctx;
    WORD input[20];
    WORD output[8];
    WORD mem[1024][32];
    WORD salt[21];
    WORD hmac_out[8];
    
    WORD in_ihash[37];
    WORD in_2_ihash[49];
    WORD pbkdf2_rm_out[32];
    WORD ihash[8];
    WORD khash[8];
    WORD in_ohash[24];
    
}SCRYPT_PKG;

// -----------------------------------------------------------------------------------------------------------------------------------

#define SALSA_MIX(destination ,a1, a2, b) (destination ^ (ROTLEFT(SUM(a1,a2),b)))






#define ipad_elm 0x36363636
#define opad_elm 0x5c5c5c5c
#define SUM(a,b) (a+b) & 0xffffffff


__device__ BYTE hex_char_to_byte(char hex_char){
    if(hex_char >= 'a' && hex_char <='f'){
        return hex_char - 'a' + 10;
    }
    else if(hex_char >='A' && hex_char <= 'F'){
        return hex_char - 'A' + 10;
    } else if (hex_char >='0' && hex_char <= '9')
    {
        return hex_char - '0';
    }
    return 0;
}

BYTE hex_char_to_byte_host(char hex_char){
    if(hex_char >= 'a' && hex_char <='f'){
        return hex_char - 'a' + 10;
    }
    else if(hex_char >='A' && hex_char <= 'F'){
        return hex_char - 'A' + 10;
    } else if (hex_char >='0' && hex_char <= '9')
    {
        return hex_char - '0';
    }
    return 0;
}
__device__ void hex_string_to_bytes(char hex_str_in[], unsigned long hex_str_len, BYTE bytes_out[]){
    for (int i = 0; i<hex_str_len-1; i+=2){
        bytes_out[i/2] = ((hex_char_to_byte(hex_str_in[i])) << 4) | (hex_char_to_byte(hex_str_in[i+1]));

    }
}

__device__ void hex_string_to_words(char hex_str_in[], unsigned long hex_str_len, WORD words_out[]){
    for (int i = 0; i<hex_str_len-1; i+=8){
        words_out[i/8] = (\
            hex_char_to_byte(hex_str_in[i])<<28|\
            (hex_char_to_byte(hex_str_in[i+1])<<24 & 0x0f000000)|\
            (hex_char_to_byte(hex_str_in[i+2])<<20 & 0x00f00000)|\
            (hex_char_to_byte(hex_str_in[i+3])<<16 & 0x000f0000)|\
            (hex_char_to_byte(hex_str_in[i+4])<<12 & 0x0000f000)|\
            (hex_char_to_byte(hex_str_in[i+5])<<8  & 0x00000f00)|\
            (hex_char_to_byte(hex_str_in[i+6])<<4  & 0x000000f0)|\
            (hex_char_to_byte(hex_str_in[i+7])     & 0x0000000f)\
        );
        // printf("%08x  %d\n", words_out[i/8], i/8);
    }
}

void hex_string_to_words_host(char hex_str_in[], unsigned long hex_str_len, WORD words_out[]){
    for (int i = 0; i<hex_str_len-1; i+=8){
        words_out[i/8] = (\
            hex_char_to_byte_host(hex_str_in[i])<<28|\
            (hex_char_to_byte_host(hex_str_in[i+1])<<24 & 0x0f000000)|\
            (hex_char_to_byte_host(hex_str_in[i+2])<<20 & 0x00f00000)|\
            (hex_char_to_byte_host(hex_str_in[i+3])<<16 & 0x000f0000)|\
            (hex_char_to_byte_host(hex_str_in[i+4])<<12 & 0x0000f000)|\
            (hex_char_to_byte_host(hex_str_in[i+5])<<8  & 0x00000f00)|\
            (hex_char_to_byte_host(hex_str_in[i+6])<<4  & 0x000000f0)|\
            (hex_char_to_byte_host(hex_str_in[i+7])     & 0x0000000f)\
        );
        // printf("%08x  %d\n", words_out[i/8], i/8);
    }
}
__device__ void half_byte_to_hex(BYTE half_byte_in, char *hex){
    BYTE half_byte_conv = half_byte_in & 0x0f;
    if(half_byte_conv<16){
        if (half_byte_conv>=10){
            *hex = 'a'+ half_byte_conv - 10;
            // printf("%c\n", *hex);
            return;
        }
        else{
            *hex = '0' + half_byte_conv;
            // printf("%c\n", *hex);
            return;
        }
    }
    printf("The half byte must be in range of [0:15]\n");
}

void half_byte_to_hex_host(BYTE half_byte_in, char *hex){
    BYTE half_byte_conv = half_byte_in & 0x0f;
    if(half_byte_conv<16){
        if (half_byte_conv>=10){
            *hex = 'a'+ half_byte_conv - 10;
            // printf("%c\n", *hex);
            return;
        }
        else{
            *hex = '0' + half_byte_conv;
            // printf("%c\n", *hex);
            return;
        }
    }
    printf("The half byte must be in range of [0:15]\n");
}
__device__ void word_to_hex_eight(WORD word_in, char *hex_eight, unsigned long hex_eight_size){
    if(hex_eight_size==8){
        half_byte_to_hex(word_in>>28, &hex_eight[0]);
        half_byte_to_hex(word_in>>24, &hex_eight[1]);
        half_byte_to_hex(word_in>>20, &hex_eight[2]);
        half_byte_to_hex(word_in>>16, &hex_eight[3]);
        half_byte_to_hex(word_in>>12, &hex_eight[4]);
        half_byte_to_hex(word_in>>8, &hex_eight[5]);
        half_byte_to_hex(word_in>>4, &hex_eight[6]);
        half_byte_to_hex(word_in, &hex_eight[7]);
        // printf("%c", hex_eight[0]);
        // printf("%d", word_in>>24);
        return;
    }
    printf("The hex_pair must have the length of two characters: %d\n", (int)hex_eight_size);
}

void word_to_hex_eight_host(WORD word_in, char *hex_eight, unsigned long hex_eight_size){
    if(hex_eight_size==8){
        half_byte_to_hex_host(word_in>>28, &hex_eight[0]);
        half_byte_to_hex_host(word_in>>24, &hex_eight[1]);
        half_byte_to_hex_host(word_in>>20, &hex_eight[2]);
        half_byte_to_hex_host(word_in>>16, &hex_eight[3]);
        half_byte_to_hex_host(word_in>>12, &hex_eight[4]);
        half_byte_to_hex_host(word_in>>8, &hex_eight[5]);
        half_byte_to_hex_host(word_in>>4, &hex_eight[6]);
        half_byte_to_hex_host(word_in, &hex_eight[7]);
        // printf("%c", hex_eight[0]);
        // printf("%d", word_in>>24);
        return;
    }
    printf("The hex_pair must have the length of two characters: %d\n", (int)hex_eight_size);
}

__device__ void words_to_hex_string(WORD *words_in, unsigned long words_len, char hex_str[], unsigned long hex_str_len){
    char hex_eight[8];
    if(hex_str_len == 8*words_len){
        for (int i = 0; i<words_len; ++i){
            // printf("\n w: %08x", words_in[i]);
            word_to_hex_eight(words_in[i], hex_eight, sizeof(hex_eight));
            hex_str[8*i] = hex_eight[0];
            hex_str[8*i+1] = hex_eight[1];
            hex_str[8*i+2] = hex_eight[2];
            hex_str[8*i+3] = hex_eight[3];
            hex_str[8*i+4] = hex_eight[4];
            hex_str[8*i+5] = hex_eight[5];
            hex_str[8*i+6] = hex_eight[6];
            hex_str[8*i+7] = hex_eight[7];
            // printf("%c \n", hex_eight[7]);
        }
        // printf("\n%s", hex_str);
        return;
    }
    printf("The hex_string must have the lenght of 4*bytes_len: %d\n", (int)hex_str_len);
}

__device__ void add_two_words_array_512_bit(WORD *a, WORD *b){
    
    for (int i = 15; i>=0; i--){

        a[i] += b[i];

    }
}

__device__ void add_two_words_array_512_bit_with_carry(WORD *a, WORD *b){
    WORD sum = 0;
    WORD sum1 = 0;
    
    for (int i = 15; i>=0; i--){

        sum = ((a[i]&0x0000ffff)+(b[i]&0x0000ffff)+(sum1>>16));
        sum1 = ((a[i]>>16)+(b[i]>>16)+(sum>>16));
        a[i]= (sum & 0x0000ffff) + (sum1<<16);

    }
}

__device__ void print_words_inline(WORD *w, unsigned long w_len){
    printf("\n");
    for (int i = 0; i< w_len; i++){
        printf("%08x", w[i]);
    }
    printf("\n");
}

void print_words_inline_host(WORD *w, unsigned long w_len){
    printf("\n");
    for (int i = 0; i< w_len; i++){
        printf("%08x", w[i]);
    }
    printf("\n");
}

void print_words_multiline_host(WORD *w, unsigned long w_len){
    printf("\n");
    for (int i = 0; i< w_len; i++){
        printf("%08x\n", w[i]);
    }
    printf("\n");
}

__device__ void print_words_multiline(WORD *w, unsigned long w_len){
    printf("\n");
    for (int i = 0; i< w_len; i++){
        printf("%08x\n", w[i]);
    }
    printf("\n");
}

__device__ void endian_cvt(WORD *w){
    WORD out;

    out = (*w>>24)|((*w>>8)&0x0000ff00)|((*w<<8)&0x00ff0000)|(*w<<24);

    *w = out;
}

__device__ void endian_full(WORD *w, unsigned long w_len){
    for (int i = 0; i < w_len; i++)
    {
        endian_cvt(&w[i]);
    }
}
void little_endian(char *c, unsigned long w_len){
    char *dc = (char*)malloc(w_len);

    for (int i = 0; i< w_len; i+=2){
        dc[w_len-2-i] = c[i];
        dc[w_len-1-i] = c[i+1];   
    }
    for (int i = 0; i< w_len; i++){
        c[i] = dc[i];

    }
    c[w_len] = '\0';
    
}

void endian_cvt_host(WORD *w){
    WORD out;

    out = (*w>>24)|((*w>>8)&0x0000ff00)|((*w<<8)&0x00ff0000)|(*w<<24);

    *w = out;
}

 
 // Create init state for SHA-256
 __device__ void sha256_init(SHA256_CTX *ctx)
 {
     ctx->datalen = 0;
     ctx->bitlen = 0;
     ctx->state[0] = h0;
     ctx->state[1] = h1;
     ctx->state[2] = h2;
     ctx->state[3] = h3;
     ctx->state[4] = h4;
     ctx->state[5] = h5;
     ctx->state[6] = h6;
     ctx->state[7] = h7;
 }
 
  // Create init state for SHA-256
  __device__ void sha256_init_words(SHA256_CTX_W *ctx)
  {
      ctx->datalen = 0;
      ctx->bitlen = 0;
      ctx->state[0] = h0;
      ctx->state[1] = h1;
      ctx->state[2] = h2;
      ctx->state[3] = h3;
      ctx->state[4] = h4;
      ctx->state[5] = h5;
      ctx->state[6] = h6;
      ctx->state[7] = h7;
  }
  
 __device__ void sha256_transform(SHA256_CTX *ctx, BYTE data[])
 {
    static const WORD k[64] = {0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5, \
        0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, \
        0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da, \
        0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967, \
        0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, \
        0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070, \
        0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3, \
        0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};
 // m is W in hardware design
   WORD a, b, c, d, e, f, g, h, i, j, t1, t2, m[64];
 // Calculate the first 16 m elements.
   for (i = 0, j = 0; i < 16; ++i, j += 4)
     m[i] = (data[j] << 24) | (data[j + 1] << 16) | (data[j + 2] << 8) | (data[j + 3]);
 // Calculate the remain elements.
   for ( ; i < 64; ++i)
     m[i] = SIG1(m[i - 2]) + m[i - 7] + SIG0(m[i - 15]) + m[i - 16];
 // update the new value of state after each block
   a = ctx->state[0];
   b = ctx->state[1];
   c = ctx->state[2];
   d = ctx->state[3];
   e = ctx->state[4];
   f = ctx->state[5];
   g = ctx->state[6];
   h = ctx->state[7];
 // process 64 rounds
   for (i = 0; i < 64; ++i) {
     t1 = h + EP1(e) + CH(e,f,g) + k[i] + m[i];
     t2 = EP0(a) + MAJ(a,b,c);
     h = g;
     g = f;
     f = e;
     e = d + t1;
     d = c;
     c = b;
     b = a;
     a = t1 + t2;
   }
 
   ctx->state[0] += a;
   ctx->state[1] += b;
   ctx->state[2] += c;
   ctx->state[3] += d;
   ctx->state[4] += e;
   ctx->state[5] += f;
   ctx->state[6] += g;
   ctx->state[7] += h;
 }

 __device__ void sha256_transform_words(SHA256_CTX_W *ctx, WORD data[])
 {
    static const WORD k[64] = {0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5, \
        0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, \
        0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da, \
        0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967, \
        0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, \
        0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070, \
        0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3, \
        0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};
 // m is W in hardware design
   WORD a, b, c, d, e, f, g, h, i, t1, t2, m[64];
 // Calculate the first 16 m elements.
   for (i = 0; i < 16; ++i)
     m[i] = data[i];
 // Calculate the remain elements.
   for ( ; i < 64; ++i)
     m[i] = SIG1(m[i - 2]) + m[i - 7] + SIG0(m[i - 15]) + m[i - 16];
 // update the new value of state after each block
   a = ctx->state[0];
   b = ctx->state[1];
   c = ctx->state[2];
   d = ctx->state[3];
   e = ctx->state[4];
   f = ctx->state[5];
   g = ctx->state[6];
   h = ctx->state[7];
 // process 64 rounds
   for (i = 0; i < 64; ++i) {
     t1 = h + EP1(e) + CH(e,f,g) + k[i] + m[i];
     t2 = EP0(a) + MAJ(a,b,c);
     h = g;
     g = f;
     f = e;
     e = d + t1;
     d = c;
     c = b;
     b = a;
     a = t1 + t2;
   }
 
   ctx->state[0] += a;
   ctx->state[1] += b;
   ctx->state[2] += c;
   ctx->state[3] += d;
   ctx->state[4] += e;
   ctx->state[5] += f;
   ctx->state[6] += g;
   ctx->state[7] += h;
 }
 // the total length of the message has to be specified
 __device__ void sha256_update(SHA256_CTX *ctx,  BYTE data[], size_t len)
 {
     WORD i;
 
     for (i = 0; i < len; ++i){
         ctx->data[ctx->datalen] = data[i];      // Pad data (message) for each 512-block in --> transform
         ctx->datalen++;
         // after browse for 64 bytes (512-bit block) -> transform the block.
         if(ctx->datalen == 64){
             sha256_transform(ctx, ctx->data);
             ctx->bitlen += 512; // increase the bit length by 512
             ctx->datalen = 0;
         }
     }
 }

 __device__ void sha256_update_words(SHA256_CTX_W *ctx, WORD data[], size_t len)
 {
     WORD i;
 
     for (i = 0; i < len; ++i){
         ctx->data[ctx->datalen] = data[i];      // Pad data (message) for each 512-block in --> transform
         ctx->datalen++;
         // after browse for 64 bytes (512-bit block) -> transform the block.
         if(ctx->datalen == 16){
             sha256_transform_words(ctx, ctx->data);
             ctx->bitlen += 512; // increase the bit length by 512
             ctx->datalen = 0;
         }
     }
 }
 // this function processes for the last block -> after all real data is browsed 
 __device__ void sha256_final(SHA256_CTX *ctx, WORD *hash){
     WORD i;
 // padding is processed from here
     i = ctx->datalen;
     if (ctx->datalen < 56){
         // add byte 0x80 at the first if the datalength is lower than 56
         ctx->data[i++] = 0x80;
         // pad the zero bytes until the byte 56th
         while (i<56)
         {
             ctx->data[i++]=0x00;
         }
     }
     else{
         // add byte at the first
         ctx->data[i++]=0x80;
         // pad zero bytes until the last block
         while (i<64){
             ctx->data[i++]=0x00;
         }
         // transform this block --> it's not the last block
         sha256_transform(ctx, ctx->data);
         // set 56 zero bytes from last_block[0:55]
         memset(ctx->data, 0, 56);
     }
 
     // Append to the padding the total message's length in bits and transform.
     ctx->bitlen += ctx->datalen * 8;
     ctx->data[63] = ctx->bitlen;
     ctx->data[62] = ctx->bitlen >> 8;
     ctx->data[61] = ctx->bitlen >> 16;
     ctx->data[60] = ctx->bitlen >> 24;
     ctx->data[59] = ctx->bitlen >> 32;
     ctx->data[58] = ctx->bitlen >> 40;
     ctx->data[57] = ctx->bitlen >> 48;
     ctx->data[56] = ctx->bitlen >> 56;
 // end padding
     sha256_transform(ctx, ctx->data);
 
     // Since this implementation uses little endian byte ordering and SHA uses big endian,
     // reverse all the bytes when copying the final state to the output hash.
 
 
         hash[0] = ctx->state[0];
         hash[1] = ctx->state[1];
         hash[2] = ctx->state[2];
         hash[3] = ctx->state[3];
         hash[4] = ctx->state[4];
         hash[5] = ctx->state[5];
         hash[6] = ctx->state[6];
         hash[7] = ctx->state[7]; 
  
 }
 
  // this function processes for the last block -> after all real data is browsed 
  __device__ void sha256_final_words(SHA256_CTX_W *ctx, WORD *hash){
    WORD i;
// padding is processed from here
    i = ctx->datalen;
    if (ctx->datalen < 14){
        // add byte 0x80 at the first if the datalength is lower than 56
        ctx->data[i++] = 0x80000000;
        // pad the zero bytes until the byte 56th
        while (i<14)
        {
            ctx->data[i++]=0x00000000;
        }
    }
    else{
        // add bit 1 at the first
        ctx->data[i++]=0x80000000;
        // pad zero bytes until the last block
        while (i<16){
            ctx->data[i++]=0x00000000;
        }
        // transform this block --> it's not the last block
        sha256_transform_words(ctx, ctx->data);
        // set 56 zero bytes from last_block[0:55]
        ctx->data[0] =0x00000000;
        ctx->data[1] =0x00000000;
        ctx->data[2] =0x00000000;
        ctx->data[3] =0x00000000;
        ctx->data[4] =0x00000000;
        ctx->data[5] =0x00000000;
        ctx->data[6] =0x00000000;
        ctx->data[7] =0x00000000;
        ctx->data[8] =0x00000000;
        ctx->data[9] =0x00000000;
        ctx->data[10]=0x00000000;
        ctx->data[11]=0x00000000;
        ctx->data[12]=0x00000000;
        ctx->data[13]=0x00000000;
    }

    // Append to the padding the total message's length in bits and transform.
    ctx->bitlen += ctx->datalen * 32;
    ctx->data[15] = ctx->bitlen;
    ctx->data[14] = ctx->bitlen>>32;


// end padding
    sha256_transform_words(ctx, ctx->data);

    // Since this implementation uses little endian byte ordering and SHA uses big endian,
    // reverse all the bytes when copying the final state to the output hash.


        hash[0] = ctx->state[0];
        hash[1] = ctx->state[1];
        hash[2] = ctx->state[2];
        hash[3] = ctx->state[3];
        hash[4] = ctx->state[4];
        hash[5] = ctx->state[5];
        hash[6] = ctx->state[6];
        hash[7] = ctx->state[7]; 
 
}

 __device__ void sha256_in_words(SHA256_CTX_W *ctx, WORD *words_in, unsigned long words_in_len, WORD *hash_w){

    // printf("\n%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", words_in[0], words_in[1], words_in[2], words_in[3], words_in[4], words_in[5], words_in[6], words_in[7], words_in[8], words_in[9], words_in[10], words_in[11], words_in[12], words_in[13], words_in[14], words_in[15], words_in[16], words_in[17], words_in[18], words_in[19], words_in[20], words_in[21], words_in[22], words_in[23]); // true

     sha256_init_words(ctx);
     
     sha256_update_words(ctx, words_in, words_in_len);
    //  print_words_inline(ctx->state, 8);
     sha256_final_words(ctx, hash_w);
     
 }
 
 __device__ void sha256_in_words_org(SHA256_CTX *ctx, WORD *words_in, unsigned long words_in_len, WORD *hash_w){
     unsigned long bytes_in_len = words_in_len * 4;
    //  printf("%d\n", words_in_len);
    // printf("\n%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", words_in[0], words_in[1], words_in[2], words_in[3], words_in[4], words_in[5], words_in[6], words_in[7], words_in[8], words_in[9], words_in[10], words_in[11], words_in[12], words_in[13], words_in[14], words_in[15], words_in[16], words_in[17], words_in[18], words_in[19], words_in[20], words_in[21], words_in[22], words_in[23]); // true
    BYTE *bytes_in = (BYTE *)malloc((bytes_in_len)*sizeof(BYTE));
     for (int i = 0; i<words_in_len; i++){
         bytes_in[4*i] = words_in[i] >> 24;
         bytes_in[4*i+1] = words_in[i] >> 16;
         bytes_in[4*i+2] = words_in[i] >> 8;
         bytes_in[4*i+3] = words_in[i];
        //  printf("%x %x %x %x ", bytes_in[4*i], bytes_in[4*i+1], bytes_in[4*i+2], bytes_in[4*i+3]);
     }
     sha256_init(ctx);
     
     sha256_update(ctx, bytes_in, bytes_in_len);
    //  print_words_inline(ctx->state, 8);
     sha256_final(ctx, hash_w);
     
 }
 __device__ void sha256_in_words_test(SHA256_CTX_W *ctx, WORD *words_in, unsigned long words_in_len, WORD *hash_w){

   //  printf("%d\n", words_in_len);
   // printf("\n%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", words_in[0], words_in[1], words_in[2], words_in[3], words_in[4], words_in[5], words_in[6], words_in[7], words_in[8], words_in[9], words_in[10], words_in[11], words_in[12], words_in[13], words_in[14], words_in[15], words_in[16], words_in[17], words_in[18], words_in[19], words_in[20], words_in[21], words_in[22], words_in[23]); // true
   
   

    sha256_init_words(ctx);
    
    sha256_update_words(ctx, words_in, words_in_len);
   //  print_words_inline(ctx->state, 8);
    sha256_final_words(ctx, hash_w);
    
}


__device__ void hmac(SHA256_CTX_W *ctx, WORD *salt, unsigned long salt_len, WORD *message, unsigned long message_len, WORD* out_hmac){
     WORD IPAD[8] = {ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm}; // 256-bit 363636...36   
     WORD OPAD[8] = {opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm}; // 256-bit 5c5c5c...5c
    WORD *khash = (WORD*) malloc(sizeof(WORD)*8);
    // print_words_inline(message, 20); // OK
 
    sha256_in_words(ctx, message, message_len, khash);
    
    // print_words_inline(khash, 8); // OK
    // for(int i=0;i<8; i++){
    //     printf("%08x", khash[i]);
    // }
    WORD ixor[16] = {\
        IPAD[0]^khash[0],\
        IPAD[1]^khash[1],\
        IPAD[2]^khash[2],\
        IPAD[3]^khash[3],\
        IPAD[4]^khash[4],\
        IPAD[5]^khash[5],\
        IPAD[6]^khash[6],\
        IPAD[7]^khash[7],\
        IPAD[0],\
        IPAD[1],\
        IPAD[2],\
        IPAD[3],\
        IPAD[4],\
        IPAD[5],\
        IPAD[6],\
        IPAD[7],\
    };

    WORD oxor[16] = {\
        OPAD[0]^khash[0],\
        OPAD[1]^khash[1],\
        OPAD[2]^khash[2],\
        OPAD[3]^khash[3],\
        OPAD[4]^khash[4],\
        OPAD[5]^khash[5],\
        OPAD[6]^khash[6],\
        OPAD[7]^khash[7],\
        OPAD[0],\
        OPAD[1],\
        OPAD[2],\
        OPAD[3],\
        OPAD[4],\
        OPAD[5],\
        OPAD[6],\
        OPAD[7],\
    };
    WORD *in_ihash = (WORD*)malloc((sizeof(ixor)/sizeof(WORD)+salt_len)*sizeof(WORD));
    unsigned long in_ihash_len = sizeof(ixor)/sizeof(WORD)+salt_len;

    int i;
    for(i = 0; i<sizeof(ixor)/sizeof(WORD); i++){
        in_ihash[i] = ixor[i];
    }
   
    for(;i<sizeof(ixor)/sizeof(WORD)+salt_len; i++){
        in_ihash[i] = salt[i-sizeof(ixor)/sizeof(WORD)];
    }
    
    WORD *ihash = (WORD*)malloc(8*sizeof(WORD));
    // print_words_inline(in_ihash, sizeof(ixor)/sizeof(WORD)+salt_len); // Problem
    sha256_in_words(ctx, in_ihash, in_ihash_len, ihash); // Why it's wrong
    // print_words_inline(ihash, 8); // OK
    unsigned long in_ohash_len = sizeof(oxor)/sizeof(WORD)+8;
    WORD *in_ohash = (WORD*)malloc(in_ohash_len*sizeof(WORD));  // WORD[24]

    // printf("%d\n", (in_ohash_len));
    // printf("%d\n", in_ohash_len); // 24 --> true
    for(i = 0; i<sizeof(oxor)/sizeof(WORD); i++){
        in_ohash[i] = oxor[i];
    }
    for(;i<sizeof(ixor)/sizeof(WORD)+salt_len; i++){
        in_ohash[i] = ihash[i-sizeof(oxor)/sizeof(WORD)];
    }

    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x %d\n", in_ohash[0], in_ohash[1], in_ohash[2], in_ohash[3], in_ohash[4], in_ohash[5], in_ohash[6], in_ohash[7], in_ohash[8], in_ohash[9], in_ohash[10], in_ohash[11], in_ohash[12], in_ohash[13], in_ohash[14], in_ohash[15], in_ohash[16], in_ohash[17], in_ohash[18], in_ohash[19], in_ohash[20], in_ohash[21], in_ohash[22], in_ohash[23], in_ohash_len); // true

    WORD temp[] = {in_ohash[0], in_ohash[1], in_ohash[2], in_ohash[3], in_ohash[4], in_ohash[5], in_ohash[6], in_ohash[7], in_ohash[8], in_ohash[9], in_ohash[10], in_ohash[11], in_ohash[12], in_ohash[13], in_ohash[14], in_ohash[15], in_ohash[16], in_ohash[17], in_ohash[18], in_ohash[19], in_ohash[20], in_ohash[21], in_ohash[22], in_ohash[23]};
    // static WORD ohash[8];
    // printf("\n");
    sha256_in_words(ctx, temp, in_ohash_len, out_hmac);
    // print_words_inline(ohash, 8); // OK
    
    // return ohash;
}
__device__ void hmac_2(SHA256_CTX_W *ctx, WORD *salt, unsigned long salt_len, WORD *message, unsigned long message_len, WORD* out_hmac, WORD khash[8], WORD in_ihash[49], WORD ihash[8], WORD in_ohash[24]){
     WORD IPAD[8] = {ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm}; // 256-bit 363636...36   
     WORD OPAD[8] = {opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm}; // 256-bit 5c5c5c...5c

    // print_words_inline(message, 20); // OK
 
    // sha256_in_words(ctx, message, message_len, khash);
    
    // print_words_inline(khash, 8); // OK
    // for(int i=0;i<8; i++){
    //     printf("%08x", khash[i]);
    // }
    WORD ixor[16] = {\
        IPAD[0]^khash[0],\
        IPAD[1]^khash[1],\
        IPAD[2]^khash[2],\
        IPAD[3]^khash[3],\
        IPAD[4]^khash[4],\
        IPAD[5]^khash[5],\
        IPAD[6]^khash[6],\
        IPAD[7]^khash[7],\
        IPAD[0],\
        IPAD[1],\
        IPAD[2],\
        IPAD[3],\
        IPAD[4],\
        IPAD[5],\
        IPAD[6],\
        IPAD[7],\
    };

    WORD oxor[16] = {\
        OPAD[0]^khash[0],\
        OPAD[1]^khash[1],\
        OPAD[2]^khash[2],\
        OPAD[3]^khash[3],\
        OPAD[4]^khash[4],\
        OPAD[5]^khash[5],\
        OPAD[6]^khash[6],\
        OPAD[7]^khash[7],\
        OPAD[0],\
        OPAD[1],\
        OPAD[2],\
        OPAD[3],\
        OPAD[4],\
        OPAD[5],\
        OPAD[6],\
        OPAD[7],\
    };

    unsigned long in_ihash_len = sizeof(ixor)/sizeof(WORD)+salt_len;
    // printf("%d\n", (sizeof(ixor)/sizeof(WORD)+salt_len));
    int i;
    for(i = 0; i<sizeof(ixor)/sizeof(WORD); i++){
        in_ihash[i] = ixor[i];
    }
   
    for(;i<sizeof(ixor)/sizeof(WORD)+salt_len; i++){
        in_ihash[i] = salt[i-sizeof(ixor)/sizeof(WORD)];
    }
    

    // print_words_inline(in_ihash, sizeof(ixor)/sizeof(WORD)+salt_len); // Problem
    sha256_in_words(ctx, in_ihash, in_ihash_len, ihash); // Why it's wrong
    // print_words_inline(ihash, 8); // OK
    unsigned long in_ohash_len = sizeof(oxor)/sizeof(WORD)+8;


    
    // printf("%d\n", in_ohash_len); // 24 --> true
    for(i = 0; i<sizeof(oxor)/sizeof(WORD); i++){
        in_ohash[i] = oxor[i];
    }
    for(;i<sizeof(ixor)/sizeof(WORD)+salt_len; i++){
        in_ohash[i] = ihash[i-sizeof(oxor)/sizeof(WORD)];
    }

    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x %d\n", in_ohash[0], in_ohash[1], in_ohash[2], in_ohash[3], in_ohash[4], in_ohash[5], in_ohash[6], in_ohash[7], in_ohash[8], in_ohash[9], in_ohash[10], in_ohash[11], in_ohash[12], in_ohash[13], in_ohash[14], in_ohash[15], in_ohash[16], in_ohash[17], in_ohash[18], in_ohash[19], in_ohash[20], in_ohash[21], in_ohash[22], in_ohash[23], in_ohash_len); // true

    WORD temp[] = {in_ohash[0], in_ohash[1], in_ohash[2], in_ohash[3], in_ohash[4], in_ohash[5], in_ohash[6], in_ohash[7], in_ohash[8], in_ohash[9], in_ohash[10], in_ohash[11], in_ohash[12], in_ohash[13], in_ohash[14], in_ohash[15], in_ohash[16], in_ohash[17], in_ohash[18], in_ohash[19], in_ohash[20], in_ohash[21], in_ohash[22], in_ohash[23]};
    // static WORD ohash[8];
    // printf("\n");
    sha256_in_words(ctx, temp, in_ohash_len, out_hmac);
    // print_words_inline(ohash, 8); // OK
    
    // return ohash;
}

__device__ void hmac_test(SHA256_CTX_W *ctx, WORD *salt, unsigned long salt_len, WORD *message, unsigned long message_len, WORD* out_hmac, WORD khash[8], WORD in_ihash[37], WORD ihash[8], WORD in_ohash[24]){
    // WORD IPAD[8] = {ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm, ipad_elm}; // 256-bit 363636...36   
    // WORD OPAD[8] = {opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm, opad_elm}; // 256-bit 5c5c5c...5c

    // print_words_inline(message, 20); // OK
    
    sha256_in_words(ctx, message, message_len, khash);
    
    // print_words_inline(khash, 8); // OK
    // for(int i=0;i<8; i++){
    //     printf("%08x", khash[i]);
    // }
    
    WORD ixor[16] = {\
        0x36363636^khash[0],\
        0x36363636^khash[1],\
        0x36363636^khash[2],\
        0x36363636^khash[3],\
        0x36363636^khash[4],\
        0x36363636^khash[5],\
        0x36363636^khash[6],\
        0x36363636^khash[7],\
        0x36363636,\
        0x36363636,\
        0x36363636,\
        0x36363636,\
        0x36363636,\
        0x36363636,\
        0x36363636,\
        0x36363636,\
    };

    WORD oxor[16] = {\
        0x5C5C5C5C^khash[0],\
        0x5C5C5C5C^khash[1],\
        0x5C5C5C5C^khash[2],\
        0x5C5C5C5C^khash[3],\
        0x5C5C5C5C^khash[4],\
        0x5C5C5C5C^khash[5],\
        0x5C5C5C5C^khash[6],\
        0x5C5C5C5C^khash[7],\
        0x5C5C5C5C,\
        0x5C5C5C5C,\
        0x5C5C5C5C,\
        0x5C5C5C5C,\
        0x5C5C5C5C,\
        0x5C5C5C5C,\
        0x5C5C5C5C,\
        0x5C5C5C5C,\
    };
    // print_words_inline(IPAD, 8);
    // print_words_inline(OPAD, 8);
    unsigned long in_ihash_len = 37;
    int i;
    
    for(i = 0; i<sizeof(ixor)/sizeof(WORD); i++){
        in_ihash[i] = ixor[i];
    }
   
    for(;i<sizeof(ixor)/sizeof(WORD)+salt_len; i++){
        in_ihash[i] = salt[i-sizeof(ixor)/sizeof(WORD)];
    }
    
    // print_words_inline(in_ihash, sizeof(ixor)/sizeof(WORD)+salt_len); // Problem
    
    sha256_in_words(ctx, in_ihash, in_ihash_len, ihash); // Why it's wrong
    // printf("OK hmac_tes before in_ohash_len\n");
    // print_words_inline(ihash, 8); // OK
    unsigned long in_ohash_len = 24;
 

    
    // printf("in_ohash: %u\n", in_ohash); // 24 --> true
    for(i = 0; i<sizeof(oxor)/sizeof(WORD); i++){
        in_ohash[i] = oxor[i];
        // in_ohash[i] = 0x12341234;
    }
    for(;i<sizeof(ixor)/sizeof(WORD)+salt_len; i++){
        in_ohash[i] = ihash[i-sizeof(oxor)/sizeof(WORD)];
    }
    // printf("OK hmac_test in_ohash_len\n");
    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x %d\n", in_ohash[0], in_ohash[1], in_ohash[2], in_ohash[3], in_ohash[4], in_ohash[5], in_ohash[6], in_ohash[7], in_ohash[8], in_ohash[9], in_ohash[10], in_ohash[11], in_ohash[12], in_ohash[13], in_ohash[14], in_ohash[15], in_ohash[16], in_ohash[17], in_ohash[18], in_ohash[19], in_ohash[20], in_ohash[21], in_ohash[22], in_ohash[23], in_ohash_len); // true

    WORD temp[] = {in_ohash[0], in_ohash[1], in_ohash[2], in_ohash[3], in_ohash[4], in_ohash[5], in_ohash[6], in_ohash[7], in_ohash[8], in_ohash[9], in_ohash[10], in_ohash[11], in_ohash[12], in_ohash[13], in_ohash[14], in_ohash[15], in_ohash[16], in_ohash[17], in_ohash[18], in_ohash[19], in_ohash[20], in_ohash[21], in_ohash[22], in_ohash[23]};
    // static WORD ohash[8];
    // printf("\n");
    
    sha256_in_words(ctx, temp, in_ohash_len, out_hmac);
    
    // print_words_inline(out_hmac, 8); // OK
    
    // return ohash;
}
__device__ void pbkdf2(SHA256_CTX_W *ctx, WORD *block, unsigned long block_len, int dklenP, WORD *pbkdf2_out, WORD salt[21]){
    int num_loop = 1024/dklenP;
    // WORD *salt = (WORD*)malloc((block_len+1)*sizeof(WORD));
    WORD *hmac_out = (WORD*)malloc(8*sizeof(WORD));
    // int hmac_out_len = 8;
    
    // printf("pbkdf2: %08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", block[0], block[1], block[2], block[3], block[4], block[5], block[6], block[7], block[8], block[9], block[10], block[11], block[12], block[13], block[14], block[15], block[16], block[17], block[18], block[19]);
    for(int i = 0; i<block_len; i++){
        salt[i]=block[i];
    }
    
    for (int i = 1; i <= num_loop; i++)
    {
        salt[block_len] = i;
        hmac(ctx, salt, block_len+1, block, block_len, hmac_out);
        // print_words_inline(hmac_out, 8); // False 
        for(int j = 0; j<8; j++){
            pbkdf2_out[(i-1)*8+j] = hmac_out[j];
        }
        // printf("%08x%08x%08x%08x%08x%08x%08x%08x\n", hmac_out[0], hmac_out[1], hmac_out[2], hmac_out[3], hmac_out[4], hmac_out[5], hmac_out[6], hmac_out[7]); // wrong
        // }
    } 
}
__device__ void pbkdf2_test(SHA256_CTX_W *ctx, WORD block[20], unsigned long block_len, WORD pbkdf2_out[32], WORD salt[21], WORD hmac_out[8], WORD khash[8], WORD in_ihash[37], WORD ihash[8], WORD in_ohash[24]){

    // printf("OK\n");

    // int hmac_out_len = 8;
    
    
    // printf("pbkdf2: %08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", block[0], block[1], block[2], block[3], block[4], block[5], block[6], block[7], block[8], block[9], block[10], block[11], block[12], block[13], block[14], block[15], block[16], block[17], block[18], block[19]);
    for(int i = 0; i<block_len; i++){
        salt[i]=block[i];
    }
    // printf("pbkdf2_out: %u\n", pbkdf2_out); // 24 --> true
    // print_words_multiline(pbkdf2_out, 32);
    for (int i = 1; i <= 4; i++)
    {
        salt[block_len] = i;
        // printf("OK SALT\n");
        hmac_test(ctx, salt, block_len+1, block, block_len, hmac_out, khash, in_ihash, ihash, in_ohash);
        // printf("OK HMAC\n");
        // print_words_inline(hmac_out, 8); // False 
        for(int j = 0; j<8; j++){
            pbkdf2_out[(i-1)*8+j] = hmac_out[j];
            // pbkdf2_out[(i-1)*8+j] = 0xffffffff;
            // printf("%08x, %d\n", pbkdf2_out[(i-1)*8+j], (i-1)*8+j);
            // print_words_multiline(pbkdf2_out, 32);
        }
        // printf("%08x%08x%08x%08x%08x%08x%08x%08x\n", hmac_out[0], hmac_out[1], hmac_out[2], hmac_out[3], hmac_out[4], hmac_out[5], hmac_out[6], hmac_out[7]); // wrong
        // }
        
    
    } 
    // print_words_multiline(pbkdf2_out, 32);

}

__device__ void pbkdf2_2nd(SHA256_CTX_W *ctx, WORD *rm_out, unsigned long rm_out_len, WORD *block, unsigned long block_len, WORD* pbkdf2_out, WORD salt[21], WORD hmac_out[8], WORD khash[8], WORD in_ihash[37], WORD ihash[8], WORD in_ohash[24]){
  

    // int hmac_out_len = 8;
    
    for(int i = 0; i<rm_out_len; i++){
        salt[i]=rm_out[i];
    }


    salt[rm_out_len] = 1;
    
    hmac_2(ctx, salt, rm_out_len+1, block, block_len, hmac_out, khash, in_ihash, ihash, in_ohash);
    
    pbkdf2_out[0] = hmac_out[0];
    for(int j = 0; j<8; j++){
        //pbkdf2_out[(i-1)*8+j] = hmac_out[j];
        pbkdf2_out[j] = hmac_out[j];
        //printf("%d: %08x \n", j, hmac_out[j]);
        // printf("%d: %08x \n", j, hmac_out[j]);
    }

}
__device__ void salsa_mix_func(WORD *des, WORD *a1, WORD *a2, WORD b){
    // printf("%08x \n", *a1);
    WORD sum = *a1 + *a2;
    // printf("0x%08x + 0x%08x = 0x%08x \n", *a1, *a2,  sum);
    WORD rotl = (sum<<b) | (sum>>(32-b));
    WORD xorv = *des ^ rotl;
    
    *des = xorv;
    
}
__device__ void salsa_round(WORD *x1, WORD *x2, WORD *x3, WORD *x4){
    salsa_mix_func(x1, x4, x3, 7);
    // printf("%08x \n", *x1);
    salsa_mix_func(x2, x1, x4, 9);
    salsa_mix_func(x3, x2, x1, 13);
    salsa_mix_func(x4, x3, x2, 18);
}

__device__ WORD * salsa20_8(WORD *x){
    static WORD out[16];
    // for(int i = 0; i<4; i++){
    for(int i = 0; i<4; i++){
        // if(i==0){
        //     printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", x[0], x[1], x[2], x[3], x[4], x[5], x[6], x[7], x[8], x[9], x[10], x[11], x[12], x[13], x[14], x[15] );
        // }
        salsa_round(&x[4], &x[8], &x[12], &x[0]);
        salsa_round(&x[9], &x[13], &x[1], &x[5]);
        salsa_round(&x[14], &x[2], &x[6], &x[10]);
        salsa_round(&x[3], &x[7], &x[11], &x[15]);
        salsa_round(&x[1], &x[2], &x[3], &x[0]);
        salsa_round(&x[6], &x[7], &x[4], &x[5]);
        salsa_round(&x[11], &x[8], &x[9], &x[10]);
        salsa_round(&x[12], &x[13], &x[14], &x[15]);
    
        
    }
    for(int i=0; i<16; i++){
        out[i] = x[i];
    }
    return out;
}

__device__ void  blockmix(WORD *block){
    WORD x_arr[16];
    WORD x_arr_cpy[16];
    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", block[0], block[1], block[2], block[3], block[4], block[5], block[6], block[7], block[8], block[9], block[10], block[11], block[12], block[13], block[14], block[15]);
    for (int i = 0; i < 16; i++){
        x_arr[i] = block[i];                                        // 1
 
    }
    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", x_arr[0], x_arr[1], x_arr[2], x_arr[3], x_arr[4], x_arr[5], x_arr[6], x_arr[7], x_arr[8], x_arr[9], x_arr[10], x_arr[11], x_arr[12], x_arr[13], x_arr[14], x_arr[15]);
    for (int i = 0; i<2; i++){
        for (int j = 0; j < 16; j++){
            x_arr_cpy[j] = x_arr[j] ^ block[j+16];                  // 2


            x_arr[j] ^= block[j+16];                                // 3

        }
        // printf("xcp %08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", x_arr_cpy[0], x_arr_cpy[1], x_arr_cpy[2], x_arr_cpy[3], x_arr_cpy[4], x_arr_cpy[5], x_arr_cpy[6], x_arr_cpy[7], x_arr_cpy[8], x_arr_cpy[9], x_arr_cpy[10], x_arr_cpy[11], x_arr_cpy[12], x_arr_cpy[13], x_arr_cpy[14], x_arr_cpy[15] );
        salsa20_8(x_arr_cpy);
  
        add_two_words_array_512_bit(x_arr, x_arr_cpy);   // 4
        // printf("0x%08x + 0x%08x = 0x%08x\n", a[0], x_arr_cpy[0], x_arr[0]);
        for (int j = 0; j < 16; j++){

            block[(16*i)+j] = x_arr[j];                             // 5

        }
    }
}

__device__ void romix(WORD *block, int N, WORD mem[1024][32]){
    // WORD mem[1024][32];
    
    int j;
     for (int i = 0; i<N; i++){
        for (j = 0; j < 32; j++){
            mem[i][j] = block[j];
            //printf("N: %d, j: %d, i: %d, \n",N, j ,i);
        }
        // if(i == 1023){
            // printf("i: %d, \n",N, i);
        // }
        
        blockmix(block);
        
    }
    
    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", block[0], block[1], block[2], block[3], block[4], block[5], block[6], block[7], block[8], block[9], block[10], block[11], block[12], block[13], block[14], block[15], block[16], block[17], block[18], block[19], block[20], block[21], block[22], block[23], block[24], block[25], block[26], block[27], block[28], block[29], block[30], block[31]);
    for (int i = 0; i<N; i++){
        j = (block[16] & 0x000003ff);
 
        for (int k = 0; k<32; k++){
            // int a = block[k] ^ mem[j][k];
            // printf("j: %u, i: %u, k: %u\n",j ,i, k);
            block[k] ^= mem[j][k];
            // if(a != block[k])
            
        }
        blockmix(block);
    }
    

}

__device__ void scrypt( SHA256_CTX_W *ctx,\
                        WORD *block, \
                        unsigned long block_len, \
                        WORD scrypt_out[8], \
                        WORD mem[1024][32], \
                        WORD salt[21], \
                        WORD hmac_out[8], \
                        WORD khash[8], \
                        WORD in_ihash[37], \
                        WORD in_2_ihash[49], \
                        WORD ihash[8], \
                        WORD in_ohash[24], \
                        WORD pbkdf2_rm_out[32]){

    // WORD *pbkdf2_1_out = (WORD*)malloc(pbkdf2_out_len_1*sizeof(WORD));
    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", block[0], block[1], block[2], block[3], block[4], block[5], block[6], block[7], block[8], block[9], block[10], block[11], block[12], block[13], block[14], block[15], block[16], block[17], block[18], block[19]);
    
    // print_words_inline(&block[19], 1);
    // print_words_inline(block, 20); // OK
    pbkdf2_test(ctx, block, block_len, pbkdf2_rm_out, salt, hmac_out, khash, in_ihash, ihash, in_ohash);
    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", pbkdf2_rm_out[0], pbkdf2_rm_out[1], pbkdf2_rm_out[2], pbkdf2_rm_out[3], pbkdf2_rm_out[4], pbkdf2_rm_out[5], pbkdf2_rm_out[6], pbkdf2_rm_out[7], pbkdf2_rm_out[8], pbkdf2_rm_out[9], pbkdf2_rm_out[10], pbkdf2_rm_out[11], pbkdf2_rm_out[12], pbkdf2_rm_out[13], pbkdf2_rm_out[14], pbkdf2_rm_out[15], pbkdf2_rm_out[16], pbkdf2_rm_out[17], pbkdf2_rm_out[18], pbkdf2_rm_out[19], pbkdf2_rm_out[20], pbkdf2_rm_out[21], pbkdf2_rm_out[22], pbkdf2_rm_out[23], pbkdf2_rm_out[24], pbkdf2_rm_out[25], pbkdf2_rm_out[26], pbkdf2_rm_out[27], pbkdf2_rm_out[28], pbkdf2_rm_out[29], pbkdf2_rm_out[30], pbkdf2_rm_out[31]);
    // printf("OK\n");
    // print_words_multiline(pbkdf2_rm_out, 32);
    endian_full(pbkdf2_rm_out, 32);
  
    
    romix(pbkdf2_rm_out, 1024, mem);
    
    
    // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", pbkdf2_rm_out[0], pbkdf2_rm_out[1], pbkdf2_rm_out[2], pbkdf2_rm_out[3], pbkdf2_rm_out[4], pbkdf2_rm_out[5], pbkdf2_rm_out[6], pbkdf2_rm_out[7], pbkdf2_rm_out[8], pbkdf2_rm_out[9], pbkdf2_rm_out[10], pbkdf2_rm_out[11], pbkdf2_rm_out[12], pbkdf2_rm_out[13], pbkdf2_rm_out[14], pbkdf2_rm_out[15], pbkdf2_rm_out[16], pbkdf2_rm_out[17], pbkdf2_rm_out[18], pbkdf2_rm_out[19], pbkdf2_rm_out[20], pbkdf2_rm_out[21], pbkdf2_rm_out[22], pbkdf2_rm_out[23], pbkdf2_rm_out[24], pbkdf2_rm_out[25], pbkdf2_rm_out[26], pbkdf2_rm_out[27], pbkdf2_rm_out[28], pbkdf2_rm_out[29], pbkdf2_rm_out[30], pbkdf2_rm_out[31]);
    
    endian_full(pbkdf2_rm_out, 32);
    // print_words_multiline(pbkdf2_1_out, 32);
    
    pbkdf2_2nd(ctx, pbkdf2_rm_out, 32, block, block_len, scrypt_out, salt, hmac_out, khash, in_2_ihash, ihash, in_ohash);

    // printf("%08x%08x%08x%08x%08x%08x%08x%08x\n", pbkdf2_2_out[0],pbkdf2_2_out[1],pbkdf2_2_out[2],pbkdf2_2_out[3],pbkdf2_2_out[4],pbkdf2_2_out[5],pbkdf2_2_out[6],pbkdf2_2_out[7]);
    // print_words_inline(pbkdf2_2_out, 20);
}






hipError_t scryptWithCuda(SCRYPT_PKG **pkgs, int block_per_grid, int thread_per_block);




__global__ void scryptCuda(SCRYPT_PKG **pkgs)
{   
    int threadId = blockDim.x * blockIdx.x + threadIdx.x;
    // int blockId = blockIdx.y*gridDim.x+blockIdx.x;
    // uint32_t index = blockIdx.x * blockDim.x + threadIdx.x;
    // uint32_t stride = blockDim.x * gridDim.x;
    // char hex_str[65];
    SHA256_CTX *ctx = new SHA256_CTX();
    // int i;
    
    // for (i = 0; i<3000000000; i++){
       
    // }
    //WORD T_Nonce = pkgs[threadId]->input[19];
    
    if(threadId < NUMTHREAD){
        // for (uint32_t threadId = index; threadId < MAXNONCE; threadId += stride){
            WORD T_Nonce = pkgs[threadId]->input[19];
            endian_cvt(&T_Nonce);
            // if(threadId == 1024)
                // printf("Thread id %d: %08x maxnonce: %u\n", threadId, T_Nonce, MAXNONCE/NUMTHREAD);
        for(int i = 0; i<MAXNONCE/NUMTHREAD; i++){
            // if(threadId == NUMTHREAD-1 && i==MAXNONCE/NUMTHREAD-1){
            //     // print_words_inline(&in[20*threadId+19], 1);
            //     // printf("Thread ID (%d) = %08x%08x%08x%08x%08x%08x%08x%08x\n", threadId, out[8*threadId],out[8*threadId+1],out[8*threadId+2],out[8*threadId+3],out[8*threadId+4],out[8*threadId+5],out[8*threadId+6],out[8*threadId+7]);
            // }
            // printf("%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", pkgs[threadId]->input[0],pkgs[threadId]->input[1],pkgs[threadId]->input[2],pkgs[threadId]->input[3],pkgs[threadId]->input[4],pkgs[threadId]->input[5],pkgs[threadId]->input[6],pkgs[threadId]->input[7], pkgs[threadId]->input[8], pkgs[threadId]->input[9], pkgs[threadId]->input[10], pkgs[threadId]->input[11], pkgs[threadId]->input[12], pkgs[threadId]->input[13], pkgs[threadId]->input[14], pkgs[threadId]->input[15], pkgs[threadId]->input[16], pkgs[threadId]->input[17], pkgs[threadId]->input[18], pkgs[threadId]->input[19]);
            //printf("Thread id  %08x \n",pkgs[threadId]->input[19]);
            scrypt(     &(pkgs[threadId]->ctx), \
                        pkgs[threadId]->input, \
                        20, \
                        pkgs[threadId]->output, \
                        pkgs[threadId]->mem, \
                        pkgs[threadId]->salt, \
                        pkgs[threadId]->hmac_out, \
                        pkgs[threadId]->khash, \
                        pkgs[threadId]->in_ihash, \
                        pkgs[threadId]->in_2_ihash, \
                        pkgs[threadId]->ihash, \
                        pkgs[threadId]->in_ohash, \
                        pkgs[threadId]->pbkdf2_rm_out\
                    );
            // printf("!!!!Hello\n");
            // if(threadId == NUMTHREAD-1){
            //     // printf("i: %d\n", i);
            // }
            if(threadId == NUMTHREAD-1 && i==MAXNONCE/NUMTHREAD-1){
                 printf("Thread ID (%d) = %08x%08x%08x%08x%08x%08x%08x%08x\n", threadId, pkgs[threadId]->output[0],pkgs[threadId]->output[1],pkgs[threadId]->output[2],pkgs[threadId]->output[3],pkgs[threadId]->output[4],pkgs[threadId]->output[5],pkgs[threadId]->output[6],pkgs[threadId]->output[7]);
            }

            endian_cvt(&pkgs[threadId]->input[19]);
            pkgs[threadId]->input[19]++;
            // printf("Thread id %d: %u maxnonce: %u\n", threadId, pkgs[threadId]->input[19], MAXNONCE/NUMTHREAD);
            endian_cvt(&pkgs[threadId]->input[19]);
        }
        // printf("[%d]\n",\
        // threadId);
        
        // words_to_hex_string(out[threadId], 8, hex_str, 64);
        // printf("Thread ID: %d, %s", threadId, hex_str);
        // print_words_inline(&out[threadId], 8);
        

    }

}

int main()
{
  
    
    // static char test_scrypt_in[] =     "0000002056efd1943684c1fdc247d4759cc43b29afa1cac7ad14579de5f6abcbc6bdf448ee3de4c7b45e9496ab41ecde73d1a299ddbcc7a81aa52776e6c067e214233af097b6885c97df011aa004090e";
    // static char test_scrypt_in[] =     "0000002056efd1943684c1fdc247d4759cc43b29afa1cac7ad14579de5f6abcbc6bdf448ee3de4c7b45e9496ab41ecde73d1a299ddbcc7a81aa52776e6c067e214233af097b6885c97df011a";

    char ver[]="20000000";
    char prev_block[]="48f4bdc6cbabf6e59d5714adc7caa1af293bc49c75d447c2fdc1843694d1ef56";
    char mrkl_root[]="f03a2314e267c0e67627a51aa8c7bcdd99a2d173deec41ab96945eb4c7e43dee";
    char time[9];
    char bits[9];

    
    little_endian(ver, sizeof(ver) - 1);
    little_endian(prev_block, sizeof(prev_block) - 1);
    little_endian(mrkl_root, sizeof(mrkl_root) - 1);
    


    // Get time

    struct tm t;
    time_t t_of_day;

    t.tm_year = 2019-1900;  // Year - 1900
    t.tm_mon = 3-1;           // Month, where 1 = jan
    t.tm_mday = 13;          // Day of the month
    t.tm_hour = 7+9;
    t.tm_min = 51;
    t.tm_sec = 51;
    t.tm_isdst = -1;        // Is DST on? 1 = yes, 0 = no, -1 = unknown
    t_of_day = mktime(&t);
    
    WORD *wtime = new WORD(t_of_day);
    endian_cvt_host(wtime);
    word_to_hex_eight_host(*wtime, time, 8);

    word_to_hex_eight_host(436330391, bits, 8); // bits -- input
    little_endian(bits, 8);
    char test_scrypt_in[153];
   

  
    int in_index = 0;
    for(int i = 0; i < sizeof(ver)-1; i++){
        test_scrypt_in[i]=ver[i];
    }
    in_index += sizeof(ver)-1;
    for(int i = 0; i < sizeof(prev_block); i++){
        test_scrypt_in[in_index+i] = prev_block[i];
    }
    in_index += sizeof(prev_block)-1;
    for(int i = 0; i < sizeof(mrkl_root); i++){
        test_scrypt_in[in_index+i] = mrkl_root[i];
    }
    in_index += sizeof(mrkl_root)-1;
    for(int i = 0; i < sizeof(time); i++){
        test_scrypt_in[in_index+i] = time[i];
    }
    in_index += sizeof(time)-1;
    for(int i = 0; i < sizeof(bits); i++){
        test_scrypt_in[in_index+i] = bits[i];
    }
    WORD *nonce = (WORD*) malloc(sizeof(WORD));
    // WORD *nonce = new WORD(235472032);
    
    // WORD test_scrypt_out_w[8][NUMTHREAD];
    
    
    SCRYPT_PKG **pkgs = (SCRYPT_PKG**)malloc(NUMTHREAD*sizeof(SCRYPT_PKG*));

    // for(int k = 0; k<NUMTHREAD; k++){
    //     hex_string_to_words_host(test_scrypt_in, sizeof(test_scrypt_in), &test_scrypt_in_w[20*k]);
    //     *nonce = STARTATNONCE + (k * (MAXNONCE/NUMTHREAD));
    //     endian_cvt_host(nonce);
    //     test_scrypt_in_w[20*k+19] = *nonce;
        
    // }
    for(int k = 0; k<NUMTHREAD; k++){
        pkgs[k] = (SCRYPT_PKG*)malloc(sizeof(SCRYPT_PKG));
        hex_string_to_words_host(test_scrypt_in, sizeof(test_scrypt_in), pkgs[k]->input);
        *nonce = STARTATNONCE + (k * (MAXNONCE/NUMTHREAD));
        endian_cvt_host(nonce);
        pkgs[k]->input[19] = *nonce;
        // printf("%d \n", pkgs[k]);
        // printf("%08x", pkgs[k]->input);
        // print_words_inline_host(pkgs[k]->input, 20);
    }
   
    uint32_t threadsPerBlock = 256;
    uint32_t blocksPerGrid =(threadsPerBlock + MAXNONCE - 1) / threadsPerBlock;
    // Add vectors in parallel.
    hipError_t cudaStatus = scryptWithCuda(pkgs, blocksPerGrid, threadsPerBlock);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "scryptWithCuda failed!\n");
        return 1;
    }

    // cudaDeviceReset must be called before exiting in order for profiling and
    // tracing tools such as Nsight and Visual Profiler to show complete traces.
    cudaStatus = hipDeviceReset();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipDeviceReset failed!");
        return 1;
    }

    return 0;
}

SCRYPT_PKG* pkg_init(WORD* indata){
    SCRYPT_PKG* pkg;
    hipMallocManaged(&pkg, sizeof(SCRYPT_PKG));
    for (int j = 0; j < 20; j++){
        pkg->input[j] = indata[j];
        // printf("%08x\n", pkg->input[j]);
    }
    return pkg;
}

// Helper function for using CUDA to add vectors in parallel.
hipError_t scryptWithCuda(SCRYPT_PKG **pkgs, int block_per_grid, int thread_per_block)
{
    SCRYPT_PKG **pkgs_dev;
    hipError_t cudaStatus;
    // SCRYPT_PKG *pkg_pointer;
    // Choose which GPU to run on, change this on a multi-GPU system.
    cudaStatus = hipSetDevice(NO_DEVICE);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipSetDevice failed!  Do you have a CUDA-capable GPU installed?");
        goto Error;
    }

    // Allocate GPU buffers for three vectors (two input, one output)    .
    cudaStatus = hipMallocManaged((void**)&pkgs_dev, NUMTHREAD * sizeof(SCRYPT_PKG*));
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMalloc failed!");
        goto Error;
    }

    for(int i = 0; i<NUMTHREAD; i++){
        
        // Copy input vectors from host memory to GPU buffers.

        pkgs_dev[i] = pkg_init(pkgs[i]->input);
        // print_words_inline_host(pkgs[i]->input, 20);
        // printf("    %08x\n", pkgs_dev[i]);
        // cudaStatus = cudaMemcpy(pkgs_dev[i]->input, pkgs[i]->input, 20*sizeof(WORD), cudaMemcpyHostToDevice);
        // if (cudaStatus != cudaSuccess) {
        //     fprintf(stderr, "cudaMemcpy failed!");
        //     goto Error;
        // }
    }

    // Launch a kernel on the GPU with one thread for each element.

    scryptCuda<<<block_per_grid, thread_per_block>>>(pkgs_dev);

    // Check for any errors launching the kernel
    cudaStatus = hipGetLastError();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "scryptCuda launch failed: %s\n", hipGetErrorString(cudaStatus));
        goto Error;
    }
    
    // cudaDeviceSynchronize waits for the kernel to finish, and returns
    // any errors encountered during the launch.
    cudaStatus = hipDeviceSynchronize();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipDeviceSynchronize returned error code %d after launching scryptCuda!\n", cudaStatus);
        goto Error;
    }

    // // Copy output vector from GPU buffer to host memory.

    // cudaStatus = cudaMemcpy(out, dev_out, NUMTHREAD * 8 * sizeof(WORD), cudaMemcpyDeviceToHost);
    // if (cudaStatus != cudaSuccess) {
    //     fprintf(stderr, "cudaMemcpy launch failed: %s\n", cudaGetErrorString(cudaStatus));
    //     goto Error;
    // }


Error:
    
    hipFree(pkgs_dev);
    
    return cudaStatus;
}


	.text
	.file	"test_gpu_official_2.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21hex_char_to_byte_hostc      # -- Begin function _Z21hex_char_to_byte_hostc
	.type	_Z21hex_char_to_byte_hostc,@function
_Z21hex_char_to_byte_hostc:             # @_Z21hex_char_to_byte_hostc
	.cfi_startproc
# %bb.0:
	movl	%edi, %eax
	leal	-97(%rax), %ecx
	cmpb	$5, %cl
	ja	.LBB0_3
# %bb.1:
	addb	$-87, %al
                                        # kill: def $al killed $al killed $rax
	retq
.LBB0_3:
	leal	-65(%rax), %ecx
	cmpb	$5, %cl
	ja	.LBB0_5
# %bb.4:
	addb	$-55, %al
                                        # kill: def $al killed $al killed $rax
	retq
.LBB0_5:
	addb	$-48, %al
	xorl	%ecx, %ecx
	cmpb	$10, %al
	movzbl	%al, %eax
	cmovael	%ecx, %eax
                                        # kill: def $al killed $al killed $rax
	retq
.Lfunc_end0:
	.size	_Z21hex_char_to_byte_hostc, .Lfunc_end0-_Z21hex_char_to_byte_hostc
	.cfi_endproc
                                        # -- End function
	.globl	_Z24hex_string_to_words_hostPcmPj # -- Begin function _Z24hex_string_to_words_hostPcmPj
	.type	_Z24hex_string_to_words_hostPcmPj,@function
_Z24hex_string_to_words_hostPcmPj:      # @_Z24hex_string_to_words_hostPcmPj
	.cfi_startproc
# %bb.0:
	decq	%rsi
	je	.LBB1_44
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movb	(%rdi,%rcx), %r8b
	leal	-97(%r8), %r9d
	cmpb	$5, %r9b
	ja	.LBB1_4
# %bb.3:                                #   in Loop: Header=BB1_2 Depth=1
	addb	$-87, %r8b
	jmp	.LBB1_7
.LBB1_4:                                #   in Loop: Header=BB1_2 Depth=1
	leal	-65(%r8), %r9d
	cmpb	$5, %r9b
	ja	.LBB1_6
# %bb.5:                                #   in Loop: Header=BB1_2 Depth=1
	addb	$-55, %r8b
	jmp	.LBB1_7
.LBB1_6:                                #   in Loop: Header=BB1_2 Depth=1
	addb	$-48, %r8b
	cmpb	$10, %r8b
	movzbl	%r8b, %r8d
	cmovael	%eax, %r8d
.LBB1_7:                                # %_Z21hex_char_to_byte_hostc.exit
                                        #   in Loop: Header=BB1_2 Depth=1
	movb	1(%rdi,%rcx), %r9b
	leal	-97(%r9), %r10d
	cmpb	$5, %r10b
	ja	.LBB1_9
# %bb.8:                                #   in Loop: Header=BB1_2 Depth=1
	addb	$-87, %r9b
	jmp	.LBB1_12
.LBB1_9:                                #   in Loop: Header=BB1_2 Depth=1
	leal	-65(%r9), %r10d
	cmpb	$5, %r10b
	ja	.LBB1_11
# %bb.10:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-55, %r9b
	jmp	.LBB1_12
.LBB1_11:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-48, %r9b
	cmpb	$10, %r9b
	movzbl	%r9b, %r9d
	cmovael	%eax, %r9d
.LBB1_12:                               # %_Z21hex_char_to_byte_hostc.exit26
                                        #   in Loop: Header=BB1_2 Depth=1
	movb	2(%rdi,%rcx), %r10b
	leal	-97(%r10), %r11d
	cmpb	$5, %r11b
	ja	.LBB1_14
# %bb.13:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-87, %r10b
	jmp	.LBB1_17
.LBB1_14:                               #   in Loop: Header=BB1_2 Depth=1
	leal	-65(%r10), %r11d
	cmpb	$5, %r11b
	ja	.LBB1_16
# %bb.15:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-55, %r10b
	jmp	.LBB1_17
.LBB1_16:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-48, %r10b
	cmpb	$10, %r10b
	movzbl	%r10b, %r10d
	cmovael	%eax, %r10d
.LBB1_17:                               # %_Z21hex_char_to_byte_hostc.exit32
                                        #   in Loop: Header=BB1_2 Depth=1
	movb	3(%rdi,%rcx), %r11b
	leal	-97(%r11), %ebx
	cmpb	$5, %bl
	ja	.LBB1_19
# %bb.18:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-87, %r11b
	jmp	.LBB1_22
.LBB1_19:                               #   in Loop: Header=BB1_2 Depth=1
	leal	-65(%r11), %ebx
	cmpb	$5, %bl
	ja	.LBB1_21
# %bb.20:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-55, %r11b
	jmp	.LBB1_22
.LBB1_21:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-48, %r11b
	cmpb	$10, %r11b
	movzbl	%r11b, %r11d
	cmovael	%eax, %r11d
.LBB1_22:                               # %_Z21hex_char_to_byte_hostc.exit38
                                        #   in Loop: Header=BB1_2 Depth=1
	movb	4(%rdi,%rcx), %bl
	leal	-97(%rbx), %ebp
	cmpb	$5, %bpl
	ja	.LBB1_24
# %bb.23:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-87, %bl
	jmp	.LBB1_27
.LBB1_24:                               #   in Loop: Header=BB1_2 Depth=1
	leal	-65(%rbx), %ebp
	cmpb	$5, %bpl
	ja	.LBB1_26
# %bb.25:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-55, %bl
	jmp	.LBB1_27
.LBB1_26:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-48, %bl
	cmpb	$10, %bl
	movzbl	%bl, %ebx
	cmovael	%eax, %ebx
.LBB1_27:                               # %_Z21hex_char_to_byte_hostc.exit44
                                        #   in Loop: Header=BB1_2 Depth=1
	movb	5(%rdi,%rcx), %r14b
	leal	-97(%r14), %ebp
	cmpb	$5, %bpl
	ja	.LBB1_29
# %bb.28:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-87, %r14b
	jmp	.LBB1_32
.LBB1_29:                               #   in Loop: Header=BB1_2 Depth=1
	leal	-65(%r14), %ebp
	cmpb	$5, %bpl
	ja	.LBB1_31
# %bb.30:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-55, %r14b
	jmp	.LBB1_32
.LBB1_31:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-48, %r14b
	cmpb	$10, %r14b
	movzbl	%r14b, %r14d
	cmovael	%eax, %r14d
.LBB1_32:                               # %_Z21hex_char_to_byte_hostc.exit50
                                        #   in Loop: Header=BB1_2 Depth=1
	movb	6(%rdi,%rcx), %r15b
	leal	-97(%r15), %ebp
	cmpb	$5, %bpl
	ja	.LBB1_34
# %bb.33:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-87, %r15b
	jmp	.LBB1_37
.LBB1_34:                               #   in Loop: Header=BB1_2 Depth=1
	leal	-65(%r15), %ebp
	cmpb	$5, %bpl
	ja	.LBB1_36
# %bb.35:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-55, %r15b
	jmp	.LBB1_37
.LBB1_36:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-48, %r15b
	cmpb	$10, %r15b
	movzbl	%r15b, %r15d
	cmovael	%eax, %r15d
.LBB1_37:                               # %_Z21hex_char_to_byte_hostc.exit56
                                        #   in Loop: Header=BB1_2 Depth=1
	movb	7(%rdi,%rcx), %r12b
	leal	-97(%r12), %ebp
	cmpb	$5, %bpl
	ja	.LBB1_39
# %bb.38:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-87, %r12b
	jmp	.LBB1_42
.LBB1_39:                               #   in Loop: Header=BB1_2 Depth=1
	leal	-65(%r12), %ebp
	cmpb	$5, %bpl
	ja	.LBB1_41
# %bb.40:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-55, %r12b
	jmp	.LBB1_42
.LBB1_41:                               #   in Loop: Header=BB1_2 Depth=1
	addb	$-48, %r12b
	cmpb	$10, %r12b
	movzbl	%r12b, %r12d
	cmovael	%eax, %r12d
.LBB1_42:                               # %_Z21hex_char_to_byte_hostc.exit62
                                        #   in Loop: Header=BB1_2 Depth=1
	movzbl	%r8b, %r8d
	shll	$28, %r8d
	movzbl	%r9b, %r9d
	shll	$24, %r9d
	addl	%r8d, %r9d
	movzbl	%r10b, %r8d
	shll	$20, %r8d
	addl	%r9d, %r8d
	movzbl	%r11b, %r9d
	shll	$16, %r9d
	addl	%r8d, %r9d
	movzbl	%bl, %r8d
	shll	$12, %r8d
	addl	%r9d, %r8d
	movzbl	%r14b, %r9d
	shll	$8, %r9d
	addl	%r8d, %r9d
	shlb	$4, %r15b
	movzbl	%r15b, %r8d
	orl	%r9d, %r8d
	movzbl	%r12b, %r9d
	orl	%r8d, %r9d
	movl	%r9d, (%rdx)
	addq	$8, %rcx
	addq	$4, %rdx
	cmpq	%rcx, %rsi
	ja	.LBB1_2
# %bb.43:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB1_44:                               # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z24hex_string_to_words_hostPcmPj, .Lfunc_end1-_Z24hex_string_to_words_hostPcmPj
	.cfi_endproc
                                        # -- End function
	.globl	_Z21half_byte_to_hex_hosthPc    # -- Begin function _Z21half_byte_to_hex_hosthPc
	.type	_Z21half_byte_to_hex_hosthPc,@function
_Z21half_byte_to_hex_hosthPc:           # @_Z21half_byte_to_hex_hosthPc
	.cfi_startproc
# %bb.0:
                                        # kill: def $edi killed $edi def $rdi
	andb	$15, %dil
	leal	48(%rdi), %eax
	leal	87(%rdi), %ecx
	cmpb	$10, %dil
	movzbl	%cl, %ecx
	movzbl	%al, %eax
	cmovael	%ecx, %eax
	movb	%al, (%rsi)
	retq
.Lfunc_end2:
	.size	_Z21half_byte_to_hex_hosthPc, .Lfunc_end2-_Z21half_byte_to_hex_hosthPc
	.cfi_endproc
                                        # -- End function
	.globl	_Z22word_to_hex_eight_hostjPcm  # -- Begin function _Z22word_to_hex_eight_hostjPcm
	.type	_Z22word_to_hex_eight_hostjPcm,@function
_Z22word_to_hex_eight_hostjPcm:         # @_Z22word_to_hex_eight_hostjPcm
	.cfi_startproc
# %bb.0:
                                        # kill: def $edi killed $edi def $rdi
	cmpq	$8, %rdx
	jne	.LBB3_2
# %bb.1:
	movl	%edi, %eax
	shrl	$28, %eax
	leal	48(%rax), %ecx
	leal	87(%rax), %edx
	cmpb	$10, %al
	movzbl	%dl, %eax
	movzbl	%cl, %ecx
	cmovael	%eax, %ecx
	movb	%cl, (%rsi)
	movl	%edi, %eax
	shrl	$24, %eax
	andb	$15, %al
	leal	48(%rax), %ecx
	leal	87(%rax), %edx
	cmpb	$10, %al
	movzbl	%dl, %eax
	movzbl	%cl, %ecx
	cmovael	%eax, %ecx
	movb	%cl, 1(%rsi)
	movl	%edi, %eax
	shrl	$20, %eax
	andb	$15, %al
	leal	48(%rax), %ecx
	leal	87(%rax), %edx
	cmpb	$10, %al
	movzbl	%dl, %eax
	movzbl	%cl, %ecx
	cmovael	%eax, %ecx
	movb	%cl, 2(%rsi)
	movl	%edi, %eax
	shrl	$16, %eax
	andb	$15, %al
	leal	48(%rax), %ecx
	leal	87(%rax), %edx
	cmpb	$10, %al
	movzbl	%dl, %eax
	movzbl	%cl, %ecx
	cmovael	%eax, %ecx
	movl	%edi, %eax
	shrl	$12, %eax
	andb	$15, %al
	leal	48(%rax), %edx
	cmpb	$10, %al
	leal	87(%rax), %eax
	movzbl	%al, %eax
	movzbl	%dl, %edx
	cmovael	%eax, %edx
	movb	%cl, 3(%rsi)
	movb	%dl, 4(%rsi)
	movl	%edi, %eax
	shrl	$8, %eax
	andb	$15, %al
	leal	48(%rax), %ecx
	leal	87(%rax), %edx
	cmpb	$10, %al
	movzbl	%dl, %eax
	movzbl	%cl, %ecx
	cmovael	%eax, %ecx
	movb	%cl, 5(%rsi)
	movl	%edi, %eax
	shrb	$4, %al
	leal	48(%rax), %ecx
	addb	$87, %al
	cmpb	$-96, %dil
	movzbl	%al, %eax
	movzbl	%cl, %ecx
	cmovael	%eax, %ecx
	movb	%cl, 6(%rsi)
	andb	$15, %dil
	leal	48(%rdi), %eax
	leal	87(%rdi), %ecx
	cmpb	$10, %dil
	movzbl	%cl, %ecx
	movzbl	%al, %eax
	cmovael	%ecx, %eax
	movb	%al, 7(%rsi)
	retq
.LBB3_2:
	movl	$.L.str.1, %edi
	movl	%edx, %esi
	xorl	%eax, %eax
	jmp	printf                          # TAILCALL
.Lfunc_end3:
	.size	_Z22word_to_hex_eight_hostjPcm, .Lfunc_end3-_Z22word_to_hex_eight_hostjPcm
	.cfi_endproc
                                        # -- End function
	.globl	_Z23print_words_inline_hostPjm  # -- Begin function _Z23print_words_inline_hostPjm
	.type	_Z23print_words_inline_hostPjm,@function
_Z23print_words_inline_hostPjm:         # @_Z23print_words_inline_hostPjm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movl	$10, %edi
	callq	putchar@PLT
	testq	%rbx, %rbx
	je	.LBB4_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%r15d, %r15d
.LBB4_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r14,%r15,4), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %rbx
	jne	.LBB4_2
.LBB4_3:                                # %._crit_edge
	movl	$10, %edi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end4:
	.size	_Z23print_words_inline_hostPjm, .Lfunc_end4-_Z23print_words_inline_hostPjm
	.cfi_endproc
                                        # -- End function
	.globl	_Z26print_words_multiline_hostPjm # -- Begin function _Z26print_words_multiline_hostPjm
	.type	_Z26print_words_multiline_hostPjm,@function
_Z26print_words_multiline_hostPjm:      # @_Z26print_words_multiline_hostPjm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movl	$10, %edi
	callq	putchar@PLT
	testq	%rbx, %rbx
	je	.LBB5_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%r15d, %r15d
.LBB5_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r14,%r15,4), %esi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %rbx
	jne	.LBB5_2
.LBB5_3:                                # %._crit_edge
	movl	$10, %edi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end5:
	.size	_Z26print_words_multiline_hostPjm, .Lfunc_end5-_Z26print_words_multiline_hostPjm
	.cfi_endproc
                                        # -- End function
	.globl	_Z13little_endianPcm            # -- Begin function _Z13little_endianPcm
	.type	_Z13little_endianPcm,@function
_Z13little_endianPcm:                   # @_Z13little_endianPcm
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	%rsi, %rdi
	callq	malloc
	testq	%rbx, %rbx
	je	.LBB6_4
# %bb.1:                                # %.lr.ph
	leaq	(%rbx,%rax), %rcx
	decq	%rcx
	xorl	%edx, %edx
.LBB6_2:                                # =>This Inner Loop Header: Depth=1
	movb	(%r14,%rdx), %sil
	movb	%sil, -1(%rcx)
	movb	1(%r14,%rdx), %sil
	movb	%sil, (%rcx)
	addq	$2, %rdx
	addq	$-2, %rcx
	cmpq	%rbx, %rdx
	jb	.LBB6_2
# %bb.3:                                # %.lr.ph28.preheader
	movq	%r14, %rdi
	movq	%rax, %rsi
	movq	%rbx, %rdx
	callq	memcpy@PLT
.LBB6_4:                                # %._crit_edge
	movb	$0, (%r14,%rbx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z13little_endianPcm, .Lfunc_end6-_Z13little_endianPcm
	.cfi_endproc
                                        # -- End function
	.globl	_Z15endian_cvt_hostPj           # -- Begin function _Z15endian_cvt_hostPj
	.type	_Z15endian_cvt_hostPj,@function
_Z15endian_cvt_hostPj:                  # @_Z15endian_cvt_hostPj
	.cfi_startproc
# %bb.0:
	movl	(%rdi), %eax
	bswapl	%eax
	movl	%eax, (%rdi)
	retq
.Lfunc_end7:
	.size	_Z15endian_cvt_hostPj, .Lfunc_end7-_Z15endian_cvt_hostPj
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__scryptCudaPP10SCRYPT_PKG # -- Begin function _Z25__device_stub__scryptCudaPP10SCRYPT_PKG
	.type	_Z25__device_stub__scryptCudaPP10SCRYPT_PKG,@function
_Z25__device_stub__scryptCudaPP10SCRYPT_PKG: # @_Z25__device_stub__scryptCudaPP10SCRYPT_PKG
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10scryptCudaPP10SCRYPT_PKG, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z25__device_stub__scryptCudaPP10SCRYPT_PKG, .Lfunc_end8-_Z25__device_stub__scryptCudaPP10SCRYPT_PKG
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:                                # %.preheader64.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$424, %rsp                      # imm = 0x1A8
	.cfi_def_cfa_offset 480
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	16(%rsp), %rbx
	movb	$50, (%rbx)
	movl	$808464432, %eax                # imm = 0x30303030
	movl	%eax, 1(%rbx)
	movl	%eax, 4(%rbx)
	xorl	%ebp, %ebp
	movb	%bpl, 8(%rbx)
	leaq	176(%rsp), %r14
	movl	$8, %ecx
	movl	$.L__const.main.prev_block, %esi
	movq	%r14, %rdi
	rep;movsq (%rsi), %es:(%rdi)
	movb	%bpl, 64(%r14)
	leaq	96(%rsp), %r15
	movl	$8, %ecx
	movl	$.L__const.main.mrkl_root, %esi
	movq	%r15, %rdi
	rep;movsq (%rsi), %es:(%rdi)
	movb	%bpl, 64(%r15)
	movl	$8, %esi
	movq	%rbx, %rdi
	callq	_Z13little_endianPcm
	movl	$64, %esi
	movq	%r14, %rdi
	callq	_Z13little_endianPcm
	movl	$64, %esi
	movq	%r15, %rdi
	callq	_Z13little_endianPcm
	movabsq	$511101108226, %rax             # imm = 0x7700000002
	leaq	40(%rsp), %rdi
	movq	%rax, 16(%rdi)
	movabsq	$55834574864, %rax              # imm = 0xD00000010
	movq	%rax, 8(%rdi)
	movabsq	$219043332147, %rax             # imm = 0x3300000033
	movq	%rax, (%rdi)
	movl	$-1, 32(%rdi)
	callq	mktime
	bswapl	%eax
	movq	%rsp, %r12
	movl	$8, %edx
	movl	%eax, %edi
	movq	%r12, %rsi
	callq	_Z22word_to_hex_eight_hostjPcm
	movabsq	$3979324326266560817, %rax      # imm = 0x3739666431306131
	leaq	31(%rsp), %r13
	movq	%rax, (%r13)
	movl	$8, %esi
	movq	%r13, %rdi
	callq	_Z13little_endianPcm
	movq	(%rbx), %rax
	leaq	256(%rsp), %rbx
	movq	%rax, (%rbx)
	movaps	(%r14), %xmm0
	movaps	16(%r14), %xmm1
	movaps	32(%r14), %xmm2
	movaps	48(%r14), %xmm3
	movups	%xmm0, 8(%rbx)
	movups	%xmm1, 24(%rbx)
	movups	%xmm2, 40(%rbx)
	movups	%xmm3, 56(%rbx)
	movaps	(%r15), %xmm0
	movaps	16(%r15), %xmm1
	movaps	32(%r15), %xmm2
	movaps	48(%r15), %xmm3
	movups	%xmm0, 72(%rbx)
	movups	%xmm1, 88(%rbx)
	movups	%xmm2, 104(%rbx)
	movups	%xmm3, 120(%rbx)
	movq	(%r12), %rax
	movq	%rax, 136(%rbx)
	movb	8(%r13), %al
	movb	%al, 152(%rbx)
	movq	(%r13), %rax
	movq	%rax, 144(%rbx)
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	movq	%rax, %r14
	movl	$225472033, %r12d               # imm = 0xD706E21
.LBB9_1:                                # =>This Inner Loop Header: Depth=1
	movl	$132048, %edi                   # imm = 0x203D0
	callq	malloc
	movq	%rax, %r15
	movq	%rax, (%r14,%rbp,8)
	leaq	112(%rax), %rdx
	movl	$153, %esi
	movq	%rbx, %rdi
	callq	_Z24hex_string_to_words_hostPcmPj
	movl	%r12d, %eax
	bswapl	%eax
	movl	%eax, 188(%r15)
	incq	%rbp
	addl	$76, %r12d
	cmpq	$131072, %rbp                   # imm = 0x20000
	jne	.LBB9_1
# %bb.2:
	movq	%r14, %rdi
	movl	$39063, %esi                    # imm = 0x9897
	movl	$256, %edx                      # imm = 0x100
	callq	_Z14scryptWithCudaPP10SCRYPT_PKGii
	testl	%eax, %eax
	jne	.LBB9_3
# %bb.4:
	callq	hipDeviceReset
	movl	%eax, %ecx
	xorl	%eax, %eax
	testl	%ecx, %ecx
	jne	.LBB9_5
.LBB9_7:
	addq	$424, %rsp                      # imm = 0x1A8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB9_3:
	.cfi_def_cfa_offset 480
	movq	stderr(%rip), %rcx
	movl	$.L.str.5, %edi
	movl	$23, %esi
	jmp	.LBB9_6
.LBB9_5:
	movq	stderr(%rip), %rcx
	movl	$.L.str.6, %edi
	movl	$22, %esi
.LBB9_6:
	movl	$1, %edx
	callq	fwrite@PLT
	movl	$1, %eax
	jmp	.LBB9_7
.Lfunc_end9:
	.size	main, .Lfunc_end9-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z14scryptWithCudaPP10SCRYPT_PKGii # -- Begin function _Z14scryptWithCudaPP10SCRYPT_PKGii
	.type	_Z14scryptWithCudaPP10SCRYPT_PKGii,@function
_Z14scryptWithCudaPP10SCRYPT_PKGii:     # @_Z14scryptWithCudaPP10SCRYPT_PKGii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movl	%esi, %r14d
	movq	%rdi, %r15
	movl	$1, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB10_1
# %bb.3:
	leaq	8(%rsp), %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB10_15
# %bb.4:                                # %.preheader.preheader
	xorl	%r12d, %r12d
	leaq	16(%rsp), %rbx
.LBB10_5:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB10_6 Depth 2
	movq	(%r15,%r12,8), %r13
	movl	$132048, %esi                   # imm = 0x203D0
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	$28, %ecx
	movq	16(%rsp), %rax
.LBB10_6:                               #   Parent Loop BB10_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r13,%rcx,4), %edx
	movl	%edx, (%rax,%rcx,4)
	incq	%rcx
	cmpq	$48, %rcx
	jne	.LBB10_6
# %bb.7:                                # %_Z8pkg_initPj.exit
                                        #   in Loop: Header=BB10_5 Depth=1
	movq	8(%rsp), %rcx
	movq	%rax, (%rcx,%r12,8)
	incq	%r12
	cmpq	$131072, %r12                   # imm = 0x20000
	jne	.LBB10_5
# %bb.8:
	movl	%r14d, %edi
	btsq	$32, %rdi
	movl	%ebp, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_10
# %bb.9:
	movq	8(%rsp), %rdi
	callq	_Z25__device_stub__scryptCudaPP10SCRYPT_PKG
.LBB10_10:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB10_11
# %bb.12:
	callq	hipDeviceSynchronize
	xorl	%ebx, %ebx
	testl	%eax, %eax
	jne	.LBB10_13
.LBB10_14:
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	%ebx, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB10_1:
	.cfi_def_cfa_offset 80
	movl	%eax, %ebx
	movq	stderr(%rip), %rcx
	movl	$.L.str.7, %edi
	movl	$63, %esi
	jmp	.LBB10_2
.LBB10_15:
	movl	%eax, %ebx
	movq	stderr(%rip), %rcx
	movl	$.L.str.8, %edi
	movl	$17, %esi
.LBB10_2:
	movl	$1, %edx
	callq	fwrite@PLT
	jmp	.LBB10_14
.LBB10_11:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %esi
	movq	%r14, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB10_14
.LBB10_13:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.10, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %ebx
	jmp	.LBB10_14
.Lfunc_end10:
	.size	_Z14scryptWithCudaPP10SCRYPT_PKGii, .Lfunc_end10-_Z14scryptWithCudaPP10SCRYPT_PKGii
	.cfi_endproc
                                        # -- End function
	.globl	_Z8pkg_initPj                   # -- Begin function _Z8pkg_initPj
	.type	_Z8pkg_initPj,@function
_Z8pkg_initPj:                          # @_Z8pkg_initPj
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	movq	%rsp, %r14
	movl	$132048, %esi                   # imm = 0x203D0
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	xorl	%ecx, %ecx
	movq	(%r14), %rax
.LBB11_1:                               # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%rcx,4), %edx
	movl	%edx, 112(%rax,%rcx,4)
	incq	%rcx
	cmpq	$20, %rcx
	jne	.LBB11_1
# %bb.2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z8pkg_initPj, .Lfunc_end11-_Z8pkg_initPj
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB12_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB12_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10scryptCudaPP10SCRYPT_PKG, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end12:
	.size	__hip_module_ctor, .Lfunc_end12-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB13_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB13_2:
	retq
.Lfunc_end13:
	.size	__hip_module_dtor, .Lfunc_end13-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"The hex_pair must have the length of two characters: %d\n"
	.size	.L.str.1, 57

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%08x"
	.size	.L.str.3, 5

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%08x\n"
	.size	.L.str.4, 6

	.type	_Z10scryptCudaPP10SCRYPT_PKG,@object # @_Z10scryptCudaPP10SCRYPT_PKG
	.section	.rodata,"a",@progbits
	.globl	_Z10scryptCudaPP10SCRYPT_PKG
	.p2align	3, 0x0
_Z10scryptCudaPP10SCRYPT_PKG:
	.quad	_Z25__device_stub__scryptCudaPP10SCRYPT_PKG
	.size	_Z10scryptCudaPP10SCRYPT_PKG, 8

	.type	.L__const.main.prev_block,@object # @__const.main.prev_block
	.section	.rodata.str1.16,"aMS",@progbits,1
	.p2align	4, 0x0
.L__const.main.prev_block:
	.asciz	"48f4bdc6cbabf6e59d5714adc7caa1af293bc49c75d447c2fdc1843694d1ef56"
	.size	.L__const.main.prev_block, 65

	.type	.L__const.main.mrkl_root,@object # @__const.main.mrkl_root
	.p2align	4, 0x0
.L__const.main.mrkl_root:
	.asciz	"f03a2314e267c0e67627a51aa8c7bcdd99a2d173deec41ab96945eb4c7e43dee"
	.size	.L__const.main.mrkl_root, 65

	.type	.L.str.5,@object                # @.str.5
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.5:
	.asciz	"scryptWithCuda failed!\n"
	.size	.L.str.5, 24

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"hipDeviceReset failed!"
	.size	.L.str.6, 23

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"hipSetDevice failed!  Do you have a CUDA-capable GPU installed?"
	.size	.L.str.7, 64

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"hipMalloc failed!"
	.size	.L.str.8, 18

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"scryptCuda launch failed: %s\n"
	.size	.L.str.9, 30

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"hipDeviceSynchronize returned error code %d after launching scryptCuda!\n"
	.size	.L.str.10, 73

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10scryptCudaPP10SCRYPT_PKG"
	.size	.L__unnamed_1, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__scryptCudaPP10SCRYPT_PKG
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10scryptCudaPP10SCRYPT_PKG
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text.unlikely.,"ax",@progbits
	.p2align	2                               ; -- Begin function __ockl_dm_alloc
	.type	__ockl_dm_alloc,@function
__ockl_dm_alloc:                        ; @__ockl_dm_alloc
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_or_saveexec_b32 s0, -1
	scratch_store_b32 off, v40, s32         ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s0
	v_writelane_b32 v40, s34, 0
	v_writelane_b32 v40, s35, 1
	v_writelane_b32 v40, s36, 2
	v_writelane_b32 v40, s37, 3
	v_writelane_b32 v40, s38, 4
	v_writelane_b32 v40, s39, 5
	v_writelane_b32 v40, s40, 6
	v_writelane_b32 v40, s41, 7
	v_writelane_b32 v40, s42, 8
	v_writelane_b32 v40, s43, 9
	v_writelane_b32 v40, s44, 10
	v_writelane_b32 v40, s30, 11
	v_writelane_b32 v40, s31, 12
	v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_ne_u64_e32 0, v[4:5]
	s_cbranch_execz .LBB0_702
; %bb.1:
	v_mbcnt_lo_u32_b32 v2, -1, 0
                                        ; implicit-def: $vgpr0_vgpr1
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u64_e32 0xc01, v[4:5]
	s_xor_b32 s23, exec_lo, s0
	s_cbranch_execz .LBB0_668
; %bb.2:
	v_max_u32_e32 v0, 16, v4
	v_mov_b32_e32 v5, 0
	s_load_b64 s[10:11], s[8:9], 0x60
	v_dual_mov_b32 v118, 1 :: v_dual_mov_b32 v17, 0x1800
	s_delay_alu instid0(VALU_DEP_3)
	v_clz_i32_u32_e32 v1, v0
	v_mov_b32_e32 v20, 0x200000
	v_mov_b32_e32 v8, v5
	v_mov_b32_e32 v14, 1
	v_mov_b32_e32 v68, 0x100
	v_not_b32_e32 v3, v1
	v_lshlrev_b32_e32 v1, 1, v1
	v_mov_b32_e32 v13, 3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, 15, v3
	v_lshlrev_b32_e64 v3, v3, 1
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s10, 0x1a800
	s_addc_u32 s13, s11, 0
	s_add_u32 s14, s10, 0x1a808
	v_lshrrev_b32_e32 v4, 1, v3
	v_cmp_gt_u32_e32 vcc_lo, v0, v3
	s_addc_u32 s15, s11, 0
	s_add_u32 s4, s10, 0x800
	s_addc_u32 s5, s11, 0
	v_or_b32_e32 v3, v4, v3
	v_cndmask_b32_e64 v6, 0, 1, vcc_lo
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __unnamed_1@rel32@lo+12
	s_addc_u32 s1, s1, __unnamed_1@rel32@hi+20
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+4
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+12
	s_add_u32 s6, s10, 0x1000
	v_cmp_gt_u32_e32 vcc_lo, v0, v3
	v_sub_nc_u32_e32 v1, v6, v1
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, 54, v1, vcc_lo
	v_lshlrev_b64 v[0:1], 7, v[7:8]
	v_lshlrev_b64 v[3:4], 5, v[7:8]
	v_lshrrev_b64 v[8:9], v7, 0xbf
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v32, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v33, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v34, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v35, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v36, vcc_lo, v3, s0
	v_add_co_ci_u32_e32 v37, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v38, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v39, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v48, vcc_lo, s6, v0
	s_add_u32 s0, s10, 0x2000
	v_add_co_ci_u32_e32 v49, vcc_lo, s7, v1, vcc_lo
	s_addc_u32 s1, s11, 0
	v_add_co_u32 v50, vcc_lo, s0, v0
	s_add_u32 s2, s10, 0x1800
	v_add_co_ci_u32_e32 v51, vcc_lo, s1, v1, vcc_lo
	s_addc_u32 s3, s11, 0
	v_add_co_u32 v52, vcc_lo, s2, v0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __unnamed_1@rel32@lo+24
	s_addc_u32 s1, s1, __unnamed_1@rel32@hi+32
	v_add_co_ci_u32_e32 v53, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v54, vcc_lo, v3, s0
	v_and_b32_e32 v0, 1, v8
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+20
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+28
	v_add_co_ci_u32_e32 v55, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v64, vcc_lo, v3, s2
	v_mov_b32_e32 v9, v5
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, __unnamed_1@rel32@lo+28
	s_addc_u32 s5, s5, __unnamed_1@rel32@hi+36
	v_add_co_ci_u32_e32 v65, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v66, vcc_lo, v3, s4
	v_cmp_eq_u32_e64 s0, 1, v0
	v_mov_b32_e32 v0, 0
	v_add_co_ci_u32_e32 v67, vcc_lo, s5, v4, vcc_lo
	v_mov_b32_e32 v8, v5
	v_dual_mov_b32 v10, v5 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v3, v14
	s_add_u32 s24, s10, 0x100
	s_mov_b32 s4, 0
	s_addc_u32 s25, s11, 0
.LBB0_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
                                        ;       Child Loop BB0_11 Depth 3
                                        ;         Child Loop BB0_14 Depth 4
                                        ;         Child Loop BB0_43 Depth 4
                                        ;           Child Loop BB0_47 Depth 5
                                        ;           Child Loop BB0_75 Depth 5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
                                        ;           Child Loop BB0_320 Depth 5
                                        ;           Child Loop BB0_323 Depth 5
                                        ;           Child Loop BB0_325 Depth 5
                                        ;           Child Loop BB0_327 Depth 5
                                        ;           Child Loop BB0_329 Depth 5
                                        ;           Child Loop BB0_331 Depth 5
                                        ;           Child Loop BB0_333 Depth 5
                                        ;       Child Loop BB0_347 Depth 3
                                        ;         Child Loop BB0_351 Depth 4
                                        ;         Child Loop BB0_378 Depth 4
                                        ;           Child Loop BB0_396 Depth 5
                                        ;           Child Loop BB0_404 Depth 5
                                        ;           Child Loop BB0_410 Depth 5
                                        ;           Child Loop BB0_419 Depth 5
                                        ;           Child Loop BB0_424 Depth 5
                                        ;           Child Loop BB0_426 Depth 5
                                        ;           Child Loop BB0_447 Depth 5
                                        ;           Child Loop BB0_455 Depth 5
                                        ;           Child Loop BB0_461 Depth 5
                                        ;           Child Loop BB0_470 Depth 5
                                        ;           Child Loop BB0_478 Depth 5
                                        ;           Child Loop BB0_481 Depth 5
                                        ;           Child Loop BB0_483 Depth 5
                                        ;           Child Loop BB0_485 Depth 5
                                        ;           Child Loop BB0_487 Depth 5
                                        ;           Child Loop BB0_489 Depth 5
                                        ;           Child Loop BB0_491 Depth 5
                                        ;           Child Loop BB0_513 Depth 5
                                        ;           Child Loop BB0_521 Depth 5
                                        ;           Child Loop BB0_527 Depth 5
                                        ;           Child Loop BB0_536 Depth 5
                                        ;           Child Loop BB0_543 Depth 5
                                        ;           Child Loop BB0_546 Depth 5
                                        ;           Child Loop BB0_551 Depth 5
                                        ;           Child Loop BB0_558 Depth 5
                                        ;           Child Loop BB0_591 Depth 5
                                        ;           Child Loop BB0_599 Depth 5
                                        ;           Child Loop BB0_605 Depth 5
                                        ;           Child Loop BB0_614 Depth 5
                                        ;         Child Loop BB0_623 Depth 4
                                        ;         Child Loop BB0_626 Depth 4
                                        ;         Child Loop BB0_628 Depth 4
                                        ;         Child Loop BB0_630 Depth 4
                                        ;         Child Loop BB0_632 Depth 4
                                        ;         Child Loop BB0_634 Depth 4
                                        ;         Child Loop BB0_636 Depth 4
                                        ;       Child Loop BB0_649 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v119, v3
	v_mov_b32_e32 v3, v5
	s_mov_b32 s26, exec_lo
	;;#ASMSTART
	;;#ASMEND
	v_cmpx_ne_u32_e32 0, v119
	s_cbranch_execz .LBB0_666
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_readfirstlane_b32 s1, v7
	s_mov_b32 s27, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e64 s1, v7
	s_cbranch_execz .LBB0_665
; %bb.5:                                ; %.preheader196.preheader
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_mov_b32_e32 v3, 1
.LBB0_6:                                ; %.preheader196
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_11 Depth 3
                                        ;         Child Loop BB0_14 Depth 4
                                        ;         Child Loop BB0_43 Depth 4
                                        ;           Child Loop BB0_47 Depth 5
                                        ;           Child Loop BB0_75 Depth 5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
                                        ;           Child Loop BB0_320 Depth 5
                                        ;           Child Loop BB0_323 Depth 5
                                        ;           Child Loop BB0_325 Depth 5
                                        ;           Child Loop BB0_327 Depth 5
                                        ;           Child Loop BB0_329 Depth 5
                                        ;           Child Loop BB0_331 Depth 5
                                        ;           Child Loop BB0_333 Depth 5
                                        ;       Child Loop BB0_347 Depth 3
                                        ;         Child Loop BB0_351 Depth 4
                                        ;         Child Loop BB0_378 Depth 4
                                        ;           Child Loop BB0_396 Depth 5
                                        ;           Child Loop BB0_404 Depth 5
                                        ;           Child Loop BB0_410 Depth 5
                                        ;           Child Loop BB0_419 Depth 5
                                        ;           Child Loop BB0_424 Depth 5
                                        ;           Child Loop BB0_426 Depth 5
                                        ;           Child Loop BB0_447 Depth 5
                                        ;           Child Loop BB0_455 Depth 5
                                        ;           Child Loop BB0_461 Depth 5
                                        ;           Child Loop BB0_470 Depth 5
                                        ;           Child Loop BB0_478 Depth 5
                                        ;           Child Loop BB0_481 Depth 5
                                        ;           Child Loop BB0_483 Depth 5
                                        ;           Child Loop BB0_485 Depth 5
                                        ;           Child Loop BB0_487 Depth 5
                                        ;           Child Loop BB0_489 Depth 5
                                        ;           Child Loop BB0_491 Depth 5
                                        ;           Child Loop BB0_513 Depth 5
                                        ;           Child Loop BB0_521 Depth 5
                                        ;           Child Loop BB0_527 Depth 5
                                        ;           Child Loop BB0_536 Depth 5
                                        ;           Child Loop BB0_543 Depth 5
                                        ;           Child Loop BB0_546 Depth 5
                                        ;           Child Loop BB0_551 Depth 5
                                        ;           Child Loop BB0_558 Depth 5
                                        ;           Child Loop BB0_591 Depth 5
                                        ;           Child Loop BB0_599 Depth 5
                                        ;           Child Loop BB0_605 Depth 5
                                        ;           Child Loop BB0_614 Depth 5
                                        ;         Child Loop BB0_623 Depth 4
                                        ;         Child Loop BB0_626 Depth 4
                                        ;         Child Loop BB0_628 Depth 4
                                        ;         Child Loop BB0_630 Depth 4
                                        ;         Child Loop BB0_632 Depth 4
                                        ;         Child Loop BB0_634 Depth 4
                                        ;         Child Loop BB0_636 Depth 4
                                        ;       Child Loop BB0_649 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v128, v3 :: v_dual_mov_b32 v3, 0
	s_mov_b32 s28, exec_lo
	;;#ASMSTART
	;;#ASMEND
	v_cmpx_ne_u32_e32 0, v128
	s_cbranch_execz .LBB0_664
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=2
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_6 Depth=2
	global_load_b32 v3, v[32:33], off glc
.LBB0_9:                                ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s29, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_gt_u32 s29, 0x100ff
	s_cbranch_scc0 .LBB0_344
; %bb.10:                               ;   in Loop: Header=BB0_6 Depth=2
	v_mbcnt_lo_u32_b32 v129, exec_lo, 0
	v_mov_b32_e32 v4, v7
	s_mov_b32 s30, 0
	s_bcnt1_i32_b32 s31, exec_lo
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_11:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_14 Depth 4
                                        ;         Child Loop BB0_43 Depth 4
                                        ;           Child Loop BB0_47 Depth 5
                                        ;           Child Loop BB0_75 Depth 5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
                                        ;           Child Loop BB0_320 Depth 5
                                        ;           Child Loop BB0_323 Depth 5
                                        ;           Child Loop BB0_325 Depth 5
                                        ;           Child Loop BB0_327 Depth 5
                                        ;           Child Loop BB0_329 Depth 5
                                        ;           Child Loop BB0_331 Depth 5
                                        ;           Child Loop BB0_333 Depth 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[15:16], 7, v[4:5]
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s1, 0, v129
	v_mov_b32_e32 v6, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=3
	v_add_co_u32 v18, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v16, vcc_lo
	global_load_b32 v6, v[18:19], off glc
.LBB0_13:                               ;   in Loop: Header=BB0_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b64 v[18:19], 5, v[4:5]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+8
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v18, s2
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v19, vcc_lo
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v6
	global_load_b32 v3, v[18:19], off
	v_add_nc_u32_e32 v6, s2, v129
	s_mov_b32 s2, 0x10100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v18, 0xff00ff01, v6
	v_lshrrev_b32_e32 v18, 16, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v18, 0x10100, v18
	v_sub_nc_u32_e32 v6, v6, v18
	v_add_co_u32 v18, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v16, vcc_lo
.LBB0_14:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr15_vgpr16
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_gt_u32_e32 0x100, v6
	s_xor_b32 s3, exec_lo, s3
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, 0x1800, v4, s[6:7]
	v_mad_u64_u32 v[15:16], null, v6, 24, v[21:22]
; %bb.16:                               ; %Flow1135
                                        ;   in Loop: Header=BB0_14 Depth=4
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	v_add_nc_u32_e32 v21, 0xffffff00, v6
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[15:16], null, 0x1800, v4, s[6:7]
	v_lshrrev_b32_e32 v23, 8, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, v23, 24, v[15:16]
	v_and_b32_e32 v23, 0xff, v6
	global_load_b64 v[21:22], v[21:22], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, v23, 24, v[21:22]
.LBB0_18:                               ;   in Loop: Header=BB0_14 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v15, v[15:16], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v15, v3
	s_cbranch_vccz .LBB0_20
; %bb.19:                               ;   in Loop: Header=BB0_14 Depth=4
	s_ctz_i32_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s3, s3, 2
	v_mov_b32_e32 v15, s3
	ds_bpermute_b32 v15, v15, v6
	s_branch .LBB0_21
.LBB0_20:                               ;   in Loop: Header=BB0_14 Depth=4
	v_mov_b32_e32 v15, -1
.LBB0_21:                               ;   in Loop: Header=BB0_14 Depth=4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v15
	s_cmp_eq_u32 s5, -1
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_24
; %bb.22:                               ;   in Loop: Header=BB0_14 Depth=4
	s_cmpk_lt_u32 s5, 0x100
	s_cbranch_scc0 .LBB0_25
; %bb.23:                               ;   in Loop: Header=BB0_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, 0x1800, v4, s[6:7]
	s_mov_b32 s6, 0
	v_mad_u64_u32 v[15:16], null, s5, 24, v[21:22]
	s_branch .LBB0_26
.LBB0_24:                               ;   in Loop: Header=BB0_14 Depth=4
	s_mov_b32 s5, -1
                                        ; implicit-def: $vgpr15_vgpr16
	s_branch .LBB0_29
.LBB0_25:                               ;   in Loop: Header=BB0_14 Depth=4
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr15_vgpr16
.LBB0_26:                               ; %Flow1128
                                        ;   in Loop: Header=BB0_14 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_28
; %bb.27:                               ;   in Loop: Header=BB0_14 Depth=4
	s_add_i32 s6, s5, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s16, s6, 8
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_and_b32 s5, s5, 0xff
	v_mad_u64_u32 v[15:16], null, 0x1800, v4, s[6:7]
	v_mad_u64_u32 v[21:22], null, s16, 24, v[15:16]
	global_load_b64 v[21:22], v[21:22], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, s5, 24, v[21:22]
.LBB0_28:                               ; %Flow1129
                                        ;   in Loop: Header=BB0_14 Depth=4
	s_mov_b32 s5, 0
.LBB0_29:                               ; %Flow1131
                                        ;   in Loop: Header=BB0_14 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_33
; %bb.30:                               ;   in Loop: Header=BB0_14 Depth=4
	v_add_nc_u32_e32 v6, s31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v15, 0xff00ff01, v6
	v_lshrrev_b32_e32 v15, 16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v15, 0x10100, v15
	v_sub_nc_u32_e32 v6, v6, v15
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_32
; %bb.31:                               ;   in Loop: Header=BB0_14 Depth=4
	global_store_b32 v[18:19], v6, off
.LBB0_32:                               ;   in Loop: Header=BB0_14 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	v_dual_mov_b32 v16, v12 :: v_dual_mov_b32 v15, v11
	s_sub_i32 s2, s2, s31
.LBB0_33:                               ;   in Loop: Header=BB0_14 Depth=4
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB0_35
; %bb.34:                               ;   in Loop: Header=BB0_14 Depth=4
	s_mov_b32 s3, 0
	s_mov_b32 s5, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $vgpr6
	s_branch .LBB0_36
.LBB0_35:                               ;   in Loop: Header=BB0_14 Depth=4
	s_cmp_lt_i32 s2, 1
	s_mov_b32 s5, 0
	s_cselect_b32 s6, -1, 0
                                        ; implicit-def: $sgpr3
.LBB0_36:                               ; %Flow1137
                                        ;   in Loop: Header=BB0_14 Depth=4
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_14
; %bb.37:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB0_11 Depth=3
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_342
; %bb.38:                               ;   in Loop: Header=BB0_11 Depth=3
	v_and_b32_e32 v3, -2, v4
	v_mov_b32_e32 v11, 0
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e32 vcc_lo, v4, v7
	s_mov_b32 s3, 0
	v_cmp_gt_u32_e64 s2, 14, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s34, s2
	s_cbranch_execz .LBB0_341
; %bb.39:                               ;   in Loop: Header=BB0_11 Depth=3
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_41
; %bb.40:                               ;   in Loop: Header=BB0_11 Depth=3
	v_mov_b32_e32 v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 7, v[3:4]
	v_add_co_u32 v11, vcc_lo, s24, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s25, v12, vcc_lo
	global_load_b32 v4, v[11:12], off offset:2048 glc
.LBB0_41:                               ;   in Loop: Header=BB0_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s36, v4
	v_add_nc_u32_e32 v22, 2, v3
	s_mov_b32 s6, -1
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_gt_u32 s36, 0x100ff
	s_cbranch_scc1 .LBB0_340
; %bb.42:                               ;   in Loop: Header=BB0_11 Depth=3
	v_mov_b32_e32 v4, v5
	s_bcnt1_i32_b32 s35, exec_lo
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+76
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+84
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, __unnamed_1@rel32@lo+68
	s_addc_u32 s7, s7, __unnamed_1@rel32@hi+76
	s_add_u32 s1, s24, 0x800
	v_lshlrev_b64 v[11:12], 7, v[3:4]
	v_lshlrev_b64 v[3:4], 5, v[3:4]
	v_lshrrev_b64 v[15:16], v22, 0xbf
	v_mbcnt_lo_u32_b32 v130, exec_lo, 0
	v_mov_b32_e32 v23, v5
	v_mov_b32_e32 v24, v5
	v_add_co_u32 v70, vcc_lo, s24, v11
	v_add_co_ci_u32_e32 v71, vcc_lo, s25, v12, vcc_lo
	v_add_co_u32 v80, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v81, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v82, vcc_lo, v3, s6
	v_add_co_ci_u32_e32 v83, vcc_lo, s7, v4, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v84, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x1000
	v_add_co_ci_u32_e32 v85, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v86, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x2000
	v_add_co_ci_u32_e32 v87, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v96, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x1800
	v_add_co_ci_u32_e32 v97, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s5, s25, 0
	v_add_co_u32 v98, vcc_lo, s1, v11
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+88
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+96
	v_add_co_ci_u32_e32 v99, vcc_lo, s5, v12, vcc_lo
	v_add_co_u32 v100, vcc_lo, v3, s2
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, __unnamed_1@rel32@lo+84
	s_addc_u32 s7, s7, __unnamed_1@rel32@hi+92
	v_add_co_ci_u32_e32 v101, vcc_lo, s3, v4, vcc_lo
	v_and_b32_e32 v6, 1, v15
	v_add_co_u32 v102, vcc_lo, v3, s6
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+92
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+100
	v_add_co_ci_u32_e32 v103, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v112, vcc_lo, v3, s2
	v_cmp_eq_u32_e64 s1, 1, v6
	v_add_co_ci_u32_e32 v113, vcc_lo, s3, v4, vcc_lo
	v_mov_b32_e32 v25, v5
                                        ; implicit-def: $vgpr114_vgpr115
.LBB0_43:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_47 Depth 5
                                        ;           Child Loop BB0_75 Depth 5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
                                        ;           Child Loop BB0_320 Depth 5
                                        ;           Child Loop BB0_323 Depth 5
                                        ;           Child Loop BB0_325 Depth 5
                                        ;           Child Loop BB0_327 Depth 5
                                        ;           Child Loop BB0_329 Depth 5
                                        ;           Child Loop BB0_331 Depth 5
                                        ;           Child Loop BB0_333 Depth 5
	s_cmp_eq_u32 s36, 0
	s_mov_b32 s5, -1
	;;#ASMSTART
	;;#ASMEND
	s_cbranch_scc1 .LBB0_72
; %bb.44:                               ;   in Loop: Header=BB0_43 Depth=4
	v_cmp_eq_u32_e64 s2, 0, v130
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_46
; %bb.45:                               ;   in Loop: Header=BB0_43 Depth=4
	global_load_b32 v3, v[70:71], off glc
.LBB0_46:                               ;   in Loop: Header=BB0_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v6, v[80:81], off
	v_cvt_f32_u32_e32 v4, s36
	s_sub_i32 s3, 0, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, s3, v4
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s3, v3
	v_add_nc_u32_e32 v3, s3, v130
	s_mov_b32 s3, s36
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v11, v4, v11
	v_add_nc_u32_e32 v11, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v11
	v_mul_lo_u32 v4, v4, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v3, v4, vcc_lo
.LBB0_47:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x100, v12
	s_xor_b32 s6, exec_lo, s6
; %bb.48:                               ;   in Loop: Header=BB0_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[3:4], null, v12, 24, v[15:16]
; %bb.49:                               ; %Flow952
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB0_51
; %bb.50:                               ;   in Loop: Header=BB0_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	v_add_nc_u32_e32 v15, 0xffffff00, v12
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_lshrrev_b32_e32 v18, 8, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v18, 24, v[3:4]
	v_and_b32_e32 v18, 0xff, v12
	global_load_b64 v[15:16], v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v18, 24, v[15:16]
.LBB0_51:                               ;   in Loop: Header=BB0_47 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b32 v3, v[3:4], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v3, v6
	s_cbranch_vccz .LBB0_53
; %bb.52:                               ;   in Loop: Header=BB0_47 Depth=5
	s_ctz_i32_b32 s6, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 2
	v_mov_b32_e32 v3, s6
	ds_bpermute_b32 v3, v3, v12
	s_branch .LBB0_54
.LBB0_53:                               ;   in Loop: Header=BB0_47 Depth=5
	v_mov_b32_e32 v3, -1
.LBB0_54:                               ;   in Loop: Header=BB0_47 Depth=5
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v3
	s_cmp_eq_u32 s7, -1
	s_cselect_b32 s6, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_57
; %bb.55:                               ;   in Loop: Header=BB0_47 Depth=5
	s_cmpk_lt_u32 s7, 0x100
	s_cbranch_scc0 .LBB0_58
; %bb.56:                               ;   in Loop: Header=BB0_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	s_mov_b32 s16, 0
	v_mad_u64_u32 v[15:16], null, s7, 24, v[3:4]
	s_branch .LBB0_59
.LBB0_57:                               ;   in Loop: Header=BB0_47 Depth=5
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr15_vgpr16
	s_branch .LBB0_62
.LBB0_58:                               ;   in Loop: Header=BB0_47 Depth=5
	s_mov_b32 s16, -1
                                        ; implicit-def: $vgpr15_vgpr16
.LBB0_59:                               ; %Flow946
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_61
; %bb.60:                               ;   in Loop: Header=BB0_47 Depth=5
	s_add_i32 s16, s7, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s18, s16, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_and_b32 s7, s7, 0xff
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[15:16], null, s18, 24, v[3:4]
	global_load_b64 v[3:4], v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, s7, 24, v[3:4]
.LBB0_61:                               ; %Flow947
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_mov_b32 s7, 0
.LBB0_62:                               ; %Flow948
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB0_66
; %bb.63:                               ;   in Loop: Header=BB0_47 Depth=5
	v_add_nc_u32_e32 v3, s35, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v11
	v_mul_lo_u32 v4, v4, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v3, v4, vcc_lo
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB0_65
; %bb.64:                               ;   in Loop: Header=BB0_47 Depth=5
	global_store_b32 v[70:71], v12, off
.LBB0_65:                               ;   in Loop: Header=BB0_47 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
	v_dual_mov_b32 v15, v114 :: v_dual_mov_b32 v16, v115
	s_sub_i32 s3, s3, s35
.LBB0_66:                               ;   in Loop: Header=BB0_47 Depth=5
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccz .LBB0_68
; %bb.67:                               ;   in Loop: Header=BB0_47 Depth=5
	s_mov_b32 s6, 0
	s_mov_b32 s7, -1
	s_mov_b32 s16, -1
                                        ; implicit-def: $sgpr3
                                        ; implicit-def: $vgpr12
	s_branch .LBB0_69
.LBB0_68:                               ;   in Loop: Header=BB0_47 Depth=5
	s_cmp_lt_i32 s3, 1
	s_mov_b32 s7, 0
	s_cselect_b32 s16, -1, 0
                                        ; implicit-def: $sgpr6
.LBB0_69:                               ; %Flow954
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_71
; %bb.70:                               ;   in Loop: Header=BB0_47 Depth=5
	v_dual_mov_b32 v115, v16 :: v_dual_mov_b32 v114, v15
	s_branch .LBB0_47
.LBB0_71:                               ; %loop.exit.guard903
                                        ;   in Loop: Header=BB0_43 Depth=4
	v_dual_mov_b32 v115, v16 :: v_dual_mov_b32 v114, v15
	s_xor_b32 s2, s7, -1
	s_branch .LBB0_73
.LBB0_72:                               ;   in Loop: Header=BB0_43 Depth=4
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr15_vgpr16
                                        ; implicit-def: $sgpr6
.LBB0_73:                               ; %Flow1121
                                        ;   in Loop: Header=BB0_43 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB0_314
; %bb.74:                               ; %.loopexit188
                                        ;   in Loop: Header=BB0_43 Depth=4
	v_mbcnt_lo_u32_b32 v131, exec_lo, 0
                                        ; implicit-def: $vgpr116_vgpr117
.LBB0_75:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Loop Header: Depth=5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s2, 0, v131
	v_mov_b32_e32 v3, 0
	s_mov_b32 s18, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_77
; %bb.76:                               ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v3, v[84:85], off glc
.LBB0_77:                               ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s37, v3
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3)
	s_cmp_eq_u32 s37, 0x10100
	s_cbranch_scc1 .LBB0_137
; %bb.78:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_80
; %bb.79:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v69, v5
	global_atomic_cmpswap_b32 v3, v[86:87], v[68:69], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v3, 0x100, v3, vcc_lo
.LBB0_80:                               ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s38, v3
	s_cmp_lg_u32 s37, s38
	s_cbranch_scc1 .LBB0_138
; %bb.81:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mbcnt_lo_u32_b32 v21, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v21
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_83
; %bb.82:                               ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v3, v[86:87], off glc
.LBB0_83:                               ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_mov_b32 s5, 2
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s20, 0x10100
	s_cbranch_scc1 .LBB0_171
; %bb.84:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB0_88
; %bb.85:                               ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[28:29], v[96:97], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, s3, s6, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e64 v4, s3, s7, v29, s3
	v_cmp_lt_u64_e64 s3, 0x752f, v[3:4]
	v_mov_b32_e32 v3, 1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s16, s3
	s_cbranch_execz .LBB0_87
; %bb.86:                               ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v27, s7
	global_atomic_cmpswap_b64 v[3:4], v[96:97], v[26:29], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s3, v[3:4], v[28:29]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 1, 2, s3
.LBB0_87:                               ; %Flow1110
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s16
.LBB0_88:                               ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_readfirstlane_b32 s39, v3
	s_mov_b32 s5, 1
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s39, 1
	s_cbranch_scc1 .LBB0_171
; %bb.89:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s21, vcc_lo
	s_cbranch_execz .LBB0_118
; %bb.90:                               ;   in Loop: Header=BB0_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s3, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s3, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_96
; %bb.91:                               ;   in Loop: Header=BB0_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB0_95
; %bb.92:                               ; %.preheader3.i.i.i117.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_93:                               ; %.preheader3.i.i.i117
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_93
; %bb.94:                               ; %Flow1104
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_95:                               ; %Flow1106
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_96:                               ; %.loopexit4.i.i.i112
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s40, s7, 24
	s_mul_hi_u32 s41, s6, 24
	s_mul_i32 s42, s6, 24
	s_and_saveexec_b32 s43, s3
	s_cbranch_execz .LBB0_98
; %bb.97:                               ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s41, s40
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s42
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_98:                               ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s43
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_mov_b32_e32 v15, v5
	v_dual_mov_b32 v16, v5 :: v_dual_mov_b32 v31, s7
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v29, s5
	v_mov_b32_e32 v30, s6
	v_mov_b32_e32 v28, s4
	s_clause 0x3
	global_store_b128 v[11:12], v[15:18], off
	global_store_b128 v[11:12], v[28:31], off offset:16
	global_store_b128 v[11:12], v[28:31], off offset:32
	global_store_b128 v[11:12], v[28:31], off offset:48
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_106
; %bb.99:                               ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s18 :: v_dual_mov_b32 v133, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB0_102
; %bb.100:                              ; %.preheader1.i.i.i115.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_101:                              ; %.preheader1.i.i.i115
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s18 :: v_dual_mov_b32 v29, s19
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[30:31]
	v_dual_mov_b32 v31, v16 :: v_dual_mov_b32 v30, v15
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_101
.LBB0_102:                              ; %Flow1102
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[15:16], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_104
; %bb.103:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[15:16], v[4:5], off offset:8
.LBB0_104:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[18:19], v[15:16], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	s_cbranch_vccnz .LBB0_106
; %bb.105:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v4, v[15:16], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[18:19], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_106:                              ; %Flow1103
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s41, s41, s40
	v_add_co_u32 v3, vcc_lo, v26, s42
	v_add_co_ci_u32_e32 v4, vcc_lo, s41, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_107:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_109
; %bb.108:                              ;   in Loop: Header=BB0_107 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_109:                              ;   in Loop: Header=BB0_107 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_111
; %bb.110:                              ;   in Loop: Header=BB0_107 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_112
.LBB0_111:                              ;   in Loop: Header=BB0_107 Depth=6
	s_mov_b32 s5, -1
.LBB0_112:                              ; %Flow1097
                                        ;   in Loop: Header=BB0_107 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_107
; %bb.113:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_117
; %bb.114:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17] offset:24 glc
	global_load_b64 v[18:19], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v28, vcc_lo, 0, v12, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v29, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v26, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v27, vcc_lo, s19, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[26:27]
	v_dual_cndmask_b32 v27, v27, v28 :: v_dual_cndmask_b32 v26, v26, v6
	v_mov_b32_e32 v28, v15
	v_and_b32_e32 v6, v27, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v26, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v18, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v6, vcc_lo
	global_store_b64 v[11:12], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[15:16]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_117
; %bb.115:                              ; %.preheader.i.i.i114.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s3, 0
.LBB0_116:                              ; %.preheader.i.i.i114
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[11:12], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[28:29]
	v_dual_mov_b32 v29, v16 :: v_dual_mov_b32 v28, v15
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_116
.LBB0_117:                              ; %Flow1095
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_118:                              ; %Flow1107
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s21
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s18, v3
	v_readfirstlane_b32 s19, v4
	s_cmp_eq_u64 s[18:19], 0
	s_cbranch_scc1 .LBB0_170
; %bb.119:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s3, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v11, s3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x300, v11
	s_cbranch_execz .LBB0_122
; %bb.120:                              ; %.preheader175.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_lshlrev_b32_e32 v3, 3, v11
	s_bcnt1_i32_b32 s6, s3
	s_mov_b32 s16, 0
	s_lshl_b32 s7, s6, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s3, s18, v3
	v_add_co_ci_u32_e64 v4, null, s19, 0, s3
.LBB0_121:                              ; %.preheader175
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v11, s6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, 0x2ff, v11
	global_store_b64 v[3:4], v[5:6], off
	v_add_co_u32 v3, s3, v3, s7
	v_add_co_ci_u32_e64 v4, s3, 0, v4, s3
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB0_121
.LBB0_122:                              ; %Flow1089
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $sgpr5
.LBB0_123:                              ; %.loopexit176
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e32 vcc_lo, 0, v21
	v_mov_b32_e32 v3, s20
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_125
; %bb.124:                              ;   in Loop: Header=BB0_123 Depth=6
	global_load_b32 v3, v[86:87], off glc
.LBB0_125:                              ;   in Loop: Header=BB0_123 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s3, s5
	s_cmp_lg_u32 s20, 0x10100
	s_cbranch_scc0 .LBB0_132
; %bb.126:                              ;   in Loop: Header=BB0_123 Depth=6
	v_mov_b32_e32 v3, s39
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_130
; %bb.127:                              ;   in Loop: Header=BB0_123 Depth=6
	s_add_i32 s3, s20, 0xffffff00
	v_mov_b32_e32 v6, v5
	s_lshr_b32 s3, s3, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[11:12], null, s3, 24, v[3:4]
	v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s3, 0, v[3:4]
	v_mov_b32_e32 v3, s39
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s7, s3
	s_cbranch_execz .LBB0_129
; %bb.128:                              ;   in Loop: Header=BB0_123 Depth=6
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[86:87], v68, off
	v_mov_b32_e32 v3, 0
.LBB0_129:                              ; %Flow1082
                                        ;   in Loop: Header=BB0_123 Depth=6
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_130:                              ;   in Loop: Header=BB0_123 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s3, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB0_133
; %bb.131:                              ;   in Loop: Header=BB0_123 Depth=6
	s_mov_b32 s6, 0
	s_and_not1_b32 vcc_lo, vcc_lo, exec_lo
	s_sleep 2
                                        ; implicit-def: $sgpr39
	s_branch .LBB0_134
.LBB0_132:                              ;   in Loop: Header=BB0_123 Depth=6
	s_mov_b32 s16, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr3
                                        ; implicit-def: $sgpr7
	s_branch .LBB0_135
.LBB0_133:                              ;   in Loop: Header=BB0_123 Depth=6
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr3
.LBB0_134:                              ; %Flow1086
                                        ;   in Loop: Header=BB0_123 Depth=6
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s17, vcc_lo, exec_lo
	s_mov_b32 s7, 0
	s_mov_b32 s16, 0
	s_or_b32 s5, s5, s17
.LBB0_135:                              ; %Flow1085
                                        ;   in Loop: Header=BB0_123 Depth=6
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_139
; %bb.136:                              ;   in Loop: Header=BB0_123 Depth=6
	s_mov_b32 s39, s3
	s_branch .LBB0_123
.LBB0_137:                              ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v117, v4 :: v_dual_mov_b32 v116, v3
	s_branch .LBB0_199
.LBB0_138:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s3, -1
                                        ; implicit-def: $sgpr18
	s_branch .LBB0_191
.LBB0_139:                              ; %loop.exit.guard909
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_169
; %bb.140:                              ;   in Loop: Header=BB0_75 Depth=5
	s_and_saveexec_b32 s40, s5
	s_cbranch_execz .LBB0_168
; %bb.141:                              ;   in Loop: Header=BB0_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s3, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s3, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_147
; %bb.142:                              ;   in Loop: Header=BB0_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB0_146
; %bb.143:                              ; %.preheader3.i.i.i124.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_144:                              ; %.preheader3.i.i.i124
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_144
; %bb.145:                              ; %Flow1077
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_146:                              ; %Flow1079
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_147:                              ; %.loopexit4.i.i.i119
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s41, s7, 24
	s_mul_hi_u32 s42, s6, 24
	s_mul_i32 s43, s6, 24
	s_and_saveexec_b32 s44, s3
	s_cbranch_execz .LBB0_149
; %bb.148:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s42, s41
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s43
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_149:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s44
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, s19
	v_dual_mov_b32 v31, s7 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[28:31], off offset:8
	global_store_b128 v[3:4], v[28:31], off offset:24
	global_store_b128 v[3:4], v[28:31], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_157
; %bb.150:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s20 :: v_dual_mov_b32 v133, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB0_153
; %bb.151:                              ; %.preheader1.i.i.i122.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_152:                              ; %.preheader1.i.i.i122
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s20 :: v_dual_mov_b32 v29, s21
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[30:31]
	v_dual_mov_b32 v31, v12 :: v_dual_mov_b32 v30, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_152
.LBB0_153:                              ; %Flow1075
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_155
; %bb.154:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB0_155:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB0_157
; %bb.156:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_157:                              ; %Flow1076
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s42, s42, s41
	v_add_co_u32 v3, vcc_lo, v26, s43
	v_add_co_ci_u32_e32 v4, vcc_lo, s42, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_158:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_160
; %bb.159:                              ;   in Loop: Header=BB0_158 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_160:                              ;   in Loop: Header=BB0_158 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_162
; %bb.161:                              ;   in Loop: Header=BB0_158 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_163
.LBB0_162:                              ;   in Loop: Header=BB0_158 Depth=6
	s_mov_b32 s5, -1
.LBB0_163:                              ; %Flow1070
                                        ;   in Loop: Header=BB0_158 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_158
; %bb.164:                              ;   in Loop: Header=BB0_75 Depth=5
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB0_168
; %bb.165:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v28, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v29, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v27, v19, v21 :: v_dual_cndmask_b32 v26, v18, v6
	v_and_b32_e32 v4, v27, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v26, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_168
; %bb.166:                              ; %.preheader.i.i.i121.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s3, 0
.LBB0_167:                              ; %.preheader.i.i.i121
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[3:4], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_167
.LBB0_168:                              ; %Flow1080
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s40
	s_mov_b32 s7, s39
.LBB0_169:                              ; %Flow1081
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s39, s7
.LBB0_170:                              ; %Flow1091
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, s39
.LBB0_171:                              ; %__ockl_devmem_request.exit125
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_190
; %bb.172:                              ;   in Loop: Header=BB0_75 Depth=5
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s18, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_189
; %bb.173:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[3:4], v[96:97], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s6, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x7530, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_189
; %bb.174:                              ;   in Loop: Header=BB0_75 Depth=5
	v_sub_nc_u32_e32 v3, 0x7530, v3
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s7, s6, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s6, s16, s6
	s_addc_u32 s7, s17, s7
.LBB0_175:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x659
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB0_178
; %bb.176:                              ; %.preheader11.i138
                                        ;   in Loop: Header=BB0_175 Depth=6
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB0_175
.LBB0_177:                              ; %.preheader9.i137
                                        ;   in Loop: Header=BB0_178 Depth=6
	s_sleep 63
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_178:                              ; %Flow1061
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x326
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_177
; %bb.179:                              ; %Flow1058
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_add_u32 s20, s16, 0x18c
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB0_182
.LBB0_180:                              ; %.preheader7.i136
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 31
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x18c
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB0_180
	s_branch .LBB0_182
.LBB0_181:                              ; %.preheader5.i135
                                        ;   in Loop: Header=BB0_182 Depth=6
	s_sleep 15
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_182:                              ; %.loopexit8.i128
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0xc0
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_181
	s_branch .LBB0_184
.LBB0_183:                              ; %.preheader3.i134
                                        ;   in Loop: Header=BB0_184 Depth=6
	s_sleep 7
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_184:                              ; %Flow1052
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x59
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_183
	s_branch .LBB0_186
.LBB0_185:                              ; %.preheader1.i133
                                        ;   in Loop: Header=BB0_186 Depth=6
	s_sleep 3
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_186:                              ; %Flow1049
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 38
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_185
; %bb.187:                              ; %Flow1046
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_cmp_le_u64_e64 s16, s[6:7], s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_189
.LBB0_188:                              ; %.preheader.i132
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s16, s[6:7], s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_188
.LBB0_189:                              ; %__ockl_rtcwait_u32.exit139
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
	s_cmp_lg_u32 s5, 2
	v_mov_b32_e32 v117, s4
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v116, 0, 1, s5
.LBB0_190:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, 0
.LBB0_191:                              ; %Flow1113
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB0_199
; %bb.192:                              ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_196
; %bb.193:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[28:29], v[98:99], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s6, v28
	v_sub_co_ci_u32_e32 v4, vcc_lo, s7, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_u64_e32 vcc_lo, 0x4e1f, v[3:4]
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB0_195
; %bb.194:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v27, s7
	global_atomic_cmpswap_b64 v[3:4], v[98:99], v[26:29], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[3:4], v[28:29]
	v_mov_b32_e32 v4, s4
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
.LBB0_195:                              ; %Flow1040
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_196:                              ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s6, v3
	v_readfirstlane_b32 s7, v4
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB0_200
; %bb.197:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
.LBB0_198:                              ; %Flow1039
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v117, v16 :: v_dual_mov_b32 v116, v15
.LBB0_199:                              ; %Flow1116
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_xor_b32 s2, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_75
	s_branch .LBB0_315
.LBB0_200:                              ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v15 :: v_dual_mov_b32 v4, v16
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_236
; %bb.201:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[3:4], v5, s[12:13] glc
	global_load_b64 v[11:12], v5, s[14:15]
	s_waitcnt vmcnt(0)
	v_cmp_ge_u64_e32 vcc_lo, v[3:4], v[11:12]
	s_cbranch_vccnz .LBB0_205
; %bb.202:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s5, exec_lo
	s_mov_b32 s2, exec_lo
	v_mbcnt_lo_u32_b32 v6, s5, 0
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB0_204
; %bb.203:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s5, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s5, s5, 21
	v_mov_b32_e32 v4, s5
	global_atomic_add_u64 v[3:4], v5, v[4:5], s[12:13] glc
.LBB0_204:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v4
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x200000, v6, s[6:7]
	v_cmp_ge_u64_e64 s2, v[3:4], v[11:12]
	s_branch .LBB0_206
.LBB0_205:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr3_vgpr4
.LBB0_206:                              ; %Flow1037
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s20, s2
	s_cbranch_execz .LBB0_235
; %bb.207:                              ;   in Loop: Header=BB0_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_213
; %bb.208:                              ;   in Loop: Header=BB0_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v18, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB0_212
; %bb.209:                              ; %.preheader3.i.i.i145.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_210:                              ; %.preheader3.i.i.i145
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[16:17] offset:40
	global_load_b64 v[26:27], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, v18, v28
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v12 :: v_dual_and_b32 v6, v19, v29
	v_mad_u64_u32 v[18:19], null, v6, 24, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v12, v18
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_210
; %bb.211:                              ; %Flow1033
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_212:                              ; %Flow1035
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_213:                              ; %.loopexit4.i.i.i140
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v18
	v_readfirstlane_b32 s7, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s21, s7, 24
	s_mul_hi_u32 s39, s6, 24
	s_mul_i32 s40, s6, 24
	s_and_saveexec_b32 s41, s2
	s_cbranch_execz .LBB0_215
; %bb.214:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s39, s21
	s_waitcnt vmcnt(0)
	v_add_co_u32 v18, vcc_lo, v26, s40
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[18:19], v[11:14], off offset:8
.LBB0_215:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s41
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v31, s7
	v_dual_mov_b32 v19, v5 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v21, v5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v29, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[18:21], off
	global_store_b128 v[11:12], v[28:31], off offset:16
	global_store_b128 v[11:12], v[28:31], off offset:32
	global_store_b128 v[11:12], v[28:31], off offset:48
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_223
; %bb.216:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s18 :: v_dual_mov_b32 v133, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB0_219
; %bb.217:                              ; %.preheader1.i.i.i143.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_218:                              ; %.preheader1.i.i.i143
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s18 :: v_dual_mov_b32 v29, s19
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[30:31]
	v_dual_mov_b32 v31, v19 :: v_dual_mov_b32 v30, v18
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_218
.LBB0_219:                              ; %Flow1031
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[18:19], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_221
; %bb.220:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[18:19], v[4:5], off offset:8
.LBB0_221:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[28:29], v[18:19], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[28:29]
	s_cbranch_vccnz .LBB0_223
; %bb.222:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v4, v[18:19], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[28:29], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_223:                              ; %Flow1032
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s39, s39, s21
	v_add_co_u32 v3, vcc_lo, v26, s40
	v_add_co_ci_u32_e32 v4, vcc_lo, s39, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_224:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_226
; %bb.225:                              ;   in Loop: Header=BB0_224 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_226:                              ;   in Loop: Header=BB0_224 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_228
; %bb.227:                              ;   in Loop: Header=BB0_224 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_229
.LBB0_228:                              ;   in Loop: Header=BB0_224 Depth=6
	s_mov_b32 s5, -1
.LBB0_229:                              ; %Flow1026
                                        ;   in Loop: Header=BB0_224 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_224
; %bb.230:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_234
; %bb.231:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17] offset:24 glc
	global_load_b64 v[28:29], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v26, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v27, vcc_lo, s19, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[26:27]
	v_dual_cndmask_b32 v27, v27, v21 :: v_dual_cndmask_b32 v26, v26, v6
	v_and_b32_e32 v6, v27, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v26, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, v28, v11
	v_mov_b32_e32 v28, v18
	v_add_co_ci_u32_e32 v12, vcc_lo, v29, v6, vcc_lo
	v_mov_b32_e32 v29, v19
	global_store_b64 v[11:12], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[18:19]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_234
; %bb.232:                              ; %.preheader.i.i.i142.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s2, 0
.LBB0_233:                              ; %.preheader.i.i.i142
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[11:12], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[28:29]
	v_dual_mov_b32 v29, v19 :: v_dual_mov_b32 v28, v18
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_233
.LBB0_234:                              ; %Flow1024
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_235:                              ; %Flow1038
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s20
.LBB0_236:                              ; %__ockl_devmem_request.exit146
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v3
	v_readfirstlane_b32 s17, v4
	s_cmp_eq_u64 s[16:17], 0
	s_cbranch_scc1 .LBB0_281
; %bb.237:                              ;   in Loop: Header=BB0_75 Depth=5
	v_mbcnt_lo_u32_b32 v4, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b32 v6, v[82:83], off
	s_bcnt1_i32_b32 s3, exec_lo
	s_add_u32 s6, s16, 16
	s_addc_u32 s7, s17, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshrrev_b32_e32 v3, 5, v3
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s5, exec_lo, s2
	s_cbranch_execz .LBB0_245
; %bb.238:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v15, v[100:101], off
	s_mov_b32 s18, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB0_241
; %bb.239:                              ; %.preheader172.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s19, s3, 2
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB0_240:                              ; %.preheader172
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_add_nc_u32_e32 v16, s3, v16
	global_store_b32 v[11:12], v5, off
	v_add_co_u32 v11, s2, v11, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s2, 0, v12, s2
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB0_240
.LBB0_241:                              ; %Flow1013
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
	global_load_b32 v16, v[102:103], off
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v15, v4, v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v11, v6
	s_cbranch_execz .LBB0_244
; %bb.242:                              ; %.preheader170.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_mul_lo_u32 v12, v15, s3
	s_mov_b32 s18, 0
.LBB0_243:                              ; %.preheader170
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_lshlrev_b32_e64 v15, v11, 1
	v_lshrrev_b32_e32 v16, 3, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v11, v12
	v_and_b32_e32 v16, 0x1ffffffc, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v11, v6
	global_store_b32 v16, v15, s[6:7]
	s_or_b32 s18, vcc_lo, s18
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB0_243
.LBB0_244:                              ; %Flow1010
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_245:                              ; %Flow1018
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_and_not1_saveexec_b32 s5, s5
	s_cbranch_execz .LBB0_250
; %bb.246:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB0_249
; %bb.247:                              ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v15, v[112:113], off
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s19, s3, 2
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB0_248:                              ; %.preheader
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_add_nc_u32_e32 v16, s3, v16
	s_waitcnt vmcnt(0)
	global_store_b32 v[11:12], v15, off
	v_add_co_u32 v11, s2, v11, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s2, 0, v12, s2
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB0_248
.LBB0_249:                              ; %Flow1016
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
.LBB0_250:                              ; %.loopexit
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_254
; %bb.251:                              ;   in Loop: Header=BB0_75 Depth=5
	v_and_b32_e32 v6, 31, v6
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v6
	s_cbranch_execz .LBB0_253
; %bb.252:                              ;   in Loop: Header=BB0_75 Depth=5
	v_add_nc_u32_e32 v4, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v11, v[3:4], off
	s_waitcnt vmcnt(0)
	v_lshl_or_b32 v6, -1, v6, v11
	global_store_b32 v[3:4], v6, off
.LBB0_253:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	global_store_b128 v5, v[22:25], s[16:17]
.LBB0_254:                              ; %Flow1007
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $sgpr5
.LBB0_255:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s2, 0, v131
	v_mov_b32_e32 v3, s37
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_257
; %bb.256:                              ;   in Loop: Header=BB0_255 Depth=6
	global_load_b32 v3, v[84:85], off glc
.LBB0_257:                              ;   in Loop: Header=BB0_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s37, v3
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s5, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s3, s5
	s_cmp_eq_u32 s37, 0x10100
	s_cbranch_scc1 .LBB0_264
; %bb.258:                              ;   in Loop: Header=BB0_255 Depth=6
	v_mov_b32_e32 v3, s38
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_260
; %bb.259:                              ;   in Loop: Header=BB0_255 Depth=6
	global_load_b32 v3, v[86:87], off glc
.LBB0_260:                              ;   in Loop: Header=BB0_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s38, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u32 s37, s38
	s_cbranch_scc0 .LBB0_265
; %bb.261:                              ;   in Loop: Header=BB0_255 Depth=6
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_272
; %bb.262:                              ;   in Loop: Header=BB0_255 Depth=6
	s_cmpk_lt_u32 s37, 0x100
	s_cbranch_scc0 .LBB0_266
; %bb.263:                              ;   in Loop: Header=BB0_255 Depth=6
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[6:7]
	s_mov_b32 s6, 0
	v_mad_u64_u32 v[11:12], null, s37, 24, v[3:4]
	s_branch .LBB0_267
.LBB0_264:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b64 s[2:3], 0
	s_mov_b32 s20, -1
	s_mov_b32 s18, 0
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB0_277
.LBB0_265:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s18, -1
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB0_276
.LBB0_266:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_267:                              ; %Flow999
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_269
; %bb.268:                              ;   in Loop: Header=BB0_255 Depth=6
	s_add_i32 s6, s37, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s18, s6, 8
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[6:7]
	s_and_b32 s6, s37, 0xff
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s18, 24, v[3:4]
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
.LBB0_269:                              ;   in Loop: Header=BB0_255 Depth=6
	v_dual_mov_b32 v15, s37 :: v_dual_mov_b32 v4, s17
	v_dual_mov_b32 v3, s16 :: v_dual_mov_b32 v6, v5
	global_store_b32 v5, v15, s[16:17] offset:4
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off offset:8 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_271
; %bb.270:                              ;   in Loop: Header=BB0_255 Depth=6
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[84:85], v118, off
	v_dual_mov_b32 v3, v11 :: v_dual_mov_b32 v4, v12
.LBB0_271:                              ; %Flow997
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_272:                              ; %Flow1000
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v4
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB0_274
; %bb.273:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
	s_branch .LBB0_275
.LBB0_274:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s19, 0
	s_and_not1_b32 s2, s2, exec_lo
	s_sleep 2
.LBB0_275:                              ; %Flow1005
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s18, 0
.LBB0_276:                              ; %Flow1004
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_mov_b32 s20, 0
	s_or_b32 s5, s3, s2
                                        ; implicit-def: $sgpr2_sgpr3
.LBB0_277:                              ; %Flow1003
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_255
; %bb.278:                              ; %loop.exit.guard913
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s2
	s_and_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB0_198
; %bb.279:                              ; %loop.exit.guard914
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_xor_b32 s2, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB0_282
; %bb.280:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, 0
	s_branch .LBB0_283
.LBB0_281:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, 0
	s_branch .LBB0_198
.LBB0_282:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, -1
                                        ; implicit-def: $sgpr6_sgpr7
.LBB0_283:                              ; %Flow994
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_198
; %bb.284:                              ;   in Loop: Header=BB0_75 Depth=5
	s_and_saveexec_b32 s3, s5
	s_cbranch_execz .LBB0_313
; %bb.285:                              ;   in Loop: Header=BB0_75 Depth=5
	s_load_b64 s[18:19], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_291
; %bb.286:                              ;   in Loop: Header=BB0_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[18:19] offset:40
	global_load_b64 v[15:16], v5, s[18:19]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB0_290
; %bb.287:                              ; %.preheader3.i.i.i152.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_288:                              ; %.preheader3.i.i.i152
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[18:19] offset:40
	global_load_b64 v[18:19], v5, s[18:19]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_288
; %bb.289:                              ; %Flow990
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_290:                              ; %Flow992
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_291:                              ; %.loopexit4.i.i.i147
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[18:19] offset:40
	global_load_b128 v[26:29], v5, s[18:19]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s37, s7, 24
	s_mul_hi_u32 s38, s6, 24
	s_mul_i32 s39, s6, 24
	s_and_saveexec_b32 s40, s2
	s_cbranch_execz .LBB0_293
; %bb.292:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s38, s37
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s39
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_293:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s40
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v12, s17
	v_dual_mov_b32 v31, s7 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[28:31], off offset:8
	global_store_b128 v[3:4], v[28:31], off offset:24
	global_store_b128 v[3:4], v[28:31], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_301
; %bb.294:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[133:134], v5, s[18:19] offset:32 glc
	global_load_b64 v[3:4], v5, s[18:19] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v131, s20 :: v_dual_mov_b32 v132, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[133:134], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[131:134], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[133:134]
	s_cbranch_execz .LBB0_297
; %bb.295:                              ; %.preheader1.i.i.i150.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_296:                              ; %.preheader1.i.i.i150
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s20 :: v_dual_mov_b32 v29, s21
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[28:31], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[30:31]
	v_dual_mov_b32 v31, v12 :: v_dual_mov_b32 v30, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_296
.LBB0_297:                              ; %Flow988
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[18:19] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_299
; %bb.298:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB0_299:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB0_301
; %bb.300:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_301:                              ; %Flow989
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s38, s38, s37
	v_add_co_u32 v3, vcc_lo, v26, s39
	v_add_co_ci_u32_e32 v4, vcc_lo, s38, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_302:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_304
; %bb.303:                              ;   in Loop: Header=BB0_302 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_304:                              ;   in Loop: Header=BB0_302 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_306
; %bb.305:                              ;   in Loop: Header=BB0_302 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_307
.LBB0_306:                              ;   in Loop: Header=BB0_302 Depth=6
	s_mov_b32 s5, -1
.LBB0_307:                              ; %Flow983
                                        ;   in Loop: Header=BB0_302 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_302
; %bb.308:                              ;   in Loop: Header=BB0_75 Depth=5
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_312
; %bb.309:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[18:19] offset:40
	global_load_b64 v[11:12], v5, s[18:19] offset:24 glc
	global_load_b64 v[15:16], v5, s[18:19]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v28, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v29, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v27, v19, v21 :: v_dual_cndmask_b32 v26, v18, v6
	v_and_b32_e32 v4, v27, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v26, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_312
; %bb.310:                              ; %.preheader.i.i.i149.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s2, 0
.LBB0_311:                              ; %.preheader.i.i.i149
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[3:4], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_311
.LBB0_312:                              ; %Flow981
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v131, 0
.LBB0_313:                              ; %Flow993
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v15, v116 :: v_dual_mov_b32 v16, v117
	s_mov_b32 s18, -1
	s_branch .LBB0_198
.LBB0_314:                              ;   in Loop: Header=BB0_43 Depth=4
                                        ; implicit-def: $vgpr114_vgpr115
                                        ; implicit-def: $sgpr36
                                        ; implicit-def: $vgpr130
	s_branch .LBB0_338
.LBB0_315:                              ;   in Loop: Header=BB0_43 Depth=4
	v_cmp_ne_u64_e64 s5, 1, v[116:117]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_317
; %bb.316:                              ;   in Loop: Header=BB0_43 Depth=4
	v_dual_mov_b32 v114, v116 :: v_dual_mov_b32 v115, v117
	s_branch .LBB0_337
.LBB0_317:                              ;   in Loop: Header=BB0_43 Depth=4
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_334
; %bb.318:                              ;   in Loop: Header=BB0_43 Depth=4
	global_load_b64 v[3:4], v[98:99], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x4e20, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_334
; %bb.319:                              ;   in Loop: Header=BB0_43 Depth=4
	v_sub_nc_u32_e32 v3, 0x4e20, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB0_320:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x659
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB0_323
; %bb.321:                              ; %.preheader11.i166
                                        ;   in Loop: Header=BB0_320 Depth=5
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB0_320
.LBB0_322:                              ; %.preheader9.i165
                                        ;   in Loop: Header=BB0_323 Depth=5
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_323:                              ; %Flow975
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x326
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB0_322
; %bb.324:                              ; %Flow972
                                        ;   in Loop: Header=BB0_43 Depth=4
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB0_327
.LBB0_325:                              ; %.preheader7.i164
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB0_325
	s_branch .LBB0_327
.LBB0_326:                              ; %.preheader5.i163
                                        ;   in Loop: Header=BB0_327 Depth=5
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_327:                              ; %.loopexit8.i156
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0xc0
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB0_326
	s_branch .LBB0_329
.LBB0_328:                              ; %.preheader3.i162
                                        ;   in Loop: Header=BB0_329 Depth=5
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_329:                              ; %Flow966
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x59
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB0_328
	s_branch .LBB0_331
.LBB0_330:                              ; %.preheader1.i161
                                        ;   in Loop: Header=BB0_331 Depth=5
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_331:                              ; %Flow963
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 38
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB0_330
; %bb.332:                              ; %Flow960
                                        ;   in Loop: Header=BB0_43 Depth=4
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_334
.LBB0_333:                              ; %.preheader.i160
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_333
.LBB0_334:                              ; %__ockl_rtcwait_u32.exit167
                                        ;   in Loop: Header=BB0_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s16
	v_mov_b32_e32 v3, s36
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v130
	s_cbranch_execz .LBB0_336
; %bb.335:                              ;   in Loop: Header=BB0_43 Depth=4
	global_load_b32 v3, v[84:85], off glc
.LBB0_336:                              ;   in Loop: Header=BB0_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s36, v3
.LBB0_337:                              ;   in Loop: Header=BB0_43 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v15, v114 :: v_dual_mov_b32 v16, v115
	s_mov_b32 s6, 0
.LBB0_338:                              ; %Flow1122
                                        ;   in Loop: Header=BB0_43 Depth=4
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_43
; %bb.339:                              ; %Flow1123
                                        ;   in Loop: Header=BB0_11 Depth=3
	v_mov_b32_e32 v22, v7
.LBB0_340:                              ; %Flow1124
                                        ;   in Loop: Header=BB0_11 Depth=3
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v4, v22
	s_and_b32 s3, s6, exec_lo
.LBB0_341:                              ; %Flow1126
                                        ;   in Loop: Header=BB0_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s34
.LBB0_342:                              ; %.loopexit187
                                        ;   in Loop: Header=BB0_11 Depth=3
	s_xor_b32 s1, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s1
	s_or_b32 s30, s1, s30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s30
	s_cbranch_execnz .LBB0_11
; %bb.343:                              ; %Flow1139
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s30
	s_mov_b32 s1, 0
	s_branch .LBB0_345
.LBB0_344:                              ;   in Loop: Header=BB0_6 Depth=2
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_345:                              ; %Flow1321
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_642
; %bb.346:                              ;   in Loop: Header=BB0_6 Depth=2
	v_mbcnt_lo_u32_b32 v70, exec_lo, 0
	s_bcnt1_i32_b32 s30, exec_lo
                                        ; implicit-def: $vgpr28_vgpr29
.LBB0_347:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_351 Depth 4
                                        ;         Child Loop BB0_378 Depth 4
                                        ;           Child Loop BB0_396 Depth 5
                                        ;           Child Loop BB0_404 Depth 5
                                        ;           Child Loop BB0_410 Depth 5
                                        ;           Child Loop BB0_419 Depth 5
                                        ;           Child Loop BB0_424 Depth 5
                                        ;           Child Loop BB0_426 Depth 5
                                        ;           Child Loop BB0_447 Depth 5
                                        ;           Child Loop BB0_455 Depth 5
                                        ;           Child Loop BB0_461 Depth 5
                                        ;           Child Loop BB0_470 Depth 5
                                        ;           Child Loop BB0_478 Depth 5
                                        ;           Child Loop BB0_481 Depth 5
                                        ;           Child Loop BB0_483 Depth 5
                                        ;           Child Loop BB0_485 Depth 5
                                        ;           Child Loop BB0_487 Depth 5
                                        ;           Child Loop BB0_489 Depth 5
                                        ;           Child Loop BB0_491 Depth 5
                                        ;           Child Loop BB0_513 Depth 5
                                        ;           Child Loop BB0_521 Depth 5
                                        ;           Child Loop BB0_527 Depth 5
                                        ;           Child Loop BB0_536 Depth 5
                                        ;           Child Loop BB0_543 Depth 5
                                        ;           Child Loop BB0_546 Depth 5
                                        ;           Child Loop BB0_551 Depth 5
                                        ;           Child Loop BB0_558 Depth 5
                                        ;           Child Loop BB0_591 Depth 5
                                        ;           Child Loop BB0_599 Depth 5
                                        ;           Child Loop BB0_605 Depth 5
                                        ;           Child Loop BB0_614 Depth 5
                                        ;         Child Loop BB0_623 Depth 4
                                        ;         Child Loop BB0_626 Depth 4
                                        ;         Child Loop BB0_628 Depth 4
                                        ;         Child Loop BB0_630 Depth 4
                                        ;         Child Loop BB0_632 Depth 4
                                        ;         Child Loop BB0_634 Depth 4
                                        ;         Child Loop BB0_636 Depth 4
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_eq_u32 s29, 0
	s_mov_b32 s5, -1
	;;#ASMSTART
	;;#ASMEND
	s_cbranch_scc1 .LBB0_375
; %bb.348:                              ;   in Loop: Header=BB0_347 Depth=3
	v_cmp_eq_u32_e64 s1, 0, v70
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_350
; %bb.349:                              ;   in Loop: Header=BB0_347 Depth=3
	global_load_b32 v3, v[34:35], off glc
.LBB0_350:                              ;   in Loop: Header=BB0_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	global_load_b32 v6, v[36:37], off
	v_cvt_f32_u32_e32 v4, s29
	s_sub_i32 s2, 0, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, s2, v4
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s2, v3
	v_add_nc_u32_e32 v3, s2, v70
	s_mov_b32 s2, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v11, v4, v11
	v_add_nc_u32_e32 v15, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v15
	v_mul_lo_u32 v4, v4, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v16, v3, v4, vcc_lo
.LBB0_351:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x100, v16
	s_xor_b32 s3, exec_lo, s3
; %bb.352:                              ;   in Loop: Header=BB0_351 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, 0x1800, v7, s[6:7]
	v_mad_u64_u32 v[3:4], null, v16, 24, v[11:12]
; %bb.353:                              ; %Flow1148
                                        ;   in Loop: Header=BB0_351 Depth=4
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB0_355
; %bb.354:                              ;   in Loop: Header=BB0_351 Depth=4
	s_add_u32 s6, s10, 0x2800
	v_add_nc_u32_e32 v11, 0xffffff00, v16
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[6:7]
	v_lshrrev_b32_e32 v18, 8, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v18, 24, v[3:4]
	v_and_b32_e32 v18, 0xff, v16
	global_load_b64 v[11:12], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v18, 24, v[11:12]
.LBB0_355:                              ;   in Loop: Header=BB0_351 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v3, v[3:4], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v3, v6
	s_cbranch_vccz .LBB0_357
; %bb.356:                              ;   in Loop: Header=BB0_351 Depth=4
	s_ctz_i32_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s3, s3, 2
	v_mov_b32_e32 v3, s3
	ds_bpermute_b32 v3, v3, v16
	s_branch .LBB0_358
.LBB0_357:                              ;   in Loop: Header=BB0_351 Depth=4
	v_mov_b32_e32 v3, -1
.LBB0_358:                              ;   in Loop: Header=BB0_351 Depth=4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v3
	s_cmp_eq_u32 s6, -1
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_361
; %bb.359:                              ;   in Loop: Header=BB0_351 Depth=4
	s_cmpk_lt_u32 s6, 0x100
	s_cbranch_scc0 .LBB0_362
; %bb.360:                              ;   in Loop: Header=BB0_351 Depth=4
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_mov_b32 s7, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
	s_branch .LBB0_363
.LBB0_361:                              ;   in Loop: Header=BB0_351 Depth=4
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr11_vgpr12
	s_branch .LBB0_366
.LBB0_362:                              ;   in Loop: Header=BB0_351 Depth=4
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_363:                              ; %Flow1141
                                        ;   in Loop: Header=BB0_351 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB0_365
; %bb.364:                              ;   in Loop: Header=BB0_351 Depth=4
	s_add_i32 s7, s6, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s7, s7, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_and_b32 s6, s6, 0xff
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
.LBB0_365:                              ; %Flow1142
                                        ;   in Loop: Header=BB0_351 Depth=4
	s_mov_b32 s6, 0
.LBB0_366:                              ; %Flow1144
                                        ;   in Loop: Header=BB0_351 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_370
; %bb.367:                              ;   in Loop: Header=BB0_351 Depth=4
	v_add_nc_u32_e32 v3, s30, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v15
	v_mul_lo_u32 v4, v4, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v16, v3, v4, vcc_lo
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_369
; %bb.368:                              ;   in Loop: Header=BB0_351 Depth=4
	global_store_b32 v[34:35], v16, off
.LBB0_369:                              ;   in Loop: Header=BB0_351 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v11, v28 :: v_dual_mov_b32 v12, v29
	s_sub_i32 s2, s2, s30
.LBB0_370:                              ;   in Loop: Header=BB0_351 Depth=4
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB0_372
; %bb.371:                              ;   in Loop: Header=BB0_351 Depth=4
	s_mov_b32 s3, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $vgpr16
	s_branch .LBB0_373
.LBB0_372:                              ;   in Loop: Header=BB0_351 Depth=4
	s_cmp_lt_i32 s2, 1
	s_mov_b32 s3, 0
	s_cselect_b32 s6, -1, 0
.LBB0_373:                              ; %Flow1150
                                        ;   in Loop: Header=BB0_351 Depth=4
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_351
; %bb.374:                              ; %loop.exit.guard922
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_xor_b32 s1, s3, -1
	s_branch .LBB0_376
.LBB0_375:                              ;   in Loop: Header=BB0_347 Depth=3
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_376:                              ; %Flow1317
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_617
; %bb.377:                              ; %.loopexit190
                                        ;   in Loop: Header=BB0_347 Depth=3
	v_mbcnt_lo_u32_b32 v71, exec_lo, 0
                                        ; implicit-def: $vgpr30_vgpr31
.LBB0_378:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_396 Depth 5
                                        ;           Child Loop BB0_404 Depth 5
                                        ;           Child Loop BB0_410 Depth 5
                                        ;           Child Loop BB0_419 Depth 5
                                        ;           Child Loop BB0_424 Depth 5
                                        ;           Child Loop BB0_426 Depth 5
                                        ;           Child Loop BB0_447 Depth 5
                                        ;           Child Loop BB0_455 Depth 5
                                        ;           Child Loop BB0_461 Depth 5
                                        ;           Child Loop BB0_470 Depth 5
                                        ;           Child Loop BB0_478 Depth 5
                                        ;           Child Loop BB0_481 Depth 5
                                        ;           Child Loop BB0_483 Depth 5
                                        ;           Child Loop BB0_485 Depth 5
                                        ;           Child Loop BB0_487 Depth 5
                                        ;           Child Loop BB0_489 Depth 5
                                        ;           Child Loop BB0_491 Depth 5
                                        ;           Child Loop BB0_513 Depth 5
                                        ;           Child Loop BB0_521 Depth 5
                                        ;           Child Loop BB0_527 Depth 5
                                        ;           Child Loop BB0_536 Depth 5
                                        ;           Child Loop BB0_543 Depth 5
                                        ;           Child Loop BB0_546 Depth 5
                                        ;           Child Loop BB0_551 Depth 5
                                        ;           Child Loop BB0_558 Depth 5
                                        ;           Child Loop BB0_591 Depth 5
                                        ;           Child Loop BB0_599 Depth 5
                                        ;           Child Loop BB0_605 Depth 5
                                        ;           Child Loop BB0_614 Depth 5
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s1, 0, v71
	v_mov_b32_e32 v3, 0
	s_mov_b32 s18, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_380
; %bb.379:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v3, v[32:33], off glc
.LBB0_380:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s31, v3
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3)
	s_cmp_eq_u32 s31, 0x10100
	s_cbranch_scc1 .LBB0_440
; %bb.381:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_383
; %bb.382:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v69, v5
	global_atomic_cmpswap_b32 v3, v[48:49], v[68:69], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v3, 0x100, v3, vcc_lo
.LBB0_383:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s34, v3
	s_cmp_lg_u32 s31, s34
	s_cbranch_scc1 .LBB0_441
; %bb.384:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mbcnt_lo_u32_b32 v27, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v27
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_386
; %bb.385:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v3, v[48:49], off glc
.LBB0_386:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_mov_b32 s16, 2
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s20, 0x10100
	s_cbranch_scc1 .LBB0_474
; %bb.387:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_391
; %bb.388:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[23:24], v[50:51], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, s2, s6, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e64 v4, s2, s7, v24, s2
	v_cmp_lt_u64_e64 s2, 0x752f, v[3:4]
	v_mov_b32_e32 v3, 1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_390
; %bb.389:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v22, s7
	global_atomic_cmpswap_b64 v[3:4], v[50:51], v[21:24], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s2, v[3:4], v[23:24]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 1, 2, s2
.LBB0_390:                              ; %Flow1306
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_391:                              ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s3, v3
	s_mov_b32 s16, 1
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s3, 1
	s_cbranch_scc1 .LBB0_474
; %bb.392:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s21, vcc_lo
	s_cbranch_execz .LBB0_421
; %bb.393:                              ;   in Loop: Header=BB0_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_399
; %bb.394:                              ;   in Loop: Header=BB0_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB0_398
; %bb.395:                              ; %.preheader3.i.i.i75.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_396:                              ; %.preheader3.i.i.i75
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_396
; %bb.397:                              ; %Flow1300
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_398:                              ; %Flow1302
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_399:                              ; %.loopexit4.i.i.i70
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s35, s7, 24
	s_mul_hi_u32 s36, s6, 24
	s_mul_i32 s37, s6, 24
	s_and_saveexec_b32 s38, s2
	s_cbranch_execz .LBB0_401
; %bb.400:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s36, s35
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s37
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_401:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s38
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v15, v5 :: v_dual_mov_b32 v26, s7
	v_dual_mov_b32 v16, v5 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v24, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[15:18], off
	global_store_b128 v[11:12], v[23:26], off offset:16
	global_store_b128 v[11:12], v[23:26], off offset:32
	global_store_b128 v[11:12], v[23:26], off offset:48
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_409
; %bb.402:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s18 :: v_dual_mov_b32 v81, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB0_405
; %bb.403:                              ; %.preheader1.i.i.i73.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_404:                              ; %.preheader1.i.i.i73
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s19
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[25:26]
	v_dual_mov_b32 v26, v16 :: v_dual_mov_b32 v25, v15
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_404
.LBB0_405:                              ; %Flow1298
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[15:16], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_407
; %bb.406:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[15:16], v[4:5], off offset:8
.LBB0_407:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[18:19], v[15:16], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	s_cbranch_vccnz .LBB0_409
; %bb.408:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v4, v[15:16], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[18:19], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_409:                              ; %Flow1299
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s36, s36, s35
	v_add_co_u32 v3, vcc_lo, v21, s37
	v_add_co_ci_u32_e32 v4, vcc_lo, s36, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_410:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_412
; %bb.411:                              ;   in Loop: Header=BB0_410 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_412:                              ;   in Loop: Header=BB0_410 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_414
; %bb.413:                              ;   in Loop: Header=BB0_410 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_415
.LBB0_414:                              ;   in Loop: Header=BB0_410 Depth=5
	s_mov_b32 s5, -1
.LBB0_415:                              ; %Flow1293
                                        ;   in Loop: Header=BB0_410 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_410
; %bb.416:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_420
; %bb.417:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17] offset:24 glc
	global_load_b64 v[18:19], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v12, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v24, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v21, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v22, vcc_lo, s19, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_cndmask_b32 v22, v22, v23 :: v_dual_cndmask_b32 v21, v21, v6
	v_dual_mov_b32 v23, v15 :: v_dual_and_b32 v6, v22, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v21, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v18, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v6, vcc_lo
	global_store_b64 v[11:12], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[15:16]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_420
; %bb.418:                              ; %.preheader.i.i.i72.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s2, 0
.LBB0_419:                              ; %.preheader.i.i.i72
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[11:12], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[23:24]
	v_dual_mov_b32 v24, v16 :: v_dual_mov_b32 v23, v15
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_419
.LBB0_420:                              ; %Flow1291
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_421:                              ; %Flow1303
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s21
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s18, v3
	v_readfirstlane_b32 s19, v4
	s_cmp_eq_u64 s[18:19], 0
	s_cbranch_scc1 .LBB0_473
; %bb.422:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s2, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v11, s2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x300, v11
	s_cbranch_execz .LBB0_425
; %bb.423:                              ; %.preheader185.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_lshlrev_b32_e32 v3, 3, v11
	s_bcnt1_i32_b32 s6, s2
	s_mov_b32 s16, 0
	s_lshl_b32 s7, s6, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s2, s18, v3
	v_add_co_ci_u32_e64 v4, null, s19, 0, s2
.LBB0_424:                              ; %.preheader185
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v11, s6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, 0x2ff, v11
	global_store_b64 v[3:4], v[5:6], off
	v_add_co_u32 v3, s2, v3, s7
	v_add_co_ci_u32_e64 v4, s2, 0, v4, s2
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB0_424
.LBB0_425:                              ; %Flow1285
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $sgpr5
.LBB0_426:                              ; %.loopexit186
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e32 vcc_lo, 0, v27
	v_mov_b32_e32 v3, s20
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_428
; %bb.427:                              ;   in Loop: Header=BB0_426 Depth=5
	global_load_b32 v3, v[48:49], off glc
.LBB0_428:                              ;   in Loop: Header=BB0_426 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_and_not1_b32 s2, s5, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s2, s5
	s_cmp_lg_u32 s20, 0x10100
	s_cbranch_scc0 .LBB0_435
; %bb.429:                              ;   in Loop: Header=BB0_426 Depth=5
	v_mov_b32_e32 v3, s3
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_433
; %bb.430:                              ;   in Loop: Header=BB0_426 Depth=5
	s_add_i32 s2, s20, 0xffffff00
	v_mov_b32_e32 v6, v5
	s_lshr_b32 s2, s2, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	v_mad_u64_u32 v[11:12], null, s2, 24, v[3:4]
	v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s2, 0, v[3:4]
	v_mov_b32_e32 v3, s3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB0_432
; %bb.431:                              ;   in Loop: Header=BB0_426 Depth=5
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[48:49], v68, off
	v_mov_b32_e32 v3, 0
.LBB0_432:                              ; %Flow1278
                                        ;   in Loop: Header=BB0_426 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_433:                              ;   in Loop: Header=BB0_426 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc1 .LBB0_436
; %bb.434:                              ;   in Loop: Header=BB0_426 Depth=5
	s_mov_b32 s6, 0
	s_and_not1_b32 vcc_lo, vcc_lo, exec_lo
	s_sleep 2
                                        ; implicit-def: $sgpr3
	s_branch .LBB0_437
.LBB0_435:                              ;   in Loop: Header=BB0_426 Depth=5
	s_mov_b32 s16, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $sgpr7
	s_branch .LBB0_438
.LBB0_436:                              ;   in Loop: Header=BB0_426 Depth=5
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr2
.LBB0_437:                              ; %Flow1282
                                        ;   in Loop: Header=BB0_426 Depth=5
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s17, vcc_lo, exec_lo
	s_mov_b32 s7, 0
	s_mov_b32 s16, 0
	s_or_b32 s5, s5, s17
.LBB0_438:                              ; %Flow1281
                                        ;   in Loop: Header=BB0_426 Depth=5
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_442
; %bb.439:                              ;   in Loop: Header=BB0_426 Depth=5
	s_mov_b32 s3, s2
	s_branch .LBB0_426
.LBB0_440:                              ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v31, v4 :: v_dual_mov_b32 v30, v3
	s_branch .LBB0_502
.LBB0_441:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s5, -1
                                        ; implicit-def: $sgpr18
	s_branch .LBB0_494
.LBB0_442:                              ; %loop.exit.guard925
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_472
; %bb.443:                              ;   in Loop: Header=BB0_378 Depth=4
	s_and_saveexec_b32 s35, s5
	s_cbranch_execz .LBB0_471
; %bb.444:                              ;   in Loop: Header=BB0_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_450
; %bb.445:                              ;   in Loop: Header=BB0_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB0_449
; %bb.446:                              ; %.preheader3.i.i.i82.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_447:                              ; %.preheader3.i.i.i82
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_447
; %bb.448:                              ; %Flow1273
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_449:                              ; %Flow1275
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_450:                              ; %.loopexit4.i.i.i77
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s36, s7, 24
	s_mul_hi_u32 s37, s6, 24
	s_mul_i32 s38, s6, 24
	s_and_saveexec_b32 s39, s2
	s_cbranch_execz .LBB0_452
; %bb.451:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s37, s36
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s38
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_452:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s39
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, s19
	v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[23:26], off offset:8
	global_store_b128 v[3:4], v[23:26], off offset:24
	global_store_b128 v[3:4], v[23:26], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_460
; %bb.453:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s20 :: v_dual_mov_b32 v81, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB0_456
; %bb.454:                              ; %.preheader1.i.i.i80.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_455:                              ; %.preheader1.i.i.i80
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[25:26]
	v_dual_mov_b32 v26, v12 :: v_dual_mov_b32 v25, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_455
.LBB0_456:                              ; %Flow1271
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_458
; %bb.457:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB0_458:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB0_460
; %bb.459:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_460:                              ; %Flow1272
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s37, s37, s36
	v_add_co_u32 v3, vcc_lo, v21, s38
	v_add_co_ci_u32_e32 v4, vcc_lo, s37, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_461:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_463
; %bb.462:                              ;   in Loop: Header=BB0_461 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_463:                              ;   in Loop: Header=BB0_461 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_465
; %bb.464:                              ;   in Loop: Header=BB0_461 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_466
.LBB0_465:                              ;   in Loop: Header=BB0_461 Depth=5
	s_mov_b32 s5, -1
.LBB0_466:                              ; %Flow1266
                                        ;   in Loop: Header=BB0_461 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_461
; %bb.467:                              ;   in Loop: Header=BB0_378 Depth=4
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_471
; %bb.468:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v23, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v24, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v22, v19, v21 :: v_dual_cndmask_b32 v21, v18, v6
	v_and_b32_e32 v4, v22, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v21, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_471
; %bb.469:                              ; %.preheader.i.i.i79.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s2, 0
.LBB0_470:                              ; %.preheader.i.i.i79
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[3:4], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_470
.LBB0_471:                              ; %Flow1276
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s35
	s_mov_b32 s7, s3
.LBB0_472:                              ; %Flow1277
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s3, s7
.LBB0_473:                              ; %Flow1287
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s16, s3
.LBB0_474:                              ; %__ockl_devmem_request.exit83
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s16, 0
	s_cselect_b32 s5, -1, 0
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_493
; %bb.475:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s17, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_492
; %bb.476:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[3:4], v[50:51], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x7530, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_492
; %bb.477:                              ;   in Loop: Header=BB0_378 Depth=4
	v_sub_nc_u32_e32 v3, 0x7530, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB0_478:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x659
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_481
; %bb.479:                              ; %.preheader11.i
                                        ;   in Loop: Header=BB0_478 Depth=5
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB0_478
.LBB0_480:                              ; %.preheader9.i
                                        ;   in Loop: Header=BB0_481 Depth=5
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_481:                              ; %Flow1257
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x326
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB0_480
; %bb.482:                              ; %Flow1254
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_485
.LBB0_483:                              ; %.preheader7.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_483
	s_branch .LBB0_485
.LBB0_484:                              ; %.preheader5.i
                                        ;   in Loop: Header=BB0_485 Depth=5
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_485:                              ; %.loopexit8.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0xc0
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB0_484
	s_branch .LBB0_487
.LBB0_486:                              ; %.preheader3.i
                                        ;   in Loop: Header=BB0_487 Depth=5
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_487:                              ; %Flow1248
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x59
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB0_486
	s_branch .LBB0_489
.LBB0_488:                              ; %.preheader1.i
                                        ;   in Loop: Header=BB0_489 Depth=5
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_489:                              ; %Flow1245
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 38
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB0_488
; %bb.490:                              ; %Flow1242
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_492
.LBB0_491:                              ; %.preheader.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_491
.LBB0_492:                              ; %__ockl_rtcwait_u32.exit
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	s_cmp_lg_u32 s16, 2
	v_mov_b32_e32 v31, s4
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v30, 0, 1, s2
.LBB0_493:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s18, 0
.LBB0_494:                              ; %Flow1309
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_502
; %bb.495:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_499
; %bb.496:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[23:24], v[52:53], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v23
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_u64_e32 vcc_lo, 0x4e1f, v[3:4]
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_498
; %bb.497:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v21, s2 :: v_dual_mov_b32 v22, s3
	global_atomic_cmpswap_b64 v[3:4], v[52:53], v[21:24], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[3:4], v[23:24]
	v_mov_b32_e32 v4, s4
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
.LBB0_498:                              ; %Flow1236
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_499:                              ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_readfirstlane_b32 s2, v3
	v_readfirstlane_b32 s3, v4
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u64 s[2:3], 0
	s_cbranch_scc0 .LBB0_503
; %bb.500:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s2
.LBB0_501:                              ; %Flow1235
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v31, v16 :: v_dual_mov_b32 v30, v15
.LBB0_502:                              ; %Flow1312
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_xor_b32 s1, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_378
	s_branch .LBB0_618
.LBB0_503:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v15 :: v_dual_mov_b32 v4, v16
	s_and_saveexec_b32 s18, s1
	s_cbranch_execz .LBB0_539
; %bb.504:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[3:4], v5, s[12:13] glc
	global_load_b64 v[11:12], v5, s[14:15]
	s_waitcnt vmcnt(0)
	v_cmp_ge_u64_e32 vcc_lo, v[3:4], v[11:12]
	s_cbranch_vccnz .LBB0_508
; %bb.505:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s2, exec_lo
	s_mov_b32 s1, exec_lo
	v_mbcnt_lo_u32_b32 v6, s2, 0
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB0_507
; %bb.506:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s2, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s2, s2, 21
	v_mov_b32_e32 v4, s2
	global_atomic_add_u64 v[3:4], v5, v[4:5], s[12:13] glc
.LBB0_507:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s3, v4
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x200000, v6, s[2:3]
	v_cmp_ge_u64_e64 s1, v[3:4], v[11:12]
	s_branch .LBB0_509
.LBB0_508:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr3_vgpr4
.LBB0_509:                              ; %Flow1233
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s19, s1
	s_cbranch_execz .LBB0_538
; %bb.510:                              ;   in Loop: Header=BB0_378 Depth=4
	s_load_b64 s[2:3], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s1, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s1, s1, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_516
; %bb.511:                              ;   in Loop: Header=BB0_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[2:3] offset:40
	global_load_b64 v[18:19], v5, s[2:3]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v18, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB0_515
; %bb.512:                              ; %.preheader3.i.i.i89.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_513:                              ; %.preheader3.i.i.i89
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[2:3] offset:40
	global_load_b64 v[21:22], v5, s[2:3]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, v18, v23
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v12 :: v_dual_and_b32 v6, v19, v24
	v_mad_u64_u32 v[18:19], null, v6, 24, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v12, v18
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_513
; %bb.514:                              ; %Flow1229
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_515:                              ; %Flow1231
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_516:                              ; %.loopexit4.i.i.i84
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[2:3] offset:40
	global_load_b128 v[22:25], v5, s[2:3]
	v_readfirstlane_b32 s16, v11
	v_readfirstlane_b32 s17, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v18
	v_readfirstlane_b32 s7, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[16:17], s[6:7]
	s_mul_i32 s20, s7, 24
	s_mul_hi_u32 s21, s6, 24
	s_mul_i32 s35, s6, 24
	s_and_saveexec_b32 s36, s1
	s_cbranch_execz .LBB0_518
; %bb.517:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s21, s20
	s_waitcnt vmcnt(0)
	v_add_co_u32 v18, vcc_lo, v22, s35
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v23, vcc_lo
	global_store_b128 v[18:19], v[11:14], off offset:8
.LBB0_518:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s36
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v24, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v25, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v27, s7
	v_dual_mov_b32 v19, v5 :: v_dual_mov_b32 v26, s6
	v_dual_mov_b32 v21, v5 :: v_dual_mov_b32 v24, s4
	v_mov_b32_e32 v25, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[18:21], off
	global_store_b128 v[11:12], v[24:27], off offset:16
	global_store_b128 v[11:12], v[24:27], off offset:32
	global_store_b128 v[11:12], v[24:27], off offset:48
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_526
; %bb.519:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[2:3] offset:32 glc
	global_load_b64 v[3:4], v5, s[2:3] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s16 :: v_dual_mov_b32 v81, s17
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s17, v4
	v_and_b32_e32 v3, s16, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v22, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v23, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[26:27], v5, v[80:83], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[26:27], v[82:83]
	s_cbranch_execz .LBB0_522
; %bb.520:                              ; %.preheader1.i.i.i87.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_521:                              ; %.preheader1.i.i.i87
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v24, s16 :: v_dual_mov_b32 v25, s17
	s_sleep 1
	global_store_b64 v[3:4], v[26:27], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[24:27], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[26:27]
	v_dual_mov_b32 v27, v19 :: v_dual_mov_b32 v26, v18
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_521
.LBB0_522:                              ; %Flow1227
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[18:19], v5, s[2:3] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_524
; %bb.523:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[18:19], v[4:5], off offset:8
.LBB0_524:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[24:25], v[18:19], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[24:25]
	s_cbranch_vccnz .LBB0_526
; %bb.525:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v4, v[18:19], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[24:25], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_526:                              ; %Flow1228
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s21, s21, s20
	v_add_co_u32 v3, vcc_lo, v22, s35
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_527:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_529
; %bb.528:                              ;   in Loop: Header=BB0_527 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_529:                              ;   in Loop: Header=BB0_527 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_531
; %bb.530:                              ;   in Loop: Header=BB0_527 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_532
.LBB0_531:                              ;   in Loop: Header=BB0_527 Depth=5
	s_mov_b32 s5, -1
.LBB0_532:                              ; %Flow1222
                                        ;   in Loop: Header=BB0_527 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_527
; %bb.533:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_537
; %bb.534:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[2:3] offset:40
	global_load_b64 v[18:19], v5, s[2:3] offset:24 glc
	global_load_b64 v[23:24], v5, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v21, vcc_lo, v6, s16
	v_add_co_ci_u32_e32 v22, vcc_lo, s17, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_cndmask_b32 v22, v22, v25 :: v_dual_cndmask_b32 v21, v21, v6
	v_and_b32_e32 v6, v22, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v21, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, v23, v11
	v_mov_b32_e32 v23, v18
	v_add_co_ci_u32_e32 v12, vcc_lo, v24, v6, vcc_lo
	v_mov_b32_e32 v24, v19
	global_store_b64 v[11:12], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[18:19]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_537
; %bb.535:                              ; %.preheader.i.i.i86.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s1, 0
.LBB0_536:                              ; %.preheader.i.i.i86
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[11:12], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[23:24]
	v_dual_mov_b32 v24, v19 :: v_dual_mov_b32 v23, v18
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_536
.LBB0_537:                              ; %Flow1220
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_538:                              ; %Flow1234
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s19
.LBB0_539:                              ; %__ockl_devmem_request.exit90
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s18
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v3
	v_readfirstlane_b32 s3, v4
	s_cmp_eq_u64 s[2:3], 0
	s_cbranch_scc1 .LBB0_584
; %bb.540:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mbcnt_lo_u32_b32 v4, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b32 v6, v[38:39], off
	s_bcnt1_i32_b32 s5, exec_lo
	s_add_u32 s6, s2, 16
	s_addc_u32 s7, s3, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshrrev_b32_e32 v3, 5, v3
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s16, exec_lo, s1
	s_cbranch_execz .LBB0_548
; %bb.541:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v15, v[54:55], off
	s_mov_b32 s17, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB0_544
; %bb.542:                              ; %.preheader182.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s18, s5, 2
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB0_543:                              ; %.preheader182
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_add_nc_u32_e32 v16, s5, v16
	global_store_b32 v[11:12], v5, off
	v_add_co_u32 v11, s1, v11, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s1, 0, v12, s1
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s19, vcc_lo, s19
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB0_543
.LBB0_544:                              ; %Flow1209
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	global_load_b32 v16, v[64:65], off
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v15, v4, v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v11, v6
	s_cbranch_execz .LBB0_547
; %bb.545:                              ; %.preheader180.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_mul_lo_u32 v12, v15, s5
	s_mov_b32 s17, 0
.LBB0_546:                              ; %.preheader180
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_lshlrev_b32_e64 v15, v11, 1
	v_lshrrev_b32_e32 v16, 3, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v11, v12
	v_and_b32_e32 v16, 0x1ffffffc, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v11, v6
	global_store_b32 v16, v15, s[6:7]
	s_or_b32 s17, vcc_lo, s17
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB0_546
.LBB0_547:                              ; %Flow1206
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_548:                              ; %Flow1214
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_and_not1_saveexec_b32 s16, s16
	s_cbranch_execz .LBB0_553
; %bb.549:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s17, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB0_552
; %bb.550:                              ; %.preheader178.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v15, v[66:67], off
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s18, s5, 2
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB0_551:                              ; %.preheader178
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_add_nc_u32_e32 v16, s5, v16
	s_waitcnt vmcnt(0)
	global_store_b32 v[11:12], v15, off
	v_add_co_u32 v11, s1, v11, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s1, 0, v12, s1
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s19, vcc_lo, s19
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB0_551
.LBB0_552:                              ; %Flow1212
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
.LBB0_553:                              ; %.loopexit179
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s16
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_557
; %bb.554:                              ;   in Loop: Header=BB0_378 Depth=4
	v_and_b32_e32 v6, 31, v6
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v6
	s_cbranch_execz .LBB0_556
; %bb.555:                              ;   in Loop: Header=BB0_378 Depth=4
	v_add_nc_u32_e32 v4, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v11, v[3:4], off
	s_waitcnt vmcnt(0)
	v_lshl_or_b32 v6, -1, v6, v11
	global_store_b32 v[3:4], v6, off
.LBB0_556:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	global_store_b128 v5, v[7:10], s[2:3]
.LBB0_557:                              ; %Flow1203
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $sgpr5
.LBB0_558:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s1, 0, v71
	v_mov_b32_e32 v3, s31
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_560
; %bb.559:                              ;   in Loop: Header=BB0_558 Depth=5
	global_load_b32 v3, v[32:33], off glc
.LBB0_560:                              ;   in Loop: Header=BB0_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s31, v3
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s6, s1, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s5, s6
	s_cmp_eq_u32 s31, 0x10100
	s_cbranch_scc1 .LBB0_567
; %bb.561:                              ;   in Loop: Header=BB0_558 Depth=5
	v_mov_b32_e32 v3, s34
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_563
; %bb.562:                              ;   in Loop: Header=BB0_558 Depth=5
	global_load_b32 v3, v[48:49], off glc
.LBB0_563:                              ;   in Loop: Header=BB0_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s34, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u32 s31, s34
	s_cbranch_scc0 .LBB0_568
; %bb.564:                              ;   in Loop: Header=BB0_558 Depth=5
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_575
; %bb.565:                              ;   in Loop: Header=BB0_558 Depth=5
	s_cmpk_lt_u32 s31, 0x100
	s_cbranch_scc0 .LBB0_569
; %bb.566:                              ;   in Loop: Header=BB0_558 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_mov_b32 s7, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s31, 24, v[3:4]
	s_branch .LBB0_570
.LBB0_567:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b64 s[16:17], 0
	s_mov_b32 s1, -1
	s_mov_b32 s18, 0
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB0_580
.LBB0_568:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s18, -1
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB0_579
.LBB0_569:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_570:                              ; %Flow1195
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB0_572
; %bb.571:                              ;   in Loop: Header=BB0_558 Depth=5
	s_add_i32 s7, s31, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s7, s7, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
	s_and_b32 s7, s31, 0xff
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
.LBB0_572:                              ;   in Loop: Header=BB0_558 Depth=5
	v_dual_mov_b32 v15, s31 :: v_dual_mov_b32 v4, s3
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v6, v5
	global_store_b32 v5, v15, s[2:3] offset:4
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off offset:8 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB0_574
; %bb.573:                              ;   in Loop: Header=BB0_558 Depth=5
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[32:33], v118, off
	v_dual_mov_b32 v3, v11 :: v_dual_mov_b32 v4, v12
.LBB0_574:                              ; %Flow1193
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_575:                              ; %Flow1196
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v4
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB0_577
; %bb.576:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
	s_branch .LBB0_578
.LBB0_577:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s19, 0
	s_and_not1_b32 s1, s1, exec_lo
	s_sleep 2
.LBB0_578:                              ; %Flow1201
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s18, 0
.LBB0_579:                              ; %Flow1200
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s16, s1, exec_lo
	s_mov_b32 s1, 0
	s_or_b32 s5, s5, s16
                                        ; implicit-def: $sgpr16_sgpr17
.LBB0_580:                              ; %Flow1199
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_558
; %bb.581:                              ; %loop.exit.guard930
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v15, s16 :: v_dual_mov_b32 v16, s17
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_501
; %bb.582:                              ; %loop.exit.guard931
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_xor_b32 s1, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_585
; %bb.583:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s18, 0
	s_branch .LBB0_586
.LBB0_584:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s18, 0
	s_branch .LBB0_501
.LBB0_585:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s18, -1
                                        ; implicit-def: $sgpr6_sgpr7
.LBB0_586:                              ; %Flow1190
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_501
; %bb.587:                              ;   in Loop: Header=BB0_378 Depth=4
	s_and_saveexec_b32 s20, s5
	s_cbranch_execz .LBB0_616
; %bb.588:                              ;   in Loop: Header=BB0_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s1, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s1, s1, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_594
; %bb.589:                              ;   in Loop: Header=BB0_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB0_593
; %bb.590:                              ; %.preheader3.i.i.i96.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_591:                              ; %.preheader3.i.i.i96
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_591
; %bb.592:                              ; %Flow1186
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_593:                              ; %Flow1188
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_594:                              ; %.loopexit4.i.i.i91
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s21, s7, 24
	s_mul_hi_u32 s31, s6, 24
	s_mul_i32 s34, s6, 24
	s_and_saveexec_b32 s35, s1
	s_cbranch_execz .LBB0_596
; %bb.595:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s31, s21
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s34
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_596:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s35
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v11, s2
	v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[23:26], off offset:8
	global_store_b128 v[3:4], v[23:26], off offset:24
	global_store_b128 v[3:4], v[23:26], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_604
; %bb.597:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s3, exec_lo
	v_dual_mov_b32 v80, s18 :: v_dual_mov_b32 v81, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB0_600
; %bb.598:                              ; %.preheader1.i.i.i94.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s5, 0
.LBB0_599:                              ; %.preheader1.i.i.i94
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s19
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[25:26]
	v_dual_mov_b32 v26, v12 :: v_dual_mov_b32 v25, v11
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_599
.LBB0_600:                              ; %Flow1184
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s5, exec_lo
	s_mov_b32 s3, exec_lo
	v_mbcnt_lo_u32_b32 v3, s5, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_602
; %bb.601:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s5, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s5
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB0_602:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB0_604
; %bb.603:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s3, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s3, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_604:                              ; %Flow1185
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s31, s31, s21
	v_add_co_u32 v3, vcc_lo, v21, s34
	v_add_co_ci_u32_e32 v4, vcc_lo, s31, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_605:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_607
; %bb.606:                              ;   in Loop: Header=BB0_605 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_607:                              ;   in Loop: Header=BB0_605 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s2, v6
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc1 .LBB0_609
; %bb.608:                              ;   in Loop: Header=BB0_605 Depth=5
	s_mov_b32 s2, 0
	s_sleep 1
	s_branch .LBB0_610
.LBB0_609:                              ;   in Loop: Header=BB0_605 Depth=5
	s_mov_b32 s2, -1
.LBB0_610:                              ; %Flow1179
                                        ;   in Loop: Header=BB0_605 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_605
; %bb.611:                              ;   in Loop: Header=BB0_378 Depth=4
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_615
; %bb.612:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v23, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v21, vcc_lo
	v_mov_b32_e32 v24, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v22, v19, v21 :: v_dual_cndmask_b32 v21, v18, v6
	v_and_b32_e32 v4, v22, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v21, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_615
; %bb.613:                              ; %.preheader.i.i.i93.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s1, 0
.LBB0_614:                              ; %.preheader.i.i.i93
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[3:4], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_614
.LBB0_615:                              ; %Flow1177
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v71, 0
.LBB0_616:                              ; %Flow1189
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s20
	v_dual_mov_b32 v15, v30 :: v_dual_mov_b32 v16, v31
	s_mov_b32 s18, -1
	s_branch .LBB0_501
.LBB0_617:                              ;   in Loop: Header=BB0_347 Depth=3
                                        ; implicit-def: $vgpr28_vgpr29
                                        ; implicit-def: $sgpr29
                                        ; implicit-def: $vgpr70
	s_branch .LBB0_641
.LBB0_618:                              ;   in Loop: Header=BB0_347 Depth=3
	v_cmp_ne_u64_e64 s5, 1, v[30:31]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_620
; %bb.619:                              ;   in Loop: Header=BB0_347 Depth=3
	v_dual_mov_b32 v28, v30 :: v_dual_mov_b32 v29, v31
	s_branch .LBB0_640
.LBB0_620:                              ;   in Loop: Header=BB0_347 Depth=3
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_637
; %bb.621:                              ;   in Loop: Header=BB0_347 Depth=3
	global_load_b64 v[3:4], v[52:53], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x4e20, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_637
; %bb.622:                              ;   in Loop: Header=BB0_347 Depth=3
	v_sub_nc_u32_e32 v3, 0x4e20, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB0_623:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x659
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_626
; %bb.624:                              ; %.preheader11.i110
                                        ;   in Loop: Header=BB0_623 Depth=4
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB0_623
.LBB0_625:                              ; %.preheader9.i109
                                        ;   in Loop: Header=BB0_626 Depth=4
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_626:                              ; %Flow1171
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x326
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_625
; %bb.627:                              ; %Flow1168
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_add_u32 s16, s6, 0x18c
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_630
.LBB0_628:                              ; %.preheader7.i108
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x18c
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_628
	s_branch .LBB0_630
.LBB0_629:                              ; %.preheader5.i107
                                        ;   in Loop: Header=BB0_630 Depth=4
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_630:                              ; %.loopexit8.i100
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0xc0
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_629
	s_branch .LBB0_632
.LBB0_631:                              ; %.preheader3.i106
                                        ;   in Loop: Header=BB0_632 Depth=4
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_632:                              ; %Flow1162
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x59
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_631
	s_branch .LBB0_634
.LBB0_633:                              ; %.preheader1.i105
                                        ;   in Loop: Header=BB0_634 Depth=4
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_634:                              ; %Flow1159
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 38
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_633
; %bb.635:                              ; %Flow1156
                                        ;   in Loop: Header=BB0_347 Depth=3
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_637
.LBB0_636:                              ; %.preheader.i104
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_636
.LBB0_637:                              ; %__ockl_rtcwait_u32.exit111
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, s29
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v70
	s_cbranch_execz .LBB0_639
; %bb.638:                              ;   in Loop: Header=BB0_347 Depth=3
	global_load_b32 v3, v[32:33], off glc
.LBB0_639:                              ;   in Loop: Header=BB0_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s29, v3
.LBB0_640:                              ; %Flow1173
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v11, v28 :: v_dual_mov_b32 v12, v29
.LBB0_641:                              ; %Flow1318
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_347
.LBB0_642:                              ; %.loopexit189
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_eq_u64 s[6:7], 0
	s_cbranch_scc1 .LBB0_663
; %bb.643:                              ;   in Loop: Header=BB0_6 Depth=2
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mbcnt_lo_u32_b32 v3, s5, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b64 v[0:1], v5, s[6:7] offset:8 glc
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_waitcnt vmcnt(0)
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_647
; %bb.644:                              ;   in Loop: Header=BB0_6 Depth=2
	s_mov_b32 s17, exec_lo
	s_bcnt1_i32_b32 s5, s5
	v_mbcnt_lo_u32_b32 v4, s17, 0
	s_mov_b32 s16, exec_lo
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_646
; %bb.645:                              ;   in Loop: Header=BB0_6 Depth=2
	s_bcnt1_i32_b32 s1, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s1, s5, s1
	v_mov_b32_e32 v6, s1
	global_atomic_add_u32 v6, v[0:1], v6, off offset:8 glc
.LBB0_646:                              ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s16
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s1, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u32_u24 v4, s5, v4, s1
.LBB0_647:                              ; %Flow944
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_mov_b32 s3, s4
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+4
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+12
	s_lshl_b64 s[16:17], s[2:3], 5
	v_mov_b32_e32 v11, 0
	s_add_u32 s18, s16, s18
	s_addc_u32 s19, s17, s19
	v_readfirstlane_b32 s1, v4
	s_load_b32 s5, s[18:19], 0x0
	v_mov_b32_e32 v12, 0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s3, s5, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s3, 32
	s_cbranch_scc1 .LBB0_657
; %bb.648:                              ;   in Loop: Header=BB0_6 Depth=2
	v_cvt_f32_u32_e32 v4, s5
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+32
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+40
	s_lshr_b32 s3, s3, 5
	s_add_u32 s18, s16, s18
	s_addc_u32 s19, s17, s19
	v_rcp_iflag_f32_e32 v4, v4
	s_load_b32 s18, s[18:19], 0x0
	s_sub_i32 s19, 0, s5
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v4, 0x4f7ffffe, v4 :: v_dual_add_nc_u32 v3, s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v4
	v_mul_lo_u32 v6, s19, v4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_lo_u32 v3, s18, v3
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+16
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+24
	s_add_u32 s16, s16, s18
	s_addc_u32 s17, s17, s19
	s_lshr_b32 s18, s2, 1
	s_add_i32 s19, s3, -1
	s_add_i32 s18, s18, 4
	v_mul_hi_u32 v6, v4, v6
	s_lshl_b32 s18, 1, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v6
	v_cvt_f32_u32_e32 v6, s3
	v_mul_hi_u32 v4, v3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v6, v6
	v_mul_lo_u32 v4, v4, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v3, v3, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v6
	v_subrev_nc_u32_e32 v6, s5, v3
	v_cmp_le_u32_e64 s1, s5, v3
	v_cvt_u32_f32_e32 v15, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v4, v3, v6, s1
	s_sub_i32 s1, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v11, s1, v15
	v_add_co_u32 v3, s1, v0, 16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v6, s1, 0, v1, s1
	v_subrev_nc_u32_e32 v12, s5, v4
	v_cmp_le_u32_e64 s1, s5, v4
	s_mov_b32 s5, 0
	v_mul_hi_u32 v16, v15, v11
	v_cndmask_b32_e64 v4, v4, v12, s1
	v_mov_b32_e32 v11, 0
	s_bfe_i32 s1, s2, 0x10000
	s_lshr_b32 s2, s18, 1
	v_mov_b32_e32 v12, 0
	v_lshrrev_b32_e32 v4, 5, v4
	v_add_nc_u32_e32 v18, v15, v16
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s18, s1, s18
.LBB0_649:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], 2, v[4:5]
	s_mov_b32 s2, -1
	s_mov_b32 s20, exec_lo
                                        ; implicit-def: $vgpr19
	v_add_co_u32 v15, s1, v3, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v16, s1, v6, v16, s1
	global_load_b32 v21, v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v21
	s_cbranch_execz .LBB0_653
; %bb.650:                              ;   in Loop: Header=BB0_649 Depth=3
	v_not_b32_e32 v19, v21
	s_mov_b32 s21, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ctz_i32_b32_e32 v19, v19
	v_min_u32_e32 v21, 32, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e64 v19, v21, 1
	global_atomic_or_b32 v15, v[15:16], v19, off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v15, v15, v19
	v_mov_b32_e32 v19, 0
	v_cmp_ne_u32_e64 s1, 0, v15
	v_cmpx_eq_u32_e32 0, v15
	s_cbranch_execz .LBB0_652
; %bb.651:                              ;   in Loop: Header=BB0_649 Depth=3
	s_load_b32 s2, s[16:17], 0x0
	v_lshl_add_u32 v11, v4, 5, v21
	v_mov_b32_e32 v19, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, v11, s18
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v12, s2, v0, s2
	v_add_co_ci_u32_e64 v15, s2, 0, v1, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v11, s2, v12, v11
	v_add_co_ci_u32_e64 v12, s2, 0, v15, s2
.LBB0_652:                              ;   in Loop: Header=BB0_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s21
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_not1_b32 s2, s1, exec_lo
.LBB0_653:                              ; %Flow941
                                        ;   in Loop: Header=BB0_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s20
	s_and_saveexec_b32 s20, s2
; %bb.654:                              ;   in Loop: Header=BB0_649 Depth=3
	v_dual_mov_b32 v19, 0 :: v_dual_add_nc_u32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v15, v4, v18
	v_mul_lo_u32 v15, v15, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v4, v15
	v_subrev_nc_u32_e32 v15, s3, v4
	v_cmp_le_u32_e64 s1, s3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v15, s1
	v_subrev_nc_u32_e32 v15, s3, v4
	v_cmp_le_u32_e64 s1, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v15, s1
; %bb.655:                              ;   in Loop: Header=BB0_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s20
	v_cmp_ne_u32_e64 s1, 0, v19
	s_cmp_eq_u32 s19, 0
	s_cselect_b32 s2, -1, 0
	s_add_i32 s19, s19, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s1, s2
	s_and_b32 s1, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s1, s5
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_649
; %bb.656:                              ; %Flow942
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_657:                              ; %.loopexit193
                                        ;   in Loop: Header=BB0_6 Depth=2
	v_cmp_ne_u64_e64 s1, 0, v[11:12]
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_660
; %bb.658:                              ;   in Loop: Header=BB0_6 Depth=2
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s3, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s5, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s5
	s_cbranch_execz .LBB0_660
; %bb.659:                              ;   in Loop: Header=BB0_6 Depth=2
	s_bcnt1_i32_b32 s1, s1
	s_bcnt1_i32_b32 s3, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s1, s1, s3
	v_mov_b32_e32 v0, s1
	global_atomic_add_u32 v5, v0, s[6:7] offset:16
.LBB0_660:                              ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u64_e32 0, v[11:12]
; %bb.661:                              ;   in Loop: Header=BB0_6 Depth=2
	v_dual_mov_b32 v0, v11 :: v_dual_mov_b32 v119, 0
	v_dual_mov_b32 v128, 0 :: v_dual_mov_b32 v1, v12
; %bb.662:                              ; %Flow
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v128 :: v_dual_mov_b32 v4, v119
.LBB0_663:                              ; %Flow945
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v119, v4
.LBB0_664:                              ; %Flow1324
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s28
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v3
	;;#ASMSTART
	;;#ASMEND
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	s_cbranch_vccnz .LBB0_6
.LBB0_665:                              ; %Flow1326
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s27
	v_mov_b32_e32 v3, v119
.LBB0_666:                              ; %.loopexit197
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v3
	;;#ASMSTART
	;;#ASMEND
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	s_cbranch_vccnz .LBB0_3
; %bb.667:                              ; %Flow1328
                                        ; implicit-def: $vgpr4_vgpr5
.LBB0_668:                              ; %Flow1347
	s_and_not1_saveexec_b32 s1, s23
	s_cbranch_execz .LBB0_701
; %bb.669:
	s_load_b64 s[2:3], s[8:9], 0x50
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v2
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB0_675
; %bb.670:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v3, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v3, s[2:3] offset:40
	global_load_b64 v[6:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v0, v0, v8
	v_and_b32_e32 v1, v1, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v0, 24
	v_mul_lo_u32 v1, v1, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v10, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo
	global_load_b64 v[6:7], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v3, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[0:1], v[8:9]
	s_cbranch_execz .LBB0_674
; %bb.671:                              ; %.preheader3.i.i.i.preheader
	s_mov_b32 s6, 0
.LBB0_672:                              ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v3, s[2:3] offset:40
	global_load_b64 v[10:11], v3, s[2:3]
	v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v8
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v6, 24, v[10:11]
	v_and_b32_e32 v10, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v10, 24, v[1:2]
	v_mov_b32_e32 v1, v6
	global_load_b64 v[6:7], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v3, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_672
; %bb.673:                              ; %Flow1343
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_674:                              ; %Flow1345
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_675:                              ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v0
	v_readfirstlane_b32 s5, v1
	s_mov_b32 s13, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[2:3] offset:40
	global_load_b128 v[6:9], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v10
	v_readfirstlane_b32 s7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s10, s7, 24
	s_mul_hi_u32 s11, s6, 24
	s_mul_i32 s12, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB0_677
; %bb.676:
	v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v11, v3
	s_add_i32 s13, s11, s10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s12
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v7, vcc_lo
	v_dual_mov_b32 v12, 3 :: v_dual_mov_b32 v13, 1
	global_store_b128 v[0:1], v[10:13], off offset:8
.LBB0_677:
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[0:1], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v8, s6
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v0
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_add_co_ci_u32_e32 v9, vcc_lo, v9, v1, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v13, s19
	v_dual_mov_b32 v11, s17 :: v_dual_mov_b32 v12, s18
	s_clause 0x3
	global_store_b128 v[8:9], v[2:5], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_685
; %bb.678:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v4, vcc_lo, v6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v7, v1, vcc_lo
	global_store_b64 v[4:5], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB0_681
; %bb.679:                              ; %.preheader1.i.i.i.preheader
	s_mov_b32 s13, 0
.LBB0_680:                              ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_680
.LBB0_681:                              ; %Flow1341
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s13, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_683
; %bb.682:
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB0_683:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_685
; %bb.684:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_685:                              ; %Flow1342
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s11, s11, s10
	v_add_co_u32 v0, vcc_lo, v6, s12
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_686:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_688
; %bb.687:                              ;   in Loop: Header=BB0_686 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_688:                              ;   in Loop: Header=BB0_686 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB0_690
; %bb.689:                              ;   in Loop: Header=BB0_686 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB0_691
.LBB0_690:                              ;   in Loop: Header=BB0_686 Depth=1
	s_mov_b32 s6, -1
.LBB0_691:                              ; %Flow1336
                                        ;   in Loop: Header=BB0_686 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_686
; %bb.692:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_696
; %bb.693:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_696
; %bb.694:                              ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB0_695:                              ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_695
.LBB0_696:                              ; %__ockl_devmem_request.exit
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execz .LBB0_700
; %bb.697:
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v2, s2, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_b32 s3, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s3
	s_cbranch_execz .LBB0_700
; %bb.698:
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v2, s3, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_b32 s4, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s4
	s_cbranch_execz .LBB0_700
; %bb.699:
	s_load_b64 s[4:5], s[8:9], 0x60
	s_bcnt1_i32_b32 s2, s2
	s_bcnt1_i32_b32 s3, s3
	v_mov_b32_e32 v4, 0x1a000
	s_mul_i32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, s2
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u64 v4, v[2:3], s[4:5] offset:2184
.LBB0_700:
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_701:                              ; %Flow1348
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_702:                              ; %.loopexit198
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s22
	v_readlane_b32 s30, v40, 11
	v_readlane_b32 s31, v40, 12
	v_readlane_b32 s44, v40, 10
	v_readlane_b32 s43, v40, 9
	v_readlane_b32 s42, v40, 8
	v_readlane_b32 s41, v40, 7
	v_readlane_b32 s40, v40, 6
	v_readlane_b32 s39, v40, 5
	v_readlane_b32 s38, v40, 4
	v_readlane_b32 s37, v40, 3
	v_readlane_b32 s36, v40, 2
	v_readlane_b32 s35, v40, 1
	v_readlane_b32 s34, v40, 0
	s_or_saveexec_b32 s0, -1
	scratch_load_b32 v40, off, s32          ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end0:
	.size	__ockl_dm_alloc, .Lfunc_end0-__ockl_dm_alloc
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 24288
; NumSgprs: 47
; NumVgprs: 136
; ScratchSize: 8
; MemoryBound: 1
	.text
	.p2align	2                               ; -- Begin function _Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_
	.type	_Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_,@function
_Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_: ; @_Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v20, 0 :: v_dual_mov_b32 v17, v1
	v_dual_mov_b32 v11, 0xa54ff53a :: v_dual_mov_b32 v18, 0
	v_dual_mov_b32 v16, v0 :: v_dual_mov_b32 v9, 0xbb67ae85
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v21, v20 :: v_dual_mov_b32 v8, 0x6a09e667
	v_dual_mov_b32 v10, 0x3c6ef372 :: v_dual_mov_b32 v19, 0
	v_mov_b32_e32 v12, 0x510e527f
	v_mov_b32_e32 v13, 0x9b05688c
	v_mov_b32_e32 v14, 0x1f83d9ab
	v_mov_b32_e32 v15, 0x5be0cd19
	s_mov_b32 s1, 0
	s_mov_b64 s[2:3], 0
	s_mov_b32 s4, exec_lo
	s_clause 0x3
	flat_store_b32 v[0:1], v20 offset:64
	flat_store_b64 v[0:1], v[20:21] offset:72
	flat_store_b128 v[0:1], v[8:11] offset:80
	flat_store_b128 v[0:1], v[12:15] offset:96
	v_cmpx_ne_u64_e32 0, v[4:5]
	s_cbranch_execz .LBB1_12
; %bb.1:                                ; %.lr.ph.i.preheader
	v_dual_mov_b32 v18, 0 :: v_dual_mov_b32 v21, 0
	v_dual_mov_b32 v19, 0 :: v_dual_mov_b32 v20, 0
	v_mov_b32_e32 v22, s32
	s_mov_b32 s5, 0
	s_mov_b32 s0, s1
.LBB1_2:                                ; %.lr.ph.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
                                        ;     Child Loop BB1_6 Depth 2
                                        ;     Child Loop BB1_8 Depth 2
	s_lshl_b64 s[2:3], s[2:3], 2
	s_mov_b32 s6, exec_lo
	v_add_co_u32 v8, vcc_lo, v2, s2
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v3, vcc_lo
	flat_load_b32 v10, v[8:9]
	v_lshlrev_b64 v[8:9], 2, v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, v1, v9, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[8:9], v10
	flat_load_b32 v8, v[0:1] offset:64
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v20, 1, v8
	flat_store_b32 v[0:1], v20 offset:64
	v_cmpx_eq_u32_e32 16, v20
	s_cbranch_execz .LBB1_10
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_dual_mov_b32 v8, v16 :: v_dual_mov_b32 v9, v17
	s_mov_b32 s2, 0
.LBB1_4:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_b32 v10, v[8:9]
	v_add_co_u32 v8, vcc_lo, v8, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_add_i32 s3, s2, s32
	s_add_i32 s2, s2, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, 64
	s_waitcnt vmcnt(0) lgkmcnt(0)
	scratch_store_b32 off, v10, s3
	s_cbranch_scc0 .LBB1_4
; %bb.5:                                ; %.lr.ph.preheader.i.i
                                        ;   in Loop: Header=BB1_2 Depth=1
	scratch_load_b32 v8, off, s32
	s_mov_b32 s2, 0
.LBB1_6:                                ; %.lr.ph.i.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_readfirstlane_b32 s3, v22
	s_delay_alu instid0(VALU_DEP_1)
	s_add_i32 s3, s3, s2
	s_add_i32 s2, s2, 4
	s_add_i32 s7, s3, 56
	s_add_i32 s9, s3, 4
	s_add_i32 s8, s3, 36
	s_clause 0x2
	scratch_load_b32 v9, off, s7
	scratch_load_b32 v10, off, s9
	scratch_load_b32 v11, off, s8
	s_add_i32 s3, s3, 64
	s_cmpk_lg_i32 s2, 0xc0
	s_waitcnt vmcnt(2)
	v_alignbit_b32 v12, v9, v9, 17
	v_alignbit_b32 v13, v9, v9, 19
	v_lshrrev_b32_e32 v9, 10, v9
	s_waitcnt vmcnt(1)
	v_alignbit_b32 v14, v10, v10, 7
	v_alignbit_b32 v15, v10, v10, 18
	v_lshrrev_b32_e32 v20, 3, v10
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v8, v11, v8
	v_xor3_b32 v9, v12, v13, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v11, v14, v15, v20
	v_add3_u32 v9, v8, v9, v11
	v_mov_b32_e32 v8, v10
	scratch_store_b32 off, v9, s3
	s_cbranch_scc1 .LBB1_6
; %bb.7:                                ; %._crit_edge.i.i
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x1
	flat_load_b128 v[12:15], v[0:1] offset:80
	flat_load_b128 v[8:11], v[0:1] offset:96
	s_mov_b32 s7, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@lo+4
	s_addc_u32 s3, s3, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@hi+12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v32, v12 :: v_dual_mov_b32 v27, v11
	v_dual_mov_b32 v20, v13 :: v_dual_mov_b32 v29, v10
	v_dual_mov_b32 v33, v9 :: v_dual_mov_b32 v30, v14
	v_mov_b32_e32 v31, v8
	v_mov_b32_e32 v23, v15
.LBB1_8:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_add_i32 s8, s7, s32
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v26, v31 :: v_dual_mov_b32 v25, v33
	scratch_load_b32 v34, off, s8
	s_load_b32 s8, s[2:3], 0x0
	v_dual_mov_b32 v35, v23 :: v_dual_mov_b32 v24, v29
	v_dual_mov_b32 v28, v20 :: v_dual_mov_b32 v23, v30
	v_mov_b32_e32 v20, v32
	v_alignbit_b32 v29, v26, v26, 6
	v_alignbit_b32 v30, v26, v26, 11
	v_alignbit_b32 v31, v26, v26, 25
	v_and_b32_e32 v32, v26, v25
	v_not_b32_e32 v33, v26
	v_xor_b32_e32 v38, v23, v28
	s_add_i32 s7, s7, 4
	v_xor3_b32 v29, v29, v30, v31
	v_add_nc_u32_e32 v27, v32, v27
	v_and_b32_e32 v30, v24, v33
	v_and_b32_e32 v32, v23, v28
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmpk_lg_i32 s7, 0x100
	v_add3_u32 v27, v27, v30, v29
	v_mov_b32_e32 v29, v25
	v_alignbit_b32 v36, v20, v20, 2
	v_alignbit_b32 v37, v20, v20, 13
	v_alignbit_b32 v31, v20, v20, 22
	v_dual_mov_b32 v30, v28 :: v_dual_and_b32 v33, v38, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v36, v36, v37, v31
	v_xor_b32_e32 v32, v33, v32
	v_mov_b32_e32 v33, v26
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add3_u32 v34, v27, s8, v34
	v_mov_b32_e32 v27, v24
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v31, v34, v35
	v_add3_u32 v32, v32, v36, v34
	s_cbranch_scc1 .LBB1_8
; %bb.9:                                ; %_Z22sha256_transform_wordsP12SHA256_CTX_WPj.exit.i
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_add_co_u32 v18, vcc_lo, 0x200, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v12, v32, v12
	v_dual_mov_b32 v20, 0 :: v_dual_add_nc_u32 v13, v20, v13
	v_add_nc_u32_e32 v14, v28, v14
	v_add_nc_u32_e32 v15, v23, v15
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v19, vcc_lo
	v_add_nc_u32_e32 v8, v31, v8
	v_add_nc_u32_e32 v9, v26, v9
	v_add_nc_u32_e32 v10, v25, v10
	v_add_nc_u32_e32 v11, v24, v11
	s_clause 0x3
	flat_store_b128 v[0:1], v[12:15] offset:80
	flat_store_b128 v[0:1], v[8:11] offset:96
	flat_store_b64 v[0:1], v[18:19] offset:72
	flat_store_b32 v[0:1], v21 offset:64
.LBB1_10:                               ; %Flow192
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u64_e32 vcc_lo, s[0:1], v[4:5]
	s_mov_b64 s[2:3], s[0:1]
	s_or_b32 s5, vcc_lo, s5
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_2
; %bb.11:                               ; %Flow193
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_12:                               ; %Flow194
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v21, 0
	v_bfrev_b32_e32 v4, 1
	s_mov_b32 s0, exec_lo
	v_lshlrev_b64 v[2:3], 2, v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, v1, v3, vcc_lo
	flat_store_b32 v[2:3], v4
	v_cmpx_lt_u32_e32 13, v20
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB1_23
; %bb.13:
	v_add_nc_u32_e32 v2, 1, v20
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 16, v2
	s_cbranch_execz .LBB1_16
; %bb.14:                               ; %.lr.ph.i24.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	v_add_co_u32 v4, vcc_lo, v0, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v1, v5, vcc_lo
.LBB1_15:                               ; %.lr.ph.i24
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v20, 1, v20
	flat_store_b32 v[4:5], v3
	v_add_co_u32 v4, s0, v4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
	v_cmp_lt_u32_e32 vcc_lo, 14, v20
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_15
.LBB1_16:                               ; %Flow188
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v2, s32
	s_mov_b64 s[0:1], 0
.LBB1_17:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v3, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v1, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 64
	flat_load_b32 v3, v[3:4]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	scratch_store_b32 v2, v3, off
	v_add_nc_u32_e32 v2, 4, v2
	s_cbranch_scc0 .LBB1_17
; %bb.18:                               ; %.lr.ph.preheader.i.i7
	scratch_load_b32 v3, off, s32
	v_mov_b32_e32 v2, s32
	s_mov_b32 s0, 0
.LBB1_19:                               ; %.lr.ph.i.i9
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_add_i32 s1, s1, s0
	s_add_i32 s0, s0, 4
	s_add_i32 s3, s1, 56
	s_add_i32 s5, s1, 4
	s_add_i32 s4, s1, 36
	s_clause 0x2
	scratch_load_b32 v4, off, s3
	scratch_load_b32 v5, off, s5
	scratch_load_b32 v8, off, s4
	s_add_i32 s1, s1, 64
	s_cmpk_lg_i32 s0, 0xc0
	s_waitcnt vmcnt(2)
	v_alignbit_b32 v9, v4, v4, 17
	v_alignbit_b32 v10, v4, v4, 19
	v_lshrrev_b32_e32 v4, 10, v4
	s_waitcnt vmcnt(1)
	v_alignbit_b32 v11, v5, v5, 7
	v_alignbit_b32 v12, v5, v5, 18
	v_lshrrev_b32_e32 v13, 3, v5
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v8, v3
	v_xor3_b32 v4, v9, v10, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v8, v11, v12, v13
	v_add3_u32 v4, v3, v4, v8
	v_mov_b32_e32 v3, v5
	scratch_store_b32 off, v4, s1
	s_cbranch_scc1 .LBB1_19
; %bb.20:                               ; %._crit_edge.i.i12
	s_clause 0x1
	flat_load_b128 v[8:11], v[0:1] offset:80
	flat_load_b128 v[2:5], v[0:1] offset:96
	s_mov_b32 s3, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@lo+4
	s_addc_u32 s1, s1, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@hi+12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v26, v8 :: v_dual_mov_b32 v21, v5
	v_dual_mov_b32 v12, v9 :: v_dual_mov_b32 v23, v4
	v_dual_mov_b32 v27, v3 :: v_dual_mov_b32 v24, v10
	v_mov_b32_e32 v25, v2
	v_mov_b32_e32 v15, v11
.LBB1_21:                               ; =>This Inner Loop Header: Depth=1
	s_add_i32 s4, s3, s32
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v29, v15 :: v_dual_mov_b32 v20, v25
	scratch_load_b32 v28, off, s4
	v_dual_mov_b32 v14, v27 :: v_dual_mov_b32 v15, v24
	s_load_b32 s4, s[0:1], 0x0
	v_dual_mov_b32 v13, v23 :: v_dual_mov_b32 v22, v12
	v_mov_b32_e32 v12, v26
	v_alignbit_b32 v23, v20, v20, 6
	v_alignbit_b32 v24, v20, v20, 11
	v_alignbit_b32 v25, v20, v20, 25
	v_and_b32_e32 v26, v20, v14
	v_not_b32_e32 v27, v20
	v_xor_b32_e32 v32, v15, v22
	s_add_i32 s3, s3, 4
	v_xor3_b32 v23, v23, v24, v25
	v_add_nc_u32_e32 v21, v26, v21
	v_and_b32_e32 v24, v13, v27
	v_and_b32_e32 v26, v15, v22
	v_and_b32_e32 v27, v32, v12
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	v_add3_u32 v21, v21, v24, v23
	v_mov_b32_e32 v24, v22
	v_mov_b32_e32 v23, v14
	s_cmpk_lg_i32 s3, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add3_u32 v28, v21, s4, v28
	v_mov_b32_e32 v21, v13
	v_xor_b32_e32 v26, v27, v26
	v_mov_b32_e32 v27, v20
	v_alignbit_b32 v30, v12, v12, 2
	v_alignbit_b32 v31, v12, v12, 13
	v_alignbit_b32 v25, v12, v12, 22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor3_b32 v30, v30, v31, v25
	v_add_nc_u32_e32 v25, v28, v29
	v_add3_u32 v26, v26, v30, v28
	s_cbranch_scc1 .LBB1_21
; %bb.22:                               ; %_Z22sha256_transform_wordsP12SHA256_CTX_WPj.exit.i23
	s_mov_b32 s4, 0
	v_add_nc_u32_e32 v9, v12, v9
	s_mov_b32 s7, s4
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_nc_u32_e32 v8, v26, v8
	v_add_nc_u32_e32 v10, v22, v10
	v_add_nc_u32_e32 v11, v15, v11
	v_dual_mov_b32 v20, 0 :: v_dual_add_nc_u32 v3, v20, v3
	v_add_nc_u32_e32 v2, v25, v2
	v_add_nc_u32_e32 v4, v14, v4
	v_add_nc_u32_e32 v5, v13, v5
	v_mov_b32_e32 v15, s7
	v_dual_mov_b32 v21, v20 :: v_dual_mov_b32 v14, s6
	v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v12, s4
	s_clause 0x5
	flat_store_b128 v[0:1], v[8:11] offset:80
	flat_store_b128 v[0:1], v[2:5] offset:96
	flat_store_b128 v[0:1], v[12:15]
	flat_store_b128 v[0:1], v[12:15] offset:16
	flat_store_b128 v[0:1], v[12:15] offset:32
	flat_store_b64 v[0:1], v[20:21] offset:48
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr2
.LBB1_23:                               ; %Flow191
	s_and_not1_saveexec_b32 s1, s2
	s_cbranch_execz .LBB1_28
; %bb.24:
	s_mov_b32 s2, exec_lo
	v_cmpx_ne_u32_e32 13, v20
	s_cbranch_execz .LBB1_27
; %bb.25:                               ; %.lr.ph79.i.preheader
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v4, -1, v20
	s_mov_b32 s3, 0
.LBB1_26:                               ; %.lr.ph79.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, 1, v4
	flat_store_b32 v[2:3], v5
	v_add_co_u32 v2, s0, v2, 4
	v_add_co_ci_u32_e64 v3, s0, 0, v3, s0
	v_cmp_lt_u32_e32 vcc_lo, 11, v4
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_26
.LBB1_27:                               ; %Flow190
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_28:                               ; %.loopexit.i
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s1
	flat_load_b32 v2, v[0:1] offset:64
	s_mov_b32 s0, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_lshlrev_b32_e32 v2, 5, v2
	v_add_co_u32 v2, vcc_lo, v18, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, v3
	s_clause 0x1
	flat_store_b64 v[0:1], v[2:3] offset:72
	flat_store_b64 v[0:1], v[4:5] offset:56
.LBB1_29:                               ; =>This Inner Loop Header: Depth=1
	flat_load_b32 v2, v[16:17]
	v_add_co_u32 v16, vcc_lo, v16, 4
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v17, vcc_lo
	s_add_i32 s1, s0, s32
	s_add_i32 s0, s0, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 64
	s_waitcnt vmcnt(0) lgkmcnt(0)
	scratch_store_b32 off, v2, s1
	s_cbranch_scc0 .LBB1_29
; %bb.30:                               ; %.lr.ph.preheader.i55.i
	scratch_load_b32 v3, off, s32
	v_mov_b32_e32 v2, s32
	s_mov_b32 s0, 0
.LBB1_31:                               ; %.lr.ph.i57.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_add_i32 s1, s1, s0
	s_add_i32 s0, s0, 4
	s_add_i32 s2, s1, 56
	s_add_i32 s4, s1, 4
	s_add_i32 s3, s1, 36
	s_clause 0x2
	scratch_load_b32 v4, off, s2
	scratch_load_b32 v5, off, s4
	scratch_load_b32 v8, off, s3
	s_add_i32 s1, s1, 64
	s_cmpk_lg_i32 s0, 0xc0
	s_waitcnt vmcnt(2)
	v_alignbit_b32 v9, v4, v4, 17
	v_alignbit_b32 v10, v4, v4, 19
	v_lshrrev_b32_e32 v4, 10, v4
	s_waitcnt vmcnt(1)
	v_alignbit_b32 v11, v5, v5, 7
	v_alignbit_b32 v12, v5, v5, 18
	v_lshrrev_b32_e32 v13, 3, v5
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v8, v3
	v_xor3_b32 v4, v9, v10, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v8, v11, v12, v13
	v_add3_u32 v4, v3, v4, v8
	v_mov_b32_e32 v3, v5
	scratch_store_b32 off, v4, s1
	s_cbranch_scc1 .LBB1_31
; %bb.32:                               ; %._crit_edge.i60.i
	s_clause 0x1
	flat_load_b128 v[8:11], v[0:1] offset:80
	flat_load_b128 v[2:5], v[0:1] offset:96
	s_mov_b32 s2, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@lo+4
	s_addc_u32 s1, s1, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@hi+12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v22, v8 :: v_dual_mov_b32 v17, v5
	v_dual_mov_b32 v12, v9 :: v_dual_mov_b32 v19, v4
	v_dual_mov_b32 v23, v3 :: v_dual_mov_b32 v20, v10
	v_mov_b32_e32 v21, v2
	v_mov_b32_e32 v13, v11
.LBB1_33:                               ; =>This Inner Loop Header: Depth=1
	s_add_i32 s3, s2, s32
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v16, v21 :: v_dual_mov_b32 v15, v23
	scratch_load_b32 v24, off, s3
	v_dual_mov_b32 v25, v13 :: v_dual_mov_b32 v14, v19
	v_mov_b32_e32 v18, v12
	v_dual_mov_b32 v12, v22 :: v_dual_mov_b32 v13, v20
	s_load_b32 s3, s[0:1], 0x0
	v_and_b32_e32 v22, v16, v15
	v_alignbit_b32 v19, v16, v16, 6
	v_alignbit_b32 v20, v16, v16, 11
	v_alignbit_b32 v21, v16, v16, 25
	v_not_b32_e32 v23, v16
	v_add_nc_u32_e32 v17, v22, v17
	v_xor_b32_e32 v28, v13, v18
	v_and_b32_e32 v22, v13, v18
	v_xor3_b32 v19, v19, v20, v21
	v_and_b32_e32 v20, v14, v23
	v_alignbit_b32 v26, v12, v12, 2
	v_and_b32_e32 v23, v28, v12
	v_alignbit_b32 v27, v12, v12, 13
	v_alignbit_b32 v21, v12, v12, 22
	s_add_i32 s2, s2, 4
	s_add_u32 s0, s0, 4
	v_xor_b32_e32 v22, v23, v22
	v_mov_b32_e32 v23, v16
	v_add3_u32 v17, v17, v20, v19
	v_mov_b32_e32 v20, v18
	v_xor3_b32 v26, v26, v27, v21
	v_mov_b32_e32 v19, v15
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s2, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add3_u32 v24, v17, s3, v24
	v_mov_b32_e32 v17, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v21, v24, v25
	v_add3_u32 v22, v22, v26, v24
	s_cbranch_scc1 .LBB1_33
; %bb.34:                               ; %_Z18sha256_final_wordsP12SHA256_CTX_WPj.exit
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v22, v8
	v_add_nc_u32_e32 v9, v12, v9
	v_add_nc_u32_e32 v10, v18, v10
	v_add_nc_u32_e32 v11, v13, v11
	v_add_nc_u32_e32 v2, v21, v2
	v_add_nc_u32_e32 v3, v16, v3
	v_add_nc_u32_e32 v4, v15, v4
	v_add_nc_u32_e32 v5, v14, v5
	s_clause 0x1
	flat_store_b128 v[0:1], v[8:11] offset:80
	flat_store_b128 v[0:1], v[2:5] offset:96
	flat_store_b32 v[6:7], v8
	flat_load_b32 v2, v[0:1] offset:84
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[6:7], v2 offset:4
	flat_load_b32 v2, v[0:1] offset:88
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[6:7], v2 offset:8
	flat_load_b32 v2, v[0:1] offset:92
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[6:7], v2 offset:12
	flat_load_b32 v2, v[0:1] offset:96
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[6:7], v2 offset:16
	flat_load_b32 v2, v[0:1] offset:100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[6:7], v2 offset:20
	flat_load_b32 v2, v[0:1] offset:104
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[6:7], v2 offset:24
	flat_load_b32 v0, v[0:1] offset:108
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[6:7], v0 offset:28
	s_waitcnt lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end1:
	.size	_Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_, .Lfunc_end1-_Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 2704
; NumSgprs: 35
; NumVgprs: 39
; ScratchSize: 272
; MemoryBound: 1
	.text
	.p2align	2                               ; -- Begin function _Z8blockmixPj
	.type	_Z8blockmixPj,@function
_Z8blockmixPj:                          ; @_Z8blockmixPj
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_mov_b32 s0, 0
.LBB2_1:                                ; =>This Inner Loop Header: Depth=1
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_i32 s1, s0, s32
	s_add_i32 s0, s0, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 64
	s_waitcnt vmcnt(0) lgkmcnt(0)
	scratch_store_b32 off, v4, s1
	s_cbranch_scc0 .LBB2_1
; %bb.2:                                ; %.preheader24
	v_add_co_u32 v18, vcc_lo, v0, 64
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v1, vcc_lo
	s_mov_b32 s1, 0
	s_mov_b32 s2, -1
	s_mov_b32 s0, s1
.LBB2_3:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_4 Depth 2
                                        ;     Child Loop BB2_6 Depth 2
                                        ;     Child Loop BB2_8 Depth 2
                                        ;     Child Loop BB2_10 Depth 2
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v2, v18 :: v_dual_mov_b32 v3, v19
	s_xor_b32 s2, s2, -1
	s_mov_b32 s3, 0
.LBB2_4:                                ;   Parent Loop BB2_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s4, s3, s32
	flat_load_b32 v4, v[2:3]
	scratch_load_b32 v5, off, s4
	v_add_co_u32 v2, vcc_lo, v2, 4
	s_add_i32 s6, s32, 64
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_i32 s5, s3, s6
	s_add_i32 s3, s3, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 64
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v4, v4, v5
	scratch_store_b32 off, v4, s5
	scratch_store_b32 off, v4, s4
	s_cbranch_scc0 .LBB2_4
; %bb.5:                                ;   in Loop: Header=BB2_3 Depth=1
	s_clause 0x3
	scratch_load_b128 v[2:5], off, s32 offset:64
	scratch_load_b128 v[6:9], off, s32 offset:80
	scratch_load_b128 v[14:17], off, s32 offset:112
	scratch_load_b128 v[10:13], off, s32 offset:96
	s_mov_b32 s3, 4
.LBB2_6:                                ;   Parent Loop BB2_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v20, v14, v2
	v_add_nc_u32_e32 v21, v3, v7
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v22, v8, v12
	v_add_nc_u32_e32 v23, v13, v17
	s_add_i32 s3, s3, -1
	v_alignbit_b32 v20, v20, v20, 25
	v_alignbit_b32 v21, v21, v21, 25
	v_alignbit_b32 v22, v22, v22, 25
	v_alignbit_b32 v23, v23, v23, 25
	s_cmp_lg_u32 s3, 0
	v_xor_b32_e32 v6, v20, v6
	v_xor_b32_e32 v11, v21, v11
	v_xor_b32_e32 v16, v22, v16
	v_xor_b32_e32 v5, v23, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v20, v6, v2
	v_add_nc_u32_e32 v21, v11, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v22, v16, v12
	v_add_nc_u32_e32 v23, v5, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v20, v20, v20, 23
	v_alignbit_b32 v21, v21, v21, 23
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v22, v22, v22, 23
	v_alignbit_b32 v23, v23, v23, 23
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v10, v20, v10
	v_xor_b32_e32 v15, v21, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v4, v22, v4
	v_xor_b32_e32 v9, v23, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v20, v10, v6
	v_add_nc_u32_e32 v21, v15, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v22, v4, v16
	v_add_nc_u32_e32 v23, v9, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v20, v20, v20, 19
	v_alignbit_b32 v21, v21, v21, 19
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v22, v22, v22, 19
	v_alignbit_b32 v23, v23, v23, 19
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v14, v20, v14
	v_xor_b32_e32 v3, v21, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v8, v22, v8
	v_xor_b32_e32 v13, v23, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v20, v14, v10
	v_add_nc_u32_e32 v21, v3, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v22, v8, v4
	v_add_nc_u32_e32 v23, v13, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v20, v20, v20, 14
	v_alignbit_b32 v21, v21, v21, 14
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v22, v22, v22, 14
	v_alignbit_b32 v23, v23, v23, 14
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v2, v20, v2
	v_xor_b32_e32 v7, v21, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v12, v22, v12
	v_xor_b32_e32 v17, v23, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v20, v5, v2
	v_add_nc_u32_e32 v21, v7, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v22, v12, v11
	v_add_nc_u32_e32 v23, v17, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v20, v20, v20, 25
	v_alignbit_b32 v21, v21, v21, 25
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v22, v22, v22, 25
	v_alignbit_b32 v23, v23, v23, 25
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v3, v20, v3
	v_xor_b32_e32 v8, v21, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v13, v22, v13
	v_xor_b32_e32 v14, v23, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v20, v3, v2
	v_add_nc_u32_e32 v21, v8, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v22, v13, v12
	v_add_nc_u32_e32 v23, v14, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v20, v20, v20, 23
	v_alignbit_b32 v21, v21, v21, 23
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v22, v22, v22, 23
	v_alignbit_b32 v23, v23, v23, 23
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v4, v20, v4
	v_xor_b32_e32 v9, v21, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v10, v22, v10
	v_xor_b32_e32 v15, v23, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v20, v4, v3
	v_add_nc_u32_e32 v21, v9, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v22, v10, v13
	v_add_nc_u32_e32 v23, v15, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v20, v20, v20, 19
	v_alignbit_b32 v21, v21, v21, 19
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v22, v22, v22, 19
	v_alignbit_b32 v23, v23, v23, 19
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v5, v20, v5
	v_xor_b32_e32 v6, v21, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v11, v22, v11
	v_xor_b32_e32 v16, v23, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v20, v5, v4
	v_add_nc_u32_e32 v21, v6, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v22, v11, v10
	v_add_nc_u32_e32 v23, v16, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v20, v20, v20, 14
	v_alignbit_b32 v21, v21, v21, 14
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v22, v22, v22, 14
	v_alignbit_b32 v23, v23, v23, 14
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v2, v20, v2
	v_xor_b32_e32 v7, v21, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v12, v22, v12
	v_xor_b32_e32 v17, v23, v17
	s_cbranch_scc1 .LBB2_6
; %bb.7:                                ; %_Z9salsa20_8Pj.exit
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_mov_b32 s3, 60
	s_clause 0x3
	scratch_store_b128 off, v[14:17], s32 offset:112
	scratch_store_b128 off, v[10:13], s32 offset:96
	scratch_store_b128 off, v[2:5], s32 offset:64
	scratch_store_b128 off, v[6:9], s32 offset:80
.LBB2_8:                                ;   Parent Loop BB2_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_add_i32 s5, s32, 64
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_add_i32 s4, s3, s5
	s_add_i32 s5, s3, s32
	scratch_load_b32 v2, off, s4
	scratch_load_b32 v3, off, s5
	s_add_i32 s3, s3, -4
	s_cmp_lg_u32 s3, -4
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	scratch_store_b32 off, v2, s5
	s_cbranch_scc1 .LBB2_8
; %bb.9:                                ; %_Z27add_two_words_array_512_bitPjS_.exit.preheader
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_lshl_b64 s[4:5], s[0:1], 2
	s_mov_b32 s0, 0
	v_add_co_u32 v2, vcc_lo, v0, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
.LBB2_10:                               ; %_Z27add_two_words_array_512_bitPjS_.exit
                                        ;   Parent Loop BB2_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_add_i32 s3, s0, s32
	s_add_i32 s0, s0, 4
	scratch_load_b32 v4, off, s3
	s_cmp_eq_u32 s0, 64
	s_waitcnt vmcnt(0)
	flat_store_b32 v[2:3], v4
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_cbranch_scc0 .LBB2_10
; %bb.11:                               ;   in Loop: Header=BB2_3 Depth=1
	s_mov_b32 s0, 16
	s_and_b32 vcc_lo, exec_lo, s2
	s_mov_b32 s2, 0
	s_cbranch_vccz .LBB2_3
; %bb.12:
	s_waitcnt lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end2:
	.size	_Z8blockmixPj, .Lfunc_end2-_Z8blockmixPj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 1128
; NumSgprs: 35
; NumVgprs: 24
; ScratchSize: 144
; MemoryBound: 0
	.text
	.protected	_Z10scryptCudaPP10SCRYPT_PKG ; -- Begin function _Z10scryptCudaPP10SCRYPT_PKG
	.globl	_Z10scryptCudaPP10SCRYPT_PKG
	.p2align	8
	.type	_Z10scryptCudaPP10SCRYPT_PKG,@function
_Z10scryptCudaPP10SCRYPT_PKG:           ; @_Z10scryptCudaPP10SCRYPT_PKG
; %bb.0:
	s_mov_b64 s[48:49], s[0:1]
	s_load_b32 s0, s[0:1], 0x14
	v_mov_b32_e32 v78, 0
	s_add_u32 s46, s48, 8
	s_addc_u32 s47, s49, 0
	s_movk_i32 s32, 0x170
	s_mov_b64 s[8:9], s[46:47]
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[41:42], null, s15, s0, v[0:1]
	v_dual_mov_b32 v0, 0x70 :: v_dual_mov_b32 v1, v78
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_swappc_b64 s[30:31], s[0:1]
	s_mov_b32 s12, 0
	s_mov_b32 s0, exec_lo
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v3, s13
	v_dual_mov_b32 v4, s14 :: v_dual_mov_b32 v5, s15
	s_clause 0x6
	global_store_b128 v[0:1], v[2:5], off
	global_store_b128 v[0:1], v[2:5], off offset:16
	global_store_b128 v[0:1], v[2:5], off offset:32
	global_store_b128 v[0:1], v[2:5], off offset:48
	global_store_b128 v[0:1], v[2:5], off offset:64
	global_store_b128 v[0:1], v[2:5], off offset:80
	global_store_b128 v[0:1], v[2:5], off offset:96
	v_cmpx_gt_i32_e32 0x20000, v41
	s_cbranch_execz .LBB3_493
; %bb.1:
	s_load_b64 s[0:1], s[48:49], 0x0
	v_ashrrev_i32_e32 v42, 31, v41
	v_cmp_eq_u32_e64 s10, 0x1ffff, v41
	v_dual_mov_b32 v113, 16 :: v_dual_mov_b32 v82, 1
	v_bfrev_b32_e32 v114, 1
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[0:1], 3, v[41:42]
	v_dual_mov_b32 v115, 0x1ffff :: v_dual_mov_b32 v76, 33
	v_mov_b32_e32 v59, 0x36363636
	v_dual_mov_b32 v68, 0x5c5c5c5c :: v_dual_mov_b32 v81, 2
	v_mov_b32_e32 v83, 0x6a09e667
	v_mov_b32_e32 v84, 0xbb67ae85
	v_mov_b32_e32 v85, 0x3c6ef372
	v_mov_b32_e32 v86, 0xa54ff53a
	v_mov_b32_e32 v87, 0x510e527f
	v_mov_b32_e32 v88, 0x9b05688c
	v_mov_b32_e32 v89, 0x1f83d9ab
	v_mov_b32_e32 v90, 0x5be0cd19
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v91, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v92, vcc_lo, s1, v1, vcc_lo
	v_mbcnt_lo_u32_b32 v116, -1, 0
	s_mov_b32 s16, 0
	global_load_b64 v[39:40], v[91:92], off
.LBB3_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_3 Depth 2
                                        ;     Child Loop BB3_5 Depth 2
                                        ;       Child Loop BB3_6 Depth 3
                                        ;       Child Loop BB3_8 Depth 3
                                        ;       Child Loop BB3_10 Depth 3
                                        ;       Child Loop BB3_12 Depth 3
                                        ;       Child Loop BB3_14 Depth 3
                                        ;         Child Loop BB3_16 Depth 4
                                        ;         Child Loop BB3_18 Depth 4
                                        ;         Child Loop BB3_20 Depth 4
                                        ;       Child Loop BB3_26 Depth 3
                                        ;       Child Loop BB3_28 Depth 3
                                        ;       Child Loop BB3_30 Depth 3
                                        ;       Child Loop BB3_32 Depth 3
                                        ;       Child Loop BB3_37 Depth 3
                                        ;       Child Loop BB3_40 Depth 3
                                        ;       Child Loop BB3_42 Depth 3
                                        ;       Child Loop BB3_44 Depth 3
                                        ;       Child Loop BB3_46 Depth 3
                                        ;     Child Loop BB3_49 Depth 2
                                        ;     Child Loop BB3_51 Depth 2
                                        ;       Child Loop BB3_52 Depth 3
                                        ;     Child Loop BB3_55 Depth 2
                                        ;       Child Loop BB3_56 Depth 3
                                        ;     Child Loop BB3_59 Depth 2
                                        ;     Child Loop BB3_61 Depth 2
                                        ;     Child Loop BB3_63 Depth 2
                                        ;     Child Loop BB3_65 Depth 2
                                        ;     Child Loop BB3_67 Depth 2
                                        ;     Child Loop BB3_69 Depth 2
                                        ;     Child Loop BB3_71 Depth 2
                                        ;       Child Loop BB3_73 Depth 3
                                        ;       Child Loop BB3_75 Depth 3
                                        ;       Child Loop BB3_77 Depth 3
                                        ;     Child Loop BB3_83 Depth 2
                                        ;     Child Loop BB3_85 Depth 2
                                        ;     Child Loop BB3_87 Depth 2
                                        ;     Child Loop BB3_89 Depth 2
                                        ;     Child Loop BB3_94 Depth 2
                                        ;     Child Loop BB3_97 Depth 2
                                        ;     Child Loop BB3_99 Depth 2
                                        ;     Child Loop BB3_101 Depth 2
                                        ;     Child Loop BB3_103 Depth 2
                                        ;     Child Loop BB3_108 Depth 2
                                        ;     Child Loop BB3_116 Depth 2
                                        ;     Child Loop BB3_122 Depth 2
                                        ;     Child Loop BB3_131 Depth 2
                                        ;     Child Loop BB3_134 Depth 2
                                        ;       Child Loop BB3_137 Depth 3
                                        ;       Child Loop BB3_145 Depth 3
                                        ;       Child Loop BB3_153 Depth 3
                                        ;       Child Loop BB3_161 Depth 3
                                        ;       Child Loop BB3_169 Depth 3
                                        ;       Child Loop BB3_177 Depth 3
                                        ;       Child Loop BB3_185 Depth 3
                                        ;       Child Loop BB3_193 Depth 3
                                        ;       Child Loop BB3_201 Depth 3
                                        ;       Child Loop BB3_207 Depth 3
                                        ;       Child Loop BB3_216 Depth 3
                                        ;     Child Loop BB3_224 Depth 2
                                        ;     Child Loop BB3_232 Depth 2
                                        ;     Child Loop BB3_238 Depth 2
                                        ;     Child Loop BB3_247 Depth 2
                                        ;     Child Loop BB3_252 Depth 2
                                        ;     Child Loop BB3_260 Depth 2
                                        ;     Child Loop BB3_266 Depth 2
                                        ;     Child Loop BB3_275 Depth 2
                                        ;     Child Loop BB3_279 Depth 2
                                        ;     Child Loop BB3_287 Depth 2
                                        ;     Child Loop BB3_293 Depth 2
                                        ;     Child Loop BB3_302 Depth 2
                                        ;     Child Loop BB3_306 Depth 2
                                        ;     Child Loop BB3_314 Depth 2
                                        ;     Child Loop BB3_320 Depth 2
                                        ;     Child Loop BB3_329 Depth 2
                                        ;     Child Loop BB3_333 Depth 2
                                        ;     Child Loop BB3_341 Depth 2
                                        ;     Child Loop BB3_347 Depth 2
                                        ;     Child Loop BB3_356 Depth 2
                                        ;     Child Loop BB3_360 Depth 2
                                        ;     Child Loop BB3_368 Depth 2
                                        ;     Child Loop BB3_374 Depth 2
                                        ;     Child Loop BB3_383 Depth 2
                                        ;     Child Loop BB3_387 Depth 2
                                        ;     Child Loop BB3_395 Depth 2
                                        ;     Child Loop BB3_401 Depth 2
                                        ;     Child Loop BB3_410 Depth 2
                                        ;     Child Loop BB3_414 Depth 2
                                        ;     Child Loop BB3_422 Depth 2
                                        ;     Child Loop BB3_428 Depth 2
                                        ;     Child Loop BB3_437 Depth 2
                                        ;     Child Loop BB3_441 Depth 2
                                        ;     Child Loop BB3_449 Depth 2
                                        ;     Child Loop BB3_455 Depth 2
                                        ;     Child Loop BB3_464 Depth 2
                                        ;     Child Loop BB3_468 Depth 2
                                        ;     Child Loop BB3_476 Depth 2
                                        ;     Child Loop BB3_482 Depth 2
                                        ;     Child Loop BB3_491 Depth 2
	s_mov_b64 s[0:1], 0
.LBB3_3:                                ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v39, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v40, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_eq_i32 s0, 0x50
	flat_load_b32 v2, v[0:1] offset:112
	v_add_co_u32 v0, vcc_lo, 0x20000, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2 offset:224
	s_cbranch_scc0 .LBB3_3
; %bb.4:                                ; %.preheader.i.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_add_co_u32 v41, vcc_lo, 0x202ac, v39
	v_add_co_ci_u32_e32 v42, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v49, vcc_lo, 0x70, v39
	v_add_co_ci_u32_e32 v50, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v43, vcc_lo, 0x2034c, v39
	v_add_co_ci_u32_e32 v44, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v79, vcc_lo, 0x2036c, v39
	v_add_co_ci_u32_e32 v80, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v93, vcc_lo, 0x20134, v39
	v_add_co_ci_u32_e32 v94, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v45, vcc_lo, 0x20154, v39
	v_add_co_ci_u32_e32 v46, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v47, vcc_lo, 0x2032c, v39
	v_add_co_ci_u32_e32 v48, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v109, vcc_lo, 0x20130, v39
	v_add_co_ci_u32_e32 v110, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v107, vcc_lo, 0x2035c, v39
	v_add_co_ci_u32_e32 v108, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v97, vcc_lo, 0x2037c, v39
	v_add_co_ci_u32_e32 v98, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v99, vcc_lo, 0x2038c, v39
	v_add_co_ci_u32_e32 v100, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v101, vcc_lo, 0x2039c, v39
	v_add_co_ci_u32_e32 v102, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v103, vcc_lo, 0x203ac, v39
	v_add_co_ci_u32_e32 v104, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v105, vcc_lo, 0x203bc, v39
	v_add_co_ci_u32_e32 v106, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v117, vcc_lo, v39, 4
	v_add_co_ci_u32_e32 v118, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v95, vcc_lo, 0x20144, v39
	v_add_co_ci_u32_e32 v96, vcc_lo, 0, v40, vcc_lo
	v_dual_mov_b32 v112, v42 :: v_dual_mov_b32 v111, v41
	s_mov_b32 s11, 1
.LBB3_5:                                ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_6 Depth 3
                                        ;       Child Loop BB3_8 Depth 3
                                        ;       Child Loop BB3_10 Depth 3
                                        ;       Child Loop BB3_12 Depth 3
                                        ;       Child Loop BB3_14 Depth 3
                                        ;         Child Loop BB3_16 Depth 4
                                        ;         Child Loop BB3_18 Depth 4
                                        ;         Child Loop BB3_20 Depth 4
                                        ;       Child Loop BB3_26 Depth 3
                                        ;       Child Loop BB3_28 Depth 3
                                        ;       Child Loop BB3_30 Depth 3
                                        ;       Child Loop BB3_32 Depth 3
                                        ;       Child Loop BB3_37 Depth 3
                                        ;       Child Loop BB3_40 Depth 3
                                        ;       Child Loop BB3_42 Depth 3
                                        ;       Child Loop BB3_44 Depth 3
                                        ;       Child Loop BB3_46 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v0, s11 :: v_dual_mov_b32 v1, v40
	v_dual_mov_b32 v2, v49 :: v_dual_mov_b32 v5, 0
	v_dual_mov_b32 v4, 20 :: v_dual_mov_b32 v7, v44
	flat_store_b32 v[109:110], v0
	v_dual_mov_b32 v0, v39 :: v_dual_mov_b32 v3, v50
	v_mov_b32_e32 v6, v43
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_@rel32@lo+4
	s_addc_u32 s1, s1, _Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_@rel32@hi+12
	s_mov_b32 s13, 0
	s_swappc_b64 s[30:31], s[0:1]
	s_clause 0x1
	flat_load_b128 v[0:3], v[43:44]
	flat_load_b128 v[4:7], v[107:108]
	v_dual_mov_b32 v61, v59 :: v_dual_mov_b32 v8, v45
	v_dual_mov_b32 v60, v59 :: v_dual_mov_b32 v9, v46
	v_mov_b32_e32 v62, v59
	v_mov_b32_e32 v63, v59
	v_mov_b32_e32 v64, v59
	v_mov_b32_e32 v65, v59
	v_mov_b32_e32 v66, v59
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_xor_b32_e32 v51, 0x36363636, v0
	v_xor_b32_e32 v52, 0x36363636, v1
	v_xor_b32_e32 v53, 0x36363636, v2
	v_xor_b32_e32 v54, 0x36363636, v3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v55, 0x36363636, v4
	v_xor_b32_e32 v56, 0x36363636, v5
	v_xor_b32_e32 v57, 0x36363636, v6
	v_xor_b32_e32 v58, 0x36363636, v7
.LBB3_6:                                ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_mov_b32 m0, s13
	s_add_i32 s13, s13, 1
	v_movrels_b32_e32 v10, v51
	s_cmp_lg_u32 s13, 16
	flat_store_b32 v[8:9], v10
	v_add_co_u32 v8, vcc_lo, v8, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_cbranch_scc1 .LBB3_6
; %bb.7:                                ; %.lr.ph.i.i.i.preheader
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_mov_b64 s[0:1], 0
.LBB3_8:                                ; %.lr.ph.i.i.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v39, s0
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v40, vcc_lo
	s_add_u32 s0, s0, 4
	v_add_co_u32 v8, vcc_lo, 0x20000, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x54
	flat_load_b32 v10, v[8:9] offset:224
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[8:9], v10 offset:404
	s_cbranch_scc1 .LBB3_8
; %bb.9:                                ; %._crit_edge.i.i.i
                                        ;   in Loop: Header=BB3_5 Depth=2
	v_xor_b32_e32 v67, 0x5c5c5c5c, v7
	v_xor_b32_e32 v60, 0x5c5c5c5c, v0
	v_xor_b32_e32 v61, 0x5c5c5c5c, v1
	v_xor_b32_e32 v62, 0x5c5c5c5c, v2
	v_xor_b32_e32 v63, 0x5c5c5c5c, v3
	v_xor_b32_e32 v64, 0x5c5c5c5c, v4
	v_xor_b32_e32 v65, 0x5c5c5c5c, v5
	v_xor_b32_e32 v66, 0x5c5c5c5c, v6
	v_dual_mov_b32 v69, v68 :: v_dual_mov_b32 v0, v39
	v_dual_mov_b32 v70, v68 :: v_dual_mov_b32 v3, v46
	v_dual_mov_b32 v71, v68 :: v_dual_mov_b32 v2, v45
	v_dual_mov_b32 v72, v68 :: v_dual_mov_b32 v5, 0
	v_dual_mov_b32 v73, v68 :: v_dual_mov_b32 v4, 37
	v_dual_mov_b32 v75, v68 :: v_dual_mov_b32 v6, v47
	v_mov_b32_e32 v1, v40
	v_mov_b32_e32 v7, v48
	v_mov_b32_e32 v74, v68
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_@rel32@lo+4
	s_addc_u32 s1, s1, _Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_@rel32@hi+12
	s_mov_b32 s13, 0
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, v79 :: v_dual_mov_b32 v1, v80
.LBB3_10:                               ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_mov_b32 m0, s13
	s_add_i32 s13, s13, 1
	v_movrels_b32_e32 v2, v60
	s_cmp_lg_u32 s13, 16
	flat_store_b32 v[0:1], v2
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_cbranch_scc1 .LBB3_10
; %bb.11:                               ; %.lr.ph93.i.i.i.preheader
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_mov_b64 s[0:1], 0
.LBB3_12:                               ; %.lr.ph93.i.i.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v39, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v40, vcc_lo
	s_add_u32 s0, s0, 4
	v_add_co_u32 v0, vcc_lo, 0x20000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x54
	flat_load_b32 v2, v[0:1] offset:812
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2 offset:940
	s_cbranch_scc1 .LBB3_12
; %bb.13:                               ; %._crit_edge94.i.i.i
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_clause 0x5
	flat_load_b128 v[0:3], v[79:80]
	flat_load_b128 v[4:7], v[97:98]
	flat_load_b128 v[10:13], v[99:100]
	flat_load_b128 v[14:17], v[101:102]
	flat_load_b128 v[18:21], v[103:104]
	flat_load_b128 v[22:25], v[105:106]
	v_mov_b32_e32 v26, 0
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_mov_b32_e32 v77, v26
	v_mov_b32_e32 v27, v26
	s_clause 0x1
	flat_store_b32 v[39:40], v26 offset:64
	flat_store_b64 v[39:40], v[26:27] offset:72
	s_waitcnt vmcnt(5) lgkmcnt(7)
	scratch_store_b128 off, v[0:3], off offset:272
	s_waitcnt vmcnt(4) lgkmcnt(6)
	scratch_store_b128 off, v[4:7], off offset:288
	s_waitcnt vmcnt(3) lgkmcnt(5)
	scratch_store_b128 off, v[10:13], off offset:304
	s_waitcnt vmcnt(2) lgkmcnt(4)
	scratch_store_b128 off, v[14:17], off offset:320
	s_waitcnt vmcnt(1) lgkmcnt(3)
	scratch_store_b128 off, v[18:21], off offset:336
	s_waitcnt vmcnt(0) lgkmcnt(2)
	scratch_store_b128 off, v[22:25], off offset:352
	s_clause 0x1
	flat_store_b128 v[39:40], v[83:86] offset:80
	flat_store_b128 v[39:40], v[87:90] offset:96
.LBB3_14:                               ; %.lr.ph.i.i.i.i.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB3_16 Depth 4
                                        ;         Child Loop BB3_18 Depth 4
                                        ;         Child Loop BB3_20 Depth 4
	s_lshl_b32 s0, s2, 2
	v_lshlrev_b64 v[0:1], 2, v[77:78]
	s_addk_i32 s0, 0x110
	s_mov_b32 s3, exec_lo
	scratch_load_b32 v2, off, s0
	v_add_co_u32 v0, vcc_lo, v39, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v40, v1, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_b32 v[0:1], v2
	flat_load_b32 v0, v[39:40] offset:64
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v77, 1, v0
	flat_store_b32 v[39:40], v77 offset:64
	v_cmpx_eq_u32_e32 16, v77
	s_cbranch_execz .LBB3_22
; %bb.15:                               ;   in Loop: Header=BB3_14 Depth=3
	v_dual_mov_b32 v0, v39 :: v_dual_mov_b32 v1, v40
	s_mov_b32 s0, 0
.LBB3_16:                               ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ;       Parent Loop BB3_14 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s1, s0, 16
	s_add_i32 s0, s0, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 64
	s_waitcnt vmcnt(0) lgkmcnt(0)
	scratch_store_b32 off, v2, s1
	s_cbranch_scc0 .LBB3_16
; %bb.17:                               ; %.lr.ph.preheader.i.i.i.i.i.i
                                        ;   in Loop: Header=BB3_14 Depth=3
	scratch_load_b32 v0, off, off offset:16
	s_mov_b32 s0, 0
.LBB3_18:                               ; %.lr.ph.i.i.i.i.i.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ;       Parent Loop BB3_14 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_readfirstlane_b32 s1, v113
	s_delay_alu instid0(VALU_DEP_1)
	s_add_i32 s1, s1, s0
	s_add_i32 s0, s0, 4
	s_add_i32 s4, s1, 56
	s_add_i32 s6, s1, 4
	s_add_i32 s5, s1, 36
	s_clause 0x2
	scratch_load_b32 v1, off, s4
	scratch_load_b32 v2, off, s6
	scratch_load_b32 v3, off, s5
	s_add_i32 s1, s1, 64
	s_cmpk_lg_i32 s0, 0xc0
	s_waitcnt vmcnt(2)
	v_alignbit_b32 v4, v1, v1, 17
	v_alignbit_b32 v5, v1, v1, 19
	v_lshrrev_b32_e32 v1, 10, v1
	s_waitcnt vmcnt(1)
	v_alignbit_b32 v6, v2, v2, 7
	v_alignbit_b32 v7, v2, v2, 18
	v_lshrrev_b32_e32 v10, 3, v2
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v3, v0
	v_xor3_b32 v1, v4, v5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v3, v6, v7, v10
	v_add3_u32 v1, v0, v1, v3
	v_mov_b32_e32 v0, v2
	scratch_store_b32 off, v1, s1
	s_cbranch_scc1 .LBB3_18
; %bb.19:                               ; %._crit_edge.i.i.i.i.i.i
                                        ;   in Loop: Header=BB3_14 Depth=3
	s_clause 0x1
	flat_load_b128 v[4:7], v[39:40] offset:80
	flat_load_b128 v[0:3], v[39:40] offset:96
	s_mov_b32 s4, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@lo+4
	s_addc_u32 s1, s1, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@hi+12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v20, v4 :: v_dual_mov_b32 v15, v3
	v_dual_mov_b32 v10, v5 :: v_dual_mov_b32 v17, v2
	v_dual_mov_b32 v21, v1 :: v_dual_mov_b32 v18, v6
	v_mov_b32_e32 v19, v0
	v_mov_b32_e32 v11, v7
.LBB3_20:                               ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ;       Parent Loop BB3_14 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_add_i32 s5, s4, 16
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v14, v19 :: v_dual_mov_b32 v13, v21
	scratch_load_b32 v22, off, s5
	v_dual_mov_b32 v23, v11 :: v_dual_mov_b32 v12, v17
	v_mov_b32_e32 v16, v10
	v_dual_mov_b32 v10, v20 :: v_dual_mov_b32 v11, v18
	s_load_b32 s5, s[0:1], 0x0
	v_and_b32_e32 v20, v14, v13
	v_alignbit_b32 v17, v14, v14, 6
	v_alignbit_b32 v18, v14, v14, 11
	v_alignbit_b32 v19, v14, v14, 25
	v_not_b32_e32 v21, v14
	v_add_nc_u32_e32 v15, v20, v15
	v_xor_b32_e32 v26, v11, v16
	v_and_b32_e32 v20, v11, v16
	v_xor3_b32 v17, v17, v18, v19
	v_and_b32_e32 v18, v12, v21
	v_alignbit_b32 v24, v10, v10, 2
	v_and_b32_e32 v21, v26, v10
	v_alignbit_b32 v25, v10, v10, 13
	v_alignbit_b32 v19, v10, v10, 22
	s_add_i32 s4, s4, 4
	s_add_u32 s0, s0, 4
	v_xor_b32_e32 v20, v21, v20
	v_mov_b32_e32 v21, v14
	v_add3_u32 v15, v15, v18, v17
	v_mov_b32_e32 v18, v16
	v_xor3_b32 v24, v24, v25, v19
	v_mov_b32_e32 v17, v13
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s4, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add3_u32 v22, v15, s5, v22
	v_mov_b32_e32 v15, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v19, v22, v23
	v_add3_u32 v20, v20, v24, v22
	s_cbranch_scc1 .LBB3_20
; %bb.21:                               ; %_Z22sha256_transform_wordsP12SHA256_CTX_WPj.exit.i.i.i.i.i
                                        ;   in Loop: Header=BB3_14 Depth=3
	v_add_co_u32 v8, vcc_lo, 0x200, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v77, 0 :: v_dual_add_nc_u32 v4, v20, v4
	v_add_nc_u32_e32 v5, v10, v5
	v_add_nc_u32_e32 v6, v16, v6
	v_add_nc_u32_e32 v7, v11, v7
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	v_add_nc_u32_e32 v0, v19, v0
	v_add_nc_u32_e32 v1, v14, v1
	v_add_nc_u32_e32 v2, v13, v2
	v_add_nc_u32_e32 v3, v12, v3
	s_clause 0x3
	flat_store_b128 v[39:40], v[4:7] offset:80
	flat_store_b128 v[39:40], v[0:3] offset:96
	flat_store_b64 v[39:40], v[8:9] offset:72
	flat_store_b32 v[39:40], v78 offset:64
.LBB3_22:                               ; %Flow1341
                                        ;   in Loop: Header=BB3_14 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s2, 24
	s_cbranch_scc1 .LBB3_14
; %bb.23:                               ; %_Z19sha256_update_wordsP12SHA256_CTX_WPjm.exit.i.i.i.i
                                        ;   in Loop: Header=BB3_5 Depth=2
	v_lshlrev_b64 v[0:1], 2, v[77:78]
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v39, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, v40, v1, vcc_lo
	flat_store_b32 v[2:3], v114
	v_cmpx_lt_u32_e32 13, v77
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB3_34
; %bb.24:                               ;   in Loop: Header=BB3_5 Depth=2
	v_add_nc_u32_e32 v0, 1, v77
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 16, v0
	s_cbranch_execz .LBB3_27
; %bb.25:                               ; %.lr.ph.i24.i.i.i.i.preheader
                                        ;   in Loop: Header=BB3_5 Depth=2
	v_dual_mov_b32 v1, v78 :: v_dual_mov_b32 v2, v77
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v39, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v40, v1, vcc_lo
.LBB3_26:                               ; %.lr.ph.i24.i.i.i.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_add_nc_u32_e32 v2, 1, v2
	flat_store_b32 v[0:1], v78
	v_add_co_u32 v0, s0, v0, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
	v_cmp_lt_u32_e32 vcc_lo, 14, v2
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_26
.LBB3_27:                               ; %Flow1335
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v0, 16
	s_mov_b64 s[0:1], 0
.LBB3_28:                               ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v1, vcc_lo, v39, s0
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v40, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 64
	flat_load_b32 v1, v[1:2]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	scratch_store_b32 v0, v1, off
	v_add_nc_u32_e32 v0, 4, v0
	s_cbranch_scc0 .LBB3_28
; %bb.29:                               ; %.lr.ph.preheader.i.i7.i.i.i.i
                                        ;   in Loop: Header=BB3_5 Depth=2
	scratch_load_b32 v0, off, off offset:16
	s_mov_b32 s0, 0
.LBB3_30:                               ; %.lr.ph.i.i9.i.i.i.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_readfirstlane_b32 s1, v113
	s_delay_alu instid0(VALU_DEP_1)
	s_add_i32 s1, s1, s0
	s_add_i32 s0, s0, 4
	s_add_i32 s3, s1, 56
	s_add_i32 s5, s1, 4
	s_add_i32 s4, s1, 36
	s_clause 0x2
	scratch_load_b32 v1, off, s3
	scratch_load_b32 v2, off, s5
	scratch_load_b32 v3, off, s4
	s_add_i32 s1, s1, 64
	s_cmpk_lg_i32 s0, 0xc0
	s_waitcnt vmcnt(2)
	v_alignbit_b32 v4, v1, v1, 17
	v_alignbit_b32 v5, v1, v1, 19
	v_lshrrev_b32_e32 v1, 10, v1
	s_waitcnt vmcnt(1)
	v_alignbit_b32 v6, v2, v2, 7
	v_alignbit_b32 v7, v2, v2, 18
	v_lshrrev_b32_e32 v10, 3, v2
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v3, v0
	v_xor3_b32 v1, v4, v5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v3, v6, v7, v10
	v_add3_u32 v1, v0, v1, v3
	v_mov_b32_e32 v0, v2
	scratch_store_b32 off, v1, s1
	s_cbranch_scc1 .LBB3_30
; %bb.31:                               ; %._crit_edge.i.i12.i.i.i.i
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_clause 0x1
	flat_load_b128 v[4:7], v[39:40] offset:80
	flat_load_b128 v[0:3], v[39:40] offset:96
	s_mov_b32 s3, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@lo+4
	s_addc_u32 s1, s1, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@hi+12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v20, v4 :: v_dual_mov_b32 v15, v3
	v_dual_mov_b32 v10, v5 :: v_dual_mov_b32 v17, v2
	v_dual_mov_b32 v21, v1 :: v_dual_mov_b32 v12, v7
	v_dual_mov_b32 v19, v0 :: v_dual_mov_b32 v18, v6
.LBB3_32:                               ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s4, s3, 16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v23, v12 :: v_dual_mov_b32 v14, v19
	scratch_load_b32 v22, off, s4
	v_dual_mov_b32 v13, v21 :: v_dual_mov_b32 v16, v10
	v_dual_mov_b32 v11, v17 :: v_dual_mov_b32 v10, v20
	s_load_b32 s4, s[0:1], 0x0
	v_and_b32_e32 v20, v14, v13
	v_mov_b32_e32 v12, v18
	v_alignbit_b32 v17, v14, v14, 6
	v_alignbit_b32 v18, v14, v14, 11
	v_alignbit_b32 v19, v14, v14, 25
	v_add_nc_u32_e32 v15, v20, v15
	v_not_b32_e32 v21, v14
	v_xor_b32_e32 v26, v12, v16
	v_and_b32_e32 v20, v12, v16
	v_xor3_b32 v17, v17, v18, v19
	v_alignbit_b32 v24, v10, v10, 2
	v_and_b32_e32 v18, v11, v21
	v_and_b32_e32 v21, v26, v10
	v_alignbit_b32 v25, v10, v10, 13
	v_alignbit_b32 v19, v10, v10, 22
	s_add_i32 s3, s3, 4
	s_add_u32 s0, s0, 4
	v_xor_b32_e32 v20, v21, v20
	v_mov_b32_e32 v21, v14
	v_add3_u32 v15, v15, v18, v17
	v_mov_b32_e32 v18, v16
	v_xor3_b32 v24, v24, v25, v19
	v_mov_b32_e32 v17, v13
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s3, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add3_u32 v22, v15, s4, v22
	v_mov_b32_e32 v15, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v19, v22, v23
	v_add3_u32 v20, v20, v24, v22
	s_cbranch_scc1 .LBB3_32
; %bb.33:                               ; %_Z22sha256_transform_wordsP12SHA256_CTX_WPj.exit.i23.i.i.i.i
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_add_nc_u32_e32 v4, v20, v4
	v_add_nc_u32_e32 v5, v10, v5
	v_add_nc_u32_e32 v6, v16, v6
	v_add_nc_u32_e32 v7, v12, v7
	v_dual_mov_b32 v15, v78 :: v_dual_add_nc_u32 v0, v19, v0
	v_add_nc_u32_e32 v1, v14, v1
	v_add_nc_u32_e32 v2, v13, v2
	v_dual_mov_b32 v14, v78 :: v_dual_add_nc_u32 v3, v11, v3
	v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v11, s17
	v_dual_mov_b32 v12, s18 :: v_dual_mov_b32 v13, s19
	s_clause 0x5
	flat_store_b128 v[39:40], v[4:7] offset:80
	flat_store_b128 v[39:40], v[0:3] offset:96
	flat_store_b128 v[39:40], v[10:13]
	flat_store_b128 v[39:40], v[10:13] offset:16
	flat_store_b128 v[39:40], v[10:13] offset:32
	flat_store_b64 v[39:40], v[14:15] offset:48
                                        ; implicit-def: $vgpr0_vgpr1
.LBB3_34:                               ; %Flow1340
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_and_not1_saveexec_b32 s1, s2
	s_cbranch_execz .LBB3_39
; %bb.35:                               ;   in Loop: Header=BB3_5 Depth=2
	s_mov_b32 s2, exec_lo
	v_cmpx_ne_u32_e32 13, v77
	s_cbranch_execz .LBB3_38
; %bb.36:                               ; %.lr.ph79.i.i.i.i.i.preheader
                                        ;   in Loop: Header=BB3_5 Depth=2
	v_add_co_u32 v0, vcc_lo, v117, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v118, v1, vcc_lo
	v_add_nc_u32_e32 v2, -1, v77
	s_mov_b32 s3, 0
.LBB3_37:                               ; %.lr.ph79.i.i.i.i.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, 1, v2
	flat_store_b32 v[0:1], v78
	v_add_co_u32 v0, s0, v0, 4
	v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
	v_cmp_lt_u32_e32 vcc_lo, 11, v2
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_37
.LBB3_38:                               ; %Flow1338
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_39:                               ; %.loopexit.i.i.i.i.i
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s1
	flat_load_b32 v0, v[39:40] offset:64
	s_mov_b64 s[0:1], 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_lshlrev_b32_e32 v0, 5, v0
	v_add_co_u32 v1, vcc_lo, v8, v0
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v9, vcc_lo
	v_mov_b32_e32 v0, 16
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v3, v2
	s_clause 0x1
	flat_store_b64 v[39:40], v[1:2] offset:72
	flat_store_b64 v[39:40], v[3:4] offset:56
.LBB3_40:                               ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_add_co_u32 v1, vcc_lo, v39, s0
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v40, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 64
	flat_load_b32 v1, v[1:2]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	scratch_store_b32 v0, v1, off
	v_add_nc_u32_e32 v0, 4, v0
	s_cbranch_scc0 .LBB3_40
; %bb.41:                               ; %.lr.ph.preheader.i55.i.i.i.i.i
                                        ;   in Loop: Header=BB3_5 Depth=2
	scratch_load_b32 v0, off, off offset:16
	s_mov_b32 s0, 0
.LBB3_42:                               ; %.lr.ph.i57.i.i.i.i.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_readfirstlane_b32 s1, v113
	s_delay_alu instid0(VALU_DEP_1)
	s_add_i32 s1, s1, s0
	s_add_i32 s0, s0, 4
	s_add_i32 s2, s1, 56
	s_add_i32 s4, s1, 4
	s_add_i32 s3, s1, 36
	s_clause 0x2
	scratch_load_b32 v1, off, s2
	scratch_load_b32 v2, off, s4
	scratch_load_b32 v3, off, s3
	s_add_i32 s1, s1, 64
	s_cmpk_lg_i32 s0, 0xc0
	s_waitcnt vmcnt(2)
	v_alignbit_b32 v4, v1, v1, 17
	v_alignbit_b32 v5, v1, v1, 19
	v_lshrrev_b32_e32 v1, 10, v1
	s_waitcnt vmcnt(1)
	v_alignbit_b32 v6, v2, v2, 7
	v_alignbit_b32 v7, v2, v2, 18
	v_lshrrev_b32_e32 v8, 3, v2
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v3, v0
	v_xor3_b32 v1, v4, v5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v3, v6, v7, v8
	v_add3_u32 v1, v0, v1, v3
	v_mov_b32_e32 v0, v2
	scratch_store_b32 off, v1, s1
	s_cbranch_scc1 .LBB3_42
; %bb.43:                               ; %._crit_edge.i60.i.i.i.i.i
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_clause 0x1
	flat_load_b128 v[4:7], v[39:40] offset:80
	flat_load_b128 v[0:3], v[39:40] offset:96
	s_mov_b32 s2, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@lo+4
	s_addc_u32 s1, s1, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@hi+12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v13, v3
	v_dual_mov_b32 v8, v5 :: v_dual_mov_b32 v15, v2
	v_dual_mov_b32 v19, v1 :: v_dual_mov_b32 v16, v6
	v_mov_b32_e32 v17, v0
	v_mov_b32_e32 v9, v7
.LBB3_44:                               ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s3, s2, 16
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v12, v17 :: v_dual_mov_b32 v11, v19
	scratch_load_b32 v20, off, s3
	v_dual_mov_b32 v21, v9 :: v_dual_mov_b32 v10, v15
	v_mov_b32_e32 v14, v8
	v_dual_mov_b32 v8, v18 :: v_dual_mov_b32 v9, v16
	s_load_b32 s3, s[0:1], 0x0
	v_and_b32_e32 v18, v12, v11
	v_alignbit_b32 v15, v12, v12, 6
	v_alignbit_b32 v16, v12, v12, 11
	v_alignbit_b32 v17, v12, v12, 25
	v_not_b32_e32 v19, v12
	v_add_nc_u32_e32 v13, v18, v13
	v_xor_b32_e32 v24, v9, v14
	v_and_b32_e32 v18, v9, v14
	v_xor3_b32 v15, v15, v16, v17
	v_and_b32_e32 v16, v10, v19
	v_alignbit_b32 v22, v8, v8, 2
	v_and_b32_e32 v19, v24, v8
	v_alignbit_b32 v23, v8, v8, 13
	v_alignbit_b32 v17, v8, v8, 22
	s_add_i32 s2, s2, 4
	s_add_u32 s0, s0, 4
	v_xor_b32_e32 v18, v19, v18
	v_mov_b32_e32 v19, v12
	v_add3_u32 v13, v13, v16, v15
	v_mov_b32_e32 v16, v14
	v_xor3_b32 v22, v22, v23, v17
	v_mov_b32_e32 v15, v11
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s2, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add3_u32 v20, v13, s3, v20
	v_mov_b32_e32 v13, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v17, v20, v21
	v_add3_u32 v18, v18, v22, v20
	s_cbranch_scc1 .LBB3_44
; %bb.45:                               ; %_Z9hmac_testP12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_.exit.i.i
                                        ;   in Loop: Header=BB3_5 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v18, v4
	v_add_nc_u32_e32 v5, v8, v5
	v_add_nc_u32_e32 v6, v14, v6
	v_add_nc_u32_e32 v7, v9, v7
	v_add_nc_u32_e32 v0, v17, v0
	v_add_nc_u32_e32 v1, v12, v1
	v_add_nc_u32_e32 v2, v11, v2
	v_add_nc_u32_e32 v3, v10, v3
	s_mov_b64 s[0:1], 0
	s_clause 0x3
	flat_store_b128 v[39:40], v[4:7] offset:80
	flat_store_b128 v[39:40], v[0:3] offset:96
	flat_store_b128 v[93:94], v[4:7]
	flat_store_b128 v[95:96], v[0:3]
.LBB3_46:                               ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_add_co_u32 v0, vcc_lo, v39, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v40, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, 0x20000, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_load_b32 v2, v[0:1] offset:308
	v_add_co_u32 v0, vcc_lo, v111, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v112, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 32
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc0 .LBB3_46
; %bb.47:                               ;   in Loop: Header=BB3_5 Depth=2
	v_add_co_u32 v111, vcc_lo, v111, 32
	v_add_co_ci_u32_e32 v112, vcc_lo, 0, v112, vcc_lo
	s_add_i32 s11, s11, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s11, 5
	s_cbranch_scc1 .LBB3_5
; %bb.48:                               ; %_Z11pbkdf2_testP12SHA256_CTX_WPjmS1_S1_S1_S1_S1_S1_S1_.exit.i.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b64 s[0:1], 0x202ac
.LBB3_49:                               ; %_Z11pbkdf2_testP12SHA256_CTX_WPjmS1_S1_S1_S1_S1_S1_S1_.exit.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v0, vcc_lo, v39, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v40, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 0x2032c
	flat_load_b32 v2, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_perm_b32 v2, 0, v2, 0x10203
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_49
; %bb.50:                               ; %.preheader26.i.i.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_add_co_u32 v24, vcc_lo, 0xe0, v39
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v40, vcc_lo
	s_mov_b32 s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v27, v25 :: v_dual_mov_b32 v26, v24
.LBB3_51:                               ; %.preheader26.i.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_52 Depth 3
	s_mov_b64 s[0:1], 0
.LBB3_52:                               ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_51 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v39, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v40, vcc_lo
	v_add_co_u32 v0, vcc_lo, 0x20000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_load_b32 v2, v[0:1] offset:684
	v_add_co_u32 v0, vcc_lo, v26, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v27, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x80
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_52
; %bb.53:                               ;   in Loop: Header=BB3_51 Depth=2
	v_dual_mov_b32 v0, v41 :: v_dual_mov_b32 v1, v42
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _Z8blockmixPj@rel32@lo+4
	s_addc_u32 s1, s1, _Z8blockmixPj@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v26, vcc_lo, 0x80, v26
	v_add_co_ci_u32_e32 v27, vcc_lo, 0, v27, vcc_lo
	s_add_i32 s7, s7, 1
	s_cmpk_lg_i32 s7, 0x400
	s_cbranch_scc1 .LBB3_51
; %bb.54:                               ; %.preheader.i26.i.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_add_co_u32 v26, vcc_lo, 0x202ec, v39
	v_add_co_ci_u32_e32 v27, vcc_lo, 0, v40, vcc_lo
	s_mov_b32 s7, 0
.LBB3_55:                               ; %.preheader.i26.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_56 Depth 3
	flat_load_b32 v0, v[26:27]
	s_mov_b64 s[0:1], 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v0, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 7, v0
	v_add_co_u32 v0, vcc_lo, v24, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v25, vcc_lo
.LBB3_56:                               ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_55 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, v41, s0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v42, vcc_lo
	s_add_u32 s0, s0, 4
	s_clause 0x1
	flat_load_b32 v2, v[2:3]
	flat_load_b32 v3, v[4:5]
	s_addc_u32 s1, s1, 0
	s_cmpk_eq_i32 s0, 0x80
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v2, v3, v2
	flat_store_b32 v[4:5], v2
	s_cbranch_scc0 .LBB3_56
; %bb.57:                               ;   in Loop: Header=BB3_55 Depth=2
	v_dual_mov_b32 v0, v41 :: v_dual_mov_b32 v1, v42
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _Z8blockmixPj@rel32@lo+4
	s_addc_u32 s1, s1, _Z8blockmixPj@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_add_i32 s7, s7, 1
	s_cmpk_lg_i32 s7, 0x400
	s_cbranch_scc1 .LBB3_55
; %bb.58:                               ; %_Z5romixPjiPA32_j.exit.i.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b64 s[0:1], 0x202ac
.LBB3_59:                               ; %_Z5romixPjiPA32_j.exit.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v0, vcc_lo, v39, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v40, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 0x2032c
	flat_load_b32 v2, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_perm_b32 v2, 0, v2, 0x10203
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_59
; %bb.60:                               ; %_Z11endian_fullPjm.exit29.i.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b64 s[0:1], 0
.LBB3_61:                               ; %_Z11endian_fullPjm.exit29.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v39, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v40, vcc_lo
	s_add_u32 s0, s0, 4
	v_add_co_u32 v0, vcc_lo, 0x20000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_addc_u32 s1, s1, 0
	s_cmpk_eq_i32 s0, 0x80
	flat_load_b32 v2, v[0:1] offset:684
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2 offset:224
	s_cbranch_scc0 .LBB3_61
; %bb.62:                               ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x1
	flat_load_b128 v[4:7], v[43:44]
	flat_load_b128 v[8:11], v[107:108]
	v_add_co_u32 v2, vcc_lo, 0x201e8, v39
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v40, vcc_lo
	v_add_co_u32 v12, vcc_lo, 0x20000, v39
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v61, v59 :: v_dual_mov_b32 v0, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v40, vcc_lo
	v_mov_b32_e32 v60, v59
	v_mov_b32_e32 v62, v59
	v_mov_b32_e32 v63, v59
	v_mov_b32_e32 v64, v59
	v_mov_b32_e32 v65, v59
	v_mov_b32_e32 v66, v59
	v_mov_b32_e32 v1, v3
	s_mov_b32 s0, 0
	flat_store_b32 v[12:13], v82 offset:352
	s_waitcnt vmcnt(1) lgkmcnt(2)
	v_xor_b32_e32 v51, 0x36363636, v4
	v_xor_b32_e32 v52, 0x36363636, v5
	v_xor_b32_e32 v53, 0x36363636, v6
	v_xor_b32_e32 v54, 0x36363636, v7
	s_waitcnt vmcnt(0) lgkmcnt(1)
	v_xor_b32_e32 v55, 0x36363636, v8
	v_xor_b32_e32 v56, 0x36363636, v9
	v_xor_b32_e32 v57, 0x36363636, v10
	v_xor_b32_e32 v58, 0x36363636, v11
.LBB3_63:                               ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_mov_b32 m0, s0
	s_add_i32 s0, s0, 1
	v_movrels_b32_e32 v12, v51
	s_cmp_lg_u32 s0, 16
	flat_store_b32 v[0:1], v12
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_cbranch_scc1 .LBB3_63
; %bb.64:                               ; %.lr.ph.i.i33.i.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b64 s[0:1], 0
.LBB3_65:                               ; %.lr.ph.i.i33.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v39, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v40, vcc_lo
	s_add_u32 s0, s0, 4
	v_add_co_u32 v0, vcc_lo, 0x20000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x84
	flat_load_b32 v12, v[0:1] offset:224
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v12 offset:552
	s_cbranch_scc1 .LBB3_65
; %bb.66:                               ; %._crit_edge.i.i35.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_add_co_u32 v0, vcc_lo, 0xfffdfd54, v41
	v_xor_b32_e32 v60, 0x5c5c5c5c, v4
	v_xor_b32_e32 v61, 0x5c5c5c5c, v5
	v_xor_b32_e32 v62, 0x5c5c5c5c, v6
	v_xor_b32_e32 v63, 0x5c5c5c5c, v7
	v_add_co_ci_u32_e32 v1, vcc_lo, -1, v42, vcc_lo
	v_dual_mov_b32 v69, v68 :: v_dual_mov_b32 v4, 49
	v_dual_mov_b32 v70, v68 :: v_dual_mov_b32 v5, 0
	v_dual_mov_b32 v71, v68 :: v_dual_mov_b32 v6, v47
	v_mov_b32_e32 v7, v48
	v_xor_b32_e32 v67, 0x5c5c5c5c, v11
	v_xor_b32_e32 v64, 0x5c5c5c5c, v8
	v_xor_b32_e32 v65, 0x5c5c5c5c, v9
	v_xor_b32_e32 v66, 0x5c5c5c5c, v10
	v_mov_b32_e32 v72, v68
	v_mov_b32_e32 v73, v68
	v_mov_b32_e32 v74, v68
	v_mov_b32_e32 v75, v68
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_@rel32@lo+4
	s_addc_u32 s1, s1, _Z15sha256_in_wordsP12SHA256_CTX_WPjmS1_@rel32@hi+12
	s_mov_b32 s11, 0
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v0, v79 :: v_dual_mov_b32 v1, v80
.LBB3_67:                               ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_mov_b32 m0, s11
	s_add_i32 s11, s11, 1
	v_movrels_b32_e32 v2, v60
	s_cmp_lg_u32 s11, 16
	flat_store_b32 v[0:1], v2
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_cbranch_scc1 .LBB3_67
; %bb.68:                               ; %.lr.ph114.i.i.i.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b64 s[0:1], 0
.LBB3_69:                               ; %.lr.ph114.i.i.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v39, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v40, vcc_lo
	s_add_u32 s0, s0, 4
	v_add_co_u32 v0, vcc_lo, 0x20000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x84
	flat_load_b32 v2, v[0:1] offset:812
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2 offset:940
	s_cbranch_scc1 .LBB3_69
; %bb.70:                               ; %._crit_edge115.i.i.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x5
	flat_load_b128 v[0:3], v[79:80]
	flat_load_b128 v[4:7], v[97:98]
	flat_load_b128 v[10:13], v[99:100]
	flat_load_b128 v[14:17], v[101:102]
	flat_load_b128 v[18:21], v[103:104]
	flat_load_b128 v[22:25], v[105:106]
	v_mov_b32_e32 v26, 0
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_mov_b32_e32 v77, v26
	v_mov_b32_e32 v27, v26
	s_clause 0x1
	flat_store_b32 v[39:40], v26 offset:64
	flat_store_b64 v[39:40], v[26:27] offset:72
	s_waitcnt vmcnt(5) lgkmcnt(7)
	scratch_store_b128 off, v[0:3], off offset:272
	s_waitcnt vmcnt(4) lgkmcnt(6)
	scratch_store_b128 off, v[4:7], off offset:288
	s_waitcnt vmcnt(3) lgkmcnt(5)
	scratch_store_b128 off, v[10:13], off offset:304
	s_waitcnt vmcnt(2) lgkmcnt(4)
	scratch_store_b128 off, v[14:17], off offset:320
	s_waitcnt vmcnt(1) lgkmcnt(3)
	scratch_store_b128 off, v[18:21], off offset:336
	s_waitcnt vmcnt(0) lgkmcnt(2)
	scratch_store_b128 off, v[22:25], off offset:352
	s_clause 0x1
	flat_store_b128 v[39:40], v[83:86] offset:80
	flat_store_b128 v[39:40], v[87:90] offset:96
.LBB3_71:                               ; %.lr.ph.i.i.i.i36.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_73 Depth 3
                                        ;       Child Loop BB3_75 Depth 3
                                        ;       Child Loop BB3_77 Depth 3
	s_lshl_b32 s0, s2, 2
	v_lshlrev_b64 v[0:1], 2, v[77:78]
	s_addk_i32 s0, 0x110
	s_mov_b32 s3, exec_lo
	scratch_load_b32 v2, off, s0
	v_add_co_u32 v0, vcc_lo, v39, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v40, v1, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_b32 v[0:1], v2
	flat_load_b32 v0, v[39:40] offset:64
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v77, 1, v0
	flat_store_b32 v[39:40], v77 offset:64
	v_cmpx_eq_u32_e32 16, v77
	s_cbranch_execz .LBB3_79
; %bb.72:                               ;   in Loop: Header=BB3_71 Depth=2
	v_dual_mov_b32 v0, v39 :: v_dual_mov_b32 v1, v40
	s_mov_b32 s0, 0
.LBB3_73:                               ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_71 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s1, s0, 16
	s_add_i32 s0, s0, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 64
	s_waitcnt vmcnt(0) lgkmcnt(0)
	scratch_store_b32 off, v2, s1
	s_cbranch_scc0 .LBB3_73
; %bb.74:                               ; %.lr.ph.preheader.i.i.i.i.i88.i
                                        ;   in Loop: Header=BB3_71 Depth=2
	scratch_load_b32 v0, off, off offset:16
	s_mov_b32 s0, 0
.LBB3_75:                               ; %.lr.ph.i.i.i.i.i90.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_71 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_readfirstlane_b32 s1, v113
	s_delay_alu instid0(VALU_DEP_1)
	s_add_i32 s1, s1, s0
	s_add_i32 s0, s0, 4
	s_add_i32 s4, s1, 56
	s_add_i32 s6, s1, 4
	s_add_i32 s5, s1, 36
	s_clause 0x2
	scratch_load_b32 v1, off, s4
	scratch_load_b32 v2, off, s6
	scratch_load_b32 v3, off, s5
	s_add_i32 s1, s1, 64
	s_cmpk_lg_i32 s0, 0xc0
	s_waitcnt vmcnt(2)
	v_alignbit_b32 v4, v1, v1, 17
	v_alignbit_b32 v5, v1, v1, 19
	v_lshrrev_b32_e32 v1, 10, v1
	s_waitcnt vmcnt(1)
	v_alignbit_b32 v6, v2, v2, 7
	v_alignbit_b32 v7, v2, v2, 18
	v_lshrrev_b32_e32 v10, 3, v2
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v3, v0
	v_xor3_b32 v1, v4, v5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v3, v6, v7, v10
	v_add3_u32 v1, v0, v1, v3
	v_mov_b32_e32 v0, v2
	scratch_store_b32 off, v1, s1
	s_cbranch_scc1 .LBB3_75
; %bb.76:                               ; %._crit_edge.i.i.i.i.i93.i
                                        ;   in Loop: Header=BB3_71 Depth=2
	s_clause 0x1
	flat_load_b128 v[4:7], v[39:40] offset:80
	flat_load_b128 v[0:3], v[39:40] offset:96
	s_mov_b32 s4, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@lo+4
	s_addc_u32 s1, s1, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@hi+12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v20, v4 :: v_dual_mov_b32 v15, v3
	v_dual_mov_b32 v10, v5 :: v_dual_mov_b32 v17, v2
	v_dual_mov_b32 v21, v1 :: v_dual_mov_b32 v18, v6
	v_mov_b32_e32 v19, v0
	v_mov_b32_e32 v11, v7
.LBB3_77:                               ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_71 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s5, s4, 16
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v14, v19 :: v_dual_mov_b32 v13, v21
	scratch_load_b32 v22, off, s5
	v_dual_mov_b32 v23, v11 :: v_dual_mov_b32 v12, v17
	v_mov_b32_e32 v16, v10
	v_dual_mov_b32 v10, v20 :: v_dual_mov_b32 v11, v18
	s_load_b32 s5, s[0:1], 0x0
	v_and_b32_e32 v20, v14, v13
	v_alignbit_b32 v17, v14, v14, 6
	v_alignbit_b32 v18, v14, v14, 11
	v_alignbit_b32 v19, v14, v14, 25
	v_not_b32_e32 v21, v14
	v_add_nc_u32_e32 v15, v20, v15
	v_xor_b32_e32 v26, v11, v16
	v_and_b32_e32 v20, v11, v16
	v_xor3_b32 v17, v17, v18, v19
	v_and_b32_e32 v18, v12, v21
	v_alignbit_b32 v24, v10, v10, 2
	v_and_b32_e32 v21, v26, v10
	v_alignbit_b32 v25, v10, v10, 13
	v_alignbit_b32 v19, v10, v10, 22
	s_add_i32 s4, s4, 4
	s_add_u32 s0, s0, 4
	v_xor_b32_e32 v20, v21, v20
	v_mov_b32_e32 v21, v14
	v_add3_u32 v15, v15, v18, v17
	v_mov_b32_e32 v18, v16
	v_xor3_b32 v24, v24, v25, v19
	v_mov_b32_e32 v17, v13
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s4, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add3_u32 v22, v15, s5, v22
	v_mov_b32_e32 v15, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v19, v22, v23
	v_add3_u32 v20, v20, v24, v22
	s_cbranch_scc1 .LBB3_77
; %bb.78:                               ; %_Z22sha256_transform_wordsP12SHA256_CTX_WPj.exit.i.i.i.i104.i
                                        ;   in Loop: Header=BB3_71 Depth=2
	v_add_co_u32 v8, vcc_lo, 0x200, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v77, 0 :: v_dual_add_nc_u32 v4, v20, v4
	v_add_nc_u32_e32 v5, v10, v5
	v_add_nc_u32_e32 v6, v16, v6
	v_add_nc_u32_e32 v7, v11, v7
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	v_add_nc_u32_e32 v0, v19, v0
	v_add_nc_u32_e32 v1, v14, v1
	v_add_nc_u32_e32 v2, v13, v2
	v_add_nc_u32_e32 v3, v12, v3
	s_clause 0x3
	flat_store_b128 v[39:40], v[4:7] offset:80
	flat_store_b128 v[39:40], v[0:3] offset:96
	flat_store_b64 v[39:40], v[8:9] offset:72
	flat_store_b32 v[39:40], v78 offset:64
.LBB3_79:                               ; %Flow1332
                                        ;   in Loop: Header=BB3_71 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s2, 24
	s_cbranch_scc1 .LBB3_71
; %bb.80:                               ; %_Z19sha256_update_wordsP12SHA256_CTX_WPjm.exit.i.i.i38.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_lshlrev_b64 v[0:1], 2, v[77:78]
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v39, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, v40, v1, vcc_lo
	flat_store_b32 v[2:3], v114
	v_cmpx_lt_u32_e32 13, v77
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB3_91
; %bb.81:                               ;   in Loop: Header=BB3_2 Depth=1
	v_add_nc_u32_e32 v0, 1, v77
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 16, v0
	s_cbranch_execz .LBB3_84
; %bb.82:                               ; %.lr.ph.i24.i.i.i79.i.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v1, v78 :: v_dual_mov_b32 v2, v77
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v39, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v40, v1, vcc_lo
.LBB3_83:                               ; %.lr.ph.i24.i.i.i79.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v2, 1, v2
	flat_store_b32 v[0:1], v78
	v_add_co_u32 v0, s0, v0, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
	v_cmp_lt_u32_e32 vcc_lo, 14, v2
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_83
.LBB3_84:                               ; %Flow1326
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v0, 16
	s_mov_b64 s[0:1], 0
.LBB3_85:                               ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v1, vcc_lo, v39, s0
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v40, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 64
	flat_load_b32 v1, v[1:2]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	scratch_store_b32 v0, v1, off
	v_add_nc_u32_e32 v0, 4, v0
	s_cbranch_scc0 .LBB3_85
; %bb.86:                               ; %.lr.ph.preheader.i.i7.i.i.i43.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	scratch_load_b32 v0, off, off offset:16
	s_mov_b32 s0, 0
.LBB3_87:                               ; %.lr.ph.i.i9.i.i.i45.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_readfirstlane_b32 s1, v113
	s_delay_alu instid0(VALU_DEP_1)
	s_add_i32 s1, s1, s0
	s_add_i32 s0, s0, 4
	s_add_i32 s3, s1, 56
	s_add_i32 s5, s1, 4
	s_add_i32 s4, s1, 36
	s_clause 0x2
	scratch_load_b32 v1, off, s3
	scratch_load_b32 v2, off, s5
	scratch_load_b32 v3, off, s4
	s_add_i32 s1, s1, 64
	s_cmpk_lg_i32 s0, 0xc0
	s_waitcnt vmcnt(2)
	v_alignbit_b32 v4, v1, v1, 17
	v_alignbit_b32 v5, v1, v1, 19
	v_lshrrev_b32_e32 v1, 10, v1
	s_waitcnt vmcnt(1)
	v_alignbit_b32 v6, v2, v2, 7
	v_alignbit_b32 v7, v2, v2, 18
	v_lshrrev_b32_e32 v10, 3, v2
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v3, v0
	v_xor3_b32 v1, v4, v5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v3, v6, v7, v10
	v_add3_u32 v1, v0, v1, v3
	v_mov_b32_e32 v0, v2
	scratch_store_b32 off, v1, s1
	s_cbranch_scc1 .LBB3_87
; %bb.88:                               ; %._crit_edge.i.i12.i.i.i48.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x1
	flat_load_b128 v[4:7], v[39:40] offset:80
	flat_load_b128 v[0:3], v[39:40] offset:96
	s_mov_b32 s3, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@lo+4
	s_addc_u32 s1, s1, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@hi+12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v20, v4 :: v_dual_mov_b32 v15, v3
	v_dual_mov_b32 v10, v5 :: v_dual_mov_b32 v17, v2
	v_dual_mov_b32 v21, v1 :: v_dual_mov_b32 v12, v7
	v_dual_mov_b32 v19, v0 :: v_dual_mov_b32 v18, v6
.LBB3_89:                               ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_add_i32 s4, s3, 16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v23, v12 :: v_dual_mov_b32 v14, v19
	scratch_load_b32 v22, off, s4
	v_dual_mov_b32 v13, v21 :: v_dual_mov_b32 v16, v10
	v_dual_mov_b32 v11, v17 :: v_dual_mov_b32 v10, v20
	s_load_b32 s4, s[0:1], 0x0
	v_and_b32_e32 v20, v14, v13
	v_mov_b32_e32 v12, v18
	v_alignbit_b32 v17, v14, v14, 6
	v_alignbit_b32 v18, v14, v14, 11
	v_alignbit_b32 v19, v14, v14, 25
	v_add_nc_u32_e32 v15, v20, v15
	v_not_b32_e32 v21, v14
	v_xor_b32_e32 v26, v12, v16
	v_and_b32_e32 v20, v12, v16
	v_xor3_b32 v17, v17, v18, v19
	v_alignbit_b32 v24, v10, v10, 2
	v_and_b32_e32 v18, v11, v21
	v_and_b32_e32 v21, v26, v10
	v_alignbit_b32 v25, v10, v10, 13
	v_alignbit_b32 v19, v10, v10, 22
	s_add_i32 s3, s3, 4
	s_add_u32 s0, s0, 4
	v_xor_b32_e32 v20, v21, v20
	v_mov_b32_e32 v21, v14
	v_add3_u32 v15, v15, v18, v17
	v_mov_b32_e32 v18, v16
	v_xor3_b32 v24, v24, v25, v19
	v_mov_b32_e32 v17, v13
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s3, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add3_u32 v22, v15, s4, v22
	v_mov_b32_e32 v15, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v19, v22, v23
	v_add3_u32 v20, v20, v24, v22
	s_cbranch_scc1 .LBB3_89
; %bb.90:                               ; %_Z22sha256_transform_wordsP12SHA256_CTX_WPj.exit.i23.i.i.i59.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_add_nc_u32_e32 v4, v20, v4
	v_add_nc_u32_e32 v5, v10, v5
	v_add_nc_u32_e32 v6, v16, v6
	v_add_nc_u32_e32 v7, v12, v7
	v_dual_mov_b32 v79, v78 :: v_dual_add_nc_u32 v0, v19, v0
	v_add_nc_u32_e32 v1, v14, v1
	v_add_nc_u32_e32 v2, v13, v2
	v_dual_mov_b32 v10, s16 :: v_dual_add_nc_u32 v3, v11, v3
	v_dual_mov_b32 v11, s17 :: v_dual_mov_b32 v12, s18
	v_mov_b32_e32 v13, s19
	s_clause 0x5
	flat_store_b128 v[39:40], v[4:7] offset:80
	flat_store_b128 v[39:40], v[0:3] offset:96
	flat_store_b128 v[39:40], v[10:13]
	flat_store_b128 v[39:40], v[10:13] offset:16
	flat_store_b128 v[39:40], v[10:13] offset:32
	flat_store_b64 v[39:40], v[78:79] offset:48
                                        ; implicit-def: $vgpr117
                                        ; implicit-def: $vgpr0_vgpr1
                                        ; implicit-def: $vgpr118
.LBB3_91:                               ; %Flow1331
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_and_not1_saveexec_b32 s1, s2
	s_cbranch_execz .LBB3_96
; %bb.92:                               ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s2, exec_lo
	v_cmpx_ne_u32_e32 13, v77
	s_cbranch_execz .LBB3_95
; %bb.93:                               ; %.lr.ph79.i.i.i.i83.i.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_add_co_u32 v0, vcc_lo, v117, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v118, v1, vcc_lo
	v_add_nc_u32_e32 v2, -1, v77
	s_mov_b32 s3, 0
.LBB3_94:                               ; %.lr.ph79.i.i.i.i83.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, 1, v2
	flat_store_b32 v[0:1], v78
	v_add_co_u32 v0, s0, v0, 4
	v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
	v_cmp_lt_u32_e32 vcc_lo, 11, v2
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_94
.LBB3_95:                               ; %Flow1329
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_96:                               ; %.loopexit.i.i.i.i60.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s1
	flat_load_b32 v0, v[39:40] offset:64
	s_mov_b32 s0, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_lshlrev_b32_e32 v0, 5, v0
	v_add_co_u32 v2, vcc_lo, v8, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v0, v39 :: v_dual_mov_b32 v5, v2
	v_dual_mov_b32 v1, v40 :: v_dual_mov_b32 v4, v3
	s_clause 0x1
	flat_store_b64 v[39:40], v[2:3] offset:72
	flat_store_b64 v[39:40], v[4:5] offset:56
.LBB3_97:                               ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s1, s0, 16
	s_add_i32 s0, s0, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 64
	s_waitcnt vmcnt(0) lgkmcnt(0)
	scratch_store_b32 off, v2, s1
	s_cbranch_scc0 .LBB3_97
; %bb.98:                               ; %.lr.ph.preheader.i55.i.i.i.i63.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	scratch_load_b32 v0, off, off offset:16
	s_mov_b32 s0, 0
.LBB3_99:                               ; %.lr.ph.i57.i.i.i.i65.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_readfirstlane_b32 s1, v113
	s_delay_alu instid0(VALU_DEP_1)
	s_add_i32 s1, s1, s0
	s_add_i32 s0, s0, 4
	s_add_i32 s2, s1, 56
	s_add_i32 s4, s1, 4
	s_add_i32 s3, s1, 36
	s_clause 0x2
	scratch_load_b32 v1, off, s2
	scratch_load_b32 v2, off, s4
	scratch_load_b32 v3, off, s3
	s_add_i32 s1, s1, 64
	s_cmpk_lg_i32 s0, 0xc0
	s_waitcnt vmcnt(2)
	v_alignbit_b32 v4, v1, v1, 17
	v_alignbit_b32 v5, v1, v1, 19
	v_lshrrev_b32_e32 v1, 10, v1
	s_waitcnt vmcnt(1)
	v_alignbit_b32 v6, v2, v2, 7
	v_alignbit_b32 v7, v2, v2, 18
	v_lshrrev_b32_e32 v8, 3, v2
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v3, v0
	v_xor3_b32 v1, v4, v5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v3, v6, v7, v8
	v_add3_u32 v1, v0, v1, v3
	v_mov_b32_e32 v0, v2
	scratch_store_b32 off, v1, s1
	s_cbranch_scc1 .LBB3_99
; %bb.100:                              ; %._crit_edge.i60.i.i.i.i68.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x1
	flat_load_b128 v[4:7], v[39:40] offset:80
	flat_load_b128 v[0:3], v[39:40] offset:96
	s_mov_b32 s2, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@lo+4
	s_addc_u32 s1, s1, _ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k@rel32@hi+12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v18, v4 :: v_dual_mov_b32 v13, v3
	v_dual_mov_b32 v8, v5 :: v_dual_mov_b32 v15, v2
	v_dual_mov_b32 v19, v1 :: v_dual_mov_b32 v16, v6
	v_mov_b32_e32 v17, v0
	v_mov_b32_e32 v9, v7
.LBB3_101:                              ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_add_i32 s3, s2, 16
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v12, v17 :: v_dual_mov_b32 v11, v19
	scratch_load_b32 v20, off, s3
	v_dual_mov_b32 v21, v9 :: v_dual_mov_b32 v10, v15
	v_mov_b32_e32 v14, v8
	v_dual_mov_b32 v8, v18 :: v_dual_mov_b32 v9, v16
	s_load_b32 s3, s[0:1], 0x0
	v_and_b32_e32 v18, v12, v11
	v_alignbit_b32 v15, v12, v12, 6
	v_alignbit_b32 v16, v12, v12, 11
	v_alignbit_b32 v17, v12, v12, 25
	v_not_b32_e32 v19, v12
	v_add_nc_u32_e32 v13, v18, v13
	v_xor_b32_e32 v24, v9, v14
	v_and_b32_e32 v18, v9, v14
	v_xor3_b32 v15, v15, v16, v17
	v_and_b32_e32 v16, v10, v19
	v_alignbit_b32 v22, v8, v8, 2
	v_and_b32_e32 v19, v24, v8
	v_alignbit_b32 v23, v8, v8, 13
	v_alignbit_b32 v17, v8, v8, 22
	s_add_i32 s2, s2, 4
	s_add_u32 s0, s0, 4
	v_xor_b32_e32 v18, v19, v18
	v_mov_b32_e32 v19, v12
	v_add3_u32 v13, v13, v16, v15
	v_mov_b32_e32 v16, v14
	v_xor3_b32 v22, v22, v23, v17
	v_mov_b32_e32 v15, v11
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s2, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add3_u32 v20, v13, s3, v20
	v_mov_b32_e32 v13, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v17, v20, v21
	v_add3_u32 v18, v18, v22, v20
	s_cbranch_scc1 .LBB3_101
; %bb.102:                              ; %_Z6hmac_2P12SHA256_CTX_WPjmS1_mS1_S1_S1_S1_S1_.exit.i.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v18, v4
	v_add_nc_u32_e32 v5, v8, v5
	v_add_nc_u32_e32 v6, v14, v6
	v_add_nc_u32_e32 v7, v9, v7
	v_add_nc_u32_e32 v0, v17, v0
	v_add_nc_u32_e32 v1, v12, v1
	v_add_nc_u32_e32 v2, v11, v2
	v_add_nc_u32_e32 v3, v10, v3
	s_mov_b64 s[0:1], 0
	s_clause 0x4
	flat_store_b128 v[39:40], v[4:7] offset:80
	flat_store_b128 v[39:40], v[0:3] offset:96
	flat_store_b128 v[93:94], v[4:7]
	flat_store_b128 v[95:96], v[0:3]
	flat_store_b32 v[39:40], v4 offset:192
.LBB3_103:                              ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v39, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v40, vcc_lo
	s_add_u32 s0, s0, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x20000, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 32
	flat_load_b32 v2, v[2:3] offset:308
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2 offset:192
	s_cbranch_scc1 .LBB3_103
; %bb.104:                              ; %_Z6scryptP12SHA256_CTX_WPjmS1_PA32_jS1_S1_S1_S1_S1_S1_S1_S1_.exit
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_cmpk_eq_i32 s12, 0x4b
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s10, s0
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB3_492
; %bb.105:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[0:1], v[91:92], off
	v_dual_mov_b32 v77, v116 :: v_dual_mov_b32 v12, 0
	v_mov_b32_e32 v13, 0
	s_waitcnt vmcnt(0)
	s_clause 0x1
	flat_load_b128 v[4:7], v[0:1] offset:192
	flat_load_b128 v[0:3], v[0:1] offset:208
	s_load_b64 s[2:3], s[46:47], 0x50
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v77
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v77
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_111
; %bb.106:                              ;   in Loop: Header=BB3_2 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[10:11], v78, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[8:9], v78, s[2:3] offset:40
	global_load_b64 v[12:13], v78, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v9, v9, v11
	v_and_b32_e32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v9, v9, 24
	v_mul_hi_u32 v14, v8, 24
	v_mul_lo_u32 v8, v8, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v9, v14, v9
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v12, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v13, v9, vcc_lo
	global_load_b64 v[8:9], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[12:13], v78, v[8:11], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[12:13], v[10:11]
	s_cbranch_execz .LBB3_110
; %bb.107:                              ; %.preheader3.i.i.i.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s5, 0
.LBB3_108:                              ; %.preheader3.i.i.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[8:9], v78, s[2:3] offset:40
	global_load_b64 v[14:15], v78, s[2:3]
	v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v8, v8, v10
	v_and_b32_e32 v9, v9, v11
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[12:13], null, v8, 24, v[14:15]
	v_mov_b32_e32 v8, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[13:14], null, v9, 24, v[8:9]
	global_load_b64 v[8:9], v[12:13], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[12:13], v78, v[8:11], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[10:11]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_108
; %bb.109:                              ; %Flow1320
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB3_110:                              ; %Flow1322
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_111:                              ; %.loopexit4.i.i.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[14:15], v78, s[2:3] offset:40
	global_load_b128 v[8:11], v78, s[2:3]
	v_readfirstlane_b32 s4, v12
	v_readfirstlane_b32 s5, v13
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v14
	v_readfirstlane_b32 s7, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB3_113
; %bb.112:                              ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v79, s13 :: v_dual_mov_b32 v80, v78
	s_add_i32 s13, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v8, s9
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v9, vcc_lo
	global_store_b128 v[12:13], v[79:82], off offset:8
.LBB3_113:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[12:13], 6, v[77:78]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v10, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
	s_mov_b32 s17, s16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, v10, v12
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_add_co_ci_u32_e32 v15, vcc_lo, v11, v13, vcc_lo
	v_dual_mov_b32 v77, v78 :: v_dual_mov_b32 v10, s16
	v_dual_mov_b32 v79, v78 :: v_dual_mov_b32 v12, s18
	v_mov_b32_e32 v11, s17
	v_mov_b32_e32 v13, s19
	s_clause 0x3
	global_store_b128 v[14:15], v[76:79], off
	global_store_b128 v[14:15], v[10:13], off offset:16
	global_store_b128 v[14:15], v[10:13], off offset:32
	global_store_b128 v[14:15], v[10:13], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_121
; %bb.114:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x1
	global_load_b64 v[20:21], v78, s[2:3] offset:32 glc
	global_load_b64 v[10:11], v78, s[2:3] offset:40
	s_mov_b32 s7, exec_lo
	v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v11, s5, v11
	v_and_b32_e32 v10, s4, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v11, v11, 24
	v_mul_hi_u32 v12, v10, 24
	v_mul_lo_u32 v10, v10, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v12, v11
	v_add_co_u32 v16, vcc_lo, v8, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, v9, v11, vcc_lo
	global_store_b64 v[16:17], v[20:21], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[12:13], v78, v[18:21], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[12:13], v[20:21]
	s_cbranch_execz .LBB3_117
; %bb.115:                              ; %.preheader1.i.i.i.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s13, 0
.LBB3_116:                              ; %.preheader1.i.i.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v10, s4 :: v_dual_mov_b32 v11, s5
	s_sleep 1
	global_store_b64 v[16:17], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v78, v[10:13], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[12:13]
	v_dual_mov_b32 v13, v11 :: v_dual_mov_b32 v12, v10
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB3_116
.LBB3_117:                              ; %Flow1318
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[10:11], v78, s[2:3] offset:16
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v12, s13, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v12
	s_cbranch_execz .LBB3_119
; %bb.118:                              ;   in Loop: Header=BB3_2 Depth=1
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v77, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[10:11], v[77:78], off offset:8
.LBB3_119:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[12:13], v[10:11], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[12:13]
	s_cbranch_vccnz .LBB3_121
; %bb.120:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b32 v77, v[10:11], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v77
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[12:13], v[77:78], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_121:                              ; %Flow1319
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v8, vcc_lo, v8, s9
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v8, 20
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
.LBB3_122:                              ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v10, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_124
; %bb.123:                              ;   in Loop: Header=BB3_122 Depth=2
	global_load_b32 v10, v[8:9], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v10, 1, v10
.LBB3_124:                              ;   in Loop: Header=BB3_122 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v10
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_126
; %bb.125:                              ;   in Loop: Header=BB3_122 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_127
.LBB3_126:                              ;   in Loop: Header=BB3_122 Depth=2
	s_mov_b32 s1, -1
.LBB3_127:                              ; %Flow1313
                                        ;   in Loop: Header=BB3_122 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_122
; %bb.128:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[8:9], v[14:15], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_132
; %bb.129:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x2
	global_load_b64 v[12:13], v78, s[2:3] offset:40
	global_load_b64 v[16:17], v78, s[2:3] offset:24 glc
	global_load_b64 v[14:15], v78, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v18, vcc_lo, v12, 1
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v18, s4
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11]
	v_dual_cndmask_b32 v11, v11, v19 :: v_dual_cndmask_b32 v10, v10, v18
	v_and_b32_e32 v13, v11, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v12, v10, v12
	v_mul_hi_u32 v18, v12, 24
	v_mul_lo_u32 v12, v12, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v14, vcc_lo, v14, v12
	v_mov_b32_e32 v12, v16
	v_mul_lo_u32 v13, v13, 24
	v_add_nc_u32_e32 v13, v18, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v15, vcc_lo, v15, v13, vcc_lo
	v_mov_b32_e32 v13, v17
	global_store_b64 v[14:15], v[16:17], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[12:13], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[12:13], v[16:17]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_132
; %bb.130:                              ; %.preheader.i.i.i.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s0, 0
.LBB3_131:                              ; %.preheader.i.i.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[14:15], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[16:17], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[16:17], v[12:13]
	v_dual_mov_b32 v12, v16 :: v_dual_mov_b32 v13, v17
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_131
.LBB3_132:                              ; %__ockl_printf_begin.exit
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, .str.6@rel32@lo+4
	s_addc_u32 s5, s5, .str.6@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[4:5], 0
	s_cbranch_scc0 .LBB3_219
; %bb.133:                              ;   in Loop: Header=BB3_2 Depth=1
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v11, v9 :: v_dual_and_b32 v32, 2, v8
	v_and_b32_e32 v10, -3, v8
	s_mov_b64 s[6:7], 51
.LBB3_134:                              ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_137 Depth 3
                                        ;       Child Loop BB3_145 Depth 3
                                        ;       Child Loop BB3_153 Depth 3
                                        ;       Child Loop BB3_161 Depth 3
                                        ;       Child Loop BB3_169 Depth 3
                                        ;       Child Loop BB3_177 Depth 3
                                        ;       Child Loop BB3_185 Depth 3
                                        ;       Child Loop BB3_193 Depth 3
                                        ;       Child Loop BB3_201 Depth 3
                                        ;       Child Loop BB3_207 Depth 3
                                        ;       Child Loop BB3_216 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u64_e64 s0, s[6:7], 56
	s_and_b32 s0, s0, exec_lo
	s_cselect_b32 s8, s6, 56
	s_cselect_b32 s9, s7, 0
	s_cmp_gt_u32 s8, 7
	s_cbranch_scc1 .LBB3_139
; %bb.135:                              ;   in Loop: Header=BB3_134 Depth=2
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v12, 0
	v_mov_b32_e32 v13, 0
	s_cmp_eq_u32 s8, 0
	s_cbranch_scc1 .LBB3_138
; %bb.136:                              ; %.preheader31.i.preheader
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_lshl_b64 s[0:1], s[8:9], 3
	s_mov_b64 s[14:15], 0
	s_mov_b64 s[18:19], s[4:5]
.LBB3_137:                              ; %.preheader31.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_134 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_u8 v14, v78, s[18:19]
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v77, 0xffff, v14
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[14:15], s14, v[77:78]
	s_add_u32 s14, s14, 8
	s_addc_u32 s15, s15, 0
	s_add_u32 s18, s18, 1
	s_addc_u32 s19, s19, 0
	s_cmp_lg_u32 s0, s14
	v_or_b32_e32 v12, v14, v12
	v_or_b32_e32 v13, v15, v13
	s_cbranch_scc1 .LBB3_137
.LBB3_138:                              ; %Flow1289
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s0, 0
	s_mov_b32 s13, 0
	s_branch .LBB3_140
.LBB3_139:                              ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr12_vgpr13
                                        ; implicit-def: $sgpr13
.LBB3_140:                              ; %Flow1291
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_mov_b64 s[0:1], s[4:5]
	s_cbranch_vccnz .LBB3_142
; %bb.141:                              ;   in Loop: Header=BB3_134 Depth=2
	global_load_b64 v[12:13], v78, s[4:5]
	s_add_i32 s13, s8, -8
	s_add_u32 s0, s4, 8
	s_addc_u32 s1, s5, 0
.LBB3_142:                              ; %.loopexit32.i
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_cmp_gt_u32 s13, 7
	s_cbranch_scc1 .LBB3_147
; %bb.143:                              ;   in Loop: Header=BB3_134 Depth=2
	v_mov_b32_e32 v14, 0
	v_mov_b32_e32 v15, 0
	s_cmp_eq_u32 s13, 0
	s_cbranch_scc1 .LBB3_146
; %bb.144:                              ; %.preheader29.i.preheader
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b64 s[14:15], 0
	s_mov_b64 s[18:19], 0
.LBB3_145:                              ; %.preheader29.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_134 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s20, s0, s18
	s_addc_u32 s21, s1, s19
	s_add_u32 s18, s18, 1
	global_load_u8 v16, v78, s[20:21]
	s_addc_u32 s19, s19, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v77, 0xffff, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], s14, v[77:78]
	s_add_u32 s14, s14, 8
	s_addc_u32 s15, s15, 0
	s_cmp_lg_u32 s13, s18
	v_or_b32_e32 v14, v16, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v15, v17, v15
	s_cbranch_scc1 .LBB3_145
.LBB3_146:                              ; %Flow1284
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s14, 0
	s_mov_b32 s17, 0
	s_branch .LBB3_148
.LBB3_147:                              ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s14, -1
                                        ; implicit-def: $vgpr14_vgpr15
                                        ; implicit-def: $sgpr17
.LBB3_148:                              ; %Flow1286
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB3_150
; %bb.149:                              ;   in Loop: Header=BB3_134 Depth=2
	global_load_b64 v[14:15], v78, s[0:1]
	s_add_i32 s17, s13, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB3_150:                              ; %.loopexit30.i
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_cmp_gt_u32 s17, 7
	s_cbranch_scc1 .LBB3_155
; %bb.151:                              ;   in Loop: Header=BB3_134 Depth=2
	v_mov_b32_e32 v16, 0
	v_mov_b32_e32 v17, 0
	s_cmp_eq_u32 s17, 0
	s_cbranch_scc1 .LBB3_154
; %bb.152:                              ; %.preheader27.i.preheader
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b64 s[14:15], 0
	s_mov_b64 s[18:19], 0
.LBB3_153:                              ; %.preheader27.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_134 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s20, s0, s18
	s_addc_u32 s21, s1, s19
	s_add_u32 s18, s18, 1
	global_load_u8 v18, v78, s[20:21]
	s_addc_u32 s19, s19, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v77, 0xffff, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[18:19], s14, v[77:78]
	s_add_u32 s14, s14, 8
	s_addc_u32 s15, s15, 0
	s_cmp_lg_u32 s17, s18
	v_or_b32_e32 v16, v18, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v17, v19, v17
	s_cbranch_scc1 .LBB3_153
.LBB3_154:                              ; %Flow1279
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s14, 0
	s_mov_b32 s13, 0
	s_branch .LBB3_156
.LBB3_155:                              ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s14, -1
                                        ; implicit-def: $sgpr13
.LBB3_156:                              ; %Flow1281
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB3_158
; %bb.157:                              ;   in Loop: Header=BB3_134 Depth=2
	global_load_b64 v[16:17], v78, s[0:1]
	s_add_i32 s13, s17, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB3_158:                              ; %.loopexit28.i
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_cmp_gt_u32 s13, 7
	s_cbranch_scc1 .LBB3_163
; %bb.159:                              ;   in Loop: Header=BB3_134 Depth=2
	v_mov_b32_e32 v18, 0
	v_mov_b32_e32 v19, 0
	s_cmp_eq_u32 s13, 0
	s_cbranch_scc1 .LBB3_162
; %bb.160:                              ; %.preheader25.i.preheader
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b64 s[14:15], 0
	s_mov_b64 s[18:19], 0
.LBB3_161:                              ; %.preheader25.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_134 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s20, s0, s18
	s_addc_u32 s21, s1, s19
	s_add_u32 s18, s18, 1
	global_load_u8 v20, v78, s[20:21]
	s_addc_u32 s19, s19, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v77, 0xffff, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], s14, v[77:78]
	s_add_u32 s14, s14, 8
	s_addc_u32 s15, s15, 0
	s_cmp_lg_u32 s13, s18
	v_or_b32_e32 v18, v20, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v19, v21, v19
	s_cbranch_scc1 .LBB3_161
.LBB3_162:                              ; %Flow1274
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s14, 0
	s_mov_b32 s17, 0
	s_branch .LBB3_164
.LBB3_163:                              ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s14, -1
                                        ; implicit-def: $vgpr18_vgpr19
                                        ; implicit-def: $sgpr17
.LBB3_164:                              ; %Flow1276
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB3_166
; %bb.165:                              ;   in Loop: Header=BB3_134 Depth=2
	global_load_b64 v[18:19], v78, s[0:1]
	s_add_i32 s17, s13, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB3_166:                              ; %.loopexit26.i
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_cmp_gt_u32 s17, 7
	s_cbranch_scc1 .LBB3_171
; %bb.167:                              ;   in Loop: Header=BB3_134 Depth=2
	v_mov_b32_e32 v20, 0
	v_mov_b32_e32 v21, 0
	s_cmp_eq_u32 s17, 0
	s_cbranch_scc1 .LBB3_170
; %bb.168:                              ; %.preheader23.i.preheader
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b64 s[14:15], 0
	s_mov_b64 s[18:19], 0
.LBB3_169:                              ; %.preheader23.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_134 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s20, s0, s18
	s_addc_u32 s21, s1, s19
	s_add_u32 s18, s18, 1
	global_load_u8 v22, v78, s[20:21]
	s_addc_u32 s19, s19, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v77, 0xffff, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], s14, v[77:78]
	s_add_u32 s14, s14, 8
	s_addc_u32 s15, s15, 0
	s_cmp_lg_u32 s17, s18
	v_or_b32_e32 v20, v22, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v21, v23, v21
	s_cbranch_scc1 .LBB3_169
.LBB3_170:                              ; %Flow1269
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s14, 0
	s_mov_b32 s13, 0
	s_branch .LBB3_172
.LBB3_171:                              ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s14, -1
                                        ; implicit-def: $sgpr13
.LBB3_172:                              ; %Flow1271
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB3_174
; %bb.173:                              ;   in Loop: Header=BB3_134 Depth=2
	global_load_b64 v[20:21], v78, s[0:1]
	s_add_i32 s13, s17, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB3_174:                              ; %.loopexit24.i
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_cmp_gt_u32 s13, 7
	s_cbranch_scc1 .LBB3_179
; %bb.175:                              ;   in Loop: Header=BB3_134 Depth=2
	v_mov_b32_e32 v22, 0
	v_mov_b32_e32 v23, 0
	s_cmp_eq_u32 s13, 0
	s_cbranch_scc1 .LBB3_178
; %bb.176:                              ; %.preheader21.i.preheader
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b64 s[14:15], 0
	s_mov_b64 s[18:19], 0
.LBB3_177:                              ; %.preheader21.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_134 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s20, s0, s18
	s_addc_u32 s21, s1, s19
	s_add_u32 s18, s18, 1
	global_load_u8 v24, v78, s[20:21]
	s_addc_u32 s19, s19, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v77, 0xffff, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[24:25], s14, v[77:78]
	s_add_u32 s14, s14, 8
	s_addc_u32 s15, s15, 0
	s_cmp_lg_u32 s13, s18
	v_or_b32_e32 v22, v24, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v23, v25, v23
	s_cbranch_scc1 .LBB3_177
.LBB3_178:                              ; %Flow1264
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s14, 0
	s_mov_b32 s17, 0
	s_branch .LBB3_180
.LBB3_179:                              ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s14, -1
                                        ; implicit-def: $vgpr22_vgpr23
                                        ; implicit-def: $sgpr17
.LBB3_180:                              ; %Flow1266
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB3_182
; %bb.181:                              ;   in Loop: Header=BB3_134 Depth=2
	global_load_b64 v[22:23], v78, s[0:1]
	s_add_i32 s17, s13, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB3_182:                              ; %.loopexit22.i
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_cmp_gt_u32 s17, 7
	s_cbranch_scc1 .LBB3_187
; %bb.183:                              ;   in Loop: Header=BB3_134 Depth=2
	v_mov_b32_e32 v24, 0
	v_mov_b32_e32 v25, 0
	s_cmp_eq_u32 s17, 0
	s_cbranch_scc1 .LBB3_186
; %bb.184:                              ; %.preheader.i.preheader
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b64 s[14:15], 0
	s_mov_b64 s[18:19], s[0:1]
.LBB3_185:                              ; %.preheader.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_134 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_u8 v26, v78, s[18:19]
	s_add_i32 s17, s17, -1
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v77, 0xffff, v26
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[26:27], s14, v[77:78]
	s_add_u32 s14, s14, 8
	s_addc_u32 s15, s15, 0
	s_add_u32 s18, s18, 1
	s_addc_u32 s19, s19, 0
	s_cmp_lg_u32 s17, 0
	v_or_b32_e32 v24, v26, v24
	v_or_b32_e32 v25, v27, v25
	s_cbranch_scc1 .LBB3_185
.LBB3_186:                              ; %Flow1259
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s13, 0
	s_branch .LBB3_188
.LBB3_187:                              ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s13, -1
.LBB3_188:                              ; %Flow1261
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB3_190
; %bb.189:                              ;   in Loop: Header=BB3_134 Depth=2
	global_load_b64 v[24:25], v78, s[0:1]
.LBB3_190:                              ; %.loopexit.i
                                        ;   in Loop: Header=BB3_134 Depth=2
	v_dual_mov_b32 v77, v116 :: v_dual_mov_b32 v30, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v77
	v_mov_b32_e32 v31, 0
	v_cmp_eq_u32_e64 s0, s0, v77
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_196
; %bb.191:                              ;   in Loop: Header=BB3_134 Depth=2
	global_load_b64 v[28:29], v78, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[26:27], v78, s[2:3] offset:40
	global_load_b64 v[30:31], v78, s[2:3]
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v27, v27, v29
	v_and_b32_e32 v26, v26, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v27, v27, 24
	v_mul_hi_u32 v33, v26, 24
	v_mul_lo_u32 v26, v26, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v27, v33, v27
	s_waitcnt vmcnt(0)
	v_add_co_u32 v26, vcc_lo, v30, v26
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v27, vcc_lo, v31, v27, vcc_lo
	global_load_b64 v[26:27], v[26:27], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[30:31], v78, v[26:29], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[30:31], v[28:29]
	s_cbranch_execz .LBB3_195
; %bb.192:                              ; %.preheader3.i.i19.i.preheader
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s14, 0
.LBB3_193:                              ; %.preheader3.i.i19.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_134 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[26:27], v78, s[2:3] offset:40
	global_load_b64 v[33:34], v78, s[2:3]
	v_dual_mov_b32 v28, v30 :: v_dual_mov_b32 v29, v31
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v26, v26, v28
	v_and_b32_e32 v27, v27, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[30:31], null, v26, 24, v[33:34]
	v_mov_b32_e32 v26, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[33:34], null, v27, 24, v[26:27]
	v_mov_b32_e32 v31, v33
	global_load_b64 v[26:27], v[30:31], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[30:31], v78, v[26:29], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[30:31], v[28:29]
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB3_193
; %bb.194:                              ; %Flow1254
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_or_b32 exec_lo, exec_lo, s14
.LBB3_195:                              ; %Flow1256
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s13
.LBB3_196:                              ; %.loopexit4.i.i14.i
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[33:34], v78, s[2:3] offset:40
	global_load_b128 v[26:29], v78, s[2:3]
	v_readfirstlane_b32 s14, v30
	v_readfirstlane_b32 s15, v31
	s_mov_b32 s20, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s18, v33
	v_readfirstlane_b32 s19, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[18:19], s[14:15], s[18:19]
	s_mul_i32 s1, s19, 24
	s_mul_hi_u32 s13, s18, 24
	s_mul_i32 s17, s18, 24
	s_and_saveexec_b32 s21, s0
	s_cbranch_execz .LBB3_198
; %bb.197:                              ;   in Loop: Header=BB3_134 Depth=2
	v_dual_mov_b32 v79, s20 :: v_dual_mov_b32 v80, v78
	s_add_i32 s20, s13, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v30, vcc_lo, v26, s17
	v_add_co_ci_u32_e32 v31, vcc_lo, s20, v27, vcc_lo
	global_store_b128 v[30:31], v[79:82], off offset:8
.LBB3_198:                              ;   in Loop: Header=BB3_134 Depth=2
	s_or_b32 exec_lo, exec_lo, s21
	v_cmp_gt_u64_e64 vcc_lo, s[6:7], 56
	v_or_b32_e32 v30, 0, v11
	v_or_b32_e32 v31, v10, v32
	s_lshl_b64 s[18:19], s[18:19], 12
	s_lshl_b32 s20, s8, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s20, s20, 28
	v_dual_cndmask_b32 v11, v30, v11 :: v_dual_cndmask_b32 v10, v31, v10
	v_lshlrev_b64 v[30:31], 6, v[77:78]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v28, vcc_lo, v28, s18
	v_add_co_ci_u32_e32 v29, vcc_lo, s19, v29, vcc_lo
	s_and_b32 s20, s20, 0x1e0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v28, vcc_lo, v28, v30
	v_and_or_b32 v10, 0xffffff1f, v10, s20
	v_add_co_ci_u32_e32 v29, vcc_lo, v29, v31, vcc_lo
	s_clause 0x3
	global_store_b128 v[28:29], v[10:13], off
	global_store_b128 v[28:29], v[14:17], off offset:16
	global_store_b128 v[28:29], v[18:21], off offset:32
	global_store_b128 v[28:29], v[22:25], off offset:48
	s_and_saveexec_b32 s18, s0
	s_cbranch_execz .LBB3_206
; %bb.199:                              ;   in Loop: Header=BB3_134 Depth=2
	s_clause 0x1
	global_load_b64 v[18:19], v78, s[2:3] offset:32 glc
	global_load_b64 v[10:11], v78, s[2:3] offset:40
	v_dual_mov_b32 v16, s14 :: v_dual_mov_b32 v17, s15
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v10
	v_readfirstlane_b32 s21, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[20:21], s[20:21], s[14:15]
	s_mul_i32 s19, s21, 24
	s_mul_hi_u32 s21, s20, 24
	s_mul_i32 s20, s20, 24
	s_add_i32 s21, s21, s19
	v_add_co_u32 v14, vcc_lo, v26, s20
	v_add_co_ci_u32_e32 v15, vcc_lo, s21, v27, vcc_lo
	s_mov_b32 s19, exec_lo
	global_store_b64 v[14:15], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[12:13], v78, v[16:19], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[12:13], v[18:19]
	s_cbranch_execz .LBB3_202
; %bb.200:                              ; %.preheader1.i.i17.i.preheader
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s20, 0
.LBB3_201:                              ; %.preheader1.i.i17.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_134 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v10, s14 :: v_dual_mov_b32 v11, s15
	s_sleep 1
	global_store_b64 v[14:15], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v78, v[10:13], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[12:13]
	v_dual_mov_b32 v13, v11 :: v_dual_mov_b32 v12, v10
	s_or_b32 s20, vcc_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB3_201
.LBB3_202:                              ; %Flow1252
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
	global_load_b64 v[10:11], v78, s[2:3] offset:16
	s_mov_b32 s20, exec_lo
	s_mov_b32 s19, exec_lo
	v_mbcnt_lo_u32_b32 v12, s20, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v12
	s_cbranch_execz .LBB3_204
; %bb.203:                              ;   in Loop: Header=BB3_134 Depth=2
	s_bcnt1_i32_b32 s20, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v77, s20
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[10:11], v[77:78], off offset:8
.LBB3_204:                              ;   in Loop: Header=BB3_134 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
	s_waitcnt vmcnt(0)
	global_load_b64 v[12:13], v[10:11], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[12:13]
	s_cbranch_vccnz .LBB3_206
; %bb.205:                              ;   in Loop: Header=BB3_134 Depth=2
	global_load_b32 v77, v[10:11], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s19, v77
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[12:13], v[77:78], off
	s_and_b32 m0, s19, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_206:                              ; %Flow1253
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_or_b32 exec_lo, exec_lo, s18
	s_add_i32 s13, s13, s1
	v_add_co_u32 v10, vcc_lo, v26, s17
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v10, 20
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v11, vcc_lo
.LBB3_207:                              ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_134 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v12, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_209
; %bb.208:                              ;   in Loop: Header=BB3_207 Depth=3
	global_load_b32 v12, v[10:11], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v12, 1, v12
.LBB3_209:                              ;   in Loop: Header=BB3_207 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v12
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_211
; %bb.210:                              ;   in Loop: Header=BB3_207 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_212
.LBB3_211:                              ;   in Loop: Header=BB3_207 Depth=3
	s_mov_b32 s1, -1
.LBB3_212:                              ; %Flow1247
                                        ;   in Loop: Header=BB3_207 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_207
; %bb.213:                              ;   in Loop: Header=BB3_134 Depth=2
	global_load_b128 v[10:13], v[28:29], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_217
; %bb.214:                              ;   in Loop: Header=BB3_134 Depth=2
	s_clause 0x2
	global_load_b64 v[14:15], v78, s[2:3] offset:40
	global_load_b64 v[18:19], v78, s[2:3] offset:24 glc
	global_load_b64 v[16:17], v78, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v20, vcc_lo, v14, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, v20, s14
	v_add_co_ci_u32_e32 v13, vcc_lo, s15, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[12:13]
	v_dual_cndmask_b32 v13, v13, v21 :: v_dual_cndmask_b32 v12, v12, v20
	v_and_b32_e32 v15, v13, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v14, v12, v14
	v_mul_hi_u32 v20, v14, 24
	v_mul_lo_u32 v14, v14, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v16, vcc_lo, v16, v14
	v_mov_b32_e32 v14, v18
	v_mul_lo_u32 v15, v15, 24
	v_add_nc_u32_e32 v15, v20, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v17, vcc_lo, v17, v15, vcc_lo
	v_mov_b32_e32 v15, v19
	global_store_b64 v[16:17], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[14:15], v78, v[12:15], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[14:15], v[18:19]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_217
; %bb.215:                              ; %.preheader.i.i16.i.preheader
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_mov_b32 s0, 0
.LBB3_216:                              ; %.preheader.i.i16.i
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_134 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[16:17], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v78, v[12:15], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[14:15]
	v_dual_mov_b32 v14, v18 :: v_dual_mov_b32 v15, v19
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_216
.LBB3_217:                              ; %__ockl_hostcall_preview.exit20.i
                                        ;   in Loop: Header=BB3_134 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_sub_u32 s6, s6, s8
	s_subb_u32 s7, s7, s9
	s_add_u32 s4, s4, s8
	s_addc_u32 s5, s5, s9
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc1 .LBB3_134
; %bb.218:                              ; %Flow1292
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s0, 0
	s_branch .LBB3_220
.LBB3_219:                              ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr10_vgpr11
.LBB3_220:                              ; %Flow1307
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB3_249
; %bb.221:                              ;   in Loop: Header=BB3_2 Depth=1
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v77, v116 :: v_dual_mov_b32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v77
	v_mov_b32_e32 v11, 0
	v_cmp_eq_u32_e64 s0, s0, v77
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_227
; %bb.222:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[12:13], v78, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[10:11], v78, s[2:3] offset:40
	global_load_b64 v[14:15], v78, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v11, v11, v13
	v_and_b32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v11, v11, 24
	v_mul_hi_u32 v16, v10, 24
	v_mul_lo_u32 v10, v10, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v16, v11
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v14, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, v15, v11, vcc_lo
	global_load_b64 v[10:11], v[10:11], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[10:11], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[10:11], v[12:13]
	s_cbranch_execz .LBB3_226
; %bb.223:                              ; %.preheader3.i.i.i61.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s5, 0
.LBB3_224:                              ; %.preheader3.i.i.i61
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[14:15], v78, s[2:3] offset:40
	global_load_b64 v[16:17], v78, s[2:3]
	v_dual_mov_b32 v13, v11 :: v_dual_mov_b32 v12, v10
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v14, v14, v12
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[10:11], null, v14, 24, v[16:17]
	v_and_b32_e32 v16, v15, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[14:15], null, v16, 24, v[11:12]
	v_mov_b32_e32 v11, v14
	global_load_b64 v[10:11], v[10:11], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[10:11], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[12:13]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_224
; %bb.225:                              ; %Flow1304
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB3_226:                              ; %Flow1306
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_227:                              ; %.loopexit4.i.i.i56
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[16:17], v78, s[2:3] offset:40
	global_load_b128 v[12:15], v78, s[2:3]
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v16
	v_readfirstlane_b32 s7, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB3_229
; %bb.228:                              ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v79, s13 :: v_dual_mov_b32 v80, v78
	s_add_i32 s13, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v12, s9
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v13, vcc_lo
	global_store_b128 v[10:11], v[79:82], off offset:8
.LBB3_229:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[10:11], 6, v[77:78]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v14, vcc_lo, v14, s6
	v_add_co_ci_u32_e32 v15, vcc_lo, s7, v15, vcc_lo
	s_mov_b32 s17, s16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, v14, v10
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_and_or_b32 v8, 0xffffff1f, v8, 32
	v_add_co_ci_u32_e32 v15, vcc_lo, v15, v11, vcc_lo
	v_mov_b32_e32 v10, v78
	v_dual_mov_b32 v11, v78 :: v_dual_mov_b32 v16, s16
	v_dual_mov_b32 v17, s17 :: v_dual_mov_b32 v18, s18
	v_mov_b32_e32 v19, s19
	s_clause 0x3
	global_store_b128 v[14:15], v[8:11], off
	global_store_b128 v[14:15], v[16:19], off offset:16
	global_store_b128 v[14:15], v[16:19], off offset:32
	global_store_b128 v[14:15], v[16:19], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_237
; %bb.230:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x1
	global_load_b64 v[20:21], v78, s[2:3] offset:32 glc
	global_load_b64 v[8:9], v78, s[2:3] offset:40
	v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s14, v8
	v_readfirstlane_b32 s15, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[14:15], s[14:15], s[4:5]
	s_mul_i32 s7, s15, 24
	s_mul_hi_u32 s13, s14, 24
	s_mul_i32 s14, s14, 24
	s_add_i32 s13, s13, s7
	v_add_co_u32 v16, vcc_lo, v12, s14
	v_add_co_ci_u32_e32 v17, vcc_lo, s13, v13, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[16:17], v[20:21], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v78, v[18:21], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[10:11], v[20:21]
	s_cbranch_execz .LBB3_233
; %bb.231:                              ; %.preheader1.i.i.i59.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s13, 0
.LBB3_232:                              ; %.preheader1.i.i.i59
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v9, s5
	s_sleep 1
	global_store_b64 v[16:17], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v78, v[8:11], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[10:11]
	v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v10, v8
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB3_232
.LBB3_233:                              ; %Flow1302
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[8:9], v78, s[2:3] offset:16
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v10, s13, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v10
	s_cbranch_execz .LBB3_235
; %bb.234:                              ;   in Loop: Header=BB3_2 Depth=1
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v77, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[8:9], v[77:78], off offset:8
.LBB3_235:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[10:11], v[8:9], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11]
	s_cbranch_vccnz .LBB3_237
; %bb.236:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b32 v77, v[8:9], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v77
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[10:11], v[77:78], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_237:                              ; %Flow1303
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v8, vcc_lo, v12, s9
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v8, 20
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
.LBB3_238:                              ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v10, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_240
; %bb.239:                              ;   in Loop: Header=BB3_238 Depth=2
	global_load_b32 v10, v[8:9], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v10, 1, v10
.LBB3_240:                              ;   in Loop: Header=BB3_238 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v10
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_242
; %bb.241:                              ;   in Loop: Header=BB3_238 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_243
.LBB3_242:                              ;   in Loop: Header=BB3_238 Depth=2
	s_mov_b32 s1, -1
.LBB3_243:                              ; %Flow1297
                                        ;   in Loop: Header=BB3_238 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_238
; %bb.244:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b128 v[10:13], v[14:15], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_248
; %bb.245:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x2
	global_load_b64 v[8:9], v78, s[2:3] offset:40
	global_load_b64 v[16:17], v78, s[2:3] offset:24 glc
	global_load_b64 v[14:15], v78, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v18, vcc_lo, v8, 1
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, v18, s4
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[12:13]
	v_dual_cndmask_b32 v13, v13, v19 :: v_dual_cndmask_b32 v12, v12, v18
	v_and_b32_e32 v9, v13, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v8, v12, v8
	v_mul_hi_u32 v18, v8, 24
	v_mul_lo_u32 v8, v8, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, vcc_lo, v14, v8
	v_mov_b32_e32 v14, v16
	v_mul_lo_u32 v9, v9, 24
	v_add_nc_u32_e32 v9, v18, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, v15, v9, vcc_lo
	v_mov_b32_e32 v15, v17
	global_store_b64 v[8:9], v[16:17], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[14:15], v78, v[12:15], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[14:15], v[16:17]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_248
; %bb.246:                              ; %.preheader.i.i.i58.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s0, 0
.LBB3_247:                              ; %.preheader.i.i.i58
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[8:9], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[16:17], v78, v[12:15], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[16:17], v[14:15]
	v_dual_mov_b32 v14, v16 :: v_dual_mov_b32 v15, v17
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_247
.LBB3_248:                              ; %__ockl_hostcall_preview.exit.i
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
.LBB3_249:                              ; %__ockl_printf_append_string_n.exit
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v77, v116 :: v_dual_mov_b32 v8, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v77
	v_mov_b32_e32 v9, 0
	v_cmp_eq_u32_e64 s0, s0, v77
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_255
; %bb.250:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[14:15], v78, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[8:9], v78, s[2:3] offset:40
	global_load_b64 v[12:13], v78, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v9, v9, v15
	v_and_b32_e32 v8, v8, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v9, v9, 24
	v_mul_hi_u32 v16, v8, 24
	v_mul_lo_u32 v8, v8, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v9, v16, v9
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v12, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v13, v9, vcc_lo
	global_load_b64 v[12:13], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v78, v[12:15], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[14:15]
	s_cbranch_execz .LBB3_254
; %bb.251:                              ; %.preheader3.i.i.i68.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s5, 0
.LBB3_252:                              ; %.preheader3.i.i.i68
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[12:13], v78, s[2:3] offset:40
	global_load_b64 v[16:17], v78, s[2:3]
	v_dual_mov_b32 v15, v9 :: v_dual_mov_b32 v14, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v12, v12, v14
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[8:9], null, v12, 24, v[16:17]
	v_and_b32_e32 v16, v13, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[12:13], null, v16, 24, v[9:10]
	v_mov_b32_e32 v9, v12
	global_load_b64 v[12:13], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v78, v[12:15], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[14:15]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_252
; %bb.253:                              ; %Flow1240
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB3_254:                              ; %Flow1242
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_255:                              ; %.loopexit4.i.i.i62
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[12:13], v78, s[2:3] offset:40
	global_load_b128 v[14:17], v78, s[2:3]
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v12
	v_readfirstlane_b32 s7, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB3_257
; %bb.256:                              ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v79, s13 :: v_dual_mov_b32 v80, v78
	s_add_i32 s13, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v14, s9
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v15, vcc_lo
	global_store_b128 v[8:9], v[79:82], off offset:8
.LBB3_257:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[8:9], 6, v[77:78]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v16, s6
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v17, vcc_lo
	s_mov_b32 s19, s16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v16, vcc_lo, v12, v8
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	v_and_or_b32 v10, 0xffffff1f, v10, 32
	v_add_co_ci_u32_e32 v17, vcc_lo, v13, v9, vcc_lo
	v_dual_mov_b32 v12, v115 :: v_dual_mov_b32 v13, v78
	v_dual_mov_b32 v21, s19 :: v_dual_mov_b32 v20, s18
	v_dual_mov_b32 v19, s17 :: v_dual_mov_b32 v18, s16
	s_clause 0x3
	global_store_b128 v[16:17], v[10:13], off
	global_store_b128 v[16:17], v[18:21], off offset:16
	global_store_b128 v[16:17], v[18:21], off offset:32
	global_store_b128 v[16:17], v[18:21], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_265
; %bb.258:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x1
	global_load_b64 v[20:21], v78, s[2:3] offset:32 glc
	global_load_b64 v[8:9], v78, s[2:3] offset:40
	v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s14, v8
	v_readfirstlane_b32 s15, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[14:15], s[14:15], s[4:5]
	s_mul_i32 s7, s15, 24
	s_mul_hi_u32 s13, s14, 24
	s_mul_i32 s14, s14, 24
	s_add_i32 s13, s13, s7
	v_add_co_u32 v12, vcc_lo, v14, s14
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v15, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[12:13], v[20:21], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v78, v[18:21], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[10:11], v[20:21]
	s_cbranch_execz .LBB3_261
; %bb.259:                              ; %.preheader1.i.i.i66.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s13, 0
.LBB3_260:                              ; %.preheader1.i.i.i66
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v9, s5
	s_sleep 1
	global_store_b64 v[12:13], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v78, v[8:11], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[10:11]
	v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v10, v8
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB3_260
.LBB3_261:                              ; %Flow1238
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[8:9], v78, s[2:3] offset:16
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v10, s13, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v10
	s_cbranch_execz .LBB3_263
; %bb.262:                              ;   in Loop: Header=BB3_2 Depth=1
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v77, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[8:9], v[77:78], off offset:8
.LBB3_263:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[10:11], v[8:9], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11]
	s_cbranch_vccnz .LBB3_265
; %bb.264:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b32 v77, v[8:9], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v77
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[10:11], v[77:78], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_265:                              ; %Flow1239
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v8, vcc_lo, v14, s9
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v8, 20
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
.LBB3_266:                              ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v10, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_268
; %bb.267:                              ;   in Loop: Header=BB3_266 Depth=2
	global_load_b32 v10, v[8:9], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v10, 1, v10
.LBB3_268:                              ;   in Loop: Header=BB3_266 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v10
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_270
; %bb.269:                              ;   in Loop: Header=BB3_266 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_271
.LBB3_270:                              ;   in Loop: Header=BB3_266 Depth=2
	s_mov_b32 s1, -1
.LBB3_271:                              ; %Flow1233
                                        ;   in Loop: Header=BB3_266 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_266
; %bb.272:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[8:9], v[16:17], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_276
; %bb.273:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x2
	global_load_b64 v[12:13], v78, s[2:3] offset:40
	global_load_b64 v[16:17], v78, s[2:3] offset:24 glc
	global_load_b64 v[14:15], v78, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v18, vcc_lo, v12, 1
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v18, s4
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11]
	v_dual_cndmask_b32 v11, v11, v19 :: v_dual_cndmask_b32 v10, v10, v18
	v_and_b32_e32 v13, v11, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v12, v10, v12
	v_mul_hi_u32 v18, v12, 24
	v_mul_lo_u32 v12, v12, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v14, vcc_lo, v14, v12
	v_mov_b32_e32 v12, v16
	v_mul_lo_u32 v13, v13, 24
	v_add_nc_u32_e32 v13, v18, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v15, vcc_lo, v15, v13, vcc_lo
	v_mov_b32_e32 v13, v17
	global_store_b64 v[14:15], v[16:17], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[12:13], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[12:13], v[16:17]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_276
; %bb.274:                              ; %.preheader.i.i.i65.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s0, 0
.LBB3_275:                              ; %.preheader.i.i.i65
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[14:15], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[16:17], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[16:17], v[12:13]
	v_dual_mov_b32 v12, v16 :: v_dual_mov_b32 v13, v17
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_275
.LBB3_276:                              ; %__ockl_printf_append_args.exit
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v77, v116 :: v_dual_mov_b32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v77
	v_mov_b32_e32 v11, 0
	v_cmp_eq_u32_e64 s0, s0, v77
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_282
; %bb.277:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[12:13], v78, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[10:11], v78, s[2:3] offset:40
	global_load_b64 v[14:15], v78, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v11, v11, v13
	v_and_b32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v11, v11, 24
	v_mul_hi_u32 v16, v10, 24
	v_mul_lo_u32 v10, v10, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v16, v11
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v14, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, v15, v11, vcc_lo
	global_load_b64 v[10:11], v[10:11], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[10:11], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[10:11], v[12:13]
	s_cbranch_execz .LBB3_281
; %bb.278:                              ; %.preheader3.i.i.i75.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s5, 0
.LBB3_279:                              ; %.preheader3.i.i.i75
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[14:15], v78, s[2:3] offset:40
	global_load_b64 v[16:17], v78, s[2:3]
	v_dual_mov_b32 v13, v11 :: v_dual_mov_b32 v12, v10
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v14, v14, v12
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[10:11], null, v14, 24, v[16:17]
	v_and_b32_e32 v16, v15, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[14:15], null, v16, 24, v[11:12]
	v_mov_b32_e32 v11, v14
	global_load_b64 v[10:11], v[10:11], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[10:11], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[12:13]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_279
; %bb.280:                              ; %Flow1226
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB3_281:                              ; %Flow1228
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_282:                              ; %.loopexit4.i.i.i69
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[16:17], v78, s[2:3] offset:40
	global_load_b128 v[12:15], v78, s[2:3]
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v16
	v_readfirstlane_b32 s7, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB3_284
; %bb.283:                              ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v79, s13 :: v_dual_mov_b32 v80, v78
	s_add_i32 s13, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v12, s9
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v13, vcc_lo
	global_store_b128 v[10:11], v[79:82], off offset:8
.LBB3_284:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[10:11], 6, v[77:78]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v14, vcc_lo, v14, s6
	v_add_co_ci_u32_e32 v15, vcc_lo, s7, v15, vcc_lo
	s_mov_b32 s17, s16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, v14, v10
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_and_or_b32 v8, 0xffffff1f, v8, 32
	v_add_co_ci_u32_e32 v15, vcc_lo, v15, v11, vcc_lo
	v_dual_mov_b32 v10, v4 :: v_dual_mov_b32 v11, v78
	v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
	v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
	s_clause 0x3
	global_store_b128 v[14:15], v[8:11], off
	global_store_b128 v[14:15], v[16:19], off offset:16
	global_store_b128 v[14:15], v[16:19], off offset:32
	global_store_b128 v[14:15], v[16:19], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_292
; %bb.285:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x1
	global_load_b64 v[20:21], v78, s[2:3] offset:32 glc
	global_load_b64 v[8:9], v78, s[2:3] offset:40
	v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s14, v8
	v_readfirstlane_b32 s15, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[14:15], s[14:15], s[4:5]
	s_mul_i32 s7, s15, 24
	s_mul_hi_u32 s13, s14, 24
	s_mul_i32 s14, s14, 24
	s_add_i32 s13, s13, s7
	v_add_co_u32 v16, vcc_lo, v12, s14
	v_add_co_ci_u32_e32 v17, vcc_lo, s13, v13, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[16:17], v[20:21], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v78, v[18:21], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[10:11], v[20:21]
	s_cbranch_execz .LBB3_288
; %bb.286:                              ; %.preheader1.i.i.i73.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s13, 0
.LBB3_287:                              ; %.preheader1.i.i.i73
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v9, s5
	s_sleep 1
	global_store_b64 v[16:17], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v78, v[8:11], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[10:11]
	v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v10, v8
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB3_287
.LBB3_288:                              ; %Flow1224
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[8:9], v78, s[2:3] offset:16
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v4, s13, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_290
; %bb.289:                              ;   in Loop: Header=BB3_2 Depth=1
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v77, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[8:9], v[77:78], off offset:8
.LBB3_290:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[10:11], v[8:9], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11]
	s_cbranch_vccnz .LBB3_292
; %bb.291:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b32 v77, v[8:9], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v77
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[10:11], v[77:78], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_292:                              ; %Flow1225
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v4, vcc_lo, v12, s9
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v4, 20
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
.LBB3_293:                              ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v4, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_295
; %bb.294:                              ;   in Loop: Header=BB3_293 Depth=2
	global_load_b32 v4, v[8:9], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v4, 1, v4
.LBB3_295:                              ;   in Loop: Header=BB3_293 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v4
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_297
; %bb.296:                              ;   in Loop: Header=BB3_293 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_298
.LBB3_297:                              ;   in Loop: Header=BB3_293 Depth=2
	s_mov_b32 s1, -1
.LBB3_298:                              ; %Flow1219
                                        ;   in Loop: Header=BB3_293 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_293
; %bb.299:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[8:9], v[14:15], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_303
; %bb.300:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x2
	global_load_b64 v[12:13], v78, s[2:3] offset:40
	global_load_b64 v[16:17], v78, s[2:3] offset:24 glc
	global_load_b64 v[14:15], v78, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v4, vcc_lo, v12, 1
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v4, s4
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11]
	v_dual_cndmask_b32 v11, v11, v18 :: v_dual_cndmask_b32 v10, v10, v4
	v_and_b32_e32 v4, v11, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v12, v10, v12
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v13, v12, 24
	v_mul_lo_u32 v12, v12, 24
	v_add_nc_u32_e32 v4, v13, v4
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v13, v17
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v14, vcc_lo, v14, v12
	v_mov_b32_e32 v12, v16
	v_add_co_ci_u32_e32 v15, vcc_lo, v15, v4, vcc_lo
	global_store_b64 v[14:15], v[16:17], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[12:13], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[12:13], v[16:17]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_303
; %bb.301:                              ; %.preheader.i.i.i72.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s0, 0
.LBB3_302:                              ; %.preheader.i.i.i72
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[14:15], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[16:17], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[16:17], v[12:13]
	v_dual_mov_b32 v12, v16 :: v_dual_mov_b32 v13, v17
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_302
.LBB3_303:                              ; %__ockl_printf_append_args.exit76
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v77, v116 :: v_dual_mov_b32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v77
	v_mov_b32_e32 v11, 0
	v_cmp_eq_u32_e64 s0, s0, v77
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_309
; %bb.304:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[12:13], v78, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[10:11], v78, s[2:3] offset:40
	global_load_b64 v[14:15], v78, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v11, v13
	v_and_b32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v11, v10, 24
	v_mul_lo_u32 v10, v10, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v11, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v14, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, v15, v4, vcc_lo
	global_load_b64 v[10:11], v[10:11], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[10:11], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[10:11], v[12:13]
	s_cbranch_execz .LBB3_308
; %bb.305:                              ; %.preheader3.i.i.i83.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s5, 0
.LBB3_306:                              ; %.preheader3.i.i.i83
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[14:15], v78, s[2:3] offset:40
	global_load_b64 v[16:17], v78, s[2:3]
	v_dual_mov_b32 v13, v11 :: v_dual_mov_b32 v12, v10
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v14, v12
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[10:11], null, v4, 24, v[16:17]
	v_and_b32_e32 v16, v15, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v11
	v_mad_u64_u32 v[14:15], null, v16, 24, v[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v11, v14
	global_load_b64 v[10:11], v[10:11], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[10:11], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[12:13]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_306
; %bb.307:                              ; %Flow1212
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB3_308:                              ; %Flow1214
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_309:                              ; %.loopexit4.i.i.i77
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[16:17], v78, s[2:3] offset:40
	global_load_b128 v[12:15], v78, s[2:3]
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v16
	v_readfirstlane_b32 s7, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB3_311
; %bb.310:                              ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v79, s13 :: v_dual_mov_b32 v80, v78
	s_add_i32 s13, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v12, s9
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v13, vcc_lo
	global_store_b128 v[10:11], v[79:82], off offset:8
.LBB3_311:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[10:11], 6, v[77:78]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v14, s6
	v_add_co_ci_u32_e32 v15, vcc_lo, s7, v15, vcc_lo
	s_mov_b32 s17, s16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, v4, v10
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_and_or_b32 v8, 0xffffff1f, v8, 32
	v_add_co_ci_u32_e32 v15, vcc_lo, v15, v11, vcc_lo
	v_dual_mov_b32 v10, v5 :: v_dual_mov_b32 v11, v78
	v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
	v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
	s_clause 0x3
	global_store_b128 v[14:15], v[8:11], off
	global_store_b128 v[14:15], v[16:19], off offset:16
	global_store_b128 v[14:15], v[16:19], off offset:32
	global_store_b128 v[14:15], v[16:19], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_319
; %bb.312:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x1
	global_load_b64 v[18:19], v78, s[2:3] offset:32 glc
	global_load_b64 v[4:5], v78, s[2:3] offset:40
	v_dual_mov_b32 v16, s4 :: v_dual_mov_b32 v17, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s14, v4
	v_readfirstlane_b32 s15, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[14:15], s[14:15], s[4:5]
	s_mul_i32 s7, s15, 24
	s_mul_hi_u32 s13, s14, 24
	s_mul_i32 s14, s14, 24
	s_add_i32 s13, s13, s7
	v_add_co_u32 v4, vcc_lo, v12, s14
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v13, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[4:5], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v78, v[16:19], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[10:11], v[18:19]
	s_cbranch_execz .LBB3_315
; %bb.313:                              ; %.preheader1.i.i.i81.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s13, 0
.LBB3_314:                              ; %.preheader1.i.i.i81
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v9, s5
	s_sleep 1
	global_store_b64 v[4:5], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v78, v[8:11], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[10:11]
	v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v10, v8
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB3_314
.LBB3_315:                              ; %Flow1210
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[4:5], v78, s[2:3] offset:16
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v8, s13, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v8
	s_cbranch_execz .LBB3_317
; %bb.316:                              ;   in Loop: Header=BB3_2 Depth=1
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v77, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[4:5], v[77:78], off offset:8
.LBB3_317:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[8:9], v[4:5], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9]
	s_cbranch_vccnz .LBB3_319
; %bb.318:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b32 v77, v[4:5], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v77
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[8:9], v[77:78], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_319:                              ; %Flow1211
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v4, vcc_lo, v12, s9
	v_add_co_ci_u32_e32 v5, vcc_lo, s8, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v4, 20
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
.LBB3_320:                              ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v8, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_322
; %bb.321:                              ;   in Loop: Header=BB3_320 Depth=2
	global_load_b32 v8, v[4:5], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v8, 1, v8
.LBB3_322:                              ;   in Loop: Header=BB3_320 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v8
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_324
; %bb.323:                              ;   in Loop: Header=BB3_320 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_325
.LBB3_324:                              ;   in Loop: Header=BB3_320 Depth=2
	s_mov_b32 s1, -1
.LBB3_325:                              ; %Flow1205
                                        ;   in Loop: Header=BB3_320 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_320
; %bb.326:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[8:9], v[14:15], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_330
; %bb.327:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x2
	global_load_b64 v[4:5], v78, s[2:3] offset:40
	global_load_b64 v[14:15], v78, s[2:3] offset:24 glc
	global_load_b64 v[12:13], v78, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v16, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v16, s4
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11]
	v_dual_cndmask_b32 v11, v11, v17 :: v_dual_cndmask_b32 v10, v10, v16
	v_and_b32_e32 v5, v11, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v10, v4
	v_mul_hi_u32 v16, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v12, v4
	v_mov_b32_e32 v12, v14
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v16, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v13, v5, vcc_lo
	v_mov_b32_e32 v13, v15
	global_store_b64 v[4:5], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[12:13], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[12:13], v[14:15]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_330
; %bb.328:                              ; %.preheader.i.i.i80.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s0, 0
.LBB3_329:                              ; %.preheader.i.i.i80
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[14:15], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[14:15], v[12:13]
	v_dual_mov_b32 v12, v14 :: v_dual_mov_b32 v13, v15
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_329
.LBB3_330:                              ; %__ockl_printf_append_args.exit84
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v77, v116 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v77
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v77
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_336
; %bb.331:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[12:13], v78, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v78, s[2:3] offset:40
	global_load_b64 v[10:11], v78, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v5, v5, v13
	v_and_b32_e32 v4, v4, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v5, v5, 24
	v_mul_hi_u32 v14, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v14, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v10, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v11, v5, vcc_lo
	global_load_b64 v[10:11], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB3_335
; %bb.332:                              ; %.preheader3.i.i.i91.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s5, 0
.LBB3_333:                              ; %.preheader3.i.i.i91
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[10:11], v78, s[2:3] offset:40
	global_load_b64 v[14:15], v78, s[2:3]
	v_dual_mov_b32 v13, v5 :: v_dual_mov_b32 v12, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v10, v10, v12
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[4:5], null, v10, 24, v[14:15]
	v_and_b32_e32 v14, v11, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v14, 24, v[5:6]
	v_mov_b32_e32 v5, v10
	global_load_b64 v[10:11], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v78, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[12:13]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_333
; %bb.334:                              ; %Flow1198
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB3_335:                              ; %Flow1200
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_336:                              ; %.loopexit4.i.i.i85
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[10:11], v78, s[2:3] offset:40
	global_load_b128 v[12:15], v78, s[2:3]
	v_readfirstlane_b32 s4, v4
	v_readfirstlane_b32 s5, v5
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v10
	v_readfirstlane_b32 s7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB3_338
; %bb.337:                              ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v79, s13 :: v_dual_mov_b32 v80, v78
	s_add_i32 s13, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v12, s9
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v13, vcc_lo
	global_store_b128 v[4:5], v[79:82], off offset:8
.LBB3_338:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[4:5], 6, v[77:78]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v14, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v15, vcc_lo
	s_mov_b32 s17, s16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v10, v4
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_and_or_b32 v8, 0xffffff1f, v8, 32
	v_add_co_ci_u32_e32 v5, vcc_lo, v11, v5, vcc_lo
	v_mov_b32_e32 v10, v6
	v_dual_mov_b32 v11, v78 :: v_dual_mov_b32 v14, s16
	v_dual_mov_b32 v15, s17 :: v_dual_mov_b32 v16, s18
	v_mov_b32_e32 v17, s19
	s_clause 0x3
	global_store_b128 v[4:5], v[8:11], off
	global_store_b128 v[4:5], v[14:17], off offset:16
	global_store_b128 v[4:5], v[14:17], off offset:32
	global_store_b128 v[4:5], v[14:17], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_346
; %bb.339:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x1
	global_load_b64 v[18:19], v78, s[2:3] offset:32 glc
	global_load_b64 v[8:9], v78, s[2:3] offset:40
	v_dual_mov_b32 v16, s4 :: v_dual_mov_b32 v17, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s14, v8
	v_readfirstlane_b32 s15, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[14:15], s[14:15], s[4:5]
	s_mul_i32 s7, s15, 24
	s_mul_hi_u32 s13, s14, 24
	s_mul_i32 s14, s14, 24
	s_add_i32 s13, s13, s7
	v_add_co_u32 v14, vcc_lo, v12, s14
	v_add_co_ci_u32_e32 v15, vcc_lo, s13, v13, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[14:15], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v78, v[16:19], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[10:11], v[18:19]
	s_cbranch_execz .LBB3_342
; %bb.340:                              ; %.preheader1.i.i.i89.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s13, 0
.LBB3_341:                              ; %.preheader1.i.i.i89
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v9, s5
	s_sleep 1
	global_store_b64 v[14:15], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v78, v[8:11], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[10:11]
	v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v10, v8
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB3_341
.LBB3_342:                              ; %Flow1196
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[8:9], v78, s[2:3] offset:16
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v6, s13, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB3_344
; %bb.343:                              ;   in Loop: Header=BB3_2 Depth=1
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v77, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[8:9], v[77:78], off offset:8
.LBB3_344:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[10:11], v[8:9], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11]
	s_cbranch_vccnz .LBB3_346
; %bb.345:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b32 v77, v[8:9], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v77
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[10:11], v[77:78], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_346:                              ; %Flow1197
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v6, vcc_lo, v12, s9
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v6, 20
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
.LBB3_347:                              ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_349
; %bb.348:                              ;   in Loop: Header=BB3_347 Depth=2
	global_load_b32 v6, v[8:9], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB3_349:                              ;   in Loop: Header=BB3_347 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v6
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_351
; %bb.350:                              ;   in Loop: Header=BB3_347 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_352
.LBB3_351:                              ;   in Loop: Header=BB3_347 Depth=2
	s_mov_b32 s1, -1
.LBB3_352:                              ; %Flow1191
                                        ;   in Loop: Header=BB3_347 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_347
; %bb.353:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[4:5], v[4:5], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_357
; %bb.354:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x2
	global_load_b64 v[10:11], v78, s[2:3] offset:40
	global_load_b64 v[14:15], v78, s[2:3] offset:24 glc
	global_load_b64 v[12:13], v78, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v10, 1
	v_add_co_ci_u32_e32 v16, vcc_lo, 0, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9]
	v_dual_cndmask_b32 v9, v9, v16 :: v_dual_cndmask_b32 v8, v8, v6
	v_and_b32_e32 v6, v9, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v10, v8, v10
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v10, 24
	v_mul_lo_u32 v10, v10, 24
	v_add_nc_u32_e32 v6, v11, v6
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v11, v15
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v12, vcc_lo, v12, v10
	v_mov_b32_e32 v10, v14
	v_add_co_ci_u32_e32 v13, vcc_lo, v13, v6, vcc_lo
	global_store_b64 v[12:13], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v78, v[8:11], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[10:11], v[14:15]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_357
; %bb.355:                              ; %.preheader.i.i.i88.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s0, 0
.LBB3_356:                              ; %.preheader.i.i.i88
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[12:13], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[14:15], v78, v[8:11], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[14:15], v[10:11]
	v_dual_mov_b32 v10, v14 :: v_dual_mov_b32 v11, v15
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_356
.LBB3_357:                              ; %__ockl_printf_append_args.exit92
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v77, v116 :: v_dual_mov_b32 v12, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v77
	v_mov_b32_e32 v13, 0
	v_cmp_eq_u32_e64 s0, s0, v77
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_363
; %bb.358:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[10:11], v78, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[8:9], v78, s[2:3] offset:40
	global_load_b64 v[12:13], v78, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v6, v9, v11
	v_and_b32_e32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v6, v6, 24
	v_mul_hi_u32 v9, v8, 24
	v_mul_lo_u32 v8, v8, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, v9, v6
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v12, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v13, v6, vcc_lo
	global_load_b64 v[8:9], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[12:13], v78, v[8:11], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[12:13], v[10:11]
	s_cbranch_execz .LBB3_362
; %bb.359:                              ; %.preheader3.i.i.i99.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s5, 0
.LBB3_360:                              ; %.preheader3.i.i.i99
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[8:9], v78, s[2:3] offset:40
	global_load_b64 v[14:15], v78, s[2:3]
	v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v8, v10
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[12:13], null, v6, 24, v[14:15]
	v_and_b32_e32 v14, v9, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v6, v13
	v_mad_u64_u32 v[8:9], null, v14, 24, v[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v13, v8
	global_load_b64 v[8:9], v[12:13], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[12:13], v78, v[8:11], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[10:11]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_360
; %bb.361:                              ; %Flow1184
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB3_362:                              ; %Flow1186
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_363:                              ; %.loopexit4.i.i.i93
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[14:15], v78, s[2:3] offset:40
	global_load_b128 v[8:11], v78, s[2:3]
	v_readfirstlane_b32 s4, v12
	v_readfirstlane_b32 s5, v13
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v14
	v_readfirstlane_b32 s7, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB3_365
; %bb.364:                              ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v79, s13 :: v_dual_mov_b32 v80, v78
	s_add_i32 s13, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v8, s9
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v9, vcc_lo
	global_store_b128 v[12:13], v[79:82], off offset:8
.LBB3_365:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[12:13], 6, v[77:78]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v10, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
	s_mov_b32 s17, s16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v6, v12
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_and_or_b32 v4, 0xffffff1f, v4, 32
	v_add_co_ci_u32_e32 v11, vcc_lo, v11, v13, vcc_lo
	v_dual_mov_b32 v6, v7 :: v_dual_mov_b32 v7, v78
	v_dual_mov_b32 v12, s16 :: v_dual_mov_b32 v13, s17
	v_dual_mov_b32 v14, s18 :: v_dual_mov_b32 v15, s19
	s_clause 0x3
	global_store_b128 v[10:11], v[4:7], off
	global_store_b128 v[10:11], v[12:15], off offset:16
	global_store_b128 v[10:11], v[12:15], off offset:32
	global_store_b128 v[10:11], v[12:15], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_373
; %bb.366:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x1
	global_load_b64 v[16:17], v78, s[2:3] offset:32 glc
	global_load_b64 v[4:5], v78, s[2:3] offset:40
	v_dual_mov_b32 v14, s4 :: v_dual_mov_b32 v15, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s14, v4
	v_readfirstlane_b32 s15, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[14:15], s[14:15], s[4:5]
	s_mul_i32 s7, s15, 24
	s_mul_hi_u32 s13, s14, 24
	s_mul_i32 s14, s14, 24
	s_add_i32 s13, s13, s7
	v_add_co_u32 v12, vcc_lo, v8, s14
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v9, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[12:13], v[16:17], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v78, v[14:17], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[6:7], v[16:17]
	s_cbranch_execz .LBB3_369
; %bb.367:                              ; %.preheader1.i.i.i97.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s13, 0
.LBB3_368:                              ; %.preheader1.i.i.i97
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
	s_sleep 1
	global_store_b64 v[12:13], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v78, v[4:7], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB3_368
.LBB3_369:                              ; %Flow1182
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[4:5], v78, s[2:3] offset:16
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v6, s13, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB3_371
; %bb.370:                              ;   in Loop: Header=BB3_2 Depth=1
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v77, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[4:5], v[77:78], off offset:8
.LBB3_371:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[6:7], v[4:5], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	s_cbranch_vccnz .LBB3_373
; %bb.372:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b32 v77, v[4:5], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v77
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[6:7], v[77:78], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_373:                              ; %Flow1183
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v4, vcc_lo, v8, s9
	v_add_co_ci_u32_e32 v5, vcc_lo, s8, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v4, 20
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
.LBB3_374:                              ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_376
; %bb.375:                              ;   in Loop: Header=BB3_374 Depth=2
	global_load_b32 v6, v[4:5], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB3_376:                              ;   in Loop: Header=BB3_374 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v6
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_378
; %bb.377:                              ;   in Loop: Header=BB3_374 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_379
.LBB3_378:                              ;   in Loop: Header=BB3_374 Depth=2
	s_mov_b32 s1, -1
.LBB3_379:                              ; %Flow1177
                                        ;   in Loop: Header=BB3_374 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_374
; %bb.380:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[4:5], v[10:11], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_384
; %bb.381:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x2
	global_load_b64 v[8:9], v78, s[2:3] offset:40
	global_load_b64 v[12:13], v78, s[2:3] offset:24 glc
	global_load_b64 v[10:11], v78, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v14, vcc_lo, v8, 1
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v14, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	v_dual_cndmask_b32 v7, v7, v15 :: v_dual_cndmask_b32 v6, v6, v14
	v_and_b32_e32 v9, v7, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v8, v6, v8
	v_mul_hi_u32 v14, v8, 24
	v_mul_lo_u32 v8, v8, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, vcc_lo, v10, v8
	v_mov_b32_e32 v8, v12
	v_mul_lo_u32 v9, v9, 24
	v_add_nc_u32_e32 v9, v14, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, v11, v9, vcc_lo
	v_mov_b32_e32 v9, v13
	global_store_b64 v[10:11], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v78, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[8:9], v[12:13]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_384
; %bb.382:                              ; %.preheader.i.i.i96.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s0, 0
.LBB3_383:                              ; %.preheader.i.i.i96
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[10:11], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[12:13], v78, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[8:9]
	v_dual_mov_b32 v8, v12 :: v_dual_mov_b32 v9, v13
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_383
.LBB3_384:                              ; %__ockl_printf_append_args.exit100
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v77, v116 :: v_dual_mov_b32 v6, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v77
	v_mov_b32_e32 v7, 0
	v_cmp_eq_u32_e64 s0, s0, v77
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_390
; %bb.385:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[8:9], v78, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[6:7], v78, s[2:3] offset:40
	global_load_b64 v[10:11], v78, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v7, v7, v9
	v_and_b32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v7, v7, 24
	v_mul_hi_u32 v12, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, v12, v7
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v10, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v11, v7, vcc_lo
	global_load_b64 v[6:7], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v78, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB3_389
; %bb.386:                              ; %.preheader3.i.i.i107.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s5, 0
.LBB3_387:                              ; %.preheader3.i.i.i107
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[10:11], v78, s[2:3] offset:40
	global_load_b64 v[12:13], v78, s[2:3]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v10, v10, v8
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v10, 24, v[12:13]
	v_and_b32_e32 v12, v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v12, 24, v[7:8]
	v_mov_b32_e32 v7, v10
	global_load_b64 v[6:7], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v78, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_387
; %bb.388:                              ; %Flow1170
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB3_389:                              ; %Flow1172
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_390:                              ; %.loopexit4.i.i.i101
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[12:13], v78, s[2:3] offset:40
	global_load_b128 v[8:11], v78, s[2:3]
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v12
	v_readfirstlane_b32 s7, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB3_392
; %bb.391:                              ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v79, s13 :: v_dual_mov_b32 v80, v78
	s_add_i32 s13, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v8, s9
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v9, vcc_lo
	global_store_b128 v[6:7], v[79:82], off offset:8
.LBB3_392:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[6:7], 6, v[77:78]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v10, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
	s_mov_b32 s17, s16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v10, v6
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_and_or_b32 v4, 0xffffff1f, v4, 32
	v_add_co_ci_u32_e32 v11, vcc_lo, v11, v7, vcc_lo
	v_dual_mov_b32 v6, v0 :: v_dual_mov_b32 v7, v78
	v_dual_mov_b32 v12, s16 :: v_dual_mov_b32 v13, s17
	v_dual_mov_b32 v14, s18 :: v_dual_mov_b32 v15, s19
	s_clause 0x3
	global_store_b128 v[10:11], v[4:7], off
	global_store_b128 v[10:11], v[12:15], off offset:16
	global_store_b128 v[10:11], v[12:15], off offset:32
	global_store_b128 v[10:11], v[12:15], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_400
; %bb.393:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x1
	global_load_b64 v[16:17], v78, s[2:3] offset:32 glc
	global_load_b64 v[4:5], v78, s[2:3] offset:40
	v_dual_mov_b32 v14, s4 :: v_dual_mov_b32 v15, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s14, v4
	v_readfirstlane_b32 s15, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[14:15], s[14:15], s[4:5]
	s_mul_i32 s7, s15, 24
	s_mul_hi_u32 s13, s14, 24
	s_mul_i32 s14, s14, 24
	s_add_i32 s13, s13, s7
	v_add_co_u32 v12, vcc_lo, v8, s14
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v9, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[12:13], v[16:17], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v78, v[14:17], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[6:7], v[16:17]
	s_cbranch_execz .LBB3_396
; %bb.394:                              ; %.preheader1.i.i.i105.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s13, 0
.LBB3_395:                              ; %.preheader1.i.i.i105
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
	s_sleep 1
	global_store_b64 v[12:13], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v78, v[4:7], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB3_395
.LBB3_396:                              ; %Flow1168
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[4:5], v78, s[2:3] offset:16
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v0, s13, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_398
; %bb.397:                              ;   in Loop: Header=BB3_2 Depth=1
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v77, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[4:5], v[77:78], off offset:8
.LBB3_398:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[6:7], v[4:5], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	s_cbranch_vccnz .LBB3_400
; %bb.399:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b32 v77, v[4:5], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v77
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[6:7], v[77:78], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_400:                              ; %Flow1169
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v0, vcc_lo, v8, s9
	v_add_co_ci_u32_e32 v5, vcc_lo, s8, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
.LBB3_401:                              ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v0, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_403
; %bb.402:                              ;   in Loop: Header=BB3_401 Depth=2
	global_load_b32 v0, v[4:5], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v0, 1, v0
.LBB3_403:                              ;   in Loop: Header=BB3_401 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v0
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_405
; %bb.404:                              ;   in Loop: Header=BB3_401 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_406
.LBB3_405:                              ;   in Loop: Header=BB3_401 Depth=2
	s_mov_b32 s1, -1
.LBB3_406:                              ; %Flow1163
                                        ;   in Loop: Header=BB3_401 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_401
; %bb.407:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[4:5], v[10:11], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_411
; %bb.408:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x2
	global_load_b64 v[8:9], v78, s[2:3] offset:40
	global_load_b64 v[12:13], v78, s[2:3] offset:24 glc
	global_load_b64 v[10:11], v78, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v0, vcc_lo, v8, 1
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v0, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	v_dual_cndmask_b32 v7, v7, v14 :: v_dual_cndmask_b32 v6, v6, v0
	v_and_b32_e32 v0, v7, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v8, v6, v8
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v8, 24
	v_mul_lo_u32 v8, v8, 24
	v_add_nc_u32_e32 v0, v9, v0
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v9, v13
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v10, vcc_lo, v10, v8
	v_mov_b32_e32 v8, v12
	v_add_co_ci_u32_e32 v11, vcc_lo, v11, v0, vcc_lo
	global_store_b64 v[10:11], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v78, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[8:9], v[12:13]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_411
; %bb.409:                              ; %.preheader.i.i.i104.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s0, 0
.LBB3_410:                              ; %.preheader.i.i.i104
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[10:11], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[12:13], v78, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[8:9]
	v_dual_mov_b32 v8, v12 :: v_dual_mov_b32 v9, v13
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_410
.LBB3_411:                              ; %__ockl_printf_append_args.exit108
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v77, v116 :: v_dual_mov_b32 v6, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v77
	v_mov_b32_e32 v7, 0
	v_cmp_eq_u32_e64 s0, s0, v77
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_417
; %bb.412:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[8:9], v78, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[6:7], v78, s[2:3] offset:40
	global_load_b64 v[10:11], v78, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v0, v7, v9
	v_and_b32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v0, v0, 24
	v_mul_hi_u32 v7, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v7, v0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v10, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v11, v0, vcc_lo
	global_load_b64 v[6:7], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v78, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB3_416
; %bb.413:                              ; %.preheader3.i.i.i115.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s5, 0
.LBB3_414:                              ; %.preheader3.i.i.i115
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[10:11], v78, s[2:3] offset:40
	global_load_b64 v[12:13], v78, s[2:3]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, v10, v8
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v0, 24, v[12:13]
	v_and_b32_e32 v12, v11, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v0, v7
	v_mad_u64_u32 v[10:11], null, v12, 24, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v7, v10
	global_load_b64 v[6:7], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v78, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_414
; %bb.415:                              ; %Flow1156
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB3_416:                              ; %Flow1158
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_417:                              ; %.loopexit4.i.i.i109
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[12:13], v78, s[2:3] offset:40
	global_load_b128 v[8:11], v78, s[2:3]
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v12
	v_readfirstlane_b32 s7, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB3_419
; %bb.418:                              ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v79, s13 :: v_dual_mov_b32 v80, v78
	s_add_i32 s13, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v8, s9
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v9, vcc_lo
	global_store_b128 v[6:7], v[79:82], off offset:8
.LBB3_419:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[6:7], 6, v[77:78]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v10, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
	s_mov_b32 s17, s16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v0, v6
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_and_or_b32 v4, 0xffffff1f, v4, 32
	v_add_co_ci_u32_e32 v11, vcc_lo, v11, v7, vcc_lo
	v_dual_mov_b32 v6, v1 :: v_dual_mov_b32 v7, v78
	v_dual_mov_b32 v12, s16 :: v_dual_mov_b32 v13, s17
	v_dual_mov_b32 v14, s18 :: v_dual_mov_b32 v15, s19
	s_clause 0x3
	global_store_b128 v[10:11], v[4:7], off
	global_store_b128 v[10:11], v[12:15], off offset:16
	global_store_b128 v[10:11], v[12:15], off offset:32
	global_store_b128 v[10:11], v[12:15], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_427
; %bb.420:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x1
	global_load_b64 v[14:15], v78, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v78, s[2:3] offset:40
	v_dual_mov_b32 v12, s4 :: v_dual_mov_b32 v13, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s14, v0
	v_readfirstlane_b32 s15, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[14:15], s[14:15], s[4:5]
	s_mul_i32 s7, s15, 24
	s_mul_hi_u32 s13, s14, 24
	s_mul_i32 s14, s14, 24
	s_add_i32 s13, s13, s7
	v_add_co_u32 v0, vcc_lo, v8, s14
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v9, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[0:1], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v78, v[12:15], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[6:7], v[14:15]
	s_cbranch_execz .LBB3_423
; %bb.421:                              ; %.preheader1.i.i.i113.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s13, 0
.LBB3_422:                              ; %.preheader1.i.i.i113
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
	s_sleep 1
	global_store_b64 v[0:1], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v78, v[4:7], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB3_422
.LBB3_423:                              ; %Flow1154
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[0:1], v78, s[2:3] offset:16
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v4, s13, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_425
; %bb.424:                              ;   in Loop: Header=BB3_2 Depth=1
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v77, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[77:78], off offset:8
.LBB3_425:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB3_427
; %bb.426:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b32 v77, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v77
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[77:78], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_427:                              ; %Flow1155
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v0, vcc_lo, v8, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s8, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_428:                              ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v4, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_430
; %bb.429:                              ;   in Loop: Header=BB3_428 Depth=2
	global_load_b32 v4, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v4, 1, v4
.LBB3_430:                              ;   in Loop: Header=BB3_428 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v4
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_432
; %bb.431:                              ;   in Loop: Header=BB3_428 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_433
.LBB3_432:                              ;   in Loop: Header=BB3_428 Depth=2
	s_mov_b32 s1, -1
.LBB3_433:                              ; %Flow1149
                                        ;   in Loop: Header=BB3_428 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_428
; %bb.434:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[4:5], v[10:11], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_438
; %bb.435:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x2
	global_load_b64 v[0:1], v78, s[2:3] offset:40
	global_load_b64 v[10:11], v78, s[2:3] offset:24 glc
	global_load_b64 v[8:9], v78, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v12, vcc_lo, v0, 1
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v12, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	v_dual_cndmask_b32 v7, v7, v13 :: v_dual_cndmask_b32 v6, v6, v12
	v_and_b32_e32 v1, v7, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, v6, v0
	v_mul_hi_u32 v12, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, vcc_lo, v8, v0
	v_mov_b32_e32 v8, v10
	v_mul_lo_u32 v1, v1, 24
	v_add_nc_u32_e32 v1, v12, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo
	v_mov_b32_e32 v9, v11
	global_store_b64 v[0:1], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v78, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[8:9], v[10:11]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_438
; %bb.436:                              ; %.preheader.i.i.i112.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s0, 0
.LBB3_437:                              ; %.preheader.i.i.i112
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[0:1], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v78, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[8:9]
	v_dual_mov_b32 v8, v10 :: v_dual_mov_b32 v9, v11
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_437
.LBB3_438:                              ; %__ockl_printf_append_args.exit116
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v77, v116 :: v_dual_mov_b32 v0, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v77
	v_mov_b32_e32 v1, 0
	v_cmp_eq_u32_e64 s0, s0, v77
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_444
; %bb.439:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[8:9], v78, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v78, s[2:3] offset:40
	global_load_b64 v[6:7], v78, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v9
	v_and_b32_e32 v0, v0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v10, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v10, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo
	global_load_b64 v[6:7], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v78, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[0:1], v[8:9]
	s_cbranch_execz .LBB3_443
; %bb.440:                              ; %.preheader3.i.i.i123.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s5, 0
.LBB3_441:                              ; %.preheader3.i.i.i123
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v78, s[2:3] offset:40
	global_load_b64 v[10:11], v78, s[2:3]
	v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v8
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v6, 24, v[10:11]
	v_and_b32_e32 v10, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v10, 24, v[1:2]
	v_mov_b32_e32 v1, v6
	global_load_b64 v[6:7], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v78, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_441
; %bb.442:                              ; %Flow1142
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB3_443:                              ; %Flow1144
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_444:                              ; %.loopexit4.i.i.i117
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[6:7], v78, s[2:3] offset:40
	global_load_b128 v[8:11], v78, s[2:3]
	v_readfirstlane_b32 s4, v0
	v_readfirstlane_b32 s5, v1
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v6
	v_readfirstlane_b32 s7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB3_446
; %bb.445:                              ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v79, s13 :: v_dual_mov_b32 v80, v78
	s_add_i32 s13, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v8, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v9, vcc_lo
	global_store_b128 v[0:1], v[79:82], off offset:8
.LBB3_446:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[0:1], 6, v[77:78]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v10, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v11, vcc_lo
	s_mov_b32 s17, s16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v6, v0
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_and_or_b32 v4, 0xffffff1f, v4, 32
	v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo
	v_mov_b32_e32 v6, v2
	v_dual_mov_b32 v7, v78 :: v_dual_mov_b32 v10, s16
	v_dual_mov_b32 v11, s17 :: v_dual_mov_b32 v12, s18
	v_mov_b32_e32 v13, s19
	s_clause 0x3
	global_store_b128 v[0:1], v[4:7], off
	global_store_b128 v[0:1], v[10:13], off offset:16
	global_store_b128 v[0:1], v[10:13], off offset:32
	global_store_b128 v[0:1], v[10:13], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_454
; %bb.447:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x1
	global_load_b64 v[14:15], v78, s[2:3] offset:32 glc
	global_load_b64 v[4:5], v78, s[2:3] offset:40
	v_dual_mov_b32 v12, s4 :: v_dual_mov_b32 v13, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s14, v4
	v_readfirstlane_b32 s15, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[14:15], s[14:15], s[4:5]
	s_mul_i32 s7, s15, 24
	s_mul_hi_u32 s13, s14, 24
	s_mul_i32 s14, s14, 24
	s_add_i32 s13, s13, s7
	v_add_co_u32 v10, vcc_lo, v8, s14
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v9, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[10:11], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v78, v[12:15], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[6:7], v[14:15]
	s_cbranch_execz .LBB3_450
; %bb.448:                              ; %.preheader1.i.i.i121.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s13, 0
.LBB3_449:                              ; %.preheader1.i.i.i121
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
	s_sleep 1
	global_store_b64 v[10:11], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v78, v[4:7], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB3_449
.LBB3_450:                              ; %Flow1140
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[4:5], v78, s[2:3] offset:16
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s13, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB3_452
; %bb.451:                              ;   in Loop: Header=BB3_2 Depth=1
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v77, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[4:5], v[77:78], off offset:8
.LBB3_452:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[6:7], v[4:5], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	s_cbranch_vccnz .LBB3_454
; %bb.453:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b32 v77, v[4:5], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v77
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[6:7], v[77:78], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_454:                              ; %Flow1141
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v2, vcc_lo, v8, s9
	v_add_co_ci_u32_e32 v5, vcc_lo, s8, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v2, 20
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
.LBB3_455:                              ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_457
; %bb.456:                              ;   in Loop: Header=BB3_455 Depth=2
	global_load_b32 v2, v[4:5], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_457:                              ;   in Loop: Header=BB3_455 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_459
; %bb.458:                              ;   in Loop: Header=BB3_455 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_460
.LBB3_459:                              ;   in Loop: Header=BB3_455 Depth=2
	s_mov_b32 s1, -1
.LBB3_460:                              ; %Flow1135
                                        ;   in Loop: Header=BB3_455 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_455
; %bb.461:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[0:1], v[0:1], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_465
; %bb.462:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x2
	global_load_b64 v[6:7], v78, s[2:3] offset:40
	global_load_b64 v[10:11], v78, s[2:3] offset:24 glc
	global_load_b64 v[8:9], v78, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v2, vcc_lo, v6, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	v_dual_cndmask_b32 v5, v5, v12 :: v_dual_cndmask_b32 v4, v4, v2
	v_and_b32_e32 v2, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v6, v4, v6
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v7, v6, 24
	v_mul_lo_u32 v6, v6, 24
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v7, v11
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, v8, v6
	v_mov_b32_e32 v6, v10
	v_add_co_ci_u32_e32 v9, vcc_lo, v9, v2, vcc_lo
	global_store_b64 v[8:9], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v78, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[6:7], v[10:11]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_465
; %bb.463:                              ; %.preheader.i.i.i120.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s0, 0
.LBB3_464:                              ; %.preheader.i.i.i120
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[8:9], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v78, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[6:7]
	v_dual_mov_b32 v6, v10 :: v_dual_mov_b32 v7, v11
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_464
.LBB3_465:                              ; %__ockl_printf_append_args.exit124
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v77, v116 :: v_dual_mov_b32 v8, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v77
	v_mov_b32_e32 v9, 0
	v_cmp_eq_u32_e64 s0, s0, v77
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_471
; %bb.466:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[6:7], v78, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v78, s[2:3] offset:40
	global_load_b64 v[8:9], v78, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v5, v7
	v_and_b32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v5, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v2, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v78, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB3_470
; %bb.467:                              ; %.preheader3.i.i.i131.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s5, 0
.LBB3_468:                              ; %.preheader3.i.i.i131
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v78, s[2:3] offset:40
	global_load_b64 v[10:11], v78, s[2:3]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v4, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[8:9], null, v2, 24, v[10:11]
	v_and_b32_e32 v10, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v2, v9
	v_mad_u64_u32 v[4:5], null, v10, 24, v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v9, v4
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v78, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB3_468
; %bb.469:                              ; %Flow1128
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB3_470:                              ; %Flow1130
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB3_471:                              ; %.loopexit4.i.i.i125
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[10:11], v78, s[2:3] offset:40
	global_load_b128 v[4:7], v78, s[2:3]
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v10
	v_readfirstlane_b32 s7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB3_473
; %bb.472:                              ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v79, s13 :: v_dual_mov_b32 v80, v78
	s_add_i32 s13, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v4, s9
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v5, vcc_lo
	global_store_b128 v[8:9], v[79:82], off offset:8
.LBB3_473:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[8:9], 6, v[77:78]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s17, s16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v2, v8
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_and_or_b32 v0, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo
	v_dual_mov_b32 v2, v3 :: v_dual_mov_b32 v3, v78
	v_dual_mov_b32 v6, s16 :: v_dual_mov_b32 v7, s17
	v_dual_mov_b32 v8, s18 :: v_dual_mov_b32 v9, s19
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_481
; %bb.474:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x1
	global_load_b64 v[10:11], v78, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v78, s[2:3] offset:40
	v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v9, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s14, v0
	v_readfirstlane_b32 s15, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[14:15], s[14:15], s[4:5]
	s_mul_i32 s7, s15, 24
	s_mul_hi_u32 s13, s14, 24
	s_mul_i32 s14, s14, 24
	s_add_i32 s13, s13, s7
	v_add_co_u32 v6, vcc_lo, v4, s14
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v5, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[6:7], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v78, v[8:11], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[10:11]
	s_cbranch_execz .LBB3_477
; %bb.475:                              ; %.preheader1.i.i.i129.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s13, 0
.LBB3_476:                              ; %.preheader1.i.i.i129
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[6:7], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v78, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB3_476
.LBB3_477:                              ; %Flow1126
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[0:1], v78, s[2:3] offset:16
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s13, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB3_479
; %bb.478:                              ;   in Loop: Header=BB3_2 Depth=1
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v77, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[77:78], off offset:8
.LBB3_479:                              ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB3_481
; %bb.480:                              ;   in Loop: Header=BB3_2 Depth=1
	global_load_b32 v77, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v77
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[77:78], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_481:                              ; %Flow1127
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v0, vcc_lo, v4, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s8, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_482:                              ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_484
; %bb.483:                              ;   in Loop: Header=BB3_482 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_484:                              ;   in Loop: Header=BB3_482 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_486
; %bb.485:                              ;   in Loop: Header=BB3_482 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_487
.LBB3_486:                              ;   in Loop: Header=BB3_482 Depth=2
	s_mov_b32 s1, -1
.LBB3_487:                              ; %Flow1121
                                        ;   in Loop: Header=BB3_482 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_482
; %bb.488:                              ;   in Loop: Header=BB3_2 Depth=1
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB3_492
; %bb.489:                              ;   in Loop: Header=BB3_2 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v78, s[2:3] offset:40
	global_load_b64 v[6:7], v78, s[2:3] offset:24 glc
	global_load_b64 v[4:5], v78, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v78, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_492
; %bb.490:                              ; %.preheader.i.i.i128.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s0, 0
.LBB3_491:                              ; %.preheader.i.i.i128
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v78, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_491
.LBB3_492:                              ; %Flow1323
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	global_load_b64 v[39:40], v[91:92], off
	s_add_i32 s12, s12, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_cmpk_lg_i32 s12, 0x4c
	s_waitcnt vmcnt(0)
	flat_load_b32 v0, v[39:40] offset:188
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_perm_b32 v0, 0, v0, 0x10203
	v_add_nc_u32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_perm_b32 v0, 0, v0, 0x10203
	flat_store_b32 v[39:40], v0 offset:188
	s_cbranch_scc1 .LBB3_2
.LBB3_493:                              ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10scryptCudaPP10SCRYPT_PKG
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 640
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 136
		.amdhsa_next_free_sgpr 50
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z10scryptCudaPP10SCRYPT_PKG, .Lfunc_end3-_Z10scryptCudaPP10SCRYPT_PKG
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 25088
; NumSgprs: 52
; NumVgprs: 136
; ScratchSize: 640
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 6
; VGPRBlocks: 16
; NumSGPRsForWavesPerEU: 52
; NumVGPRsForWavesPerEU: 136
; Occupancy: 10
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	_ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k,@object ; @_ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k
	.section	.rodata,"a",@progbits
	.p2align	4, 0x0
_ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k:
	.long	1116352408                      ; 0x428a2f98
	.long	1899447441                      ; 0x71374491
	.long	3049323471                      ; 0xb5c0fbcf
	.long	3921009573                      ; 0xe9b5dba5
	.long	961987163                       ; 0x3956c25b
	.long	1508970993                      ; 0x59f111f1
	.long	2453635748                      ; 0x923f82a4
	.long	2870763221                      ; 0xab1c5ed5
	.long	3624381080                      ; 0xd807aa98
	.long	310598401                       ; 0x12835b01
	.long	607225278                       ; 0x243185be
	.long	1426881987                      ; 0x550c7dc3
	.long	1925078388                      ; 0x72be5d74
	.long	2162078206                      ; 0x80deb1fe
	.long	2614888103                      ; 0x9bdc06a7
	.long	3248222580                      ; 0xc19bf174
	.long	3835390401                      ; 0xe49b69c1
	.long	4022224774                      ; 0xefbe4786
	.long	264347078                       ; 0xfc19dc6
	.long	604807628                       ; 0x240ca1cc
	.long	770255983                       ; 0x2de92c6f
	.long	1249150122                      ; 0x4a7484aa
	.long	1555081692                      ; 0x5cb0a9dc
	.long	1996064986                      ; 0x76f988da
	.long	2554220882                      ; 0x983e5152
	.long	2821834349                      ; 0xa831c66d
	.long	2952996808                      ; 0xb00327c8
	.long	3210313671                      ; 0xbf597fc7
	.long	3336571891                      ; 0xc6e00bf3
	.long	3584528711                      ; 0xd5a79147
	.long	113926993                       ; 0x6ca6351
	.long	338241895                       ; 0x14292967
	.long	666307205                       ; 0x27b70a85
	.long	773529912                       ; 0x2e1b2138
	.long	1294757372                      ; 0x4d2c6dfc
	.long	1396182291                      ; 0x53380d13
	.long	1695183700                      ; 0x650a7354
	.long	1986661051                      ; 0x766a0abb
	.long	2177026350                      ; 0x81c2c92e
	.long	2456956037                      ; 0x92722c85
	.long	2730485921                      ; 0xa2bfe8a1
	.long	2820302411                      ; 0xa81a664b
	.long	3259730800                      ; 0xc24b8b70
	.long	3345764771                      ; 0xc76c51a3
	.long	3516065817                      ; 0xd192e819
	.long	3600352804                      ; 0xd6990624
	.long	4094571909                      ; 0xf40e3585
	.long	275423344                       ; 0x106aa070
	.long	430227734                       ; 0x19a4c116
	.long	506948616                       ; 0x1e376c08
	.long	659060556                       ; 0x2748774c
	.long	883997877                       ; 0x34b0bcb5
	.long	958139571                       ; 0x391c0cb3
	.long	1322822218                      ; 0x4ed8aa4a
	.long	1537002063                      ; 0x5b9cca4f
	.long	1747873779                      ; 0x682e6ff3
	.long	1955562222                      ; 0x748f82ee
	.long	2024104815                      ; 0x78a5636f
	.long	2227730452                      ; 0x84c87814
	.long	2361852424                      ; 0x8cc70208
	.long	2428436474                      ; 0x90befffa
	.long	2756734187                      ; 0xa4506ceb
	.long	3204031479                      ; 0xbef9a3f7
	.long	3329325298                      ; 0xc67178f2
	.size	_ZZ22sha256_transform_wordsP12SHA256_CTX_WPjE1k, 256

	.type	.str.6,@object                  ; @.str.6
	.section	.rodata.str1.1,"aMS",@progbits,1
.str.6:
	.asciz	"Thread ID (%d) = %08x%08x%08x%08x%08x%08x%08x%08x\n"
	.size	.str.6, 51

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.type	__unnamed_1,@object             ; @0
	.section	.rodata,"a",@progbits
	.p2align	2, 0x0
__unnamed_1:
	.long	130054                          ; 0x1fc06
	.long	129546                          ; 0x1fa0a
	.long	110114                          ; 0x1ae22
	.long	16288                           ; 0x3fa0
	.long	6                               ; 0x6
	.long	256                             ; 0x100
	.long	0                               ; 0x0
	.long	4195                            ; 0x1063
	.long	86927                           ; 0x1538f
	.long	86758                           ; 0x152e6
	.long	73744                           ; 0x12010
	.long	10904                           ; 0x2a98
	.long	399                             ; 0x18f
	.long	512                             ; 0x200
	.long	0                               ; 0x0
	.long	2804                            ; 0xaf4
	.long	65280                           ; 0xff00
	.long	64770                           ; 0xfd02
	.long	55054                           ; 0xd70e
	.long	8192                            ; 0x2000
	.long	0                               ; 0x0
	.long	128                             ; 0x80
	.long	0                               ; 0x0
	.long	2107                            ; 0x83b
	.long	43576                           ; 0xaa38
	.long	43406                           ; 0xa98e
	.long	36895                           ; 0x901f
	.long	5504                            ; 0x1580
	.long	56                              ; 0x38
	.long	256                             ; 0x100
	.long	0                               ; 0x0
	.long	1405                            ; 0x57d
	.long	32703                           ; 0x7fbf
	.long	32193                           ; 0x7dc1
	.long	27364                           ; 0x6ae4
	.long	4160                            ; 0x1040
	.long	63                              ; 0x3f
	.long	64                              ; 0x40
	.long	0                               ; 0x0
	.long	1054                            ; 0x41e
	.long	21816                           ; 0x5538
	.long	21646                           ; 0x548e
	.long	18399                           ; 0x47df
	.long	2816                            ; 0xb00
	.long	56                              ; 0x38
	.long	128                             ; 0x80
	.long	0                               ; 0x0
	.long	703                             ; 0x2bf
	.long	16367                           ; 0x3fef
	.long	15856                           ; 0x3df0
	.long	13477                           ; 0x34a5
	.long	2176                            ; 0x880
	.long	15                              ; 0xf
	.long	32                              ; 0x20
	.long	32768                           ; 0x8000
	.long	527                             ; 0x20f
	.long	10915                           ; 0x2aa3
	.long	10745                           ; 0x29f9
	.long	9133                            ; 0x23ad
	.long	1472                            ; 0x5c0
	.long	35                              ; 0x23
	.long	64                              ; 0x40
	.long	0                               ; 0x0
	.long	352                             ; 0x160
	.long	8187                            ; 0x1ffb
	.long	7676                            ; 0x1dfc
	.long	6524                            ; 0x197c
	.long	1280                            ; 0x500
	.long	11                              ; 0xb
	.long	16                              ; 0x10
	.long	134219776                       ; 0x8000800
	.long	265                             ; 0x109
	.long	5459                            ; 0x1553
	.long	5289                            ; 0x14a9
	.long	4495                            ; 0x118f
	.long	896                             ; 0x380
	.long	19                              ; 0x13
	.long	32                              ; 0x20
	.long	524288                          ; 0x80000
	.long	176                             ; 0xb0
	.long	4094                            ; 0xffe
	.long	3583                            ; 0xdff
	.long	3045                            ; 0xbe5
	.long	1024                            ; 0x400
	.long	6                               ; 0x6
	.long	8                               ; 0x8
	.long	1077952576                      ; 0x40404040
	.long	133                             ; 0x85
	.long	2730                            ; 0xaaa
	.long	2560                            ; 0xa00
	.long	2176                            ; 0x880
	.long	512                             ; 0x200
	.long	10                              ; 0xa
	.long	16                              ; 0x10
	.long	67109888                        ; 0x4000400
	.long	89                              ; 0x59
	.long	2047                            ; 0x7ff
	.long	1536                            ; 0x600
	.long	1305                            ; 0x519
	.long	1024                            ; 0x400
	.long	3                               ; 0x3
	.long	4                               ; 0x4
	.long	2290649224                      ; 0x88888888
	.long	66                              ; 0x42
	.long	1365                            ; 0x555
	.long	1195                            ; 0x4ab
	.long	1015                            ; 0x3f7
	.long	512                             ; 0x200
	.long	5                               ; 0x5
	.long	8                               ; 0x8
	.long	538976288                       ; 0x20202020
	.long	44                              ; 0x2c
	.long	1023                            ; 0x3ff
	.long	512                             ; 0x200
	.long	435                             ; 0x1b3
	.long	2048                            ; 0x800
	.long	1                               ; 0x1
	.long	2                               ; 0x2
	.long	2863311530                      ; 0xaaaaaaaa
	.long	34                              ; 0x22
	.long	682                             ; 0x2aa
	.long	512                             ; 0x200
	.long	435                             ; 0x1b3
	.long	2048                            ; 0x800
	.long	2                               ; 0x2
	.long	4                               ; 0x4
	.long	1145324612                      ; 0x44444444
	.long	35                              ; 0x23
	.size	__unnamed_1, 512

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         88
        .size:           8
        .value_kind:     hidden_hostcall_buffer
      - .offset:         104
        .size:           8
        .value_kind:     hidden_heap_v1
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10scryptCudaPP10SCRYPT_PKG
    .private_segment_fixed_size: 640
    .sgpr_count:     52
    .sgpr_spill_count: 0
    .symbol:         _Z10scryptCudaPP10SCRYPT_PKG.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     136
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
