////////////////////////////////////////////////////////////////////////////
//
// Copyright 1993-2015 NVIDIA Corporation.  All rights reserved.
//
// Please refer to the NVIDIA end user license agreement (EULA) associated
// with this source code for terms and conditions that govern your use of
// this software. Any use, reproduction, disclosure, or distribution of
// this software and related documentation outside the terms of the EULA
// is strictly prohibited.
//
////////////////////////////////////////////////////////////////////////////

/* Template project which demonstrates the basics on how to setup a project
* example application.
* Host code.
*/

// includes, system
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <math.h>
#include <time.h>       /* time */


// includes CUDA
#include <cuda_runtime.h>

// includes, project
//#include <helper_cuda.h>
//#include <helper_functions.h> // helper functions for SDK examples

#define matrixType float // definition of matrixType variables
#define BLOCK_SIZE 16 //256 threads per block
#define SIZE 16 //size of square matrix


//functions' declarations & definitions
void MatrixMul(float *A, float *B, float *C, int size);
void MatrixPrint(float *C, int size);
void MatrixMul(float *, float *, float *, int);


//Definition of naive kernel to matrix multiplication
__global__ void MatrixMulKernel(float *M, float *N, float *P, int Width)
{
	int Row = blockIdx.y * blockDim.y + threadIdx.y;

	int Col = blockIdx.x * blockDim.x + threadIdx.x;

	if((Row < Width) && (Col < Width))
	{
		float Pvalue = 0;
		for(int k = 0; k < Width; ++k)
		{
			Pvalue += M[Row*Width+k]*N[k*Width+Col];
		}
		P[Row*Width+Col] = Pvalue;
	}
}
////////////////////////////////////////////////////////////////////////////////
// Program main
////////////////////////////////////////////////////////////////////////////////
int main(int argc, char **argv)
{

	 /* initialize random seed: */
	 srand (time(NULL));

	int deviceCount = 0;
	//Check available memory
	cudaDeviceProp deviceProp;
	cudaGetDeviceProperties(&deviceProp, 0);
    // Error code to check return values for CUDA calls
    cudaError_t err = cudaSuccess;

    if(deviceProp.totalGlobalMem < SIZE * SIZE * sizeof(matrixType))
    {
    	fprintf(stderr, "Data size too large\n");
        exit(EXIT_FAILURE);
    }


	//Allocate memory
	matrixType *matA;
	matrixType *matB;
	matrixType *matC;
	matrixType *matC2 = (matrixType*)calloc(SIZE * SIZE, sizeof(matrixType));
	cudaMallocManaged(&matA, SIZE * SIZE * sizeof(matrixType));
	cudaMallocManaged(&matB, SIZE * SIZE * sizeof(matrixType));
	cudaMallocManaged(&matC, SIZE * SIZE * sizeof(matrixType));

    // Verify that allocations succeeded
    if (matA == NULL || matB == NULL || matC == NULL || matC2 == NULL)
    {
        fprintf(stderr, "Failed to allocate matrices!\n");
        exit(EXIT_FAILURE);
    }

	//Initialize matrices
	for(int i = 0; i < SIZE * SIZE; i++)
	{
		matA[i] = rand()/(float)RAND_MAX;
		matB[i] = rand()/(float)RAND_MAX;
	}

	//Launch naive Kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid((SIZE + dimBlock.x - 1)/dimBlock.x,(SIZE + dimBlock.x - 1)/dimBlock.y);
	MatrixMulKernel<<<dimGrid, dimBlock>>>(matA, matB, matC, SIZE);
	cudaDeviceSynchronize();

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to launch Matrixmultiplication kernel (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

	//Check results on CPU
	MatrixMul(matA, matB, matC2, SIZE);

	MatrixPrint(matC, SIZE);

	MatrixPrint(matC2, SIZE);

	for(int i = 0; i < SIZE * SIZE; ++i){

		if(fabs(matC[i] - matC2[i]) > 1e-4){

            fprintf(stderr, "Result verification failed at element %d!\t%f|%f\n", i, matC[i], matC2[i]);
            exit(EXIT_FAILURE);

		}

	}



    printf("Test PASSED\n");

	cudaFree(matA);
	cudaFree(matB);
	cudaFree(matC);
	free(matC2);
    printf("Done\n");
    return 0;
}

//Definition of signle threaded matrix multiplication function
void MatrixMul(float *A, float *B, float *C, int size)
{
	for(int row = 0; row < size; row ++)
	{
		for(int col = 0; col < size; col++)
		{
			for(int k = 0; k < size; k++)
				C[(row*size) + col] += A[(row*size) + k] * B[col + (k*size)];
		}
	}
}
//Declaration of function to extract matrix
void MatrixPrint(float *C, int size)
{
	for(int row = 0; row < size; row ++)
	{
		for(int col = 0; col < size; col++)
		{
			printf("M[%d;%d] = %f\t", row + 1, col + 1, C[(row*size) + col]);
		}
		printf("\n");
	}
}

	.file	"tmpxft_003b0248_00000000-6_template.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9MatrixMulPfS_S_i
	.type	_Z9MatrixMulPfS_S_i, @function
_Z9MatrixMulPfS_S_i:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdx, %r10
	movq	%rdi, %r8
	xorl	%edx, %edx
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rsi, %rbx
	movslq	%ecx, %rsi
	movq	%rsi, %rax
	salq	$2, %rsi
.L3:
	cmpl	%eax, %ebp
	jge	.L2
	movq	%rbx, %r11
	leaq	(%r10,%rdx), %rcx
	leaq	(%r8,%rdx), %r13
	xorl	%r9d, %r9d
.L7:
	movq	%r11, %r12
	xorl	%edi, %edi
.L4:
	movss	0(%r13,%rdi,4), %xmm0
	mulss	(%r12), %xmm0
	incq	%rdi
	addq	%rsi, %r12
	addss	(%rcx), %xmm0
	movss	%xmm0, (%rcx)
	cmpl	%edi, %eax
	jg	.L4
	incl	%r9d
	addq	$4, %r11
	addq	$4, %rcx
	cmpl	%r9d, %eax
	jne	.L7
	incl	%ebp
	addq	%rsi, %rdx
	jmp	.L3
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z9MatrixMulPfS_S_i, .-_Z9MatrixMulPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"M[%d;%d] = %f\t"
.LC1:
	.string	"\n"
	.text
	.globl	_Z11MatrixPrintPfi
	.type	_Z11MatrixPrintPfi, @function
_Z11MatrixPrintPfi:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%esi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	0(,%r13,4), %r15
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r13, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L12:
	cmpl	%ebp, %r12d
	jge	.L17
	xorl	%r14d, %r14d
.L13:
	leal	1(%r12), %eax
	leal	1(%r14), %ecx
	cvtss2sd	(%rbx,%r14,4), %xmm0
	incq	%r14
	movl	%eax, 12(%rsp)
	movl	%eax, %edx
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC0(%rip), %rsi
	call	__printf_chk@PLT
	cmpq	%r13, %r14
	jne	.L13
	movl	$2, %edi
	xorl	%eax, %eax
	movl	12(%rsp), %r12d
	addq	%r15, %rbx
	leaq	.LC1(%rip), %rsi
	call	__printf_chk@PLT
	jmp	.L12
.L17:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z11MatrixPrintPfi, .-_Z11MatrixPrintPfi
	.globl	_Z40__device_stub__Z15MatrixMulKernelPfS_S_iPfS_S_i
	.type	_Z40__device_stub__Z15MatrixMulKernelPfS_S_iPfS_S_i, @function
_Z40__device_stub__Z15MatrixMulKernelPfS_S_iPfS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15MatrixMulKernelPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L18:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z40__device_stub__Z15MatrixMulKernelPfS_S_iPfS_S_i, .-_Z40__device_stub__Z15MatrixMulKernelPfS_S_iPfS_S_i
	.globl	_Z15MatrixMulKernelPfS_S_i
	.type	_Z15MatrixMulKernelPfS_S_i, @function
_Z15MatrixMulKernelPfS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z15MatrixMulKernelPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2055:
	.size	_Z15MatrixMulKernelPfS_S_i, .-_Z15MatrixMulKernelPfS_S_i
	.section	.rodata.str1.1
.LC2:
	.string	"Data size too large\n"
.LC3:
	.string	"Failed to allocate matrices!\n"
.LC7:
	.string	"Result verification failed at element %d!\t%f|%f\n"
.LC8:
	.string	"Test PASSED\n"
.LC9:
	.string	"Done\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%edi, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$1096, %rsp
	.cfi_def_cfa_offset 1120
	movq	%fs:40, %rax
	movq	%rax, 1080(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	xorl	%esi, %esi
	leaq	48(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	leaq	.LC2(%rip), %rdx
	cmpq	$1023, 336(%rsp)
	jbe	.L40
	movl	$4, %esi
	movl	$256, %edi
	call	calloc@PLT
	movq	%rsp, %rdi
	movl	$1, %edx
	movl	$1024, %esi
	movq	%rax, %rbx
	call	cudaMallocManaged@PLT
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	movl	$1024, %esi
	call	cudaMallocManaged@PLT
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	movl	$1024, %esi
	call	cudaMallocManaged@PLT
	cmpq	$0, (%rsp)
	je	.L25
	cmpq	$0, 8(%rsp)
	je	.L25
	cmpq	$0, 16(%rsp)
	je	.L25
	xorl	%ebp, %ebp
	testq	%rbx, %rbx
	jne	.L26
.L25:
	leaq	.LC3(%rip), %rdx
.L40:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L41:
	movl	$1, %edi
	call	exit@PLT
.L26:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC4(%rip), %xmm0
	movq	(%rsp), %rax
	movss	%xmm0, (%rax,%rbp)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC4(%rip), %xmm0
	movq	8(%rsp), %rax
	movss	%xmm0, (%rax,%rbp)
	addq	$4, %rbp
	cmpq	$1024, %rbp
	jne	.L26
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 44(%rsp)
	movabsq	$68719476752, %rdx
	movq	%rdi, 36(%rsp)
	movq	%rdx, 24(%rsp)
	movl	$1, 32(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$16, %ecx
	movq	(%rsp), %rdi
	call	_Z40__device_stub__Z15MatrixMulKernelPfS_S_iPfS_S_i
.L28:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movq	%rbx, %rdx
	movl	$16, %ecx
	call	_Z9MatrixMulPfS_S_i
	movq	16(%rsp), %rdi
	movl	$16, %esi
	call	_Z11MatrixPrintPfi
	movl	$16, %esi
	movq	%rbx, %rdi
	call	_Z11MatrixPrintPfi
	movq	16(%rsp), %rax
	xorl	%ecx, %ecx
	movsd	.LC6(%rip), %xmm4
	movss	.LC5(%rip), %xmm3
.L31:
	movss	(%rax,%rcx,4), %xmm0
	movss	(%rbx,%rcx,4), %xmm1
	movaps	%xmm0, %xmm2
	subss	%xmm1, %xmm2
	andps	%xmm3, %xmm2
	cvtss2sd	%xmm2, %xmm2
	comisd	%xmm4, %xmm2
	jbe	.L38
	movl	$2, %esi
	movq	stderr(%rip), %rdi
	leaq	.LC7(%rip), %rdx
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__fprintf_chk@PLT
	jmp	.L41
.L38:
	incq	%rcx
	cmpq	$256, %rcx
	jne	.L31
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	xorl	%eax, %eax
	movl	$2, %edi
	leaq	.LC9(%rip), %rsi
	call	__printf_chk@PLT
	movq	1080(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$1096, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z15MatrixMulKernelPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15MatrixMulKernelPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC4:
	.long	805306368
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC5:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	-350469331
	.long	1058682594
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

////////////////////////////////////////////////////////////////////////////
//
// Copyright 1993-2015 NVIDIA Corporation.  All rights reserved.
//
// Please refer to the NVIDIA end user license agreement (EULA) associated
// with this source code for terms and conditions that govern your use of
// this software. Any use, reproduction, disclosure, or distribution of
// this software and related documentation outside the terms of the EULA
// is strictly prohibited.
//
////////////////////////////////////////////////////////////////////////////

/* Template project which demonstrates the basics on how to setup a project
* example application.
* Host code.
*/

// includes, system
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <math.h>
#include <time.h>       /* time */


// includes CUDA
#include <hip/hip_runtime.h>

// includes, project
//#include <helper_cuda.h>
//#include <helper_functions.h> // helper functions for SDK examples

#define matrixType float // definition of matrixType variables
#define BLOCK_SIZE 16 //256 threads per block
#define SIZE 16 //size of square matrix


//functions' declarations & definitions
void MatrixMul(float *A, float *B, float *C, int size);
void MatrixPrint(float *C, int size);
void MatrixMul(float *, float *, float *, int);


//Definition of naive kernel to matrix multiplication
__global__ void MatrixMulKernel(float *M, float *N, float *P, int Width)
{
	int Row = blockIdx.y * blockDim.y + threadIdx.y;

	int Col = blockIdx.x * blockDim.x + threadIdx.x;

	if((Row < Width) && (Col < Width))
	{
		float Pvalue = 0;
		for(int k = 0; k < Width; ++k)
		{
			Pvalue += M[Row*Width+k]*N[k*Width+Col];
		}
		P[Row*Width+Col] = Pvalue;
	}
}
////////////////////////////////////////////////////////////////////////////////
// Program main
////////////////////////////////////////////////////////////////////////////////
int main(int argc, char **argv)
{

	 /* initialize random seed: */
	 srand (time(NULL));

	int deviceCount = 0;
	//Check available memory
	hipDeviceProp_t deviceProp;
	hipGetDeviceProperties(&deviceProp, 0);
    // Error code to check return values for CUDA calls
    hipError_t err = hipSuccess;

    if(deviceProp.totalGlobalMem < SIZE * SIZE * sizeof(matrixType))
    {
    	fprintf(stderr, "Data size too large\n");
        exit(EXIT_FAILURE);
    }


	//Allocate memory
	matrixType *matA;
	matrixType *matB;
	matrixType *matC;
	matrixType *matC2 = (matrixType*)calloc(SIZE * SIZE, sizeof(matrixType));
	hipMallocManaged(&matA, SIZE * SIZE * sizeof(matrixType));
	hipMallocManaged(&matB, SIZE * SIZE * sizeof(matrixType));
	hipMallocManaged(&matC, SIZE * SIZE * sizeof(matrixType));

    // Verify that allocations succeeded
    if (matA == NULL || matB == NULL || matC == NULL || matC2 == NULL)
    {
        fprintf(stderr, "Failed to allocate matrices!\n");
        exit(EXIT_FAILURE);
    }

	//Initialize matrices
	for(int i = 0; i < SIZE * SIZE; i++)
	{
		matA[i] = rand()/(float)RAND_MAX;
		matB[i] = rand()/(float)RAND_MAX;
	}

	//Launch naive Kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid((SIZE + dimBlock.x - 1)/dimBlock.x,(SIZE + dimBlock.x - 1)/dimBlock.y);
	MatrixMulKernel<<<dimGrid, dimBlock>>>(matA, matB, matC, SIZE);
	hipDeviceSynchronize();

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to launch Matrixmultiplication kernel (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

	//Check results on CPU
	MatrixMul(matA, matB, matC2, SIZE);

	MatrixPrint(matC, SIZE);

	MatrixPrint(matC2, SIZE);

	for(int i = 0; i < SIZE * SIZE; ++i){

		if(fabs(matC[i] - matC2[i]) > 1e-4){

            fprintf(stderr, "Result verification failed at element %d!\t%f|%f\n", i, matC[i], matC2[i]);
            exit(EXIT_FAILURE);

		}

	}



    printf("Test PASSED\n");

	hipFree(matA);
	hipFree(matB);
	hipFree(matC);
	free(matC2);
    printf("Done\n");
    return 0;
}

//Definition of signle threaded matrix multiplication function
void MatrixMul(float *A, float *B, float *C, int size)
{
	for(int row = 0; row < size; row ++)
	{
		for(int col = 0; col < size; col++)
		{
			for(int k = 0; k < size; k++)
				C[(row*size) + col] += A[(row*size) + k] * B[col + (k*size)];
		}
	}
}
//Declaration of function to extract matrix
void MatrixPrint(float *C, int size)
{
	for(int row = 0; row < size; row ++)
	{
		for(int col = 0; col < size; col++)
		{
			printf("M[%d;%d] = %f\t", row + 1, col + 1, C[(row*size) + col]);
		}
		printf("\n");
	}
}

	.text
	.file	"template.hip"
	.globl	_Z30__device_stub__MatrixMulKernelPfS_S_i # -- Begin function _Z30__device_stub__MatrixMulKernelPfS_S_i
	.type	_Z30__device_stub__MatrixMulKernelPfS_S_i,@function
_Z30__device_stub__MatrixMulKernelPfS_S_i: # @_Z30__device_stub__MatrixMulKernelPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15MatrixMulKernelPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__MatrixMulKernelPfS_S_i, .Lfunc_end0-_Z30__device_stub__MatrixMulKernelPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI1_1:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI1_2:
	.quad	0x3f1a36e2eb1c432d              # double 1.0E-4
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$1496, %rsp                     # imm = 0x5D8
	.cfi_def_cfa_offset 1520
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	leaq	24(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	cmpq	$1023, 288(%rbx)                # imm = 0x3FF
	jbe	.LBB1_20
# %bb.1:
	movl	$256, %edi                      # imm = 0x100
	movl	$4, %esi
	callq	calloc
	movq	%rax, %rbx
	leaq	16(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	movl	$1, %edx
	callq	hipMallocManaged
	movq	%rsp, %rdi
	movl	$1024, %esi                     # imm = 0x400
	movl	$1, %edx
	callq	hipMallocManaged
	testq	%rbx, %rbx
	je	.LBB1_21
# %bb.2:
	cmpq	$0, 16(%rsp)
	je	.LBB1_21
# %bb.3:
	cmpq	$0, 8(%rsp)
	je	.LBB1_21
# %bb.4:
	cmpq	$0, (%rsp)
	je	.LBB1_21
# %bb.5:                                # %.preheader.preheader
	xorl	%r14d, %r14d
.LBB1_6:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movq	16(%rsp), %rax
	movss	%xmm0, (%rax,%r14,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movq	8(%rsp), %rax
	movss	%xmm0, (%rax,%r14,4)
	incq	%r14
	cmpq	$256, %r14                      # imm = 0x100
	jne	.LBB1_6
# %bb.7:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$16, %ecx
	callq	_Z30__device_stub__MatrixMulKernelPfS_S_i
.LBB1_9:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rax
	xorl	%ecx, %ecx
	movq	8(%rsp), %rdx
.LBB1_10:                               # %.preheader.lr.ph.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_11 Depth 2
                                        #       Child Loop BB1_12 Depth 3
	movq	%rcx, %rsi
	shlq	$6, %rsi
	addq	%rbx, %rsi
	movq	%rdx, %rdi
	xorl	%r8d, %r8d
.LBB1_11:                               # %.preheader.i
                                        #   Parent Loop BB1_10 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_12 Depth 3
	movss	(%rsi,%r8,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	movq	%rdi, %r9
	xorl	%r10d, %r10d
.LBB1_12:                               #   Parent Loop BB1_10 Depth=1
                                        #     Parent Loop BB1_11 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rax,%r10,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r9), %xmm1
	addss	%xmm1, %xmm0
	incq	%r10
	addq	$64, %r9
	cmpq	$16, %r10
	jne	.LBB1_12
# %bb.13:                               # %._crit_edge.i
                                        #   in Loop: Header=BB1_11 Depth=2
	movss	%xmm0, (%rsi,%r8,4)
	incq	%r8
	addq	$4, %rdi
	cmpq	$16, %r8
	jne	.LBB1_11
# %bb.14:                               # %._crit_edge26.i
                                        #   in Loop: Header=BB1_10 Depth=1
	incq	%rcx
	addq	$64, %rax
	cmpq	$16, %rcx
	jne	.LBB1_10
# %bb.15:                               # %_Z9MatrixMulPfS_S_i.exit
	movq	(%rsp), %rdi
	movl	$16, %esi
	callq	_Z11MatrixPrintPfi
	movq	%rbx, %rdi
	movl	$16, %esi
	callq	_Z11MatrixPrintPfi
	xorl	%edx, %edx
	movq	(%rsp), %rax
	movaps	.LCPI1_1(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI1_2(%rip), %xmm1           # xmm1 = mem[0],zero
.LBB1_16:                               # =>This Inner Loop Header: Depth=1
	movss	(%rax,%rdx,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	movss	(%rbx,%rdx,4), %xmm3            # xmm3 = mem[0],zero,zero,zero
	movaps	%xmm2, %xmm4
	subss	%xmm3, %xmm4
	andps	%xmm0, %xmm4
	cvtss2sd	%xmm4, %xmm4
	ucomisd	%xmm1, %xmm4
	ja	.LBB1_19
# %bb.17:                               #   in Loop: Header=BB1_16 Depth=1
	incq	%rdx
	cmpq	$256, %rdx                      # imm = 0x100
	jne	.LBB1_16
# %bb.18:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%eax, %eax
	addq	$1496, %rsp                     # imm = 0x5D8
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB1_19:
	.cfi_def_cfa_offset 1520
	movq	stderr(%rip), %rdi
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	%xmm3, %xmm1
	movl	$.L.str.3, %esi
                                        # kill: def $edx killed $edx killed $rdx
	movb	$2, %al
	callq	fprintf
.LBB1_23:
	movl	$1, %edi
	callq	exit
.LBB1_20:
	movq	stderr(%rip), %rcx
	movl	$.L.str, %edi
	movl	$20, %esi
	jmp	.LBB1_22
.LBB1_21:
	movq	stderr(%rip), %rcx
	movl	$.L.str.1, %edi
	movl	$29, %esi
.LBB1_22:
	movl	$1, %edx
	callq	fwrite@PLT
	jmp	.LBB1_23
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z9MatrixMulPfS_S_i             # -- Begin function _Z9MatrixMulPfS_S_i
	.type	_Z9MatrixMulPfS_S_i,@function
_Z9MatrixMulPfS_S_i:                    # @_Z9MatrixMulPfS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB2_8
# %bb.1:                                # %.preheader23.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%ecx, %eax
	leaq	(,%rax,4), %r8
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
.LBB2_2:                                # %.preheader.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_3 Depth 2
                                        #       Child Loop BB2_4 Depth 3
	movl	%r9d, %r11d
	leaq	(%rdi,%r11,4), %r11
	movq	%r10, %rbx
	imulq	%rax, %rbx
	leaq	(%rdx,%rbx,4), %rbx
	movq	%rsi, %r14
	xorl	%r15d, %r15d
.LBB2_3:                                # %.preheader
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_4 Depth 3
	movss	(%rbx,%r15,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movq	%r14, %r12
	xorl	%r13d, %r13d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r11,%r13,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r12), %xmm1
	addss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r13
	addq	%r8, %r12
	cmpq	%r13, %rax
	jne	.LBB2_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_3 Depth=2
	incq	%r15
	addq	$4, %r14
	cmpq	%rax, %r15
	jne	.LBB2_3
# %bb.6:                                # %._crit_edge26
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r10
	addl	%ecx, %r9d
	cmpq	%rax, %r10
	jne	.LBB2_2
# %bb.7:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
.LBB2_8:                                # %._crit_edge28
	retq
.Lfunc_end2:
	.size	_Z9MatrixMulPfS_S_i, .Lfunc_end2-_Z9MatrixMulPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z11MatrixPrintPfi              # -- Begin function _Z11MatrixPrintPfi
	.type	_Z11MatrixPrintPfi,@function
_Z11MatrixPrintPfi:                     # @_Z11MatrixPrintPfi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, (%rsp)                    # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB3_5
# %bb.1:                                # %.preheader.lr.ph
	movl	%esi, %ebx
	movl	%esi, %r13d
	xorl	%ebp, %ebp
	xorl	%r15d, %r15d
.LBB3_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_3 Depth 2
	movl	%ebp, %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	incq	%r15
	xorl	%r12d, %r12d
.LBB3_3:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r12,4), %xmm0
	incq	%r12
	movl	$.L.str.6, %edi
	movl	%r15d, %esi
	movl	%r12d, %edx
	movb	$1, %al
	callq	printf
	cmpq	%r12, %r13
	jne	.LBB3_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	addl	%ebx, %ebp
	cmpq	%r13, %r15
	jne	.LBB3_2
.LBB3_5:                                # %._crit_edge15
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z11MatrixPrintPfi, .Lfunc_end3-_Z11MatrixPrintPfi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15MatrixMulKernelPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15MatrixMulKernelPfS_S_i,@object # @_Z15MatrixMulKernelPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z15MatrixMulKernelPfS_S_i
	.p2align	3, 0x0
_Z15MatrixMulKernelPfS_S_i:
	.quad	_Z30__device_stub__MatrixMulKernelPfS_S_i
	.size	_Z15MatrixMulKernelPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Data size too large\n"
	.size	.L.str, 21

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Failed to allocate matrices!\n"
	.size	.L.str.1, 30

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Result verification failed at element %d!\t%f|%f\n"
	.size	.L.str.3, 49

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"M[%d;%d] = %f\t"
	.size	.L.str.6, 15

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15MatrixMulKernelPfS_S_i"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Test PASSED"
	.size	.Lstr, 12

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Done"
	.size	.Lstr.1, 5

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__MatrixMulKernelPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15MatrixMulKernelPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15MatrixMulKernelPfS_S_i ; -- Begin function _Z15MatrixMulKernelPfS_S_i
	.globl	_Z15MatrixMulKernelPfS_S_i
	.p2align	8
	.type	_Z15MatrixMulKernelPfS_S_i,@function
_Z15MatrixMulKernelPfS_S_i:             ; @_Z15MatrixMulKernelPfS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
	v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v1, v2, v0
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v1, v2, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v0
	s_mov_b32 s3, s2
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v6, 0
.LBB0_5:                                ; %Flow46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15MatrixMulKernelPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15MatrixMulKernelPfS_S_i, .Lfunc_end0-_Z15MatrixMulKernelPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15MatrixMulKernelPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15MatrixMulKernelPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
