#include <stdio.h>
#include <stdlib.h>
#define SIZE 10

__global__ void Multiply(float *A, float *B , float * C){
    //compute thread's row
    int row = blockIdx.y * blockDim.y + threadIdx.y; 
    //compute thread's column
    int col = blockIdx.x * blockDim.x + threadIdx.x;

    float s = 0;
    for(int i = 0; i < SIZE; i++){
        s+= A[row*SIZE + i] * B[i*SIZE+col];
    }
    C[row*SIZE+col] = s; // assign result back to C 
}
int main(){
    float A[SIZE*SIZE];
    float B[SIZE*SIZE];
    float C[SIZE*SIZE]; 
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);
    float * d_A, * d_B, *d_C; 
    int BLOCKSIZE;
    printf("Choose block size : ");
    scanf("%d",&BLOCKSIZE);
    int GRIDSIZE = int(4096/BLOCKSIZE);
    dim3 dimBlock(BLOCKSIZE,BLOCKSIZE); // 20
    dim3 dimGrid(GRIDSIZE,GRIDSIZE);

    size_t size = SIZE*SIZE*sizeof(float);
    
    for(int i = 0; i < SIZE; i++){
        for(int j = 0; j < SIZE; j++){
            A[i*SIZE+j] = rand()%10;
            B[i*SIZE+j] = rand()%10;
            C[i*SIZE+j] = 0;
        } // 30
    }  

    cudaEventRecord(start);
    cudaMalloc((void **)&d_A, size);
    cudaMemcpy(d_A,A,size,cudaMemcpyHostToDevice); 
    cudaMalloc((void **)&d_B, size);
    cudaMemcpy(d_B,B,size,cudaMemcpyHostToDevice); 
    cudaMalloc((void **)&d_C, size);
    cudaMemcpy(d_C,C,size,cudaMemcpyHostToDevice); 
	Multiply<<<dimGrid,dimBlock>>>(d_A, d_B,d_C);
    cudaEventRecord(stop);
    cudaMemcpy(C, d_C, size, cudaMemcpyDeviceToHost);
    cudaEventSynchronize(stop);
    float elapsed = 0;
    cudaEventElapsedTime(&elapsed, start, stop);
    printf("Using Grid Size [%d, %d] and Block Size [%d, %d]..\n",  dimGrid.x, dimGrid.y,dimBlock.x, dimBlock.y);
    printf("Execution time : %f miliseconds\n", elapsed);
    cudaFree(d_A);
    cudaFree(d_B);
    cudaFree(d_C);
}

	.file	"tmpxft_002c3589_00000000-6_shared_multiply.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z31__device_stub__Z8MultiplyPfS_S_PfS_S_
	.type	_Z31__device_stub__Z8MultiplyPfS_S_PfS_S_, @function
_Z31__device_stub__Z8MultiplyPfS_S_PfS_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8MultiplyPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z31__device_stub__Z8MultiplyPfS_S_PfS_S_, .-_Z31__device_stub__Z8MultiplyPfS_S_PfS_S_
	.globl	_Z8MultiplyPfS_S_
	.type	_Z8MultiplyPfS_S_, @function
_Z8MultiplyPfS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z8MultiplyPfS_S_PfS_S_
	.cfi_endproc
.LFE2053:
	.size	_Z8MultiplyPfS_S_, .-_Z8MultiplyPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Choose block size : "
.LC1:
	.string	"%d"
.LC3:
	.string	"Using Grid Size [%d, %d] and Block Size [%d, %d]..\n"
.LC4:
	.string	"Execution time : %f miliseconds\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	$10, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1320, %rsp
	.cfi_def_cfa_offset 1376
	movq	%fs:40, %rax
	movq	%rax, 1304(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	32(%rsp), %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	$4096, %eax
	movl	32(%rsp), %ebp
	movl	$1, 88(%rsp)
	cltd
	movl	$1, 100(%rsp)
	idivl	%ebp
	movl	%eax, %ebx
.L9:
	movq	%r15, %r14
	movl	$10, %r13d
.L10:
	call	rand@PLT
	leaq	104(%rsp), %rcx
	cltd
	movq	%rcx, 16(%rsp)
	idivl	%r12d
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, 104(%rsp,%r14)
	call	rand@PLT
	leaq	504(%rsp), %rcx
	movl	$0x00000000, 904(%rsp,%r14)
	cltd
	movq	%rcx, 24(%rsp)
	idivl	%r12d
	leaq	904(%rsp), %rax
	movq	%rax, 8(%rsp)
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, 504(%rsp,%r14)
	addq	$4, %r14
	decl	%r13d
	jne	.L10
	addq	$40, %r15
	cmpq	$400, %r15
	jne	.L9
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leaq	56(%rsp), %rdi
	movl	$400, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movl	$400, %edx
	call	cudaMemcpy@PLT
	leaq	64(%rsp), %rdi
	movl	$400, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rsi
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movl	$400, %edx
	call	cudaMemcpy@PLT
	leaq	72(%rsp), %rdi
	movl	$400, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	movq	72(%rsp), %rdi
	movl	$1, %ecx
	movl	$400, %edx
	call	cudaMemcpy@PLT
	movl	%ebx, 92(%rsp)
	movl	88(%rsp), %ecx
	xorl	%r9d, %r9d
	movl	%ebx, 96(%rsp)
	movl	100(%rsp), %esi
	xorl	%r8d, %r8d
	movl	%ebp, 80(%rsp)
	movq	92(%rsp), %rdi
	movl	%ebp, 84(%rsp)
	movq	80(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z31__device_stub__Z8MultiplyPfS_S_PfS_S_
.L12:
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	72(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$400, %edx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	leaq	36(%rsp), %rdi
	movl	$0x00000000, 36(%rsp)
	call	cudaEventElapsedTime@PLT
	movl	%ebp, %r9d
	movl	%ebp, %r8d
	movl	%ebx, %ecx
	movl	%ebx, %edx
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	36(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	1304(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$1320, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z8MultiplyPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8MultiplyPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define SIZE 10

__global__ void Multiply(float *A, float *B , float * C){
    //compute thread's row
    int row = blockIdx.y * blockDim.y + threadIdx.y; 
    //compute thread's column
    int col = blockIdx.x * blockDim.x + threadIdx.x;

    float s = 0;
    for(int i = 0; i < SIZE; i++){
        s+= A[row*SIZE + i] * B[i*SIZE+col];
    }
    C[row*SIZE+col] = s; // assign result back to C 
}
int main(){
    float A[SIZE*SIZE];
    float B[SIZE*SIZE];
    float C[SIZE*SIZE]; 
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);
    float * d_A, * d_B, *d_C; 
    int BLOCKSIZE;
    printf("Choose block size : ");
    scanf("%d",&BLOCKSIZE);
    int GRIDSIZE = int(4096/BLOCKSIZE);
    dim3 dimBlock(BLOCKSIZE,BLOCKSIZE); // 20
    dim3 dimGrid(GRIDSIZE,GRIDSIZE);

    size_t size = SIZE*SIZE*sizeof(float);
    
    for(int i = 0; i < SIZE; i++){
        for(int j = 0; j < SIZE; j++){
            A[i*SIZE+j] = rand()%10;
            B[i*SIZE+j] = rand()%10;
            C[i*SIZE+j] = 0;
        } // 30
    }  

    hipEventRecord(start);
    hipMalloc((void **)&d_A, size);
    hipMemcpy(d_A,A,size,hipMemcpyHostToDevice); 
    hipMalloc((void **)&d_B, size);
    hipMemcpy(d_B,B,size,hipMemcpyHostToDevice); 
    hipMalloc((void **)&d_C, size);
    hipMemcpy(d_C,C,size,hipMemcpyHostToDevice); 
	Multiply<<<dimGrid,dimBlock>>>(d_A, d_B,d_C);
    hipEventRecord(stop);
    hipMemcpy(C, d_C, size, hipMemcpyDeviceToHost);
    hipEventSynchronize(stop);
    float elapsed = 0;
    hipEventElapsedTime(&elapsed, start, stop);
    printf("Using Grid Size [%d, %d] and Block Size [%d, %d]..\n",  dimGrid.x, dimGrid.y,dimBlock.x, dimBlock.y);
    printf("Execution time : %f miliseconds\n", elapsed);
    hipFree(d_A);
    hipFree(d_B);
    hipFree(d_C);
}

	.text
	.file	"shared_multiply.hip"
	.globl	_Z23__device_stub__MultiplyPfS_S_ # -- Begin function _Z23__device_stub__MultiplyPfS_S_
	.type	_Z23__device_stub__MultiplyPfS_S_,@function
_Z23__device_stub__MultiplyPfS_S_:      # @_Z23__device_stub__MultiplyPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8MultiplyPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__MultiplyPfS_S_, .Lfunc_end0-_Z23__device_stub__MultiplyPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1272, %rsp                     # imm = 0x4F8
	.cfi_def_cfa_offset 1328
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	xorl	%r12d, %r12d
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	60(%rsp), %rbx
	movl	$.L.str.1, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %r15d
	movl	$4096, %eax                     # imm = 0x1000
	xorl	%edx, %edx
	idivl	%r15d
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movq	%r15, 48(%rsp)                  # 8-byte Spill
	shlq	$32, %r15
	leaq	64(%rsp), %r13
	leaq	464(%rsp), %rbp
	leaq	864(%rsp), %r14
.LBB1_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorl	%ebx, %ebx
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r14,%rbx,4)
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbp,%rbx,4)
	movl	$0, (%r13,%rbx,4)
	incq	%rbx
	cmpq	$10, %rbx
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%r12
	addq	$40, %r13
	addq	$40, %rbp
	addq	$40, %r14
	cmpq	$10, %r12
	jne	.LBB1_1
# %bb.4:
	movq	48(%rsp), %rbx                  # 8-byte Reload
	orq	%rbx, %r15
	movq	40(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %r12
	shlq	$32, %r12
	orq	%r14, %r12
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	24(%rsp), %r13
	movl	$400, %esi                      # imm = 0x190
	movq	%r13, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	leaq	864(%rsp), %rsi
	movl	$400, %edx                      # imm = 0x190
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %r13
	movl	$400, %esi                      # imm = 0x190
	movq	%r13, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	leaq	464(%rsp), %rsi
	movl	$400, %edx                      # imm = 0x190
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rsp, %r13
	movl	$400, %esi                      # imm = 0x190
	movq	%r13, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	leaq	64(%rsp), %rsi
	movl	$400, %edx                      # imm = 0x190
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	_Z23__device_stub__MultiplyPfS_S_
.LBB1_6:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rsi
	leaq	64(%rsp), %rdi
	movl	$400, %edx                      # imm = 0x190
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	56(%rsp), %r15
	movl	$0, (%r15)
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	movl	$.L.str.2, %edi
	movl	%r14d, %esi
	movl	%r14d, %edx
	movl	%ebx, %ecx
	movl	%ebx, %r8d
	xorl	%eax, %eax
	callq	printf
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$1272, %rsp                     # imm = 0x4F8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8MultiplyPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8MultiplyPfS_S_,@object       # @_Z8MultiplyPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z8MultiplyPfS_S_
	.p2align	3, 0x0
_Z8MultiplyPfS_S_:
	.quad	_Z23__device_stub__MultiplyPfS_S_
	.size	_Z8MultiplyPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Choose block size : "
	.size	.L.str, 21

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Using Grid Size [%d, %d] and Block Size [%d, %d]..\n"
	.size	.L.str.2, 52

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Execution time : %f miliseconds\n"
	.size	.L.str.3, 33

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8MultiplyPfS_S_"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__MultiplyPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8MultiplyPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8MultiplyPfS_S_       ; -- Begin function _Z8MultiplyPfS_S_
	.globl	_Z8MultiplyPfS_S_
	.p2align	8
	.type	_Z8MultiplyPfS_S_,@function
_Z8MultiplyPfS_S_:                      ; @_Z8MultiplyPfS_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_bfe_u32 v1, v0, 10, 10
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v2, 10
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_mad_u64_u32 v[2:3], null, s14, s2, v[0:1]
	v_mov_b32_e32 v0, 0
	s_mov_b64 s[2:3], 0
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	v_mov_b32_e32 v3, v2
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v4, 31, v3
	v_add_co_u32 v7, vcc_lo, v5, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v6, vcc_lo
	v_lshlrev_b64 v[9:10], 2, v[3:4]
	v_add_nc_u32_e32 v3, 10, v3
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 40
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	global_load_b32 v4, v[7:8], off
	global_load_b32 v7, v[9:10], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v0, v4, v7
	s_cbranch_scc0 .LBB0_1
; %bb.2:
	v_add_nc_u32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8MultiplyPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8MultiplyPfS_S_, .Lfunc_end0-_Z8MultiplyPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8MultiplyPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8MultiplyPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
