#include <cuda.h>
#include <stdio.h>

__global__ void matAddKernel(float* A, float* B, float* C, int width, int height){
	int col = blockDim.x*blockIdx.x + threadIdx.x;
	int row = blockDim.y*blockIdx.y + threadIdx.y;

	int i = col + row*width;

	if(i < width*height){
		C[i] = A[i] + B[i];
	}
}

void matAdd(float* A, float* B, float* C, int width, int height)
{
	int size = width * height * sizeof(float);
	static float *d_A, *d_B, *d_C;

	cudaMalloc((void **) &d_A, size);
	cudaMemcpy(d_A, A, size, cudaMemcpyHostToDevice);

	cudaMalloc((void **) &d_B, size);
	cudaMemcpy(d_B, B, size, cudaMemcpyHostToDevice);

	cudaMalloc((void **) &d_C, size);

	dim3 dimGrid(5, 4, 1);
	dim3 dimBlock(16, 16, 1);

	matAddKernel<<<dimGrid, dimBlock>>>(d_A, d_B, d_C, width, height);

	cudaMemcpy(C, d_C, size, cudaMemcpyDeviceToHost);

	printf("\nA: \n");
	for (int i = 0; i < 4; i++) {
		for (int j = 0; j < 4; j++){
			printf("%2.0f ", A[i + j*width]);
		}
		printf("\n");
	}
	printf("\nB: \n");
	for (int i = 0; i < 4; i++) {
		for (int j = 0; j < 4; j++){
			printf("%2.0f ", B[i + j*width]);
		}
		printf("\n");
	}
	printf("\n-------------------------------------");
	printf("\nC: \n");
	for (int i = 0; i < 4; i++) {
		for (int j = 0; j < 4; j++){
			printf("%2.0f ", C[i + j*width]);
		}
		printf("\n");
	}
	printf("\n-------------------------------------\n");

	cudaFree(d_A);
	cudaFree(d_B);
	cudaFree(d_C);
}

int main() {
	int width = 76;
	int height = 62;
	static float h_A[76*62];
	static float h_B[76*62];
	static float h_C[76*62];

	for (int i = 0; i < width; i++) {
		for (int j = 0; j < height; j++) {
			h_A[i + j*width] = (i+j)%2;
			h_B[i + j*width] = (i+j)%3;
		}
	}
	matAdd(h_A, h_B, h_C, width, height);
}
	.file	"tmpxft_0038cc31_00000000-6_matAdd.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z38__device_stub__Z12matAddKernelPfS_S_iiPfS_S_ii
	.type	_Z38__device_stub__Z12matAddKernelPfS_S_iiPfS_S_ii, @function
_Z38__device_stub__Z12matAddKernelPfS_S_iiPfS_S_ii:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12matAddKernelPfS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z38__device_stub__Z12matAddKernelPfS_S_iiPfS_S_ii, .-_Z38__device_stub__Z12matAddKernelPfS_S_iiPfS_S_ii
	.globl	_Z12matAddKernelPfS_S_ii
	.type	_Z12matAddKernelPfS_S_ii, @function
_Z12matAddKernelPfS_S_ii:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z12matAddKernelPfS_S_iiPfS_S_ii
	.cfi_endproc
.LFE2054:
	.size	_Z12matAddKernelPfS_S_ii, .-_Z12matAddKernelPfS_S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\nA: \n"
.LC1:
	.string	"%2.0f "
.LC2:
	.string	"\n"
.LC3:
	.string	"\nB: \n"
.LC4:
	.string	"\n-------------------------------------"
.LC5:
	.string	"\nC: \n"
.LC6:
	.string	"\n-------------------------------------\n"
	.text
	.globl	_Z6matAddPfS_S_ii
	.type	_Z6matAddPfS_S_ii, @function
_Z6matAddPfS_S_ii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r8d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	leaq	_ZZ6matAddPfS_S_iiE3d_A(%rip), %rdi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%ecx, %rbx
	movl	%ebx, %r14d
	imull	%r8d, %r14d
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	sall	$2, %r14d
	movslq	%r14d, %r14
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movq	%r14, %rdx
	movq	%r13, %rsi
	movq	_ZZ6matAddPfS_S_iiE3d_A(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	%r14, %rsi
	leaq	_ZZ6matAddPfS_S_iiE3d_B(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movq	%r14, %rdx
	movq	%r12, %rsi
	movq	_ZZ6matAddPfS_S_iiE3d_B(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	%r14, %rsi
	leaq	_ZZ6matAddPfS_S_iiE3d_C(%rip), %rdi
	call	cudaMalloc@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movabsq	$17179869189, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movq	_ZZ6matAddPfS_S_iiE3d_C(%rip), %rdx
	movq	_ZZ6matAddPfS_S_iiE3d_B(%rip), %rsi
	movl	%r15d, %r8d
	movl	%ebx, %ecx
	movq	_ZZ6matAddPfS_S_iiE3d_A(%rip), %rdi
	call	_Z38__device_stub__Z12matAddKernelPfS_S_iiPfS_S_ii
.L9:
	movq	%r14, %rdx
	movq	_ZZ6matAddPfS_S_iiE3d_C(%rip), %rsi
	movq	%rbp, %rdi
	xorl	%r14d, %r14d
	movl	$2, %ecx
	salq	$2, %rbx
	call	cudaMemcpy@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L10:
	leaq	0(%r13,%r14,4), %rdx
	movl	$4, %r15d
.L11:
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC1(%rip), %rsi
	movq	%rdx, 8(%rsp)
	cvtss2sd	(%rdx), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdx
	addq	%rbx, %rdx
	decl	%r15d
	jne	.L11
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r14
	call	__printf_chk@PLT
	cmpq	$4, %r14
	jne	.L10
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r13d, %r13d
	call	__printf_chk@PLT
.L13:
	leaq	(%r12,%r13,4), %r15
	movl	$4, %r14d
.L14:
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%r15), %xmm0
	call	__printf_chk@PLT
	addq	%rbx, %r15
	decl	%r14d
	jne	.L14
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r13
	call	__printf_chk@PLT
	cmpq	$4, %r13
	jne	.L13
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r12d, %r12d
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L16:
	leaq	0(%rbp,%r12,4), %r14
	movl	$4, %r13d
.L17:
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%r14), %xmm0
	call	__printf_chk@PLT
	addq	%rbx, %r14
	decl	%r13d
	jne	.L17
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r12
	call	__printf_chk@PLT
	cmpq	$4, %r12
	jne	.L16
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	_ZZ6matAddPfS_S_iiE3d_A(%rip), %rdi
	call	cudaFree@PLT
	movq	_ZZ6matAddPfS_S_iiE3d_B(%rip), %rdi
	call	cudaFree@PLT
	movq	_ZZ6matAddPfS_S_iiE3d_C(%rip), %rdi
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z6matAddPfS_S_ii, .-_Z6matAddPfS_S_ii
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	leaq	_ZZ4mainE3h_A(%rip), %r9
	pushq	%rcx
	.cfi_def_cfa_offset 16
	leaq	_ZZ4mainE3h_B(%rip), %r10
	xorl	%ecx, %ecx
	movl	$3, %r8d
.L24:
	movl	%ecx, %r11d
	leaq	0(,%rcx,4), %rdi
	xorl	%esi, %esi
.L25:
	leal	(%rsi,%r11), %eax
	incl	%esi
	movl	%eax, %edx
	andl	$1, %edx
	cvtsi2ssl	%edx, %xmm0
	cltd
	idivl	%r8d
	movss	%xmm0, (%r9,%rdi)
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r10,%rdi)
	addq	$304, %rdi
	cmpl	$62, %esi
	jne	.L25
	incq	%rcx
	cmpq	$76, %rcx
	jne	.L24
	leaq	_ZZ4mainE3h_C(%rip), %rdx
	movl	$62, %r8d
	movq	%r10, %rsi
	movq	%r9, %rdi
	movl	$76, %ecx
	call	_Z6matAddPfS_S_ii
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z12matAddKernelPfS_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12matAddKernelPfS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZZ4mainE3h_C
	.comm	_ZZ4mainE3h_C,18848,32
	.local	_ZZ4mainE3h_B
	.comm	_ZZ4mainE3h_B,18848,32
	.local	_ZZ4mainE3h_A
	.comm	_ZZ4mainE3h_A,18848,32
	.local	_ZZ6matAddPfS_S_iiE3d_C
	.comm	_ZZ6matAddPfS_S_iiE3d_C,8,8
	.local	_ZZ6matAddPfS_S_iiE3d_B
	.comm	_ZZ6matAddPfS_S_iiE3d_B,8,8
	.local	_ZZ6matAddPfS_S_iiE3d_A
	.comm	_ZZ6matAddPfS_S_iiE3d_A,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>

__global__ void matAddKernel(float* A, float* B, float* C, int width, int height){
	int col = blockDim.x*blockIdx.x + threadIdx.x;
	int row = blockDim.y*blockIdx.y + threadIdx.y;

	int i = col + row*width;

	if(i < width*height){
		C[i] = A[i] + B[i];
	}
}

void matAdd(float* A, float* B, float* C, int width, int height)
{
	int size = width * height * sizeof(float);
	static float *d_A, *d_B, *d_C;

	hipMalloc((void **) &d_A, size);
	hipMemcpy(d_A, A, size, hipMemcpyHostToDevice);

	hipMalloc((void **) &d_B, size);
	hipMemcpy(d_B, B, size, hipMemcpyHostToDevice);

	hipMalloc((void **) &d_C, size);

	dim3 dimGrid(5, 4, 1);
	dim3 dimBlock(16, 16, 1);

	matAddKernel<<<dimGrid, dimBlock>>>(d_A, d_B, d_C, width, height);

	hipMemcpy(C, d_C, size, hipMemcpyDeviceToHost);

	printf("\nA: \n");
	for (int i = 0; i < 4; i++) {
		for (int j = 0; j < 4; j++){
			printf("%2.0f ", A[i + j*width]);
		}
		printf("\n");
	}
	printf("\nB: \n");
	for (int i = 0; i < 4; i++) {
		for (int j = 0; j < 4; j++){
			printf("%2.0f ", B[i + j*width]);
		}
		printf("\n");
	}
	printf("\n-------------------------------------");
	printf("\nC: \n");
	for (int i = 0; i < 4; i++) {
		for (int j = 0; j < 4; j++){
			printf("%2.0f ", C[i + j*width]);
		}
		printf("\n");
	}
	printf("\n-------------------------------------\n");

	hipFree(d_A);
	hipFree(d_B);
	hipFree(d_C);
}

int main() {
	int width = 76;
	int height = 62;
	static float h_A[76*62];
	static float h_B[76*62];
	static float h_C[76*62];

	for (int i = 0; i < width; i++) {
		for (int j = 0; j < height; j++) {
			h_A[i + j*width] = (i+j)%2;
			h_B[i + j*width] = (i+j)%3;
		}
	}
	matAdd(h_A, h_B, h_C, width, height);
}
	.text
	.file	"matAdd.hip"
	.globl	_Z27__device_stub__matAddKernelPfS_S_ii # -- Begin function _Z27__device_stub__matAddKernelPfS_S_ii
	.type	_Z27__device_stub__matAddKernelPfS_S_ii,@function
_Z27__device_stub__matAddKernelPfS_S_ii: # @_Z27__device_stub__matAddKernelPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12matAddKernelPfS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__matAddKernelPfS_S_ii, .Lfunc_end0-_Z27__device_stub__matAddKernelPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z6matAddPfS_S_ii               # -- Begin function _Z6matAddPfS_S_ii
	.type	_Z6matAddPfS_S_ii,@function
_Z6matAddPfS_S_ii:                      # @_Z6matAddPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %r12d
	movl	%ecx, %ebp
	movq	%rdx, %r15
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movl	%ecx, %eax
	imull	%r8d, %eax
	shll	$2, %eax
	movslq	%eax, %r13
	movl	$_ZZ6matAddPfS_S_iiE3d_A, %edi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	_ZZ6matAddPfS_S_iiE3d_A(%rip), %rdi
	movq	%rbx, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$_ZZ6matAddPfS_S_iiE3d_B, %edi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	_ZZ6matAddPfS_S_iiE3d_B(%rip), %rdi
	movq	%r14, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$_ZZ6matAddPfS_S_iiE3d_C, %edi
	movq	%r13, %rsi
	callq	hipMalloc
	movabsq	$17179869189, %rdi              # imm = 0x400000005
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	_ZZ6matAddPfS_S_iiE3d_A(%rip), %rdi
	movq	_ZZ6matAddPfS_S_iiE3d_B(%rip), %rsi
	movq	_ZZ6matAddPfS_S_iiE3d_C(%rip), %rdx
	movl	%ebp, %ecx
	movl	%r12d, %r8d
	callq	_Z27__device_stub__matAddKernelPfS_S_ii
.LBB1_2:
	movq	_ZZ6matAddPfS_S_iiE3d_C(%rip), %rsi
	movq	%r15, (%rsp)                    # 8-byte Spill
	movq	%r15, %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr, %edi
	callq	puts@PLT
	movslq	%ebp, %r12
	shlq	$2, %r12
	xorl	%r13d, %r13d
.LBB1_3:                                # %.preheader55
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	movl	$4, %ebp
	movq	%rbx, %r15
.LBB1_4:                                #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	addq	%r12, %r15
	decq	%rbp
	jne	.LBB1_4
# %bb.5:                                #   in Loop: Header=BB1_3 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r13
	addq	$4, %rbx
	cmpq	$4, %r13
	jne	.LBB1_3
# %bb.6:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%r15d, %r15d
.LBB1_7:                                # %.preheader54
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_8 Depth 2
	movl	$4, %r13d
	movq	%r14, %rbx
.LBB1_8:                                #   Parent Loop BB1_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	addq	%r12, %rbx
	decq	%r13
	jne	.LBB1_8
# %bb.9:                                #   in Loop: Header=BB1_7 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r15
	addq	$4, %r14
	cmpq	$4, %r15
	jne	.LBB1_7
# %bb.10:
	xorl	%r14d, %r14d
	movl	$.Lstr.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	(%rsp), %r13                    # 8-byte Reload
.LBB1_11:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_12 Depth 2
	movl	$4, %r15d
	movq	%r13, %rbx
.LBB1_12:                               #   Parent Loop BB1_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	addq	%r12, %rbx
	decq	%r15
	jne	.LBB1_12
# %bb.13:                               #   in Loop: Header=BB1_11 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$4, %r13
	cmpq	$4, %r14
	jne	.LBB1_11
# %bb.14:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movq	_ZZ6matAddPfS_S_iiE3d_A(%rip), %rdi
	callq	hipFree
	movq	_ZZ6matAddPfS_S_iiE3d_B(%rip), %rdi
	callq	hipFree
	movq	_ZZ6matAddPfS_S_iiE3d_C(%rip), %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end1:
	.size	_Z6matAddPfS_S_ii, .Lfunc_end1-_Z6matAddPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
	movl	$2863311531, %ecx               # imm = 0xAAAAAAAB
	xorl	%edx, %edx
.LBB2_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	movq	$-18848, %rsi                   # imm = 0xB660
	movl	%edx, %edi
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%edi, %r8d
	imulq	%rcx, %r8
	shrq	$33, %r8
	leal	(%r8,%r8,2), %r8d
	movl	%edi, %r9d
	andl	$1, %r9d
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r9d, %xmm0
	movl	%edi, %r9d
	subl	%r8d, %r9d
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r9d, %xmm1
	movss	%xmm0, _ZZ4mainE3h_A+18848(%rax,%rsi)
	movss	%xmm1, _ZZ4mainE3h_B+18848(%rax,%rsi)
	incl	%edi
	addq	$304, %rsi                      # imm = 0x130
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%rdx
	addq	$4, %rax
	cmpq	$76, %rdx
	jne	.LBB2_1
# %bb.4:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$_ZZ4mainE3h_A, %edi
	movl	$_ZZ4mainE3h_B, %esi
	movl	$_ZZ4mainE3h_C, %edx
	movl	$76, %ecx
	movl	$62, %r8d
	callq	_Z6matAddPfS_S_ii
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12matAddKernelPfS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12matAddKernelPfS_S_ii,@object # @_Z12matAddKernelPfS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z12matAddKernelPfS_S_ii
	.p2align	3, 0x0
_Z12matAddKernelPfS_S_ii:
	.quad	_Z27__device_stub__matAddKernelPfS_S_ii
	.size	_Z12matAddKernelPfS_S_ii, 8

	.type	_ZZ6matAddPfS_S_iiE3d_A,@object # @_ZZ6matAddPfS_S_iiE3d_A
	.local	_ZZ6matAddPfS_S_iiE3d_A
	.comm	_ZZ6matAddPfS_S_iiE3d_A,8,8
	.type	_ZZ6matAddPfS_S_iiE3d_B,@object # @_ZZ6matAddPfS_S_iiE3d_B
	.local	_ZZ6matAddPfS_S_iiE3d_B
	.comm	_ZZ6matAddPfS_S_iiE3d_B,8,8
	.type	_ZZ6matAddPfS_S_iiE3d_C,@object # @_ZZ6matAddPfS_S_iiE3d_C
	.local	_ZZ6matAddPfS_S_iiE3d_C
	.comm	_ZZ6matAddPfS_S_iiE3d_C,8,8
	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%2.0f "
	.size	.L.str.1, 7

	.type	_ZZ4mainE3h_A,@object           # @_ZZ4mainE3h_A
	.local	_ZZ4mainE3h_A
	.comm	_ZZ4mainE3h_A,18848,16
	.type	_ZZ4mainE3h_B,@object           # @_ZZ4mainE3h_B
	.local	_ZZ4mainE3h_B
	.comm	_ZZ4mainE3h_B,18848,16
	.type	_ZZ4mainE3h_C,@object           # @_ZZ4mainE3h_C
	.local	_ZZ4mainE3h_C
	.comm	_ZZ4mainE3h_C,18848,16
	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12matAddKernelPfS_S_ii"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\nA: "
	.size	.Lstr, 5

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\nB: "
	.size	.Lstr.1, 5

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\nC: "
	.size	.Lstr.2, 5

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"\n-------------------------------------"
	.size	.Lstr.3, 39

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__matAddKernelPfS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12matAddKernelPfS_S_ii
	.addrsig_sym _ZZ6matAddPfS_S_iiE3d_A
	.addrsig_sym _ZZ6matAddPfS_S_iiE3d_B
	.addrsig_sym _ZZ6matAddPfS_S_iiE3d_C
	.addrsig_sym _ZZ4mainE3h_A
	.addrsig_sym _ZZ4mainE3h_B
	.addrsig_sym _ZZ4mainE3h_C
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12matAddKernelPfS_S_ii ; -- Begin function _Z12matAddKernelPfS_S_ii
	.globl	_Z12matAddKernelPfS_S_ii
	.p2align	8
	.type	_Z12matAddKernelPfS_S_ii,@function
_Z12matAddKernelPfS_S_ii:               ; @_Z12matAddKernelPfS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s5, v[1:2]
	s_mul_i32 s14, s14, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v2, s2
	s_mul_i32 s2, s3, s2
	v_add3_u32 v0, s14, v0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12matAddKernelPfS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12matAddKernelPfS_S_ii, .Lfunc_end0-_Z12matAddKernelPfS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 224
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12matAddKernelPfS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12matAddKernelPfS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
