
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <iostream>
#include <stdio.h>
#include <cstdlib>
#include "cufft.h"
using namespace std;

#define TILE_X 16
#define TILE_Y 16
#define MARGIN 35

//ڴ洢˲ϵĳڴ
__constant__ double c_lpFilter[MARGIN];
__constant__ double c_hpFilter[MARGIN];
__constant__ double c_iLpFilter[MARGIN];
__constant__ double c_iHpFilter[MARGIN];

//-------------------------------------------------------------------任------------------------------------------------------------------------------------------------

//ԶάݵнС任һά,lp_output,hp_outputѾתùĴС,һ˺нչ²ת
__global__ void Dwt1D_Row(double *data,int width,int height,size_t pitch_data,int filter_len,
						  double *lp_output,size_t pitch_lpout,double *hp_output,size_t pitch_hpout)
{
	int col=threadIdx.x+blockIdx.x*blockDim.x;
	int row=threadIdx.y+blockIdx.y*blockDim.y;

	int aftWidth=(width+filter_len-1)/2;//+ĳ
	if(col>=aftWidth||row>=height)
		return;

	double* row_data=(double*)((char*)data+row*pitch_data);//ݵʼеַ
	double* row_lpout=(double*)((char*)lp_output+col*pitch_lpout);//ͨ˲ʼеַ
	double* row_hpout=(double*)((char*)hp_output+col*pitch_hpout);//ͨ˲ʼеַ

	int symIndex=filter_len+2*col;//ֻֽһֻ֣tmpIndexǵõǸڶԳչеλ
	int oriIndex=symIndex-filter_len+1;//symIndex-(filter_len-1),ڼҪȡԭʼеλ,2*col+1

	double lp_result=0;//ͨ˲ľ
	double hp_result=0;//ͨ˲ľ

#pragma unroll
	for(int i=0;i<filter_len;i++)
	{
		int index=oriIndex-i;
		double tmpValue;//洢ݵֵ
		if(index<0)
		{
			tmpValue=row_data[-index-1];//-1ȡ0-2ȡ1-3ȡ2-4ȡ3-5ȡ4,|index|-1
		}
		else
		{
			if(index>=width)
				tmpValue=row_data[2*width-index-1];//lastIndex-[(index-lastIndex)-1];(width-1)-{[index-(width-1)]-1}
			else
				tmpValue=row_data[index];
		}
		lp_result+=tmpValue*c_lpFilter[i];
		hp_result+=tmpValue*c_hpFilter[i];
	}
	
	//ֱӽת
	row_lpout[row]=lp_result;//ĿǾһ룬߶Ȳ
	row_hpout[row]=hp_result;
}

//ԶάݵнС任һά㣬зϵһһģմСҲһģԿ԰̺ϲһ˺У
//һתúĽһڴһּCLLһյĴλá
//widthѾתúĿȣheightѾתúĸ߶ȣ˺ĲпȺ͸߶ȷֱwidthheightΪ,
__global__ void Dwt1D_Col(double *lpOutput,size_t pitch_lpout,double *hpOutput,size_t pitch_hpout,int width,int height,
						  int filter_len,double *CLL,size_t pitch_cll,double *output,int offset)
{
	int col=threadIdx.x+blockIdx.x*blockDim.x;
	int row=threadIdx.y+blockIdx.y*blockDim.y;

	int aftWidth=(width+filter_len-1)/2;//+ĳ
	if(col>=aftWidth||row>=height)
		return;

	double* row_lpData=(double*)((char*)lpOutput+row*pitch_lpout);//ݵʼеַ
	double* row_hpData=(double*)((char*)hpOutput+row*pitch_hpout);//ݵʼеַ
	double* row_cll=(double*)((char*)CLL+col*pitch_cll);//CLLʼеַ

	int symIndex=filter_len+2*col;//ֻֽһֻ֣tmpIndexǵõǸڶԳչеλ
	int oriIndex=symIndex-filter_len+1;//symIndex-(filter_len-1),ڼҪȡԭʼеλ,2*col+1

	double cll_result=0;//CLLĽ
	double clh_result=0;//CLHĽ
	double chl_result=0;//CLLĽ
	double chh_result=0;//CLHĽ

#pragma unroll
	for(int i=0;i<filter_len;i++)
	{
		int index=oriIndex-i;
		double lpTmpValue;//洢lpOoutputݵֵ
		double hpTmpValue;//洢hpOoutputݵֵ
		if(index<0)
		{
			lpTmpValue=row_lpData[-index-1];//-1ȡ0-2ȡ1-3ȡ2-4ȡ3-5ȡ4,|index|-1
			hpTmpValue=row_hpData[-index-1];
		}
		else
		{
			if(index>=width)
			{
				lpTmpValue=row_lpData[2*width-index-1];//lastIndex-[(index-lastIndex)-1];(width-1)-{[index-(width-1)]-1}
				hpTmpValue=row_hpData[2*width-index-1];
			}			
			else
			{
				lpTmpValue=row_lpData[index];
				hpTmpValue=row_hpData[index];
			}
				
		}
		cll_result+=lpTmpValue*c_lpFilter[i];
		clh_result+=lpTmpValue*c_hpFilter[i];
		chl_result+=hpTmpValue*c_lpFilter[i];
		chh_result+=hpTmpValue*c_hpFilter[i];
	}

	//ֱӽת
	//offset=totalsize-sum_stepοһWaveletе
	row_cll[row]=cll_result;
	output[offset-3*aftWidth*height+col*height+row]=clh_result;
	output[offset-2*aftWidth*height+col*height+row]=chl_result;
	output[offset-aftWidth*height+col*height+row]=chh_result;
}

//С任
void Dwt2D(double *data,int data_width,int data_height,size_t pitch_data,int filter_len,double *CLL,size_t pitch_cll,double *output,int offset)
{
	//----------------------һ׶Σȶάݽзϵı任----------------------------------------------------
	//ڵһתú󣬹ڴʱֱӰתúĴС
	int height=(data_width+filter_len-1)/2;//תúĸ߶ȣԭ
	int width=data_height;//תúĿȣԭ߶

	//
	double *lpOutput;
	double *hpOutput;
	size_t pitch_lpout;
	size_t pitch_hpout;
	cudaMallocPitch((void **)&lpOutput,&pitch_lpout,sizeof(double)*width,height);
	cudaMallocPitch((void **)&hpOutput,&pitch_hpout,sizeof(double)*width,height);

	dim3 threads(TILE_X,TILE_Y);
	dim3 blocks_row((height+TILE_X-1)/TILE_X,(width+TILE_Y-1)/TILE_Y);//ԭȺԭ߶ȷgridС
	Dwt1D_Row<<<blocks_row,threads>>>(data,data_width,data_height,pitch_data,filter_len,lpOutput,pitch_lpout,hpOutput,pitch_hpout);

	//----------------------ڶ׶Σ֮ǰõѾתúľзϵı任----------------------------------------
	int aftwidth=(width+filter_len-1)/2;
	dim3 blocks_col((aftwidth+TILE_X-1)/TILE_X,(height+TILE_Y-1)/TILE_Y);
	Dwt1D_Col<<<blocks_col,threads>>>(lpOutput,pitch_lpout,hpOutput,pitch_hpout,width,height,filter_len,CLL,pitch_cll,output,offset);

	//ͷ
	cudaFree(lpOutput);
	cudaFree(hpOutput);
}


//άС任
extern "C" void Dwt2D_CUDA(	int level,int *length,
	double *originData,int data_width,int data_height,
	double *lpfilter,double *hpfilter,int filter_len,
	double *output,int total_size)
{
	int height=data_height;
	int width=data_width;

	int sum_step=0;
	double *d_output;
	cudaMalloc((void **)&d_output,sizeof(double)*total_size);

	//----------------------ѶάݸƵGPU------------------------------------------------------
	double *d_data;
	size_t pitch_data;
	cudaMallocPitch((void **)&d_data,&pitch_data,sizeof(double)*width,height);

	cudaMemcpy2D(d_data,pitch_data,originData,sizeof(double)*width,sizeof(double)*width,height,cudaMemcpyHostToDevice);	//֮ǰsizeof(double)*widthд*heightݴ
	cudaMemcpyToSymbol(c_lpFilter, lpfilter, filter_len*sizeof(double));
	cudaMemcpyToSymbol(c_hpFilter, hpfilter, filter_len*sizeof(double));
	//----------------------ݸƽ׶-----------------------------------------------------------

	//----------------------JСֽ-----------------------------------------------------------
	for(int iter=0;iter<level;iter++)
	{
		int next_width=(width+filter_len-1)/2;
		int next_height=(height+filter_len-1)/2;

		//洢ÿһ任ĳ
		length[iter*2]=next_height;
		length[iter*2+1]=next_width;
		int offset=total_size-sum_step;//CLH,CHL,CHHoutputеλ

		double *cLL;//洢һС任ĳʼ
		size_t pitch_cll;
		cudaMallocPitch((void **)&cLL,&pitch_cll,sizeof(double)*next_width,next_height);

		//ִжά任
		Dwt2D(d_data,width,height,pitch_data,filter_len,cLL,pitch_cll,d_output,offset);

		width=next_width;
		height=next_height;

		//һѭĳʼ
		cudaFree(d_data);
		d_data=cLL;
		pitch_data=pitch_cll;

		//洢
		if(iter==level-1)
		{
			cudaMemcpy2D((d_output+offset-4*next_width*next_height),sizeof(double)*next_width,cLL,pitch_cll,sizeof(double)*next_width,next_height,cudaMemcpyDeviceToDevice);
			cudaFree(cLL);
		}
		sum_step+=next_width*next_height*3;
	}
	//----------------------JСֽ-----------------------------------------------------------
	cudaMemcpy(output,d_output,sizeof(double)*total_size,cudaMemcpyDeviceToHost);
	cudaFree(d_data);
	cudaFree(d_output);
}




//-------------------------------------------------------------------任------------------------------------------------------------------------------------------------



//С任зϵ
//֮ǰķֽеȡCLLٴȫֽͨoffsetȡCLHCHLCHHֵݣoffsetһֽܴС
//ȡʱֱһһеȡ൱תú㣬൱תúУзϵļ㣬з
//ϵļ㲻Ҫٽתãú˺ĲʱblocksĿnextHeight߶ԭwidthΪݣתúĽС
//еwidth,heightתúģ൱ԭheight,ԭwidth
//CLLʹPitchʽΪҪȡʺPitchʽҲΪԭiDwt1D_rowoutputҲPitchʽ
__global__ void iDwt1D_Col(double *CLL,double *data,int offset,int width,int height,int nextWidth,int filter_len,
						   double *app,size_t pitch_app,double *detail,size_t pitch_detail)
{
	int col=threadIdx.x+blockIdx.x*blockDim.x;
 	int row=threadIdx.y+blockIdx.y*blockDim.y;

	if(col>=nextWidth||row>=height)
		return;

	//ʣݵʼλ
	int clh_begin=offset;
	int chl_begin=offset+width*height;
	int chh_begin=offset+2*width*height;

	//
	double* row_appData=(double*)((char*)app+col*pitch_app);//ʼеַcol൱תúк
	double* row_detailData=(double*)((char*)detail+col*pitch_detail);//ʼеַcol൱תúк

	int oriIndex=col+filter_len-2;//ʼϲλ
	
	double cll_result=0;
	double clh_result=0;
	double chl_result=0;
	double chh_result=0;

#pragma unroll
	for(int i=0;i<filter_len;i++)
	{
		int index=oriIndex-i;
		double cllTmpValue=0;
		double clhTmpValue=0;
		double chlTmpValue=0;
		double chhTmpValue=0;

		//СֽȡݲҪ򵥣λòϲУȡ0ڣǷżżԭʼȡ/2λõ
		//ֱȡ0
		if(index>=0&&index<(2*width-1)&&(index%2)==0)
		{
			cllTmpValue=CLL[index/2*height+row];//һһеȡ
			clhTmpValue=data[clh_begin+index/2*height+row];
			chlTmpValue=data[chl_begin+index/2*height+row];
			chhTmpValue=data[chh_begin+index/2*height+row];
		}
		else
		{
			cllTmpValue=0;
			clhTmpValue=0;
			chlTmpValue=0;
			chhTmpValue=0;
		}

		cll_result+=cllTmpValue*c_iLpFilter[i];
		clh_result+=clhTmpValue*c_iHpFilter[i];
		chl_result+=chlTmpValue*c_iLpFilter[i];
		chh_result+=chhTmpValue*c_iHpFilter[i];
	}

	//൱תú
	row_appData[row]=cll_result+clh_result;
	row_detailData[row]=chl_result+chh_result;
}


//С任зϵ
//зϵõֱٽзϵľ㣬ɻԭݣ˺ĲblocksĿȺ͸߶ȷֱnextWidth,
//nextHeightΪݣһ˲ת
__global__ void iDwt1D_Row(double *app,size_t pitch_app,double *detail,size_t pitch_detail,int width,int height,
						   int nextWidth,int filter_len,double *output)
{
	int col=threadIdx.x+blockIdx.x*blockDim.x;
 	int row=threadIdx.y+blockIdx.y*blockDim.y;

	if(col>=nextWidth||row>=height)
		return;

	//ݺеʼλ
	double* row_appData=(double*)((char*)app+row*pitch_app);
	double* row_detailData=(double*)((char*)detail+row*pitch_detail);

	int oriIndex=col+filter_len-2;
	
	double app_result=0;
	double detail_result=0;

#pragma unroll
	for(int i=0;i<filter_len;i++)
	{
		int index=oriIndex-i;
		double appTmpValue=0;
		double detailTmpValue=0;

		if(index>=0&&index<(2*width-1)&&(index%2)==0)
		{
			appTmpValue=row_appData[index/2];
			detailTmpValue=row_detailData[index/2];
		}
		else
		{
			appTmpValue=0;
			detailTmpValue=0;
		}

		app_result+=appTmpValue*c_iLpFilter[i];
		detail_result+=detailTmpValue*c_iHpFilter[i];
	}
	output[row*nextWidth+col]=app_result+detail_result;
}


//άС任
extern "C" void iDwt2D_CUDA
(
	int level,int *length,
	double *data,int data_size,
	double *lpfilter,double *hpfilter,int filter_len,
	double *output
)
{
	int height=length[0];
	int width=length[1];
	int offset=height*width;

	double *CLL;
	cudaMalloc((void **)&CLL,sizeof(double)*width*height);

	//----------------------------------ݸƽ׶---------------------------------------------
	double *d_data;
	cudaMalloc((void **)&d_data,sizeof(double)*data_size);

	cudaMemcpy(d_data,data,sizeof(double)*data_size,cudaMemcpyHostToDevice);
	cudaMemcpy(CLL,d_data,sizeof(double)*width*height,cudaMemcpyDeviceToDevice);//ʼCLL
	cudaMemcpyToSymbol(c_iLpFilter, lpfilter, filter_len*sizeof(double));
	cudaMemcpyToSymbol(c_iHpFilter, hpfilter, filter_len*sizeof(double));
	//----------------------------------ݸƽ׶------------------------------------------

	
	//----------------------------------JСع------------------------------------------------
	dim3 threads(TILE_X,TILE_Y);
	for(int iter=0;iter<level;iter++)
	{
		//ǰĸ߿
		int tmp_height=length[2*iter];
		int tmp_width=length[2*iter + 1];
		//һĸ߿
		int next_height=length[2*iter+2];
		int next_width=length[2*iter+3];

		//----------------------һ׶ΣȽзϵ任---------------------------------
		double *app;
		double *detail;
		size_t pitch_app;
		size_t pitch_detail;
		cudaMallocPitch((void **)&app,&pitch_app,sizeof(double)*tmp_width,next_height);
		cudaMallocPitch((void **)&detail,&pitch_detail,sizeof(double)*tmp_width,next_height);
		
		dim3 blocks_col((next_height+TILE_X-1)/TILE_X,(tmp_width+TILE_Y-1)/TILE_Y);
		iDwt1D_Col<<<blocks_col,threads>>>(CLL,d_data,offset,tmp_height,tmp_width,next_height,filter_len,app,pitch_app,detail,pitch_detail);

		//----------------------ڶ׶Σзϵ任-------------------------------------
		cudaFree(CLL);
		cudaMalloc((void **)&CLL,sizeof(double)*next_height*next_width);//֮ǰCLLݣCLLΪһѭĳʼ
		dim3 blocks_row((next_width+TILE_X-1)/TILE_X,(next_height+TILE_Y-1)/TILE_Y);
		iDwt1D_Row<<<blocks_row,threads>>>(app,pitch_app,detail,pitch_detail,tmp_width,next_height,next_width,filter_len,CLL);
		offset+=3*tmp_height*tmp_width;	

		cudaFree(app);
		cudaFree(detail);
	}
	//-----------------------------JСع--------------------------------------------------

	//ƻ
	height=length[2*level];
	width=length[2*level+1];
	cudaMemcpy(output,CLL,sizeof(double)*height*width,cudaMemcpyDeviceToHost);
	cudaFree(CLL);
	cudaFree(d_data);
}



/*
//ڻȡתú
__global__ void getTransposeData_shared(double *CLL,size_t pitch_CLL,double *data,int offset,int width,int height,
									    double *tr_cll,size_t pitch_cll,double *tr_clh,size_t pitch_clh,
									    double *tr_chl,size_t pitch_chl,double *tr_chh,size_t pitch_chh)
{
	int col=blockIdx.x*blockDim.x+threadIdx.x;//width
	int row=blockIdx.y*blockDim.y+threadIdx.y;//height
	if(col>=width||row>=height)
		return;

	int clh_begin=offset;
 	int chl_begin=offset+width*height;
 	int chh_begin=offset+2*width*height;


	double* row_CLL=(double*)((char*)CLL+row*pitch_CLL);
	//ʼеַ
	double* row_cll=(double*)((char*)tr_cll+col*pitch_cll);
	double* row_clh=(double*)((char*)tr_clh+col*pitch_clh);
	double* row_chl=(double*)((char*)tr_chl+col*pitch_chl);
	double* row_chh=(double*)((char*)tr_chh+col*pitch_chh);

	__shared__ double s_Data[TILE_Y][TILE_X*4];

	s_Data[threadIdx.y][threadIdx.x]=row_CLL[col];
	s_Data[threadIdx.y][threadIdx.x+TILE_X]=data[clh_begin+row*width+col];
	s_Data[threadIdx.y][threadIdx.x+TILE_X*2]=data[chl_begin+row*width+col];
	s_Data[threadIdx.y][threadIdx.x+TILE_X*3]=data[chh_begin+row*width+col];

	__syncthreads();

	row_cll[row]=s_Data[threadIdx.y][threadIdx.x];
	row_clh[row]=s_Data[threadIdx.y][threadIdx.x+TILE_X];
	row_chl[row]=s_Data[threadIdx.y][threadIdx.x+TILE_X*2];
	row_chh[row]=s_Data[threadIdx.y][threadIdx.x+TILE_X*3];
}

//С任зϵ
__global__ void iDwt1D_Col(double *CLL,size_t pitch_cll,double *CLH,size_t pitch_clh,double *CHL,size_t pitch_chl,double *CHH,size_t pitch_chh,
						   int width,int height,int nextWidth,int filter_len,
						   double *app,size_t pitch_app,double *detail,size_t pitch_detail)
{
	int col=threadIdx.x+blockIdx.x*blockDim.x;
 	int row=threadIdx.y+blockIdx.y*blockDim.y;

	if(col>=nextWidth||row>=height)
		return;

	//ݵʼеַ
	double* row_CLLData=(double*)((char*)CLL+row*pitch_cll);
	double* row_CLHData=(double*)((char*)CLH+row*pitch_clh);
	double* row_CHLData=(double*)((char*)CHL+row*pitch_chl);
	double* row_CHHData=(double*)((char*)CHH+row*pitch_chh);

	//ݵʼеַcol൱תúк
	double* row_appData=(double*)((char*)app+col*pitch_app);
	double* row_detailData=(double*)((char*)detail+col*pitch_detail);

	int oriIndex=col+filter_len-2;//ʼϲλ
	
	double cll_result=0;
	double clh_result=0;
	double chl_result=0;
	double chh_result=0;

#pragma unroll
	for(int i=0;i<filter_len;i++)
	{
		int index=oriIndex-i;
		double cllTmpValue=0;
		double clhTmpValue=0;
		double chlTmpValue=0;
		double chhTmpValue=0;

		//СֽȡݲҪ򵥣λòϲУȡ0ڣǷżżԭʼȡ/2λõ
		//ֱȡ0
		if(index>=0&&index<(2*width-1)&&(index%2)==0)
		{
			cllTmpValue=row_CLLData[index/2];
			clhTmpValue=row_CLHData[index/2];
			chlTmpValue=row_CHLData[index/2];
			chhTmpValue=row_CHHData[index/2];
		}
		else
		{
			cllTmpValue=0;
			clhTmpValue=0;
			chlTmpValue=0;
			chhTmpValue=0;
		}
		cll_result+=cllTmpValue*c_iLpFilter[i];
		clh_result+=clhTmpValue*c_iHpFilter[i];
		chl_result+=chlTmpValue*c_iLpFilter[i];
		chh_result+=chhTmpValue*c_iHpFilter[i];
	}

	//൱תú
	row_appData[row]=cll_result+clh_result;
	row_detailData[row]=chl_result+chh_result;
}

//С任зϵ
__global__ void iDwt1D_Row(double *app,size_t pitch_app,double *detail,size_t pitch_detail,int width,int height,
						   int nextWidth,int filter_len,double *output,size_t pitch_out)
{
	int col=threadIdx.x+blockIdx.x*blockDim.x;
 	int row=threadIdx.y+blockIdx.y*blockDim.y;

	if(col>=nextWidth||row>=height)
		return;

	//ݺеʼλ
	double* row_appData=(double*)((char*)app+row*pitch_app);
	double* row_detailData=(double*)((char*)detail+row*pitch_detail);
	double* row_output=(double*)((char*)output+row*pitch_out);

	int oriIndex=col+filter_len-2;
	
	double app_result=0;
	double detail_result=0;

#pragma unroll
	for(int i=0;i<filter_len;i++)
	{
		int index=oriIndex-i;
		double appTmpValue=0;
		double detailTmpValue=0;

		if(index>=0&&index<(2*width-1)&&(index%2)==0)
		{
			appTmpValue=row_appData[index/2];
			detailTmpValue=row_detailData[index/2];
		}
		else
		{
			appTmpValue=0;
			detailTmpValue=0;
		}

		app_result+=appTmpValue*c_iLpFilter[i];
		detail_result+=detailTmpValue*c_iHpFilter[i];
	}
	row_output[col]=app_result+detail_result;
}

//άС任
extern "C" void iDwt2D_CUDA
(
	int level,int *length,
	double *data,int data_size,
	double *lpfilter,double *hpfilter,int filter_len,
	double *output
)
{
	int height=length[0];
	int width=length[1];
	int offset=height*width;

	double *CLL;
	size_t pitch_CLL;
	cudaMallocPitch((void **)&CLL,&pitch_CLL,sizeof(double)*width,height);

	//----------------------------------ݸƽ׶---------------------------------------------
	double *d_data;
	cudaMalloc((void **)&d_data,sizeof(double)*data_size);

	cudaMemcpy(d_data,data,sizeof(double)*data_size,cudaMemcpyHostToDevice);
	cudaMemcpy2D(CLL,pitch_CLL,d_data,sizeof(double)*width,sizeof(double)*width,height,cudaMemcpyDeviceToDevice);//ʼCLL
	cudaMemcpyToSymbol(c_iLpFilter, lpfilter, filter_len*sizeof(double));
	cudaMemcpyToSymbol(c_iHpFilter, hpfilter, filter_len*sizeof(double));
	//----------------------------------ݸƽ׶------------------------------------------

	
	//----------------------------------JСع------------------------------------------------
	dim3 threads(TILE_X,TILE_Y);
	for(int iter=0;iter<level;iter++)
	{
		//ǰĸ߿
		int tmp_height=length[2*iter];
		int tmp_width=length[2*iter + 1];
		//һĸ߿
		int next_height=length[2*iter+2];
		int next_width=length[2*iter+3];

		//----------------------ȡת-----------------------------------------------------
		double *cll;size_t pitch_cll;
		double *clh;size_t pitch_clh;
		double *chl;size_t pitch_chl;
		double *chh;size_t pitch_chh;
		cudaMallocPitch((void **)&cll,&pitch_cll,sizeof(double)*tmp_height,tmp_width);
		cudaMallocPitch((void **)&clh,&pitch_clh,sizeof(double)*tmp_height,tmp_width);
		cudaMallocPitch((void **)&chl,&pitch_chl,sizeof(double)*tmp_height,tmp_width);
		cudaMallocPitch((void **)&chh,&pitch_chh,sizeof(double)*tmp_height,tmp_width);
		dim3 blocks_trans((tmp_width+TILE_X-1)/TILE_X,(tmp_height+TILE_Y-1)/TILE_Y);
		getTransposeData_shared<<<blocks_trans,threads>>>(CLL,pitch_CLL,d_data,offset,tmp_width,tmp_height,
														  cll,pitch_cll,clh,pitch_clh,chl,pitch_chl,chh,pitch_chh);
		//----------------------һ׶ΣȽзϵ任---------------------------------
		double *app;
		double *detail;
		size_t pitch_app;
		size_t pitch_detail;
		cudaMallocPitch((void **)&app,&pitch_app,sizeof(double)*tmp_width,next_height);
		cudaMallocPitch((void **)&detail,&pitch_detail,sizeof(double)*tmp_width,next_height);
		
		dim3 blocks_col((next_height+TILE_X-1)/TILE_X,(tmp_width+TILE_Y-1)/TILE_Y);
		iDwt1D_Col<<<blocks_col,threads>>>(cll,pitch_cll,clh,pitch_clh,chl,pitch_chl,chh,pitch_chh,
										   tmp_height,tmp_width,next_height,filter_len,app,pitch_app,detail,pitch_detail);
		//ͷ
		cudaFree(cll);
		cudaFree(clh);
		cudaFree(chl);
		cudaFree(chh);

		//----------------------ڶ׶Σзϵ任-------------------------------------
		double *out;size_t pitch_out;
		cudaMallocPitch((void **)&out,&pitch_out,sizeof(double)*next_width,next_height);
		dim3 blocks_row((next_width+TILE_X-1)/TILE_X,(next_height+TILE_Y-1)/TILE_Y);
		iDwt1D_Row<<<blocks_row,threads>>>(app,pitch_app,detail,pitch_detail,tmp_width,next_height,next_width,filter_len,out,pitch_out);
		offset+=3*tmp_height*tmp_width;	

		//ͷ
		cudaFree(app);
		cudaFree(detail);

		//-----------------------һCLLʼ----------------------------------------------
		cudaFree(CLL);
		CLL=out;
		pitch_CLL=pitch_out;

		if(iter==level-1)
		{
			cudaMemcpy2D(output,sizeof(double)*next_width,CLL,pitch_CLL,sizeof(double)*next_width,next_height,cudaMemcpyDeviceToHost);
			cudaFree(out);
		}
	}
	//-----------------------------JСع--------------------------------------------------

	cudaFree(CLL);
	cudaFree(d_data);
}

*/



//-------------------------------------------------------------------˹˲------------------------------------------------------------------------------------------------


__global__ void damp(int height,int width,int filter_len,cufftDoubleComplex *d_inp_fft,double *d_filter)
{
    int col = blockIdx.x * blockDim.x + threadIdx.x;
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	if(col>=width||row>=height||col>=filter_len)
		return;

	d_inp_fft[row*width+col].x*= d_filter[col];
	d_inp_fft[row*width+col].y*= d_filter[col];
}

//˹˲
extern "C" void GaussianFilt_CUDA(double *dwt_data,int *length,int orig_height,int dwtlevel,double sigma)
{
	int rows,cols,begin,margin,end;
	int level=dwtlevel;
	begin=length[0]*length[1];

	for(int i=0;i<level;i++)
	{		
		rows=length[2*i];
		cols=length[2*i+1];
		margin=rows*cols;
		begin+=margin;
		end=begin+margin;
		//˲
		int filter_len=cols/2+1;
		double *filter=(double*)malloc(sizeof(double)*filter_len);

		for(int k=0;k<filter_len;k++)
				filter[k]=1-exp(-(double)(k)*(k)/(2*sigma*sigma));	

		double *d_filter;
		cudaMalloc((void**)&d_filter, sizeof(double)*filter_len);
		cudaMemcpy(d_filter, filter, sizeof(double)*filter_len, cudaMemcpyHostToDevice);
		free(filter);

		//ݲ
		int size = sizeof(cufftDoubleReal)*rows*cols;
		cufftDoubleReal *inp,*d_inp;
		inp=(cufftDoubleReal *)malloc(size);
		cudaMalloc((void**)&d_inp, size);
	
		int tempindex=begin;
		for(int k=0;k<rows;k++)
		{
			for(int j=0;j<cols;j++)
			{
				inp[ j*rows+ k]=dwt_data[tempindex];	
				tempindex++;
			}
		}		
		cudaMemcpy(d_inp, inp, size, cudaMemcpyHostToDevice);

		cufftDoubleComplex *inp_fft;
		cufftHandle plan_forward,plan_backward;

		int half=rows/2+1;
		cudaMalloc((void**)&inp_fft, sizeof(cufftDoubleComplex)*(half)*cols);

		cufftPlan1d(&plan_forward, rows, CUFFT_D2Z, cols);
		cufftExecD2Z(plan_forward, d_inp,inp_fft);
		cufftDestroy(plan_forward);
		
		//damp<<<(half*cols+PITCH-1)/PITCH,PITCH>>>(half*cols,half,filter_len,inp_fft,d_filter);
		dim3 threads(TILE_X,TILE_Y);
		dim3 blocks((half+TILE_X-1)/TILE_X,(cols+TILE_Y-1)/TILE_Y);
		damp<<<blocks,threads>>>(cols,half,filter_len,inp_fft,d_filter);

		cufftPlan1d(&plan_backward, rows, CUFFT_Z2D, cols);
		cufftExecZ2D(plan_backward, inp_fft, d_inp);
		cufftDestroy(plan_backward);

		cudaMemcpy(inp, d_inp, size, cudaMemcpyDeviceToHost);

		tempindex=begin;
		for(int k=0;k<rows;k++)
		{
			for(int j=0;j<cols;j++)
				dwt_data[tempindex++]=inp[ j*rows+ k]/rows;			
		}
		begin=end+margin;

		free(inp);
		cudaFree(d_inp);
		cudaFree(inp_fft);
		cudaFree(d_filter);	
	}	
	
}


	.file	"tmpxft_00243a71_00000000-6_waveletCUDA.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3664:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z38__device_stub__Z9Dwt1D_RowPdiimiS_mS_mPdiimiS_mS_m
	.type	_Z38__device_stub__Z9Dwt1D_RowPdiimiS_mS_mPdiimiS_mS_m, @function
_Z38__device_stub__Z9Dwt1D_RowPdiimiS_mS_mPdiimiS_mS_m:
.LFB3686:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	216(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 20(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	movq	%rsp, %rax
	movq	%rax, 168(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z9Dwt1D_RowPdiimiS_mS_m(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3686:
	.size	_Z38__device_stub__Z9Dwt1D_RowPdiimiS_mS_mPdiimiS_mS_m, .-_Z38__device_stub__Z9Dwt1D_RowPdiimiS_mS_mPdiimiS_mS_m
	.globl	_Z9Dwt1D_RowPdiimiS_mS_m
	.type	_Z9Dwt1D_RowPdiimiS_mS_m, @function
_Z9Dwt1D_RowPdiimiS_mS_m:
.LFB3687:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z9Dwt1D_RowPdiimiS_mS_mPdiimiS_mS_m
	.cfi_endproc
.LFE3687:
	.size	_Z9Dwt1D_RowPdiimiS_mS_m, .-_Z9Dwt1D_RowPdiimiS_mS_m
	.globl	_Z41__device_stub__Z9Dwt1D_ColPdmS_miiiS_mS_iPdmS_miiiS_mS_i
	.type	_Z41__device_stub__Z9Dwt1D_ColPdmS_miiiS_mS_iPdmS_miiiS_mS_i, @function
_Z41__device_stub__Z9Dwt1D_ColPdmS_miiiS_mS_iPdmS_miiiS_mS_i:
.LFB3688:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	248(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	264(%rsp), %rax
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movl	%r8d, 28(%rsp)
	movl	%r9d, 24(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	72(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z9Dwt1D_ColPdmS_miiiS_mS_i(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 256
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L8:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3688:
	.size	_Z41__device_stub__Z9Dwt1D_ColPdmS_miiiS_mS_iPdmS_miiiS_mS_i, .-_Z41__device_stub__Z9Dwt1D_ColPdmS_miiiS_mS_iPdmS_miiiS_mS_i
	.globl	_Z9Dwt1D_ColPdmS_miiiS_mS_i
	.type	_Z9Dwt1D_ColPdmS_miiiS_mS_i, @function
_Z9Dwt1D_ColPdmS_miiiS_mS_i:
.LFB3689:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z9Dwt1D_ColPdmS_miiiS_mS_iPdmS_miiiS_mS_i
	.cfi_endproc
.LFE3689:
	.size	_Z9Dwt1D_ColPdmS_miiiS_mS_i, .-_Z9Dwt1D_ColPdmS_miiiS_mS_i
	.globl	_Z5Dwt2DPdiimiS_mS_i
	.type	_Z5Dwt2DPdiimiS_mS_i, @function
_Z5Dwt2DPdiimiS_mS_i:
.LFB3658:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r9, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rdi
	movq	184(%rsp), %r15
	movq	%rcx, 16(%rsp)
	movl	$2, %ecx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leal	-1(%rsi,%r8), %eax
	leaq	48(%rsp), %rsi
	cltd
	idivl	%ecx
	movslq	%ebx, %rdx
	salq	$3, %rdx
	movq	%rdx, 24(%rsp)
	movslq	%eax, %r13
	movl	%eax, 4(%rsp)
	movq	%r13, %rcx
	call	cudaMallocPitch@PLT
	movq	24(%rsp), %rdx
	movq	%r13, %rcx
	leaq	56(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMallocPitch@PLT
	movl	4(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$16, %ecx
	movl	$1, 76(%rsp)
	movabsq	$68719476752, %rsi
	addl	$15, %eax
	movq	%rsi, 68(%rsp)
	cltd
	idivl	%ecx
	movl	%eax, 80(%rsp)
	movl	%eax, %r13d
	leal	15(%rbx), %eax
	cltd
	idivl	%ecx
	movq	%rsi, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movl	%eax, 84(%rsp)
	movq	80(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	%rdx
	.cfi_def_cfa_offset 184
	movl	%r12d, %r8d
	movl	%ebx, %edx
	movl	%ebp, %esi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	64(%rsp), %r9
	movq	48(%rsp), %rcx
	movq	40(%rsp), %rdi
	call	_Z38__device_stub__Z9Dwt1D_RowPdiimiS_mS_mPdiimiS_mS_m
	addq	$32, %rsp
	.cfi_def_cfa_offset 176
.L14:
	leal	-1(%rbx,%r12), %eax
	movl	$2, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cltd
	movl	%r13d, 96(%rsp)
	movl	$1, %esi
	idivl	%ecx
	movl	$16, %ecx
	addl	$15, %eax
	cltd
	idivl	%ecx
	movl	76(%rsp), %ecx
	movq	68(%rsp), %rdx
	movl	%eax, 92(%rsp)
	movq	92(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	%rax
	.cfi_def_cfa_offset 184
	movl	200(%rsp), %eax
	movl	%ebx, %r8d
	pushq	%rax
	.cfi_def_cfa_offset 192
	pushq	%r15
	.cfi_def_cfa_offset 200
	pushq	200(%rsp)
	.cfi_def_cfa_offset 208
	pushq	%r14
	.cfi_def_cfa_offset 216
	pushq	%r12
	.cfi_def_cfa_offset 224
	movl	52(%rsp), %r9d
	movq	104(%rsp), %rcx
	movq	88(%rsp), %rdx
	movq	96(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z41__device_stub__Z9Dwt1D_ColPdmS_miiiS_mS_iPdmS_miiiS_mS_i
	addq	$48, %rsp
	.cfi_def_cfa_offset 176
.L15:
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3658:
	.size	_Z5Dwt2DPdiimiS_mS_i, .-_Z5Dwt2DPdiimiS_mS_i
	.globl	Dwt2D_CUDA
	.type	Dwt2D_CUDA, @function
Dwt2D_CUDA:
.LFB3659:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r8d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r9, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%ecx, %rbx
	movq	%rbx, %r12
	salq	$3, %rbx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	176(%rsp), %rax
	movq	%rsi, 48(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rax, 8(%rsp)
	movq	192(%rsp), %rax
	movq	%rax, 56(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	movslq	200(%rsp), %rax
	salq	$3, %rax
	movq	%rax, %rsi
	movq	%rax, 24(%rsp)
	call	cudaMalloc@PLT
	movslq	%r13d, %r9
	leaq	72(%rsp), %rdi
	movq	%rbx, %rdx
	leaq	80(%rsp), %rsi
	movq	%r9, %rcx
	movq	%r9, 16(%rsp)
	call	cudaMallocPitch@PLT
	movq	%rbx, %r8
	movq	%rbx, %rcx
	movq	%r14, %rdx
	pushq	%rdi
	.cfi_def_cfa_offset 184
	pushq	$1
	.cfi_def_cfa_offset 192
	movq	96(%rsp), %rsi
	movq	88(%rsp), %rdi
	movq	32(%rsp), %r9
	call	cudaMemcpy2D@PLT
	movslq	200(%rsp), %rbx
	xorl	%ecx, %ecx
	popq	%r8
	.cfi_def_cfa_offset 184
	movq	%rbp, %rsi
	popq	%r9
	.cfi_def_cfa_offset 176
	movl	$1, %r8d
	salq	$3, %rbx
	leaq	_ZL10c_lpFilter(%rip), %rdi
	movq	%rbx, %rdx
	call	cudaMemcpyToSymbol@PLT
	movq	8(%rsp), %rsi
	movq	%rbx, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	leaq	_ZL10c_hpFilter(%rip), %rdi
	xorl	%ebx, %ebx
	call	cudaMemcpyToSymbol@PLT
	xorl	%r10d, %r10d
	movl	%r10d, 44(%rsp)
.L19:
	cmpl	%r15d, %ebx
	jge	.L24
	movl	$2, %ecx
	leaq	96(%rsp), %rsi
	leaq	88(%rsp), %rdi
	movl	184(%rsp), %eax
	movl	200(%rsp), %r14d
	leal	-1(%r12,%rax), %eax
	cltd
	idivl	%ecx
	movl	%eax, %ebp
	movl	184(%rsp), %eax
	leal	-1(%r13,%rax), %eax
	cltd
	idivl	%ecx
	movl	%eax, 8(%rsp)
	movq	48(%rsp), %rax
	movl	8(%rsp), %edx
	movl	%ebp, 4(%rax,%rbx,8)
	movl	%edx, (%rax,%rbx,8)
	movl	44(%rsp), %eax
	subl	%eax, %r14d
	movslq	%edx, %rax
	movq	%rax, 32(%rsp)
	movslq	%ebp, %rax
	movq	32(%rsp), %rcx
	salq	$3, %rax
	movq	%rax, %rdx
	movq	%rax, 16(%rsp)
	call	cudaMallocPitch@PLT
	movl	%r13d, %edx
	pushq	%rsi
	.cfi_def_cfa_offset 184
	movl	%r12d, %esi
	pushq	%r14
	.cfi_def_cfa_offset 192
	pushq	80(%rsp)
	.cfi_def_cfa_offset 200
	pushq	120(%rsp)
	.cfi_def_cfa_offset 208
	movq	120(%rsp), %r9
	movl	216(%rsp), %r8d
	movq	112(%rsp), %rcx
	movq	104(%rsp), %rdi
	call	_Z5Dwt2DPdiimiS_mS_i
	movq	104(%rsp), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 176
	call	cudaFree@PLT
	movq	88(%rsp), %rdx
	movq	96(%rsp), %rcx
	leal	-1(%r15), %eax
	movl	8(%rsp), %r12d
	movq	%rdx, 72(%rsp)
	movq	%rcx, 80(%rsp)
	imull	%ebp, %r12d
	cmpl	%ebx, %eax
	jne	.L20
	leal	0(,%r12,4), %eax
	movslq	%r14d, %r14
	cltq
	subq	%rax, %r14
	movq	64(%rsp), %rax
	leaq	(%rax,%r14,8), %rdi
	pushq	%rax
	.cfi_def_cfa_offset 184
	pushq	$3
	.cfi_def_cfa_offset 192
	movq	32(%rsp), %r8
	movq	48(%rsp), %r9
	movq	%r8, %rsi
	call	cudaMemcpy2D@PLT
	popq	%rdx
	.cfi_def_cfa_offset 184
	popq	%rcx
	.cfi_def_cfa_offset 176
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
.L20:
	leal	(%r12,%r12,2), %r12d
	movl	8(%rsp), %r13d
	addl	%r12d, 44(%rsp)
	incq	%rbx
	movl	%ebp, %r12d
	jmp	.L19
.L24:
	movq	24(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$2, %ecx
	movq	56(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3659:
	.size	Dwt2D_CUDA, .-Dwt2D_CUDA
	.globl	_Z43__device_stub__Z10iDwt1D_ColPdS_iiiiiS_mS_mPdS_iiiiiS_mS_m
	.type	_Z43__device_stub__Z10iDwt1D_ColPdS_iiiiiS_mS_mPdS_iiiiiS_mS_m, @function
_Z43__device_stub__Z10iDwt1D_ColPdS_iiiiiS_mS_mPdS_iiiiiS_mS_m:
.LFB3690:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	232(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rax, 8(%rsp)
	movq	248(%rsp), %rax
	movl	%edx, 28(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 20(%rsp)
	movl	%r9d, 16(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 176(%rsp)
	movq	%rsp, %rax
	movq	%rax, 184(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	56(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z10iDwt1D_ColPdS_iiiiiS_mS_m(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 240
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L25:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3690:
	.size	_Z43__device_stub__Z10iDwt1D_ColPdS_iiiiiS_mS_mPdS_iiiiiS_mS_m, .-_Z43__device_stub__Z10iDwt1D_ColPdS_iiiiiS_mS_mPdS_iiiiiS_mS_m
	.globl	_Z10iDwt1D_ColPdS_iiiiiS_mS_m
	.type	_Z10iDwt1D_ColPdS_iiiiiS_mS_m, @function
_Z10iDwt1D_ColPdS_iiiiiS_mS_m:
.LFB3691:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z10iDwt1D_ColPdS_iiiiiS_mS_mPdS_iiiiiS_mS_m
	.cfi_endproc
.LFE3691:
	.size	_Z10iDwt1D_ColPdS_iiiiiS_mS_m, .-_Z10iDwt1D_ColPdS_iiiiiS_mS_m
	.globl	_Z40__device_stub__Z10iDwt1D_RowPdmS_miiiiS_PdmS_miiiiS_
	.type	_Z40__device_stub__Z10iDwt1D_RowPdmS_miiiiS_PdmS_miiiiS_, @function
_Z40__device_stub__Z10iDwt1D_RowPdmS_miiiiS_PdmS_miiiiS_:
.LFB3692:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	224(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	%rsp, %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z10iDwt1D_RowPdmS_miiiiS_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L30:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3692:
	.size	_Z40__device_stub__Z10iDwt1D_RowPdmS_miiiiS_PdmS_miiiiS_, .-_Z40__device_stub__Z10iDwt1D_RowPdmS_miiiiS_PdmS_miiiiS_
	.globl	_Z10iDwt1D_RowPdmS_miiiiS_
	.type	_Z10iDwt1D_RowPdmS_miiiiS_, @function
_Z10iDwt1D_RowPdmS_miiiiS_:
.LFB3693:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z10iDwt1D_RowPdmS_miiiiS_PdmS_miiiiS_
	.cfi_endproc
.LFE3693:
	.size	_Z10iDwt1D_RowPdmS_miiiiS_, .-_Z10iDwt1D_RowPdmS_miiiiS_
	.globl	iDwt2D_CUDA
	.type	iDwt2D_CUDA, @function
iDwt2D_CUDA:
.LFB3660:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movslq	%ecx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	salq	$3, %r12
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movslq	4(%rsi), %rbp
	movq	216(%rsp), %rax
	movl	%edi, 20(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	movslq	(%rsi), %rax
	movl	%eax, %edx
	imull	%ebp, %edx
	imulq	%rax, %rbp
	movl	%edx, 12(%rsp)
	salq	$3, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	56(%rsp), %rdi
	movq	%r12, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$3, %ecx
	call	cudaMemcpy@PLT
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movq	%r14, %rsi
	movslq	208(%rsp), %rbp
	leaq	_ZL11c_iLpFilter(%rip), %rdi
	salq	$3, %rbp
	movq	%rbp, %rdx
	call	cudaMemcpyToSymbol@PLT
	movq	%rbp, %rdx
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movq	%r13, %rsi
	leaq	_ZL11c_iHpFilter(%rip), %rdi
	xorl	%ebp, %ebp
	call	cudaMemcpyToSymbol@PLT
	movl	$1, 108(%rsp)
	movabsq	$68719476752, %rax
	movq	%rax, 100(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 32(%rsp)
.L36:
	cmpl	%ebp, 20(%rsp)
	jle	.L42
	movl	(%rbx,%rbp,8), %eax
	movslq	4(%rbx,%rbp,8), %r13
	leaq	64(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	12(%rbx,%rbp,8), %r15d
	movl	%eax, 16(%rsp)
	movslq	8(%rbx,%rbp,8), %rax
	movq	%r13, %r12
	salq	$3, %r13
	movq	%r13, %rdx
	movq	%rax, %r14
	movq	%rax, %rcx
	movq	%rax, 40(%rsp)
	call	cudaMallocPitch@PLT
	movq	%r13, %rdx
	leaq	88(%rsp), %rsi
	movslq	%r14d, %rcx
	leaq	72(%rsp), %rdi
	call	cudaMallocPitch@PLT
	leal	15(%r14), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$16, %ecx
	cltd
	movl	$1, %esi
	movl	$1, 120(%rsp)
	idivl	%ecx
	movl	%eax, 112(%rsp)
	movl	%eax, %r13d
	leal	15(%r12), %eax
	cltd
	idivl	%ecx
	movl	108(%rsp), %ecx
	movq	100(%rsp), %rdx
	movl	%eax, 116(%rsp)
	movq	112(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	pushq	%rdx
	.cfi_def_cfa_offset 216
	movl	%r14d, %r9d
	movl	%r12d, %r8d
	pushq	96(%rsp)
	.cfi_def_cfa_offset 224
	pushq	88(%rsp)
	.cfi_def_cfa_offset 232
	pushq	104(%rsp)
	.cfi_def_cfa_offset 240
	pushq	96(%rsp)
	.cfi_def_cfa_offset 248
	movl	248(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 256
	movl	64(%rsp), %ecx
	movl	60(%rsp), %edx
	movq	104(%rsp), %rsi
	movq	96(%rsp), %rdi
	call	_Z43__device_stub__Z10iDwt1D_ColPdS_iiiiiS_mS_mPdS_iiiiiS_mS_m
	addq	$48, %rsp
	.cfi_def_cfa_offset 208
.L37:
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movslq	%r14d, %rax
	movslq	%r15d, %rsi
	leaq	48(%rsp), %rdi
	imulq	%rax, %rsi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	leal	15(%r15), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$16, %ecx
	cltd
	movl	$1, %esi
	movl	%r13d, 128(%rsp)
	idivl	%ecx
	movl	108(%rsp), %ecx
	movq	100(%rsp), %rdx
	movl	$1, 132(%rsp)
	movl	%eax, 124(%rsp)
	movq	124(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	pushq	%rax
	.cfi_def_cfa_offset 216
	movl	%r14d, %r9d
	movl	%r12d, %r8d
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movl	224(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 232
	pushq	%r15
	.cfi_def_cfa_offset 240
	movq	120(%rsp), %rcx
	movq	104(%rsp), %rdx
	movq	112(%rsp), %rsi
	movq	96(%rsp), %rdi
	call	_Z40__device_stub__Z10iDwt1D_RowPdmS_miiiiS_PdmS_miiiiS_
	addq	$32, %rsp
	.cfi_def_cfa_offset 208
.L38:
	movl	16(%rsp), %eax
	movq	64(%rsp), %rdi
	incq	%rbp
	imull	%r12d, %eax
	leal	(%rax,%rax,2), %eax
	addl	%eax, 12(%rsp)
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	jmp	.L36
.L42:
	movl	20(%rsp), %eax
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	24(%rsp), %rdi
	addl	%eax, %eax
	cltq
	movslq	4(%rbx,%rax,4), %rdx
	movslq	(%rbx,%rax,4), %rax
	imulq	%rax, %rdx
	salq	$3, %rdx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	iDwt2D_CUDA, .-iDwt2D_CUDA
	.globl	_Z35__device_stub__Z4dampiiiP7double2PdiiiP7double2Pd
	.type	_Z35__device_stub__Z4dampiiiP7double2PdiiiP7double2Pd, @function
_Z35__device_stub__Z4dampiiiP7double2PdiiiP7double2Pd:
.LFB3694:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 20(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z4dampiiiP7double2Pd(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L43:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3694:
	.size	_Z35__device_stub__Z4dampiiiP7double2PdiiiP7double2Pd, .-_Z35__device_stub__Z4dampiiiP7double2PdiiiP7double2Pd
	.globl	_Z4dampiiiP7double2Pd
	.type	_Z4dampiiiP7double2Pd, @function
_Z4dampiiiP7double2Pd:
.LFB3695:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z4dampiiiP7double2PdiiiP7double2Pd
	.cfi_endproc
.LFE3695:
	.size	_Z4dampiiiP7double2Pd, .-_Z4dampiiiP7double2Pd
	.globl	GaussianFilt_CUDA
	.type	GaussianFilt_CUDA, @function
GaussianFilt_CUDA:
.LFB3661:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movl	(%rsi), %r12d
	imull	4(%rsi), %r12d
	movq	%rdi, 48(%rsp)
	movl	%ecx, 76(%rsp)
	movsd	%xmm0, 40(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
.L49:
	cmpl	%r14d, 76(%rsp)
	jle	.L64
	movl	0(%r13,%r14,8), %ebp
	movl	4(%r13,%r14,8), %ebx
	movl	$2, %ecx
	movl	%ebp, %eax
	imull	%ebx, %eax
	movl	%eax, 32(%rsp)
	addl	%r12d, %eax
	movl	%eax, 12(%rsp)
	movl	32(%rsp), %eax
	movl	12(%rsp), %edx
	addl	%edx, %eax
	movl	%eax, 72(%rsp)
	movl	%ebx, %eax
	cltd
	idivl	%ecx
	incl	%eax
	movslq	%eax, %r15
	movl	%eax, 36(%rsp)
	leaq	0(,%r15,8), %rax
	xorl	%r15d, %r15d
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	%rax, %r12
.L50:
	cmpl	%r15d, 36(%rsp)
	jle	.L65
	cvtsi2sdl	%r15d, %xmm1
	movaps	%xmm1, %xmm0
	xorps	.LC0(%rip), %xmm0
	mulsd	%xmm1, %xmm0
	movsd	40(%rsp), %xmm1
	addsd	%xmm1, %xmm1
	mulsd	40(%rsp), %xmm1
	divsd	%xmm1, %xmm0
	call	exp@PLT
	movaps	%xmm0, %xmm1
	movsd	.LC1(%rip), %xmm0
	subsd	%xmm1, %xmm0
	movsd	%xmm0, (%r12,%r15,8)
	incq	%r15
	jmp	.L50
.L65:
	movq	16(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdx
	movq	88(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	%r12, %rdi
	movslq	%ebp, %r12
	call	free@PLT
	movslq	%ebx, %rax
	salq	$3, %r12
	movq	%rax, 64(%rsp)
	movl	%ebp, %eax
	imull	%ebx, %eax
	sall	$3, %eax
	cltq
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	24(%rsp), %rsi
	leaq	96(%rsp), %rdi
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	xorl	%r8d, %r8d
	movq	16(%rsp), %r15
	xorl	%edi, %edi
	testl	%ebx, %ebx
	movl	12(%rsp), %edx
	cmovns	%ebx, %r8d
	movq	%r15, %rsi
.L52:
	cmpl	%ebp, %edi
	jge	.L54
	movslq	%edx, %rax
	movq	%rsi, %rcx
.L55:
	movl	%eax, %r9d
	subl	%edx, %r9d
	cmpl	%r9d, %ebx
	jle	.L66
	movq	48(%rsp), %r10
	movsd	(%r10,%rax,8), %xmm0
	incq	%rax
	movsd	%xmm0, (%rcx)
	addq	%r12, %rcx
	jmp	.L55
.L66:
	addl	%r8d, %edx
	incl	%edi
	addq	$8, %rsi
	jmp	.L52
.L54:
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	96(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	%ebp, %eax
	movl	$2, %ecx
	leaq	104(%rsp), %rdi
	cltd
	idivl	%ecx
	movl	%eax, 60(%rsp)
	incl	%eax
	movl	%eax, 56(%rsp)
	movslq	%eax, %rsi
	movq	64(%rsp), %rax
	imulq	%rax, %rsi
	salq	$4, %rsi
	call	cudaMalloc@PLT
	movl	%ebx, %ecx
	leaq	80(%rsp), %rdi
	movl	%ebp, %esi
	movl	$106, %edx
	call	cufftPlan1d@PLT
	movq	104(%rsp), %rdx
	movq	96(%rsp), %rsi
	movl	80(%rsp), %edi
	call	cufftExecD2Z@PLT
	movl	80(%rsp), %edi
	call	cufftDestroy@PLT
	movl	60(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$16, %esi
	movabsq	$68719476752, %rcx
	movl	$1, 120(%rsp)
	addl	$16, %eax
	movq	%rcx, 112(%rsp)
	movl	$1, 132(%rsp)
	cltd
	idivl	%esi
	movl	%eax, 124(%rsp)
	leal	15(%rbx), %eax
	cltd
	idivl	%esi
	movq	%rcx, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	movl	%eax, 128(%rsp)
	movq	124(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movq	88(%rsp), %r8
	movq	104(%rsp), %rcx
	movl	%ebx, %edi
	movl	36(%rsp), %edx
	movl	56(%rsp), %esi
	call	_Z35__device_stub__Z4dampiiiP7double2PdiiiP7double2Pd
.L56:
	movl	%ebx, %ecx
	leaq	84(%rsp), %rdi
	movl	$108, %edx
	movl	%ebp, %esi
	call	cufftPlan1d@PLT
	movq	96(%rsp), %rdx
	movq	104(%rsp), %rsi
	movl	84(%rsp), %edi
	call	cufftExecZ2D@PLT
	movl	84(%rsp), %edi
	call	cufftDestroy@PLT
	movq	96(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	xorl	%esi, %esi
	xorl	%ecx, %ecx
	testl	%ebx, %ebx
	cmovns	%ebx, %esi
.L57:
	cmpl	%ebp, %ecx
	jge	.L59
	movslq	12(%rsp), %rax
	movq	%r15, %rdx
.L60:
	movl	12(%rsp), %r11d
	movl	%eax, %edi
	subl	%r11d, %edi
	cmpl	%edi, %ebx
	jle	.L67
	cvtsi2sdl	%ebp, %xmm1
	movsd	(%rdx), %xmm0
	movq	48(%rsp), %rdi
	addq	%r12, %rdx
	divsd	%xmm1, %xmm0
	movsd	%xmm0, (%rdi,%rax,8)
	incq	%rax
	jmp	.L60
.L67:
	addl	%esi, 12(%rsp)
	incl	%ecx
	addq	$8, %r15
	jmp	.L57
.L59:
	movl	72(%rsp), %eax
	movl	32(%rsp), %r12d
	incq	%r14
	movq	16(%rsp), %rdi
	addl	%eax, %r12d
	call	free@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	jmp	.L49
.L64:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L62
	call	__stack_chk_fail@PLT
.L62:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	GaussianFilt_CUDA, .-GaussianFilt_CUDA
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"_Z4dampiiiP7double2Pd"
.LC3:
	.string	"_Z10iDwt1D_RowPdmS_miiiiS_"
.LC4:
	.string	"_Z10iDwt1D_ColPdS_iiiiiS_mS_m"
.LC5:
	.string	"_Z9Dwt1D_ColPdmS_miiiS_mS_i"
.LC6:
	.string	"_Z9Dwt1D_RowPdiimiS_mS_m"
.LC7:
	.string	"c_lpFilter"
.LC8:
	.string	"c_hpFilter"
.LC9:
	.string	"c_iLpFilter"
.LC10:
	.string	"c_iHpFilter"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z4dampiiiP7double2Pd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10iDwt1D_RowPdmS_miiiiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10iDwt1D_ColPdS_iiiiiS_mS_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9Dwt1D_ColPdmS_miiiS_mS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9Dwt1D_RowPdiimiS_mS_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movl	$280, %r9d
	leaq	_ZL10c_lpFilter(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$280, %r9d
	leaq	_ZL10c_hpFilter(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$280, %r9d
	leaq	_ZL11c_iLpFilter(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$280, %r9d
	movq	%rdx, %rcx
	leaq	_ZL11c_iHpFilter(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3697:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL11c_iHpFilter
	.comm	_ZL11c_iHpFilter,280,32
	.local	_ZL11c_iLpFilter
	.comm	_ZL11c_iLpFilter,280,32
	.local	_ZL10c_hpFilter
	.comm	_ZL10c_hpFilter,280,32
	.local	_ZL10c_lpFilter
	.comm	_ZL10c_lpFilter,280,32
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC0:
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	0
	.long	1072693248
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include "hip/hip_runtime.h"

#include <iostream>
#include <stdio.h>
#include <cstdlib>
#include "hipfft/hipfft.h"
using namespace std;

#define TILE_X 16
#define TILE_Y 16
#define MARGIN 35

//ڴ洢˲ϵĳڴ
__constant__ double c_lpFilter[MARGIN];
__constant__ double c_hpFilter[MARGIN];
__constant__ double c_iLpFilter[MARGIN];
__constant__ double c_iHpFilter[MARGIN];

//-------------------------------------------------------------------任------------------------------------------------------------------------------------------------

//ԶάݵнС任һά,lp_output,hp_outputѾתùĴС,һ˺нչ²ת
__global__ void Dwt1D_Row(double *data,int width,int height,size_t pitch_data,int filter_len,
						  double *lp_output,size_t pitch_lpout,double *hp_output,size_t pitch_hpout)
{
	int col=threadIdx.x+blockIdx.x*blockDim.x;
	int row=threadIdx.y+blockIdx.y*blockDim.y;

	int aftWidth=(width+filter_len-1)/2;//+ĳ
	if(col>=aftWidth||row>=height)
		return;

	double* row_data=(double*)((char*)data+row*pitch_data);//ݵʼеַ
	double* row_lpout=(double*)((char*)lp_output+col*pitch_lpout);//ͨ˲ʼеַ
	double* row_hpout=(double*)((char*)hp_output+col*pitch_hpout);//ͨ˲ʼеַ

	int symIndex=filter_len+2*col;//ֻֽһֻ֣tmpIndexǵõǸڶԳչеλ
	int oriIndex=symIndex-filter_len+1;//symIndex-(filter_len-1),ڼҪȡԭʼеλ,2*col+1

	double lp_result=0;//ͨ˲ľ
	double hp_result=0;//ͨ˲ľ

#pragma unroll
	for(int i=0;i<filter_len;i++)
	{
		int index=oriIndex-i;
		double tmpValue;//洢ݵֵ
		if(index<0)
		{
			tmpValue=row_data[-index-1];//-1ȡ0-2ȡ1-3ȡ2-4ȡ3-5ȡ4,|index|-1
		}
		else
		{
			if(index>=width)
				tmpValue=row_data[2*width-index-1];//lastIndex-[(index-lastIndex)-1];(width-1)-{[index-(width-1)]-1}
			else
				tmpValue=row_data[index];
		}
		lp_result+=tmpValue*c_lpFilter[i];
		hp_result+=tmpValue*c_hpFilter[i];
	}
	
	//ֱӽת
	row_lpout[row]=lp_result;//ĿǾһ룬߶Ȳ
	row_hpout[row]=hp_result;
}

//ԶάݵнС任һά㣬зϵһһģմСҲһģԿ԰̺ϲһ˺У
//һתúĽһڴһּCLLһյĴλá
//widthѾתúĿȣheightѾתúĸ߶ȣ˺ĲпȺ͸߶ȷֱwidthheightΪ,
__global__ void Dwt1D_Col(double *lpOutput,size_t pitch_lpout,double *hpOutput,size_t pitch_hpout,int width,int height,
						  int filter_len,double *CLL,size_t pitch_cll,double *output,int offset)
{
	int col=threadIdx.x+blockIdx.x*blockDim.x;
	int row=threadIdx.y+blockIdx.y*blockDim.y;

	int aftWidth=(width+filter_len-1)/2;//+ĳ
	if(col>=aftWidth||row>=height)
		return;

	double* row_lpData=(double*)((char*)lpOutput+row*pitch_lpout);//ݵʼеַ
	double* row_hpData=(double*)((char*)hpOutput+row*pitch_hpout);//ݵʼеַ
	double* row_cll=(double*)((char*)CLL+col*pitch_cll);//CLLʼеַ

	int symIndex=filter_len+2*col;//ֻֽһֻ֣tmpIndexǵõǸڶԳչеλ
	int oriIndex=symIndex-filter_len+1;//symIndex-(filter_len-1),ڼҪȡԭʼеλ,2*col+1

	double cll_result=0;//CLLĽ
	double clh_result=0;//CLHĽ
	double chl_result=0;//CLLĽ
	double chh_result=0;//CLHĽ

#pragma unroll
	for(int i=0;i<filter_len;i++)
	{
		int index=oriIndex-i;
		double lpTmpValue;//洢lpOoutputݵֵ
		double hpTmpValue;//洢hpOoutputݵֵ
		if(index<0)
		{
			lpTmpValue=row_lpData[-index-1];//-1ȡ0-2ȡ1-3ȡ2-4ȡ3-5ȡ4,|index|-1
			hpTmpValue=row_hpData[-index-1];
		}
		else
		{
			if(index>=width)
			{
				lpTmpValue=row_lpData[2*width-index-1];//lastIndex-[(index-lastIndex)-1];(width-1)-{[index-(width-1)]-1}
				hpTmpValue=row_hpData[2*width-index-1];
			}			
			else
			{
				lpTmpValue=row_lpData[index];
				hpTmpValue=row_hpData[index];
			}
				
		}
		cll_result+=lpTmpValue*c_lpFilter[i];
		clh_result+=lpTmpValue*c_hpFilter[i];
		chl_result+=hpTmpValue*c_lpFilter[i];
		chh_result+=hpTmpValue*c_hpFilter[i];
	}

	//ֱӽת
	//offset=totalsize-sum_stepοһWaveletе
	row_cll[row]=cll_result;
	output[offset-3*aftWidth*height+col*height+row]=clh_result;
	output[offset-2*aftWidth*height+col*height+row]=chl_result;
	output[offset-aftWidth*height+col*height+row]=chh_result;
}

//С任
void Dwt2D(double *data,int data_width,int data_height,size_t pitch_data,int filter_len,double *CLL,size_t pitch_cll,double *output,int offset)
{
	//----------------------һ׶Σȶάݽзϵı任----------------------------------------------------
	//ڵһתú󣬹ڴʱֱӰתúĴС
	int height=(data_width+filter_len-1)/2;//תúĸ߶ȣԭ
	int width=data_height;//תúĿȣԭ߶

	//
	double *lpOutput;
	double *hpOutput;
	size_t pitch_lpout;
	size_t pitch_hpout;
	hipMallocPitch((void **)&lpOutput,&pitch_lpout,sizeof(double)*width,height);
	hipMallocPitch((void **)&hpOutput,&pitch_hpout,sizeof(double)*width,height);

	dim3 threads(TILE_X,TILE_Y);
	dim3 blocks_row((height+TILE_X-1)/TILE_X,(width+TILE_Y-1)/TILE_Y);//ԭȺԭ߶ȷgridС
	Dwt1D_Row<<<blocks_row,threads>>>(data,data_width,data_height,pitch_data,filter_len,lpOutput,pitch_lpout,hpOutput,pitch_hpout);

	//----------------------ڶ׶Σ֮ǰõѾתúľзϵı任----------------------------------------
	int aftwidth=(width+filter_len-1)/2;
	dim3 blocks_col((aftwidth+TILE_X-1)/TILE_X,(height+TILE_Y-1)/TILE_Y);
	Dwt1D_Col<<<blocks_col,threads>>>(lpOutput,pitch_lpout,hpOutput,pitch_hpout,width,height,filter_len,CLL,pitch_cll,output,offset);

	//ͷ
	hipFree(lpOutput);
	hipFree(hpOutput);
}


//άС任
extern "C" void Dwt2D_CUDA(	int level,int *length,
	double *originData,int data_width,int data_height,
	double *lpfilter,double *hpfilter,int filter_len,
	double *output,int total_size)
{
	int height=data_height;
	int width=data_width;

	int sum_step=0;
	double *d_output;
	hipMalloc((void **)&d_output,sizeof(double)*total_size);

	//----------------------ѶάݸƵGPU------------------------------------------------------
	double *d_data;
	size_t pitch_data;
	hipMallocPitch((void **)&d_data,&pitch_data,sizeof(double)*width,height);

	hipMemcpy2D(d_data,pitch_data,originData,sizeof(double)*width,sizeof(double)*width,height,hipMemcpyHostToDevice);	//֮ǰsizeof(double)*widthд*heightݴ
	hipMemcpyToSymbol(HIP_SYMBOL(c_lpFilter), lpfilter, filter_len*sizeof(double));
	hipMemcpyToSymbol(HIP_SYMBOL(c_hpFilter), hpfilter, filter_len*sizeof(double));
	//----------------------ݸƽ׶-----------------------------------------------------------

	//----------------------JСֽ-----------------------------------------------------------
	for(int iter=0;iter<level;iter++)
	{
		int next_width=(width+filter_len-1)/2;
		int next_height=(height+filter_len-1)/2;

		//洢ÿһ任ĳ
		length[iter*2]=next_height;
		length[iter*2+1]=next_width;
		int offset=total_size-sum_step;//CLH,CHL,CHHoutputеλ

		double *cLL;//洢һС任ĳʼ
		size_t pitch_cll;
		hipMallocPitch((void **)&cLL,&pitch_cll,sizeof(double)*next_width,next_height);

		//ִжά任
		Dwt2D(d_data,width,height,pitch_data,filter_len,cLL,pitch_cll,d_output,offset);

		width=next_width;
		height=next_height;

		//һѭĳʼ
		hipFree(d_data);
		d_data=cLL;
		pitch_data=pitch_cll;

		//洢
		if(iter==level-1)
		{
			hipMemcpy2D((d_output+offset-4*next_width*next_height),sizeof(double)*next_width,cLL,pitch_cll,sizeof(double)*next_width,next_height,hipMemcpyDeviceToDevice);
			hipFree(cLL);
		}
		sum_step+=next_width*next_height*3;
	}
	//----------------------JСֽ-----------------------------------------------------------
	hipMemcpy(output,d_output,sizeof(double)*total_size,hipMemcpyDeviceToHost);
	hipFree(d_data);
	hipFree(d_output);
}




//-------------------------------------------------------------------任------------------------------------------------------------------------------------------------



//С任зϵ
//֮ǰķֽеȡCLLٴȫֽͨoffsetȡCLHCHLCHHֵݣoffsetһֽܴС
//ȡʱֱһһеȡ൱תú㣬൱תúУзϵļ㣬з
//ϵļ㲻Ҫٽתãú˺ĲʱblocksĿnextHeight߶ԭwidthΪݣתúĽС
//еwidth,heightתúģ൱ԭheight,ԭwidth
//CLLʹPitchʽΪҪȡʺPitchʽҲΪԭiDwt1D_rowoutputҲPitchʽ
__global__ void iDwt1D_Col(double *CLL,double *data,int offset,int width,int height,int nextWidth,int filter_len,
						   double *app,size_t pitch_app,double *detail,size_t pitch_detail)
{
	int col=threadIdx.x+blockIdx.x*blockDim.x;
 	int row=threadIdx.y+blockIdx.y*blockDim.y;

	if(col>=nextWidth||row>=height)
		return;

	//ʣݵʼλ
	int clh_begin=offset;
	int chl_begin=offset+width*height;
	int chh_begin=offset+2*width*height;

	//
	double* row_appData=(double*)((char*)app+col*pitch_app);//ʼеַcol൱תúк
	double* row_detailData=(double*)((char*)detail+col*pitch_detail);//ʼеַcol൱תúк

	int oriIndex=col+filter_len-2;//ʼϲλ
	
	double cll_result=0;
	double clh_result=0;
	double chl_result=0;
	double chh_result=0;

#pragma unroll
	for(int i=0;i<filter_len;i++)
	{
		int index=oriIndex-i;
		double cllTmpValue=0;
		double clhTmpValue=0;
		double chlTmpValue=0;
		double chhTmpValue=0;

		//СֽȡݲҪ򵥣λòϲУȡ0ڣǷżżԭʼȡ/2λõ
		//ֱȡ0
		if(index>=0&&index<(2*width-1)&&(index%2)==0)
		{
			cllTmpValue=CLL[index/2*height+row];//һһеȡ
			clhTmpValue=data[clh_begin+index/2*height+row];
			chlTmpValue=data[chl_begin+index/2*height+row];
			chhTmpValue=data[chh_begin+index/2*height+row];
		}
		else
		{
			cllTmpValue=0;
			clhTmpValue=0;
			chlTmpValue=0;
			chhTmpValue=0;
		}

		cll_result+=cllTmpValue*c_iLpFilter[i];
		clh_result+=clhTmpValue*c_iHpFilter[i];
		chl_result+=chlTmpValue*c_iLpFilter[i];
		chh_result+=chhTmpValue*c_iHpFilter[i];
	}

	//൱תú
	row_appData[row]=cll_result+clh_result;
	row_detailData[row]=chl_result+chh_result;
}


//С任зϵ
//зϵõֱٽзϵľ㣬ɻԭݣ˺ĲblocksĿȺ͸߶ȷֱnextWidth,
//nextHeightΪݣһ˲ת
__global__ void iDwt1D_Row(double *app,size_t pitch_app,double *detail,size_t pitch_detail,int width,int height,
						   int nextWidth,int filter_len,double *output)
{
	int col=threadIdx.x+blockIdx.x*blockDim.x;
 	int row=threadIdx.y+blockIdx.y*blockDim.y;

	if(col>=nextWidth||row>=height)
		return;

	//ݺеʼλ
	double* row_appData=(double*)((char*)app+row*pitch_app);
	double* row_detailData=(double*)((char*)detail+row*pitch_detail);

	int oriIndex=col+filter_len-2;
	
	double app_result=0;
	double detail_result=0;

#pragma unroll
	for(int i=0;i<filter_len;i++)
	{
		int index=oriIndex-i;
		double appTmpValue=0;
		double detailTmpValue=0;

		if(index>=0&&index<(2*width-1)&&(index%2)==0)
		{
			appTmpValue=row_appData[index/2];
			detailTmpValue=row_detailData[index/2];
		}
		else
		{
			appTmpValue=0;
			detailTmpValue=0;
		}

		app_result+=appTmpValue*c_iLpFilter[i];
		detail_result+=detailTmpValue*c_iHpFilter[i];
	}
	output[row*nextWidth+col]=app_result+detail_result;
}


//άС任
extern "C" void iDwt2D_CUDA
(
	int level,int *length,
	double *data,int data_size,
	double *lpfilter,double *hpfilter,int filter_len,
	double *output
)
{
	int height=length[0];
	int width=length[1];
	int offset=height*width;

	double *CLL;
	hipMalloc((void **)&CLL,sizeof(double)*width*height);

	//----------------------------------ݸƽ׶---------------------------------------------
	double *d_data;
	hipMalloc((void **)&d_data,sizeof(double)*data_size);

	hipMemcpy(d_data,data,sizeof(double)*data_size,hipMemcpyHostToDevice);
	hipMemcpy(CLL,d_data,sizeof(double)*width*height,hipMemcpyDeviceToDevice);//ʼCLL
	hipMemcpyToSymbol(HIP_SYMBOL(c_iLpFilter), lpfilter, filter_len*sizeof(double));
	hipMemcpyToSymbol(HIP_SYMBOL(c_iHpFilter), hpfilter, filter_len*sizeof(double));
	//----------------------------------ݸƽ׶------------------------------------------

	
	//----------------------------------JСع------------------------------------------------
	dim3 threads(TILE_X,TILE_Y);
	for(int iter=0;iter<level;iter++)
	{
		//ǰĸ߿
		int tmp_height=length[2*iter];
		int tmp_width=length[2*iter + 1];
		//һĸ߿
		int next_height=length[2*iter+2];
		int next_width=length[2*iter+3];

		//----------------------һ׶ΣȽзϵ任---------------------------------
		double *app;
		double *detail;
		size_t pitch_app;
		size_t pitch_detail;
		hipMallocPitch((void **)&app,&pitch_app,sizeof(double)*tmp_width,next_height);
		hipMallocPitch((void **)&detail,&pitch_detail,sizeof(double)*tmp_width,next_height);
		
		dim3 blocks_col((next_height+TILE_X-1)/TILE_X,(tmp_width+TILE_Y-1)/TILE_Y);
		iDwt1D_Col<<<blocks_col,threads>>>(CLL,d_data,offset,tmp_height,tmp_width,next_height,filter_len,app,pitch_app,detail,pitch_detail);

		//----------------------ڶ׶Σзϵ任-------------------------------------
		hipFree(CLL);
		hipMalloc((void **)&CLL,sizeof(double)*next_height*next_width);//֮ǰCLLݣCLLΪһѭĳʼ
		dim3 blocks_row((next_width+TILE_X-1)/TILE_X,(next_height+TILE_Y-1)/TILE_Y);
		iDwt1D_Row<<<blocks_row,threads>>>(app,pitch_app,detail,pitch_detail,tmp_width,next_height,next_width,filter_len,CLL);
		offset+=3*tmp_height*tmp_width;	

		hipFree(app);
		hipFree(detail);
	}
	//-----------------------------JСع--------------------------------------------------

	//ƻ
	height=length[2*level];
	width=length[2*level+1];
	hipMemcpy(output,CLL,sizeof(double)*height*width,hipMemcpyDeviceToHost);
	hipFree(CLL);
	hipFree(d_data);
}



/*
//ڻȡתú
__global__ void getTransposeData_shared(double *CLL,size_t pitch_CLL,double *data,int offset,int width,int height,
									    double *tr_cll,size_t pitch_cll,double *tr_clh,size_t pitch_clh,
									    double *tr_chl,size_t pitch_chl,double *tr_chh,size_t pitch_chh)
{
	int col=blockIdx.x*blockDim.x+threadIdx.x;//width
	int row=blockIdx.y*blockDim.y+threadIdx.y;//height
	if(col>=width||row>=height)
		return;

	int clh_begin=offset;
 	int chl_begin=offset+width*height;
 	int chh_begin=offset+2*width*height;


	double* row_CLL=(double*)((char*)CLL+row*pitch_CLL);
	//ʼеַ
	double* row_cll=(double*)((char*)tr_cll+col*pitch_cll);
	double* row_clh=(double*)((char*)tr_clh+col*pitch_clh);
	double* row_chl=(double*)((char*)tr_chl+col*pitch_chl);
	double* row_chh=(double*)((char*)tr_chh+col*pitch_chh);

	__shared__ double s_Data[TILE_Y][TILE_X*4];

	s_Data[threadIdx.y][threadIdx.x]=row_CLL[col];
	s_Data[threadIdx.y][threadIdx.x+TILE_X]=data[clh_begin+row*width+col];
	s_Data[threadIdx.y][threadIdx.x+TILE_X*2]=data[chl_begin+row*width+col];
	s_Data[threadIdx.y][threadIdx.x+TILE_X*3]=data[chh_begin+row*width+col];

	__syncthreads();

	row_cll[row]=s_Data[threadIdx.y][threadIdx.x];
	row_clh[row]=s_Data[threadIdx.y][threadIdx.x+TILE_X];
	row_chl[row]=s_Data[threadIdx.y][threadIdx.x+TILE_X*2];
	row_chh[row]=s_Data[threadIdx.y][threadIdx.x+TILE_X*3];
}

//С任зϵ
__global__ void iDwt1D_Col(double *CLL,size_t pitch_cll,double *CLH,size_t pitch_clh,double *CHL,size_t pitch_chl,double *CHH,size_t pitch_chh,
						   int width,int height,int nextWidth,int filter_len,
						   double *app,size_t pitch_app,double *detail,size_t pitch_detail)
{
	int col=threadIdx.x+blockIdx.x*blockDim.x;
 	int row=threadIdx.y+blockIdx.y*blockDim.y;

	if(col>=nextWidth||row>=height)
		return;

	//ݵʼеַ
	double* row_CLLData=(double*)((char*)CLL+row*pitch_cll);
	double* row_CLHData=(double*)((char*)CLH+row*pitch_clh);
	double* row_CHLData=(double*)((char*)CHL+row*pitch_chl);
	double* row_CHHData=(double*)((char*)CHH+row*pitch_chh);

	//ݵʼеַcol൱תúк
	double* row_appData=(double*)((char*)app+col*pitch_app);
	double* row_detailData=(double*)((char*)detail+col*pitch_detail);

	int oriIndex=col+filter_len-2;//ʼϲλ
	
	double cll_result=0;
	double clh_result=0;
	double chl_result=0;
	double chh_result=0;

#pragma unroll
	for(int i=0;i<filter_len;i++)
	{
		int index=oriIndex-i;
		double cllTmpValue=0;
		double clhTmpValue=0;
		double chlTmpValue=0;
		double chhTmpValue=0;

		//СֽȡݲҪ򵥣λòϲУȡ0ڣǷżżԭʼȡ/2λõ
		//ֱȡ0
		if(index>=0&&index<(2*width-1)&&(index%2)==0)
		{
			cllTmpValue=row_CLLData[index/2];
			clhTmpValue=row_CLHData[index/2];
			chlTmpValue=row_CHLData[index/2];
			chhTmpValue=row_CHHData[index/2];
		}
		else
		{
			cllTmpValue=0;
			clhTmpValue=0;
			chlTmpValue=0;
			chhTmpValue=0;
		}
		cll_result+=cllTmpValue*c_iLpFilter[i];
		clh_result+=clhTmpValue*c_iHpFilter[i];
		chl_result+=chlTmpValue*c_iLpFilter[i];
		chh_result+=chhTmpValue*c_iHpFilter[i];
	}

	//൱תú
	row_appData[row]=cll_result+clh_result;
	row_detailData[row]=chl_result+chh_result;
}

//С任зϵ
__global__ void iDwt1D_Row(double *app,size_t pitch_app,double *detail,size_t pitch_detail,int width,int height,
						   int nextWidth,int filter_len,double *output,size_t pitch_out)
{
	int col=threadIdx.x+blockIdx.x*blockDim.x;
 	int row=threadIdx.y+blockIdx.y*blockDim.y;

	if(col>=nextWidth||row>=height)
		return;

	//ݺеʼλ
	double* row_appData=(double*)((char*)app+row*pitch_app);
	double* row_detailData=(double*)((char*)detail+row*pitch_detail);
	double* row_output=(double*)((char*)output+row*pitch_out);

	int oriIndex=col+filter_len-2;
	
	double app_result=0;
	double detail_result=0;

#pragma unroll
	for(int i=0;i<filter_len;i++)
	{
		int index=oriIndex-i;
		double appTmpValue=0;
		double detailTmpValue=0;

		if(index>=0&&index<(2*width-1)&&(index%2)==0)
		{
			appTmpValue=row_appData[index/2];
			detailTmpValue=row_detailData[index/2];
		}
		else
		{
			appTmpValue=0;
			detailTmpValue=0;
		}

		app_result+=appTmpValue*c_iLpFilter[i];
		detail_result+=detailTmpValue*c_iHpFilter[i];
	}
	row_output[col]=app_result+detail_result;
}

//άС任
extern "C" void iDwt2D_CUDA
(
	int level,int *length,
	double *data,int data_size,
	double *lpfilter,double *hpfilter,int filter_len,
	double *output
)
{
	int height=length[0];
	int width=length[1];
	int offset=height*width;

	double *CLL;
	size_t pitch_CLL;
	cudaMallocPitch((void **)&CLL,&pitch_CLL,sizeof(double)*width,height);

	//----------------------------------ݸƽ׶---------------------------------------------
	double *d_data;
	cudaMalloc((void **)&d_data,sizeof(double)*data_size);

	cudaMemcpy(d_data,data,sizeof(double)*data_size,cudaMemcpyHostToDevice);
	cudaMemcpy2D(CLL,pitch_CLL,d_data,sizeof(double)*width,sizeof(double)*width,height,cudaMemcpyDeviceToDevice);//ʼCLL
	cudaMemcpyToSymbol(c_iLpFilter, lpfilter, filter_len*sizeof(double));
	cudaMemcpyToSymbol(c_iHpFilter, hpfilter, filter_len*sizeof(double));
	//----------------------------------ݸƽ׶------------------------------------------

	
	//----------------------------------JСع------------------------------------------------
	dim3 threads(TILE_X,TILE_Y);
	for(int iter=0;iter<level;iter++)
	{
		//ǰĸ߿
		int tmp_height=length[2*iter];
		int tmp_width=length[2*iter + 1];
		//һĸ߿
		int next_height=length[2*iter+2];
		int next_width=length[2*iter+3];

		//----------------------ȡת-----------------------------------------------------
		double *cll;size_t pitch_cll;
		double *clh;size_t pitch_clh;
		double *chl;size_t pitch_chl;
		double *chh;size_t pitch_chh;
		cudaMallocPitch((void **)&cll,&pitch_cll,sizeof(double)*tmp_height,tmp_width);
		cudaMallocPitch((void **)&clh,&pitch_clh,sizeof(double)*tmp_height,tmp_width);
		cudaMallocPitch((void **)&chl,&pitch_chl,sizeof(double)*tmp_height,tmp_width);
		cudaMallocPitch((void **)&chh,&pitch_chh,sizeof(double)*tmp_height,tmp_width);
		dim3 blocks_trans((tmp_width+TILE_X-1)/TILE_X,(tmp_height+TILE_Y-1)/TILE_Y);
		getTransposeData_shared<<<blocks_trans,threads>>>(CLL,pitch_CLL,d_data,offset,tmp_width,tmp_height,
														  cll,pitch_cll,clh,pitch_clh,chl,pitch_chl,chh,pitch_chh);
		//----------------------һ׶ΣȽзϵ任---------------------------------
		double *app;
		double *detail;
		size_t pitch_app;
		size_t pitch_detail;
		cudaMallocPitch((void **)&app,&pitch_app,sizeof(double)*tmp_width,next_height);
		cudaMallocPitch((void **)&detail,&pitch_detail,sizeof(double)*tmp_width,next_height);
		
		dim3 blocks_col((next_height+TILE_X-1)/TILE_X,(tmp_width+TILE_Y-1)/TILE_Y);
		iDwt1D_Col<<<blocks_col,threads>>>(cll,pitch_cll,clh,pitch_clh,chl,pitch_chl,chh,pitch_chh,
										   tmp_height,tmp_width,next_height,filter_len,app,pitch_app,detail,pitch_detail);
		//ͷ
		cudaFree(cll);
		cudaFree(clh);
		cudaFree(chl);
		cudaFree(chh);

		//----------------------ڶ׶Σзϵ任-------------------------------------
		double *out;size_t pitch_out;
		cudaMallocPitch((void **)&out,&pitch_out,sizeof(double)*next_width,next_height);
		dim3 blocks_row((next_width+TILE_X-1)/TILE_X,(next_height+TILE_Y-1)/TILE_Y);
		iDwt1D_Row<<<blocks_row,threads>>>(app,pitch_app,detail,pitch_detail,tmp_width,next_height,next_width,filter_len,out,pitch_out);
		offset+=3*tmp_height*tmp_width;	

		//ͷ
		cudaFree(app);
		cudaFree(detail);

		//-----------------------һCLLʼ----------------------------------------------
		cudaFree(CLL);
		CLL=out;
		pitch_CLL=pitch_out;

		if(iter==level-1)
		{
			cudaMemcpy2D(output,sizeof(double)*next_width,CLL,pitch_CLL,sizeof(double)*next_width,next_height,cudaMemcpyDeviceToHost);
			cudaFree(out);
		}
	}
	//-----------------------------JСع--------------------------------------------------

	cudaFree(CLL);
	cudaFree(d_data);
}

*/



//-------------------------------------------------------------------˹˲------------------------------------------------------------------------------------------------


__global__ void damp(int height,int width,int filter_len,hipfftDoubleComplex *d_inp_fft,double *d_filter)
{
    int col = blockIdx.x * blockDim.x + threadIdx.x;
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	if(col>=width||row>=height||col>=filter_len)
		return;

	d_inp_fft[row*width+col].x*= d_filter[col];
	d_inp_fft[row*width+col].y*= d_filter[col];
}

//˹˲
extern "C" void GaussianFilt_CUDA(double *dwt_data,int *length,int orig_height,int dwtlevel,double sigma)
{
	int rows,cols,begin,margin,end;
	int level=dwtlevel;
	begin=length[0]*length[1];

	for(int i=0;i<level;i++)
	{		
		rows=length[2*i];
		cols=length[2*i+1];
		margin=rows*cols;
		begin+=margin;
		end=begin+margin;
		//˲
		int filter_len=cols/2+1;
		double *filter=(double*)malloc(sizeof(double)*filter_len);

		for(int k=0;k<filter_len;k++)
				filter[k]=1-exp(-(double)(k)*(k)/(2*sigma*sigma));	

		double *d_filter;
		hipMalloc((void**)&d_filter, sizeof(double)*filter_len);
		hipMemcpy(d_filter, filter, sizeof(double)*filter_len, hipMemcpyHostToDevice);
		free(filter);

		//ݲ
		int size = sizeof(hipfftDoubleReal)*rows*cols;
		hipfftDoubleReal *inp,*d_inp;
		inp=(hipfftDoubleReal *)malloc(size);
		hipMalloc((void**)&d_inp, size);
	
		int tempindex=begin;
		for(int k=0;k<rows;k++)
		{
			for(int j=0;j<cols;j++)
			{
				inp[ j*rows+ k]=dwt_data[tempindex];	
				tempindex++;
			}
		}		
		hipMemcpy(d_inp, inp, size, hipMemcpyHostToDevice);

		hipfftDoubleComplex *inp_fft;
		hipfftHandle plan_forward,plan_backward;

		int half=rows/2+1;
		hipMalloc((void**)&inp_fft, sizeof(hipfftDoubleComplex)*(half)*cols);

		hipfftPlan1d(&plan_forward, rows, HIPFFT_D2Z, cols);
		hipfftExecD2Z(plan_forward, d_inp,inp_fft);
		hipfftDestroy(plan_forward);
		
		//damp<<<(half*cols+PITCH-1)/PITCH,PITCH>>>(half*cols,half,filter_len,inp_fft,d_filter);
		dim3 threads(TILE_X,TILE_Y);
		dim3 blocks((half+TILE_X-1)/TILE_X,(cols+TILE_Y-1)/TILE_Y);
		damp<<<blocks,threads>>>(cols,half,filter_len,inp_fft,d_filter);

		hipfftPlan1d(&plan_backward, rows, HIPFFT_Z2D, cols);
		hipfftExecZ2D(plan_backward, inp_fft, d_inp);
		hipfftDestroy(plan_backward);

		hipMemcpy(inp, d_inp, size, hipMemcpyDeviceToHost);

		tempindex=begin;
		for(int k=0;k<rows;k++)
		{
			for(int j=0;j<cols;j++)
				dwt_data[tempindex++]=inp[ j*rows+ k]/rows;			
		}
		begin=end+margin;

		free(inp);
		hipFree(d_inp);
		hipFree(inp_fft);
		hipFree(d_filter);	
	}	
	
}


	.text
	.file	"waveletCUDA.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z24__device_stub__Dwt1D_RowPdiimiS_mS_m # -- Begin function _Z24__device_stub__Dwt1D_RowPdiimiS_mS_m
	.type	_Z24__device_stub__Dwt1D_RowPdiimiS_mS_m,@function
_Z24__device_stub__Dwt1D_RowPdiimiS_mS_m: # @_Z24__device_stub__Dwt1D_RowPdiimiS_mS_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9Dwt1D_RowPdiimiS_mS_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__Dwt1D_RowPdiimiS_mS_m, .Lfunc_end0-_Z24__device_stub__Dwt1D_RowPdiimiS_mS_m
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__Dwt1D_ColPdmS_miiiS_mS_i # -- Begin function _Z24__device_stub__Dwt1D_ColPdmS_miiiS_mS_i
	.type	_Z24__device_stub__Dwt1D_ColPdmS_miiiS_mS_i,@function
_Z24__device_stub__Dwt1D_ColPdmS_miiiS_mS_i: # @_Z24__device_stub__Dwt1D_ColPdmS_miiiS_mS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9Dwt1D_ColPdmS_miiiS_mS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__Dwt1D_ColPdmS_miiiS_mS_i, .Lfunc_end1-_Z24__device_stub__Dwt1D_ColPdmS_miiiS_mS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z5Dwt2DPdiimiS_mS_i            # -- Begin function _Z5Dwt2DPdiimiS_mS_i
	.type	_Z5Dwt2DPdiimiS_mS_i,@function
_Z5Dwt2DPdiimiS_mS_i:                   # @_Z5Dwt2DPdiimiS_mS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 64(%rsp)                   # 8-byte Spill
                                        # kill: def $r8d killed $r8d def $r8
	movq	%rcx, 56(%rsp)                  # 8-byte Spill
	movl	%edx, %r12d
                                        # kill: def $esi killed $esi def $rsi
	movq	%rdi, 40(%rsp)                  # 8-byte Spill
	leal	-1(%r8), %ebp
	movq	%r8, 16(%rsp)                   # 8-byte Spill
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	leal	(%r8,%rsi), %eax
	decl	%eax
	movl	%eax, %r15d
	shrl	$31, %r15d
	addl	%eax, %r15d
	sarl	%r15d
	movslq	%edx, %r14
	leaq	(,%r14,8), %rbx
	movslq	%r15d, %r13
	leaq	8(%rsp), %rdi
	leaq	32(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%r13, %rcx
	callq	hipMallocPitch
	movq	%rsp, %rdi
	leaq	24(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%r13, %rcx
	callq	hipMallocPitch
	leal	15(%r13), %eax
	addl	$30, %r13d
	testl	%eax, %eax
	cmovnsl	%eax, %r13d
	sarl	$4, %r13d
	leal	15(%r14), %eax
	addl	$30, %r14d
	testl	%eax, %eax
	cmovnsl	%eax, %r14d
	sarl	$4, %r14d
	shlq	$32, %r14
	orq	%r13, %r14
	movq	%r14, %rdi
	movabsq	$68719476752, %r14              # imm = 0x1000000010
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	8(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	56(%rsp), %rsi                  # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r12d, %edx
	movq	64(%rsp), %rcx                  # 8-byte Reload
	movq	24(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z24__device_stub__Dwt1D_RowPdiimiS_mS_m
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB2_2:
	addl	%r12d, %ebp
	movl	%ebp, %eax
	shrl	$31, %eax
	addl	%ebp, %eax
	sarl	%eax
	leal	15(%rax), %ecx
	addl	$30, %eax
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$4, %eax
	shlq	$32, %r13
	orq	%rax, %r13
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movl	144(%rsp), %eax
	movq	8(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	24(%rsp), %rcx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	%r12d, %r8d
	movl	%r15d, %r9d
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	152(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	152(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z24__device_stub__Dwt1D_ColPdmS_miiiS_mS_i
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB2_4:
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z5Dwt2DPdiimiS_mS_i, .Lfunc_end2-_Z5Dwt2DPdiimiS_mS_i
	.cfi_endproc
                                        # -- End function
	.globl	Dwt2D_CUDA                      # -- Begin function Dwt2D_CUDA
	.type	Dwt2D_CUDA,@function
Dwt2D_CUDA:                             # @Dwt2D_CUDA
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 56(%rsp)                   # 8-byte Spill
	movl	%r8d, %r13d
	movl	%ecx, %ebp
	movq	%rdx, 48(%rsp)                  # 8-byte Spill
	movq	%rsi, 144(%rsp)                 # 8-byte Spill
                                        # kill: def $edi killed $edi def $rdi
	movq	%rdi, 64(%rsp)                  # 8-byte Spill
	movslq	232(%rsp), %rax
	movslq	216(%rsp), %rbx
	movq	%rax, 136(%rsp)                 # 8-byte Spill
	leaq	(,%rax,8), %rsi
	leaq	40(%rsp), %rdi
	movq	%rsi, 104(%rsp)                 # 8-byte Spill
	callq	hipMalloc
	movslq	%ebp, %r12
	shlq	$3, %r12
	movslq	%r13d, %r15
	leaq	32(%rsp), %r14
	leaq	80(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r12, %rdx
	movq	%r15, %rcx
	callq	hipMallocPitch
	movq	(%r14), %rdi
	leaq	80(%rsp), %rax
	movq	(%rax), %rsi
	movl	$1, (%rsp)
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movq	%r12, %rcx
	movq	%r12, %r8
	movq	%r15, %r9
	callq	hipMemcpy2D
	movq	%rbx, 88(%rsp)                  # 8-byte Spill
	leaq	(,%rbx,8), %rbx
	xorl	%r15d, %r15d
	movl	$c_lpFilter, %edi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movl	$c_hpFilter, %edi
	movq	208(%rsp), %rsi
	movq	%rbx, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movq	64(%rsp), %rcx                  # 8-byte Reload
	testl	%ecx, %ecx
	jle	.LBB3_5
# %bb.1:                                # %.lr.ph
	movq	88(%rsp), %rax                  # 8-byte Reload
	decl	%eax
	movq	%rax, 128(%rsp)                 # 8-byte Spill
	leal	-1(%rcx), %eax
	movq	%rax, 120(%rsp)                 # 8-byte Spill
	movl	%ecx, %eax
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	xorl	%r14d, %r14d
.LBB3_2:                                # =>This Inner Loop Header: Depth=1
	movl	%ebp, %r12d
	movl	%r13d, %edx
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	movq	128(%rsp), %rcx                 # 8-byte Reload
	leal	(%rcx,%r12), %eax
	movl	%eax, %ebp
	shrl	$31, %ebp
	addl	%eax, %ebp
	sarl	%ebp
	leal	(%rcx,%rdx), %eax
	movl	%eax, %r13d
	shrl	$31, %r13d
	addl	%eax, %r13d
	sarl	%r13d
	movq	144(%rsp), %rax                 # 8-byte Reload
	movl	%r13d, (%rax,%r14,8)
	movl	%ebp, 4(%rax,%r14,8)
	movq	136(%rsp), %rax                 # 8-byte Reload
	movl	%eax, %ebx
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	subl	%r15d, %ebx
	movslq	%ebp, %r15
	shlq	$3, %r15
	movslq	%r13d, %rcx
	leaq	72(%rsp), %rdi
	leaq	96(%rsp), %rsi
	movq	%r15, %rdx
	movq	%rcx, 48(%rsp)                  # 8-byte Spill
	callq	hipMallocPitch
	movq	32(%rsp), %rdi
	movq	80(%rsp), %rcx
	movq	72(%rsp), %r9
	movq	96(%rsp), %rax
	movq	40(%rsp), %rdx
	movl	%ebx, 16(%rsp)
	movq	%rdx, 8(%rsp)
	movq	%rax, (%rsp)
	movl	%r12d, %esi
	movq	56(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movq	88(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	callq	_Z5Dwt2DPdiimiS_mS_i
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdx
	movq	%rdx, 32(%rsp)
	movq	96(%rsp), %rcx
	movq	%rcx, 80(%rsp)
	cmpq	%r14, 120(%rsp)                 # 8-byte Folded Reload
	jne	.LBB3_4
# %bb.3:                                #   in Loop: Header=BB3_2 Depth=1
	movslq	%ebx, %rdi
	shlq	$3, %rdi
	addq	40(%rsp), %rdi
	movl	%ebp, %eax
	imull	%r13d, %eax
	shll	$2, %eax
	cltq
	shlq	$3, %rax
	subq	%rax, %rdi
	movl	$3, (%rsp)
	movq	%r15, %rsi
	movq	%r15, %r8
	movq	48(%rsp), %r9                   # 8-byte Reload
	callq	hipMemcpy2D
	movq	72(%rsp), %rdi
	callq	hipFree
.LBB3_4:                                #   in Loop: Header=BB3_2 Depth=1
	movl	%ebp, %eax
	imull	%r13d, %eax
	leal	(%rax,%rax,2), %eax
	movq	64(%rsp), %r15                  # 8-byte Reload
	addl	%eax, %r15d
	incq	%r14
	cmpq	%r14, 112(%rsp)                 # 8-byte Folded Reload
	jne	.LBB3_2
.LBB3_5:                                # %._crit_edge
	movq	40(%rsp), %rsi
	movq	224(%rsp), %rdi
	movq	104(%rsp), %rdx                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	Dwt2D_CUDA, .Lfunc_end3-Dwt2D_CUDA
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__iDwt1D_ColPdS_iiiiiS_mS_m # -- Begin function _Z25__device_stub__iDwt1D_ColPdS_iiiiiS_mS_m
	.type	_Z25__device_stub__iDwt1D_ColPdS_iiiiiS_mS_m,@function
_Z25__device_stub__iDwt1D_ColPdS_iiiiiS_mS_m: # @_Z25__device_stub__iDwt1D_ColPdS_iiiiiS_mS_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10iDwt1D_ColPdS_iiiiiS_mS_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z25__device_stub__iDwt1D_ColPdS_iiiiiS_mS_m, .Lfunc_end4-_Z25__device_stub__iDwt1D_ColPdS_iiiiiS_mS_m
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__iDwt1D_RowPdmS_miiiiS_ # -- Begin function _Z25__device_stub__iDwt1D_RowPdmS_miiiiS_
	.type	_Z25__device_stub__iDwt1D_RowPdmS_miiiiS_,@function
_Z25__device_stub__iDwt1D_RowPdmS_miiiiS_: # @_Z25__device_stub__iDwt1D_RowPdmS_miiiiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10iDwt1D_RowPdmS_miiiiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z25__device_stub__iDwt1D_RowPdmS_miiiiS_, .Lfunc_end5-_Z25__device_stub__iDwt1D_RowPdmS_miiiiS_
	.cfi_endproc
                                        # -- End function
	.globl	iDwt2D_CUDA                     # -- Begin function iDwt2D_CUDA
	.type	iDwt2D_CUDA,@function
iDwt2D_CUDA:                            # @iDwt2D_CUDA
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 32(%rsp)                   # 8-byte Spill
	movq	%r8, 24(%rsp)                   # 8-byte Spill
	movl	%ecx, %ebp
	movq	%rdx, %rbx
	movl	%edi, %r12d
	movslq	160(%rsp), %r14
	movslq	(%rsi), %rcx
	movq	%rsi, 64(%rsp)                  # 8-byte Spill
	movslq	4(%rsi), %r13
	movq	%r13, 16(%rsp)                  # 8-byte Spill
	movq	%rcx, 96(%rsp)                  # 8-byte Spill
	imulq	%rcx, %r13
	shlq	$3, %r13
	leaq	8(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movslq	%ebp, %rbp
	shlq	$3, %rbp
	leaq	88(%rsp), %r15
	movq	%r15, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%r15), %rdi
	movq	%rbx, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	movq	(%r15), %rsi
	movq	%r13, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	movq	%r14, 56(%rsp)                  # 8-byte Spill
	leaq	(,%r14,8), %rbx
	movl	$c_iLpFilter, %edi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movl	$c_iHpFilter, %edi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movq	%r12, 24(%rsp)                  # 8-byte Spill
	testl	%r12d, %r12d
	jle	.LBB6_7
# %bb.1:                                # %.lr.ph.preheader
	movq	16(%rsp), %rax                  # 8-byte Reload
	imull	96(%rsp), %eax                  # 4-byte Folded Reload
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	24(%rsp), %eax                  # 4-byte Reload
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
.LBB6_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	64(%rsp), %rax                  # 8-byte Reload
	movl	(%rax,%r14,8), %r15d
	movslq	4(%rax,%r14,8), %rbp
	movslq	8(%rax,%r14,8), %rbx
	movslq	12(%rax,%r14,8), %r12
	movq	%rbp, %r13
	shlq	$3, %r13
	leaq	48(%rsp), %rdi
	leaq	80(%rsp), %rsi
	movq	%r13, %rdx
	movq	%rbx, %rcx
	callq	hipMallocPitch
	leaq	40(%rsp), %rdi
	leaq	72(%rsp), %rsi
	movq	%r13, %rdx
	movq	%rbx, %rcx
	callq	hipMallocPitch
	leal	15(%rbx), %eax
	leal	30(%rbx), %r13d
	testl	%eax, %eax
	cmovnsl	%eax, %r13d
	sarl	$4, %r13d
	leal	15(%rbp), %eax
	leal	30(%rbp), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$4, %edi
	shlq	$32, %rdi
	orq	%r13, %rdi
	movl	$1, %esi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_4
# %bb.3:                                #   in Loop: Header=BB6_2 Depth=1
	movq	8(%rsp), %rdi
	movq	88(%rsp), %rsi
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	24(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movl	%r15d, %ecx
	movl	%ebp, %r8d
	movl	%ebx, %r9d
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z25__device_stub__iDwt1D_ColPdS_iiiiiS_mS_m
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB6_4:                                #   in Loop: Header=BB6_2 Depth=1
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rsi
	imulq	%r12, %rsi
	shlq	$3, %rsi
	leaq	8(%rsp), %rdi
	callq	hipMalloc
	leal	15(%r12), %eax
	leal	30(%r12), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$4, %ecx
	shlq	$32, %r13
	orq	%rcx, %r13
	movq	%r13, %rdi
	movl	$1, %esi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_6
# %bb.5:                                #   in Loop: Header=BB6_2 Depth=1
	movq	48(%rsp), %rdi
	movq	80(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	72(%rsp), %rcx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	%ebp, %r8d
	movl	%ebx, %r9d
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	callq	_Z25__device_stub__iDwt1D_RowPdmS_miiiiS_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB6_6:                                #   in Loop: Header=BB6_2 Depth=1
	imull	%ebp, %r15d
	leal	(%r15,%r15,2), %eax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	addl	%eax, %ecx
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	incq	%r14
	cmpq	%r14, 32(%rsp)                  # 8-byte Folded Reload
	jne	.LBB6_2
.LBB6_7:                                # %._crit_edge
	movq	24(%rsp), %rcx                  # 8-byte Reload
	leal	(%rcx,%rcx), %eax
	cltq
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movslq	(%rdx,%rax,4), %rax
	leal	1(,%rcx,2), %ecx
	movslq	%ecx, %rcx
	movslq	(%rdx,%rcx,4), %rdx
	imulq	%rax, %rdx
	movq	8(%rsp), %rsi
	shlq	$3, %rdx
	movq	168(%rsp), %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	88(%rsp), %rdi
	callq	hipFree
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	iDwt2D_CUDA, .Lfunc_end6-iDwt2D_CUDA
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__dampiiiP15HIP_vector_typeIdLj2EEPd # -- Begin function _Z19__device_stub__dampiiiP15HIP_vector_typeIdLj2EEPd
	.type	_Z19__device_stub__dampiiiP15HIP_vector_typeIdLj2EEPd,@function
_Z19__device_stub__dampiiiP15HIP_vector_typeIdLj2EEPd: # @_Z19__device_stub__dampiiiP15HIP_vector_typeIdLj2EEPd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4dampiiiP15HIP_vector_typeIdLj2EEPd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z19__device_stub__dampiiiP15HIP_vector_typeIdLj2EEPd, .Lfunc_end7-_Z19__device_stub__dampiiiP15HIP_vector_typeIdLj2EEPd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function GaussianFilt_CUDA
.LCPI8_0:
	.quad	0x8000000000000000              # double -0
	.quad	0x8000000000000000              # double -0
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI8_1:
	.quad	0x3ff0000000000000              # double 1
	.text
	.globl	GaussianFilt_CUDA
	.type	GaussianFilt_CUDA,@function
GaussianFilt_CUDA:                      # @GaussianFilt_CUDA
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB8_22
# %bb.1:                                # %.lr.ph121
	movq	%rdi, %r14
	movq	48(%rsp), %rax                  # 8-byte Reload
	movl	4(%rax), %ebx
	imull	(%rax), %ebx
	movapd	%xmm0, %xmm1
	addsd	%xmm0, %xmm1
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, 64(%rsp)                 # 8-byte Spill
	movl	%ecx, %eax
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	xorl	%ecx, %ecx
.LBB8_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_4 Depth 2
                                        #     Child Loop BB8_7 Depth 2
                                        #       Child Loop BB8_9 Depth 3
                                        #     Child Loop BB8_16 Depth 2
                                        #       Child Loop BB8_18 Depth 3
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
	movq	48(%rsp), %rax                  # 8-byte Reload
	movl	(%rax,%rcx,8), %r13d
	movq	%rcx, 112(%rsp)                 # 8-byte Spill
	movslq	4(%rax,%rcx,8), %rbx
	movl	%ebx, %ecx
	shrl	$31, %ecx
	addl	%ebx, %ecx
	sarl	%ecx
	movslq	%ecx, %rax
	incl	%ecx
	movl	%ecx, 12(%rsp)                  # 4-byte Spill
	leaq	8(,%rax,8), %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%rbx, 56(%rsp)                  # 8-byte Spill
	cmpq	$-1, %rbx
	movsd	64(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	movapd	.LCPI8_0(%rip), %xmm3           # xmm3 = [-0.0E+0,-0.0E+0]
	jl	.LBB8_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB8_2 Depth=1
	movl	12(%rsp), %ebp                  # 4-byte Reload
	xorl	%ebx, %ebx
.LBB8_4:                                # %.lr.ph
                                        #   Parent Loop BB8_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm1, %xmm1
	cvtsi2sd	%ebx, %xmm1
	movapd	%xmm1, %xmm0
	xorpd	%xmm3, %xmm0
	mulsd	%xmm1, %xmm0
	divsd	%xmm2, %xmm0
	callq	exp
	movsd	.LCPI8_1(%rip), %xmm1           # xmm1 = mem[0],zero
	movapd	.LCPI8_0(%rip), %xmm3           # xmm3 = [-0.0E+0,-0.0E+0]
	movsd	64(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	subsd	%xmm0, %xmm1
	movsd	%xmm1, (%r15,%rbx,8)
	incq	%rbx
	cmpq	%rbx, %rbp
	jne	.LBB8_4
.LBB8_5:                                # %._crit_edge
                                        #   in Loop: Header=BB8_2 Depth=1
	movq	56(%rsp), %rcx                  # 8-byte Reload
	movl	%ecx, %ebp
                                        # kill: def $ecx killed $ecx killed $rcx def $rcx
	imull	%r13d, %ecx
	movq	24(%rsp), %rbx                  # 8-byte Reload
	movq	%rcx, 104(%rsp)                 # 8-byte Spill
	addl	%ecx, %ebx
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	32(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r15, %rdi
	callq	free
	movl	%ebp, %eax
	imull	%r13d, %eax
	shll	$3, %eax
	movslq	%eax, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%rsp, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%r13d, %r13d
	jle	.LBB8_12
# %bb.6:                                # %.preheader100.lr.ph
                                        #   in Loop: Header=BB8_2 Depth=1
	leaq	(,%r13,8), %rax
	movq	%r15, %rcx
	xorl	%edx, %edx
	movl	%ebx, %esi
.LBB8_7:                                # %.preheader100
                                        #   Parent Loop BB8_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB8_9 Depth 3
	testl	%ebp, %ebp
	jle	.LBB8_11
# %bb.8:                                # %.lr.ph105.preheader
                                        #   in Loop: Header=BB8_7 Depth=2
	movslq	%esi, %rdi
	leaq	(%r14,%rdi,8), %r8
	movq	%rcx, %r9
	xorl	%edi, %edi
.LBB8_9:                                # %.lr.ph105
                                        #   Parent Loop BB8_2 Depth=1
                                        #     Parent Loop BB8_7 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movsd	(%r8,%rdi,8), %xmm0             # xmm0 = mem[0],zero
	movsd	%xmm0, (%r9)
	incq	%rdi
	addq	%rax, %r9
	cmpq	%rdi, %rbp
	jne	.LBB8_9
# %bb.10:                               # %._crit_edge106.loopexit
                                        #   in Loop: Header=BB8_7 Depth=2
	addl	%edi, %esi
.LBB8_11:                               # %._crit_edge106
                                        #   in Loop: Header=BB8_7 Depth=2
	incq	%rdx
	addq	$8, %rcx
	cmpq	%r13, %rdx
	jne	.LBB8_7
.LBB8_12:                               # %._crit_edge109
                                        #   in Loop: Header=BB8_2 Depth=1
	movq	(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r15, 24(%rsp)                  # 8-byte Spill
	movl	%r13d, %r15d
	shrl	$31, %r15d
	addl	%r13d, %r15d
	sarl	%r15d
	leal	1(%r15), %eax
	movl	%eax, 44(%rsp)                  # 4-byte Spill
	movslq	%eax, %rsi
	movq	%r12, 96(%rsp)                  # 8-byte Spill
	movq	56(%rsp), %r12                  # 8-byte Reload
	imulq	%r12, %rsi
	shlq	$4, %rsi
	leaq	16(%rsp), %rdi
	callq	hipMalloc
	leaq	80(%rsp), %rdi
	movl	%r13d, %esi
	movl	$106, %edx
	movl	%r12d, %ecx
	callq	hipfftPlan1d
	movq	80(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	hipfftExecD2Z
	movq	80(%rsp), %rdi
	callq	hipfftDestroy
	leal	16(%r15), %eax
	addl	$31, %r15d
	testl	%eax, %eax
	cmovnsl	%eax, %r15d
	sarl	$4, %r15d
	leal	15(%r12), %eax
	leal	30(%r12), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$4, %edi
	shlq	$32, %rdi
	orq	%r15, %rdi
	movl	$1, %esi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_14
# %bb.13:                               #   in Loop: Header=BB8_2 Depth=1
	movq	16(%rsp), %rcx
	movq	32(%rsp), %r8
	movl	%ebp, %edi
	movl	44(%rsp), %esi                  # 4-byte Reload
	movl	12(%rsp), %edx                  # 4-byte Reload
	callq	_Z19__device_stub__dampiiiP15HIP_vector_typeIdLj2EEPd
.LBB8_14:                               #   in Loop: Header=BB8_2 Depth=1
	leaq	72(%rsp), %rdi
	movl	%r13d, %esi
	movl	$108, %edx
	movl	%r12d, %ecx
	callq	hipfftPlan1d
	movq	72(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	hipfftExecZ2D
	movq	72(%rsp), %rdi
	callq	hipfftDestroy
	movq	(%rsp), %rsi
	movq	24(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movq	96(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%r13d, %r13d
	jle	.LBB8_21
# %bb.15:                               # %.preheader.lr.ph
                                        #   in Loop: Header=BB8_2 Depth=1
	cvtsi2sd	%r13d, %xmm0
	movl	%r12d, %eax
	leaq	(,%r13,8), %rcx
	movq	%r15, %rdx
	xorl	%esi, %esi
	movl	%ebx, %r11d
.LBB8_16:                               # %.preheader
                                        #   Parent Loop BB8_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB8_18 Depth 3
	testl	%ebp, %ebp
	jle	.LBB8_20
# %bb.17:                               # %.lr.ph112.preheader
                                        #   in Loop: Header=BB8_16 Depth=2
	movslq	%r11d, %r8
	leaq	(%r14,%r8,8), %r9
	movq	%rdx, %r10
	xorl	%r8d, %r8d
.LBB8_18:                               # %.lr.ph112
                                        #   Parent Loop BB8_2 Depth=1
                                        #     Parent Loop BB8_16 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movsd	(%r10), %xmm1                   # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	movsd	%xmm1, (%r9,%r8,8)
	incq	%r8
	addq	%rcx, %r10
	cmpq	%r8, %rax
	jne	.LBB8_18
# %bb.19:                               # %._crit_edge113.loopexit
                                        #   in Loop: Header=BB8_16 Depth=2
	addl	%r8d, %r11d
.LBB8_20:                               # %._crit_edge113
                                        #   in Loop: Header=BB8_16 Depth=2
	incq	%rsi
	addq	$8, %rdx
	cmpq	%r13, %rsi
	jne	.LBB8_16
.LBB8_21:                               # %._crit_edge117
                                        #   in Loop: Header=BB8_2 Depth=1
	movq	104(%rsp), %rax                 # 8-byte Reload
	leal	(%rbx,%rax,2), %ebx
	movq	%r15, %rdi
	callq	free
	movq	(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	112(%rsp), %rcx                 # 8-byte Reload
	incq	%rcx
	cmpq	88(%rsp), %rcx                  # 8-byte Folded Reload
	jne	.LBB8_2
.LBB8_22:                               # %._crit_edge122
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	GaussianFilt_CUDA, .Lfunc_end8-GaussianFilt_CUDA
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9Dwt1D_RowPdiimiS_mS_m, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9Dwt1D_ColPdmS_miiiS_mS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10iDwt1D_ColPdS_iiiiiS_mS_m, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10iDwt1D_RowPdmS_miiiiS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4dampiiiP15HIP_vector_typeIdLj2EEPd, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$c_lpFilter, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movl	$280, %r9d                      # imm = 0x118
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$c_hpFilter, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movl	$280, %r9d                      # imm = 0x118
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$c_iLpFilter, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movl	$280, %r9d                      # imm = 0x118
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$c_iHpFilter, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movl	$280, %r9d                      # imm = 0x118
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	c_lpFilter,@object              # @c_lpFilter
	.local	c_lpFilter
	.comm	c_lpFilter,280,16
	.type	c_hpFilter,@object              # @c_hpFilter
	.local	c_hpFilter
	.comm	c_hpFilter,280,16
	.type	c_iLpFilter,@object             # @c_iLpFilter
	.local	c_iLpFilter
	.comm	c_iLpFilter,280,16
	.type	c_iHpFilter,@object             # @c_iHpFilter
	.local	c_iHpFilter
	.comm	c_iHpFilter,280,16
	.type	_Z9Dwt1D_RowPdiimiS_mS_m,@object # @_Z9Dwt1D_RowPdiimiS_mS_m
	.section	.rodata,"a",@progbits
	.globl	_Z9Dwt1D_RowPdiimiS_mS_m
	.p2align	3, 0x0
_Z9Dwt1D_RowPdiimiS_mS_m:
	.quad	_Z24__device_stub__Dwt1D_RowPdiimiS_mS_m
	.size	_Z9Dwt1D_RowPdiimiS_mS_m, 8

	.type	_Z9Dwt1D_ColPdmS_miiiS_mS_i,@object # @_Z9Dwt1D_ColPdmS_miiiS_mS_i
	.globl	_Z9Dwt1D_ColPdmS_miiiS_mS_i
	.p2align	3, 0x0
_Z9Dwt1D_ColPdmS_miiiS_mS_i:
	.quad	_Z24__device_stub__Dwt1D_ColPdmS_miiiS_mS_i
	.size	_Z9Dwt1D_ColPdmS_miiiS_mS_i, 8

	.type	_Z10iDwt1D_ColPdS_iiiiiS_mS_m,@object # @_Z10iDwt1D_ColPdS_iiiiiS_mS_m
	.globl	_Z10iDwt1D_ColPdS_iiiiiS_mS_m
	.p2align	3, 0x0
_Z10iDwt1D_ColPdS_iiiiiS_mS_m:
	.quad	_Z25__device_stub__iDwt1D_ColPdS_iiiiiS_mS_m
	.size	_Z10iDwt1D_ColPdS_iiiiiS_mS_m, 8

	.type	_Z10iDwt1D_RowPdmS_miiiiS_,@object # @_Z10iDwt1D_RowPdmS_miiiiS_
	.globl	_Z10iDwt1D_RowPdmS_miiiiS_
	.p2align	3, 0x0
_Z10iDwt1D_RowPdmS_miiiiS_:
	.quad	_Z25__device_stub__iDwt1D_RowPdmS_miiiiS_
	.size	_Z10iDwt1D_RowPdmS_miiiiS_, 8

	.type	_Z4dampiiiP15HIP_vector_typeIdLj2EEPd,@object # @_Z4dampiiiP15HIP_vector_typeIdLj2EEPd
	.globl	_Z4dampiiiP15HIP_vector_typeIdLj2EEPd
	.p2align	3, 0x0
_Z4dampiiiP15HIP_vector_typeIdLj2EEPd:
	.quad	_Z19__device_stub__dampiiiP15HIP_vector_typeIdLj2EEPd
	.size	_Z4dampiiiP15HIP_vector_typeIdLj2EEPd, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z9Dwt1D_RowPdiimiS_mS_m"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9Dwt1D_ColPdmS_miiiS_mS_i"
	.size	.L__unnamed_2, 28

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10iDwt1D_ColPdS_iiiiiS_mS_m"
	.size	.L__unnamed_3, 30

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z10iDwt1D_RowPdmS_miiiiS_"
	.size	.L__unnamed_4, 27

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z4dampiiiP15HIP_vector_typeIdLj2EEPd"
	.size	.L__unnamed_5, 38

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"c_lpFilter"
	.size	.L__unnamed_6, 11

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"c_hpFilter"
	.size	.L__unnamed_7, 11

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"c_iLpFilter"
	.size	.L__unnamed_8, 12

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"c_iHpFilter"
	.size	.L__unnamed_9, 12

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__Dwt1D_RowPdiimiS_mS_m
	.addrsig_sym _Z24__device_stub__Dwt1D_ColPdmS_miiiS_mS_i
	.addrsig_sym _Z25__device_stub__iDwt1D_ColPdS_iiiiiS_mS_m
	.addrsig_sym _Z25__device_stub__iDwt1D_RowPdmS_miiiiS_
	.addrsig_sym _Z19__device_stub__dampiiiP15HIP_vector_typeIdLj2EEPd
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym c_lpFilter
	.addrsig_sym c_hpFilter
	.addrsig_sym c_iLpFilter
	.addrsig_sym c_iHpFilter
	.addrsig_sym _Z9Dwt1D_RowPdiimiS_mS_m
	.addrsig_sym _Z9Dwt1D_ColPdmS_miiiS_mS_i
	.addrsig_sym _Z10iDwt1D_ColPdS_iiiiiS_mS_m
	.addrsig_sym _Z10iDwt1D_RowPdmS_miiiiS_
	.addrsig_sym _Z4dampiiiP15HIP_vector_typeIdLj2EEPd
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9Dwt1D_RowPdiimiS_mS_m ; -- Begin function _Z9Dwt1D_RowPdiimiS_mS_m
	.globl	_Z9Dwt1D_RowPdiimiS_mS_m
	.p2align	8
	.type	_Z9Dwt1D_RowPdiimiS_mS_m,@function
_Z9Dwt1D_RowPdiimiS_mS_m:               ; @_Z9Dwt1D_RowPdiimiS_mS_m
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b64 s[4:5], s[0:1], 0x8
	s_load_b32 s8, s[0:1], 0x18
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s6, s4, s8
	v_mad_u64_u32 v[2:3], null, s14, s2, v[1:2]
	s_add_i32 s2, s6, -1
	v_mad_u64_u32 v[0:1], null, s15, s3, v[4:5]
	s_lshr_b32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s3
	s_ashr_i32 s2, s2, 1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s5, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_13
; %bb.1:
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	v_ashrrev_i32_e32 v1, 31, v0
	s_cmp_lt_i32 s8, 1
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_cbranch_scc1 .LBB0_12
; %bb.2:                                ; %.lr.ph
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b64 s[6:7], s[0:1], 0x10
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v10, 0
	v_dual_mov_b32 v4, 0 :: v_dual_lshlrev_b32 v9, 1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v11, 1, v9
	v_xor_b32_e32 v9, -2, v9
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[7:8], null, v0, s6, s[2:3]
	v_mul_lo_u32 v5, v0, s7
	v_mul_lo_u32 v6, v1, s6
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, c_lpFilter@rel32@lo+4
	s_addc_u32 s3, s3, c_lpFilter@rel32@hi+12
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, c_hpFilter@rel32@lo+4
	s_addc_u32 s7, s7, c_hpFilter@rel32@hi+12
	s_lshl_b32 s5, s4, 1
	v_add3_u32 v8, v6, v8, v5
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s9, exec_lo
                                        ; implicit-def: $vgpr12_vgpr13
	v_cmpx_lt_i32_e32 -1, v11
	s_xor_b32 s9, exec_lo, s9
	s_cbranch_execz .LBB0_9
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s10, exec_lo
                                        ; implicit-def: $vgpr12_vgpr13
	v_cmpx_le_i32_e64 s4, v11
	s_xor_b32 s10, exec_lo, s10
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	v_add_nc_u32_e32 v12, s5, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v13, 31, v12
; %bb.6:                                ; %Flow
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_and_not1_saveexec_b32 s10, s10
; %bb.7:                                ;   in Loop: Header=BB0_3 Depth=1
	v_mov_b32_e32 v12, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v13, v12
	v_mov_b32_e32 v12, v11
; %bb.8:                                ; %Flow100
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
.LBB0_9:                                ; %Flow101
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_and_not1_saveexec_b32 s9, s9
; %bb.10:                               ;   in Loop: Header=BB0_3 Depth=1
	v_dual_mov_b32 v13, v10 :: v_dual_mov_b32 v12, v9
; %bb.11:                               ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	s_add_i32 s8, s8, -1
	v_add_nc_u32_e32 v9, 1, v9
	v_add_nc_u32_e32 v11, -1, v11
	v_add_co_u32 v12, vcc_lo, v7, v12
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v13, vcc_lo, v8, v13, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	s_load_b64 s[10:11], s[2:3], 0x0
	s_load_b64 s[12:13], s[6:7], 0x0
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	s_add_u32 s6, s6, 8
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s8, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fma_f64 v[5:6], v[12:13], s[10:11], v[5:6]
	v_fma_f64 v[3:4], v[12:13], s[12:13], v[3:4]
	s_cbranch_scc0 .LBB0_3
.LBB0_12:                               ; %Flow103
	s_load_b256 s[0:7], s[0:1], 0x20
	v_ashrrev_i32_e32 v9, 31, v2
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v11, v2, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v12, v9, s2
	v_mad_u64_u32 v[7:8], null, v2, s2, s[0:1]
	v_mul_lo_u32 v13, v2, s7
	v_mul_lo_u32 v14, v9, s6
	v_mad_u64_u32 v[9:10], null, v2, s6, s[4:5]
	v_add3_u32 v2, v12, v8, v11
	v_add_co_u32 v7, vcc_lo, v7, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v10, v14, v10, v13
	v_add_co_ci_u32_e32 v8, vcc_lo, v2, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, v9, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, v10, v1, vcc_lo
	global_store_b64 v[7:8], v[5:6], off
	global_store_b64 v[0:1], v[3:4], off
.LBB0_13:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9Dwt1D_RowPdiimiS_mS_m
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9Dwt1D_RowPdiimiS_mS_m, .Lfunc_end0-_Z9Dwt1D_RowPdiimiS_mS_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 648
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z9Dwt1D_ColPdmS_miiiS_mS_i ; -- Begin function _Z9Dwt1D_ColPdmS_miiiS_mS_i
	.globl	_Z9Dwt1D_ColPdmS_miiiS_mS_i
	.p2align	8
	.type	_Z9Dwt1D_ColPdmS_miiiS_mS_i,@function
_Z9Dwt1D_ColPdmS_miiiS_mS_i:            ; @_Z9Dwt1D_ColPdmS_miiiS_mS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x5c
	s_load_b128 s[4:7], s[0:1], 0x20
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s7, s4, s6
	v_mad_u64_u32 v[2:3], null, s14, s2, v[1:2]
	s_add_i32 s2, s7, -1
	v_mad_u64_u32 v[0:1], null, s15, s3, v[4:5]
	s_lshr_b32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s3
	s_ashr_i32 s7, s2, 1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s7, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s5, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_13
; %bb.1:
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	v_ashrrev_i32_e32 v1, 31, v0
	s_cmp_lt_i32 s6, 1
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	v_dual_mov_b32 v8, v4 :: v_dual_mov_b32 v7, v3
	v_dual_mov_b32 v10, v4 :: v_dual_mov_b32 v9, v3
	s_cbranch_scc1 .LBB1_12
; %bb.2:                                ; %.lr.ph
	s_load_b256 s[8:15], s[0:1], 0x0
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v16, 0
	v_dual_mov_b32 v4, 0 :: v_dual_lshlrev_b32 v5, 1, v2
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, c_lpFilter@rel32@lo+4
	s_addc_u32 s3, s3, c_lpFilter@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v17, 1, v5
	v_xor_b32_e32 v15, -2, v5
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	v_dual_mov_b32 v8, v4 :: v_dual_mov_b32 v7, v3
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v9, v0, s11
	v_mul_lo_u32 v10, v1, s10
	v_mad_u64_u32 v[11:12], null, v0, s10, s[8:9]
	v_mul_lo_u32 v18, v0, s15
	v_mul_lo_u32 v19, v1, s14
	v_mad_u64_u32 v[13:14], null, v0, s14, s[12:13]
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_hpFilter@rel32@lo+4
	s_addc_u32 s9, s9, c_hpFilter@rel32@hi+12
	s_lshl_b32 s10, s4, 1
	v_add3_u32 v12, v10, v12, v9
	v_dual_mov_b32 v10, v4 :: v_dual_mov_b32 v9, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v14, v19, v14, v18
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s11, exec_lo
                                        ; implicit-def: $vgpr18_vgpr19
	v_cmpx_lt_i32_e32 -1, v17
	s_xor_b32 s11, exec_lo, s11
	s_cbranch_execz .LBB1_9
; %bb.4:                                ;   in Loop: Header=BB1_3 Depth=1
	s_mov_b32 s12, exec_lo
                                        ; implicit-def: $vgpr18_vgpr19
	v_cmpx_le_i32_e64 s4, v17
	s_xor_b32 s12, exec_lo, s12
; %bb.5:                                ;   in Loop: Header=BB1_3 Depth=1
	v_add_nc_u32_e32 v18, s10, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v19, 31, v18
; %bb.6:                                ; %Flow
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_and_not1_saveexec_b32 s12, s12
; %bb.7:                                ;   in Loop: Header=BB1_3 Depth=1
	v_mov_b32_e32 v18, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v19, v18
	v_mov_b32_e32 v18, v17
; %bb.8:                                ; %Flow168
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
.LBB1_9:                                ; %Flow169
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_and_not1_saveexec_b32 s11, s11
; %bb.10:                               ;   in Loop: Header=BB1_3 Depth=1
	v_dual_mov_b32 v19, v16 :: v_dual_mov_b32 v18, v15
; %bb.11:                               ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[18:19], 3, v[18:19]
	s_add_i32 s6, s6, -1
	v_add_nc_u32_e32 v15, 1, v15
	v_add_nc_u32_e32 v17, -1, v17
	v_add_co_u32 v20, vcc_lo, v11, v18
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v21, vcc_lo, v12, v19, vcc_lo
	v_add_co_u32 v18, vcc_lo, v13, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, v14, v19, vcc_lo
	global_load_b64 v[20:21], v[20:21], off
	global_load_b64 v[18:19], v[18:19], off
	s_load_b64 s[12:13], s[2:3], 0x0
	s_load_b64 s[14:15], s[8:9], 0x0
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	s_add_u32 s8, s8, 8
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s6, 0
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_fma_f64 v[9:10], v[20:21], s[12:13], v[9:10]
	v_fma_f64 v[7:8], v[20:21], s[14:15], v[7:8]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[5:6], v[18:19], s[12:13], v[5:6]
	v_fma_f64 v[3:4], v[18:19], s[14:15], v[3:4]
	s_cbranch_scc0 .LBB1_3
.LBB1_12:                               ; %Flow171
	s_clause 0x2
	s_load_b128 s[8:11], s[0:1], 0x30
	s_load_b32 s2, s[0:1], 0x48
	s_load_b64 s[0:1], s[0:1], 0x40
	v_mul_lo_u32 v14, v2, s5
	s_mul_i32 s3, s7, s5
	v_ashrrev_i32_e32 v11, 31, v2
	s_mul_i32 s4, s3, -3
	s_lshl_b32 s5, s3, 1
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v19, v2, s11
	s_add_i32 s4, s4, s2
	s_sub_i32 s5, s2, s5
	v_add3_u32 v13, s4, v14, v0
	v_mul_lo_u32 v20, v11, s10
	v_mad_u64_u32 v[11:12], null, v2, s10, s[8:9]
	s_sub_i32 s2, s2, s3
	v_add3_u32 v15, s5, v14, v0
	v_add3_u32 v17, s2, v14, v0
	v_ashrrev_i32_e32 v14, 31, v13
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v16, 31, v15
	v_add3_u32 v2, v20, v12, v19
	v_lshlrev_b64 v[12:13], 3, v[13:14]
	v_ashrrev_i32_e32 v18, 31, v17
	v_add_co_u32 v0, vcc_lo, v11, v0
	v_lshlrev_b64 v[14:15], 3, v[15:16]
	v_add_co_ci_u32_e32 v1, vcc_lo, v2, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[16:17], 3, v[17:18]
	v_add_co_u32 v11, vcc_lo, s0, v12
	v_add_co_ci_u32_e32 v12, vcc_lo, s1, v13, vcc_lo
	v_add_co_u32 v13, vcc_lo, s0, v14
	v_add_co_ci_u32_e32 v14, vcc_lo, s1, v15, vcc_lo
	v_add_co_u32 v15, vcc_lo, s0, v16
	v_add_co_ci_u32_e32 v16, vcc_lo, s1, v17, vcc_lo
	global_store_b64 v[0:1], v[9:10], off
	s_clause 0x2
	global_store_b64 v[11:12], v[7:8], off
	global_store_b64 v[13:14], v[5:6], off
	global_store_b64 v[15:16], v[3:4], off
.LBB1_13:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9Dwt1D_ColPdmS_miiiS_mS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9Dwt1D_ColPdmS_miiiS_mS_i, .Lfunc_end1-_Z9Dwt1D_ColPdmS_miiiS_mS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 856
; NumSgprs: 18
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z10iDwt1D_ColPdS_iiiiiS_mS_m ; -- Begin function _Z10iDwt1D_ColPdS_iiiiiS_mS_m
	.globl	_Z10iDwt1D_ColPdS_iiiiiS_mS_m
	.p2align	8
	.type	_Z10iDwt1D_ColPdS_iiiiiS_mS_m,@function
_Z10iDwt1D_ColPdS_iiiiiS_mS_m:          ; @_Z10iDwt1D_ColPdS_iiiiiS_mS_m
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x54
	s_load_b128 s[4:7], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[0:1], null, s15, s3, v[4:5]
	v_cmp_gt_i32_e32 vcc_lo, s7, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s6, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_8
; %bb.1:
	s_load_b32 s3, s[0:1], 0x20
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v10, v4 :: v_dual_mov_b32 v9, v3
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s3, 1
	s_cbranch_scc1 .LBB2_7
; %bb.2:                                ; %.lr.ph
	s_load_b128 s[8:11], s[0:1], 0x0
	v_mov_b32_e32 v3, 0
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v1, -2, v2
	s_lshl_b32 s16, s5, 1
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, c_iLpFilter@rel32@lo+4
	s_addc_u32 s13, s13, c_iLpFilter@rel32@hi+12
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, c_iHpFilter@rel32@lo+4
	s_addc_u32 s15, s15, c_iHpFilter@rel32@hi+12
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	v_dual_mov_b32 v8, v4 :: v_dual_mov_b32 v7, v3
	v_dual_mov_b32 v10, v4 :: v_dual_mov_b32 v9, v3
	v_dual_mov_b32 v12, v4 :: v_dual_mov_b32 v11, v3
	s_mul_i32 s7, s16, s6
	s_mul_i32 s5, s6, s5
	s_add_i32 s16, s16, -1
.LBB2_3:                                ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v14, v4 :: v_dual_add_nc_u32 v21, s3, v1
	v_dual_mov_b32 v13, v3 :: v_dual_mov_b32 v18, v4
	v_mov_b32_e32 v17, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_and_b32_e32 v15, 0x80000001, v21
	v_cmp_gt_i32_e32 vcc_lo, s16, v21
	v_dual_mov_b32 v20, v4 :: v_dual_mov_b32 v19, v3
	v_cmp_eq_u32_e64 s2, 0, v15
	v_dual_mov_b32 v16, v4 :: v_dual_mov_b32 v15, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s17, s2, vcc_lo
	s_and_saveexec_b32 s2, s17
	s_cbranch_execz .LBB2_5
; %bb.4:                                ;   in Loop: Header=BB2_3 Depth=1
	v_lshrrev_b32_e32 v15, 1, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[13:14], null, v15, s6, v[0:1]
	v_add_nc_u32_e32 v15, s4, v13
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v17, s5, v15
	v_ashrrev_i32_e32 v16, 31, v15
	v_add_nc_u32_e32 v19, s7, v15
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v18, 31, v17
	v_lshlrev_b64 v[15:16], 3, v[15:16]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v20, 31, v19
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v13, vcc_lo, s8, v13
	v_lshlrev_b64 v[17:18], 3, v[17:18]
	v_add_co_ci_u32_e32 v14, vcc_lo, s9, v14, vcc_lo
	v_lshlrev_b64 v[19:20], 3, v[19:20]
	v_add_co_u32 v15, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s11, v16, vcc_lo
	v_add_co_u32 v17, vcc_lo, s10, v17
	v_add_co_ci_u32_e32 v18, vcc_lo, s11, v18, vcc_lo
	v_add_co_u32 v19, vcc_lo, s10, v19
	v_add_co_ci_u32_e32 v20, vcc_lo, s11, v20, vcc_lo
	global_load_b64 v[13:14], v[13:14], off
	s_clause 0x2
	global_load_b64 v[15:16], v[15:16], off
	global_load_b64 v[17:18], v[17:18], off
	global_load_b64 v[19:20], v[19:20], off
.LBB2_5:                                ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b64 s[18:19], s[12:13], 0x0
	s_load_b64 s[20:21], s[14:15], 0x0
	s_add_i32 s3, s3, -1
	s_add_u32 s12, s12, 8
	s_addc_u32 s13, s13, 0
	s_add_u32 s14, s14, 8
	s_addc_u32 s15, s15, 0
	s_cmp_eq_u32 s3, 0
	s_waitcnt vmcnt(3) lgkmcnt(0)
	v_fma_f64 v[11:12], v[13:14], s[18:19], v[11:12]
	s_waitcnt vmcnt(2)
	v_fma_f64 v[9:10], v[15:16], s[20:21], v[9:10]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[7:8], v[17:18], s[18:19], v[7:8]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[5:6], v[19:20], s[20:21], v[5:6]
	s_cbranch_scc0 .LBB2_3
; %bb.6:                                ; %._crit_edge.loopexit
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[11:12], v[9:10]
	v_add_f64 v[3:4], v[7:8], v[5:6]
.LBB2_7:                                ; %Flow
	s_load_b256 s[0:7], s[0:1], 0x28
	v_ashrrev_i32_e32 v7, 31, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v11, v2, s3
	v_mul_lo_u32 v12, v7, s2
	v_mad_u64_u32 v[5:6], null, v2, s2, s[0:1]
	v_mul_lo_u32 v13, v2, s7
	v_mul_lo_u32 v14, v7, s6
	v_mad_u64_u32 v[7:8], null, v2, s6, s[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add3_u32 v2, v12, v6, v11
	v_add_co_u32 v5, vcc_lo, v5, v0
	v_add3_u32 v8, v14, v8, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, v2, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, v7, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo
	global_store_b64 v[5:6], v[9:10], off
	global_store_b64 v[0:1], v[3:4], off
.LBB2_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10iDwt1D_ColPdS_iiiiiS_mS_m
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10iDwt1D_ColPdS_iiiiiS_mS_m, .Lfunc_end2-_Z10iDwt1D_ColPdS_iiiiiS_mS_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 776
; NumSgprs: 24
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z10iDwt1D_RowPdmS_miiiiS_ ; -- Begin function _Z10iDwt1D_RowPdmS_miiiiS_
	.globl	_Z10iDwt1D_RowPdmS_miiiiS_
	.p2align	8
	.type	_Z10iDwt1D_RowPdmS_miiiiS_,@function
_Z10iDwt1D_RowPdmS_miiiiS_:             ; @_Z10iDwt1D_RowPdmS_miiiiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b128 s[4:7], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB3_11
; %bb.1:
	s_cmp_lt_i32 s7, 1
	s_cbranch_scc1 .LBB3_9
; %bb.2:                                ; %.lr.ph
	s_load_b256 s[8:15], s[0:1], 0x0
	v_ashrrev_i32_e32 v6, 31, v1
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v9, 0
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v18, -2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v11, v3 :: v_dual_mov_b32 v10, v2
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v8, v1, s11
	v_mul_lo_u32 v12, v6, s10
	v_mad_u64_u32 v[4:5], null, v1, s10, s[8:9]
	v_mul_lo_u32 v13, v1, s15
	v_mul_lo_u32 v14, v6, s14
	v_mad_u64_u32 v[6:7], null, v1, s14, s[12:13]
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_iLpFilter@rel32@lo+4
	s_addc_u32 s9, s9, c_iLpFilter@rel32@hi+12
	s_getpc_b64 s[10:11]
	s_add_u32 s10, s10, c_iHpFilter@rel32@lo+4
	s_addc_u32 s11, s11, c_iHpFilter@rel32@hi+12
	v_add3_u32 v5, v12, v5, v8
	s_lshl_b32 s3, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s3, -1
	v_add3_u32 v7, v14, v7, v13
	v_dual_mov_b32 v13, v3 :: v_dual_mov_b32 v12, v2
.LBB3_3:                                ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v17, v3 :: v_dual_add_nc_u32 v8, s7, v18
	v_dual_mov_b32 v16, v2 :: v_dual_mov_b32 v15, v3
	v_mov_b32_e32 v14, v2
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_lt_i32_e32 -1, v8
	s_cbranch_execz .LBB3_7
; %bb.4:                                ;   in Loop: Header=BB3_3 Depth=1
	v_and_b32_e32 v16, 1, v8
	v_mov_b32_e32 v14, 0
	v_mov_b32_e32 v15, 0
	v_cmp_gt_i32_e32 vcc_lo, s3, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e64 s2, 0, v16
	v_dual_mov_b32 v17, v15 :: v_dual_mov_b32 v16, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, vcc_lo, s2
	s_and_saveexec_b32 s2, s5
	s_cbranch_execz .LBB3_6
; %bb.5:                                ;   in Loop: Header=BB3_3 Depth=1
	v_lshrrev_b32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[14:15], 3, v[8:9]
	v_add_co_u32 v16, vcc_lo, v4, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, v5, v15, vcc_lo
	v_add_co_u32 v14, vcc_lo, v6, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, v7, v15, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	global_load_b64 v[14:15], v[14:15], off
.LBB3_6:                                ; %Flow
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_7:                                ;   in Loop: Header=BB3_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	s_load_b64 s[4:5], s[8:9], 0x0
	s_load_b64 s[12:13], s[10:11], 0x0
	s_add_i32 s7, s7, -1
	s_add_u32 s8, s8, 8
	s_addc_u32 s9, s9, 0
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_cmp_eq_u32 s7, 0
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_fma_f64 v[12:13], v[16:17], s[4:5], v[12:13]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[10:11], v[14:15], s[12:13], v[10:11]
	s_cbranch_scc0 .LBB3_3
; %bb.8:                                ; %._crit_edge.loopexit
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[2:3], v[12:13], v[10:11]
	s_branch .LBB3_10
.LBB3_9:
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
.LBB3_10:                               ; %Flow91
	s_load_b64 s[0:1], s[0:1], 0x30
	v_mad_u64_u32 v[4:5], null, v1, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[0:1], 3, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB3_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10iDwt1D_RowPdmS_miiiiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z10iDwt1D_RowPdmS_miiiiS_, .Lfunc_end3-_Z10iDwt1D_RowPdmS_miiiiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 604
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z4dampiiiP15HIP_vector_typeIdLj2EEPd ; -- Begin function _Z4dampiiiP15HIP_vector_typeIdLj2EEPd
	.globl	_Z4dampiiiP15HIP_vector_typeIdLj2EEPd
	.p2align	8
	.type	_Z4dampiiiP15HIP_vector_typeIdLj2EEPd,@function
_Z4dampiiiP15HIP_vector_typeIdLj2EEPd:  ; @_Z4dampiiiP15HIP_vector_typeIdLj2EEPd
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	v_cmp_gt_i32_e64 s3, s6, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s4, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB4_2
; %bb.1:
	v_ashrrev_i32_e32 v1, 31, v0
	s_load_b128 s[0:3], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, v2, s5, v[0:1]
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 4, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	global_load_b64 v[8:9], v[4:5], off
	global_load_b128 v[0:3], v[6:7], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], v[8:9], v[0:1]
	global_store_b64 v[6:7], v[0:1], off
	global_load_b64 v[0:1], v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], v[0:1], v[2:3]
	global_store_b64 v[6:7], v[0:1], off offset:8
.LBB4_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4dampiiiP15HIP_vector_typeIdLj2EEPd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z4dampiiiP15HIP_vector_typeIdLj2EEPd, .Lfunc_end4-_Z4dampiiiP15HIP_vector_typeIdLj2EEPd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	c_lpFilter              ; @c_lpFilter
	.type	c_lpFilter,@object
	.section	.bss,"aw",@nobits
	.globl	c_lpFilter
	.p2align	4, 0x0
c_lpFilter:
	.zero	280
	.size	c_lpFilter, 280

	.protected	c_hpFilter              ; @c_hpFilter
	.type	c_hpFilter,@object
	.globl	c_hpFilter
	.p2align	4, 0x0
c_hpFilter:
	.zero	280
	.size	c_hpFilter, 280

	.protected	c_iLpFilter             ; @c_iLpFilter
	.type	c_iLpFilter,@object
	.globl	c_iLpFilter
	.p2align	4, 0x0
c_iLpFilter:
	.zero	280
	.size	c_iLpFilter, 280

	.protected	c_iHpFilter             ; @c_iHpFilter
	.type	c_iHpFilter,@object
	.globl	c_iHpFilter
	.p2align	4, 0x0
c_iHpFilter:
	.zero	280
	.size	c_iHpFilter, 280

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym c_lpFilter
	.addrsig_sym c_hpFilter
	.addrsig_sym c_iLpFilter
	.addrsig_sym c_iHpFilter
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           8
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9Dwt1D_RowPdiimiS_mS_m
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9Dwt1D_RowPdiimiS_mS_m.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .offset:         72
        .size:           4
        .value_kind:     by_value
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         84
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         88
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         92
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         94
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         96
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         98
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         100
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         102
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         144
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 336
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9Dwt1D_ColPdmS_miiiS_mS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9Dwt1D_ColPdmS_miiiS_mS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     22
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .offset:         64
        .size:           8
        .value_kind:     by_value
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         76
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         84
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         86
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         88
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         90
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         92
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         94
        .size:           2
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
