#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include "cuda.h"


#include <stdio.h>


#define blocksize 256

int getblock(int length) {
	int block = length / blocksize;
	if ((length%blocksize) > 0)block++;
	return block;
}


int getlg2(int length);

void check(int *a, int length) {
	printf("//////////////////////////////////////////////\n");
	int t = 0;
	for (int i = 0; i < length; i++) {
		
		if (i < (length - 1)) {
			if (a[i] > a[i + 1])
				printf("a[%d] = %d , a[%d] = %d\n", i, a[i], i + 1, a[i + 1]);
				
		}
		else printf("succeed\n");
	}
}

__device__ __host__ int insert0(int a, int *array,unsigned int star,unsigned int end) {
	int p = 0;
	while ((end - star) > 1) {
		p = (star + end) / 2;
		if (a > array[p])star = p;
		else end = p;
	}
	p = (end + star)/2;
	if (a > array[p])star = p;
	else end = p;
	if (a > array[end])end++;
	return end;
}

__device__ __host__ int insert1(int a, int *array, unsigned int star, unsigned int end) {
	int p = 0;
	while ((end - star) > 1) {
		p = (star + end) / 2;
		if (a >= array[p])star = p;
		else end = p;
	}
	p = (end + star) / 2;
	if (a >= array[p])star = p;
	else end = p;
	if (a >= array[end])end++;
	return end;
}

__global__ void sort_int_shared(int *a_map, int *a_dev, int length) {
	int tid = blockIdx.x * blockDim.x + threadIdx.x;
	__shared__ int a_s[blocksize];

	//Ȼȡֵ빲ڴ
	if(tid<length)a_s[threadIdx.x] = a_map[tid];
	else a_s[threadIdx.x] = INT_MAX;
	int r = 0;
	
	__syncthreads();

	//ֳ߳̿,ֱִвͬ
	bool flag = (threadIdx.x < (blocksize / 2));
	tid = tid % (blocksize / 2);

	//ֻԪص
	if (flag) r = a_s[tid * 2];
	else r = a_s[tid * 2 + 1];
	__syncthreads();

	if (flag) {
		if(r > a_s[tid * 2 + 1])a_s[tid*2+1] = r;
	}
	else {
		if (r < a_s[tid * 2])a_s[tid * 2] = r;
	}
	__syncthreads();//洢ͬ

	for (int i = 2; i < blocksize; i *= 2) {
		int pair_star = (tid / i)*i*2;

		int offset = tid%i;
		r = a_s[pair_star + offset + ((!flag)*i)];

		int p;
		if (flag) {
			p = insert0(r, a_s, pair_star + i, pair_star + (2 * i) - 1);
			p = p - i;
		}
		else
		{
			p = insert1(r, a_s, pair_star, pair_star + i - 1);
		}

		__syncthreads();

		p += offset;
		a_s[p] = r;

		__syncthreads();

	}
	
	a_dev[blockIdx.x * blockDim.x + threadIdx.x] = a_s[threadIdx.x];
}

__global__ void short_int_global(int *a_dev, int *a_next, int i) {
	int tid = blockIdx.x * blockDim.x + threadIdx.x;
	int r = a_dev[tid];
	int p = tid;

	bool flag = ((blockIdx.x >> i)&1);
	flag = !flag;
	int pair_length = 2 << i;
	int pair_tid = blockIdx.x / pair_length;
	if (flag) 
	{
		if ((blockIdx.x >> (i + 1)) == (gridDim.x >> (i + 1))) {
			int size = gridDim.x % (2 << i);
			size -= (pair_length / 2);
			if (size > 0) {
				int star = pair_tid*pair_length + (pair_length / 2);
				int end = star + size;
				star *= blocksize;
				end *= blocksize;
				end--;
				p = insert0(r, a_dev, star, end);
				p = p - blocksize*(pair_length / 2);
				p += tid - (pair_tid*pair_length*blocksize);
			}
			a_next[p] = r;
		}
		else
		{
			int star = pair_tid*pair_length + (pair_length / 2);
			int end = star + (pair_length/2);
			star *= blocksize;
			end *= blocksize;
			end--;
			p = insert0(r, a_dev, star, end);
			p = p - blocksize*(pair_length / 2);
			p += tid - (pair_tid*pair_length*blocksize);
			a_next[p] = r;
		}
	}
	else
	{
		int star = pair_tid*pair_length;
		int end = star + (pair_length / 2);
		star *= blocksize;
		end *= blocksize;
		end--;
		p = insert1(r, a_dev, star, end);
		p += tid - ((pair_tid*pair_length + (pair_length / 2))*blocksize);
		a_next[p] = r;
	}
}

void sort_int(int *a,int length) {;
	int *a_dev;
	int *a_map;
	cudaMalloc((void**)&a_dev, getblock(length) * blocksize * sizeof(int));
	cudaHostGetDevicePointer((void **)&a_map, (void *)a, 0);
	sort_int_shared<<<getblock(length),blocksize>>>(a_map, a_dev, length);
	
	cudaMemcpy(a, a_dev, length * sizeof(int), cudaMemcpyDeviceToHost);
	int *a_next;
	cudaMalloc((void**)&a_next, getblock(length) * blocksize * sizeof(int));

	int times = getlg2(getblock(length));

	for (int i = 0; i < times; i++) {
		short_int_global <<<getblock(length), blocksize >>>(a_dev, a_next, i);
		//cudaMemcpy(a, a_next, length * sizeof(int), cudaMemcpyDeviceToHost);
		//check(a, length);

		if (i == (times - 1)) {
			cudaMemcpy(a, a_next, length * sizeof(int), cudaMemcpyDeviceToHost);
			break;
		}
		int *c;
		c = a_dev;
		a_dev = a_next;
		a_next = c;
	}

	cudaFree(a_next);
	//cudaFree(a_dev);
	//cudaMemcpy(a,a_next,length*sizeof(int), cudaMemcpyDeviceToHost);
	cudaFree(a_next);
	//check(a, length);
}





int getlg2(int length) {
	int a = 0, b = 0;
	for (int i = 0; i < 32; i++) {
		if (((length >>i )&1) == 1) {
			//printf("i = %d\n", i);
			a = i;
			b++;
		}
	}
	if (b > 1)a++;
	return a;
}

int* genarray(int length) {
	int *a;
	cudaHostAlloc((void**)&a, length*sizeof(int), cudaHostAllocMapped);
	for (int i = 0; i < length; i++) {
		a[i] =  length - i;
	};

	return a;
}



int main() {
	int length = 134217728;
	int *a = genarray(length);
	/*for (int i = 0; i < length; i++) {
		printf("a[%d] = %d\n", i, a[i]);
	}*/

	cudaEvent_t start, stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);
	// record start event on the default stream
	cudaEventRecord(start);

	sort_int(a,length);

	cudaEventRecord(stop);
	// wait until the stop event completes
	cudaEventSynchronize(stop);
	// calculate the elapsed time between two events
	float time;
	cudaEventElapsedTime(&time, start, stop);

	printf("time = %f\n",time);

	getchar();
}
	.file	"tmpxft_0032dbe5_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2037:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2037:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8getblocki
	.type	_Z8getblocki, @function
_Z8getblocki:
.LFB2027:
	.cfi_startproc
	endbr64
	movl	%edi, %eax
	movl	$256, %ecx
	cltd
	idivl	%ecx
	testl	%edx, %edx
	jle	.L2
	incl	%eax
.L2:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z8getblocki, .-_Z8getblocki
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"//////////////////////////////////////////////\n"
.LC1:
	.string	"a[%d] = %d , a[%d] = %d\n"
.LC2:
	.string	"succeed\n"
	.text
	.globl	_Z5checkPii
	.type	_Z5checkPii, @function
_Z5checkPii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%eax, %eax
	leaq	.LC2(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	movl	$2, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	leaq	.LC0(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 48
	call	__printf_chk@PLT
.L6:
	movl	%ebx, %edx
	cmpl	%ebx, %ebp
	jle	.L11
	leal	-1(%rbp), %eax
	cmpl	%ebx, %eax
	jle	.L7
	movl	(%r12,%rbx,4), %ecx
	movl	4(%r12,%rbx,4), %r9d
	cmpl	%r9d, %ecx
	jle	.L8
	leal	1(%rdx), %r8d
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L8
.L7:
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L8:
	incq	%rbx
	jmp	.L6
.L11:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z5checkPii, .-_Z5checkPii
	.globl	_Z7insert0iPijj
	.type	_Z7insert0iPijj, @function
_Z7insert0iPijj:
.LFB2029:
	.cfi_startproc
	endbr64
.L13:
	movl	%edx, %eax
.L14:
	movl	%ecx, %r9d
	movl	%eax, %edx
	subl	%eax, %r9d
	leal	(%rax,%rcx), %eax
	shrl	%eax
	movl	%eax, %r8d
	movl	(%rsi,%r8,4), %r8d
	cmpl	$1, %r9d
	jbe	.L19
	cmpl	%r8d, %edi
	jg	.L14
	movl	%eax, %ecx
	jmp	.L13
.L19:
	cmpl	%r8d, %edi
	jle	.L16
	movl	%ecx, %edx
	movl	%ecx, %eax
	cmpl	%edi, (%rsi,%rdx,4)
	jge	.L16
	leal	1(%rcx), %eax
.L16:
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z7insert0iPijj, .-_Z7insert0iPijj
	.globl	_Z7insert1iPijj
	.type	_Z7insert1iPijj, @function
_Z7insert1iPijj:
.LFB2030:
	.cfi_startproc
	endbr64
.L21:
	movl	%edx, %eax
.L22:
	movl	%ecx, %r9d
	movl	%eax, %edx
	subl	%eax, %r9d
	leal	(%rax,%rcx), %eax
	shrl	%eax
	movl	%eax, %r8d
	movl	(%rsi,%r8,4), %r8d
	cmpl	$1, %r9d
	jbe	.L27
	cmpl	%r8d, %edi
	jge	.L22
	movl	%eax, %ecx
	jmp	.L21
.L27:
	cmpl	%r8d, %edi
	jl	.L24
	movl	%ecx, %edx
	movl	%ecx, %eax
	cmpl	%edi, (%rsi,%rdx,4)
	jg	.L24
	leal	1(%rcx), %eax
.L24:
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z7insert1iPijj, .-_Z7insert1iPijj
	.globl	_Z6getlg2i
	.type	_Z6getlg2i, @function
_Z6getlg2i:
.LFB2032:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.L30:
	btl	%eax, %edi
	jnc	.L29
	incl	%ecx
	movl	%eax, %edx
.L29:
	incl	%eax
	cmpl	$32, %eax
	jne	.L30
	decl	%ecx
	jle	.L28
	incl	%edx
.L28:
	movl	%edx, %eax
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z6getlg2i, .-_Z6getlg2i
	.globl	_Z8genarrayi
	.type	_Z8genarrayi, @function
_Z8genarrayi:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movslq	%edi, %rsi
	movl	$2, %edx
	movq	%rsi, %rbx
	salq	$2, %rsi
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaHostAlloc@PLT
	movq	(%rsp), %rdx
	xorl	%eax, %eax
.L37:
	cmpl	%eax, %ebx
	jle	.L41
	movl	%ebx, %ecx
	subl	%eax, %ecx
	movl	%ecx, (%rdx,%rax,4)
	incq	%rax
	jmp	.L37
.L41:
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	movq	%rdx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z8genarrayi, .-_Z8genarrayi
	.globl	_Z38__device_stub__Z15sort_int_sharedPiS_iPiS_i
	.type	_Z38__device_stub__Z15sort_int_sharedPiS_iPiS_i, @function
_Z38__device_stub__Z15sort_int_sharedPiS_iPiS_i:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15sort_int_sharedPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L42:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z38__device_stub__Z15sort_int_sharedPiS_iPiS_i, .-_Z38__device_stub__Z15sort_int_sharedPiS_iPiS_i
	.globl	_Z15sort_int_sharedPiS_i
	.type	_Z15sort_int_sharedPiS_i, @function
_Z15sort_int_sharedPiS_i:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z15sort_int_sharedPiS_iPiS_i
	.cfi_endproc
.LFE2060:
	.size	_Z15sort_int_sharedPiS_i, .-_Z15sort_int_sharedPiS_i
	.globl	_Z39__device_stub__Z16short_int_globalPiS_iPiS_i
	.type	_Z39__device_stub__Z16short_int_globalPiS_iPiS_i, @function
_Z39__device_stub__Z16short_int_globalPiS_iPiS_i:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16short_int_globalPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L47:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z39__device_stub__Z16short_int_globalPiS_iPiS_i, .-_Z39__device_stub__Z16short_int_globalPiS_iPiS_i
	.globl	_Z16short_int_globalPiS_i
	.type	_Z16short_int_globalPiS_i, @function
_Z16short_int_globalPiS_i:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16short_int_globalPiS_iPiS_i
	.cfi_endproc
.LFE2062:
	.size	_Z16short_int_globalPiS_i, .-_Z16short_int_globalPiS_i
	.globl	_Z8sort_intPii
	.type	_Z8sort_intPii, @function
_Z8sort_intPii:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%esi, %rbx
	movl	%ebx, %edi
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Z8getblocki
	leaq	8(%rsp), %rdi
	movl	%eax, %ebp
	movl	%eax, %r12d
	sall	$8, %ebp
	movslq	%ebp, %rbp
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	xorl	%edx, %edx
	leaq	16(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaHostGetDevicePointer@PLT
	movl	%r12d, 32(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$16777217, %edx
	movl	$1, %ecx
	movl	$1, 52(%rsp)
	movq	%rax, 36(%rsp)
	movq	32(%rsp), %rdi
	salq	$8, %rdx
	movl	40(%rsp), %esi
	movq	%rdx, 44(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L53
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z38__device_stub__Z15sort_int_sharedPiS_iPiS_i
.L53:
	movq	8(%rsp), %rsi
	salq	$2, %rbx
	movl	$2, %ecx
	movq	%r13, %rdi
	movabsq	$4294967552, %r15
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	xorl	%ebp, %ebp
	call	cudaMalloc@PLT
	movl	%r12d, %edi
	call	_Z6getlg2i
	movl	%eax, %r14d
.L54:
	cmpl	%r14d, %ebp
	jge	.L57
	movl	%r12d, 32(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%r15, 44(%rsp)
	movq	%rax, 36(%rsp)
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	%ebp, %edx
	call	_Z39__device_stub__Z16short_int_globalPiS_iPiS_i
.L55:
	leal	-1(%r14), %eax
	movq	24(%rsp), %rsi
	cmpl	%ebp, %eax
	jne	.L56
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	jmp	.L57
.L56:
	movq	8(%rsp), %rax
	incl	%ebp
	movq	%rsi, 8(%rsp)
	movq	%rax, 24(%rsp)
	jmp	.L54
.L57:
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L59
	call	__stack_chk_fail@PLT
.L59:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z8sort_intPii, .-_Z8sort_intPii
	.section	.rodata.str1.1
.LC3:
	.string	"time = %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	$134217728, %edi
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	call	_Z8genarrayi
	leaq	8(%rsp), %rdi
	movq	%rax, %rbx
	call	cudaEventCreate@PLT
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$134217728, %esi
	movq	%rbx, %rdi
	call	_Z8sort_intPii
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	call	getchar@PLT
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L62
	call	__stack_chk_fail@PLT
.L62:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z16short_int_globalPiS_i"
.LC5:
	.string	"_Z15sort_int_sharedPiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2064:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16short_int_globalPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15sort_int_sharedPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2064:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "hip/hip_runtime.h"




#include <stdio.h>


#define blocksize 256

int getblock(int length) {
	int block = length / blocksize;
	if ((length%blocksize) > 0)block++;
	return block;
}


int getlg2(int length);

void check(int *a, int length) {
	printf("//////////////////////////////////////////////\n");
	int t = 0;
	for (int i = 0; i < length; i++) {
		
		if (i < (length - 1)) {
			if (a[i] > a[i + 1])
				printf("a[%d] = %d , a[%d] = %d\n", i, a[i], i + 1, a[i + 1]);
				
		}
		else printf("succeed\n");
	}
}

__device__ __host__ int insert0(int a, int *array,unsigned int star,unsigned int end) {
	int p = 0;
	while ((end - star) > 1) {
		p = (star + end) / 2;
		if (a > array[p])star = p;
		else end = p;
	}
	p = (end + star)/2;
	if (a > array[p])star = p;
	else end = p;
	if (a > array[end])end++;
	return end;
}

__device__ __host__ int insert1(int a, int *array, unsigned int star, unsigned int end) {
	int p = 0;
	while ((end - star) > 1) {
		p = (star + end) / 2;
		if (a >= array[p])star = p;
		else end = p;
	}
	p = (end + star) / 2;
	if (a >= array[p])star = p;
	else end = p;
	if (a >= array[end])end++;
	return end;
}

__global__ void sort_int_shared(int *a_map, int *a_dev, int length) {
	int tid = blockIdx.x * blockDim.x + threadIdx.x;
	__shared__ int a_s[blocksize];

	//Ȼȡֵ빲ڴ
	if(tid<length)a_s[threadIdx.x] = a_map[tid];
	else a_s[threadIdx.x] = INT_MAX;
	int r = 0;
	
	__syncthreads();

	//ֳ߳̿,ֱִвͬ
	bool flag = (threadIdx.x < (blocksize / 2));
	tid = tid % (blocksize / 2);

	//ֻԪص
	if (flag) r = a_s[tid * 2];
	else r = a_s[tid * 2 + 1];
	__syncthreads();

	if (flag) {
		if(r > a_s[tid * 2 + 1])a_s[tid*2+1] = r;
	}
	else {
		if (r < a_s[tid * 2])a_s[tid * 2] = r;
	}
	__syncthreads();//洢ͬ

	for (int i = 2; i < blocksize; i *= 2) {
		int pair_star = (tid / i)*i*2;

		int offset = tid%i;
		r = a_s[pair_star + offset + ((!flag)*i)];

		int p;
		if (flag) {
			p = insert0(r, a_s, pair_star + i, pair_star + (2 * i) - 1);
			p = p - i;
		}
		else
		{
			p = insert1(r, a_s, pair_star, pair_star + i - 1);
		}

		__syncthreads();

		p += offset;
		a_s[p] = r;

		__syncthreads();

	}
	
	a_dev[blockIdx.x * blockDim.x + threadIdx.x] = a_s[threadIdx.x];
}

__global__ void short_int_global(int *a_dev, int *a_next, int i) {
	int tid = blockIdx.x * blockDim.x + threadIdx.x;
	int r = a_dev[tid];
	int p = tid;

	bool flag = ((blockIdx.x >> i)&1);
	flag = !flag;
	int pair_length = 2 << i;
	int pair_tid = blockIdx.x / pair_length;
	if (flag) 
	{
		if ((blockIdx.x >> (i + 1)) == (gridDim.x >> (i + 1))) {
			int size = gridDim.x % (2 << i);
			size -= (pair_length / 2);
			if (size > 0) {
				int star = pair_tid*pair_length + (pair_length / 2);
				int end = star + size;
				star *= blocksize;
				end *= blocksize;
				end--;
				p = insert0(r, a_dev, star, end);
				p = p - blocksize*(pair_length / 2);
				p += tid - (pair_tid*pair_length*blocksize);
			}
			a_next[p] = r;
		}
		else
		{
			int star = pair_tid*pair_length + (pair_length / 2);
			int end = star + (pair_length/2);
			star *= blocksize;
			end *= blocksize;
			end--;
			p = insert0(r, a_dev, star, end);
			p = p - blocksize*(pair_length / 2);
			p += tid - (pair_tid*pair_length*blocksize);
			a_next[p] = r;
		}
	}
	else
	{
		int star = pair_tid*pair_length;
		int end = star + (pair_length / 2);
		star *= blocksize;
		end *= blocksize;
		end--;
		p = insert1(r, a_dev, star, end);
		p += tid - ((pair_tid*pair_length + (pair_length / 2))*blocksize);
		a_next[p] = r;
	}
}

void sort_int(int *a,int length) {;
	int *a_dev;
	int *a_map;
	hipMalloc((void**)&a_dev, getblock(length) * blocksize * sizeof(int));
	hipHostGetDevicePointer((void **)&a_map, (void *)a, 0);
	sort_int_shared<<<getblock(length),blocksize>>>(a_map, a_dev, length);
	
	hipMemcpy(a, a_dev, length * sizeof(int), hipMemcpyDeviceToHost);
	int *a_next;
	hipMalloc((void**)&a_next, getblock(length) * blocksize * sizeof(int));

	int times = getlg2(getblock(length));

	for (int i = 0; i < times; i++) {
		short_int_global <<<getblock(length), blocksize >>>(a_dev, a_next, i);
		//cudaMemcpy(a, a_next, length * sizeof(int), cudaMemcpyDeviceToHost);
		//check(a, length);

		if (i == (times - 1)) {
			hipMemcpy(a, a_next, length * sizeof(int), hipMemcpyDeviceToHost);
			break;
		}
		int *c;
		c = a_dev;
		a_dev = a_next;
		a_next = c;
	}

	hipFree(a_next);
	//cudaFree(a_dev);
	//cudaMemcpy(a,a_next,length*sizeof(int), cudaMemcpyDeviceToHost);
	hipFree(a_next);
	//check(a, length);
}





int getlg2(int length) {
	int a = 0, b = 0;
	for (int i = 0; i < 32; i++) {
		if (((length >>i )&1) == 1) {
			//printf("i = %d\n", i);
			a = i;
			b++;
		}
	}
	if (b > 1)a++;
	return a;
}

int* genarray(int length) {
	int *a;
	hipHostAlloc((void**)&a, length*sizeof(int), hipHostMallocMapped);
	for (int i = 0; i < length; i++) {
		a[i] =  length - i;
	};

	return a;
}



int main() {
	int length = 134217728;
	int *a = genarray(length);
	/*for (int i = 0; i < length; i++) {
		printf("a[%d] = %d\n", i, a[i]);
	}*/

	hipEvent_t start, stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);
	// record start event on the default stream
	hipEventRecord(start);

	sort_int(a,length);

	hipEventRecord(stop);
	// wait until the stop event completes
	hipEventSynchronize(stop);
	// calculate the elapsed time between two events
	float time;
	hipEventElapsedTime(&time, start, stop);

	printf("time = %f\n",time);

	getchar();
}
	.text
	.file	"kernel.hip"
	.globl	_Z8getblocki                    # -- Begin function _Z8getblocki
	.type	_Z8getblocki,@function
_Z8getblocki:                           # @_Z8getblocki
	.cfi_startproc
# %bb.0:
                                        # kill: def $edi killed $edi def $rdi
	leal	255(%rdi), %ecx
	testl	%edi, %edi
	cmovnsl	%edi, %ecx
	sarl	$8, %ecx
	xorl	%eax, %eax
	testl	$-2147483393, %edi              # imm = 0x800000FF
	setg	%al
	addl	%ecx, %eax
	retq
.Lfunc_end0:
	.size	_Z8getblocki, .Lfunc_end0-_Z8getblocki
	.cfi_endproc
                                        # -- End function
	.globl	_Z5checkPii                     # -- Begin function _Z5checkPii
	.type	_Z5checkPii,@function
_Z5checkPii:                            # @_Z5checkPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movl	$.Lstr, %edi
	callq	puts@PLT
	testl	%r14d, %r14d
	jle	.LBB1_7
# %bb.1:                                # %.lr.ph
	leal	-1(%r14), %r15d
	movl	%r14d, %r12d
	xorl	%r14d, %r14d
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	cmpq	%r15, %r14
	jge	.LBB1_5
# %bb.3:                                #   in Loop: Header=BB1_2 Depth=1
	movl	(%rbx,%r14,4), %edx
	movl	4(%rbx,%r14,4), %r8d
	leaq	1(%r14), %r13
	cmpl	%r8d, %edx
	jle	.LBB1_6
# %bb.4:                                #   in Loop: Header=BB1_2 Depth=1
	leal	1(%r14), %ecx
	movl	$.L.str.1, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB1_6
.LBB1_5:                                #   in Loop: Header=BB1_2 Depth=1
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	incq	%r14
	movq	%r14, %r13
.LBB1_6:                                #   in Loop: Header=BB1_2 Depth=1
	movq	%r13, %r14
	cmpq	%r12, %r13
	jne	.LBB1_2
.LBB1_7:                                # %._crit_edge
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z5checkPii, .Lfunc_end1-_Z5checkPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z7insert0iPijj                 # -- Begin function _Z7insert0iPijj
	.type	_Z7insert0iPijj,@function
_Z7insert0iPijj:                        # @_Z7insert0iPijj
	.cfi_startproc
# %bb.0:
                                        # kill: def $ecx killed $ecx def $rcx
                                        # kill: def $edx killed $edx def $rdx
	movl	%ecx, %eax
	subl	%edx, %eax
	cmpl	$2, %eax
	jb	.LBB2_1
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leal	(%rcx,%rdx), %eax
	shrl	%eax
	cmpl	%edi, (%rsi,%rax,4)
	jge	.LBB2_4
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=1
	movl	%eax, %edx
	movl	%ecx, %eax
.LBB2_4:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%eax, %r8d
	subl	%edx, %r8d
	movl	%eax, %ecx
	cmpl	$1, %r8d
	ja	.LBB2_2
	jmp	.LBB2_5
.LBB2_1:
	movl	%ecx, %eax
.LBB2_5:                                # %._crit_edge
	addl	%eax, %edx
	shrl	%edx
	cmpl	%edi, (%rsi,%rdx,4)
	cmovll	%eax, %edx
	xorl	%eax, %eax
	cmpl	%edi, (%rsi,%rdx,4)
	setl	%al
	addl	%edx, %eax
	retq
.Lfunc_end2:
	.size	_Z7insert0iPijj, .Lfunc_end2-_Z7insert0iPijj
	.cfi_endproc
                                        # -- End function
	.globl	_Z7insert1iPijj                 # -- Begin function _Z7insert1iPijj
	.type	_Z7insert1iPijj,@function
_Z7insert1iPijj:                        # @_Z7insert1iPijj
	.cfi_startproc
# %bb.0:
                                        # kill: def $ecx killed $ecx def $rcx
                                        # kill: def $edx killed $edx def $rdx
	movl	%ecx, %eax
	subl	%edx, %eax
	cmpl	$2, %eax
	jb	.LBB3_5
.LBB3_1:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leal	(%rcx,%rdx), %eax
	shrl	%eax
	cmpl	%edi, (%rsi,%rax,4)
	jg	.LBB3_2
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB3_1 Depth=1
	movl	%eax, %edx
	jmp	.LBB3_4
.LBB3_2:                                #   in Loop: Header=BB3_1 Depth=1
	movl	%eax, %ecx
.LBB3_4:                                # %.lr.ph
                                        #   in Loop: Header=BB3_1 Depth=1
	movl	%ecx, %eax
	subl	%edx, %eax
	cmpl	$1, %eax
	ja	.LBB3_1
.LBB3_5:                                # %._crit_edge
	addl	%ecx, %edx
	shrl	%edx
	cmpl	%edi, (%rsi,%rdx,4)
	cmovlel	%ecx, %edx
	xorl	%eax, %eax
	cmpl	%edi, (%rsi,%rdx,4)
	setle	%al
	addl	%edx, %eax
	retq
.Lfunc_end3:
	.size	_Z7insert1iPijj, .Lfunc_end3-_Z7insert1iPijj
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__sort_int_sharedPiS_i # -- Begin function _Z30__device_stub__sort_int_sharedPiS_i
	.type	_Z30__device_stub__sort_int_sharedPiS_i,@function
_Z30__device_stub__sort_int_sharedPiS_i: # @_Z30__device_stub__sort_int_sharedPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15sort_int_sharedPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z30__device_stub__sort_int_sharedPiS_i, .Lfunc_end4-_Z30__device_stub__sort_int_sharedPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__short_int_globalPiS_i # -- Begin function _Z31__device_stub__short_int_globalPiS_i
	.type	_Z31__device_stub__short_int_globalPiS_i,@function
_Z31__device_stub__short_int_globalPiS_i: # @_Z31__device_stub__short_int_globalPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16short_int_globalPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z31__device_stub__short_int_globalPiS_i, .Lfunc_end5-_Z31__device_stub__short_int_globalPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z8sort_intPii                  # -- Begin function _Z8sort_intPii
	.type	_Z8sort_intPii,@function
_Z8sort_intPii:                         # @_Z8sort_intPii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %r12d
	movq	%rdi, %r15
	movabsq	$4294967552, %r14               # imm = 0x100000100
	leal	255(%r12), %eax
	testl	%esi, %esi
	cmovnsl	%esi, %eax
	sarl	$8, %eax
	xorl	%ebp, %ebp
	testl	$-2147483393, %esi              # imm = 0x800000FF
	setg	%bpl
	addl	%eax, %ebp
	movl	%ebp, %eax
	shll	$8, %eax
	movslq	%eax, %rbx
	shlq	$2, %rbx
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	xorl	%r13d, %r13d
	movq	%r15, 24(%rsp)                  # 8-byte Spill
	movq	%r15, %rsi
	xorl	%edx, %edx
	callq	hipHostGetDevicePointer
	leaq	(%r14,%rbp), %r15
	addq	$-256, %r15
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_2
# %bb.1:
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	%r12d, %edx
	callq	_Z30__device_stub__sort_int_sharedPiS_i
.LBB6_2:
	movq	16(%rsp), %rsi
	movslq	%r12d, %r12
	shlq	$2, %r12
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.LBB6_3:                                # =>This Inner Loop Header: Depth=1
	btl	%r13d, %ebp
	cmovbl	%r13d, %ebx
	adcl	$0, %eax
	incl	%r13d
	cmpl	$32, %r13d
	jne	.LBB6_3
# %bb.4:                                # %_Z6getlg2i.exit
	xorl	%ecx, %ecx
	cmpl	$2, %eax
	setae	%cl
	addl	%ecx, %ebx
	jle	.LBB6_10
# %bb.5:                                # %.lr.ph
	decl	%ebx
	xorl	%r13d, %r13d
	movq	24(%rsp), %rbp                  # 8-byte Reload
.LBB6_6:                                # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_8
# %bb.7:                                #   in Loop: Header=BB6_6 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	%r13d, %edx
	callq	_Z31__device_stub__short_int_globalPiS_i
.LBB6_8:                                #   in Loop: Header=BB6_6 Depth=1
	cmpl	%r13d, %ebx
	je	.LBB6_9
# %bb.11:                               #   in Loop: Header=BB6_6 Depth=1
	movq	16(%rsp), %rax
	movq	8(%rsp), %rcx
	movq	%rcx, 16(%rsp)
	movq	%rax, 8(%rsp)
	incl	%r13d
	jmp	.LBB6_6
.LBB6_9:
	movq	8(%rsp), %rsi
	movq	%rbp, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.LBB6_10:                               # %.loopexit
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z8sort_intPii, .Lfunc_end6-_Z8sort_intPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z6getlg2i                      # -- Begin function _Z6getlg2i
	.type	_Z6getlg2i,@function
_Z6getlg2i:                             # @_Z6getlg2i
	.cfi_startproc
# %bb.0:
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	xorl	%eax, %eax
.LBB7_1:                                # =>This Inner Loop Header: Depth=1
	btl	%ecx, %edi
	cmovbl	%ecx, %eax
	adcl	$0, %edx
	incl	%ecx
	cmpl	$32, %ecx
	jne	.LBB7_1
# %bb.2:
	cmpl	$2, %edx
	sbbl	$-1, %eax
	retq
.Lfunc_end7:
	.size	_Z6getlg2i, .Lfunc_end7-_Z6getlg2i
	.cfi_endproc
                                        # -- End function
	.globl	_Z8genarrayi                    # -- Begin function _Z8genarrayi
	.type	_Z8genarrayi,@function
_Z8genarrayi:                           # @_Z8genarrayi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%edi, %ebx
	movslq	%edi, %r15
	leaq	(,%r15,4), %rsi
	leaq	8(%rsp), %r14
	movq	%r14, %rdi
	movl	$2, %edx
	callq	hipHostAlloc
	movq	(%r14), %rax
	testl	%r15d, %r15d
	jle	.LBB8_3
# %bb.1:                                # %.lr.ph
	movl	%ebx, %ecx
	movq	%rax, %rdx
.LBB8_2:                                # =>This Inner Loop Header: Depth=1
	movl	%ecx, (%rdx)
	addq	$4, %rdx
	decq	%rcx
	jne	.LBB8_2
.LBB8_3:                                # %._crit_edge
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z8genarrayi, .Lfunc_end8-_Z8genarrayi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	8(%rsp), %rbx
	movl	$536870912, %esi                # imm = 0x20000000
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	hipHostAlloc
	movl	$134217728, %eax                # imm = 0x8000000
	movq	(%rbx), %rbx
	movq	%rbx, %rcx
.LBB9_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, (%rcx)
	addq	$4, %rcx
	decq	%rax
	jne	.LBB9_1
# %bb.2:                                # %_Z8genarrayi.exit
	leaq	8(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%rbx, %rdi
	movl	$134217728, %esi                # imm = 0x8000000
	callq	_Z8sort_intPii
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r15), %rdi
	callq	hipEventSynchronize
	movq	(%r14), %rsi
	movq	(%r15), %rdx
	leaq	20(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	callq	getchar
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	main, .Lfunc_end9-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB10_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB10_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15sort_int_sharedPiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16short_int_globalPiS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end10:
	.size	__hip_module_ctor, .Lfunc_end10-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB11_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB11_2:
	retq
.Lfunc_end11:
	.size	__hip_module_dtor, .Lfunc_end11-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"a[%d] = %d , a[%d] = %d\n"
	.size	.L.str.1, 25

	.type	_Z15sort_int_sharedPiS_i,@object # @_Z15sort_int_sharedPiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z15sort_int_sharedPiS_i
	.p2align	3, 0x0
_Z15sort_int_sharedPiS_i:
	.quad	_Z30__device_stub__sort_int_sharedPiS_i
	.size	_Z15sort_int_sharedPiS_i, 8

	.type	_Z16short_int_globalPiS_i,@object # @_Z16short_int_globalPiS_i
	.globl	_Z16short_int_globalPiS_i
	.p2align	3, 0x0
_Z16short_int_globalPiS_i:
	.quad	_Z31__device_stub__short_int_globalPiS_i
	.size	_Z16short_int_globalPiS_i, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"time = %f\n"
	.size	.L.str.3, 11

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15sort_int_sharedPiS_i"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16short_int_globalPiS_i"
	.size	.L__unnamed_2, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"//////////////////////////////////////////////"
	.size	.Lstr, 47

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"succeed"
	.size	.Lstr.1, 8

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__sort_int_sharedPiS_i
	.addrsig_sym _Z31__device_stub__short_int_globalPiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15sort_int_sharedPiS_i
	.addrsig_sym _Z16short_int_globalPiS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15sort_int_sharedPiS_i ; -- Begin function _Z15sort_int_sharedPiS_i
	.globl	_Z15sort_int_sharedPiS_i
	.p2align	8
	.type	_Z15sort_int_sharedPiS_i,@function
_Z15sort_int_sharedPiS_i:               ; @_Z15sort_int_sharedPiS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s4, s[0:1], 0x24
	s_load_b32 s5, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	v_bfrev_b32_e32 v4, -2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_mov_b32 s4, exec_lo
	v_ashrrev_i32_e32 v2, 31, v1
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v4, v[3:4], off
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v2, 25, v2
	v_cmp_lt_u32_e32 vcc_lo, 0x7f, v0
	v_cmp_gt_u32_e64 s0, 0x80, v0
	s_mov_b32 s4, 0
	v_add_nc_u32_e32 v2, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, 0xffffff80, v2
	v_sub_nc_u32_e32 v2, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v5, 1, v2
	v_or_b32_e32 v3, 1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v6, v5, v3 :: v_dual_lshlrev_b32 v3, 2, v0
	v_lshlrev_b32_e32 v0, 2, v5
	v_lshlrev_b32_e32 v6, 2, v6
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v4, v6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, exec_lo, s1
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_lshlrev_b32_e32 v0, 2, v5
	ds_load_b32 v5, v0 offset:4
	v_add_nc_u32_e32 v0, 4, v0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e64 s1, v4, v5
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s4, s1, exec_lo
.LBB0_4:                                ; %Flow69
	s_and_not1_saveexec_b32 s5, s5
	s_cbranch_execz .LBB0_6
; %bb.5:
	ds_load_b32 v5, v0
	s_and_not1_b32 s4, s4, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e64 s1, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s4, s4, s1
.LBB0_6:                                ; %Flow70
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s1, s4
	s_cbranch_execz .LBB0_8
; %bb.7:                                ; %.sink.split
	ds_store_b32 v0, v4
.LBB0_8:
	s_or_b32 exec_lo, exec_lo, s1
	v_ashrrev_i32_e32 v0, 31, v2
	s_mov_b32 s4, 2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v4, v2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v0
.LBB0_9:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_12 Depth 2
                                        ;     Child Loop BB0_18 Depth 2
	s_ashr_i32 s1, s4, 31
                                        ; implicit-def: $vgpr8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s5, s4, s1
	s_xor_b32 s5, s5, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v5, s5
	s_sub_i32 s1, 0, s5
	v_rcp_iflag_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v5, 0x4f7ffffe, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v5, v5
	v_mul_lo_u32 v6, s1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v6, v5, v6
	v_add_nc_u32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v4, v5
	v_mul_lo_u32 v5, v5, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v4, v5
	v_subrev_nc_u32_e32 v6, s5, v5
	v_cmp_le_u32_e64 s1, s5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v6, s1
	v_subrev_nc_u32_e32 v6, s5, v5
	v_cmp_le_u32_e64 s1, s5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v6, s1
	v_cndmask_b32_e64 v6, 0, s4, vcc_lo
	v_xor_b32_e32 v5, v5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v5, v0
	v_sub_nc_u32_e32 v9, v2, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, v5, v6
	v_lshlrev_b32_e32 v7, 1, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_lshl_u32 v6, v6, v7, 2
	ds_load_b32 v6, v6
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s5, exec_lo, s1
	s_cbranch_execz .LBB0_15
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=1
	v_add_nc_u32_e32 v9, s4, v9
	v_add_nc_u32_e32 v8, s4, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v7, v9, 1, -1
	v_sub_nc_u32_e32 v9, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s1, 1, v9
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_14
; %bb.11:                               ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB0_9 Depth=1
	s_mov_b32 s7, 0
.LBB0_12:                               ; %.lr.ph.i
                                        ;   Parent Loop BB0_9 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v9, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v9, 1, v9
	v_lshlrev_b32_e32 v10, 2, v9
	ds_load_b32 v10, v10
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e64 s1, v10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, v8, v9, s1
	v_cndmask_b32_e64 v7, v9, v7, s1
	v_sub_nc_u32_e32 v9, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, 2, v9
	s_or_b32 s7, s1, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_12
; %bb.13:                               ; %Flow
                                        ;   in Loop: Header=BB0_9 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_14:                               ; %Flow63
                                        ;   in Loop: Header=BB0_9 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_add_nc_u32_e32 v8, v7, v8
	v_lshrrev_b32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v9, 2, v8
	ds_load_b32 v9, v9
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e64 s1, v9, v6
	v_cndmask_b32_e64 v7, v8, v7, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v8, 2, v7
	v_subrev_nc_u32_e32 v7, s4, v7
	ds_load_b32 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e64 s1, v8, v6
	v_add_co_ci_u32_e64 v8, s1, 0, v7, s1
                                        ; implicit-def: $vgpr7
.LBB0_15:                               ; %Flow66
                                        ;   in Loop: Header=BB0_9 Depth=1
	s_and_not1_saveexec_b32 s5, s5
	s_cbranch_execz .LBB0_21
; %bb.16:                               ;   in Loop: Header=BB0_9 Depth=1
	s_add_i32 s1, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v8, s1, v7
	s_cmp_eq_u32 s1, 1
	s_cbranch_scc1 .LBB0_20
; %bb.17:                               ; %.lr.ph.i52.preheader
                                        ;   in Loop: Header=BB0_9 Depth=1
	s_mov_b32 s6, 0
.LBB0_18:                               ; %.lr.ph.i52
                                        ;   Parent Loop BB0_9 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v9, v7, v8
	v_lshrrev_b32_e32 v9, 1, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v10, 2, v9
	ds_load_b32 v10, v10
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e64 s1, v10, v6
	v_cndmask_b32_e64 v7, v9, v7, s1
	v_cndmask_b32_e64 v8, v8, v9, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v9, v8, v7
	v_cmp_gt_u32_e64 s1, 2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s6, s1, s6
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_18
; %bb.19:                               ; %Flow64
                                        ;   in Loop: Header=BB0_9 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_20:                               ; %_Z7insert1iPijj.exit
                                        ;   in Loop: Header=BB0_9 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v7, v8, v7
	v_lshrrev_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v9, 2, v7
	ds_load_b32 v9, v9
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e64 s1, v9, v6
	v_cndmask_b32_e64 v7, v8, v7, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v8, 2, v7
	ds_load_b32 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cmp_le_i32_e64 s1, v8, v6
	v_add_co_ci_u32_e64 v8, s1, 0, v7, s1
.LBB0_21:                               ; %Flow67
                                        ;   in Loop: Header=BB0_9 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_lshl_u32 v5, v8, v5, 2
	s_lshl_b32 s1, s4, 1
	s_cmpk_gt_u32 s4, 0x7f
	s_mov_b32 s4, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v5, v6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_9
; %bb.22:
	ds_load_b32 v3, v3
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15sort_int_sharedPiS_i
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15sort_int_sharedPiS_i, .Lfunc_end0-_Z15sort_int_sharedPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1204
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16short_int_globalPiS_i ; -- Begin function _Z16short_int_globalPiS_i
	.globl	_Z16short_int_globalPiS_i
	.p2align	8
	.type	_Z16short_int_globalPiS_i,@function
_Z16short_int_globalPiS_i:              ; @_Z16short_int_globalPiS_i
; %bb.0:
	s_load_b32 s4, s[0:1], 0x24
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_load_b32 s0, s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_lshr_b32 s1, s15, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_bitcmp1_b32 s1, 0
	global_load_b32 v0, v[3:4], off
	s_cselect_b32 s8, -1, 0
	s_add_i32 s9, s0, 1
	s_lshl_b32 s1, 2, s0
	s_and_b32 vcc_lo, exec_lo, s8
	s_lshr_b32 s8, s15, s9
	s_cbranch_vccz .LBB1_4
; %bb.1:
	s_mul_i32 s11, s8, s1
	s_lshr_b32 s10, s1, 1
	v_mov_b32_e32 v4, 0
	s_add_i32 s10, s11, s10
	s_lshl_b32 s11, s11, 8
	s_lshl_b32 s10, s10, 8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s12, s10, -1
	v_dual_mov_b32 v6, s11 :: v_dual_mov_b32 v5, s12
	s_mov_b32 s11, 0
.LBB1_2:                                ; %.lr.ph.i91
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v6, v5
	v_lshrrev_b32_e32 v3, 1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v7, v0
	v_dual_cndmask_b32 v6, v3, v6 :: v_dual_cndmask_b32 v5, v5, v3
	v_sub_nc_u32_e32 v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, 2, v3
	s_or_b32 s11, vcc_lo, s11
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB1_2
; %bb.3:                                ; %_Z7insert1iPijj.exit
	s_or_b32 exec_lo, exec_lo, s11
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 1, v3
	v_lshlrev_b64 v[6:7], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v6, v0
	v_cndmask_b32_e32 v3, v5, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	v_subrev_nc_u32_e32 v5, s10, v1
	s_mov_b32 s10, 0
	s_waitcnt vmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, v5, v3, vcc_lo
	v_ashrrev_i32_e32 v4, 31, v3
	s_branch .LBB1_5
.LBB1_4:
	s_mov_b32 s10, -1
                                        ; implicit-def: $vgpr3_vgpr4
.LBB1_5:                                ; %Flow106
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccz .LBB1_17
; %bb.6:
	s_load_b32 s2, s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s8, s3
	s_cbranch_scc0 .LBB1_10
; %bb.7:
	s_mul_i32 s3, s8, s1
	s_ashr_i32 s9, s1, 1
	v_mov_b32_e32 v4, 0
	s_add_i32 s10, s3, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_i32 s9, s10, s9
	s_lshl_b32 s10, s10, 8
	s_lshl_b32 s9, s9, 8
	s_add_i32 s9, s9, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v5, s9
	s_mov_b32 s9, 0
.LBB1_8:                                ; %.lr.ph.i82
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v6, v5
	v_lshrrev_b32_e32 v3, 1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v7, v0
	v_dual_cndmask_b32 v6, v6, v3 :: v_dual_cndmask_b32 v5, v3, v5
	v_sub_nc_u32_e32 v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, 2, v3
	s_or_b32 s9, vcc_lo, s9
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB1_8
; %bb.9:                                ; %_Z7insert0iPijj.exit87
	s_or_b32 exec_lo, exec_lo, s9
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v5, v6
	s_lshl_b32 s9, 0xffffff00, s0
	s_lshl_b32 s3, s3, 8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_sub_i32 s3, s9, s3
	v_lshrrev_b32_e32 v3, 1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[3:4]
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v6, v0
	v_cndmask_b32_e32 v3, v3, v5, vcc_lo
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	v_add_nc_u32_e32 v5, s3, v1
	s_mov_b32 s3, 0
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, v5, v3, vcc_lo
	v_ashrrev_i32_e32 v4, 31, v3
	s_branch .LBB1_11
.LBB1_10:
	s_mov_b32 s3, -1
                                        ; implicit-def: $vgpr3_vgpr4
.LBB1_11:                               ; %Flow104
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB1_17
; %bb.12:
	s_add_i32 s3, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_ashr_i32 s3, s1, 1
	s_cmp_le_i32 s2, s3
	s_cbranch_scc1 .LBB1_16
; %bb.13:
	s_mul_i32 s1, s8, s1
	v_mov_b32_e32 v3, 0
	s_add_i32 s2, s2, s1
	s_add_i32 s3, s1, s3
	s_lshl_b32 s2, s2, 8
	s_lshl_b32 s3, s3, 8
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v4, s2
	s_mov_b32 s2, 0
.LBB1_14:                               ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v5, v4
	v_lshrrev_b32_e32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v6, v0
	v_dual_cndmask_b32 v5, v5, v2 :: v_dual_cndmask_b32 v4, v2, v4
	v_sub_nc_u32_e32 v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, 2, v2
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB1_14
; %bb.15:                               ; %_Z7insert0iPijj.exit
	s_or_b32 exec_lo, exec_lo, s2
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v2, v4, v5
	s_lshl_b32 s0, 0xffffff00, s0
	s_lshl_b32 s1, s1, 8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_sub_i32 s0, s0, s1
	v_lshrrev_b32_e32 v2, 1, v2
	v_add_nc_u32_e32 v1, s0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[2:3]
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v5, v0
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v3, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
.LBB1_16:                               ; %Flow
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v3, v1
.LBB1_17:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16short_int_globalPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16short_int_globalPiS_i, .Lfunc_end1-_Z16short_int_globalPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1104
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15sort_int_sharedPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15sort_int_sharedPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16short_int_globalPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16short_int_globalPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
