//#include<iostream>
#include<stdio.h>
#include<stdlib.h>
#include <cuda.h>
//#include <math.h>

#define BLOCK_SIZE 512

int checkResults(float*res, float* cudaRes,int length)
{
	int nDiffs=0;
	const float smallVal = 0.01f; // Keeping this extra high as we have repetitive addition and sequence matters
	for(int i=0; i<length; i++)
		if(fabs(cudaRes[i]-res[i])>smallVal)
            nDiffs++;
        //if(1)
            //printf("%d :: %f  %f\n", i, cudaRes[i], res[i]);
	return nDiffs;
}

void initializeArray(FILE* fp,float* arr, int nElements)
{
	for( int i=0; i<nElements; i++){
		int r=fscanf(fp,"%f",&arr[i]);
		if(r == EOF){
			rewind(fp);
		}
		arr[i]-=5; // This is to make the data zero mean. Otherwise we reach large numbers and lose precision
	}
}

void inclusiveScan_SEQ(float *in, float *out,int length) {
	float sum=0.f;
	for (int i =0; i < length; i++) {
		sum+=in[i];
		out[i]=sum;
	}
}


__global__ void fixup(float *input, float *aux, int len) {
    unsigned int t = threadIdx.x, start = 2 * blockIdx.x * BLOCK_SIZE;
    if (blockIdx.x) {
        if (start + t < len)
            input[start + t] += aux[blockIdx.x - 1];
        if (start + BLOCK_SIZE + t < len)
            input[start + BLOCK_SIZE + t] += aux[blockIdx.x - 1];
    }
}

__global__ void test(float * input, float * output, float *aux, int len) {
        // Load a segment of the input vector into shared memory
        __shared__ float scan_array[BLOCK_SIZE << 1];
            unsigned int t = threadIdx.x, start = 2 * blockIdx.x * BLOCK_SIZE;
                if (start + t < len)
                           scan_array[t] = input[start + t];
                    else
                               scan_array[t] = 0;
                        if (start + BLOCK_SIZE + t < len)
                                   scan_array[BLOCK_SIZE + t] = input[start + BLOCK_SIZE + t];
                            else
                                       scan_array[BLOCK_SIZE + t] = 0;
                                __syncthreads();

                                    // Reduction
                                    int stride;
                                        for (stride = 1; stride <= BLOCK_SIZE; stride <<= 1) {
                                                   int index = (t + 1) * stride * 2 - 1;
                                                          if (index < 2 * BLOCK_SIZE)
                                                                        scan_array[index] += scan_array[index - stride];
                                                                 __syncthreads();
                                                                     }

                                            // Post reduction
                                            for (stride = BLOCK_SIZE >> 1; stride; stride >>= 1) {
                                                       int index = (t + 1) * stride * 2 - 1;
                                                              if (index + stride < 2 * BLOCK_SIZE)
                                                                            scan_array[index + stride] += scan_array[index];
                                                                     __syncthreads();
                                                                         }

                                                if (start + t < len)
                                                           output[start + t] = scan_array[t];
                                                    if (start + BLOCK_SIZE + t < len)
                                                               output[start + BLOCK_SIZE + t] = scan_array[BLOCK_SIZE + t];

                                                        if (aux && t == 0)
                                                                   aux[blockIdx.x] = scan_array[2 * BLOCK_SIZE - 1];
}

int main(int argc, char* argv[]) {
	if(argc!=2){
		printf("Usage %s N\n",argv[0]);
		return 1;
	}
	int N=atoi(argv[1]);
	FILE *fp = fopen("problem1.inp","r");
	int size = N * sizeof(float); 
	//allocate resources
	float *in      = (float *)malloc(size);
	float *out     = (float *)malloc(size); 
	float *cuda_out= (float *)malloc(size);
	float *d_in, *d_out, * tmp;
    float * deviceAuxScannedArray;
    cudaMalloc(&d_in, size);
    cudaMalloc(&d_out, size);
    cudaMalloc(&tmp, (BLOCK_SIZE << 1) * sizeof(float));
    cudaMalloc(&deviceAuxScannedArray, (BLOCK_SIZE << 1) * sizeof(float));
    float time = 0.f;
	initializeArray(fp,in, N);
	// Your code here
    cudaEvent_t start, end;
    cudaEventCreate(&start);
    cudaEventCreate(&end);
    cudaEventRecord(start, 0);
    
    cudaMemcpy(d_in, in, size, cudaMemcpyHostToDevice);
    int block_num = N / BLOCK_SIZE;
    if(block_num == 0) block_num++;
    test<<<block_num, BLOCK_SIZE>>>(d_in, d_out, tmp, N);
    cudaDeviceSynchronize();
    test<<<dim3(1,1,1), BLOCK_SIZE>>>(tmp, deviceAuxScannedArray, NULL, BLOCK_SIZE << 1);
    cudaDeviceSynchronize();
    fixup<<<N/BLOCK_SIZE, BLOCK_SIZE>>>(d_out, deviceAuxScannedArray, N);
    cudaDeviceSynchronize();
    cudaMemcpy(cuda_out, d_out, size, cudaMemcpyDeviceToHost);
	cudaEventRecord(end, 0);
    cudaEventSynchronize(end);
    cudaEventElapsedTime(&time, start, end);
    inclusiveScan_SEQ(in, out,N);
	int nDiffs = checkResults(out, cuda_out,N);

	//if(nDiffs)printf("Test Failed\n"); // This should never print
	printf("%d\n%f\n%f\n",N,cuda_out[N-1],time);



	//free resources 
	free(in); free(out); free(cuda_out);
	return 0;
}
	.file	"tmpxft_0020d333_00000000-6_problem3.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12checkResultsPfS_i
	.type	_Z12checkResultsPfS_i, @function
_Z12checkResultsPfS_i:
.LFB2027:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorl	%ecx, %ecx
	movss	.LC0(%rip), %xmm1
.L3:
	cmpl	%eax, %edx
	jle	.L9
	movss	(%rsi,%rax,4), %xmm0
	subss	(%rdi,%rax,4), %xmm0
	andps	%xmm1, %xmm0
	comiss	.LC1(%rip), %xmm0
	jbe	.L4
	incl	%ecx
.L4:
	incq	%rax
	jmp	.L3
.L9:
	movl	%ecx, %eax
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z12checkResultsPfS_i, .-_Z12checkResultsPfS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"%f"
	.text
	.globl	_Z15initializeArrayP8_IO_FILEPfi
	.type	_Z15initializeArrayP8_IO_FILEPfi, @function
_Z15initializeArrayP8_IO_FILEPfi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC2(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rsi, %rbx
.L11:
	cmpl	%r12d, %r13d
	jge	.L15
	xorl	%eax, %eax
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movq	%rbp, %rdi
	call	__isoc23_fscanf@PLT
	incl	%eax
	jne	.L12
	movq	%rbp, %rdi
	call	rewind@PLT
.L12:
	movss	(%rbx), %xmm0
	subss	.LC3(%rip), %xmm0
	incl	%r13d
	addq	$4, %rbx
	movss	%xmm0, -4(%rbx)
	jmp	.L11
.L15:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z15initializeArrayP8_IO_FILEPfi, .-_Z15initializeArrayP8_IO_FILEPfi
	.globl	_Z17inclusiveScan_SEQPfS_i
	.type	_Z17inclusiveScan_SEQPfS_i, @function
_Z17inclusiveScan_SEQPfS_i:
.LFB2029:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L17:
	cmpl	%eax, %edx
	jle	.L19
	addss	(%rdi,%rax,4), %xmm0
	movss	%xmm0, (%rsi,%rax,4)
	incq	%rax
	jmp	.L17
.L19:
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z17inclusiveScan_SEQPfS_i, .-_Z17inclusiveScan_SEQPfS_i
	.globl	_Z27__device_stub__Z5fixupPfS_iPfS_i
	.type	_Z27__device_stub__Z5fixupPfS_iPfS_i, @function
_Z27__device_stub__Z5fixupPfS_iPfS_i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z5fixupPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L20:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z27__device_stub__Z5fixupPfS_iPfS_i, .-_Z27__device_stub__Z5fixupPfS_iPfS_i
	.globl	_Z5fixupPfS_i
	.type	_Z5fixupPfS_i, @function
_Z5fixupPfS_i:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z5fixupPfS_iPfS_i
	.cfi_endproc
.LFE2056:
	.size	_Z5fixupPfS_i, .-_Z5fixupPfS_i
	.globl	_Z28__device_stub__Z4testPfS_S_iPfS_S_i
	.type	_Z28__device_stub__Z4testPfS_S_iPfS_S_i, @function
_Z28__device_stub__Z4testPfS_S_iPfS_S_i:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z4testPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L25:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z28__device_stub__Z4testPfS_S_iPfS_S_i, .-_Z28__device_stub__Z4testPfS_S_iPfS_S_i
	.globl	_Z4testPfS_S_i
	.type	_Z4testPfS_S_i, @function
_Z4testPfS_S_i:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z4testPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2058:
	.size	_Z4testPfS_S_i, .-_Z4testPfS_S_i
	.section	.rodata.str1.1
.LC5:
	.string	"Usage %s N\n"
.LC6:
	.string	"r"
.LC7:
	.string	"problem1.inp"
.LC8:
	.string	"%d\n%f\n%f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	je	.L31
	movq	(%rsi), %rdx
	movl	$2, %edi
	leaq	.LC5(%rip), %rsi
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L30
.L31:
	movq	8(%rsi), %rdi
	call	atoi@PLT
	leaq	.LC6(%rip), %rsi
	leaq	.LC7(%rip), %rdi
	movslq	%eax, %r15
	call	fopen@PLT
	leal	0(,%r15,4), %ebp
	movq	%r15, %rbx
	movslq	%ebp, %rbp
	movq	%rax, %r14
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%rax, %r13
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	movl	%r15d, %edx
	movq	%r12, %rsi
	movq	%r14, %rdi
	movl	$0x00000000, 28(%rsp)
	call	_Z15initializeArrayP8_IO_FILEPfi
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r15d, %eax
	movl	$512, %ecx
	movl	$1, 100(%rsp)
	cltd
	idivl	%ecx
	movl	$8388609, %edx
	movl	$1, %ecx
	testl	%eax, %eax
	movl	%eax, %r14d
	movl	$1, %eax
	cmovne	%r14d, %eax
	salq	$9, %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rdx, 92(%rsp)
	movl	%eax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	%r15d, %ecx
	movq	32(%rsp), %rdi
	call	_Z28__device_stub__Z4testPfS_S_iPfS_S_i
.L34:
	call	cudaDeviceSynchronize@PLT
	movl	$8388609, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 92(%rsp)
	movl	$1, 100(%rsp)
	movq	%rdi, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	$1024, %ecx
	xorl	%edx, %edx
	call	_Z28__device_stub__Z4testPfS_S_iPfS_S_i
.L35:
	call	cudaDeviceSynchronize@PLT
	movl	%r14d, 80(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$8388609, %edx
	movl	$1, %ecx
	movl	$1, 100(%rsp)
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	salq	$9, %rdx
	movl	88(%rsp), %esi
	movq	%rdx, 92(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	movq	56(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z27__device_stub__Z5fixupPfS_iPfS_i
.L36:
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %rsi
	movq	%rbp, %rdx
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	leaq	28(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	8(%rsp), %rsi
	movl	%ebx, %edx
	movq	%r12, %rdi
	call	_Z17inclusiveScan_SEQPfS_i
	leaq	.LC8(%rip), %rsi
	movb	$2, %al
	movl	$2, %edi
	cvtss2sd	-4(%r13,%r15,4), %xmm0
	cvtss2sd	28(%rsp), %xmm1
	call	__printf_chk@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	xorl	%eax, %eax
.L30:
	movq	104(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z4testPfS_S_i"
.LC10:
	.string	"_Z5fixupPfS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z4testPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z5fixupPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC0:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1008981770
	.align 4
.LC3:
	.long	1084227584
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//#include<iostream>
#include<stdio.h>
#include<stdlib.h>
#include <hip/hip_runtime.h>
//#include <math.h>

#define BLOCK_SIZE 512

int checkResults(float*res, float* cudaRes,int length)
{
	int nDiffs=0;
	const float smallVal = 0.01f; // Keeping this extra high as we have repetitive addition and sequence matters
	for(int i=0; i<length; i++)
		if(fabs(cudaRes[i]-res[i])>smallVal)
            nDiffs++;
        //if(1)
            //printf("%d :: %f  %f\n", i, cudaRes[i], res[i]);
	return nDiffs;
}

void initializeArray(FILE* fp,float* arr, int nElements)
{
	for( int i=0; i<nElements; i++){
		int r=fscanf(fp,"%f",&arr[i]);
		if(r == EOF){
			rewind(fp);
		}
		arr[i]-=5; // This is to make the data zero mean. Otherwise we reach large numbers and lose precision
	}
}

void inclusiveScan_SEQ(float *in, float *out,int length) {
	float sum=0.f;
	for (int i =0; i < length; i++) {
		sum+=in[i];
		out[i]=sum;
	}
}


__global__ void fixup(float *input, float *aux, int len) {
    unsigned int t = threadIdx.x, start = 2 * blockIdx.x * BLOCK_SIZE;
    if (blockIdx.x) {
        if (start + t < len)
            input[start + t] += aux[blockIdx.x - 1];
        if (start + BLOCK_SIZE + t < len)
            input[start + BLOCK_SIZE + t] += aux[blockIdx.x - 1];
    }
}

__global__ void test(float * input, float * output, float *aux, int len) {
        // Load a segment of the input vector into shared memory
        __shared__ float scan_array[BLOCK_SIZE << 1];
            unsigned int t = threadIdx.x, start = 2 * blockIdx.x * BLOCK_SIZE;
                if (start + t < len)
                           scan_array[t] = input[start + t];
                    else
                               scan_array[t] = 0;
                        if (start + BLOCK_SIZE + t < len)
                                   scan_array[BLOCK_SIZE + t] = input[start + BLOCK_SIZE + t];
                            else
                                       scan_array[BLOCK_SIZE + t] = 0;
                                __syncthreads();

                                    // Reduction
                                    int stride;
                                        for (stride = 1; stride <= BLOCK_SIZE; stride <<= 1) {
                                                   int index = (t + 1) * stride * 2 - 1;
                                                          if (index < 2 * BLOCK_SIZE)
                                                                        scan_array[index] += scan_array[index - stride];
                                                                 __syncthreads();
                                                                     }

                                            // Post reduction
                                            for (stride = BLOCK_SIZE >> 1; stride; stride >>= 1) {
                                                       int index = (t + 1) * stride * 2 - 1;
                                                              if (index + stride < 2 * BLOCK_SIZE)
                                                                            scan_array[index + stride] += scan_array[index];
                                                                     __syncthreads();
                                                                         }

                                                if (start + t < len)
                                                           output[start + t] = scan_array[t];
                                                    if (start + BLOCK_SIZE + t < len)
                                                               output[start + BLOCK_SIZE + t] = scan_array[BLOCK_SIZE + t];

                                                        if (aux && t == 0)
                                                                   aux[blockIdx.x] = scan_array[2 * BLOCK_SIZE - 1];
}

int main(int argc, char* argv[]) {
	if(argc!=2){
		printf("Usage %s N\n",argv[0]);
		return 1;
	}
	int N=atoi(argv[1]);
	FILE *fp = fopen("problem1.inp","r");
	int size = N * sizeof(float); 
	//allocate resources
	float *in      = (float *)malloc(size);
	float *out     = (float *)malloc(size); 
	float *cuda_out= (float *)malloc(size);
	float *d_in, *d_out, * tmp;
    float * deviceAuxScannedArray;
    hipMalloc(&d_in, size);
    hipMalloc(&d_out, size);
    hipMalloc(&tmp, (BLOCK_SIZE << 1) * sizeof(float));
    hipMalloc(&deviceAuxScannedArray, (BLOCK_SIZE << 1) * sizeof(float));
    float time = 0.f;
	initializeArray(fp,in, N);
	// Your code here
    hipEvent_t start, end;
    hipEventCreate(&start);
    hipEventCreate(&end);
    hipEventRecord(start, 0);
    
    hipMemcpy(d_in, in, size, hipMemcpyHostToDevice);
    int block_num = N / BLOCK_SIZE;
    if(block_num == 0) block_num++;
    test<<<block_num, BLOCK_SIZE>>>(d_in, d_out, tmp, N);
    hipDeviceSynchronize();
    test<<<dim3(1,1,1), BLOCK_SIZE>>>(tmp, deviceAuxScannedArray, NULL, BLOCK_SIZE << 1);
    hipDeviceSynchronize();
    fixup<<<N/BLOCK_SIZE, BLOCK_SIZE>>>(d_out, deviceAuxScannedArray, N);
    hipDeviceSynchronize();
    hipMemcpy(cuda_out, d_out, size, hipMemcpyDeviceToHost);
	hipEventRecord(end, 0);
    hipEventSynchronize(end);
    hipEventElapsedTime(&time, start, end);
    inclusiveScan_SEQ(in, out,N);
	int nDiffs = checkResults(out, cuda_out,N);

	//if(nDiffs)printf("Test Failed\n"); // This should never print
	printf("%d\n%f\n%f\n",N,cuda_out[N-1],time);



	//free resources 
	free(in); free(out); free(cuda_out);
	return 0;
}
	.text
	.file	"problem3.hip"
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z12checkResultsPfS_i
.LCPI0_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI0_1:
	.long	0x3c23d70a                      # float 0.00999999977
	.text
	.globl	_Z12checkResultsPfS_i
	.type	_Z12checkResultsPfS_i,@function
_Z12checkResultsPfS_i:                  # @_Z12checkResultsPfS_i
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB0_1
# %bb.3:                                # %.lr.ph.preheader
	movl	%edx, %ecx
	xorl	%edx, %edx
	movaps	.LCPI0_0(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movss	.LCPI0_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorl	%eax, %eax
.LBB0_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rsi,%rdx,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	subss	(%rdi,%rdx,4), %xmm2
	andps	%xmm0, %xmm2
	xorl	%r8d, %r8d
	ucomiss	%xmm1, %xmm2
	seta	%r8b
	addl	%r8d, %eax
	incq	%rdx
	cmpq	%rdx, %rcx
	jne	.LBB0_4
# %bb.2:                                # %._crit_edge
	retq
.LBB0_1:
	xorl	%eax, %eax
	retq
.Lfunc_end0:
	.size	_Z12checkResultsPfS_i, .Lfunc_end0-_Z12checkResultsPfS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z15initializeArrayP8_IO_FILEPfi
.LCPI1_0:
	.long	0xc0a00000                      # float -5
	.text
	.globl	_Z15initializeArrayP8_IO_FILEPfi
	.type	_Z15initializeArrayP8_IO_FILEPfi,@function
_Z15initializeArrayP8_IO_FILEPfi:       # @_Z15initializeArrayP8_IO_FILEPfi
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB1_6
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movl	%edx, %r15d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str, %esi
	movq	%r14, %rdi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	cmpl	$-1, %eax
	jne	.LBB1_4
# %bb.3:                                #   in Loop: Header=BB1_2 Depth=1
	movq	%r14, %rdi
	callq	rewind
.LBB1_4:                                #   in Loop: Header=BB1_2 Depth=1
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	addss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, (%rbx)
	addq	$4, %rbx
	decq	%r15
	jne	.LBB1_2
# %bb.5:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_6:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z15initializeArrayP8_IO_FILEPfi, .Lfunc_end1-_Z15initializeArrayP8_IO_FILEPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z17inclusiveScan_SEQPfS_i      # -- Begin function _Z17inclusiveScan_SEQPfS_i
	.type	_Z17inclusiveScan_SEQPfS_i,@function
_Z17inclusiveScan_SEQPfS_i:             # @_Z17inclusiveScan_SEQPfS_i
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB2_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %eax
	xorps	%xmm0, %xmm0
	xorl	%ecx, %ecx
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	addss	(%rdi,%rcx,4), %xmm0
	movss	%xmm0, (%rsi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB2_2
.LBB2_3:                                # %._crit_edge
	retq
.Lfunc_end2:
	.size	_Z17inclusiveScan_SEQPfS_i, .Lfunc_end2-_Z17inclusiveScan_SEQPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__fixupPfS_i   # -- Begin function _Z20__device_stub__fixupPfS_i
	.type	_Z20__device_stub__fixupPfS_i,@function
_Z20__device_stub__fixupPfS_i:          # @_Z20__device_stub__fixupPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5fixupPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z20__device_stub__fixupPfS_i, .Lfunc_end3-_Z20__device_stub__fixupPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__testPfS_S_i  # -- Begin function _Z19__device_stub__testPfS_S_i
	.type	_Z19__device_stub__testPfS_S_i,@function
_Z19__device_stub__testPfS_S_i:         # @_Z19__device_stub__testPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4testPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z19__device_stub__testPfS_S_i, .Lfunc_end4-_Z19__device_stub__testPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jne	.LBB5_1
# %bb.2:
	movabsq	$4294967808, %r13               # imm = 0x100000200
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	movl	$.L.str.2, %edi
	movl	$.L.str.3, %esi
	callq	fopen
	movq	%rax, %r14
	leal	(,%rbx,4), %eax
	movslq	%eax, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	leaq	64(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	movl	$0, 20(%rsp)
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	%ebx, %edx
	callq	_Z15initializeArrayP8_IO_FILEPfi
	leaq	56(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rbp), %rdi
	movl	$1, %r14d
	movq	%r15, 48(%rsp)                  # 8-byte Spill
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leal	511(%rbx), %eax
	testl	%ebx, %ebx
	movl	%ebx, %ebp
	cmovsl	%eax, %ebp
	sarl	$9, %ebp
	cmpl	$1023, %eax                     # imm = 0x3FF
	movl	%ebp, %eax
	cmovbl	%r14d, %eax
	leaq	(%rax,%r13), %rdi
	addq	$-512, %rdi                     # imm = 0xFE00
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_4
# %bb.3:
	movq	64(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdx
	movl	%ebx, %ecx
	callq	_Z19__device_stub__testPfS_S_i
.LBB5_4:
	callq	hipDeviceSynchronize
	leaq	-511(%r13), %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_6
# %bb.5:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	xorl	%edx, %edx
	movl	$1024, %ecx                     # imm = 0x400
	callq	_Z19__device_stub__testPfS_S_i
.LBB5_6:
	callq	hipDeviceSynchronize
	movl	%ebp, %eax
	leaq	(%rax,%r13), %rdi
	addq	$-512, %rdi                     # imm = 0xFE00
	xorl	%ebp, %ebp
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_8
# %bb.7:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	%ebx, %edx
	callq	_Z20__device_stub__fixupPfS_i
.LBB5_8:                                # %_Z12checkResultsPfS_i.exit
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	40(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	56(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	20(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	movslq	%ebx, %rax
	cvtss2sd	-4(%r15,%rax,4), %xmm0
	cvtss2sd	(%r14), %xmm1
	movl	$.L.str.4, %edi
	movl	%ebx, %esi
	movb	$2, %al
	callq	printf
	movq	48(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r15, %rdi
	callq	free
	jmp	.LBB5_9
.LBB5_1:
	movq	(%rsi), %rsi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %ebp
.LBB5_9:
	movl	%ebp, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5fixupPfS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4testPfS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%f"
	.size	.L.str, 3

	.type	_Z5fixupPfS_i,@object           # @_Z5fixupPfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z5fixupPfS_i
	.p2align	3, 0x0
_Z5fixupPfS_i:
	.quad	_Z20__device_stub__fixupPfS_i
	.size	_Z5fixupPfS_i, 8

	.type	_Z4testPfS_S_i,@object          # @_Z4testPfS_S_i
	.globl	_Z4testPfS_S_i
	.p2align	3, 0x0
_Z4testPfS_S_i:
	.quad	_Z19__device_stub__testPfS_S_i
	.size	_Z4testPfS_S_i, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Usage %s N\n"
	.size	.L.str.1, 12

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"problem1.inp"
	.size	.L.str.2, 13

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"r"
	.size	.L.str.3, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%d\n%f\n%f\n"
	.size	.L.str.4, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5fixupPfS_i"
	.size	.L__unnamed_1, 14

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z4testPfS_S_i"
	.size	.L__unnamed_2, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__fixupPfS_i
	.addrsig_sym _Z19__device_stub__testPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z5fixupPfS_i
	.addrsig_sym _Z4testPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5fixupPfS_i           ; -- Begin function _Z5fixupPfS_i
	.globl	_Z5fixupPfS_i
	.p2align	8
	.type	_Z5fixupPfS_i,@function
_Z5fixupPfS_i:                          ; @_Z5fixupPfS_i
; %bb.0:
	s_cmp_eq_u32 s15, 0
	s_cbranch_scc1 .LBB0_5
; %bb.1:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_lshl_b32 s5, s15, 10
	s_mov_b32 s6, exec_lo
	v_or_b32_e32 v1, s5, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s4, v1
	s_cbranch_execz .LBB0_3
; %bb.2:
	s_mov_b32 s9, 0
	s_add_i32 s8, s15, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[8:9], 2
	s_add_u32 s8, s2, s8
	s_addc_u32 s9, s3, s9
	s_load_b32 s7, s[8:9], 0x0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v3, v[1:2], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v3, s7, v3
	global_store_b32 v[1:2], v3, off
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s6
	v_add3_u32 v0, v0, s5, 0x200
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s4, v0
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s5, 0
	s_add_i32 s4, s15, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[4:5], s[4:5], 2
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_add_u32 s0, s2, s4
	s_addc_u32 s1, s3, s5
	global_load_b32 v0, v1, s[0:1]
	global_load_b32 v1, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v1
	global_store_b32 v[2:3], v0, off
.LBB0_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5fixupPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5fixupPfS_i, .Lfunc_end0-_Z5fixupPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 276
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z4testPfS_S_i          ; -- Begin function _Z4testPfS_S_i
	.globl	_Z4testPfS_S_i
	.p2align	8
	.type	_Z4testPfS_S_i,@function
_Z4testPfS_S_i:                         ; @_Z4testPfS_S_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	s_lshl_b32 s1, s15, 10
	v_mov_b32_e32 v4, 0
	v_or_b32_e32 v1, s1, v0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s2, s15
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s10, vcc_lo
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v2, s0, s4, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
	global_load_b32 v2, v[2:3], off
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s10
	v_add3_u32 v3, v0, s1, 0x200
	v_lshlrev_b32_e32 v6, 2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_u32_e64 s0, s3, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v2
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB1_4
; %bb.3:
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	v_add_co_u32 v4, s1, s4, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s1, s5, v5, s1
	global_load_b32 v4, v[4:5], off
.LBB1_4:
	s_or_b32 exec_lo, exec_lo, s3
	v_lshl_add_u32 v2, v0, 1, 2
	s_mov_b32 s3, 1
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v4 offset:2048
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_5:                                ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[4:5], null, v2, s3, -1
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0x400, v4
	s_cbranch_execz .LBB1_7
; %bb.6:                                ;   in Loop: Header=BB1_5 Depth=1
	v_subrev_nc_u32_e32 v5, s3, v4
	v_lshlrev_b32_e32 v4, 2, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b32_e32 v5, 2, v5
	ds_load_b32 v5, v5
	ds_load_b32 v7, v4
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v5, v5, v7
	ds_store_b32 v4, v5
.LBB1_7:                                ;   in Loop: Header=BB1_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_lshl_b32 s3, s3, 1
	s_waitcnt lgkmcnt(0)
	s_cmpk_lt_i32 s3, 0x201
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_5
; %bb.8:                                ; %.preheader.preheader
	s_movk_i32 s3, 0x100
.LBB1_9:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u32_u24 v4, v2, s3, -1
	s_mov_b32 s4, exec_lo
	v_add_nc_u32_e32 v5, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0x400, v5
	s_cbranch_execz .LBB1_11
; %bb.10:                               ;   in Loop: Header=BB1_9 Depth=1
	v_lshlrev_b32_e32 v4, 2, v4
	v_lshlrev_b32_e32 v5, 2, v5
	ds_load_b32 v4, v4
	ds_load_b32 v7, v5
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v4, v4, v7
	ds_store_b32 v5, v4
.LBB1_11:                               ;   in Loop: Header=BB1_9 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_lshr_b32 s1, s3, 1
	s_cmp_gt_u32 s3, 1
	s_mov_b32 s3, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_9
; %bb.12:
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB1_14
; %bb.13:
	ds_load_b32 v4, v6
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[1:2], v4, off
.LBB1_14:
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_16
; %bb.15:
	ds_load_b32 v5, v6 offset:2048
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[1:2], v5, off
.LBB1_16:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_cmp_lg_u64 s[8:9], 0
	s_mov_b32 s3, 0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_18
; %bb.17:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s8, s0
	s_addc_u32 s1, s9, s1
	ds_load_b32 v1, v0 offset:4092
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB1_18:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4testPfS_S_i
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z4testPfS_S_i, .Lfunc_end1-_Z4testPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 688
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5fixupPfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z5fixupPfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 4096
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4testPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4testPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
