#include <iostream>
#include <stdlib.h>
#include <cuda_runtime.h>

using namespace std;

template<typename T> T* flatten(T** M, int mWidth,int mHeight){

    T* result = (T*)malloc((mWidth*mHeight)*sizeof(T));

    for(int i = 0; i < mHeight; i++){

        memcpy(result + (i*mWidth),M[i],(mWidth*sizeof(T)));

    }

    return result;


}

__global__ void mvmult(float* M, float* v, int mvWidth, int mHeight, float* t){


    int tIndex = (blockIdx.x*blockDim.x) + threadIdx.x;

    int result = 0;
    
    #pragma unroll
    for(int i = 0; i < mHeight; i++){

        int index = (i*mHeight) + tIndex;

        result += M[index] * v[tIndex];

    }

    t[tIndex] = result;

    
    

    


    

}

int main(int argc, char** argv){

    int mvWidth = 3, mHeight = 3;

    //Host memory
    float **M, *Mf,*v, *t;

    //Device Memory
    float *M_d, *v_d, *t_d;

    v = (float*)malloc(mvWidth*sizeof(float));
    t = (float*)malloc(mvWidth*sizeof(float));

    M = (float**)malloc(mHeight*sizeof(float*));

    cudaMalloc(&M_d,mvWidth*mHeight*sizeof(float));
    cudaMalloc(&v_d,mvWidth*sizeof(float));
    cudaMalloc(&t_d,mvWidth*sizeof(float));

    for(int i = 0; i < mHeight; i++){

        M[i] = (float*)malloc(mvWidth*sizeof(float));

        for(int j = 0; j < mvWidth; j++){

            M[i][j] = 3;

        }

    }

    for(int i = 0; i < mvWidth; i++){

        v[i] = 4;

    }

    Mf = flatten(M,mvWidth,mHeight);


    cudaMemcpy(M_d,Mf,mvWidth*mHeight*sizeof(float),cudaMemcpyHostToDevice);
    cudaMemcpy(v_d,v,mvWidth*sizeof(float),cudaMemcpyHostToDevice);

    mvmult<<<1,mvWidth>>>(M_d,v_d,mvWidth,mHeight,t_d);

    cudaMemcpy(t,t_d,mvWidth*sizeof(float),cudaMemcpyDeviceToHost);

    free(Mf);
    free(v);
    
    cudaFree(M_d);
    cudaFree(v_d);
    cudaFree(t_d);

    cout << "| " << t[0] << ' ' << t[1] << ' ' << t[2] << " |" << endl;

    free(t);

    for(int i = 0; i < mHeight; i++){

        free(M[i]);

    }

    free(M);
    free(t);

    return EXIT_SUCCESS;

}
	.file	"tmpxft_00276b72_00000000-6_mvmult.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z31__device_stub__Z6mvmultPfS_iiS_PfS_iiS_
	.type	_Z31__device_stub__Z6mvmultPfS_iiS_PfS_iiS_, @function
_Z31__device_stub__Z6mvmultPfS_iiS_PfS_iiS_:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6mvmultPfS_iiS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z31__device_stub__Z6mvmultPfS_iiS_PfS_iiS_, .-_Z31__device_stub__Z6mvmultPfS_iiS_PfS_iiS_
	.globl	_Z6mvmultPfS_iiS_
	.type	_Z6mvmultPfS_iiS_, @function
_Z6mvmultPfS_iiS_:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z6mvmultPfS_iiS_PfS_iiS_
	.cfi_endproc
.LFE3662:
	.size	_Z6mvmultPfS_iiS_, .-_Z6mvmultPfS_iiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"| "
.LC3:
	.string	" |"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$12, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movabsq	$4629700418014806016, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$12, %edi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movl	$24, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	leaq	24(%rsp), %rdi
	movl	$36, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$12, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$12, %esi
	call	cudaMalloc@PLT
.L9:
	movl	$12, %edi
	call	malloc@PLT
	movq	%rax, 0(%rbp,%r13,8)
	incq	%r13
	movq	%r14, (%rax)
	movl	$0x40400000, 8(%rax)
	cmpq	$3, %r13
	jne	.L9
	movq	8(%rsp), %rax
	movl	$36, %edi
	movabsq	$4647714816528482304, %rcx
	movq	%rcx, (%rax)
	movl	$0x40800000, 8(%rax)
	call	malloc@PLT
	movq	0(%rbp), %r15
	movq	8(%rbp), %r14
	movl	$1, %ecx
	movq	%rax, %r12
	movq	16(%rbp), %r13
	movq	24(%rsp), %rdi
	movl	$36, %edx
	movq	(%r15), %rax
	movq	%r12, %rsi
	movq	%rax, (%r12)
	movl	8(%r15), %eax
	movl	%eax, 8(%r12)
	movq	(%r14), %rax
	movq	%rax, 12(%r12)
	movl	8(%r14), %eax
	movl	%eax, 20(%r12)
	movq	0(%r13), %rax
	movq	%rax, 24(%r12)
	movl	8(%r13), %eax
	movl	%eax, 32(%r12)
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$12, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967299, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	40(%rsp), %r8
	movq	32(%rsp), %rsi
	movl	$3, %ecx
	movl	$3, %edx
	movq	24(%rsp), %rdi
	call	_Z31__device_stub__Z6mvmultPfS_iiS_PfS_iiS_
.L10:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movl	$12, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movl	$32, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	cvtss2sd	4(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movl	$32, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	cvtss2sd	8(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r15, %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z6mvmultPfS_iiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6mvmultPfS_iiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <stdlib.h>
#include <hip/hip_runtime.h>

using namespace std;

template<typename T> T* flatten(T** M, int mWidth,int mHeight){

    T* result = (T*)malloc((mWidth*mHeight)*sizeof(T));

    for(int i = 0; i < mHeight; i++){

        memcpy(result + (i*mWidth),M[i],(mWidth*sizeof(T)));

    }

    return result;


}

__global__ void mvmult(float* M, float* v, int mvWidth, int mHeight, float* t){


    int tIndex = (blockIdx.x*blockDim.x) + threadIdx.x;

    int result = 0;
    
    #pragma unroll
    for(int i = 0; i < mHeight; i++){

        int index = (i*mHeight) + tIndex;

        result += M[index] * v[tIndex];

    }

    t[tIndex] = result;

    
    

    


    

}

int main(int argc, char** argv){

    int mvWidth = 3, mHeight = 3;

    //Host memory
    float **M, *Mf,*v, *t;

    //Device Memory
    float *M_d, *v_d, *t_d;

    v = (float*)malloc(mvWidth*sizeof(float));
    t = (float*)malloc(mvWidth*sizeof(float));

    M = (float**)malloc(mHeight*sizeof(float*));

    hipMalloc(&M_d,mvWidth*mHeight*sizeof(float));
    hipMalloc(&v_d,mvWidth*sizeof(float));
    hipMalloc(&t_d,mvWidth*sizeof(float));

    for(int i = 0; i < mHeight; i++){

        M[i] = (float*)malloc(mvWidth*sizeof(float));

        for(int j = 0; j < mvWidth; j++){

            M[i][j] = 3;

        }

    }

    for(int i = 0; i < mvWidth; i++){

        v[i] = 4;

    }

    Mf = flatten(M,mvWidth,mHeight);


    hipMemcpy(M_d,Mf,mvWidth*mHeight*sizeof(float),hipMemcpyHostToDevice);
    hipMemcpy(v_d,v,mvWidth*sizeof(float),hipMemcpyHostToDevice);

    mvmult<<<1,mvWidth>>>(M_d,v_d,mvWidth,mHeight,t_d);

    hipMemcpy(t,t_d,mvWidth*sizeof(float),hipMemcpyDeviceToHost);

    free(Mf);
    free(v);
    
    hipFree(M_d);
    hipFree(v_d);
    hipFree(t_d);

    cout << "| " << t[0] << ' ' << t[1] << ' ' << t[2] << " |" << endl;

    free(t);

    for(int i = 0; i < mHeight; i++){

        free(M[i]);

    }

    free(M);
    free(t);

    return EXIT_SUCCESS;

}
	.text
	.file	"mvmult.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__mvmultPfS_iiS_ # -- Begin function _Z21__device_stub__mvmultPfS_iiS_
	.type	_Z21__device_stub__mvmultPfS_iiS_,@function
_Z21__device_stub__mvmultPfS_iiS_:      # @_Z21__device_stub__mvmultPfS_iiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6mvmultPfS_iiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__mvmultPfS_iiS_, .Lfunc_end0-_Z21__device_stub__mvmultPfS_iiS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$12, %edi
	callq	malloc
	movq	%rax, %r15
	movl	$12, %edi
	callq	malloc
	movq	%rax, %rbx
	movl	$24, %edi
	callq	malloc
	movq	%rax, %r14
	leaq	32(%rsp), %rdi
	movl	$36, %esi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$12, %esi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$12, %esi
	callq	hipMalloc
	xorl	%r12d, %r12d
.LBB1_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	movl	$12, %edi
	callq	malloc
	movq	%rax, (%r14,%r12,8)
	xorl	%ecx, %ecx
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1077936128, (%rax,%rcx,4)      # imm = 0x40400000
	incq	%rcx
	cmpq	$3, %rcx
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%r12
	cmpq	$3, %r12
	jne	.LBB1_1
# %bb.4:                                # %.preheader.preheader
	xorl	%eax, %eax
.LBB1_5:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	$1082130432, (%r15,%rax,4)      # imm = 0x40800000
	incq	%rax
	cmpq	$3, %rax
	jne	.LBB1_5
# %bb.6:
	movl	$36, %edi
	callq	malloc
	movq	%rax, %r12
	xorl	%eax, %eax
	movq	%r12, %rcx
.LBB1_7:                                # =>This Inner Loop Header: Depth=1
	movq	(%r14,%rax,8), %rdx
	movl	8(%rdx), %esi
	movl	%esi, 8(%rcx)
	movq	(%rdx), %rdx
	movq	%rdx, (%rcx)
	incq	%rax
	addq	$12, %rcx
	cmpq	$3, %rax
	jne	.LBB1_7
# %bb.8:                                # %_Z7flattenIfEPT_PS1_ii.exit
	movq	32(%rsp), %rdi
	movl	$36, %edx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movl	$12, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	2(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.9:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %r8
	movl	$3, %edx
	movl	$3, %ecx
	callq	_Z21__device_stub__mvmultPfS_iiS_
.LBB1_10:
	movq	16(%rsp), %rsi
	movl	$12, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r12, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	(%rbx), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movb	$32, 15(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r15,%rax)
	je	.LBB1_12
# %bb.11:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %r15
	jmp	.LBB1_13
.LBB1_12:
	movq	%r15, %rdi
	movl	$32, %esi
	callq	_ZNSo3putEc
.LBB1_13:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rbx), %xmm0
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movb	$32, 15(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r15,%rax)
	je	.LBB1_15
# %bb.14:
	leaq	15(%rsp), %rsi
	movl	$1, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %r15
	jmp	.LBB1_16
.LBB1_15:
	movq	%r15, %rdi
	movl	$32, %esi
	callq	_ZNSo3putEc
.LBB1_16:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit57
	xorps	%xmm0, %xmm0
	cvtss2sd	8(%rbx), %xmm0
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.1, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r15), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rbx, %rdi
	callq	free
	xorl	%r15d, %r15d
.LBB1_17:                               # =>This Inner Loop Header: Depth=1
	movq	(%r14,%r15,8), %rdi
	callq	free
	incq	%r15
	cmpq	$3, %r15
	jne	.LBB1_17
# %bb.18:
	movq	%r14, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6mvmultPfS_iiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6mvmultPfS_iiS_,@object       # @_Z6mvmultPfS_iiS_
	.section	.rodata,"a",@progbits
	.globl	_Z6mvmultPfS_iiS_
	.p2align	3, 0x0
_Z6mvmultPfS_iiS_:
	.quad	_Z21__device_stub__mvmultPfS_iiS_
	.size	_Z6mvmultPfS_iiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"| "
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" |"
	.size	.L.str.1, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6mvmultPfS_iiS_"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__mvmultPfS_iiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6mvmultPfS_iiS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6mvmultPfS_iiS_       ; -- Begin function _Z6mvmultPfS_iiS_
	.globl	_Z6mvmultPfS_iiS_
	.p2align	8
	.type	_Z6mvmultPfS_iiS_,@function
_Z6mvmultPfS_iiS_:                      ; @_Z6mvmultPfS_iiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x14
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_cmp_lt_i32 s2, 1
	v_mad_u64_u32 v[2:3], null, s15, s3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_cbranch_scc1 .LBB0_4
; %bb.1:                                ; %.lr.ph
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v5, 0
	s_mov_b32 s3, s2
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v4, v[3:4], off
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cvt_f32_i32_e32 v5, v5
	s_add_i32 s3, s3, -1
	s_cmp_eq_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_add_nc_u32_e32 v2, s2, v2
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v3, v[6:7], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v3, v4
	v_cvt_i32_f32_e32 v5, v5
	s_cbranch_scc0 .LBB0_2
; %bb.3:                                ; %._crit_edge.loopexit
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_i32_e32 v2, v5
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v2, 0
.LBB0_5:                                ; %Flow
	s_load_b64 s[0:1], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6mvmultPfS_iiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6mvmultPfS_iiS_, .Lfunc_end0-_Z6mvmultPfS_iiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 244
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6mvmultPfS_iiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6mvmultPfS_iiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
