#include <stdio.h>
#include <cuda.h>
#include <sys/time.h>

#define N 1024*1024              //array size

__global__ void read_alloc_kernel1(int *A, int *B, int *time){
    int x1, x2, x3, x4, x5, x6, x7, x8, x9;
    int t0, t1, t2, t3, t4, t5;

    t0 = clock();
    x1 = A[64];
    x2 = A[1088];
    x3 = A[2144];
    x4 = A[3168];
    x1 ++;
    x2 ++;
    x3 ++;
    x4 ++;
    t1 = clock();

    t2 = clock();
    x5 = A[4096];
    t3 = clock();
    x7 = A[1088];
    x8 = A[2144];
    x9 = A[3168];
    t4 = clock();
    x6 = A[64];
    t5 = clock();

    B[0] = x1;
    B[1] = x2;
    B[2] = x3;
    B[3] = x4;
    B[4] = x5;
    B[5] = x6;
    B[6] = x7;
    B[7] = x8;
    B[8] = x9;

    time[0] = t1 - t0;
    time[1] = t3 - t2;
    time[2] = t5 - t4;
}

int main(int argc, char **argv) {
    int *A, *B, *A_gpu, *B_gpu;
    int *time, *time_gpu;
    int i;

    A = (int *)malloc(sizeof(int) * N);
    B = (int *)malloc(sizeof(int) * N);
    time = (int *)malloc(sizeof(int) * N);
    cudaMalloc((void **)&A_gpu, sizeof(int) * N);
    cudaMalloc((void **)&B_gpu, sizeof(int) * N);
    cudaMalloc((void **)&time_gpu, sizeof(int) * N);

    for (i = 0; i < N; i++)
        B[i] = 0;
    cudaMemcpy(B_gpu, B, sizeof(int) * N, cudaMemcpyHostToDevice);
    cudaThreadSynchronize();

    dim3 block(1);
    dim3 grid(1);
    read_alloc_kernel1<<< grid, block >>>(A_gpu, B_gpu, time_gpu);
    cudaThreadSynchronize();

    cudaMemcpy(time, time_gpu, sizeof(int) * N, cudaMemcpyDeviceToHost);
    cudaThreadSynchronize();

    free(A);
    free(B);
    free(time);
    cudaFree(A_gpu);
    cudaFree(B_gpu);
    cudaFree(time_gpu);

    return 0;
}

	.file	"tmpxft_003b549f_00000000-6_read_alloc.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z42__device_stub__Z18read_alloc_kernel1PiS_S_PiS_S_
	.type	_Z42__device_stub__Z18read_alloc_kernel1PiS_S_PiS_S_, @function
_Z42__device_stub__Z18read_alloc_kernel1PiS_S_PiS_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z18read_alloc_kernel1PiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z42__device_stub__Z18read_alloc_kernel1PiS_S_PiS_S_, .-_Z42__device_stub__Z18read_alloc_kernel1PiS_S_PiS_S_
	.globl	_Z18read_alloc_kernel1PiS_S_
	.type	_Z18read_alloc_kernel1PiS_S_, @function
_Z18read_alloc_kernel1PiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z18read_alloc_kernel1PiS_S_PiS_S_
	.cfi_endproc
.LFE2053:
	.size	_Z18read_alloc_kernel1PiS_S_, .-_Z18read_alloc_kernel1PiS_S_
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$4194304, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$72, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$4194304, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	xorl	%eax, %eax
	movl	$1048576, %ecx
	movq	%rbx, %rdi
	rep stosl
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	call	cudaThreadSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z42__device_stub__Z18read_alloc_kernel1PiS_S_PiS_S_
.L9:
	call	cudaThreadSynchronize@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	call	cudaThreadSynchronize@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z18read_alloc_kernel1PiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18read_alloc_kernel1PiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>
#include <sys/time.h>

#define N 1024*1024              //array size

__global__ void read_alloc_kernel1(int *A, int *B, int *time){
    int x1, x2, x3, x4, x5, x6, x7, x8, x9;
    int t0, t1, t2, t3, t4, t5;

    t0 = clock();
    x1 = A[64];
    x2 = A[1088];
    x3 = A[2144];
    x4 = A[3168];
    x1 ++;
    x2 ++;
    x3 ++;
    x4 ++;
    t1 = clock();

    t2 = clock();
    x5 = A[4096];
    t3 = clock();
    x7 = A[1088];
    x8 = A[2144];
    x9 = A[3168];
    t4 = clock();
    x6 = A[64];
    t5 = clock();

    B[0] = x1;
    B[1] = x2;
    B[2] = x3;
    B[3] = x4;
    B[4] = x5;
    B[5] = x6;
    B[6] = x7;
    B[7] = x8;
    B[8] = x9;

    time[0] = t1 - t0;
    time[1] = t3 - t2;
    time[2] = t5 - t4;
}

int main(int argc, char **argv) {
    int *A, *B, *A_gpu, *B_gpu;
    int *time, *time_gpu;
    int i;

    A = (int *)malloc(sizeof(int) * N);
    B = (int *)malloc(sizeof(int) * N);
    time = (int *)malloc(sizeof(int) * N);
    hipMalloc((void **)&A_gpu, sizeof(int) * N);
    hipMalloc((void **)&B_gpu, sizeof(int) * N);
    hipMalloc((void **)&time_gpu, sizeof(int) * N);

    for (i = 0; i < N; i++)
        B[i] = 0;
    hipMemcpy(B_gpu, B, sizeof(int) * N, hipMemcpyHostToDevice);
    hipDeviceSynchronize();

    dim3 block(1);
    dim3 grid(1);
    read_alloc_kernel1<<< grid, block >>>(A_gpu, B_gpu, time_gpu);
    hipDeviceSynchronize();

    hipMemcpy(time, time_gpu, sizeof(int) * N, hipMemcpyDeviceToHost);
    hipDeviceSynchronize();

    free(A);
    free(B);
    free(time);
    hipFree(A_gpu);
    hipFree(B_gpu);
    hipFree(time_gpu);

    return 0;
}

	.text
	.file	"read_alloc.hip"
	.globl	_Z33__device_stub__read_alloc_kernel1PiS_S_ # -- Begin function _Z33__device_stub__read_alloc_kernel1PiS_S_
	.type	_Z33__device_stub__read_alloc_kernel1PiS_S_,@function
_Z33__device_stub__read_alloc_kernel1PiS_S_: # @_Z33__device_stub__read_alloc_kernel1PiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18read_alloc_kernel1PiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__read_alloc_kernel1PiS_S_, .Lfunc_end0-_Z33__device_stub__read_alloc_kernel1PiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$1, %edi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	calloc@PLT
	movq	%rax, %rbx
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r14
	leaq	24(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	leaq	16(%rsp), %r15
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z33__device_stub__read_alloc_kernel1PiS_S_
.LBB1_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18read_alloc_kernel1PiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18read_alloc_kernel1PiS_S_,@object # @_Z18read_alloc_kernel1PiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z18read_alloc_kernel1PiS_S_
	.p2align	3, 0x0
_Z18read_alloc_kernel1PiS_S_:
	.quad	_Z33__device_stub__read_alloc_kernel1PiS_S_
	.size	_Z18read_alloc_kernel1PiS_S_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z18read_alloc_kernel1PiS_S_"
	.size	.L__unnamed_1, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__read_alloc_kernel1PiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18read_alloc_kernel1PiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18read_alloc_kernel1PiS_S_ ; -- Begin function _Z18read_alloc_kernel1PiS_S_
	.globl	_Z18read_alloc_kernel1PiS_S_
	.p2align	8
	.type	_Z18read_alloc_kernel1PiS_S_,@function
_Z18read_alloc_kernel1PiS_S_:           ; @_Z18read_alloc_kernel1PiS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v4, 0x3000
	v_mov_b32_e32 v1, 0x1000
	v_mov_b32_e32 v3, 0x2000
	s_getreg_b32 s2, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_clause 0x3
	global_load_b32 v5, v11, s[4:5] offset:256
	global_load_b32 v6, v1, s[4:5] offset:256
	global_load_b32 v7, v3, s[4:5] offset:384
	global_load_b32 v9, v4, s[4:5] offset:384
	v_mov_b32_e32 v0, 0x4000
	s_getreg_b32 s3, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	s_getreg_b32 s8, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	s_sub_i32 s2, s3, s2
	global_load_b32 v0, v0, s[4:5]
	s_getreg_b32 s9, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	v_mov_b32_e32 v8, s2
	s_clause 0x2
	global_load_b32 v2, v1, s[4:5] offset:256
	global_load_b32 v3, v3, s[4:5] offset:384
	global_load_b32 v12, v4, s[4:5] offset:384
	s_getreg_b32 s10, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	global_load_b32 v1, v11, s[4:5] offset:256
	s_getreg_b32 s4, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	s_sub_i32 s3, s9, s8
	s_sub_i32 s4, s4, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v10, s4
	s_waitcnt vmcnt(8)
	v_add_nc_u32_e32 v4, 1, v5
	s_waitcnt vmcnt(7)
	v_add_nc_u32_e32 v5, 1, v6
	s_waitcnt vmcnt(6)
	v_add_nc_u32_e32 v6, 1, v7
	s_waitcnt vmcnt(5)
	v_add_nc_u32_e32 v7, 1, v9
	v_mov_b32_e32 v9, s3
	s_waitcnt vmcnt(1)
	s_clause 0x1
	global_store_b32 v11, v12, s[6:7] offset:32
	global_store_b128 v11, v[4:7], s[6:7]
	s_waitcnt vmcnt(0)
	s_clause 0x1
	global_store_b128 v11, v[0:3], s[6:7] offset:16
	global_store_b96 v11, v[8:10], s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18read_alloc_kernel1PiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 11
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18read_alloc_kernel1PiS_S_, .Lfunc_end0-_Z18read_alloc_kernel1PiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 11
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 11
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18read_alloc_kernel1PiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     11
    .sgpr_spill_count: 0
    .symbol:         _Z18read_alloc_kernel1PiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
