//
///**
// * Copyright 1993-2012 NVIDIA Corporation.  All rights reserved.
// *
// * Please refer to the NVIDIA end user license agreement (EULA) associated
// * with this source code for terms and conditions that govern your use of
// * this software. Any use, reproduction, disclosure, or distribution of
// * this software and related documentation outside the terms of the EULA
// * is strictly prohibited.
// */
//#include <stdio.h>
//#include <stdlib.h>
//
//#include <cuda.h>
//
//static const int WORK_SIZE = 256;
//
///**
// * This macro checks return value of the CUDA runtime call and exits
// * the application if the call failed.
// *
// * See cuda.h for error code descriptions.
// */
//#define CHECK_CUDA_RESULT(N) {											\
//	CUresult result = N;												\
//	if (result != 0) {													\
//		printf("CUDA call on line %d returned error %d\n", __LINE__,	\
//			result);													\
//		exit(1);														\
//	} }
//
//int main(int argc, char **argv)
//{
//	CUmodule module;
//	CUcontext context;
//	CUdevice device;
//	CUdeviceptr deviceArray;
//	CUfunction process;
//
//	void *kernelArguments[] = { &deviceArray };
//	int deviceCount;
//	unsigned int idata[WORK_SIZE], odata[WORK_SIZE];
//
//	for (int i = 0; i < WORK_SIZE; ++i) {
//		idata[i] = i;
//	}
//
//	CHECK_CUDA_RESULT(cuInit(0));
//	CHECK_CUDA_RESULT(cuDeviceGetCount(&deviceCount));
//	if (deviceCount == 0) {
//		printf("No CUDA-compatible devices found\n");
//		exit(1);
//	}
//	CHECK_CUDA_RESULT(cuDeviceGet(&device, 0));
//	CHECK_CUDA_RESULT(cuCtxCreate(&context, 0, device));
//
//	CHECK_CUDA_RESULT(cuModuleLoad(&module, "bitreverse.fatbin"));
//	CHECK_CUDA_RESULT(cuModuleGetFunction(&process, module, "bitreverse"));
//
//	CHECK_CUDA_RESULT(cuMemAlloc(&deviceArray, sizeof(int) * WORK_SIZE));
//	CHECK_CUDA_RESULT(
//			cuMemcpyHtoD(deviceArray, idata, sizeof(int) * WORK_SIZE));
//
//	CHECK_CUDA_RESULT(
//			cuLaunchKernel(process, 1, 1, 1, WORK_SIZE, 1, 1, 0, NULL, kernelArguments, NULL));
//
//	CHECK_CUDA_RESULT(
//			cuMemcpyDtoH(odata, deviceArray, sizeof(int) * WORK_SIZE));
//
//	for (int i = 0; i < WORK_SIZE; ++i) {
//		printf("Input value: %u, output value: %u\n", idata[i], odata[i]);
//	}
//
//	CHECK_CUDA_RESULT(cuMemFree(deviceArray));
//	CHECK_CUDA_RESULT(cuCtxDestroy(context));
//
//	return 0;
//}

	.file	"tmpxft_002c0de8_00000000-6_test.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
//
///**
// * Copyright 1993-2012 NVIDIA Corporation.  All rights reserved.
// *
// * Please refer to the NVIDIA end user license agreement (EULA) associated
// * with this source code for terms and conditions that govern your use of
// * this software. Any use, reproduction, disclosure, or distribution of
// * this software and related documentation outside the terms of the EULA
// * is strictly prohibited.
// */
//#include <stdio.h>
//#include <stdlib.h>
//
//#include <cuda.h>
//
//static const int WORK_SIZE = 256;
//
///**
// * This macro checks return value of the CUDA runtime call and exits
// * the application if the call failed.
// *
// * See cuda.h for error code descriptions.
// */
//#define CHECK_CUDA_RESULT(N) {											\
//	CUresult result = N;												\
//	if (result != 0) {													\
//		printf("CUDA call on line %d returned error %d\n", __LINE__,	\
//			result);													\
//		exit(1);														\
//	} }
//
//int main(int argc, char **argv)
//{
//	CUmodule module;
//	CUcontext context;
//	CUdevice device;
//	CUdeviceptr deviceArray;
//	CUfunction process;
//
//	void *kernelArguments[] = { &deviceArray };
//	int deviceCount;
//	unsigned int idata[WORK_SIZE], odata[WORK_SIZE];
//
//	for (int i = 0; i < WORK_SIZE; ++i) {
//		idata[i] = i;
//	}
//
//	CHECK_CUDA_RESULT(cuInit(0));
//	CHECK_CUDA_RESULT(cuDeviceGetCount(&deviceCount));
//	if (deviceCount == 0) {
//		printf("No CUDA-compatible devices found\n");
//		exit(1);
//	}
//	CHECK_CUDA_RESULT(cuDeviceGet(&device, 0));
//	CHECK_CUDA_RESULT(cuCtxCreate(&context, 0, device));
//
//	CHECK_CUDA_RESULT(cuModuleLoad(&module, "bitreverse.fatbin"));
//	CHECK_CUDA_RESULT(cuModuleGetFunction(&process, module, "bitreverse"));
//
//	CHECK_CUDA_RESULT(cuMemAlloc(&deviceArray, sizeof(int) * WORK_SIZE));
//	CHECK_CUDA_RESULT(
//			cuMemcpyHtoD(deviceArray, idata, sizeof(int) * WORK_SIZE));
//
//	CHECK_CUDA_RESULT(
//			cuLaunchKernel(process, 1, 1, 1, WORK_SIZE, 1, 1, 0, NULL, kernelArguments, NULL));
//
//	CHECK_CUDA_RESULT(
//			cuMemcpyDtoH(odata, deviceArray, sizeof(int) * WORK_SIZE));
//
//	for (int i = 0; i < WORK_SIZE; ++i) {
//		printf("Input value: %u, output value: %u\n", idata[i], odata[i]);
//	}
//
//	CHECK_CUDA_RESULT(cuMemFree(deviceArray));
//	CHECK_CUDA_RESULT(cuCtxDestroy(context));
//
//	return 0;
//}

	.text
	.file	"test.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
