#include <stdio.h>
#include <time.h>

#define ADIABATIC_GAMMA (5.0 / 3.0)

typedef double real;

__device__ void conserved_to_primitive(const real *cons, real *prim)
{
    const real rho = cons[0];
    const real px = cons[1];
    const real py = cons[2];
    const real energy = cons[3];

    const real vx = px / rho;
    const real vy = py / rho;
    const real kinetic_energy = 0.5 * rho * (vx * vx + vy * vy);
    const real thermal_energy = energy - kinetic_energy;
    const real pressure = thermal_energy * (ADIABATIC_GAMMA - 1.0);

    prim[0] = rho;
    prim[1] = vx;
    prim[2] = vy;
    prim[3] = pressure;
}

__device__ __host__ void primitive_to_conserved(const real *prim, real *cons)
{
    const real rho = prim[0];
    const real vx = prim[1];
    const real vy = prim[2];
    const real pressure = prim[3];

    const real px = vx * rho;
    const real py = vy * rho;
    const real kinetic_energy = 0.5 * rho * (vx * vx + vy * vy);
    const real thermal_energy = pressure / (ADIABATIC_GAMMA - 1.0);

    cons[0] = rho;
    cons[1] = px;
    cons[2] = py;
    cons[3] = kinetic_energy + thermal_energy;
}

__device__ real primitive_to_velocity_component(const real *prim, int direction)
{
    switch (direction)
    {
        case 0: return prim[1];
        case 1: return prim[2];
        default: return 0.0;
    }
}

__device__ void primitive_to_flux_vector(const real *prim, real *flux, int direction)
{
    const real vn = primitive_to_velocity_component(prim, direction);
    const real pressure = prim[3];
    real cons[4];
    primitive_to_conserved(prim, cons);

    flux[0] = vn * cons[0];
    flux[1] = vn * cons[1] + pressure * (direction == 0);
    flux[2] = vn * cons[2] + pressure * (direction == 1);
    flux[3] = vn * cons[3] + pressure * vn;
}

__device__ real primitive_to_sound_speed_squared(const real *prim)
{
    const real rho = prim[0];
    const real pressure = prim[3];
    return ADIABATIC_GAMMA * pressure / rho;
}

__device__ void primitive_to_outer_wavespeeds(const real *prim, real *wavespeeds, int direction)
{
    const real cs = sqrt(primitive_to_sound_speed_squared(prim));
    const real vn = primitive_to_velocity_component(prim, direction);
    wavespeeds[0] = vn - cs;
    wavespeeds[1] = vn + cs;
}

__device__ void riemann_hlle(const real *pl, const real *pr, real *flux, int direction)
{
    real ul[4];
    real ur[4];
    real fl[4];
    real fr[4];
    real al[2];
    real ar[2];

    primitive_to_conserved(pl, ul);
    primitive_to_conserved(pr, ur);
    primitive_to_flux_vector(pl, fl, direction);
    primitive_to_flux_vector(pr, fr, direction);
    primitive_to_outer_wavespeeds(pl, al, direction);
    primitive_to_outer_wavespeeds(pr, ar, direction);

    const real am = min(0.0, min(al[0], ar[0]));
    const real ap = max(0.0, max(al[1], ar[1]));

    for (int i = 0; i < 4; ++i)
    {
        flux[i] = (fl[i] * ap - fr[i] * am - (ul[i] - ur[i]) * ap * am) / (ap - am);
    }
}

void initial_primitive(real *primitive, int num_zones, real x0, real x1)
{
    real dx = (x1 - x0) / num_zones;

    for (int i = 0; i < num_zones; ++i)
    {
        real x = (i + 0.5) * dx;
        real *prim = &primitive[i * 4];

        if (x < 0.5 * (x0 + x1))
        {
            prim[0] = 1.0;
            prim[1] = 0.0;
            prim[2] = 0.0;
            prim[3] = 1.0;
        }
        else
        {
            prim[0] = 0.1;
            prim[1] = 0.0;
            prim[2] = 0.0;
            prim[3] = 0.125;
        }
    }
}

struct UpdateStruct
{
    int num_zones;
    real x0;
    real x1;
    real *primitive;
    real *conserved;
};

struct UpdateStruct update_struct_new(int num_zones, real x0, real x1)
{
    struct UpdateStruct update;
    update.num_zones = num_zones;
    update.x0 = x0;
    update.x1 = x1;

    cudaMalloc(&update.primitive, num_zones * 4 * sizeof(real));
    cudaMalloc(&update.conserved, num_zones * 4 * sizeof(real));

    return update;
}

void update_struct_del(struct UpdateStruct update)
{
    cudaFree(update.primitive);
    cudaFree(update.conserved);
}

void update_struct_set_primitive(struct UpdateStruct update, const real *primitive_host)
{
    real *conserved_host = (real*) malloc(update.num_zones * 4 * sizeof(real));

    for (int i = 0; i < update.num_zones; ++i)
    {
        const real *prim = &primitive_host[4 * i];
        /* */ real *cons = &conserved_host[4 * i];
        primitive_to_conserved(prim, cons);
    }

    cudaMemcpy(
        update.primitive,
        primitive_host,
        update.num_zones * 4 * sizeof(real),
        cudaMemcpyHostToDevice
    );

    cudaMemcpy(
        update.conserved,
        conserved_host,
        update.num_zones * 4 * sizeof(real),
        cudaMemcpyHostToDevice
    );
    free(conserved_host);
}

void update_struct_get_primitive(struct UpdateStruct update, real *primitive_host)
{
    cudaMemcpy(primitive_host,
        update.primitive,
        update.num_zones * 4 * sizeof(real),
        cudaMemcpyDeviceToHost
    );
}

__global__ void update_struct_do_advance_cons(UpdateStruct update, real dt)
{
    int i_g = blockIdx.x * blockDim.x + threadIdx.x;
    if (i_g >= update.num_zones)
        return;

    int i0_g = (blockIdx.x + 0) * blockDim.x;
    // int i1_g = (blockIdx.x + 1) * blockDim.x;

    int num_guard = 1;

    // This block of memory spans the global indexes in the range
    // i0_g - 1 .. i1_g + 1. It has blockDim.x + 2 elements.
    extern __shared__ real shared_prim[];

    // Cyclic indexing technique:
    {
        int im_g = threadIdx.x + i0_g - num_guard;
        int im_l = threadIdx.x;

        if (im_g < 0)
            im_g = 0;

        for (int q = 0; q < 4; ++q)
        {
            shared_prim[4 * im_l + q] = update.primitive[4 * im_g + q];
        }
    }
    if (threadIdx.x < 2 * num_guard)
    {
        int im_g = threadIdx.x + blockDim.x + i0_g - num_guard;
        int im_l = threadIdx.x + blockDim.x;

        if (im_g >= update.num_zones)
            im_g = update.num_zones - 1;

        for (int q = 0; q < 4; ++q)
        {
            shared_prim[4 * im_l + q] = update.primitive[4 * im_g + q];
        }
    }
    __syncthreads();

    int i_m = threadIdx.x + 1;

    real *pl = &shared_prim[4 * (i_m - 1)];
    real *pc = &shared_prim[4 * (i_m + 0)];
    real *pr = &shared_prim[4 * (i_m + 1)];

    real fl[4];
    real fr[4];
    real *uc = &update.conserved[4 * i_g];

    riemann_hlle(pl, pc, fl, 0);
    riemann_hlle(pc, pr, fr, 0);

    const real dx = (update.x1 - update.x0) / update.num_zones;

    for (int q = 0; q < 4; ++q)
    {
        uc[q] -= (fr[q] - fl[q]) * dt / dx;
    }
    conserved_to_primitive(uc, pc);

    for (int q = 0; q < 4; ++q)
    {
        update.primitive[4 * i_g + q] = pc[q];
    }
}

int main()
{
    const int num_zones = 1 << 24;
    const int block_size = 64;
    const int shared_memory = (block_size + 2) * 4 * sizeof(real);
    const int fold = 100;
    const real x0 = 0.0;
    const real x1 = 1.0;
    const real dx = (x1 - x0) / num_zones;

    real *primitive = (real*) malloc(num_zones * 4 * sizeof(real));
    struct UpdateStruct update = update_struct_new(num_zones, x0, x1);

    initial_primitive(primitive, num_zones, x0, x1);
    update_struct_set_primitive(update, primitive);

    int iteration = 0;
    real time = 0.0;
    real dt = dx * 0.1;

    while (time < 0.1)
    {
        clock_t start = clock();

        for (int i = 0; i < fold; ++i)
        {
            update_struct_do_advance_cons<<<num_zones / block_size, block_size, shared_memory>>>(update, dt);
            time += dt;
            iteration += 1;
        }
        cudaDeviceSynchronize();
        clock_t end = clock();

        real seconds = ((real) (end - start)) / CLOCKS_PER_SEC;
        real mzps = (num_zones / 1e6) / seconds * fold;
        printf("[%d] t=%.3e Mzps=%.2f\n", iteration, time, mzps);
    }

    update_struct_get_primitive(update, primitive);
    update_struct_del(update);

    FILE* outfile = fopen("euler1d.dat", "w");

    for (int i = 0; i < num_zones; ++i)
    {
        real *prim = &primitive[i * 4];
        real x = (i + 0.5) * dx;
        fprintf(outfile, "%f %f %f %f\n", x, prim[0], prim[1], prim[3]);
    }
    fclose(outfile);
    free(primitive);

    cudaError_t error = cudaGetLastError();

    if (error)
    {
        printf("%s\n", cudaGetErrorString(error));
    }
    return 0;
}

	.file	"tmpxft_00356482_00000000-6_euler1d.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2042:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2042:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z22conserved_to_primitivePKdPd
	.type	_Z22conserved_to_primitivePKdPd, @function
_Z22conserved_to_primitivePKdPd:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z22conserved_to_primitivePKdPd, .-_Z22conserved_to_primitivePKdPd
	.globl	_Z22primitive_to_conservedPKdPd
	.type	_Z22primitive_to_conservedPKdPd, @function
_Z22primitive_to_conservedPKdPd:
.LFB2028:
	.cfi_startproc
	endbr64
	movsd	(%rdi), %xmm1
	movsd	8(%rdi), %xmm0
	movsd	16(%rdi), %xmm2
	movsd	24(%rdi), %xmm3
	divsd	.LC0(%rip), %xmm3
	movaps	%xmm1, %xmm4
	movsd	%xmm1, (%rsi)
	mulsd	%xmm0, %xmm4
	mulsd	%xmm0, %xmm0
	movsd	%xmm4, 8(%rsi)
	movaps	%xmm1, %xmm4
	mulsd	%xmm2, %xmm4
	mulsd	%xmm2, %xmm2
	mulsd	.LC1(%rip), %xmm1
	movsd	%xmm4, 16(%rsi)
	addsd	%xmm2, %xmm0
	mulsd	%xmm1, %xmm0
	addsd	%xmm3, %xmm0
	movsd	%xmm0, 24(%rsi)
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z22primitive_to_conservedPKdPd, .-_Z22primitive_to_conservedPKdPd
	.globl	_Z31primitive_to_velocity_componentPKdi
	.type	_Z31primitive_to_velocity_componentPKdi, @function
_Z31primitive_to_velocity_componentPKdi:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z31primitive_to_velocity_componentPKdi, .-_Z31primitive_to_velocity_componentPKdi
	.globl	_Z24primitive_to_flux_vectorPKdPdi
	.type	_Z24primitive_to_flux_vectorPKdPdi, @function
_Z24primitive_to_flux_vectorPKdPdi:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z24primitive_to_flux_vectorPKdPdi, .-_Z24primitive_to_flux_vectorPKdPdi
	.globl	_Z32primitive_to_sound_speed_squaredPKd
	.type	_Z32primitive_to_sound_speed_squaredPKd, @function
_Z32primitive_to_sound_speed_squaredPKd:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z32primitive_to_sound_speed_squaredPKd, .-_Z32primitive_to_sound_speed_squaredPKd
	.globl	_Z29primitive_to_outer_wavespeedsPKdPdi
	.type	_Z29primitive_to_outer_wavespeedsPKdPdi, @function
_Z29primitive_to_outer_wavespeedsPKdPdi:
.LFB2186:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2186:
	.size	_Z29primitive_to_outer_wavespeedsPKdPdi, .-_Z29primitive_to_outer_wavespeedsPKdPdi
	.globl	_Z12riemann_hllePKdS0_Pdi
	.type	_Z12riemann_hllePKdS0_Pdi, @function
_Z12riemann_hllePKdS0_Pdi:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2033:
	.size	_Z12riemann_hllePKdS0_Pdi, .-_Z12riemann_hllePKdS0_Pdi
	.globl	_Z17initial_primitivePdidd
	.type	_Z17initial_primitivePdidd, @function
_Z17initial_primitivePdidd:
.LFB2034:
	.cfi_startproc
	endbr64
	cvtsi2sdl	%esi, %xmm2
	movaps	%xmm1, %xmm3
	xorl	%eax, %eax
	movsd	.LC1(%rip), %xmm5
	subsd	%xmm0, %xmm3
	movsd	.LC2(%rip), %xmm6
	divsd	%xmm2, %xmm3
.L16:
	cmpl	%esi, %eax
	jge	.L21
	cvtsi2sdl	%eax, %xmm2
	movaps	%xmm1, %xmm4
	addsd	%xmm0, %xmm4
	addsd	%xmm5, %xmm2
	mulsd	%xmm5, %xmm4
	mulsd	%xmm3, %xmm2
	comisd	%xmm2, %xmm4
	ja	.L19
	movsd	.LC3(%rip), %xmm4
	movsd	.LC4(%rip), %xmm2
	jmp	.L17
.L19:
	movaps	%xmm6, %xmm4
	movaps	%xmm6, %xmm2
.L17:
	movq	$0x000000000, 8(%rdi)
	incl	%eax
	addq	$32, %rdi
	movsd	%xmm4, -32(%rdi)
	movq	$0x000000000, -16(%rdi)
	movsd	%xmm2, -8(%rdi)
	jmp	.L16
.L21:
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z17initial_primitivePdidd, .-_Z17initial_primitivePdidd
	.globl	_Z17update_struct_newidd
	.type	_Z17update_struct_newidd, @function
_Z17update_struct_newidd:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	leaq	24(%rdi), %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leal	0(,%rsi,4), %ebx
	pushq	%rax
	.cfi_def_cfa_offset 32
	movslq	%ebx, %rbx
	salq	$3, %rbx
	movl	%esi, -24(%rdi)
	movq	%rbx, %rsi
	movsd	%xmm0, -16(%rdi)
	movsd	%xmm1, -8(%rdi)
	call	cudaMalloc@PLT
	leaq	32(%rbp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	%rbp, %rax
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z17update_struct_newidd, .-_Z17update_struct_newidd
	.globl	_Z17update_struct_del12UpdateStruct
	.type	_Z17update_struct_del12UpdateStruct, @function
_Z17update_struct_del12UpdateStruct:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2036:
	.size	_Z17update_struct_del12UpdateStruct, .-_Z17update_struct_del12UpdateStruct
	.globl	_Z27update_struct_set_primitive12UpdateStructPKd
	.type	_Z27update_struct_set_primitive12UpdateStructPKd, @function
_Z27update_struct_set_primitive12UpdateStructPKd:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rdx
	.cfi_def_cfa_offset 48
	movl	48(%rsp), %r13d
	leal	0(,%r13,4), %ebx
	movslq	%ebx, %rbx
	salq	$3, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%r12, %rdx
	movq	%rax, %rbp
	movq	%rax, %rcx
	xorl	%eax, %eax
.L27:
	cmpl	%r13d, %eax
	jge	.L30
	movq	%rcx, %rsi
	movq	%rdx, %rdi
	incl	%eax
	addq	$32, %rdx
	call	_Z22primitive_to_conservedPKdPd
	addq	$32, %rcx
	jmp	.L27
.L30:
	movq	72(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	80(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	popq	%rax
	.cfi_def_cfa_offset 40
	movq	%rbp, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE2037:
	.size	_Z27update_struct_set_primitive12UpdateStructPKd, .-_Z27update_struct_set_primitive12UpdateStructPKd
	.globl	_Z27update_struct_get_primitive12UpdateStructPd
	.type	_Z27update_struct_get_primitive12UpdateStructPd, @function
_Z27update_struct_get_primitive12UpdateStructPd:
.LFB2038:
	.cfi_startproc
	endbr64
	movl	8(%rsp), %eax
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	leal	0(,%rax,4), %edx
	movslq	%edx, %rdx
	salq	$3, %rdx
	jmp	cudaMemcpy@PLT
	.cfi_endproc
.LFE2038:
	.size	_Z27update_struct_get_primitive12UpdateStructPd, .-_Z27update_struct_get_primitive12UpdateStructPd
	.globl	_Z62__device_stub__Z29update_struct_do_advance_cons12UpdateStructdR12UpdateStructd
	.type	_Z62__device_stub__Z29update_struct_do_advance_cons12UpdateStructdR12UpdateStructd, @function
_Z62__device_stub__Z29update_struct_do_advance_cons12UpdateStructdR12UpdateStructd:
.LFB2064:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movsd	%xmm0, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rdi
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z29update_struct_do_advance_cons12UpdateStructd(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L32:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2064:
	.size	_Z62__device_stub__Z29update_struct_do_advance_cons12UpdateStructdR12UpdateStructd, .-_Z62__device_stub__Z29update_struct_do_advance_cons12UpdateStructdR12UpdateStructd
	.globl	_Z29update_struct_do_advance_cons12UpdateStructd
	.type	_Z29update_struct_do_advance_cons12UpdateStructd, @function
_Z29update_struct_do_advance_cons12UpdateStructd:
.LFB2065:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	16(%rsp), %rdi
	call	_Z62__device_stub__Z29update_struct_do_advance_cons12UpdateStructdR12UpdateStructd
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z29update_struct_do_advance_cons12UpdateStructd, .-_Z29update_struct_do_advance_cons12UpdateStructd
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC10:
	.string	"[%d] t=%.3e Mzps=%.2f\n"
.LC11:
	.string	"w"
.LC12:
	.string	"euler1d.dat"
.LC14:
	.string	"%f %f %f %f\n"
.LC15:
	.string	"%s\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2039:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$536870912, %edi
	movabsq	$4294967360, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rbx
	call	malloc@PLT
	xorps	%xmm0, %xmm0
	movl	$16777216, %esi
	movq	%rbx, %rdi
	movsd	.LC2(%rip), %xmm1
	movq	%rax, %rbp
	call	_Z17update_struct_newidd
	xorps	%xmm0, %xmm0
	movl	$16777216, %esi
	movq	%rbp, %rdi
	movsd	.LC2(%rip), %xmm1
	movl	$10, %ecx
	call	_Z17initial_primitivePdidd
	subq	$48, %rsp
	.cfi_def_cfa_offset 240
	movq	%rbx, %rsi
	movq	%rsp, %rdi
	rep movsl
	movq	%rbp, %rdi
	call	_Z27update_struct_set_primitive12UpdateStructPKd
	addq	$48, %rsp
	.cfi_def_cfa_offset 192
	movq	$0x000000000, 8(%rsp)
.L41:
	call	clock@PLT
	movl	$100, %r14d
	movq	%rax, %r13
.L40:
	movl	$16385, %edi
	xorl	%r9d, %r9d
	movq	%r15, %rdx
	movl	$1, %ecx
	salq	$18, %rdi
	movl	$2112, %r8d
	movl	$1, %esi
	movq	%r15, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	movsd	.LC6(%rip), %xmm0
	leaq	80(%rsp), %rdi
	movl	$10, %ecx
	movq	%rbx, %rsi
	rep movsl
	leaq	80(%rsp), %rdi
	call	_Z62__device_stub__Z29update_struct_do_advance_cons12UpdateStructdR12UpdateStructd
.L39:
	movsd	.LC6(%rip), %xmm4
	addsd	8(%rsp), %xmm4
	movsd	%xmm4, 8(%rsp)
	decl	%r14d
	jne	.L40
	call	cudaDeviceSynchronize@PLT
	addl	$100, %r12d
	call	clock@PLT
	movsd	.LC8(%rip), %xmm1
	movl	%r12d, %edx
	leaq	.LC10(%rip), %rsi
	subq	%r13, %rax
	movl	$2, %edi
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC7(%rip), %xmm0
	movb	$2, %al
	divsd	%xmm0, %xmm1
	movsd	8(%rsp), %xmm0
	mulsd	.LC9(%rip), %xmm1
	call	__printf_chk@PLT
	movsd	.LC3(%rip), %xmm0
	comisd	8(%rsp), %xmm0
	ja	.L41
	subq	$48, %rsp
	.cfi_def_cfa_offset 240
	movq	%rbx, %rsi
	movl	$10, %ecx
	xorl	%r13d, %r13d
	movq	%rsp, %rdi
	rep movsl
	movq	%rbp, %rdi
	call	_Z27update_struct_get_primitive12UpdateStructPd
	movq	120(%rsp), %rbx
	movq	112(%rsp), %rdi
	addq	$48, %rsp
	.cfi_def_cfa_offset 192
	call	cudaFree@PLT
	movq	%rbx, %rdi
	movq	%rbp, %rbx
	call	cudaFree@PLT
	leaq	.LC11(%rip), %rsi
	leaq	.LC12(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %r12
.L42:
	cvtsi2sdl	%r13d, %xmm0
	movsd	24(%rbx), %xmm3
	movsd	(%rbx), %xmm1
	movb	$4, %al
	movsd	8(%rbx), %xmm2
	movl	$2, %esi
	movq	%r12, %rdi
	incl	%r13d
	addsd	.LC1(%rip), %xmm0
	mulsd	.LC13(%rip), %xmm0
	leaq	.LC14(%rip), %rdx
	addq	$32, %rbx
	call	__fprintf_chk@PLT
	cmpl	$16777216, %r13d
	jne	.L42
	movq	%r12, %rdi
	call	fclose@PLT
	movq	%rbp, %rdi
	call	free@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L43
	call	cudaGetErrorString@PLT
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L43:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2039:
	.size	main, .-main
	.section	.rodata.str1.1
.LC16:
	.string	"_Z29update_struct_do_advance_cons12UpdateStructd"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2067:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z29update_struct_do_advance_cons12UpdateStructd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2067:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	1431655766
	.long	1071994197
	.align 8
.LC1:
	.long	0
	.long	1071644672
	.align 8
.LC2:
	.long	0
	.long	1072693248
	.align 8
.LC3:
	.long	-1717986918
	.long	1069128089
	.align 8
.LC4:
	.long	0
	.long	1069547520
	.align 8
.LC6:
	.long	-1717986918
	.long	1043962265
	.align 8
.LC7:
	.long	0
	.long	1093567616
	.align 8
.LC8:
	.long	-1598689907
	.long	1076938487
	.align 8
.LC9:
	.long	0
	.long	1079574528
	.align 8
.LC13:
	.long	0
	.long	1047527424
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>

#define ADIABATIC_GAMMA (5.0 / 3.0)

typedef double real;

__device__ void conserved_to_primitive(const real *cons, real *prim)
{
    const real rho = cons[0];
    const real px = cons[1];
    const real py = cons[2];
    const real energy = cons[3];

    const real vx = px / rho;
    const real vy = py / rho;
    const real kinetic_energy = 0.5 * rho * (vx * vx + vy * vy);
    const real thermal_energy = energy - kinetic_energy;
    const real pressure = thermal_energy * (ADIABATIC_GAMMA - 1.0);

    prim[0] = rho;
    prim[1] = vx;
    prim[2] = vy;
    prim[3] = pressure;
}

__device__ __host__ void primitive_to_conserved(const real *prim, real *cons)
{
    const real rho = prim[0];
    const real vx = prim[1];
    const real vy = prim[2];
    const real pressure = prim[3];

    const real px = vx * rho;
    const real py = vy * rho;
    const real kinetic_energy = 0.5 * rho * (vx * vx + vy * vy);
    const real thermal_energy = pressure / (ADIABATIC_GAMMA - 1.0);

    cons[0] = rho;
    cons[1] = px;
    cons[2] = py;
    cons[3] = kinetic_energy + thermal_energy;
}

__device__ real primitive_to_velocity_component(const real *prim, int direction)
{
    switch (direction)
    {
        case 0: return prim[1];
        case 1: return prim[2];
        default: return 0.0;
    }
}

__device__ void primitive_to_flux_vector(const real *prim, real *flux, int direction)
{
    const real vn = primitive_to_velocity_component(prim, direction);
    const real pressure = prim[3];
    real cons[4];
    primitive_to_conserved(prim, cons);

    flux[0] = vn * cons[0];
    flux[1] = vn * cons[1] + pressure * (direction == 0);
    flux[2] = vn * cons[2] + pressure * (direction == 1);
    flux[3] = vn * cons[3] + pressure * vn;
}

__device__ real primitive_to_sound_speed_squared(const real *prim)
{
    const real rho = prim[0];
    const real pressure = prim[3];
    return ADIABATIC_GAMMA * pressure / rho;
}

__device__ void primitive_to_outer_wavespeeds(const real *prim, real *wavespeeds, int direction)
{
    const real cs = sqrt(primitive_to_sound_speed_squared(prim));
    const real vn = primitive_to_velocity_component(prim, direction);
    wavespeeds[0] = vn - cs;
    wavespeeds[1] = vn + cs;
}

__device__ void riemann_hlle(const real *pl, const real *pr, real *flux, int direction)
{
    real ul[4];
    real ur[4];
    real fl[4];
    real fr[4];
    real al[2];
    real ar[2];

    primitive_to_conserved(pl, ul);
    primitive_to_conserved(pr, ur);
    primitive_to_flux_vector(pl, fl, direction);
    primitive_to_flux_vector(pr, fr, direction);
    primitive_to_outer_wavespeeds(pl, al, direction);
    primitive_to_outer_wavespeeds(pr, ar, direction);

    const real am = min(0.0, min(al[0], ar[0]));
    const real ap = max(0.0, max(al[1], ar[1]));

    for (int i = 0; i < 4; ++i)
    {
        flux[i] = (fl[i] * ap - fr[i] * am - (ul[i] - ur[i]) * ap * am) / (ap - am);
    }
}

void initial_primitive(real *primitive, int num_zones, real x0, real x1)
{
    real dx = (x1 - x0) / num_zones;

    for (int i = 0; i < num_zones; ++i)
    {
        real x = (i + 0.5) * dx;
        real *prim = &primitive[i * 4];

        if (x < 0.5 * (x0 + x1))
        {
            prim[0] = 1.0;
            prim[1] = 0.0;
            prim[2] = 0.0;
            prim[3] = 1.0;
        }
        else
        {
            prim[0] = 0.1;
            prim[1] = 0.0;
            prim[2] = 0.0;
            prim[3] = 0.125;
        }
    }
}

struct UpdateStruct
{
    int num_zones;
    real x0;
    real x1;
    real *primitive;
    real *conserved;
};

struct UpdateStruct update_struct_new(int num_zones, real x0, real x1)
{
    struct UpdateStruct update;
    update.num_zones = num_zones;
    update.x0 = x0;
    update.x1 = x1;

    hipMalloc(&update.primitive, num_zones * 4 * sizeof(real));
    hipMalloc(&update.conserved, num_zones * 4 * sizeof(real));

    return update;
}

void update_struct_del(struct UpdateStruct update)
{
    hipFree(update.primitive);
    hipFree(update.conserved);
}

void update_struct_set_primitive(struct UpdateStruct update, const real *primitive_host)
{
    real *conserved_host = (real*) malloc(update.num_zones * 4 * sizeof(real));

    for (int i = 0; i < update.num_zones; ++i)
    {
        const real *prim = &primitive_host[4 * i];
        /* */ real *cons = &conserved_host[4 * i];
        primitive_to_conserved(prim, cons);
    }

    hipMemcpy(
        update.primitive,
        primitive_host,
        update.num_zones * 4 * sizeof(real),
        hipMemcpyHostToDevice
    );

    hipMemcpy(
        update.conserved,
        conserved_host,
        update.num_zones * 4 * sizeof(real),
        hipMemcpyHostToDevice
    );
    free(conserved_host);
}

void update_struct_get_primitive(struct UpdateStruct update, real *primitive_host)
{
    hipMemcpy(primitive_host,
        update.primitive,
        update.num_zones * 4 * sizeof(real),
        hipMemcpyDeviceToHost
    );
}

__global__ void update_struct_do_advance_cons(UpdateStruct update, real dt)
{
    int i_g = blockIdx.x * blockDim.x + threadIdx.x;
    if (i_g >= update.num_zones)
        return;

    int i0_g = (blockIdx.x + 0) * blockDim.x;
    // int i1_g = (blockIdx.x + 1) * blockDim.x;

    int num_guard = 1;

    // This block of memory spans the global indexes in the range
    // i0_g - 1 .. i1_g + 1. It has blockDim.x + 2 elements.
    extern __shared__ real shared_prim[];

    // Cyclic indexing technique:
    {
        int im_g = threadIdx.x + i0_g - num_guard;
        int im_l = threadIdx.x;

        if (im_g < 0)
            im_g = 0;

        for (int q = 0; q < 4; ++q)
        {
            shared_prim[4 * im_l + q] = update.primitive[4 * im_g + q];
        }
    }
    if (threadIdx.x < 2 * num_guard)
    {
        int im_g = threadIdx.x + blockDim.x + i0_g - num_guard;
        int im_l = threadIdx.x + blockDim.x;

        if (im_g >= update.num_zones)
            im_g = update.num_zones - 1;

        for (int q = 0; q < 4; ++q)
        {
            shared_prim[4 * im_l + q] = update.primitive[4 * im_g + q];
        }
    }
    __syncthreads();

    int i_m = threadIdx.x + 1;

    real *pl = &shared_prim[4 * (i_m - 1)];
    real *pc = &shared_prim[4 * (i_m + 0)];
    real *pr = &shared_prim[4 * (i_m + 1)];

    real fl[4];
    real fr[4];
    real *uc = &update.conserved[4 * i_g];

    riemann_hlle(pl, pc, fl, 0);
    riemann_hlle(pc, pr, fr, 0);

    const real dx = (update.x1 - update.x0) / update.num_zones;

    for (int q = 0; q < 4; ++q)
    {
        uc[q] -= (fr[q] - fl[q]) * dt / dx;
    }
    conserved_to_primitive(uc, pc);

    for (int q = 0; q < 4; ++q)
    {
        update.primitive[4 * i_g + q] = pc[q];
    }
}

int main()
{
    const int num_zones = 1 << 24;
    const int block_size = 64;
    const int shared_memory = (block_size + 2) * 4 * sizeof(real);
    const int fold = 100;
    const real x0 = 0.0;
    const real x1 = 1.0;
    const real dx = (x1 - x0) / num_zones;

    real *primitive = (real*) malloc(num_zones * 4 * sizeof(real));
    struct UpdateStruct update = update_struct_new(num_zones, x0, x1);

    initial_primitive(primitive, num_zones, x0, x1);
    update_struct_set_primitive(update, primitive);

    int iteration = 0;
    real time = 0.0;
    real dt = dx * 0.1;

    while (time < 0.1)
    {
        clock_t start = clock();

        for (int i = 0; i < fold; ++i)
        {
            update_struct_do_advance_cons<<<num_zones / block_size, block_size, shared_memory>>>(update, dt);
            time += dt;
            iteration += 1;
        }
        hipDeviceSynchronize();
        clock_t end = clock();

        real seconds = ((real) (end - start)) / CLOCKS_PER_SEC;
        real mzps = (num_zones / 1e6) / seconds * fold;
        printf("[%d] t=%.3e Mzps=%.2f\n", iteration, time, mzps);
    }

    update_struct_get_primitive(update, primitive);
    update_struct_del(update);

    FILE* outfile = fopen("euler1d.dat", "w");

    for (int i = 0; i < num_zones; ++i)
    {
        real *prim = &primitive[i * 4];
        real x = (i + 0.5) * dx;
        fprintf(outfile, "%f %f %f %f\n", x, prim[0], prim[1], prim[3]);
    }
    fclose(outfile);
    free(primitive);

    hipError_t error = hipGetLastError();

    if (error)
    {
        printf("%s\n", hipGetErrorString(error));
    }
    return 0;
}

	.text
	.file	"euler1d.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z22primitive_to_conservedPKdPd
.LCPI0_0:
	.quad	0x3fe0000000000000              # double 0.5
.LCPI0_1:
	.quad	0x3fe5555555555556              # double 0.66666666666666674
	.text
	.globl	_Z22primitive_to_conservedPKdPd
	.type	_Z22primitive_to_conservedPKdPd,@function
_Z22primitive_to_conservedPKdPd:        # @_Z22primitive_to_conservedPKdPd
	.cfi_startproc
# %bb.0:
	movsd	(%rdi), %xmm0                   # xmm0 = mem[0],zero
	movsd	8(%rdi), %xmm1                  # xmm1 = mem[0],zero
	movsd	16(%rdi), %xmm2                 # xmm2 = mem[0],zero
	movsd	24(%rdi), %xmm3                 # xmm3 = mem[0],zero
	movapd	%xmm0, %xmm4
	movsd	.LCPI0_0(%rip), %xmm5           # xmm5 = mem[0],zero
	mulsd	%xmm0, %xmm5
	movsd	%xmm0, (%rsi)
	mulsd	%xmm1, %xmm0
	mulsd	%xmm2, %xmm4
	mulsd	%xmm1, %xmm1
	mulsd	%xmm2, %xmm2
	addsd	%xmm1, %xmm2
	mulsd	%xmm5, %xmm2
	divsd	.LCPI0_1(%rip), %xmm3
	addsd	%xmm2, %xmm3
	movsd	%xmm0, 8(%rsi)
	movsd	%xmm4, 16(%rsi)
	movsd	%xmm3, 24(%rsi)
	retq
.Lfunc_end0:
	.size	_Z22primitive_to_conservedPKdPd, .Lfunc_end0-_Z22primitive_to_conservedPKdPd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z17initial_primitivePdidd
.LCPI1_0:
	.quad	0x3fe0000000000000              # double 0.5
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	3, 0x0
.LCPI1_1:
	.quad	0x3fb999999999999a              # double 0.10000000000000001
	.quad	0x3ff0000000000000              # double 1
.LCPI1_2:
	.quad	0x3fc0000000000000              # double 0.125
	.quad	0x3ff0000000000000              # double 1
	.text
	.globl	_Z17initial_primitivePdidd
	.type	_Z17initial_primitivePdidd,@function
_Z17initial_primitivePdidd:             # @_Z17initial_primitivePdidd
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph
	movapd	%xmm1, %xmm2
	subsd	%xmm0, %xmm2
	cvtsi2sd	%esi, %xmm3
	divsd	%xmm3, %xmm2
	addsd	%xmm1, %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	movl	%esi, %eax
	shlq	$2, %rax
	xorl	%ecx, %ecx
	movsd	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero
	xorpd	%xmm3, %xmm3
	xorl	%edx, %edx
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm4, %xmm4
	cvtsi2sd	%ecx, %xmm4
	addsd	%xmm1, %xmm4
	mulsd	%xmm2, %xmm4
	movl	%edx, %esi
	andl	$-4, %esi
	xorl	%r8d, %r8d
	ucomisd	%xmm4, %xmm0
	seta	%r8b
	movsd	.LCPI1_1(,%r8,8), %xmm4         # xmm4 = mem[0],zero
	movsd	.LCPI1_2(,%r8,8), %xmm5         # xmm5 = mem[0],zero
	movsd	%xmm4, (%rdi,%rsi,8)
	movupd	%xmm3, 8(%rdi,%rsi,8)
	movsd	%xmm5, 24(%rdi,%rsi,8)
	addq	$4, %rdx
	incl	%ecx
	cmpq	%rdx, %rax
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z17initial_primitivePdidd, .Lfunc_end1-_Z17initial_primitivePdidd
	.cfi_endproc
                                        # -- End function
	.globl	_Z17update_struct_newidd        # -- Begin function _Z17update_struct_newidd
	.type	_Z17update_struct_newidd,@function
_Z17update_struct_newidd:               # @_Z17update_struct_newidd
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	movl	%esi, (%rdi)
	movsd	%xmm0, 8(%rdi)
	movsd	%xmm1, 16(%rdi)
	addq	$24, %rdi
	shll	$2, %esi
	movslq	%esi, %r14
	shlq	$3, %r14
	movq	%r14, %rsi
	callq	hipMalloc
	movq	%rbx, %rdi
	addq	$32, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	%rbx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z17update_struct_newidd, .Lfunc_end2-_Z17update_struct_newidd
	.cfi_endproc
                                        # -- End function
	.globl	_Z17update_struct_del12UpdateStruct # -- Begin function _Z17update_struct_del12UpdateStruct
	.type	_Z17update_struct_del12UpdateStruct,@function
_Z17update_struct_del12UpdateStruct:    # @_Z17update_struct_del12UpdateStruct
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end3:
	.size	_Z17update_struct_del12UpdateStruct, .Lfunc_end3-_Z17update_struct_del12UpdateStruct
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z27update_struct_set_primitive12UpdateStructPKd
.LCPI4_0:
	.quad	0x3fe0000000000000              # double 0.5
.LCPI4_1:
	.quad	0x3fe5555555555556              # double 0.66666666666666674
	.text
	.globl	_Z27update_struct_set_primitive12UpdateStructPKd
	.type	_Z27update_struct_set_primitive12UpdateStructPKd,@function
_Z27update_struct_set_primitive12UpdateStructPKd: # @_Z27update_struct_set_primitive12UpdateStructPKd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %r15
	leaq	48(%rsp), %r12
	movslq	(%r12), %r13
	movq	%r13, %rbx
	shlq	$5, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r14
	testq	%r13, %r13
	jle	.LBB4_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%r13d, %eax
	shlq	$5, %rax
	xorl	%ecx, %ecx
	movsd	.LCPI4_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movsd	.LCPI4_1(%rip), %xmm1           # xmm1 = mem[0],zero
.LBB4_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%r15,%rcx), %xmm2              # xmm2 = mem[0],zero
	movsd	8(%r15,%rcx), %xmm3             # xmm3 = mem[0],zero
	movsd	16(%r15,%rcx), %xmm4            # xmm4 = mem[0],zero
	movsd	24(%r15,%rcx), %xmm5            # xmm5 = mem[0],zero
	movapd	%xmm2, %xmm6
	movapd	%xmm2, %xmm7
	movsd	%xmm2, (%r14,%rcx)
	mulsd	%xmm3, %xmm2
	mulsd	%xmm4, %xmm6
	mulsd	%xmm0, %xmm7
	mulsd	%xmm3, %xmm3
	mulsd	%xmm4, %xmm4
	addsd	%xmm3, %xmm4
	mulsd	%xmm7, %xmm4
	divsd	%xmm1, %xmm5
	addsd	%xmm4, %xmm5
	movsd	%xmm2, 8(%r14,%rcx)
	movsd	%xmm6, 16(%r14,%rcx)
	movsd	%xmm5, 24(%r14,%rcx)
	addq	$32, %rcx
	cmpq	%rcx, %rax
	jne	.LBB4_2
.LBB4_3:                                # %._crit_edge
	movq	24(%r12), %rdi
	movq	%r15, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	32(%r12), %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r14, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	free                            # TAILCALL
.Lfunc_end4:
	.size	_Z27update_struct_set_primitive12UpdateStructPKd, .Lfunc_end4-_Z27update_struct_set_primitive12UpdateStructPKd
	.cfi_endproc
                                        # -- End function
	.globl	_Z27update_struct_get_primitive12UpdateStructPd # -- Begin function _Z27update_struct_get_primitive12UpdateStructPd
	.type	_Z27update_struct_get_primitive12UpdateStructPd,@function
_Z27update_struct_get_primitive12UpdateStructPd: # @_Z27update_struct_get_primitive12UpdateStructPd
	.cfi_startproc
# %bb.0:
	movq	32(%rsp), %rsi
	movslq	8(%rsp), %rdx
	shlq	$5, %rdx
	movl	$2, %ecx
	jmp	hipMemcpy                       # TAILCALL
.Lfunc_end5:
	.size	_Z27update_struct_get_primitive12UpdateStructPd, .Lfunc_end5-_Z27update_struct_get_primitive12UpdateStructPd
	.cfi_endproc
                                        # -- End function
	.globl	_Z44__device_stub__update_struct_do_advance_cons12UpdateStructd # -- Begin function _Z44__device_stub__update_struct_do_advance_cons12UpdateStructd
	.type	_Z44__device_stub__update_struct_do_advance_cons12UpdateStructd,@function
_Z44__device_stub__update_struct_do_advance_cons12UpdateStructd: # @_Z44__device_stub__update_struct_do_advance_cons12UpdateStructd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movsd	%xmm0, (%rax)
	leaq	128(%rsp), %rcx
	leaq	64(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z29update_struct_do_advance_cons12UpdateStructd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z44__device_stub__update_struct_do_advance_cons12UpdateStructd, .Lfunc_end6-_Z44__device_stub__update_struct_do_advance_cons12UpdateStructd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI7_0:
	.quad	0x3fe0000000000000              # double 0.5
.LCPI7_1:
	.quad	0x3e70000000000000              # double 5.9604644775390625E-8
.LCPI7_4:
	.quad	0x3e3999999999999a              # double 5.9604644775390628E-9
.LCPI7_5:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI7_6:
	.quad	0x4030c6f7a0b5ed8d              # double 16.777215999999999
.LCPI7_7:
	.quad	0x4059000000000000              # double 100
.LCPI7_8:
	.quad	0x3fb999999999999a              # double 0.10000000000000001
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	3, 0x0
.LCPI7_2:
	.quad	0x3fb999999999999a              # double 0.10000000000000001
	.quad	0x3ff0000000000000              # double 1
.LCPI7_3:
	.quad	0x3fc0000000000000              # double 0.125
	.quad	0x3ff0000000000000              # double 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$536870912, %edi                # imm = 0x20000000
	callq	malloc
	movq	%rax, %rbx
	leaq	72(%rsp), %rdi
	movl	$16777216, -24(%rdi)            # imm = 0x1000000
	movq	$0, -16(%rdi)
	movabsq	$4607182418800017408, %rax      # imm = 0x3FF0000000000000
	movq	%rax, -8(%rdi)
	movl	$536870912, %esi                # imm = 0x20000000
	callq	hipMalloc
	leaq	80(%rsp), %rdi
	movl	$536870912, %esi                # imm = 0x20000000
	callq	hipMalloc
	xorl	%eax, %eax
	movsd	.LCPI7_0(%rip), %xmm3           # xmm3 = mem[0],zero
	xorps	%xmm0, %xmm0
	movq	%rbx, %rcx
.LBB7_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm1, %xmm1
	cvtsi2sd	%eax, %xmm1
	addsd	%xmm3, %xmm1
	mulsd	.LCPI7_1(%rip), %xmm1
	xorl	%edx, %edx
	ucomisd	%xmm1, %xmm3
	seta	%dl
	movsd	.LCPI7_2(,%rdx,8), %xmm1        # xmm1 = mem[0],zero
	movsd	.LCPI7_3(,%rdx,8), %xmm2        # xmm2 = mem[0],zero
	movsd	%xmm1, (%rcx)
	movups	%xmm0, 8(%rcx)
	movsd	%xmm2, 24(%rcx)
	incq	%rax
	addq	$32, %rcx
	cmpq	$16777216, %rax                 # imm = 0x1000000
	jne	.LBB7_1
# %bb.2:                                # %_Z17initial_primitivePdidd.exit
	movabsq	$4294967360, %r14               # imm = 0x100000040
	movq	80(%rsp), %rax
	movq	%rax, 32(%rsp)
	movupd	48(%rsp), %xmm0
	movupd	64(%rsp), %xmm1
	movupd	%xmm1, 16(%rsp)
	movupd	%xmm0, (%rsp)
	movq	%rbx, %rdi
	callq	_Z27update_struct_set_primitive12UpdateStructPKd
	xorpd	%xmm0, %xmm0
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	xorl	%r15d, %r15d
	leaq	262080(%r14), %r12
.LBB7_3:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_4 Depth 2
	movl	$100, %ebp
	callq	clock
	movq	%rax, %r13
.LBB7_4:                                #   Parent Loop BB7_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$2112, %r8d                     # imm = 0x840
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_6
# %bb.5:                                #   in Loop: Header=BB7_4 Depth=2
	movq	80(%rsp), %rax
	movq	%rax, 32(%rsp)
	movups	48(%rsp), %xmm0
	movupd	64(%rsp), %xmm1
	movupd	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movsd	.LCPI7_4(%rip), %xmm0           # xmm0 = mem[0],zero
	callq	_Z44__device_stub__update_struct_do_advance_cons12UpdateStructd
.LBB7_6:                                #   in Loop: Header=BB7_4 Depth=2
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	addsd	.LCPI7_4(%rip), %xmm0
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	decl	%ebp
	jne	.LBB7_4
# %bb.7:                                #   in Loop: Header=BB7_3 Depth=1
	addl	$100, %r15d
	callq	hipDeviceSynchronize
	callq	clock
	subq	%r13, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI7_5(%rip), %xmm0
	movsd	.LCPI7_6(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	mulsd	.LCPI7_7(%rip), %xmm1
	movl	$.L.str, %edi
	movl	%r15d, %esi
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$2, %al
	callq	printf
	movsd	.LCPI7_8(%rip), %xmm0           # xmm0 = mem[0],zero
	ucomisd	40(%rsp), %xmm0                 # 8-byte Folded Reload
	ja	.LBB7_3
# %bb.8:
	movslq	48(%rsp), %rdx
	movq	72(%rsp), %rsi
	shlq	$5, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rdi
	movq	80(%rsp), %r14
	callq	hipFree
	movq	%r14, %rdi
	callq	hipFree
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %r14
	xorl	%r15d, %r15d
	movq	%rbx, %r12
.LBB7_9:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r15d, %xmm0
	addsd	.LCPI7_0(%rip), %xmm0
	mulsd	.LCPI7_1(%rip), %xmm0
	movsd	(%r12), %xmm1                   # xmm1 = mem[0],zero
	movsd	8(%r12), %xmm2                  # xmm2 = mem[0],zero
	movsd	24(%r12), %xmm3                 # xmm3 = mem[0],zero
	movl	$.L.str.3, %esi
	movq	%r14, %rdi
	movb	$4, %al
	callq	fprintf
	incq	%r15
	addq	$32, %r12
	cmpq	$16777216, %r15                 # imm = 0x1000000
	jne	.LBB7_9
# %bb.10:
	movq	%r14, %rdi
	callq	fclose
	movq	%rbx, %rdi
	callq	free
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB7_12
# %bb.11:
	movl	%eax, %edi
	callq	hipGetErrorString
	movq	%rax, %rdi
	callq	puts@PLT
.LBB7_12:
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z29update_struct_do_advance_cons12UpdateStructd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z29update_struct_do_advance_cons12UpdateStructd,@object # @_Z29update_struct_do_advance_cons12UpdateStructd
	.section	.rodata,"a",@progbits
	.globl	_Z29update_struct_do_advance_cons12UpdateStructd
	.p2align	3, 0x0
_Z29update_struct_do_advance_cons12UpdateStructd:
	.quad	_Z44__device_stub__update_struct_do_advance_cons12UpdateStructd
	.size	_Z29update_struct_do_advance_cons12UpdateStructd, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"[%d] t=%.3e Mzps=%.2f\n"
	.size	.L.str, 23

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"euler1d.dat"
	.size	.L.str.1, 12

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"w"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%f %f %f %f\n"
	.size	.L.str.3, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z29update_struct_do_advance_cons12UpdateStructd"
	.size	.L__unnamed_1, 49

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z44__device_stub__update_struct_do_advance_cons12UpdateStructd
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z29update_struct_do_advance_cons12UpdateStructd
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z29update_struct_do_advance_cons12UpdateStructd ; -- Begin function _Z29update_struct_do_advance_cons12UpdateStructd
	.globl	_Z29update_struct_do_advance_cons12UpdateStructd
	.p2align	8
	.type	_Z29update_struct_do_advance_cons12UpdateStructd,@function
_Z29update_struct_do_advance_cons12UpdateStructd: ; @_Z29update_struct_do_advance_cons12UpdateStructd
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s3, s[0:1], 0x0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s2
	v_add_nc_u32_e32 v47, s15, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v47
	s_cbranch_execz .LBB0_14
; %bb.1:
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, -1, v47
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x8
	s_load_b64 s[12:13], s[0:1], 0x28
	v_lshl_add_u32 v46, v0, 5, 0
	v_max_i32_e32 v1, 0, v1
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 2, v1
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s8, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[3:4], v[1:2], off
	v_add_co_u32 v1, vcc_lo, v1, 8
	v_add_nc_u32_e32 v5, s0, v46
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_add_i32 s0, s0, 8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 32
	s_waitcnt vmcnt(0)
	ds_store_b64 v5, v[3:4]
	s_cbranch_scc0 .LBB0_2
; %bb.3:
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 2, v0
	s_cbranch_execz .LBB0_6
; %bb.4:
	v_add_nc_u32_e32 v2, s2, v0
	s_add_i32 s1, s3, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v0, s15, -1, v2
	v_lshl_add_u32 v2, v2, 5, 0
	v_cmp_gt_i32_e32 vcc_lo, s3, v0
	v_cndmask_b32_e32 v0, s1, v0, vcc_lo
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_add_co_u32 v0, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[3:4], v[0:1], off
	v_add_co_u32 v0, vcc_lo, v0, 8
	v_add_nc_u32_e32 v5, s1, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s1, s1, 8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s1, 32
	s_waitcnt vmcnt(0)
	ds_store_b64 v5, v[3:4]
	s_cbranch_scc1 .LBB0_5
.LBB0_6:                                ; %Flow122
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[0:3], v46 offset0:2 offset1:3
	ds_load_2addr_b64 v[4:7], v46 offset0:6 offset1:7
	s_mov_b32 s0, 0xaaaaaaab
	s_mov_b32 s1, 0x3ffaaaaa
	ds_load_2addr_b64 v[42:45], v46 offset1:1
	ds_load_2addr_b64 v[48:51], v46 offset0:4 offset1:5
	s_mov_b32 s14, 0x55555556
	s_mov_b32 s15, 0x3fe55555
	s_waitcnt lgkmcnt(3)
	v_mul_f64 v[8:9], v[2:3], s[0:1]
	s_waitcnt lgkmcnt(2)
	v_mul_f64 v[10:11], v[6:7], s[0:1]
	v_div_scale_f64 v[12:13], null, s[14:15], s[14:15], v[2:3]
	v_div_scale_f64 v[14:15], null, s[14:15], s[14:15], v[6:7]
	v_div_scale_f64 v[36:37], vcc_lo, v[2:3], s[14:15], v[2:3]
	s_waitcnt lgkmcnt(1)
	v_div_scale_f64 v[16:17], null, v[42:43], v[42:43], v[8:9]
	s_waitcnt lgkmcnt(0)
	v_div_scale_f64 v[18:19], null, v[48:49], v[48:49], v[10:11]
	v_rcp_f64_e32 v[20:21], v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[22:23], v[14:15]
	v_rcp_f64_e32 v[24:25], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(TRANS32_DEP_3)
	v_rcp_f64_e32 v[26:27], v[18:19]
	v_fma_f64 v[28:29], -v[12:13], v[20:21], 1.0
	v_fma_f64 v[30:31], -v[14:15], v[22:23], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[32:33], -v[16:17], v[24:25], 1.0
	v_fma_f64 v[34:35], -v[18:19], v[26:27], 1.0
	v_fma_f64 v[20:21], v[20:21], v[28:29], v[20:21]
	v_fma_f64 v[22:23], v[22:23], v[30:31], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[24:25], v[32:33], v[24:25]
	v_fma_f64 v[26:27], v[26:27], v[34:35], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[28:29], -v[12:13], v[20:21], 1.0
	v_fma_f64 v[30:31], -v[14:15], v[22:23], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[32:33], -v[16:17], v[24:25], 1.0
	v_fma_f64 v[34:35], -v[18:19], v[26:27], 1.0
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[20:21], v[20:21], v[28:29], v[20:21]
	v_div_scale_f64 v[28:29], s0, v[6:7], s[14:15], v[6:7]
	v_fma_f64 v[22:23], v[22:23], v[30:31], v[22:23]
	v_div_scale_f64 v[30:31], s1, v[8:9], v[42:43], v[8:9]
	v_fma_f64 v[24:25], v[24:25], v[32:33], v[24:25]
	v_div_scale_f64 v[32:33], s2, v[10:11], v[48:49], v[10:11]
	v_fma_f64 v[26:27], v[26:27], v[34:35], v[26:27]
	v_mul_f64 v[34:35], v[36:37], v[20:21]
	v_mul_f64 v[38:39], v[28:29], v[22:23]
	v_mul_f64 v[40:41], v[30:31], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[52:53], v[32:33], v[26:27]
	v_fma_f64 v[12:13], -v[12:13], v[34:35], v[36:37]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[14:15], -v[14:15], v[38:39], v[28:29]
	v_mul_f64 v[28:29], v[48:49], 0.5
	v_fma_f64 v[16:17], -v[16:17], v[40:41], v[30:31]
	v_fma_f64 v[18:19], -v[18:19], v[52:53], v[32:33]
	v_div_fmas_f64 v[12:13], v[12:13], v[20:21], v[34:35]
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[14:15], v[14:15], v[22:23], v[38:39]
	s_mov_b32 vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_div_fmas_f64 v[16:17], v[16:17], v[24:25], v[40:41]
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f64 v[18:19], v[18:19], v[26:27], v[52:53]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_fixup_f64 v[12:13], v[12:13], s[14:15], v[2:3]
	v_div_fixup_f64 v[14:15], v[14:15], s[14:15], v[6:7]
	s_mov_b64 s[14:15], 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_fixup_f64 v[8:9], v[16:17], v[42:43], v[8:9]
	v_div_fixup_f64 v[10:11], v[18:19], v[48:49], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[8:9]
	v_cmp_gt_f64_e64 s0, 0x10000000, v[10:11]
	v_cndmask_b32_e64 v16, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v17, 0, 1, s0
	v_lshlrev_b32_e32 v16, 8, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[8:9], v[8:9], v16
	v_lshlrev_b32_e32 v17, 8, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[10:11], v[10:11], v17
	v_rsq_f64_e32 v[16:17], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_rsq_f64_e32 v[18:19], v[10:11]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[20:21], v[8:9], v[16:17]
	v_mul_f64 v[16:17], v[16:17], 0.5
	v_mul_f64 v[22:23], v[10:11], v[18:19]
	v_mul_f64 v[18:19], v[18:19], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], -v[16:17], v[20:21], 0.5
	v_fma_f64 v[26:27], -v[18:19], v[22:23], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21]
	v_fma_f64 v[16:17], v[16:17], v[24:25], v[16:17]
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[18:19], v[18:19], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[24:25], -v[20:21], v[20:21], v[8:9]
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[24:25], v[16:17], v[20:21]
	v_fma_f64 v[22:23], v[26:27], v[18:19], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], -v[20:21], v[20:21], v[8:9]
	v_fma_f64 v[26:27], -v[22:23], v[22:23], v[10:11]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[16:17], v[24:25], v[16:17], v[20:21]
	v_cndmask_b32_e64 v24, 0, 0xffffff80, vcc_lo
	v_cndmask_b32_e64 v25, 0, 0xffffff80, s0
	v_cmp_class_f64_e64 vcc_lo, v[8:9], 0x260
	v_cmp_class_f64_e64 s0, v[10:11], 0x260
	v_mul_f64 v[20:21], v[0:1], v[0:1]
	v_fma_f64 v[18:19], v[26:27], v[18:19], v[22:23]
	v_mul_f64 v[22:23], v[4:5], v[4:5]
	v_mul_f64 v[26:27], v[42:43], 0.5
	v_ldexp_f64 v[16:17], v[16:17], v24
	v_fma_f64 v[30:31], v[44:45], v[44:45], v[20:21]
	v_ldexp_f64 v[18:19], v[18:19], v25
	v_fma_f64 v[32:33], v[50:51], v[50:51], v[22:23]
	v_mul_f64 v[24:25], v[42:43], v[0:1]
	v_dual_cndmask_b32 v8, v16, v8 :: v_dual_cndmask_b32 v9, v17, v9
	v_fma_f64 v[26:27], v[26:27], v[30:31], v[12:13]
	v_cndmask_b32_e64 v11, v19, v11, s0
	v_cndmask_b32_e64 v10, v18, v10, s0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[16:17], v[44:45], -v[8:9]
	v_add_f64 v[18:19], v[44:45], v[8:9]
	v_mul_f64 v[8:9], v[48:49], v[4:5]
	v_mul_f64 v[12:13], v[48:49], v[50:51]
	v_add_f64 v[22:23], v[50:51], -v[10:11]
	v_add_f64 v[20:21], v[50:51], v[10:11]
	v_fma_f64 v[10:11], v[28:29], v[32:33], v[14:15]
	v_mul_f64 v[28:29], v[42:43], v[44:45]
	v_mul_f64 v[14:15], v[44:45], v[24:25]
	v_min_f64 v[0:1], v[16:17], v[22:23]
	v_max_f64 v[4:5], v[18:19], v[20:21]
	v_mul_f64 v[16:17], v[44:45], v[26:27]
	v_mul_f64 v[18:19], v[50:51], v[8:9]
	v_mul_f64 v[40:41], v[50:51], v[10:11]
	v_fma_f64 v[34:35], v[44:45], v[28:29], v[2:3]
	v_fma_f64 v[36:37], v[2:3], 0, v[14:15]
	v_fma_f64 v[14:15], v[50:51], v[12:13], v[6:7]
	v_min_f64 v[30:31], v[0:1], 0
	v_max_f64 v[32:33], v[4:5], 0
	v_fma_f64 v[38:39], v[44:45], v[2:3], v[16:17]
	v_fma_f64 v[16:17], v[6:7], 0, v[18:19]
	v_fma_f64 v[18:19], v[50:51], v[6:7], v[40:41]
	v_dual_mov_b32 v44, v28 :: v_dual_mov_b32 v45, v29
	v_dual_mov_b32 v50, v12 :: v_dual_mov_b32 v51, v13
                                        ; implicit-def: $vgpr0_vgpr1
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	v_add_f64 v[40:41], v[32:33], -v[30:31]
.LBB0_7:                                ; =>This Inner Loop Header: Depth=1
	s_cmp_eq_u32 s14, 1
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s14, 2
	v_cndmask_b32_e64 v53, v51, v15, s0
	v_cndmask_b32_e64 v54, v50, v14, s0
	v_cndmask_b32_e64 v55, v43, v29, s0
	v_cndmask_b32_e64 v56, v42, v28, s0
	v_cndmask_b32_e64 v57, v49, v13, s0
	v_cndmask_b32_e64 v58, v48, v12, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s14, 3
	v_cndmask_b32_e64 v59, v53, v17, s1
	v_cndmask_b32_e64 v54, v54, v16, s1
	v_cndmask_b32_e64 v60, v55, v25, s1
	v_cndmask_b32_e64 v56, v56, v24, s1
	v_cndmask_b32_e64 v61, v57, v9, s1
	v_cndmask_b32_e64 v58, v58, v8, s1
	s_cselect_b32 s2, -1, 0
	v_cndmask_b32_e64 v52, v45, v35, s0
	v_cndmask_b32_e64 v55, v59, v19, s2
	v_cndmask_b32_e64 v54, v54, v18, s2
	v_cndmask_b32_e64 v57, v60, v27, s2
	v_cndmask_b32_e64 v56, v56, v26, s2
	v_cndmask_b32_e64 v59, v61, v11, s2
	v_cndmask_b32_e64 v58, v58, v10, s2
	v_mul_f64 v[54:55], v[30:31], v[54:55]
	v_cndmask_b32_e64 v52, v52, v37, s1
	s_cmp_eq_u32 s14, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[56:57], v[56:57], -v[58:59]
	v_cndmask_b32_e64 v53, v52, v39, s2
	v_cndmask_b32_e64 v52, v44, v34, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v52, v52, v36, s1
	v_cndmask_b32_e64 v52, v52, v38, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[32:33], v[52:53], -v[54:55]
	v_mul_f64 v[54:55], v[32:33], v[56:57]
	v_fma_f64 v[52:53], -v[30:31], v[54:55], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[54:55], null, v[40:41], v[40:41], v[52:53]
	v_div_scale_f64 v[60:61], vcc_lo, v[52:53], v[40:41], v[52:53]
	v_rcp_f64_e32 v[56:57], v[54:55]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[58:59], -v[54:55], v[56:57], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[56:57], v[56:57], v[58:59], v[56:57]
	v_fma_f64 v[58:59], -v[54:55], v[56:57], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[56:57], v[56:57], v[58:59], v[56:57]
	v_mul_f64 v[58:59], v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], -v[54:55], v[58:59], v[60:61]
	v_div_fmas_f64 v[54:55], v[54:55], v[56:57], v[58:59]
	s_cselect_b32 vcc_lo, -1, 0
	s_add_u32 s14, s14, 1
	s_addc_u32 s15, s15, 0
	s_cmp_lg_u32 s14, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[52:53], v[54:55], v[40:41], v[52:53]
	v_cndmask_b32_e64 v7, v7, v53, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v52, s2
	v_cndmask_b32_e64 v5, v5, v53, s1
	v_cndmask_b32_e64 v4, v4, v52, s1
	v_cndmask_b32_e64 v3, v3, v53, s0
	v_cndmask_b32_e64 v2, v2, v52, s0
	v_dual_cndmask_b32 v1, v1, v53 :: v_dual_cndmask_b32 v0, v0, v52
	s_cbranch_scc1 .LBB0_7
; %bb.8:                                ; %_Z12riemann_hllePKdS0_Pdi.exit
	ds_load_2addr_b64 v[24:27], v46 offset0:10 offset1:11
	ds_load_2addr_b64 v[52:55], v46 offset0:8 offset1:9
	s_mov_b32 s0, 0xaaaaaaab
	s_mov_b32 s1, 0x3ffaaaaa
	s_mov_b32 s14, 0x55555556
	s_mov_b32 s15, 0x3fe55555
	v_max_f64 v[22:23], v[22:23], v[22:23]
	v_max_f64 v[20:21], v[20:21], v[20:21]
	s_waitcnt lgkmcnt(1)
	v_mul_f64 v[28:29], v[26:27], s[0:1]
	v_div_scale_f64 v[30:31], null, s[14:15], s[14:15], v[26:27]
	v_div_scale_f64 v[42:43], vcc_lo, v[26:27], s[14:15], v[26:27]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_scale_f64 v[32:33], null, v[52:53], v[52:53], v[28:29]
	v_rcp_f64_e32 v[34:35], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[36:37], v[32:33]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[38:39], -v[30:31], v[34:35], 1.0
	v_fma_f64 v[40:41], -v[32:33], v[36:37], 1.0
	v_fma_f64 v[34:35], v[34:35], v[38:39], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[36:37], v[40:41], v[36:37]
	v_fma_f64 v[38:39], -v[30:31], v[34:35], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[40:41], -v[32:33], v[36:37], 1.0
	v_fma_f64 v[34:35], v[34:35], v[38:39], v[34:35]
	v_div_scale_f64 v[38:39], s0, v[28:29], v[52:53], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[36:37], v[40:41], v[36:37]
	v_mul_f64 v[40:41], v[42:43], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[44:45], v[38:39], v[36:37]
	v_fma_f64 v[30:31], -v[30:31], v[40:41], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], -v[32:33], v[44:45], v[38:39]
	v_div_fmas_f64 v[30:31], v[30:31], v[34:35], v[40:41]
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[32:33], v[32:33], v[36:37], v[44:45]
	v_div_fixup_f64 v[30:31], v[30:31], s[14:15], v[26:27]
	s_mov_b64 s[14:15], 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[28:29], v[32:33], v[52:53], v[28:29]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[28:29]
	v_cndmask_b32_e64 v32, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v32, 8, v32
	v_ldexp_f64 v[28:29], v[28:29], v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[32:33], v[28:29]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[34:35], v[28:29], v[32:33]
	v_mul_f64 v[32:33], v[32:33], 0.5
	v_fma_f64 v[36:37], -v[32:33], v[34:35], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[34:35], v[36:37], v[34:35]
	v_fma_f64 v[32:33], v[32:33], v[36:37], v[32:33]
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[34:35], v[36:37], v[32:33], v[34:35]
	v_fma_f64 v[36:37], -v[34:35], v[34:35], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[36:37], v[32:33], v[34:35]
	v_cndmask_b32_e64 v34, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[28:29], 0x260
	v_ldexp_f64 v[32:33], v[32:33], v34
	v_mul_f64 v[34:35], v[24:25], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v29, v33, v29 :: v_dual_cndmask_b32 v28, v32, v28
	v_mul_f64 v[32:33], v[52:53], 0.5
	v_fma_f64 v[34:35], v[54:55], v[54:55], v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[54:55], -v[28:29]
	v_add_f64 v[38:39], v[54:55], v[28:29]
	v_mul_f64 v[28:29], v[52:53], v[24:25]
	v_fma_f64 v[30:31], v[32:33], v[34:35], v[30:31]
	v_mul_f64 v[32:33], v[52:53], v[54:55]
	v_min_f64 v[22:23], v[22:23], v[36:37]
	v_max_f64 v[20:21], v[20:21], v[38:39]
	v_mul_f64 v[24:25], v[54:55], v[28:29]
	v_mul_f64 v[42:43], v[54:55], v[30:31]
	v_fma_f64 v[38:39], v[54:55], v[32:33], v[26:27]
	v_min_f64 v[34:35], v[22:23], 0
	v_max_f64 v[36:37], v[20:21], 0
	v_fma_f64 v[40:41], v[26:27], 0, v[24:25]
                                        ; implicit-def: $vgpr20_vgpr21
                                        ; implicit-def: $vgpr22_vgpr23
                                        ; implicit-def: $vgpr24_vgpr25
	v_fma_f64 v[42:43], v[54:55], v[26:27], v[42:43]
	v_dual_mov_b32 v55, v33 :: v_dual_mov_b32 v54, v32
                                        ; implicit-def: $vgpr26_vgpr27
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[44:45], v[36:37], -v[34:35]
.LBB0_9:                                ; =>This Inner Loop Header: Depth=1
	s_cmp_eq_u32 s14, 1
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s14, 2
	v_cndmask_b32_e64 v57, v55, v39, s0
	v_cndmask_b32_e64 v58, v54, v38, s0
	v_cndmask_b32_e64 v59, v49, v13, s0
	v_cndmask_b32_e64 v60, v48, v12, s0
	v_cndmask_b32_e64 v61, v53, v33, s0
	v_cndmask_b32_e64 v62, v52, v32, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s14, 3
	v_cndmask_b32_e64 v63, v57, v41, s1
	v_cndmask_b32_e64 v58, v58, v40, s1
	v_cndmask_b32_e64 v64, v59, v9, s1
	v_cndmask_b32_e64 v60, v60, v8, s1
	v_cndmask_b32_e64 v65, v61, v29, s1
	v_cndmask_b32_e64 v62, v62, v28, s1
	s_cselect_b32 s2, -1, 0
	v_cndmask_b32_e64 v56, v51, v15, s0
	v_cndmask_b32_e64 v59, v63, v43, s2
	v_cndmask_b32_e64 v58, v58, v42, s2
	v_cndmask_b32_e64 v61, v64, v11, s2
	v_cndmask_b32_e64 v60, v60, v10, s2
	v_cndmask_b32_e64 v63, v65, v31, s2
	v_cndmask_b32_e64 v62, v62, v30, s2
	v_mul_f64 v[58:59], v[34:35], v[58:59]
	v_cndmask_b32_e64 v56, v56, v17, s1
	s_cmp_eq_u32 s14, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[60:61], -v[62:63]
	v_cndmask_b32_e64 v57, v56, v19, s2
	v_cndmask_b32_e64 v56, v50, v14, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v56, v56, v16, s1
	v_cndmask_b32_e64 v56, v56, v18, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[56:57], v[36:37], v[56:57], -v[58:59]
	v_mul_f64 v[58:59], v[36:37], v[60:61]
	v_fma_f64 v[56:57], -v[34:35], v[58:59], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[58:59], null, v[44:45], v[44:45], v[56:57]
	v_div_scale_f64 v[64:65], vcc_lo, v[56:57], v[44:45], v[56:57]
	v_rcp_f64_e32 v[60:61], v[58:59]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_fma_f64 v[62:63], -v[58:59], v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[60:61], v[62:63], v[60:61]
	v_mul_f64 v[62:63], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], -v[58:59], v[62:63], v[64:65]
	v_div_fmas_f64 v[58:59], v[58:59], v[60:61], v[62:63]
	s_cselect_b32 vcc_lo, -1, 0
	s_add_u32 s14, s14, 1
	s_addc_u32 s15, s15, 0
	s_cmp_lg_u32 s14, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[56:57], v[58:59], v[44:45], v[56:57]
	v_cndmask_b32_e64 v27, v27, v57, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v26, v26, v56, s2
	v_cndmask_b32_e64 v25, v25, v57, s1
	v_cndmask_b32_e64 v24, v24, v56, s1
	v_cndmask_b32_e64 v23, v23, v57, s0
	v_cndmask_b32_e64 v22, v22, v56, s0
	v_dual_cndmask_b32 v21, v21, v57 :: v_dual_cndmask_b32 v20, v20, v56
	s_cbranch_scc1 .LBB0_9
; %bb.10:                               ; %_Z12riemann_hllePKdS0_Pdi.exit58
	v_add_f64 v[8:9], s[6:7], -s[4:5]
	v_cvt_f64_i32_e32 v[10:11], s3
	s_mov_b64 s[2:3], 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[12:13], null, v[10:11], v[10:11], v[8:9]
	v_rcp_f64_e32 v[14:15], v[12:13]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15]
	v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15]
	v_div_scale_f64 v[16:17], vcc_lo, v[8:9], v[10:11], v[8:9]
	v_mul_f64 v[18:19], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[12:13], v[18:19], v[16:17]
	v_div_fmas_f64 v[12:13], v[12:13], v[14:15], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[12:13], v[12:13], v[10:11], v[8:9]
	v_lshlrev_b32_e32 v8, 2, v47
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_add_co_u32 v10, vcc_lo, s10, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v9, vcc_lo
	v_dual_mov_b32 v15, v11 :: v_dual_mov_b32 v14, v10
.LBB0_11:                               ; =>This Inner Loop Header: Depth=1
	s_cmp_eq_u32 s2, 1
	global_load_b64 v[30:31], v[14:15], off
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 2
	v_dual_cndmask_b32 v16, v21, v23 :: v_dual_cndmask_b32 v17, v20, v22
	v_dual_cndmask_b32 v18, v1, v3 :: v_dual_cndmask_b32 v19, v0, v2
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s2, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v16, v16, v25, s0
	v_cndmask_b32_e64 v28, v17, v24, s0
	v_cndmask_b32_e64 v18, v18, v5, s0
	v_cndmask_b32_e64 v29, v19, v4, s0
	s_cselect_b32 vcc_lo, -1, 0
	s_add_u32 s2, s2, 1
	v_cndmask_b32_e32 v17, v16, v27, vcc_lo
	v_dual_cndmask_b32 v16, v28, v26 :: v_dual_cndmask_b32 v19, v18, v7
	v_cndmask_b32_e32 v18, v29, v6, vcc_lo
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	v_mul_f64 v[16:17], v[16:17], s[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[18:19], null, v[12:13], v[12:13], v[16:17]
	v_div_scale_f64 v[34:35], vcc_lo, v[16:17], v[12:13], v[16:17]
	v_rcp_f64_e32 v[28:29], v[18:19]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[32:33], -v[18:19], v[28:29], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[28:29], v[28:29], v[32:33], v[28:29]
	v_fma_f64 v[32:33], -v[18:19], v[28:29], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[28:29], v[28:29], v[32:33], v[28:29]
	v_mul_f64 v[32:33], v[34:35], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], -v[18:19], v[32:33], v[34:35]
	v_div_fmas_f64 v[18:19], v[18:19], v[28:29], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[16:17], v[18:19], v[12:13], v[16:17]
	s_waitcnt vmcnt(0)
	v_add_f64 v[16:17], v[30:31], -v[16:17]
	global_store_b64 v[14:15], v[16:17], off
	v_add_co_u32 v14, vcc_lo, v14, 8
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v15, vcc_lo
	s_cbranch_scc0 .LBB0_11
; %bb.12:
	s_clause 0x1
	global_load_b128 v[2:5], v[10:11], off
	global_load_b128 v[10:13], v[10:11], off offset:16
	s_waitcnt vmcnt(1)
	v_div_scale_f64 v[0:1], null, v[2:3], v[2:3], v[4:5]
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[6:7], null, v[2:3], v[2:3], v[10:11]
	v_div_scale_f64 v[22:23], vcc_lo, v[4:5], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[14:15], v[0:1]
	v_rcp_f64_e32 v[16:17], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[0:1], v[14:15], 1.0
	v_fma_f64 v[20:21], -v[6:7], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15]
	v_fma_f64 v[16:17], v[16:17], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], -v[0:1], v[14:15], 1.0
	v_fma_f64 v[20:21], -v[6:7], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15]
	v_div_scale_f64 v[18:19], s0, v[10:11], v[2:3], v[10:11]
	v_fma_f64 v[16:17], v[16:17], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[22:23], v[14:15]
	v_mul_f64 v[24:25], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], -v[0:1], v[20:21], v[22:23]
	v_fma_f64 v[6:7], -v[6:7], v[24:25], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[0:1], v[0:1], v[14:15], v[20:21]
	s_mov_b32 vcc_lo, s0
	s_mov_b32 s0, 0x55555556
	v_div_fmas_f64 v[6:7], v[6:7], v[16:17], v[24:25]
	s_mov_b32 s1, 0x3fe55555
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[4:5], v[0:1], v[2:3], v[4:5]
	v_div_fixup_f64 v[6:7], v[6:7], v[2:3], v[10:11]
	v_mul_f64 v[10:11], v[2:3], -0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[6:7], v[6:7]
	v_fma_f64 v[0:1], v[4:5], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[10:11], v[0:1], v[12:13]
	v_mul_f64 v[10:11], v[0:1], s[0:1]
	v_add_co_u32 v0, vcc_lo, s8, v8
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v9, vcc_lo
	s_mov_b32 s0, 0
	ds_store_2addr_b64 v46, v[2:3], v[4:5] offset0:4 offset1:5
	ds_store_2addr_b64 v46, v[6:7], v[10:11] offset0:6 offset1:7
.LBB0_13:                               ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v2, s0, v46
	s_add_i32 s0, s0, 8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s0, 32
	ds_load_b64 v[2:3], v2 offset:32
	s_waitcnt lgkmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
	v_add_co_u32 v0, vcc_lo, v0, 8
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_cbranch_scc1 .LBB0_13
.LBB0_14:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z29update_struct_do_advance_cons12UpdateStructd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 66
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z29update_struct_do_advance_cons12UpdateStructd, .Lfunc_end0-_Z29update_struct_do_advance_cons12UpdateStructd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3860
; NumSgprs: 18
; NumVgprs: 66
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 8
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 66
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           40
        .value_kind:     by_value
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         168
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z29update_struct_do_advance_cons12UpdateStructd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z29update_struct_do_advance_cons12UpdateStructd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     66
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
