#include <ctime>
#include <cuda.h>
#include <iomanip>
#include <iostream>

using namespace std;

#define MASK_WIDTH 5
#define WIDTH 7

// Secuencial
void convolution_2D(double *m, double *mask, double *result) {
  for (int i = 0; i < WIDTH; i++) {
    for (int j = 0; j < WIDTH; j++) {
      double Pvalue = 0;

      int N_start_point = i - (MASK_WIDTH / 2);
      int M_start_point = j - (MASK_WIDTH / 2);

      for (int ii = 0; ii < MASK_WIDTH; ii++) {
        for (int jj = 0; jj < MASK_WIDTH; jj++) {
          if (N_start_point + ii >= 0 && N_start_point + ii < WIDTH &&
              M_start_point + jj >= 0 && M_start_point + jj < WIDTH) {
            Pvalue += m[WIDTH * (N_start_point + ii) + (M_start_point + jj)] * mask[MASK_WIDTH * ii + jj];
          }
        }
      }
      result[WIDTH * i + j] = Pvalue;
    }
  }
}

__global__
void convolution_2D_kernel(double *m, double *mask, double *result) {
  int row = blockIdx.y * blockDim.y + threadIdx.y;
  int col = blockIdx.x * blockDim.x + threadIdx.x;

  if (row < WIDTH && col < WIDTH) {
    double Pvalue = 0;

    int N_start_point = row - (MASK_WIDTH / 2);
    int M_start_point = col - (MASK_WIDTH / 2);

    for (int i = 0; i < MASK_WIDTH; i++) {
      for (int j = 0; j < MASK_WIDTH; j++) {
        if (N_start_point + i >= 0 && N_start_point + i < WIDTH &&
            M_start_point + j >= 0 && M_start_point + j < WIDTH) {
          Pvalue += m[WIDTH * (N_start_point + i) + (M_start_point + j)] * mask[MASK_WIDTH * i + j];
        }
      }
    }
    result[WIDTH * row + col] = Pvalue;
  }
}

void printMatrix(double *v) {
  for (int i = 0; i < WIDTH; i++) {
    cout << "[";
    for (int j = 0; j < WIDTH; j++) {
      if (j) cout << ", ";
      cout << v[WIDTH * i + j];
    }
    cout << "]" << endl;
  }
  cout << endl;
}

void fillMatrix(double *v) {
  for (int i = 0; i < WIDTH; i++) {
    for (int j = 0; j < WIDTH; j++) {
      v[WIDTH * i + j] = j + 1;
    }
  }
}

int main() {
  // Host
  double h_mask[] = {1, 2, 3, 2, 1, \
                     2, 3, 4, 3, 2, \
                     3, 4, 5, 4, 3, \
                     2, 3, 4, 3, 2, \
                     1, 2, 3, 2, 1};

  double h_m[] = {1, 2, 3, 4, 5, 6, 7, \
                 2, 3, 4, 5, 6, 7, 8, \
                 3, 4, 5, 6, 7, 8, 9, \
                 4, 5, 6, 7, 8, 5, 6, \
                 5, 6, 7, 8, 5, 6, 7, \
                 6, 7, 8, 9, 0, 1, 2, \
                 7, 8, 9, 0, 1, 2, 3};

  double *h_result = new double[WIDTH * WIDTH];
  double *ans = new double[WIDTH * WIDTH];
  // fillMatrix(h_m);

  {
    clock_t start = clock();

    convolution_2D(h_m, h_mask, h_result);
    printMatrix(h_m);
    printMatrix(h_result);

    clock_t end = clock();
    double time_used = double(end - start) / CLOCKS_PER_SEC;
    cout << "Tiempo invertido CPU = " << setprecision(10) << time_used << "s" << endl << endl;
  }

  // Device
  double *d_mask, *d_m, *d_result;
  int blockSize = 4;
  dim3 dimBlock(blockSize, blockSize, 1);
  dim3 dimGrid(ceil(WIDTH / float(blockSize)), ceil(WIDTH / float(blockSize)), 1);

  cudaMalloc(&d_mask, sizeof(double) * MASK_WIDTH * MASK_WIDTH);
  cudaMalloc(&d_m, sizeof(double) * WIDTH * WIDTH);
  cudaMalloc(&d_result, sizeof(double) * WIDTH * WIDTH);

  // Device
  {
    clock_t start = clock();

    cudaMemcpy(d_m, h_m, sizeof(double) * WIDTH * WIDTH, cudaMemcpyHostToDevice);
    cudaMemcpy(d_mask, h_mask, sizeof(double) * MASK_WIDTH * MASK_WIDTH, cudaMemcpyHostToDevice);

    convolution_2D_kernel<<< dimGrid, dimBlock >>>(d_m, d_mask, d_result);
    cudaMemcpy(ans, d_result, sizeof(double) * WIDTH * WIDTH, cudaMemcpyDeviceToHost);
    printMatrix(h_m);
    printMatrix(ans);

    clock_t end = clock();
    double time_used = double(end - start) / CLOCKS_PER_SEC;
    cout << "Tiempo invertido GPU = " << setprecision(10) << time_used << "s" << endl << endl;
  }

  return 0;
}

	.file	"tmpxft_0029df67_00000000-6_convolution_2D.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3921:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3921:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z14convolution_2DPdS_S_
	.type	_Z14convolution_2DPdS_S_, @function
_Z14convolution_2DPdS_S_:
.LFB3915:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rsi, %r10
	movq	%rdi, %r9
	xorl	%esi, %esi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
.L3:
	xorl	%eax, %eax
.L8:
	leal	-2(%rax), %r12d
	movl	%esi, %edi
	xorps	%xmm0, %xmm0
	xorl	%r8d, %r8d
	leal	3(%rax), %r13d
.L4:
	movl	%r12d, %ecx
	movl	%r8d, %r11d
	leal	-2(%rdi), %ebp
.L6:
	cmpl	$6, %ebp
	ja	.L5
	cmpl	$6, %ecx
	ja	.L5
	imull	$7, %edi, %ebx
	leal	-14(%rcx,%rbx), %r14d
	movslq	%r11d, %rbx
	movsd	(%r9,%r14,8), %xmm1
	mulsd	(%r10,%rbx,8), %xmm1
	addsd	%xmm1, %xmm0
.L5:
	incl	%ecx
	incl	%r11d
	cmpl	%r13d, %ecx
	jne	.L6
	addl	$5, %r8d
	incl	%edi
	cmpl	$25, %r8d
	jne	.L4
	movsd	%xmm0, (%rdx,%rax,8)
	incq	%rax
	cmpq	$7, %rax
	jne	.L8
	incl	%esi
	addq	$56, %rdx
	cmpl	$7, %esi
	jne	.L3
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3915:
	.size	_Z14convolution_2DPdS_S_, .-_Z14convolution_2DPdS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"["
.LC4:
	.string	", "
.LC5:
	.string	"]"
	.text
	.globl	_Z11printMatrixPd
	.type	_Z11printMatrixPd, @function
_Z11printMatrixPd:
.LFB3916:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC3(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	pushq	%rdx
	.cfi_def_cfa_offset 64
.L17:
	imulq	$56, %rbp, %r13
	movq	%r14, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	xorl	%ebx, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %r15
	addq	%r12, %r13
.L16:
	testq	%rbx, %rbx
	je	.L15
	movq	%r15, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L15:
	movsd	0(%r13,%rbx,8), %xmm0
	leaq	_ZSt4cout(%rip), %rdi
	incq	%rbx
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	cmpq	$7, %rbx
	jne	.L16
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	incq	%rbp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	cmpq	$7, %rbp
	jne	.L17
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZNSolsEPFRSoS_E@PLT
	.cfi_endproc
.LFE3916:
	.size	_Z11printMatrixPd, .-_Z11printMatrixPd
	.globl	_Z10fillMatrixPd
	.type	_Z10fillMatrixPd, @function
_Z10fillMatrixPd:
.LFB3917:
	.cfi_startproc
	endbr64
	xorl	%edx, %edx
.L25:
	movl	$1, %eax
.L26:
	cvtsi2sdl	%eax, %xmm0
	movsd	%xmm0, -8(%rdi,%rax,8)
	incq	%rax
	cmpq	$8, %rax
	jne	.L26
	addl	$7, %edx
	addq	$56, %rdi
	cmpl	$49, %edx
	jne	.L25
	ret
	.cfi_endproc
.LFE3917:
	.size	_Z10fillMatrixPd, .-_Z10fillMatrixPd
	.globl	_Z45__device_stub__Z21convolution_2D_kernelPdS_S_PdS_S_
	.type	_Z45__device_stub__Z21convolution_2D_kernelPdS_S_PdS_S_, @function
_Z45__device_stub__Z21convolution_2D_kernelPdS_S_PdS_S_:
.LFB3943:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z21convolution_2D_kernelPdS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L29:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3943:
	.size	_Z45__device_stub__Z21convolution_2D_kernelPdS_S_PdS_S_, .-_Z45__device_stub__Z21convolution_2D_kernelPdS_S_PdS_S_
	.globl	_Z21convolution_2D_kernelPdS_S_
	.type	_Z21convolution_2D_kernelPdS_S_, @function
_Z21convolution_2D_kernelPdS_S_:
.LFB3944:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z21convolution_2D_kernelPdS_S_PdS_S_
	.cfi_endproc
.LFE3944:
	.size	_Z21convolution_2D_kernelPdS_S_, .-_Z21convolution_2D_kernelPdS_S_
	.section	.rodata.str1.1
.LC7:
	.string	"Tiempo invertido CPU = "
.LC8:
	.string	"s"
.LC9:
	.string	"Tiempo invertido GPU = "
	.section	.rodata
	.align 32
.LC0:
	.long	0
	.long	1072693248
	.long	0
	.long	1073741824
	.long	0
	.long	1074266112
	.long	0
	.long	1073741824
	.long	0
	.long	1072693248
	.long	0
	.long	1073741824
	.long	0
	.long	1074266112
	.long	0
	.long	1074790400
	.long	0
	.long	1074266112
	.long	0
	.long	1073741824
	.long	0
	.long	1074266112
	.long	0
	.long	1074790400
	.long	0
	.long	1075052544
	.long	0
	.long	1074790400
	.long	0
	.long	1074266112
	.long	0
	.long	1073741824
	.long	0
	.long	1074266112
	.long	0
	.long	1074790400
	.long	0
	.long	1074266112
	.long	0
	.long	1073741824
	.long	0
	.long	1072693248
	.long	0
	.long	1073741824
	.long	0
	.long	1074266112
	.long	0
	.long	1073741824
	.long	0
	.long	1072693248
	.align 32
.LC1:
	.long	0
	.long	1072693248
	.long	0
	.long	1073741824
	.long	0
	.long	1074266112
	.long	0
	.long	1074790400
	.long	0
	.long	1075052544
	.long	0
	.long	1075314688
	.long	0
	.long	1075576832
	.long	0
	.long	1073741824
	.long	0
	.long	1074266112
	.long	0
	.long	1074790400
	.long	0
	.long	1075052544
	.long	0
	.long	1075314688
	.long	0
	.long	1075576832
	.long	0
	.long	1075838976
	.long	0
	.long	1074266112
	.long	0
	.long	1074790400
	.long	0
	.long	1075052544
	.long	0
	.long	1075314688
	.long	0
	.long	1075576832
	.long	0
	.long	1075838976
	.long	0
	.long	1075970048
	.long	0
	.long	1074790400
	.long	0
	.long	1075052544
	.long	0
	.long	1075314688
	.long	0
	.long	1075576832
	.long	0
	.long	1075838976
	.long	0
	.long	1075052544
	.long	0
	.long	1075314688
	.long	0
	.long	1075052544
	.long	0
	.long	1075314688
	.long	0
	.long	1075576832
	.long	0
	.long	1075838976
	.long	0
	.long	1075052544
	.long	0
	.long	1075314688
	.long	0
	.long	1075576832
	.long	0
	.long	1075314688
	.long	0
	.long	1075576832
	.long	0
	.long	1075838976
	.long	0
	.long	1075970048
	.long	0
	.long	0
	.long	0
	.long	1072693248
	.long	0
	.long	1073741824
	.long	0
	.long	1075576832
	.long	0
	.long	1075838976
	.long	0
	.long	1075970048
	.long	0
	.long	0
	.long	0
	.long	1072693248
	.long	0
	.long	1073741824
	.long	0
	.long	1074266112
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3918:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	movl	$50, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$680, %rsp
	.cfi_def_cfa_offset 736
	movq	%fs:40, %rax
	movq	%rax, 664(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rdi
	leaq	72(%rsp), %r14
	rep movsl
	leaq	272(%rsp), %rdi
	movl	$98, %ecx
	leaq	.LC1(%rip), %rsi
	rep movsl
	movl	$392, %edi
	leaq	272(%rsp), %rbp
	call	_Znam@PLT
	movl	$392, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movq	%rax, %rbx
	call	clock@PLT
	movq	%r12, %rdx
	movq	%r14, %rsi
	movq	%rbp, %rdi
	movq	%rax, %r13
	call	_Z14convolution_2DPdS_S_
	movq	%rbp, %rdi
	call	_Z11printMatrixPd
	movq	%r12, %rdi
	leaq	.LC8(%rip), %r12
	call	_Z11printMatrixPd
	call	clock@PLT
	leaq	.LC7(%rip), %rsi
	subq	%r13, %rax
	leaq	_ZSt4cout(%rip), %r13
	movq	%r13, %rdi
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC6(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	8(%rsp), %xmm0
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	movq	$10, 8(%rdi,%rax)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	leaq	24(%rsp), %rdi
	movabsq	$17179869188, %rax
	movl	$200, %esi
	movq	%rax, 48(%rsp)
	movabsq	$8589934594, %rax
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$392, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$392, %esi
	call	cudaMalloc@PLT
	call	clock@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$392, %edx
	movq	%rax, %r15
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	movl	$200, %edx
	call	cudaMemcpy@PLT
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	48(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z45__device_stub__Z21convolution_2D_kernelPdS_S_PdS_S_
.L35:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movl	$392, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movq	%rbp, %rdi
	call	_Z11printMatrixPd
	movq	%rbx, %rdi
	call	_Z11printMatrixPd
	call	clock@PLT
	leaq	.LC9(%rip), %rsi
	movq	%r13, %rdi
	subq	%r15, %rax
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC6(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	8(%rsp), %xmm0
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	movq	$10, 8(%rdi,%rax)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	movq	664(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$680, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3918:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z21convolution_2D_kernelPdS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3946:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z21convolution_2D_kernelPdS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3946:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <ctime>
#include <hip/hip_runtime.h>
#include <iomanip>
#include <iostream>

using namespace std;

#define MASK_WIDTH 5
#define WIDTH 7

// Secuencial
void convolution_2D(double *m, double *mask, double *result) {
  for (int i = 0; i < WIDTH; i++) {
    for (int j = 0; j < WIDTH; j++) {
      double Pvalue = 0;

      int N_start_point = i - (MASK_WIDTH / 2);
      int M_start_point = j - (MASK_WIDTH / 2);

      for (int ii = 0; ii < MASK_WIDTH; ii++) {
        for (int jj = 0; jj < MASK_WIDTH; jj++) {
          if (N_start_point + ii >= 0 && N_start_point + ii < WIDTH &&
              M_start_point + jj >= 0 && M_start_point + jj < WIDTH) {
            Pvalue += m[WIDTH * (N_start_point + ii) + (M_start_point + jj)] * mask[MASK_WIDTH * ii + jj];
          }
        }
      }
      result[WIDTH * i + j] = Pvalue;
    }
  }
}

__global__
void convolution_2D_kernel(double *m, double *mask, double *result) {
  int row = blockIdx.y * blockDim.y + threadIdx.y;
  int col = blockIdx.x * blockDim.x + threadIdx.x;

  if (row < WIDTH && col < WIDTH) {
    double Pvalue = 0;

    int N_start_point = row - (MASK_WIDTH / 2);
    int M_start_point = col - (MASK_WIDTH / 2);

    for (int i = 0; i < MASK_WIDTH; i++) {
      for (int j = 0; j < MASK_WIDTH; j++) {
        if (N_start_point + i >= 0 && N_start_point + i < WIDTH &&
            M_start_point + j >= 0 && M_start_point + j < WIDTH) {
          Pvalue += m[WIDTH * (N_start_point + i) + (M_start_point + j)] * mask[MASK_WIDTH * i + j];
        }
      }
    }
    result[WIDTH * row + col] = Pvalue;
  }
}

void printMatrix(double *v) {
  for (int i = 0; i < WIDTH; i++) {
    cout << "[";
    for (int j = 0; j < WIDTH; j++) {
      if (j) cout << ", ";
      cout << v[WIDTH * i + j];
    }
    cout << "]" << endl;
  }
  cout << endl;
}

void fillMatrix(double *v) {
  for (int i = 0; i < WIDTH; i++) {
    for (int j = 0; j < WIDTH; j++) {
      v[WIDTH * i + j] = j + 1;
    }
  }
}

int main() {
  // Host
  double h_mask[] = {1, 2, 3, 2, 1, \
                     2, 3, 4, 3, 2, \
                     3, 4, 5, 4, 3, \
                     2, 3, 4, 3, 2, \
                     1, 2, 3, 2, 1};

  double h_m[] = {1, 2, 3, 4, 5, 6, 7, \
                 2, 3, 4, 5, 6, 7, 8, \
                 3, 4, 5, 6, 7, 8, 9, \
                 4, 5, 6, 7, 8, 5, 6, \
                 5, 6, 7, 8, 5, 6, 7, \
                 6, 7, 8, 9, 0, 1, 2, \
                 7, 8, 9, 0, 1, 2, 3};

  double *h_result = new double[WIDTH * WIDTH];
  double *ans = new double[WIDTH * WIDTH];
  // fillMatrix(h_m);

  {
    clock_t start = clock();

    convolution_2D(h_m, h_mask, h_result);
    printMatrix(h_m);
    printMatrix(h_result);

    clock_t end = clock();
    double time_used = double(end - start) / CLOCKS_PER_SEC;
    cout << "Tiempo invertido CPU = " << setprecision(10) << time_used << "s" << endl << endl;
  }

  // Device
  double *d_mask, *d_m, *d_result;
  int blockSize = 4;
  dim3 dimBlock(blockSize, blockSize, 1);
  dim3 dimGrid(ceil(WIDTH / float(blockSize)), ceil(WIDTH / float(blockSize)), 1);

  hipMalloc(&d_mask, sizeof(double) * MASK_WIDTH * MASK_WIDTH);
  hipMalloc(&d_m, sizeof(double) * WIDTH * WIDTH);
  hipMalloc(&d_result, sizeof(double) * WIDTH * WIDTH);

  // Device
  {
    clock_t start = clock();

    hipMemcpy(d_m, h_m, sizeof(double) * WIDTH * WIDTH, hipMemcpyHostToDevice);
    hipMemcpy(d_mask, h_mask, sizeof(double) * MASK_WIDTH * MASK_WIDTH, hipMemcpyHostToDevice);

    convolution_2D_kernel<<< dimGrid, dimBlock >>>(d_m, d_mask, d_result);
    hipMemcpy(ans, d_result, sizeof(double) * WIDTH * WIDTH, hipMemcpyDeviceToHost);
    printMatrix(h_m);
    printMatrix(ans);

    clock_t end = clock();
    double time_used = double(end - start) / CLOCKS_PER_SEC;
    cout << "Tiempo invertido GPU = " << setprecision(10) << time_used << "s" << endl << endl;
  }

  return 0;
}

	.text
	.file	"convolution_2D.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z14convolution_2DPdS_S_        # -- Begin function _Z14convolution_2DPdS_S_
	.type	_Z14convolution_2DPdS_S_,@function
_Z14convolution_2DPdS_S_:               # @_Z14convolution_2DPdS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	addq	$-128, %rdi
	xorl	%eax, %eax
.LBB0_1:                                # %.preheader37
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_2 Depth 2
                                        #       Child Loop BB0_3 Depth 3
                                        #         Child Loop BB0_4 Depth 4
	leaq	-2(%rax), %rcx
	imulq	$56, %rax, %r8
	addq	%rdx, %r8
	movq	$-2, %r9
	movq	%rdi, %r10
	xorl	%r11d, %r11d
.LBB0_2:                                #   Parent Loop BB0_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_3 Depth 3
                                        #         Child Loop BB0_4 Depth 4
	xorpd	%xmm0, %xmm0
	movq	%r10, %rbx
	movq	%rsi, %r14
	xorl	%r15d, %r15d
.LBB0_3:                                # %.preheader
                                        #   Parent Loop BB0_1 Depth=1
                                        #     Parent Loop BB0_2 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB0_4 Depth 4
	leal	(%rcx,%r15), %ebp
	xorl	%r12d, %r12d
.LBB0_4:                                #   Parent Loop BB0_1 Depth=1
                                        #     Parent Loop BB0_2 Depth=2
                                        #       Parent Loop BB0_3 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	cmpl	$6, %ebp
	ja	.LBB0_7
# %bb.5:                                #   in Loop: Header=BB0_4 Depth=4
	leal	(%r9,%r12), %r13d
	cmpl	$6, %r13d
	ja	.LBB0_7
# %bb.6:                                #   in Loop: Header=BB0_4 Depth=4
	movsd	(%rbx,%r12,8), %xmm1            # xmm1 = mem[0],zero
	mulsd	(%r14,%r12,8), %xmm1
	addsd	%xmm1, %xmm0
.LBB0_7:                                #   in Loop: Header=BB0_4 Depth=4
	incq	%r12
	cmpq	$5, %r12
	jne	.LBB0_4
# %bb.8:                                #   in Loop: Header=BB0_3 Depth=3
	incq	%r15
	addq	$40, %r14
	addq	$56, %rbx
	cmpq	$5, %r15
	jne	.LBB0_3
# %bb.9:                                #   in Loop: Header=BB0_2 Depth=2
	movsd	%xmm0, (%r8,%r11,8)
	incq	%r11
	addq	$8, %r10
	incq	%r9
	cmpq	$7, %r11
	jne	.LBB0_2
# %bb.10:                               #   in Loop: Header=BB0_1 Depth=1
	incq	%rax
	addq	$56, %rdi
	cmpq	$7, %rax
	jne	.LBB0_1
# %bb.11:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z14convolution_2DPdS_S_, .Lfunc_end0-_Z14convolution_2DPdS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z36__device_stub__convolution_2D_kernelPdS_S_ # -- Begin function _Z36__device_stub__convolution_2D_kernelPdS_S_
	.type	_Z36__device_stub__convolution_2D_kernelPdS_S_,@function
_Z36__device_stub__convolution_2D_kernelPdS_S_: # @_Z36__device_stub__convolution_2D_kernelPdS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21convolution_2D_kernelPdS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z36__device_stub__convolution_2D_kernelPdS_S_, .Lfunc_end1-_Z36__device_stub__convolution_2D_kernelPdS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z11printMatrixPd               # -- Begin function _Z11printMatrixPd
	.type	_Z11printMatrixPd,@function
_Z11printMatrixPd:                      # @_Z11printMatrixPd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
	movl	$_ZSt4cout, %r15d
.LBB2_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%r12d, %r12d
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	testq	%r12, %r12
	je	.LBB2_4
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=2
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB2_4:                                #   in Loop: Header=BB2_2 Depth=2
	movsd	(%rbx,%r12,8), %xmm0            # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	incq	%r12
	cmpq	$7, %r12
	jne	.LBB2_2
# %bb.5:                                #   in Loop: Header=BB2_1 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r14
	addq	$56, %rbx
	cmpq	$7, %r14
	jne	.LBB2_1
# %bb.6:
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end2:
	.size	_Z11printMatrixPd, .Lfunc_end2-_Z11printMatrixPd
	.cfi_endproc
                                        # -- End function
	.globl	_Z10fillMatrixPd                # -- Begin function _Z10fillMatrixPd
	.type	_Z10fillMatrixPd,@function
_Z10fillMatrixPd:                       # @_Z10fillMatrixPd
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
.LBB3_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	xorl	%ecx, %ecx
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leaq	1(%rcx), %rdx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%edx, %xmm0
	movsd	%xmm0, (%rdi,%rcx,8)
	movq	%rdx, %rcx
	cmpq	$7, %rdx
	jne	.LBB3_2
# %bb.3:                                #   in Loop: Header=BB3_1 Depth=1
	incq	%rax
	addq	$56, %rdi
	cmpq	$7, %rax
	jne	.LBB3_1
# %bb.4:
	retq
.Lfunc_end3:
	.size	_Z10fillMatrixPd, .Lfunc_end3-_Z10fillMatrixPd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$632, %rsp                      # imm = 0x278
	.cfi_def_cfa_offset 688
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	432(%rsp), %r14
	movl	$.L__const.main.h_mask, %esi
	movl	$200, %edx
	movq	%r14, %rdi
	callq	memcpy@PLT
	leaq	32(%rsp), %r15
	movl	$.L__const.main.h_m, %esi
	movl	$392, %edx                      # imm = 0x188
	movq	%r15, %rdi
	callq	memcpy@PLT
	movl	$392, %edi                      # imm = 0x188
	callq	_Znam
	movq	%rax, %r12
	movl	$392, %edi                      # imm = 0x188
	callq	_Znam
	movq	%rax, %rbx
	callq	clock
	movq	%rax, %r13
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	callq	_Z14convolution_2DPdS_S_
	movq	%r15, %rdi
	callq	_Z11printMatrixPd
	movq	%r12, %rdi
	callq	_Z11printMatrixPd
	callq	clock
	subq	%r13, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI4_0(%rip), %xmm0
	movsd	%xmm0, (%rsp)                   # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	movq	$10, _ZSt4cout+8(%rax)
	movl	$_ZSt4cout, %edi
	movsd	(%rsp), %xmm0                   # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	24(%rsp), %r13
	movl	$200, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rbp
	movl	$392, %esi                      # imm = 0x188
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$392, %esi                      # imm = 0x188
	callq	hipMalloc
	callq	clock
	movq	%rax, %r12
	movq	(%rbp), %rdi
	movl	$392, %edx                      # imm = 0x188
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$200, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$8589934594, %rdi               # imm = 0x200000002
	movabsq	$17179869188, %rdx              # imm = 0x400000004
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_2
# %bb.1:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z36__device_stub__convolution_2D_kernelPdS_S_
.LBB4_2:
	movq	8(%rsp), %rsi
	movl	$392, %edx                      # imm = 0x188
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %rdi
	callq	_Z11printMatrixPd
	movq	%rbx, %rdi
	callq	_Z11printMatrixPd
	callq	clock
	subq	%r12, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI4_0(%rip), %xmm0
	movsd	%xmm0, (%rsp)                   # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	movq	$10, _ZSt4cout+8(%rax)
	movl	$_ZSt4cout, %edi
	movsd	(%rsp), %xmm0                   # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$632, %rsp                      # imm = 0x278
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21convolution_2D_kernelPdS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z21convolution_2D_kernelPdS_S_,@object # @_Z21convolution_2D_kernelPdS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z21convolution_2D_kernelPdS_S_
	.p2align	3, 0x0
_Z21convolution_2D_kernelPdS_S_:
	.quad	_Z36__device_stub__convolution_2D_kernelPdS_S_
	.size	_Z21convolution_2D_kernelPdS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"["
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	", "
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"]"
	.size	.L.str.2, 2

	.type	.L__const.main.h_mask,@object   # @__const.main.h_mask
	.section	.rodata,"a",@progbits
	.p2align	4, 0x0
.L__const.main.h_mask:
	.quad	0x3ff0000000000000              # double 1
	.quad	0x4000000000000000              # double 2
	.quad	0x4008000000000000              # double 3
	.quad	0x4000000000000000              # double 2
	.quad	0x3ff0000000000000              # double 1
	.quad	0x4000000000000000              # double 2
	.quad	0x4008000000000000              # double 3
	.quad	0x4010000000000000              # double 4
	.quad	0x4008000000000000              # double 3
	.quad	0x4000000000000000              # double 2
	.quad	0x4008000000000000              # double 3
	.quad	0x4010000000000000              # double 4
	.quad	0x4014000000000000              # double 5
	.quad	0x4010000000000000              # double 4
	.quad	0x4008000000000000              # double 3
	.quad	0x4000000000000000              # double 2
	.quad	0x4008000000000000              # double 3
	.quad	0x4010000000000000              # double 4
	.quad	0x4008000000000000              # double 3
	.quad	0x4000000000000000              # double 2
	.quad	0x3ff0000000000000              # double 1
	.quad	0x4000000000000000              # double 2
	.quad	0x4008000000000000              # double 3
	.quad	0x4000000000000000              # double 2
	.quad	0x3ff0000000000000              # double 1
	.size	.L__const.main.h_mask, 200

	.type	.L__const.main.h_m,@object      # @__const.main.h_m
	.p2align	4, 0x0
.L__const.main.h_m:
	.quad	0x3ff0000000000000              # double 1
	.quad	0x4000000000000000              # double 2
	.quad	0x4008000000000000              # double 3
	.quad	0x4010000000000000              # double 4
	.quad	0x4014000000000000              # double 5
	.quad	0x4018000000000000              # double 6
	.quad	0x401c000000000000              # double 7
	.quad	0x4000000000000000              # double 2
	.quad	0x4008000000000000              # double 3
	.quad	0x4010000000000000              # double 4
	.quad	0x4014000000000000              # double 5
	.quad	0x4018000000000000              # double 6
	.quad	0x401c000000000000              # double 7
	.quad	0x4020000000000000              # double 8
	.quad	0x4008000000000000              # double 3
	.quad	0x4010000000000000              # double 4
	.quad	0x4014000000000000              # double 5
	.quad	0x4018000000000000              # double 6
	.quad	0x401c000000000000              # double 7
	.quad	0x4020000000000000              # double 8
	.quad	0x4022000000000000              # double 9
	.quad	0x4010000000000000              # double 4
	.quad	0x4014000000000000              # double 5
	.quad	0x4018000000000000              # double 6
	.quad	0x401c000000000000              # double 7
	.quad	0x4020000000000000              # double 8
	.quad	0x4014000000000000              # double 5
	.quad	0x4018000000000000              # double 6
	.quad	0x4014000000000000              # double 5
	.quad	0x4018000000000000              # double 6
	.quad	0x401c000000000000              # double 7
	.quad	0x4020000000000000              # double 8
	.quad	0x4014000000000000              # double 5
	.quad	0x4018000000000000              # double 6
	.quad	0x401c000000000000              # double 7
	.quad	0x4018000000000000              # double 6
	.quad	0x401c000000000000              # double 7
	.quad	0x4020000000000000              # double 8
	.quad	0x4022000000000000              # double 9
	.quad	0x0000000000000000              # double 0
	.quad	0x3ff0000000000000              # double 1
	.quad	0x4000000000000000              # double 2
	.quad	0x401c000000000000              # double 7
	.quad	0x4020000000000000              # double 8
	.quad	0x4022000000000000              # double 9
	.quad	0x0000000000000000              # double 0
	.quad	0x3ff0000000000000              # double 1
	.quad	0x4000000000000000              # double 2
	.quad	0x4008000000000000              # double 3
	.size	.L__const.main.h_m, 392

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"Tiempo invertido CPU = "
	.size	.L.str.3, 24

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"s"
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Tiempo invertido GPU = "
	.size	.L.str.5, 24

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z21convolution_2D_kernelPdS_S_"
	.size	.L__unnamed_1, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z36__device_stub__convolution_2D_kernelPdS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z21convolution_2D_kernelPdS_S_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z21convolution_2D_kernelPdS_S_ ; -- Begin function _Z21convolution_2D_kernelPdS_S_
	.globl	_Z21convolution_2D_kernelPdS_S_
	.p2align	8
	.type	_Z21convolution_2D_kernelPdS_S_,@function
_Z21convolution_2D_kernelPdS_S_:        ; @_Z21convolution_2D_kernelPdS_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s8, s15, s3
	s_mul_i32 s14, s14, s2
	v_add_nc_u32_e32 v5, s8, v1
	v_add_nc_u32_e32 v0, s14, v2
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v3, v5, v0
	v_cmpx_gt_i32_e32 7, v3
	s_cbranch_execz .LBB0_10
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_mul_i32 s8, s8, 7
	v_mul_u32_u24_e32 v1, 7, v1
	v_add3_u32 v2, s14, s8, v2
	v_add_nc_u32_e32 v6, -2, v5
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v7, -2, v0
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v8, v2, v1, -16
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v2, 0
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	v_add_nc_u32_e32 v3, s1, v6
	s_waitcnt lgkmcnt(0)
	s_mov_b64 s[8:9], s[6:7]
	s_mov_b32 s10, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 7, v3
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB0_7
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=2
	v_add_nc_u32_e32 v3, s10, v7
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 7, v3
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=2
	v_add_nc_u32_e32 v3, s10, v8
	s_load_b64 s[14:15], s[8:9], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 3, v[3:4]
	v_add_co_u32 v9, s0, s4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s0, s5, v10, s0
	global_load_b64 v[9:10], v[9:10], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fma_f64 v[1:2], v[9:10], s[14:15], v[1:2]
.LBB0_6:                                ; %Flow
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s12
.LBB0_7:                                ;   in Loop: Header=BB0_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s11
	s_add_i32 s10, s10, 1
	s_add_u32 s8, s8, 8
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s10, 5
	s_cbranch_scc0 .LBB0_3
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s1, s1, 1
	v_add_nc_u32_e32 v8, 7, v8
	s_add_u32 s6, s6, 40
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s1, 5
	s_cbranch_scc0 .LBB0_2
; %bb.9:
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v5, 7, v[0:1]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_co_u32 v3, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	global_store_b64 v[3:4], v[1:2], off
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21convolution_2D_kernelPdS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z21convolution_2D_kernelPdS_S_, .Lfunc_end0-_Z21convolution_2D_kernelPdS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 384
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21convolution_2D_kernelPdS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21convolution_2D_kernelPdS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
