/**
 * Copyright 1993-2012 NVIDIA Corporation.  All rights reserved.
 *
 * Please refer to the NVIDIA end user license agreement (EULA) associated
 * with this source code for terms and conditions that govern your use of
 * this software. Any use, reproduction, disclosure, or distribution of
 * this software and related documentation outside the terms of the EULA
 * is strictly prohibited.
 */
#include <stdio.h>
#include <stdlib.h>

static const int VECTOR_SIZE = 32;
static const int WORK_SIZE = 16;

/**
 * This macro checks return value of the CUDA runtime call and exits
 * the application if the call failed.
 */
#define CUDA_CHECK_RETURN(value) {											\
	cudaError_t _m_cudaStat = value;										\
	if (_m_cudaStat != cudaSuccess) {										\
		fprintf(stderr, "Error %s at line %d in file %s\n",					\
				cudaGetErrorString(_m_cudaStat), __LINE__, __FILE__);		\
		exit(1);															\
	} }

__device__ int scan_warp(int *ptr, const unsigned int idx = threadIdx.x) {
	const unsigned int aux = idx & 31;

	if(aux >= 1) ptr[idx] = ptr[idx - 1] + ptr[idx];
	if(aux >= 2) ptr[idx] = ptr[idx - 2] + ptr[idx];
	if(aux >= 4) ptr[idx] = ptr[idx - 4] + ptr[idx];
	if(aux >= 8) ptr[idx] = ptr[idx - 8] + ptr[idx];
	if(aux >= 16) ptr[idx] = ptr[idx - 16] + ptr[idx];

	return ptr[idx];
}

__device__ int scan_block(int *ptr, const unsigned int idx = threadIdx.x) {
	const unsigned int aux = idx & 31;
	const unsigned int warp_id = idx >> 5;

	__shared__ int temp[32];

	int val = scan_warp(ptr, idx);

	__syncthreads();

	if(aux == 31) temp[warp_id] = ptr[idx];

	__syncthreads();

	if(warp_id == 0) scan_warp(temp, idx);

	__syncthreads();

	if(warp_id > 0) val = temp[warp_id - 1] + val;

	__syncthreads();

	ptr[idx] = val;

	__syncthreads();

	return val;
}

__global__ void scan_global(int *ptr) {
	const unsigned int idx = threadIdx.x;
	const unsigned int aux = idx & blockDim.x;
	const unsigned int bi = blockIdx.x;

	extern __shared__ int temp[];

	int val = scan_block(ptr, idx);

	__syncthreads();

	if(aux == blockDim.x) temp[bi] = ptr[idx];

	__syncthreads();

	if(bi == 0) scan_block(temp, idx);

	__syncthreads();

	if(bi > 0) val = temp[bi - 1] + val;

	__syncthreads();

	ptr[idx] = val;

	__syncthreads();

	return;
}

/**
 * Host function that prepares data array and passes it to the CUDA kernel.
 */
int main(void) {
	int *d = NULL;
	int i;
	unsigned int GRID_SIZE = (1 + VECTOR_SIZE) / WORK_SIZE;
	unsigned int idata[VECTOR_SIZE], odata[VECTOR_SIZE];

	for (i = 0; i < VECTOR_SIZE; i++)
		idata[i] = (unsigned int) i;

	CUDA_CHECK_RETURN(cudaMalloc((void**) &d, sizeof(int) * VECTOR_SIZE));
	CUDA_CHECK_RETURN(
			cudaMemcpy(d, idata, sizeof(int) * VECTOR_SIZE, cudaMemcpyHostToDevice));

	scan_global<<<GRID_SIZE, WORK_SIZE, WORK_SIZE * sizeof(int)>>>(d);

	CUDA_CHECK_RETURN(cudaDeviceSynchronize());	// Wait for the GPU launched work to complete
	CUDA_CHECK_RETURN(cudaGetLastError());
	CUDA_CHECK_RETURN(cudaMemcpy(odata, d, sizeof(int) * VECTOR_SIZE, cudaMemcpyDeviceToHost));

	unsigned int sum = idata[0];
	for (i = 0; i < VECTOR_SIZE - 1; i++) {
		if(odata[i] != sum) {
			printf("Erro !!!");
		}
		if((i + 1) < VECTOR_SIZE) {
			sum += idata[i+1];
		}
		printf("Input value: %u, device output: %u\n", idata[i], odata[i]);
	}

	if(odata[VECTOR_SIZE - 1] != sum) {
		printf("Erro !!!");
	}
	printf("Input value: %u, device output: %u\n", idata[i], odata[VECTOR_SIZE - 1]);

	CUDA_CHECK_RETURN(cudaFree((void*) d));
	CUDA_CHECK_RETURN(cudaDeviceReset());

	return 0;
}

	.file	"tmpxft_00340138_00000000-6_Scan.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9scan_warpPij
	.type	_Z9scan_warpPij, @function
_Z9scan_warpPij:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z9scan_warpPij, .-_Z9scan_warpPij
	.globl	_Z10scan_blockPij
	.type	_Z10scan_blockPij, @function
_Z10scan_blockPij:
.LFB2174:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z9scan_warpPij
	.cfi_endproc
.LFE2174:
	.size	_Z10scan_blockPij, .-_Z10scan_blockPij
	.globl	_Z31__device_stub__Z11scan_globalPiPi
	.type	_Z31__device_stub__Z11scan_globalPiPi, @function
_Z31__device_stub__Z11scan_globalPiPi:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z11scan_globalPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L6:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z31__device_stub__Z11scan_globalPiPi, .-_Z31__device_stub__Z11scan_globalPiPi
	.globl	_Z11scan_globalPi
	.type	_Z11scan_globalPi, @function
_Z11scan_globalPi:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z11scan_globalPiPi
	.cfi_endproc
.LFE2055:
	.size	_Z11scan_globalPi, .-_Z11scan_globalPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/wakim/prog-gpu-cuda/master/Scan/src/Scan.cu"
.LC1:
	.string	"Error %s at line %d in file %s\n"
.LC2:
	.string	"Erro !!!"
.LC3:
	.string	"Input value: %u, device output: %u\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%edx, %edx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$312, %rsp
	.cfi_def_cfa_offset 368
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %r12
.L13:
	movl	%eax, (%r12,%rax,4)
	incq	%rax
	cmpq	$32, %rax
	jne	.L13
	leaq	8(%rsp), %rdi
	movl	$128, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L14
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %r9
	movl	$111, %r8d
	movq	%rax, %rcx
	jmp	.L29
.L14:
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$128, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L15
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %r9
	movl	$112, %r8d
	movq	%rax, %rcx
.L29:
	movq	stderr(%rip), %rdi
	leaq	.LC1(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L15:
	movl	$268435457, %edx
	movl	$2147483649, %edi
	xorl	%r9d, %r9d
	movl	$64, %r8d
	salq	$4, %rdx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	8(%rsp), %rdi
	call	_Z31__device_stub__Z11scan_globalPiPi
.L16:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L17
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %r9
	movl	$117, %r8d
	movq	%rax, %rcx
	jmp	.L29
.L17:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L18
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %r9
	movl	$118, %r8d
	movq	%rax, %rcx
	jmp	.L29
.L18:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$128, %edx
	leaq	168(%rsp), %r13
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L19
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %r9
	movl	$119, %r8d
	movq	%rax, %rcx
	jmp	.L29
.L19:
	movl	40(%rsp), %ebp
	xorl	%ebx, %ebx
	leaq	.LC2(%rip), %r15
.L21:
	cmpl	%ebp, 0(%r13,%rbx)
	je	.L20
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L20:
	movl	0(%r13,%rbx), %ecx
	movl	(%r12,%rbx), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %r14
	addl	44(%rsp,%rbx), %ebp
	addq	$4, %rbx
	movq	%r14, %rsi
	call	__printf_chk@PLT
	cmpq	$124, %rbx
	jne	.L21
	cmpl	%ebp, 292(%rsp)
	je	.L22
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L22:
	movl	292(%rsp), %ecx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movl	164(%rsp), %edx
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L23
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %r9
	movl	$137, %r8d
	movq	%rax, %rcx
	jmp	.L29
.L23:
	call	cudaDeviceReset@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L24
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %r9
	movl	$138, %r8d
	movq	%rax, %rcx
	jmp	.L29
.L24:
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$312, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z11scan_globalPi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z11scan_globalPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * Copyright 1993-2012 NVIDIA Corporation.  All rights reserved.
 *
 * Please refer to the NVIDIA end user license agreement (EULA) associated
 * with this source code for terms and conditions that govern your use of
 * this software. Any use, reproduction, disclosure, or distribution of
 * this software and related documentation outside the terms of the EULA
 * is strictly prohibited.
 */

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>

static const int VECTOR_SIZE = 32;
static const int WORK_SIZE = 16;

/**
 * This macro checks return value of the CUDA runtime call and exits
 * the application if the call failed.
 */
#define CUDA_CHECK_RETURN(value) {											\
	hipError_t _m_cudaStat = value;										\
	if (_m_cudaStat != hipSuccess) {										\
		fprintf(stderr, "Error %s at line %d in file %s\n",					\
				hipGetErrorString(_m_cudaStat), __LINE__, __FILE__);		\
		exit(1);															\
	} }

__device__ int scan_warp(int *ptr, const unsigned int idx = threadIdx.x) {
	const unsigned int aux = idx & 31;

	if(aux >= 1) ptr[idx] = ptr[idx - 1] + ptr[idx];
	if(aux >= 2) ptr[idx] = ptr[idx - 2] + ptr[idx];
	if(aux >= 4) ptr[idx] = ptr[idx - 4] + ptr[idx];
	if(aux >= 8) ptr[idx] = ptr[idx - 8] + ptr[idx];
	if(aux >= 16) ptr[idx] = ptr[idx - 16] + ptr[idx];

	return ptr[idx];
}

__device__ int scan_block(int *ptr, const unsigned int idx = threadIdx.x) {
	const unsigned int aux = idx & 31;
	const unsigned int warp_id = idx >> 5;

	__shared__ int temp[32];

	int val = scan_warp(ptr, idx);

	__syncthreads();

	if(aux == 31) temp[warp_id] = ptr[idx];

	__syncthreads();

	if(warp_id == 0) scan_warp(temp, idx);

	__syncthreads();

	if(warp_id > 0) val = temp[warp_id - 1] + val;

	__syncthreads();

	ptr[idx] = val;

	__syncthreads();

	return val;
}

__global__ void scan_global(int *ptr) {
	const unsigned int idx = threadIdx.x;
	const unsigned int aux = idx & blockDim.x;
	const unsigned int bi = blockIdx.x;

	extern __shared__ int temp[];

	int val = scan_block(ptr, idx);

	__syncthreads();

	if(aux == blockDim.x) temp[bi] = ptr[idx];

	__syncthreads();

	if(bi == 0) scan_block(temp, idx);

	__syncthreads();

	if(bi > 0) val = temp[bi - 1] + val;

	__syncthreads();

	ptr[idx] = val;

	__syncthreads();

	return;
}

/**
 * Host function that prepares data array and passes it to the CUDA kernel.
 */
int main(void) {
	int *d = NULL;
	int i;
	unsigned int GRID_SIZE = (1 + VECTOR_SIZE) / WORK_SIZE;
	unsigned int idata[VECTOR_SIZE], odata[VECTOR_SIZE];

	for (i = 0; i < VECTOR_SIZE; i++)
		idata[i] = (unsigned int) i;

	CUDA_CHECK_RETURN(hipMalloc((void**) &d, sizeof(int) * VECTOR_SIZE));
	CUDA_CHECK_RETURN(
			hipMemcpy(d, idata, sizeof(int) * VECTOR_SIZE, hipMemcpyHostToDevice));

	scan_global<<<GRID_SIZE, WORK_SIZE, WORK_SIZE * sizeof(int)>>>(d);

	CUDA_CHECK_RETURN(hipDeviceSynchronize());	// Wait for the GPU launched work to complete
	CUDA_CHECK_RETURN(hipGetLastError());
	CUDA_CHECK_RETURN(hipMemcpy(odata, d, sizeof(int) * VECTOR_SIZE, hipMemcpyDeviceToHost));

	unsigned int sum = idata[0];
	for (i = 0; i < VECTOR_SIZE - 1; i++) {
		if(odata[i] != sum) {
			printf("Erro !!!");
		}
		if((i + 1) < VECTOR_SIZE) {
			sum += idata[i+1];
		}
		printf("Input value: %u, device output: %u\n", idata[i], odata[i]);
	}

	if(odata[VECTOR_SIZE - 1] != sum) {
		printf("Erro !!!");
	}
	printf("Input value: %u, device output: %u\n", idata[i], odata[VECTOR_SIZE - 1]);

	CUDA_CHECK_RETURN(hipFree((void*) d));
	CUDA_CHECK_RETURN(hipDeviceReset());

	return 0;
}

	.text
	.file	"Scan.hip"
	.globl	_Z26__device_stub__scan_globalPi # -- Begin function _Z26__device_stub__scan_globalPi
	.type	_Z26__device_stub__scan_globalPi,@function
_Z26__device_stub__scan_globalPi:       # @_Z26__device_stub__scan_globalPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11scan_globalPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__scan_globalPi, .Lfunc_end0-_Z26__device_stub__scan_globalPi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$272, %rsp                      # imm = 0x110
	.cfi_def_cfa_offset 304
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	$0, 8(%rsp)
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, 16(%rsp,%rax,4)
	incq	%rax
	cmpq	$32, %rax
	jne	.LBB1_1
# %bb.2:
	leaq	8(%rsp), %rdi
	movl	$128, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.5:
	movq	8(%rsp), %rdi
	leaq	16(%rsp), %rsi
	movl	$128, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.7:
	movabsq	$4294967298, %rdi               # imm = 0x100000002
	leaq	14(%rdi), %rdx
	movl	$64, %r8d
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:
	movq	8(%rsp), %rdi
	callq	_Z26__device_stub__scan_globalPi
.LBB1_9:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.11:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.13:
	movq	8(%rsp), %rsi
	leaq	144(%rsp), %rdi
	movl	$128, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.15:
	movl	16(%rsp), %ebx
	xorl	%r14d, %r14d
.LBB1_16:                               # =>This Inner Loop Header: Depth=1
	movl	%ebx, %edx
	cmpl	%ebx, 144(%rsp,%r14,4)
	je	.LBB1_18
# %bb.17:                               #   in Loop: Header=BB1_16 Depth=1
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	144(%rsp,%r14,4), %edx
.LBB1_18:                               #   in Loop: Header=BB1_16 Depth=1
	leaq	1(%r14), %r15
	addl	20(%rsp,%r14,4), %ebx
	movl	16(%rsp,%r14,4), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%r15, %r14
	cmpq	$31, %r15
	jne	.LBB1_16
# %bb.19:
	cmpl	%ebx, 268(%rsp)
	je	.LBB1_21
# %bb.20:
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	268(%rsp), %ebx
.LBB1_21:
	movl	140(%rsp), %esi
	movl	$.L.str.3, %edi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	printf
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_22
# %bb.23:
	callq	hipDeviceReset
	testl	%eax, %eax
	jne	.LBB1_24
# %bb.25:
	xorl	%eax, %eax
	addq	$272, %rsp                      # imm = 0x110
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_3:
	.cfi_def_cfa_offset 304
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$113, %ecx
	jmp	.LBB1_4
.LBB1_6:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$115, %ecx
	jmp	.LBB1_4
.LBB1_10:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$119, %ecx
	jmp	.LBB1_4
.LBB1_12:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$120, %ecx
	jmp	.LBB1_4
.LBB1_14:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$121, %ecx
	jmp	.LBB1_4
.LBB1_22:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$139, %ecx
	jmp	.LBB1_4
.LBB1_24:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$140, %ecx
.LBB1_4:
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11scan_globalPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11scan_globalPi,@object       # @_Z11scan_globalPi
	.section	.rodata,"a",@progbits
	.globl	_Z11scan_globalPi
	.p2align	3, 0x0
_Z11scan_globalPi:
	.quad	_Z26__device_stub__scan_globalPi
	.size	_Z11scan_globalPi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error %s at line %d in file %s\n"
	.size	.L.str, 32

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/wakim/prog-gpu-cuda/master/Scan/src/Scan.hip"
	.size	.L.str.1, 107

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Erro !!!"
	.size	.L.str.2, 9

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Input value: %u, device output: %u\n"
	.size	.L.str.3, 36

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11scan_globalPi"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__scan_globalPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11scan_globalPi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11scan_globalPi       ; -- Begin function _Z11scan_globalPi
	.globl	_Z11scan_globalPi
	.p2align	8
	.type	_Z11scan_globalPi,@function
_Z11scan_globalPi:                      ; @_Z11scan_globalPi
; %bb.0:
	s_clause 0x1
	s_load_b64 s[8:9], s[0:1], 0x0
	s_load_b32 s10, s[0:1], 0x14
	v_and_b32_e32 v6, 31, v0
	v_lshlrev_b32_e32 v3, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 0, v6
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[1:2], v3, s[8:9] offset:-4
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	global_store_b32 v3, v1, s[8:9]
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_lt_u32_e64 s1, 1, v6
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_4
; %bb.3:
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v3, s[8:9] offset:-8
	global_load_b32 v2, v3, s[8:9]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	global_store_b32 v3, v1, s[8:9]
.LBB0_4:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_lt_u32_e64 s2, 3, v6
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.5:
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v3, s[8:9] offset:-16
	global_load_b32 v2, v3, s[8:9]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	global_store_b32 v3, v1, s[8:9]
.LBB0_6:
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_lt_u32_e64 s3, 7, v6
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB0_8
; %bb.7:
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v3, s[8:9] offset:-32
	global_load_b32 v2, v3, s[8:9]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	global_store_b32 v3, v1, s[8:9]
.LBB0_8:                                ; %._crit_edge.i
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, s5, s8, v3
	v_cmp_lt_u32_e64 s4, 15, v6
	v_cmp_gt_u32_e64 s6, 16, v6
	v_add_co_ci_u32_e64 v2, null, s9, 0, s5
                                        ; implicit-def: $vgpr4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s5, s6
	s_xor_b32 s5, exec_lo, s5
	s_cbranch_execz .LBB0_10
; %bb.9:                                ; %._crit_edge.i.i
	global_load_b32 v4, v[1:2], off
.LBB0_10:                               ; %Flow34
	s_and_not1_saveexec_b32 s5, s5
	s_cbranch_execz .LBB0_12
; %bb.11:
	s_clause 0x1
	global_load_b32 v4, v[1:2], off offset:-64
	global_load_b32 v5, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v5, v4
	global_store_b32 v[1:2], v4, off
.LBB0_12:                               ; %_Z9scan_warpPij.exit.i
	s_or_b32 exec_lo, exec_lo, s5
	v_lshrrev_b32_e32 v5, 5, v0
	v_cmp_eq_u32_e64 s7, 31, v6
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s5, s7
	s_cbranch_execz .LBB0_14
; %bb.13:
	global_load_b32 v6, v[1:2], off
	v_lshlrev_b32_e32 v7, 2, v5
	s_waitcnt vmcnt(0)
	ds_store_b32 v7, v6
.LBB0_14:
	s_or_b32 exec_lo, exec_lo, s5
	v_cmp_lt_u32_e64 s5, 31, v0
	v_cmp_gt_u32_e64 s8, 32, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s9, s8
	s_cbranch_execz .LBB0_25
; %bb.15:
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB0_17
; %bb.16:
	v_add_nc_u32_e32 v6, -4, v3
	ds_load_2addr_b32 v[6:7], v6 offset1:1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v7, v6
	ds_store_b32 v3, v6
.LBB0_17:
	s_or_b32 exec_lo, exec_lo, s11
	s_and_saveexec_b32 s11, s1
	s_cbranch_execz .LBB0_19
; %bb.18:
	v_add_nc_u32_e32 v6, -8, v3
	ds_load_b32 v6, v6
	ds_load_b32 v7, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v7, v6
	ds_store_b32 v3, v6
.LBB0_19:
	s_or_b32 exec_lo, exec_lo, s11
	s_and_saveexec_b32 s11, s2
	s_cbranch_execz .LBB0_21
; %bb.20:
	v_add_nc_u32_e32 v6, -16, v3
	ds_load_b32 v6, v6
	ds_load_b32 v7, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v7, v6
	ds_store_b32 v3, v6
.LBB0_21:
	s_or_b32 exec_lo, exec_lo, s11
	s_and_saveexec_b32 s11, s3
	s_cbranch_execz .LBB0_23
; %bb.22:
	v_subrev_nc_u32_e32 v6, 32, v3
	ds_load_b32 v6, v6
	ds_load_b32 v7, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v7, v6
	ds_store_b32 v3, v6
.LBB0_23:
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s4
	s_cbranch_execz .LBB0_25
; %bb.24:
	v_subrev_nc_u32_e32 v6, 64, v3
	ds_load_b32 v6, v6
	ds_load_b32 v7, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v7, v6
	ds_store_b32 v3, v6
.LBB0_25:                               ; %Flow33
	s_or_b32 exec_lo, exec_lo, s9
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s9, s5
	s_cbranch_execz .LBB0_27
; %bb.26:
	v_lshl_add_u32 v6, v5, 2, -4
	ds_load_b32 v6, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, v6, v4
.LBB0_27:                               ; %_Z10scan_blockPij.exit
	s_or_b32 exec_lo, exec_lo, s9
	s_and_b32 s9, 0xffff, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_and_b32_e32 v6, s9, v0
	s_barrier
	buffer_gl0_inv
	global_store_b32 v[1:2], v4, off
	s_waitcnt_vscnt null, 0x0
	v_cmp_eq_u32_e32 vcc_lo, s9, v6
	s_barrier
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB0_29
; %bb.28:
	global_load_b32 v6, v[1:2], off
	s_lshl_b32 s10, s15, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_addk_i32 s10, 0x80
	v_mov_b32_e32 v7, s10
	s_waitcnt vmcnt(0)
	ds_store_b32 v7, v6
.LBB0_29:
	s_or_b32 exec_lo, exec_lo, s9
	s_cmp_lg_u32 s15, 0
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s9, -1, 0
	s_barrier
	s_and_b32 vcc_lo, exec_lo, s9
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_58
; %bb.30:
	v_lshl_add_u32 v0, v0, 2, 0x80
	s_and_saveexec_b32 s10, s0
	s_cbranch_execz .LBB0_32
; %bb.31:
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v6, -4, v0
	ds_load_2addr_b32 v[6:7], v6 offset1:1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v7, v6
	ds_store_b32 v0, v6
.LBB0_32:
	s_or_b32 exec_lo, exec_lo, s10
	s_and_saveexec_b32 s10, s1
	s_cbranch_execz .LBB0_34
; %bb.33:
	v_add_nc_u32_e32 v6, -8, v0
	ds_load_b32 v6, v6
	ds_load_b32 v7, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v7, v6
	ds_store_b32 v0, v6
.LBB0_34:
	s_or_b32 exec_lo, exec_lo, s10
	s_and_saveexec_b32 s10, s2
	s_cbranch_execz .LBB0_36
; %bb.35:
	v_add_nc_u32_e32 v6, -16, v0
	ds_load_b32 v6, v6
	ds_load_b32 v7, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v7, v6
	ds_store_b32 v0, v6
.LBB0_36:
	s_or_b32 exec_lo, exec_lo, s10
	s_and_saveexec_b32 s10, s3
	s_cbranch_execz .LBB0_38
; %bb.37:
	v_subrev_nc_u32_e32 v6, 32, v0
	ds_load_b32 v6, v6
	ds_load_b32 v7, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v7, v6
	ds_store_b32 v0, v6
.LBB0_38:                               ; %._crit_edge.i17
	s_or_b32 exec_lo, exec_lo, s10
                                        ; implicit-def: $vgpr6
	s_and_saveexec_b32 s10, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s10
	s_cbranch_execz .LBB0_40
; %bb.39:                               ; %._crit_edge.i.i20
	ds_load_b32 v6, v0
.LBB0_40:                               ; %Flow30
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB0_42
; %bb.41:
	s_waitcnt lgkmcnt(0)
	v_subrev_nc_u32_e32 v6, 64, v0
	ds_load_b32 v6, v6
	ds_load_b32 v7, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v7, v6
	ds_store_b32 v0, v6
.LBB0_42:                               ; %_Z9scan_warpPij.exit.i22
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s6, s7
	s_cbranch_execz .LBB0_44
; %bb.43:
	ds_load_b32 v7, v0
	v_lshlrev_b32_e32 v8, 2, v5
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v8, v7
.LBB0_44:
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s6, s8
	s_cbranch_execz .LBB0_55
; %bb.45:
	s_and_saveexec_b32 s7, s0
	s_cbranch_execz .LBB0_47
; %bb.46:
	v_add_nc_u32_e32 v7, -4, v3
	ds_load_2addr_b32 v[7:8], v7 offset1:1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v7, v8, v7
	ds_store_b32 v3, v7
.LBB0_47:
	s_or_b32 exec_lo, exec_lo, s7
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_49
; %bb.48:
	v_add_nc_u32_e32 v7, -8, v3
	ds_load_b32 v7, v7
	ds_load_b32 v8, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v7, v8, v7
	ds_store_b32 v3, v7
.LBB0_49:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_51
; %bb.50:
	v_add_nc_u32_e32 v7, -16, v3
	ds_load_b32 v7, v7
	ds_load_b32 v8, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v7, v8, v7
	ds_store_b32 v3, v7
.LBB0_51:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB0_53
; %bb.52:
	v_subrev_nc_u32_e32 v7, 32, v3
	ds_load_b32 v7, v7
	ds_load_b32 v8, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v7, v8, v7
	ds_store_b32 v3, v7
.LBB0_53:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s4
	s_cbranch_execz .LBB0_55
; %bb.54:
	v_subrev_nc_u32_e32 v7, 64, v3
	ds_load_b32 v7, v7
	ds_load_b32 v8, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v7, v8, v7
	ds_store_b32 v3, v7
.LBB0_55:                               ; %Flow28
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB0_57
; %bb.56:
	v_lshl_add_u32 v3, v5, 2, -4
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v3, v6
.LBB0_57:                               ; %_Z10scan_blockPij.exit25
	s_or_b32 exec_lo, exec_lo, s0
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v0, v6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_58:
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_60
; %bb.59:
	s_lshl_b32 s0, s15, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_addk_i32 s0, 0x80
	s_add_i32 s0, s0, -4
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v0, s0
	ds_load_b32 v0, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, v0, v4
.LBB0_60:
	s_barrier
	buffer_gl0_inv
	global_store_b32 v[1:2], v4, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11scan_globalPi
		.amdhsa_group_segment_fixed_size 128
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11scan_globalPi, .Lfunc_end0-_Z11scan_globalPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1700
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 128 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         128
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 128
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11scan_globalPi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11scan_globalPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
