
#include <cuda_runtime.h>

#include <stdio.h>
#include <unistd.h>
#include <signal.h>

#include "NeuralNet.cuh"

sig_atomic_t volatile g_running = 1;

void sig_handler(int signum)
{
    if (signum == SIGINT)
        g_running = 0;
}


__global__
void add_input_spikes(NeuralNet *elem) {
    return;
}

__global__
void push_spikes(NeuralNet *elem) {
    return;
}

__global__
void generate_spikes(NeuralNet *elem) {
    return;
}

void launch_add_input_spikes(NeuralNet *elem) {
    add_input_spikes<<< 1, 1 >>>(elem);
    cudaDeviceSynchronize();
}

void launch_push_spikes(NeuralNet *elem) {
    push_spikes<<< 1, 1 >>>(elem);
    cudaDeviceSynchronize();
}

void launch_generate_spikes(NeuralNet *elem) {
    generate_spikes<<< 1, 1 >>>(elem);
    cudaDeviceSynchronize();
}


int main(int argc, char **argv)
{

    NeuralNet* neuralNet = new NeuralNet(5);
    // ToDo build up neural net here
    neuralNet->initThreadBlocks();

    signal(SIGINT, &sig_handler);

    while (g_running) {
        // neuralNet->updateActivity();
        neuralNet->trial();
        // neuralNet->getActivity();

//        launch_add_input_spikes(neuralNet);
//        launch_push_spikes(neuralNet);
//        launch_generate_spikes(neuralNet);
    }

    printf("exiting safely\n");

//    printf("On host (after by-pointer): name=%s, value=%d\n", e->name.c_str(), e->value);

    delete neuralNet;

    cudaDeviceReset();

    return 0;
}

	.file	"tmpxft_00281bc5_00000000-6_controller.cudafe1.cpp"
	.text
#APP

#NO_APP
	.globl	_Z11sig_handleri
	.type	_Z11sig_handleri, @function
_Z11sig_handleri:
.LFB2055:
	.cfi_startproc
	endbr64
	cmpl	$2, %edi
	jne	.L1
	xorl	%eax, %eax
	movl	%eax, g_running(%rip)
.L1:
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z11sig_handleri, .-_Z11sig_handleri
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2062:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"exiting safely\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2059:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA2059
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$48, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rcx
	.cfi_def_cfa_offset 32
.LEHB0:
	call	_ZN7ManagednwEm@PLT
.LEHE0:
	movl	$5, %esi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB1:
	call	_ZN9NeuralNetC1Ej@PLT
.LEHE1:
	movq	%rbx, %rdi
.LEHB2:
	call	_ZN9NeuralNet16initThreadBlocksEv@PLT
	leaq	_Z11sig_handleri(%rip), %rsi
	movl	$2, %edi
	call	signal@PLT
.L6:
	movl	g_running(%rip), %eax
	testl	%eax, %eax
	je	.L13
	movq	%rbx, %rdi
	call	_ZN9NeuralNet5trialEv@PLT
.LEHE2:
	jmp	.L6
.L9:
	endbr64
	movq	%rax, %rbp
.L8:
	movq	%rbx, %rdi
	call	_ZN7ManageddlEPv@PLT
	movq	%rbp, %rdi
.LEHB3:
	call	_Unwind_Resume@PLT
.L13:
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	_ZN9NeuralNetD1Ev@PLT
	movq	%rbx, %rdi
	call	_ZN7ManageddlEPv@PLT
	call	cudaDeviceReset@PLT
.LEHE3:
	popq	%rdx
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA2059:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE2059-.LLSDACSB2059
.LLSDACSB2059:
	.uleb128 .LEHB0-.LFB2059
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB2059
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L9-.LFB2059
	.uleb128 0
	.uleb128 .LEHB2-.LFB2059
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB3-.LFB2059
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE2059:
	.section	.text.startup
	.size	main, .-main
	.text
	.globl	_Z45__device_stub__Z16add_input_spikesP9NeuralNetP9NeuralNet
	.type	_Z45__device_stub__Z16add_input_spikesP9NeuralNetP9NeuralNet, @function
_Z45__device_stub__Z16add_input_spikesP9NeuralNetP9NeuralNet:
.LFB2084:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z16add_input_spikesP9NeuralNet(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L14:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2084:
	.size	_Z45__device_stub__Z16add_input_spikesP9NeuralNetP9NeuralNet, .-_Z45__device_stub__Z16add_input_spikesP9NeuralNetP9NeuralNet
	.globl	_Z16add_input_spikesP9NeuralNet
	.type	_Z16add_input_spikesP9NeuralNet, @function
_Z16add_input_spikesP9NeuralNet:
.LFB2085:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z16add_input_spikesP9NeuralNetP9NeuralNet
	.cfi_endproc
.LFE2085:
	.size	_Z16add_input_spikesP9NeuralNet, .-_Z16add_input_spikesP9NeuralNet
	.globl	_Z23launch_add_input_spikesP9NeuralNet
	.type	_Z23launch_add_input_spikesP9NeuralNet, @function
_Z23launch_add_input_spikesP9NeuralNet:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdi, %rdx
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	%rbx, %rdi
	call	_Z45__device_stub__Z16add_input_spikesP9NeuralNetP9NeuralNet
.L20:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	cudaDeviceSynchronize@PLT
	.cfi_endproc
.LFE2056:
	.size	_Z23launch_add_input_spikesP9NeuralNet, .-_Z23launch_add_input_spikesP9NeuralNet
	.globl	_Z40__device_stub__Z11push_spikesP9NeuralNetP9NeuralNet
	.type	_Z40__device_stub__Z11push_spikesP9NeuralNetP9NeuralNet, @function
_Z40__device_stub__Z11push_spikesP9NeuralNetP9NeuralNet:
.LFB2086:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z11push_spikesP9NeuralNet(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L22:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2086:
	.size	_Z40__device_stub__Z11push_spikesP9NeuralNetP9NeuralNet, .-_Z40__device_stub__Z11push_spikesP9NeuralNetP9NeuralNet
	.globl	_Z11push_spikesP9NeuralNet
	.type	_Z11push_spikesP9NeuralNet, @function
_Z11push_spikesP9NeuralNet:
.LFB2087:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z11push_spikesP9NeuralNetP9NeuralNet
	.cfi_endproc
.LFE2087:
	.size	_Z11push_spikesP9NeuralNet, .-_Z11push_spikesP9NeuralNet
	.globl	_Z18launch_push_spikesP9NeuralNet
	.type	_Z18launch_push_spikesP9NeuralNet, @function
_Z18launch_push_spikesP9NeuralNet:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdi, %rdx
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	%rbx, %rdi
	call	_Z40__device_stub__Z11push_spikesP9NeuralNetP9NeuralNet
.L28:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	cudaDeviceSynchronize@PLT
	.cfi_endproc
.LFE2057:
	.size	_Z18launch_push_spikesP9NeuralNet, .-_Z18launch_push_spikesP9NeuralNet
	.globl	_Z44__device_stub__Z15generate_spikesP9NeuralNetP9NeuralNet
	.type	_Z44__device_stub__Z15generate_spikesP9NeuralNetP9NeuralNet, @function
_Z44__device_stub__Z15generate_spikesP9NeuralNetP9NeuralNet:
.LFB2088:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z15generate_spikesP9NeuralNet(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L30:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2088:
	.size	_Z44__device_stub__Z15generate_spikesP9NeuralNetP9NeuralNet, .-_Z44__device_stub__Z15generate_spikesP9NeuralNetP9NeuralNet
	.globl	_Z15generate_spikesP9NeuralNet
	.type	_Z15generate_spikesP9NeuralNet, @function
_Z15generate_spikesP9NeuralNet:
.LFB2089:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z15generate_spikesP9NeuralNetP9NeuralNet
	.cfi_endproc
.LFE2089:
	.size	_Z15generate_spikesP9NeuralNet, .-_Z15generate_spikesP9NeuralNet
	.globl	_Z22launch_generate_spikesP9NeuralNet
	.type	_Z22launch_generate_spikesP9NeuralNet, @function
_Z22launch_generate_spikesP9NeuralNet:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdi, %rdx
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	movq	%rbx, %rdi
	call	_Z44__device_stub__Z15generate_spikesP9NeuralNetP9NeuralNet
.L36:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	cudaDeviceSynchronize@PLT
	.cfi_endproc
.LFE2058:
	.size	_Z22launch_generate_spikesP9NeuralNet, .-_Z22launch_generate_spikesP9NeuralNet
	.section	.rodata.str1.1
.LC1:
	.string	"_Z15generate_spikesP9NeuralNet"
.LC2:
	.string	"_Z11push_spikesP9NeuralNet"
.LC3:
	.string	"_Z16add_input_spikesP9NeuralNet"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2091:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15generate_spikesP9NeuralNet(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11push_spikesP9NeuralNet(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16add_input_spikesP9NeuralNet(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2091:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	g_running
	.data
	.align 4
	.type	g_running, @object
	.size	g_running, 4
g_running:
	.long	1
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>

#include <stdio.h>
#include <unistd.h>
#include <signal.h>

#include "NeuralNet.cuh"

sig_atomic_t volatile g_running = 1;

void sig_handler(int signum)
{
    if (signum == SIGINT)
        g_running = 0;
}


__global__
void add_input_spikes(NeuralNet *elem) {
    return;
}

__global__
void push_spikes(NeuralNet *elem) {
    return;
}

__global__
void generate_spikes(NeuralNet *elem) {
    return;
}

void launch_add_input_spikes(NeuralNet *elem) {
    add_input_spikes<<< 1, 1 >>>(elem);
    hipDeviceSynchronize();
}

void launch_push_spikes(NeuralNet *elem) {
    push_spikes<<< 1, 1 >>>(elem);
    hipDeviceSynchronize();
}

void launch_generate_spikes(NeuralNet *elem) {
    generate_spikes<<< 1, 1 >>>(elem);
    hipDeviceSynchronize();
}


int main(int argc, char **argv)
{

    NeuralNet* neuralNet = new NeuralNet(5);
    // ToDo build up neural net here
    neuralNet->initThreadBlocks();

    signal(SIGINT, &sig_handler);

    while (g_running) {
        // neuralNet->updateActivity();
        neuralNet->trial();
        // neuralNet->getActivity();

//        launch_add_input_spikes(neuralNet);
//        launch_push_spikes(neuralNet);
//        launch_generate_spikes(neuralNet);
    }

    printf("exiting safely\n");

//    printf("On host (after by-pointer): name=%s, value=%d\n", e->name.c_str(), e->value);

    delete neuralNet;

    hipDeviceReset();

    return 0;
}

	.text
	.file	"controller.hip"
	.globl	_Z11sig_handleri                # -- Begin function _Z11sig_handleri
	.type	_Z11sig_handleri,@function
_Z11sig_handleri:                       # @_Z11sig_handleri
	.cfi_startproc
# %bb.0:
	cmpl	$2, %edi
	jne	.LBB0_2
# %bb.1:
	movl	$0, g_running(%rip)
.LBB0_2:
	retq
.Lfunc_end0:
	.size	_Z11sig_handleri, .Lfunc_end0-_Z11sig_handleri
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__add_input_spikesP9NeuralNet # -- Begin function _Z31__device_stub__add_input_spikesP9NeuralNet
	.type	_Z31__device_stub__add_input_spikesP9NeuralNet,@function
_Z31__device_stub__add_input_spikesP9NeuralNet: # @_Z31__device_stub__add_input_spikesP9NeuralNet
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16add_input_spikesP9NeuralNet, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__add_input_spikesP9NeuralNet, .Lfunc_end1-_Z31__device_stub__add_input_spikesP9NeuralNet
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__push_spikesP9NeuralNet # -- Begin function _Z26__device_stub__push_spikesP9NeuralNet
	.type	_Z26__device_stub__push_spikesP9NeuralNet,@function
_Z26__device_stub__push_spikesP9NeuralNet: # @_Z26__device_stub__push_spikesP9NeuralNet
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11push_spikesP9NeuralNet, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z26__device_stub__push_spikesP9NeuralNet, .Lfunc_end2-_Z26__device_stub__push_spikesP9NeuralNet
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__generate_spikesP9NeuralNet # -- Begin function _Z30__device_stub__generate_spikesP9NeuralNet
	.type	_Z30__device_stub__generate_spikesP9NeuralNet,@function
_Z30__device_stub__generate_spikesP9NeuralNet: # @_Z30__device_stub__generate_spikesP9NeuralNet
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15generate_spikesP9NeuralNet, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z30__device_stub__generate_spikesP9NeuralNet, .Lfunc_end3-_Z30__device_stub__generate_spikesP9NeuralNet
	.cfi_endproc
                                        # -- End function
	.globl	_Z23launch_add_input_spikesP9NeuralNet # -- Begin function _Z23launch_add_input_spikesP9NeuralNet
	.type	_Z23launch_add_input_spikesP9NeuralNet,@function
_Z23launch_add_input_spikesP9NeuralNet: # @_Z23launch_add_input_spikesP9NeuralNet
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_2
# %bb.1:
	movq	%rbx, %rdi
	callq	_Z31__device_stub__add_input_spikesP9NeuralNet
.LBB4_2:
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	hipDeviceSynchronize            # TAILCALL
.Lfunc_end4:
	.size	_Z23launch_add_input_spikesP9NeuralNet, .Lfunc_end4-_Z23launch_add_input_spikesP9NeuralNet
	.cfi_endproc
                                        # -- End function
	.globl	_Z18launch_push_spikesP9NeuralNet # -- Begin function _Z18launch_push_spikesP9NeuralNet
	.type	_Z18launch_push_spikesP9NeuralNet,@function
_Z18launch_push_spikesP9NeuralNet:      # @_Z18launch_push_spikesP9NeuralNet
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	movq	%rbx, %rdi
	callq	_Z26__device_stub__push_spikesP9NeuralNet
.LBB5_2:
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	hipDeviceSynchronize            # TAILCALL
.Lfunc_end5:
	.size	_Z18launch_push_spikesP9NeuralNet, .Lfunc_end5-_Z18launch_push_spikesP9NeuralNet
	.cfi_endproc
                                        # -- End function
	.globl	_Z22launch_generate_spikesP9NeuralNet # -- Begin function _Z22launch_generate_spikesP9NeuralNet
	.type	_Z22launch_generate_spikesP9NeuralNet,@function
_Z22launch_generate_spikesP9NeuralNet:  # @_Z22launch_generate_spikesP9NeuralNet
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_2
# %bb.1:
	movq	%rbx, %rdi
	callq	_Z30__device_stub__generate_spikesP9NeuralNet
.LBB6_2:
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	hipDeviceSynchronize            # TAILCALL
.Lfunc_end6:
	.size	_Z22launch_generate_spikesP9NeuralNet, .Lfunc_end6-_Z22launch_generate_spikesP9NeuralNet
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	$48, %edi
	callq	_ZN7ManagednwEm
	movq	%rax, %rbx
.Ltmp0:
	movq	%rax, %rdi
	movl	$5, %esi
	callq	_ZN9NeuralNetC1Ej
.Ltmp1:
# %bb.1:
	movq	%rbx, %rdi
	callq	_ZN9NeuralNet16initThreadBlocksEv
	movl	$_Z11sig_handleri, %esi
	movl	$2, %edi
	callq	signal
.LBB7_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	cmpl	$0, g_running(%rip)
	je	.LBB7_4
# %bb.2:                                # %.lr.ph
                                        #   in Loop: Header=BB7_3 Depth=1
	movq	%rbx, %rdi
	callq	_ZN9NeuralNet5trialEv
	jmp	.LBB7_3
.LBB7_4:                                # %._crit_edge
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	%rbx, %rdi
	callq	_ZN9NeuralNetD1Ev
	movq	%rbx, %rdi
	callq	_ZN7ManageddlEPv
	callq	hipDeviceReset
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB7_5:
	.cfi_def_cfa_offset 32
.Ltmp2:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_ZN7ManageddlEPv
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table7:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp1-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Lfunc_end7-.Ltmp1             #   Call between .Ltmp1 and .Lfunc_end7
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16add_input_spikesP9NeuralNet, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11push_spikesP9NeuralNet, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15generate_spikesP9NeuralNet, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	g_running,@object               # @g_running
	.data
	.globl	g_running
	.p2align	2, 0x0
g_running:
	.long	1                               # 0x1
	.size	g_running, 4

	.type	_Z16add_input_spikesP9NeuralNet,@object # @_Z16add_input_spikesP9NeuralNet
	.section	.rodata,"a",@progbits
	.globl	_Z16add_input_spikesP9NeuralNet
	.p2align	3, 0x0
_Z16add_input_spikesP9NeuralNet:
	.quad	_Z31__device_stub__add_input_spikesP9NeuralNet
	.size	_Z16add_input_spikesP9NeuralNet, 8

	.type	_Z11push_spikesP9NeuralNet,@object # @_Z11push_spikesP9NeuralNet
	.globl	_Z11push_spikesP9NeuralNet
	.p2align	3, 0x0
_Z11push_spikesP9NeuralNet:
	.quad	_Z26__device_stub__push_spikesP9NeuralNet
	.size	_Z11push_spikesP9NeuralNet, 8

	.type	_Z15generate_spikesP9NeuralNet,@object # @_Z15generate_spikesP9NeuralNet
	.globl	_Z15generate_spikesP9NeuralNet
	.p2align	3, 0x0
_Z15generate_spikesP9NeuralNet:
	.quad	_Z30__device_stub__generate_spikesP9NeuralNet
	.size	_Z15generate_spikesP9NeuralNet, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z16add_input_spikesP9NeuralNet"
	.size	.L__unnamed_1, 32

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11push_spikesP9NeuralNet"
	.size	.L__unnamed_2, 27

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z15generate_spikesP9NeuralNet"
	.size	.L__unnamed_3, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"exiting safely"
	.size	.Lstr, 15

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z11sig_handleri
	.addrsig_sym _Z31__device_stub__add_input_spikesP9NeuralNet
	.addrsig_sym _Z26__device_stub__push_spikesP9NeuralNet
	.addrsig_sym _Z30__device_stub__generate_spikesP9NeuralNet
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym g_running
	.addrsig_sym _Z16add_input_spikesP9NeuralNet
	.addrsig_sym _Z11push_spikesP9NeuralNet
	.addrsig_sym _Z15generate_spikesP9NeuralNet
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16add_input_spikesP9NeuralNet ; -- Begin function _Z16add_input_spikesP9NeuralNet
	.globl	_Z16add_input_spikesP9NeuralNet
	.p2align	8
	.type	_Z16add_input_spikesP9NeuralNet,@function
_Z16add_input_spikesP9NeuralNet:        ; @_Z16add_input_spikesP9NeuralNet
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16add_input_spikesP9NeuralNet
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16add_input_spikesP9NeuralNet, .Lfunc_end0-_Z16add_input_spikesP9NeuralNet
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11push_spikesP9NeuralNet ; -- Begin function _Z11push_spikesP9NeuralNet
	.globl	_Z11push_spikesP9NeuralNet
	.p2align	8
	.type	_Z11push_spikesP9NeuralNet,@function
_Z11push_spikesP9NeuralNet:             ; @_Z11push_spikesP9NeuralNet
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11push_spikesP9NeuralNet
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11push_spikesP9NeuralNet, .Lfunc_end1-_Z11push_spikesP9NeuralNet
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15generate_spikesP9NeuralNet ; -- Begin function _Z15generate_spikesP9NeuralNet
	.globl	_Z15generate_spikesP9NeuralNet
	.p2align	8
	.type	_Z15generate_spikesP9NeuralNet,@function
_Z15generate_spikesP9NeuralNet:         ; @_Z15generate_spikesP9NeuralNet
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15generate_spikesP9NeuralNet
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z15generate_spikesP9NeuralNet, .Lfunc_end2-_Z15generate_spikesP9NeuralNet
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16add_input_spikesP9NeuralNet
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z16add_input_spikesP9NeuralNet.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11push_spikesP9NeuralNet
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z11push_spikesP9NeuralNet.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15generate_spikesP9NeuralNet
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z15generate_spikesP9NeuralNet.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
