#include "CudaComputing.cuh"

#include "cuda_runtime.h"

#include "device_launch_parameters.h"

 

cudaError_t addWithCuda(int *c, const int *a, const int *b, size_t size);

__global__ void addKernel(int *c, const int *a, const int *b)

{
    int i = threadIdx.x;
    c[i] = a[i] + b[i];
}
int vvmain(int* c)
{
	const int arraySize = 5;
    const int a[arraySize] = {1, 2, 3, 4, 5 };
    const int b[arraySize] = {10, 20, 30, 40, 50 };
    // Add vectors inparallel.

    cudaError_t cudaStatus =addWithCuda(c, a, b, arraySize);
    if (cudaStatus !=cudaSuccess) {
        return 1;
    }

 

    // cudaDeviceReset must becalled before exiting in order for profiling and

    // tracing tools such asNsight and Visual Profiler to show complete traces.

    cudaStatus =cudaDeviceReset();
    if (cudaStatus !=cudaSuccess) {
        return 1;
    }
    return 0;
}
// Helper function for using CUDA to add vectors in parallel.
cudaError_t addWithCuda(int *c, const int *a, const int *b, size_t size)
{

    int *dev_a = 0;
    int *dev_b = 0;
    int *dev_c = 0;

    cudaError_t cudaStatus;
    // Choose which GPU to runon, change this on a multi-GPU system
    cudaStatus =cudaSetDevice(0);
    if (cudaStatus !=cudaSuccess) {
       goto Error;
    }
    // Allocate GPU buffersfor three vectors (two input, one output)   .
    cudaStatus =cudaMalloc((void**)&dev_c, size * sizeof(int));
    if (cudaStatus !=cudaSuccess) {
        goto Error;
    }
    cudaStatus =cudaMalloc((void**)&dev_a, size * sizeof(int));
    if (cudaStatus !=cudaSuccess) {
        goto Error;
    }
    cudaStatus =cudaMalloc((void**)&dev_b, size * sizeof(int));
    if (cudaStatus !=cudaSuccess) {
        goto Error;

    }
    // Copy input vectors fromhost memory to GPU buffers.
    cudaStatus =cudaMemcpy(dev_a, a, size * sizeof(int), cudaMemcpyHostToDevice);
    if (cudaStatus !=cudaSuccess) {
        goto Error;
    }
    cudaStatus =cudaMemcpy(dev_b, b, size * sizeof(int), cudaMemcpyHostToDevice);
    if (cudaStatus !=cudaSuccess) {
        goto Error;
    }
    // Launch a kernel on theGPU with one thread for each element.
    addKernel<<<(size-1)/128+1,128>>>(dev_c, dev_a, dev_b);
    // cudaDeviceSynchronizewaits for the kernel to finish, and returns
    // any errors encounteredduring the launch.
    cudaStatus =cudaDeviceSynchronize();
    if (cudaStatus !=cudaSuccess) {
        goto Error;
    }
    // Copy output vector fromGPU buffer to host memory.
    cudaStatus = cudaMemcpy(c,dev_c, size * sizeof(int), cudaMemcpyDeviceToHost);
    if (cudaStatus !=cudaSuccess) {
        goto Error;
    }
Error:
    cudaFree(dev_c);
    cudaFree(dev_a);
    cudaFree(dev_b);
    return cudaStatus;
}
	.file	"tmpxft_0022b12f_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2012:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2012:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z34__device_stub__Z9addKernelPiPKiS1_PiPKiS1_
	.type	_Z34__device_stub__Z9addKernelPiPKiS1_PiPKiS1_, @function
_Z34__device_stub__Z9addKernelPiPKiS1_PiPKiS1_:
.LFB2034:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9addKernelPiPKiS1_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z34__device_stub__Z9addKernelPiPKiS1_PiPKiS1_, .-_Z34__device_stub__Z9addKernelPiPKiS1_PiPKiS1_
	.globl	_Z9addKernelPiPKiS1_
	.type	_Z9addKernelPiPKiS1_, @function
_Z9addKernelPiPKiS1_:
.LFB2035:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z9addKernelPiPKiS1_PiPKiS1_
	.cfi_endproc
.LFE2035:
	.size	_Z9addKernelPiPKiS1_, .-_Z9addKernelPiPKiS1_
	.globl	_Z11addWithCudaPiPKiS1_m
	.type	_Z11addWithCudaPiPKiS1_m, @function
_Z11addWithCudaPiPKiS1_m:
.LFB2009:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	xorl	%edi, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rax, 8(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 24(%rsp)
	call	cudaSetDevice@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L9
	leaq	0(,%r13,4), %rbp
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L9
	leaq	8(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L9
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L9
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	%r15, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L9
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L9
	decq	%r13
	movl	$33554433, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	shrq	$7, %r13
	salq	$7, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rax
	incl	%r13d
	movq	%rax, 36(%rsp)
	movl	40(%rsp), %esi
	movl	%r13d, 32(%rsp)
	movq	32(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z34__device_stub__Z9addKernelPiPKiS1_PiPKiS1_
.L10:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L9
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
.L9:
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2009:
	.size	_Z11addWithCudaPiPKiS1_m, .-_Z11addWithCudaPiPKiS1_m
	.globl	_Z6vvmainPi
	.type	_Z6vvmainPi, @function
_Z6vvmainPi:
.LFB2008:
	.cfi_startproc
	endbr64
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	movl	$5, %ecx
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	movabsq	$8589934593, %rax
	leaq	20(%rsp), %rdx
	movq	%rsp, %rsi
	movl	$5, 16(%rsp)
	movl	$50, 36(%rsp)
	movq	%rax, (%rsp)
	movabsq	$17179869187, %rax
	movq	%rax, 8(%rsp)
	movabsq	$85899345930, %rax
	movq	%rax, 20(%rsp)
	movabsq	$171798691870, %rax
	movq	%rax, 28(%rsp)
	call	_Z11addWithCudaPiPKiS1_m
	movl	%eax, %edx
	movl	$1, %eax
	testl	%edx, %edx
	jne	.L13
	call	cudaDeviceReset@PLT
	testl	%eax, %eax
	setne	%al
	movzbl	%al, %eax
.L13:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2008:
	.size	_Z6vvmainPi, .-_Z6vvmainPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z9addKernelPiPKiS1_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9addKernelPiPKiS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2037:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "CudaComputing.cuh"

#include "hip/hip_runtime.h"



 

hipError_t addWithCuda(int *c, const int *a, const int *b, size_t size);

__global__ void addKernel(int *c, const int *a, const int *b)

{
    int i = threadIdx.x;
    c[i] = a[i] + b[i];
}
int vvmain(int* c)
{
	const int arraySize = 5;
    const int a[arraySize] = {1, 2, 3, 4, 5 };
    const int b[arraySize] = {10, 20, 30, 40, 50 };
    // Add vectors inparallel.

    hipError_t cudaStatus =addWithCuda(c, a, b, arraySize);
    if (cudaStatus !=hipSuccess) {
        return 1;
    }

 

    // cudaDeviceReset must becalled before exiting in order for profiling and

    // tracing tools such asNsight and Visual Profiler to show complete traces.

    cudaStatus =hipDeviceReset();
    if (cudaStatus !=hipSuccess) {
        return 1;
    }
    return 0;
}
// Helper function for using CUDA to add vectors in parallel.
hipError_t addWithCuda(int *c, const int *a, const int *b, size_t size)
{

    int *dev_a = 0;
    int *dev_b = 0;
    int *dev_c = 0;

    hipError_t cudaStatus;
    // Choose which GPU to runon, change this on a multi-GPU system
    cudaStatus =hipSetDevice(0);
    if (cudaStatus !=hipSuccess) {
       goto Error;
    }
    // Allocate GPU buffersfor three vectors (two input, one output)   .
    cudaStatus =hipMalloc((void**)&dev_c, size * sizeof(int));
    if (cudaStatus !=hipSuccess) {
        goto Error;
    }
    cudaStatus =hipMalloc((void**)&dev_a, size * sizeof(int));
    if (cudaStatus !=hipSuccess) {
        goto Error;
    }
    cudaStatus =hipMalloc((void**)&dev_b, size * sizeof(int));
    if (cudaStatus !=hipSuccess) {
        goto Error;

    }
    // Copy input vectors fromhost memory to GPU buffers.
    cudaStatus =hipMemcpy(dev_a, a, size * sizeof(int), hipMemcpyHostToDevice);
    if (cudaStatus !=hipSuccess) {
        goto Error;
    }
    cudaStatus =hipMemcpy(dev_b, b, size * sizeof(int), hipMemcpyHostToDevice);
    if (cudaStatus !=hipSuccess) {
        goto Error;
    }
    // Launch a kernel on theGPU with one thread for each element.
    addKernel<<<(size-1)/128+1,128>>>(dev_c, dev_a, dev_b);
    // cudaDeviceSynchronizewaits for the kernel to finish, and returns
    // any errors encounteredduring the launch.
    cudaStatus =hipDeviceSynchronize();
    if (cudaStatus !=hipSuccess) {
        goto Error;
    }
    // Copy output vector fromGPU buffer to host memory.
    cudaStatus = hipMemcpy(c,dev_c, size * sizeof(int), hipMemcpyDeviceToHost);
    if (cudaStatus !=hipSuccess) {
        goto Error;
    }
Error:
    hipFree(dev_c);
    hipFree(dev_a);
    hipFree(dev_b);
    return cudaStatus;
}
	.text
	.file	"kernel.hip"
	.globl	_Z24__device_stub__addKernelPiPKiS1_ # -- Begin function _Z24__device_stub__addKernelPiPKiS1_
	.type	_Z24__device_stub__addKernelPiPKiS1_,@function
_Z24__device_stub__addKernelPiPKiS1_:   # @_Z24__device_stub__addKernelPiPKiS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9addKernelPiPKiS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__addKernelPiPKiS1_, .Lfunc_end0-_Z24__device_stub__addKernelPiPKiS1_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z6vvmainPi
.LCPI1_0:
	.long	1                               # 0x1
	.long	2                               # 0x2
	.long	3                               # 0x3
	.long	4                               # 0x4
.LCPI1_1:
	.long	10                              # 0xa
	.long	20                              # 0x14
	.long	30                              # 0x1e
	.long	40                              # 0x28
	.text
	.globl	_Z6vvmainPi
	.type	_Z6vvmainPi,@function
_Z6vvmainPi:                            # @_Z6vvmainPi
	.cfi_startproc
# %bb.0:
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	movaps	.LCPI1_0(%rip), %xmm0           # xmm0 = [1,2,3,4]
	leaq	32(%rsp), %rsi
	movaps	%xmm0, (%rsi)
	movl	$5, 16(%rsi)
	movaps	.LCPI1_1(%rip), %xmm0           # xmm0 = [10,20,30,40]
	movq	%rsp, %rdx
	movaps	%xmm0, (%rdx)
	movl	$50, 16(%rdx)
	movl	$5, %ecx
	callq	_Z11addWithCudaPiPKiS1_m
	movl	%eax, %ecx
	movl	$1, %eax
	testl	%ecx, %ecx
	jne	.LBB1_2
# %bb.1:
	callq	hipDeviceReset
	movl	%eax, %ecx
	xorl	%eax, %eax
	testl	%ecx, %ecx
	setne	%al
.LBB1_2:
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z6vvmainPi, .Lfunc_end1-_Z6vvmainPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z11addWithCudaPiPKiS1_m        # -- Begin function _Z11addWithCudaPiPKiS1_m
	.type	_Z11addWithCudaPiPKiS1_m,@function
_Z11addWithCudaPiPKiS1_m:               # @_Z11addWithCudaPiPKiS1_m
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbx
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%rax, (%rsp)
	xorl	%edi, %edi
	callq	hipSetDevice
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.1:
	leaq	(,%r15,4), %r14
	movq	%rsp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.2:
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.3:
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.4:
	movq	16(%rsp), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.5:
	movq	8(%rsp), %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.6:
	decq	%r15
	shrq	$7, %r15
	incl	%r15d
	btsq	$32, %r15
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$128, %rdx
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:
	movq	(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z24__device_stub__addKernelPiPKiS1_
.LBB2_8:
	callq	hipDeviceSynchronize
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.9:
	movq	(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %ebp
.LBB2_10:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	%ebp, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z11addWithCudaPiPKiS1_m, .Lfunc_end2-_Z11addWithCudaPiPKiS1_m
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9addKernelPiPKiS1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9addKernelPiPKiS1_,@object    # @_Z9addKernelPiPKiS1_
	.section	.rodata,"a",@progbits
	.globl	_Z9addKernelPiPKiS1_
	.p2align	3, 0x0
_Z9addKernelPiPKiS1_:
	.quad	_Z24__device_stub__addKernelPiPKiS1_
	.size	_Z9addKernelPiPKiS1_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z9addKernelPiPKiS1_"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__addKernelPiPKiS1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9addKernelPiPKiS1_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9addKernelPiPKiS1_    ; -- Begin function _Z9addKernelPiPKiS1_
	.globl	_Z9addKernelPiPKiS1_
	.p2align	8
	.type	_Z9addKernelPiPKiS1_,@function
_Z9addKernelPiPKiS1_:                   ; @_Z9addKernelPiPKiS1_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v0, s[6:7]
	global_load_b32 v2, v0, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	global_store_b32 v0, v1, s[4:5]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9addKernelPiPKiS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9addKernelPiPKiS1_, .Lfunc_end0-_Z9addKernelPiPKiS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 76
; NumSgprs: 8
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9addKernelPiPKiS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z9addKernelPiPKiS1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
