
int lenInts, lenFloats, numPrototypes, numCoordinates;
int *d_ints;
float *d_floats;
float *d_prototypes;
float *d_activationRadii;
int *d_features;
		

void initialize(int _lenInts, int _lenFloats, int _numPrototypes, float *h_activationRadii){

	lenInts = _lenInts;
	lenFloats = _lenFloats;
	numPrototypes = _numPrototypes;
	numCoordinates = _lenInts + _lenFloats;

	cudaMalloc((void **) &d_ints, lenInts*sizeof(int));
	cudaMalloc((void **) &d_floats, lenFloats * sizeof(float));	

	// initialize random prototypes
	float h_prototypes[numPrototypes*numCoordinates];
	for (int i = 0; i < numPrototypes*numCoordinates; i++){
		h_prototypes[i] = (float)rand()/(float)(RAND_MAX/1.0);
	}

	cudaMalloc((void **) &d_prototypes, numPrototypes*numCoordinates*sizeof(float));
	cudaMemcpy(d_prototypes, h_prototypes, numPrototypes * numCoordinates * sizeof(float), cudaMemcpyHostToDevice);

	cudaMalloc((void **) &d_features, numPrototypes*sizeof(int));

	cudaMalloc((void **) &d_activationRadii, lenFloats * sizeof(float));
	cudaMemcpy(d_activationRadii, h_activationRadii, lenFloats * sizeof(float), cudaMemcpyHostToDevice);
}


// threadIdx.x = coord
// blockIdx.x = prototype
__global__ void calcFeatures(float *d_prototypes, float *d_floats, int lenFloats, int *d_ints, int lenInts, float *d_activationRadii, int *d_features){

	float val = 0.0;
	
	if (threadIdx.x < lenFloats){

		float distance = fabsf(d_floats[threadIdx.x] - d_prototypes[blockIdx.x * (lenFloats + lenInts) + threadIdx.x]);
		val = distance <= d_activationRadii[threadIdx.x] ? 1 - distance/d_activationRadii[threadIdx.x] : 0;
	} else {
		float distance = fabsf(((float) d_ints[threadIdx.x - lenFloats]) - d_prototypes[blockIdx.x * (lenFloats + lenInts) + threadIdx.x]);
		val = distance <= d_activationRadii[threadIdx.x] ? 1 - distance/d_activationRadii[threadIdx.x] : 0;
	}

	atomicAnd(&d_features[blockIdx.x], val > 0 ? 1 : 0);

}

// TODO finish this
void parallel_getFeaturesActivationRadii(float *h_floatArr, int *h_intArr, int *h_features){

	cudaMemset(d_features, 0xF, numPrototypes*sizeof(int)); 

	cudaMemcpy(d_floats, h_floatArr, lenFloats*sizeof(float), cudaMemcpyHostToDevice);
	cudaMemcpy(d_ints, h_intArr, lenInts * sizeof(int), cudaMemcpyHostToDevice);

	calcFeatures<<<numPrototypes, numCoordinates>>>(d_prototypes, d_floats, lenFloats, d_ints, lenInts, d_activationRadii, d_features);

	cudaMemcpy(h_features, d_features, numPrototypes * sizeof(float), cudaMemcpyDeviceToHost);
}

	.file	"tmpxft_00371783_00000000-6_parallel_kanerva_activation_radii.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2012:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2012:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10initializeiiiPf
	.type	_Z10initializeiiiPf, @function
_Z10initializeiiiPf:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	movq	%rcx, %rbx
	subq	$24, %rsp
	movq	%fs:40, %rax
	movq	%rax, -40(%rbp)
	xorl	%eax, %eax
	movl	%edi, lenInts(%rip)
	movl	%esi, lenFloats(%rip)
	addl	%edi, %esi
	movslq	%edi, %rdi
	movl	%esi, numCoordinates(%rip)
	leaq	0(,%rdi,4), %rsi
	leaq	d_ints(%rip), %rdi
	movl	%edx, numPrototypes(%rip)
	call	cudaMalloc@PLT
	movslq	lenFloats(%rip), %rsi
	leaq	d_floats(%rip), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	numPrototypes(%rip), %eax
	movq	%rsp, %rcx
	imull	numCoordinates(%rip), %eax
	cltq
	leaq	15(,%rax,4), %rdx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L3:
	cmpq	%rcx, %rsp
	je	.L4
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L3
.L4:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L5
	orq	$0, -8(%rsp,%rax)
.L5:
	movq	%rsp, %r12
	xorl	%r13d, %r13d
.L6:
	movl	numPrototypes(%rip), %esi
	imull	numCoordinates(%rip), %esi
	cmpl	%r13d, %esi
	jle	.L14
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, (%r12,%r13,4)
	incq	%r13
	jmp	.L6
.L14:
	movslq	%esi, %rsi
	leaq	d_prototypes(%rip), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	numPrototypes(%rip), %edx
	movl	$1, %ecx
	movq	%r12, %rsi
	imull	numCoordinates(%rip), %edx
	movq	d_prototypes(%rip), %rdi
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	numPrototypes(%rip), %rsi
	leaq	d_features(%rip), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	lenFloats(%rip), %rsi
	leaq	d_activationRadii(%rip), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	lenFloats(%rip), %rdx
	movl	$1, %ecx
	movq	%rbx, %rsi
	movq	d_activationRadii(%rip), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	-40(%rbp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	leaq	-24(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2008:
	.size	_Z10initializeiiiPf, .-_Z10initializeiiiPf
	.globl	_Z43__device_stub__Z12calcFeaturesPfS_iPiiS_S0_PfS_iPiiS_S0_
	.type	_Z43__device_stub__Z12calcFeaturesPfS_iPiiS_S0_PfS_iPiiS_S0_, @function
_Z43__device_stub__Z12calcFeaturesPfS_iPiiS_S0_PfS_iPiiS_S0_:
.LFB2034:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 24(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z12calcFeaturesPfS_iPiiS_S0_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L15:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z43__device_stub__Z12calcFeaturesPfS_iPiiS_S0_PfS_iPiiS_S0_, .-_Z43__device_stub__Z12calcFeaturesPfS_iPiiS_S0_PfS_iPiiS_S0_
	.globl	_Z12calcFeaturesPfS_iPiiS_S0_
	.type	_Z12calcFeaturesPfS_iPiiS_S0_, @function
_Z12calcFeaturesPfS_iPiiS_S0_:
.LFB2035:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z12calcFeaturesPfS_iPiiS_S0_PfS_iPiiS_S0_
	.cfi_endproc
.LFE2035:
	.size	_Z12calcFeaturesPfS_iPiiS_S0_, .-_Z12calcFeaturesPfS_iPiiS_S0_
	.globl	_Z35parallel_getFeaturesActivationRadiiPfPiS0_
	.type	_Z35parallel_getFeaturesActivationRadiiPfPiS0_, @function
_Z35parallel_getFeaturesActivationRadiiPfPiS0_:
.LFB2009:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	movl	$15, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdx, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movslq	numPrototypes(%rip), %rdx
	movq	d_features(%rip), %rdi
	salq	$2, %rdx
	call	cudaMemset@PLT
	movslq	lenFloats(%rip), %rdx
	movl	$1, %ecx
	movq	%r12, %rsi
	movq	d_floats(%rip), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	lenInts(%rip), %rdx
	movl	$1, %ecx
	movq	%rbp, %rsi
	movq	d_ints(%rip), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	numCoordinates(%rip), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	numPrototypes(%rip), %edx
	movl	%eax, 20(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 24(%rsp)
	movl	28(%rsp), %ecx
	movl	%edx, 8(%rsp)
	movq	20(%rsp), %rdx
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	d_ints(%rip), %rcx
	movl	lenFloats(%rip), %edx
	pushq	%rax
	.cfi_def_cfa_offset 72
	pushq	d_features(%rip)
	.cfi_def_cfa_offset 80
	movq	d_activationRadii(%rip), %r9
	movl	lenInts(%rip), %r8d
	movq	d_floats(%rip), %rsi
	movq	d_prototypes(%rip), %rdi
	call	_Z43__device_stub__Z12calcFeaturesPfS_iPiiS_S0_PfS_iPiiS_S0_
	popq	%rdx
	.cfi_def_cfa_offset 72
	popq	%rcx
	.cfi_def_cfa_offset 64
.L21:
	movslq	numPrototypes(%rip), %rdx
	movq	d_features(%rip), %rsi
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbx, %rdi
	movl	$2, %ecx
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	salq	$2, %rdx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	cudaMemcpy@PLT
	.cfi_endproc
.LFE2009:
	.size	_Z35parallel_getFeaturesActivationRadiiPfPiS0_, .-_Z35parallel_getFeaturesActivationRadiiPfPiS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"_Z12calcFeaturesPfS_iPiiS_S0_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12calcFeaturesPfS_iPiiS_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2037:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	d_features
	.bss
	.align 8
	.type	d_features, @object
	.size	d_features, 8
d_features:
	.zero	8
	.globl	d_activationRadii
	.align 8
	.type	d_activationRadii, @object
	.size	d_activationRadii, 8
d_activationRadii:
	.zero	8
	.globl	d_prototypes
	.align 8
	.type	d_prototypes, @object
	.size	d_prototypes, 8
d_prototypes:
	.zero	8
	.globl	d_floats
	.align 8
	.type	d_floats, @object
	.size	d_floats, 8
d_floats:
	.zero	8
	.globl	d_ints
	.align 8
	.type	d_ints, @object
	.size	d_ints, 8
d_ints:
	.zero	8
	.globl	numCoordinates
	.align 4
	.type	numCoordinates, @object
	.size	numCoordinates, 4
numCoordinates:
	.zero	4
	.globl	numPrototypes
	.align 4
	.type	numPrototypes, @object
	.size	numPrototypes, 4
numPrototypes:
	.zero	4
	.globl	lenFloats
	.align 4
	.type	lenFloats, @object
	.size	lenFloats, 4
lenFloats:
	.zero	4
	.globl	lenInts
	.align 4
	.type	lenInts, @object
	.size	lenInts, 4
lenInts:
	.zero	4
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>

int lenInts, lenFloats, numPrototypes, numCoordinates;
int *d_ints;
float *d_floats;
float *d_prototypes;
float *d_activationRadii;
int *d_features;
		

void initialize(int _lenInts, int _lenFloats, int _numPrototypes, float *h_activationRadii){

	lenInts = _lenInts;
	lenFloats = _lenFloats;
	numPrototypes = _numPrototypes;
	numCoordinates = _lenInts + _lenFloats;

	hipMalloc((void **) &d_ints, lenInts*sizeof(int));
	hipMalloc((void **) &d_floats, lenFloats * sizeof(float));	

	// initialize random prototypes
	float h_prototypes[numPrototypes*numCoordinates];
	for (int i = 0; i < numPrototypes*numCoordinates; i++){
		h_prototypes[i] = (float)rand()/(float)(RAND_MAX/1.0);
	}

	hipMalloc((void **) &d_prototypes, numPrototypes*numCoordinates*sizeof(float));
	hipMemcpy(d_prototypes, h_prototypes, numPrototypes * numCoordinates * sizeof(float), hipMemcpyHostToDevice);

	hipMalloc((void **) &d_features, numPrototypes*sizeof(int));

	hipMalloc((void **) &d_activationRadii, lenFloats * sizeof(float));
	hipMemcpy(d_activationRadii, h_activationRadii, lenFloats * sizeof(float), hipMemcpyHostToDevice);
}


// threadIdx.x = coord
// blockIdx.x = prototype
__global__ void calcFeatures(float *d_prototypes, float *d_floats, int lenFloats, int *d_ints, int lenInts, float *d_activationRadii, int *d_features){

	float val = 0.0;
	
	if (threadIdx.x < lenFloats){

		float distance = fabsf(d_floats[threadIdx.x] - d_prototypes[blockIdx.x * (lenFloats + lenInts) + threadIdx.x]);
		val = distance <= d_activationRadii[threadIdx.x] ? 1 - distance/d_activationRadii[threadIdx.x] : 0;
	} else {
		float distance = fabsf(((float) d_ints[threadIdx.x - lenFloats]) - d_prototypes[blockIdx.x * (lenFloats + lenInts) + threadIdx.x]);
		val = distance <= d_activationRadii[threadIdx.x] ? 1 - distance/d_activationRadii[threadIdx.x] : 0;
	}

	atomicAnd(&d_features[blockIdx.x], val > 0 ? 1 : 0);

}

// TODO finish this
void parallel_getFeaturesActivationRadii(float *h_floatArr, int *h_intArr, int *h_features){

	hipMemset(d_features, 0xF, numPrototypes*sizeof(int)); 

	hipMemcpy(d_floats, h_floatArr, lenFloats*sizeof(float), hipMemcpyHostToDevice);
	hipMemcpy(d_ints, h_intArr, lenInts * sizeof(int), hipMemcpyHostToDevice);

	calcFeatures<<<numPrototypes, numCoordinates>>>(d_prototypes, d_floats, lenFloats, d_ints, lenInts, d_activationRadii, d_features);

	hipMemcpy(h_features, d_features, numPrototypes * sizeof(float), hipMemcpyDeviceToHost);
}

	.text
	.file	"parallel_kanerva_activation_radii.hip"
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10initializeiiiPf
.LCPI0_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z10initializeiiiPf
	.type	_Z10initializeiiiPf,@function
_Z10initializeiiiPf:                    # @_Z10initializeiiiPf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %rbx
	movl	%edi, lenInts(%rip)
	movl	%esi, lenFloats(%rip)
	movl	%edx, numPrototypes(%rip)
	addl	%edi, %esi
	movl	%esi, numCoordinates(%rip)
	movslq	%edi, %rsi
	shlq	$2, %rsi
	movl	$d_ints, %edi
	callq	hipMalloc
	movslq	lenFloats(%rip), %rsi
	shlq	$2, %rsi
	movl	$d_floats, %edi
	callq	hipMalloc
	movslq	numPrototypes(%rip), %rax
	movslq	numCoordinates(%rip), %rsi
	imulq	%rax, %rsi
	movl	%esi, %eax
	leaq	15(,%rax,4), %rax
	andq	$-16, %rax
	movq	%rsp, %r14
	subq	%rax, %r14
	movq	%r14, %rsp
	testl	%esi, %esi
	jle	.LBB0_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI0_0(%rip), %xmm0
	movss	%xmm0, (%r14,%r15,4)
	incq	%r15
	movslq	numPrototypes(%rip), %rax
	movslq	numCoordinates(%rip), %rsi
	imulq	%rax, %rsi
	cmpq	%rsi, %r15
	jl	.LBB0_2
.LBB0_3:                                # %._crit_edge
	shlq	$2, %rsi
	movl	$d_prototypes, %edi
	callq	hipMalloc
	movq	d_prototypes(%rip), %rdi
	movslq	numPrototypes(%rip), %rax
	movslq	numCoordinates(%rip), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movslq	numPrototypes(%rip), %rsi
	shlq	$2, %rsi
	movl	$d_features, %edi
	callq	hipMalloc
	movslq	lenFloats(%rip), %rsi
	shlq	$2, %rsi
	movl	$d_activationRadii, %edi
	callq	hipMalloc
	movq	d_activationRadii(%rip), %rdi
	movslq	lenFloats(%rip), %rdx
	shlq	$2, %rdx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	-24(%rbp), %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end0:
	.size	_Z10initializeiiiPf, .Lfunc_end0-_Z10initializeiiiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__calcFeaturesPfS_iPiiS_S0_ # -- Begin function _Z27__device_stub__calcFeaturesPfS_iPiiS_S0_
	.type	_Z27__device_stub__calcFeaturesPfS_iPiiS_S0_,@function
_Z27__device_stub__calcFeaturesPfS_iPiiS_S0_: # @_Z27__device_stub__calcFeaturesPfS_iPiiS_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12calcFeaturesPfS_iPiiS_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__calcFeaturesPfS_iPiiS_S0_, .Lfunc_end1-_Z27__device_stub__calcFeaturesPfS_iPiiS_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z35parallel_getFeaturesActivationRadiiPfPiS0_ # -- Begin function _Z35parallel_getFeaturesActivationRadiiPfPiS0_
	.type	_Z35parallel_getFeaturesActivationRadiiPfPiS0_,@function
_Z35parallel_getFeaturesActivationRadiiPfPiS0_: # @_Z35parallel_getFeaturesActivationRadiiPfPiS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	movq	d_features(%rip), %rdi
	movslq	numPrototypes(%rip), %rdx
	shlq	$2, %rdx
	movl	$15, %esi
	callq	hipMemset
	movq	d_floats(%rip), %rdi
	movslq	lenFloats(%rip), %rdx
	shlq	$2, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	d_ints(%rip), %rdi
	movslq	lenInts(%rip), %rdx
	shlq	$2, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	numPrototypes(%rip), %edi
	movl	numCoordinates(%rip), %edx
	btsq	$32, %rdi
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	d_prototypes(%rip), %rdi
	movq	d_floats(%rip), %rsi
	movl	lenFloats(%rip), %edx
	movq	d_ints(%rip), %rcx
	movl	lenInts(%rip), %r8d
	movq	d_activationRadii(%rip), %r9
	movq	d_features(%rip), %rax
	movq	%rax, (%rsp)
	callq	_Z27__device_stub__calcFeaturesPfS_iPiiS_S0_
.LBB2_2:
	movq	d_features(%rip), %rsi
	movslq	numPrototypes(%rip), %rdx
	shlq	$2, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipMemcpy                       # TAILCALL
.Lfunc_end2:
	.size	_Z35parallel_getFeaturesActivationRadiiPfPiS0_, .Lfunc_end2-_Z35parallel_getFeaturesActivationRadiiPfPiS0_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12calcFeaturesPfS_iPiiS_S0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	lenInts,@object                 # @lenInts
	.bss
	.globl	lenInts
	.p2align	2, 0x0
lenInts:
	.long	0                               # 0x0
	.size	lenInts, 4

	.type	lenFloats,@object               # @lenFloats
	.globl	lenFloats
	.p2align	2, 0x0
lenFloats:
	.long	0                               # 0x0
	.size	lenFloats, 4

	.type	numPrototypes,@object           # @numPrototypes
	.globl	numPrototypes
	.p2align	2, 0x0
numPrototypes:
	.long	0                               # 0x0
	.size	numPrototypes, 4

	.type	numCoordinates,@object          # @numCoordinates
	.globl	numCoordinates
	.p2align	2, 0x0
numCoordinates:
	.long	0                               # 0x0
	.size	numCoordinates, 4

	.type	d_ints,@object                  # @d_ints
	.globl	d_ints
	.p2align	3, 0x0
d_ints:
	.quad	0
	.size	d_ints, 8

	.type	d_floats,@object                # @d_floats
	.globl	d_floats
	.p2align	3, 0x0
d_floats:
	.quad	0
	.size	d_floats, 8

	.type	d_prototypes,@object            # @d_prototypes
	.globl	d_prototypes
	.p2align	3, 0x0
d_prototypes:
	.quad	0
	.size	d_prototypes, 8

	.type	d_activationRadii,@object       # @d_activationRadii
	.globl	d_activationRadii
	.p2align	3, 0x0
d_activationRadii:
	.quad	0
	.size	d_activationRadii, 8

	.type	d_features,@object              # @d_features
	.globl	d_features
	.p2align	3, 0x0
d_features:
	.quad	0
	.size	d_features, 8

	.type	_Z12calcFeaturesPfS_iPiiS_S0_,@object # @_Z12calcFeaturesPfS_iPiiS_S0_
	.section	.rodata,"a",@progbits
	.globl	_Z12calcFeaturesPfS_iPiiS_S0_
	.p2align	3, 0x0
_Z12calcFeaturesPfS_iPiiS_S0_:
	.quad	_Z27__device_stub__calcFeaturesPfS_iPiiS_S0_
	.size	_Z12calcFeaturesPfS_iPiiS_S0_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z12calcFeaturesPfS_iPiiS_S0_"
	.size	.L__unnamed_1, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__calcFeaturesPfS_iPiiS_S0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym d_ints
	.addrsig_sym d_floats
	.addrsig_sym d_prototypes
	.addrsig_sym d_activationRadii
	.addrsig_sym d_features
	.addrsig_sym _Z12calcFeaturesPfS_iPiiS_S0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12calcFeaturesPfS_iPiiS_S0_ ; -- Begin function _Z12calcFeaturesPfS_iPiiS_S0_
	.globl	_Z12calcFeaturesPfS_iPiiS_S0_
	.p2align	8
	.type	_Z12calcFeaturesPfS_iPiiS_S0_,@function
_Z12calcFeaturesPfS_iPiiS_S0_:          ; @_Z12calcFeaturesPfS_iPiiS_S0_
; %bb.0:
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x10
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b32 s3, s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x28
	v_lshlrev_b32_e32 v4, 2, v0
	s_mov_b32 s12, exec_lo
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	v_cmpx_le_u32_e64 s2, v0
	s_xor_b32 s12, exec_lo, s12
	s_cbranch_execz .LBB0_4
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x18
	v_subrev_nc_u32_e32 v1, s2, v0
	v_mov_b32_e32 v2, 0
	s_add_i32 s13, s3, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[7:8], null, s13, s15, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_mov_b32_e32 v8, v2
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v6, vcc_lo
	v_lshlrev_b64 v[5:6], 2, v[7:8]
	s_mov_b32 s0, exec_lo
	global_load_b32 v3, v[0:1], off
	v_add_co_u32 v0, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v6, vcc_lo
	global_load_b32 v1, v[0:1], off
	global_load_b32 v0, v4, s[4:5]
	s_waitcnt vmcnt(2)
	v_cvt_f32_i32_e32 v3, v3
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v1, v3, v1
	s_waitcnt vmcnt(0)
	v_cmpx_le_f32_e64 |v1|, v0
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_and_b32_e32 v2, 0x7fffffff, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v3, null, v0, v0, v2
	v_div_scale_f32 v2, vcc_lo, v2, v0, v2
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v3, v4, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v5, v4
	v_mul_f32_e32 v5, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v3, v5, v2
	v_fmac_f32_e32 v5, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, -v3, v5, v2
	v_div_fmas_f32 v2, v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v0, v2, v0, |v1|
	v_sub_f32_e32 v2, 1.0, v0
.LBB0_3:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr0
.LBB0_4:                                ; %Flow45
	s_or_saveexec_b32 s0, s12
	v_mov_b32_e32 v3, s15
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_8
; %bb.5:
	s_add_i32 s3, s3, s2
	s_mov_b32 s1, exec_lo
	v_mad_u64_u32 v[1:2], null, s3, s15, v[0:1]
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_load_b32 v1, v[0:1], off
	s_clause 0x1
	global_load_b32 v3, v4, s[10:11]
	global_load_b32 v0, v4, s[4:5]
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v1, v3, v1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_le_f32_e64 |v1|, v0
	s_cbranch_execz .LBB0_7
; %bb.6:
	v_and_b32_e32 v2, 0x7fffffff, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v3, null, v0, v0, v2
	v_div_scale_f32 v2, vcc_lo, v2, v0, v2
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v3, v4, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v5, v4
	v_mul_f32_e32 v5, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v3, v5, v2
	v_fmac_f32_e32 v5, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, -v3, v5, v2
	v_div_fmas_f32 v2, v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v0, v2, v0, |v1|
	v_sub_f32_e32 v2, 1.0, v0
.LBB0_7:                                ; %Flow44
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, s15
.LBB0_8:
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, 0, v2
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	global_atomic_and_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12calcFeaturesPfS_iPiiS_S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 56
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12calcFeaturesPfS_iPiiS_S0_, .Lfunc_end0-_Z12calcFeaturesPfS_iPiiS_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 632
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 56
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12calcFeaturesPfS_iPiiS_S0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12calcFeaturesPfS_iPiiS_S0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
