#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <assert.h>
#ifdef __NVCC__
#include <cublas_v2.h>
#endif

#ifndef THREADS_PER_BLOCK
#define THREADS_PER_BLOCK 1024
#endif
#define THREADS_PER_DIM 32

#define VERBOSE
//#define PROF
#define CUDA_ERROR_CHECK
#define CudaSafeCall( err ) __cudaSafeCall( err, __FILE__, __LINE__ )
#define CudaCheckError()    __cudaCheckError( __FILE__, __LINE__ )

long long getCurrentTime() {
    struct timeval te;
    gettimeofday(&te, NULL); // get current time
    long long microseconds = te.tv_sec*1000000LL + te.tv_usec;
    return microseconds;
}

inline void __cudaSafeCall( cudaError err, const char *file, const int line )
{
#ifdef CUDA_ERROR_CHECK
    if ( cudaSuccess != err )
    {
        fprintf( stderr, "cudaSafeCall() failed at %s:%i : %s\n",
                 file, line, cudaGetErrorString( err ) );
        exit( -1 );
    }
#endif

    return;
}

inline void __cudaCheckError( const char *file, const int line )
{
#ifdef CUDA_ERROR_CHECK
    cudaError err = cudaGetLastError();
    if ( cudaSuccess != err )
    {
        fprintf( stderr, "cudaCheckError() failed at %s:%i : %s\n",
                 file, line, cudaGetErrorString( err ) );
        exit( -1 );
    }

    // More careful checking. However, this will affect performance.
    // Comment away if needed.
    err = cudaDeviceSynchronize();
    if( cudaSuccess != err )
    {
        fprintf( stderr, "cudaCheckError() with sync failed at %s:%i : %s\n",
                 file, line, cudaGetErrorString( err ) );
        exit( -1 );
    }
#endif
}

__global__ void mm(float *dA, float *dB, float *dC, int DIM, int N, int GPUN) {
    int id = blockIdx.x * blockDim.x + threadIdx.x;
    if (id <= GPUN) {
        int i = id / DIM;
        int j = id % DIM;
        float sum = 0.0f;
        for (int k = 0; k < DIM; k++) {
            sum += dA[i*DIM+k] * dB[k*DIM+j];
        }
        dC[id] = sum;
    }
}

__global__ void mm_tiled(float *dA, float *dB, float *dC, int DIM, int N, int GPUN) {
    int it, jt, kt, i, j, k;
    __shared__ float sA[32][32], sB[32][32];

    // (it, jt) => the first element of a specific tile
    it = blockIdx.y * 32;
    jt = blockIdx.x * 32;

    // (i, j) => specific element
    i = it + threadIdx.y;
    j = jt + threadIdx.x;

    if (i*DIM+j <= GPUN) {
        float sum = 0.0f;
        // per tile loop
        for (kt = 0; kt < DIM; kt += 32) {
            // copy to shared memory
            sA[threadIdx.y][threadIdx.x] = dA[(it+threadIdx.y)*DIM + kt + threadIdx.x];
            sB[threadIdx.y][threadIdx.x] = dB[(kt+threadIdx.y)*DIM + jt + threadIdx.x];
            __syncthreads();

            // two 32x32 small shared (dB[it + 0:31][kt + 0:31], dC[kt+0:31][jt + 0:31]) at this point
            for (k = kt; k < kt+32; k++) {
                sum += sA[i-it][k-kt] * sB[k-kt][j-jt];
            }

            __syncthreads();
        }
        dC[i*DIM+j] = sum;
    }
}

extern "C" {
    void mmCUDA(float* A, float *B, float *C, int N, int start, int end, int GPUN, int tiled) {
        float *dA, *dB, *dC;
        if (GPUN > 0) {
            assert(end - start + 1 == GPUN);
#ifdef VERBOSE
            printf("In mmCUDA\n");
            printf("\t GPUN: %d\n", GPUN);
            printf("\t range: %d..%d\n", start, end);
#endif
#ifdef PROF
            cudaEvent_t startCudaMallocEvent, endCudaMallocEvent;
            cudaEvent_t startCudaMemcpyH2DEvent, endCudaMemcpyH2DEvent;
            cudaEvent_t startCudaKernelEvent, endCudaKernelEvent;
            cudaEvent_t startCudaMemcpyD2HEvent, endCudaMemcpyD2HEvent;
            CudaSafeCall(cudaEventCreate(&startCudaMallocEvent));
            CudaSafeCall(cudaEventCreate(&endCudaMallocEvent));
            CudaSafeCall(cudaEventCreate(&startCudaMemcpyH2DEvent));
            CudaSafeCall(cudaEventCreate(&endCudaMemcpyH2DEvent));
            CudaSafeCall(cudaEventCreate(&startCudaKernelEvent));
            CudaSafeCall(cudaEventCreate(&endCudaKernelEvent));
            CudaSafeCall(cudaEventCreate(&startCudaMemcpyD2HEvent));
            CudaSafeCall(cudaEventCreate(&endCudaMemcpyD2HEvent));
#endif

#ifdef PROF
            CudaSafeCall(cudaEventRecord(startCudaMallocEvent));
#endif
            CudaSafeCall(cudaMalloc(&dA, sizeof(float) * GPUN));
            CudaSafeCall(cudaMalloc(&dB, sizeof(float) * N));
            CudaSafeCall(cudaMalloc(&dC, sizeof(float) * GPUN));
#ifdef PROF
            CudaSafeCall(cudaEventRecord(endCudaMallocEvent));
            CudaSafeCall(cudaEventSynchronize(endCudaMallocEvent));
#endif

#ifdef PROF
            CudaSafeCall(cudaEventRecord(startCudaMemcpyH2DEvent));
#endif
            CudaSafeCall(cudaMemcpy(dA, A+start, sizeof(float) * GPUN, cudaMemcpyHostToDevice));
            CudaSafeCall(cudaMemcpy(dB, B, sizeof(float) * N, cudaMemcpyHostToDevice));
#ifdef PROF
            CudaSafeCall(cudaEventRecord(endCudaMemcpyH2DEvent));
            CudaSafeCall(cudaEventSynchronize(endCudaMemcpyH2DEvent));
#endif

#ifdef PROF
            CudaSafeCall(cudaEventRecord(startCudaKernelEvent));
#endif
            if (!tiled) {
                mm<<<ceil(((float)GPUN)/THREADS_PER_BLOCK), THREADS_PER_BLOCK>>>(dA, dB, dC, ceil(sqrt(N)), N, GPUN);
            } else if (tiled == 1){
                dim3 block(THREADS_PER_DIM, THREADS_PER_DIM);
                dim3 grid(ceil(sqrt(N)/THREADS_PER_DIM), ceil(sqrt(N)/THREADS_PER_DIM));
                mm_tiled<<<grid, block>>>(dA, dB, dC, ceil(sqrt(N)), N, N);
            } else {
#ifdef __NVCC__
                cublasHandle_t handle;
#ifdef PROF
                long long start = getCurrentTime();
#endif
                cublasCreate(&handle);
                float alpha = 1.0F;
                float beta = 0.0F;
                int lda = sqrt(N), ldb = sqrt(N), ldc = sqrt(N);
#ifdef PROF
                long long end = getCurrentTime();
                printf("cuBLAS prep: %lf msec\n", (float)(end-start)/1000);
#endif
                cublasSgemm(handle, CUBLAS_OP_N, CUBLAS_OP_N, sqrt(N), GPUN/sqrt(N), sqrt(N), &alpha, dB, ldb, dA, lda, &beta, dC, ldc);

                //http://peterwittek.com/cublas-matrix-c-style.html
                //C:mxn = A:mxk X B:kxn
                //stat=cublasSgemm(handle,CUBLAS_OP_N,CUBLAS_OP_N,n,m,k,&a1,d_b,n,d_a,k,&bet,d_c,n);
#ifdef PROF
                long long end2 = getCurrentTime();
                printf("cuBLAS finish: %lf msec\n", (float)(end2-start)/1000);
#endif
#endif
            }
            CudaCheckError();
#ifdef PROF
            CudaSafeCall(cudaEventRecord(endCudaKernelEvent));
            CudaSafeCall(cudaEventSynchronize(endCudaKernelEvent));
#endif
            CudaSafeCall(cudaDeviceSynchronize());

#ifdef PROF
            CudaSafeCall(cudaEventRecord(startCudaMemcpyD2HEvent));
#endif
            CudaSafeCall(cudaMemcpy(C + start, dC, sizeof(float) * GPUN, cudaMemcpyDeviceToHost));
#ifdef PROF
            CudaSafeCall(cudaEventRecord(endCudaMemcpyD2HEvent));
            CudaSafeCall(cudaEventSynchronize(endCudaMemcpyD2HEvent));
#endif

#ifdef PROF
            float msecMalloc, msecH2D, msecKernel, msecD2H;
            CudaSafeCall(cudaEventElapsedTime(&msecMalloc, startCudaMallocEvent, endCudaMallocEvent));
            CudaSafeCall(cudaEventElapsedTime(&msecH2D, startCudaMemcpyH2DEvent, endCudaMemcpyH2DEvent));
            CudaSafeCall(cudaEventElapsedTime(&msecKernel, startCudaKernelEvent, endCudaKernelEvent));
            CudaSafeCall(cudaEventElapsedTime(&msecD2H, startCudaMemcpyD2HEvent, endCudaMemcpyD2HEvent));
            printf("CUDA malloc: %lf msec\n", msecMalloc);
            printf("CUDA h2d: %lf msec\n", msecH2D);
            printf("CUDA kernel: %lf msec\n", msecKernel);
            printf("CUDA d2h: %lf msec\n", msecD2H);
#endif

            //for (int i = 0; i < GPUN; i++) {
            //  printf("C[%d] = %lf\n", start+i, C[start+i]);
            //}

            CudaSafeCall(cudaFree(dA));
            CudaSafeCall(cudaFree(dB));
            CudaSafeCall(cudaFree(dC));
        }
    }
}

	.file	"tmpxft_002cdfa7_00000000-6_mm.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2838:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2838:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z14getCurrentTimev
	.type	_Z14getCurrentTimev, @function
_Z14getCurrentTimev:
.LFB2832:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	imulq	$1000000, 8(%rsp), %rax
	addq	16(%rsp), %rax
	movq	24(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2832:
	.size	_Z14getCurrentTimev, .-_Z14getCurrentTimev
	.section	.rodata._Z14__cudaSafeCall9cudaErrorPKci.str1.1,"aMS",@progbits,1
.LC0:
	.string	"cudaSafeCall() failed at %s:%i : %s\n"
	.section	.text._Z14__cudaSafeCall9cudaErrorPKci,"axG",@progbits,_Z14__cudaSafeCall9cudaErrorPKci,comdat
	.weak	_Z14__cudaSafeCall9cudaErrorPKci
	.type	_Z14__cudaSafeCall9cudaErrorPKci, @function
_Z14__cudaSafeCall9cudaErrorPKci:
.LFB2833:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L6
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rsi, %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movl	%edx, 12(%rsp)
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movq	%rbx, %rcx
	movl	12(%rsp), %r8d
	movq	%rax, %r9
	leaq	.LC0(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L6:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE2833:
	.size	_Z14__cudaSafeCall9cudaErrorPKci, .-_Z14__cudaSafeCall9cudaErrorPKci
	.section	.rodata._Z16__cudaCheckErrorPKci.str1.1,"aMS",@progbits,1
.LC1:
	.string	"cudaCheckError() failed at %s:%i : %s\n"
.LC2:
	.string	"cudaCheckError() with sync failed at %s:%i : %s\n"
	.section	.text._Z16__cudaCheckErrorPKci,"axG",@progbits,_Z16__cudaCheckErrorPKci,comdat
	.weak	_Z16__cudaCheckErrorPKci
	.type	_Z16__cudaCheckErrorPKci, @function
_Z16__cudaCheckErrorPKci:
.LFB2834:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 32
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L12
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	%ebp, %r8d
	movq	%rbx, %rcx
	leaq	.LC1(%rip), %rdx
	movq	%rax, %r9
	jmp	.L15
.L12:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L11
	call	cudaGetErrorString@PLT
	movl	%ebp, %r8d
	movq	%rbx, %rcx
	leaq	.LC2(%rip), %rdx
	movq	%rax, %r9
.L15:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L11:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2834:
	.size	_Z16__cudaCheckErrorPKci, .-_Z16__cudaCheckErrorPKci
	.text
	.globl	_Z28__device_stub__Z2mmPfS_S_iiiPfS_S_iii
	.type	_Z28__device_stub__Z2mmPfS_S_iiiPfS_S_iii, @function
_Z28__device_stub__Z2mmPfS_S_iiiPfS_S_iii:
.LFB2860:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z2mmPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L16:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2860:
	.size	_Z28__device_stub__Z2mmPfS_S_iiiPfS_S_iii, .-_Z28__device_stub__Z2mmPfS_S_iiiPfS_S_iii
	.globl	_Z2mmPfS_S_iii
	.type	_Z2mmPfS_S_iii, @function
_Z2mmPfS_S_iii:
.LFB2861:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z2mmPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2861:
	.size	_Z2mmPfS_S_iii, .-_Z2mmPfS_S_iii
	.globl	_Z34__device_stub__Z8mm_tiledPfS_S_iiiPfS_S_iii
	.type	_Z34__device_stub__Z8mm_tiledPfS_S_iiiPfS_S_iii, @function
_Z34__device_stub__Z8mm_tiledPfS_S_iiiPfS_S_iii:
.LFB2862:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z8mm_tiledPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L21:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2862:
	.size	_Z34__device_stub__Z8mm_tiledPfS_S_iiiPfS_S_iii, .-_Z34__device_stub__Z8mm_tiledPfS_S_iiiPfS_S_iii
	.globl	_Z8mm_tiledPfS_S_iii
	.type	_Z8mm_tiledPfS_S_iii, @function
_Z8mm_tiledPfS_S_iii:
.LFB2863:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z8mm_tiledPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2863:
	.size	_Z8mm_tiledPfS_S_iii, .-_Z8mm_tiledPfS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"_Z8mm_tiledPfS_S_iii"
.LC4:
	.string	"_Z2mmPfS_S_iii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2865:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8mm_tiledPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z2mmPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2865:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_,"axG",@progbits,_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_,comdat
	.weak	_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_
	.type	_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_, @function
_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_:
.LFB2912:
	.cfi_startproc
	endbr64
	cvtsi2sdl	%edi, %xmm0
	jmp	sqrt@PLT
	.cfi_endproc
.LFE2912:
	.size	_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_, .-_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_
	.section	.rodata.str1.1
.LC5:
	.string	"In mmCUDA\n"
.LC6:
	.string	"\t GPUN: %d\n"
.LC7:
	.string	"\t range: %d..%d\n"
.LC8:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/ahayashi/chapel-gpu/master/apps/mm/mm.cu"
	.text
	.globl	mmCUDA
	.type	mmCUDA, @function
mmCUDA:
.LFB2835:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movl	%ecx, 4(%rsp)
	movl	208(%rsp), %r12d
	movl	%r9d, 8(%rsp)
	movl	216(%rsp), %ebx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	testl	%r12d, %r12d
	jle	.L29
	movq	%rdi, %r14
	movq	%rsi, %r15
	movl	$2, %edi
	movslq	%r8d, %rbp
	leaq	.LC5(%rip), %rsi
	movq	%rdx, %r13
	call	__printf_chk@PLT
	movl	%r12d, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	call	__printf_chk@PLT
	movl	8(%rsp), %ecx
	movl	%ebp, %edx
	movl	$2, %edi
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	salq	$2, %rbp
	call	__printf_chk@PLT
	movslq	%r12d, %rax
	leaq	80(%rsp), %rdi
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movl	$137, %edx
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	movslq	4(%rsp), %rax
	leaq	88(%rsp), %rdi
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	movl	$138, %edx
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	movq	8(%rsp), %rsi
	leaq	96(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$139, %edx
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	movq	8(%rsp), %rdx
	movq	80(%rsp), %rdi
	movl	$1, %ecx
	leaq	(%r14,%rbp), %rsi
	call	cudaMemcpy@PLT
	movl	$148, %edx
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	movq	16(%rsp), %rdx
	movq	88(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$149, %edx
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	testl	%ebx, %ebx
	jne	.L31
	movabsq	$4294968320, %r14
	cvtsi2ssl	%r12d, %xmm0
	movl	$1, 128(%rsp)
	mulss	.LC9(%rip), %xmm0
	movq	%r14, 120(%rsp)
	call	ceilf@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	cvttss2siq	%xmm0, %rax
	movl	$1, %ecx
	movl	%eax, 108(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 112(%rsp)
	movq	108(%rsp), %rdi
	movl	116(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	movl	4(%rsp), %edi
	call	_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_
	call	ceil@PLT
	movl	4(%rsp), %r8d
	movq	96(%rsp), %rdx
	movl	%r12d, %r9d
	cvttsd2sil	%xmm0, %ecx
	movq	88(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z28__device_stub__Z2mmPfS_S_iiiPfS_S_iii
	jmp	.L33
.L31:
	decl	%ebx
	jne	.L34
	movl	4(%rsp), %edi
	movl	$1, 116(%rsp)
	movabsq	$137438953504, %rax
	movq	%rax, 108(%rsp)
	call	_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_
	mulsd	.LC10(%rip), %xmm0
	call	ceil@PLT
	movl	4(%rsp), %edi
	movq	%xmm0, %r12
	call	_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_
	mulsd	.LC10(%rip), %xmm0
	call	ceil@PLT
	movq	%r12, %xmm6
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttsd2siq	%xmm0, %rax
	movl	116(%rsp), %ecx
	movq	108(%rsp), %rdx
	movl	$1, %esi
	movl	$1, 128(%rsp)
	movl	%eax, 120(%rsp)
	cvttsd2siq	%xmm6, %rax
	movl	%eax, 124(%rsp)
	movq	120(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	movl	4(%rsp), %edi
	call	_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_
	call	ceil@PLT
	movl	4(%rsp), %r9d
	movq	96(%rsp), %rdx
	cvttsd2sil	%xmm0, %ecx
	movq	88(%rsp), %rsi
	movq	80(%rsp), %rdi
	movl	%r9d, %r8d
	call	_Z34__device_stub__Z8mm_tiledPfS_S_iiiPfS_S_iii
	jmp	.L33
.L34:
	leaq	120(%rsp), %rdi
	call	cublasCreate_v2@PLT
	movl	4(%rsp), %edi
	movl	$0x3f800000, 76(%rsp)
	movl	$0x00000000, 108(%rsp)
	call	_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_
	movl	4(%rsp), %edi
	movsd	%xmm0, 56(%rsp)
	call	_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_
	movl	4(%rsp), %edi
	movsd	%xmm0, 48(%rsp)
	call	_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_
	movl	4(%rsp), %edi
	movq	80(%rsp), %r15
	movq	88(%rsp), %r14
	movq	96(%rsp), %rbx
	movsd	%xmm0, 40(%rsp)
	call	_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_
	cvtsi2sdl	%r12d, %xmm1
	movl	4(%rsp), %edi
	movsd	%xmm0, 32(%rsp)
	movsd	%xmm1, 24(%rsp)
	call	_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_
	movl	4(%rsp), %edi
	movsd	%xmm0, 16(%rsp)
	call	_ZSt4sqrtIiEN9__gnu_cxx11__enable_ifIXsrSt12__is_integerIT_E7__valueEdE6__typeES3_
	movsd	40(%rsp), %xmm3
	movsd	24(%rsp), %xmm1
	divsd	16(%rsp), %xmm1
	cvttsd2sil	%xmm0, %esi
	cvttsd2sil	%xmm3, %edi
	cvttsd2sil	%xmm1, %r8d
	pushq	%rdi
	.cfi_def_cfa_offset 216
	pushq	%rbx
	.cfi_def_cfa_offset 224
	leaq	124(%rsp), %rcx
	pushq	%rcx
	.cfi_def_cfa_offset 232
	movsd	80(%rsp), %xmm2
	cvttsd2sil	%xmm2, %ecx
	pushq	%rcx
	.cfi_def_cfa_offset 240
	movl	%esi, %ecx
	xorl	%esi, %esi
	pushq	%r15
	.cfi_def_cfa_offset 248
	movsd	88(%rsp), %xmm5
	cvttsd2sil	%xmm5, %edx
	pushq	%rdx
	.cfi_def_cfa_offset 256
	xorl	%edx, %edx
	pushq	%r14
	.cfi_def_cfa_offset 264
	leaq	132(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 272
	movsd	96(%rsp), %xmm4
	movq	184(%rsp), %rdi
	cvttsd2sil	%xmm4, %r9d
	call	cublasSgemm_v2@PLT
	addq	$64, %rsp
	.cfi_def_cfa_offset 208
.L33:
	movl	$189, %esi
	leaq	.LC8(%rip), %rdi
	call	_Z16__cudaCheckErrorPKci
	call	cudaDeviceSynchronize@PLT
	movl	$194, %edx
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	movq	8(%rsp), %rdx
	movq	96(%rsp), %rsi
	movl	$2, %ecx
	leaq	0(%r13,%rbp), %rdi
	call	cudaMemcpy@PLT
	movl	$199, %edx
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movl	$221, %edx
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movl	$222, %edx
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movl	$223, %edx
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
.L29:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2835:
	.size	mmCUDA, .-mmCUDA
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC9:
	.long	981467136
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC10:
	.long	0
	.long	1067450368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <assert.h>
#ifdef __NVCC__
#include <hipblas.h>
#endif

#ifndef THREADS_PER_BLOCK
#define THREADS_PER_BLOCK 1024
#endif
#define THREADS_PER_DIM 32

#define VERBOSE
//#define PROF
#define CUDA_ERROR_CHECK
#define CudaSafeCall( err ) __cudaSafeCall( err, __FILE__, __LINE__ )
#define CudaCheckError()    __cudaCheckError( __FILE__, __LINE__ )

long long getCurrentTime() {
    struct timeval te;
    gettimeofday(&te, NULL); // get current time
    long long microseconds = te.tv_sec*1000000LL + te.tv_usec;
    return microseconds;
}

inline void __cudaSafeCall( hipError_t err, const char *file, const int line )
{
#ifdef CUDA_ERROR_CHECK
    if ( hipSuccess != err )
    {
        fprintf( stderr, "cudaSafeCall() failed at %s:%i : %s\n",
                 file, line, hipGetErrorString( err ) );
        exit( -1 );
    }
#endif

    return;
}

inline void __cudaCheckError( const char *file, const int line )
{
#ifdef CUDA_ERROR_CHECK
    hipError_t err = hipGetLastError();
    if ( hipSuccess != err )
    {
        fprintf( stderr, "cudaCheckError() failed at %s:%i : %s\n",
                 file, line, hipGetErrorString( err ) );
        exit( -1 );
    }

    // More careful checking. However, this will affect performance.
    // Comment away if needed.
    err = hipDeviceSynchronize();
    if( hipSuccess != err )
    {
        fprintf( stderr, "cudaCheckError() with sync failed at %s:%i : %s\n",
                 file, line, hipGetErrorString( err ) );
        exit( -1 );
    }
#endif
}

__global__ void mm(float *dA, float *dB, float *dC, int DIM, int N, int GPUN) {
    int id = blockIdx.x * blockDim.x + threadIdx.x;
    if (id <= GPUN) {
        int i = id / DIM;
        int j = id % DIM;
        float sum = 0.0f;
        for (int k = 0; k < DIM; k++) {
            sum += dA[i*DIM+k] * dB[k*DIM+j];
        }
        dC[id] = sum;
    }
}

__global__ void mm_tiled(float *dA, float *dB, float *dC, int DIM, int N, int GPUN) {
    int it, jt, kt, i, j, k;
    __shared__ float sA[32][32], sB[32][32];

    // (it, jt) => the first element of a specific tile
    it = blockIdx.y * 32;
    jt = blockIdx.x * 32;

    // (i, j) => specific element
    i = it + threadIdx.y;
    j = jt + threadIdx.x;

    if (i*DIM+j <= GPUN) {
        float sum = 0.0f;
        // per tile loop
        for (kt = 0; kt < DIM; kt += 32) {
            // copy to shared memory
            sA[threadIdx.y][threadIdx.x] = dA[(it+threadIdx.y)*DIM + kt + threadIdx.x];
            sB[threadIdx.y][threadIdx.x] = dB[(kt+threadIdx.y)*DIM + jt + threadIdx.x];
            __syncthreads();

            // two 32x32 small shared (dB[it + 0:31][kt + 0:31], dC[kt+0:31][jt + 0:31]) at this point
            for (k = kt; k < kt+32; k++) {
                sum += sA[i-it][k-kt] * sB[k-kt][j-jt];
            }

            __syncthreads();
        }
        dC[i*DIM+j] = sum;
    }
}

extern "C" {
    void mmCUDA(float* A, float *B, float *C, int N, int start, int end, int GPUN, int tiled) {
        float *dA, *dB, *dC;
        if (GPUN > 0) {
            assert(end - start + 1 == GPUN);
#ifdef VERBOSE
            printf("In mmCUDA\n");
            printf("\t GPUN: %d\n", GPUN);
            printf("\t range: %d..%d\n", start, end);
#endif
#ifdef PROF
            hipEvent_t startCudaMallocEvent, endCudaMallocEvent;
            hipEvent_t startCudaMemcpyH2DEvent, endCudaMemcpyH2DEvent;
            hipEvent_t startCudaKernelEvent, endCudaKernelEvent;
            hipEvent_t startCudaMemcpyD2HEvent, endCudaMemcpyD2HEvent;
            CudaSafeCall(hipEventCreate(&startCudaMallocEvent));
            CudaSafeCall(hipEventCreate(&endCudaMallocEvent));
            CudaSafeCall(hipEventCreate(&startCudaMemcpyH2DEvent));
            CudaSafeCall(hipEventCreate(&endCudaMemcpyH2DEvent));
            CudaSafeCall(hipEventCreate(&startCudaKernelEvent));
            CudaSafeCall(hipEventCreate(&endCudaKernelEvent));
            CudaSafeCall(hipEventCreate(&startCudaMemcpyD2HEvent));
            CudaSafeCall(hipEventCreate(&endCudaMemcpyD2HEvent));
#endif

#ifdef PROF
            CudaSafeCall(hipEventRecord(startCudaMallocEvent));
#endif
            CudaSafeCall(hipMalloc(&dA, sizeof(float) * GPUN));
            CudaSafeCall(hipMalloc(&dB, sizeof(float) * N));
            CudaSafeCall(hipMalloc(&dC, sizeof(float) * GPUN));
#ifdef PROF
            CudaSafeCall(hipEventRecord(endCudaMallocEvent));
            CudaSafeCall(hipEventSynchronize(endCudaMallocEvent));
#endif

#ifdef PROF
            CudaSafeCall(hipEventRecord(startCudaMemcpyH2DEvent));
#endif
            CudaSafeCall(hipMemcpy(dA, A+start, sizeof(float) * GPUN, hipMemcpyHostToDevice));
            CudaSafeCall(hipMemcpy(dB, B, sizeof(float) * N, hipMemcpyHostToDevice));
#ifdef PROF
            CudaSafeCall(hipEventRecord(endCudaMemcpyH2DEvent));
            CudaSafeCall(hipEventSynchronize(endCudaMemcpyH2DEvent));
#endif

#ifdef PROF
            CudaSafeCall(hipEventRecord(startCudaKernelEvent));
#endif
            if (!tiled) {
                mm<<<ceil(((float)GPUN)/THREADS_PER_BLOCK), THREADS_PER_BLOCK>>>(dA, dB, dC, ceil(sqrt(N)), N, GPUN);
            } else if (tiled == 1){
                dim3 block(THREADS_PER_DIM, THREADS_PER_DIM);
                dim3 grid(ceil(sqrt(N)/THREADS_PER_DIM), ceil(sqrt(N)/THREADS_PER_DIM));
                mm_tiled<<<grid, block>>>(dA, dB, dC, ceil(sqrt(N)), N, N);
            } else {
#ifdef __NVCC__
                hipblasHandle_t handle;
#ifdef PROF
                long long start = getCurrentTime();
#endif
                hipblasCreate(&handle);
                float alpha = 1.0F;
                float beta = 0.0F;
                int lda = sqrt(N), ldb = sqrt(N), ldc = sqrt(N);
#ifdef PROF
                long long end = getCurrentTime();
                printf("cuBLAS prep: %lf msec\n", (float)(end-start)/1000);
#endif
                hipblasSgemm(handle, HIPBLAS_OP_N, HIPBLAS_OP_N, sqrt(N), GPUN/sqrt(N), sqrt(N), &alpha, dB, ldb, dA, lda, &beta, dC, ldc);

                //http://peterwittek.com/cublas-matrix-c-style.html
                //C:mxn = A:mxk X B:kxn
                //stat=cublasSgemm(handle,CUBLAS_OP_N,CUBLAS_OP_N,n,m,k,&a1,d_b,n,d_a,k,&bet,d_c,n);
#ifdef PROF
                long long end2 = getCurrentTime();
                printf("cuBLAS finish: %lf msec\n", (float)(end2-start)/1000);
#endif
#endif
            }
            CudaCheckError();
#ifdef PROF
            CudaSafeCall(hipEventRecord(endCudaKernelEvent));
            CudaSafeCall(hipEventSynchronize(endCudaKernelEvent));
#endif
            CudaSafeCall(hipDeviceSynchronize());

#ifdef PROF
            CudaSafeCall(hipEventRecord(startCudaMemcpyD2HEvent));
#endif
            CudaSafeCall(hipMemcpy(C + start, dC, sizeof(float) * GPUN, hipMemcpyDeviceToHost));
#ifdef PROF
            CudaSafeCall(hipEventRecord(endCudaMemcpyD2HEvent));
            CudaSafeCall(hipEventSynchronize(endCudaMemcpyD2HEvent));
#endif

#ifdef PROF
            float msecMalloc, msecH2D, msecKernel, msecD2H;
            CudaSafeCall(hipEventElapsedTime(&msecMalloc, startCudaMallocEvent, endCudaMallocEvent));
            CudaSafeCall(hipEventElapsedTime(&msecH2D, startCudaMemcpyH2DEvent, endCudaMemcpyH2DEvent));
            CudaSafeCall(hipEventElapsedTime(&msecKernel, startCudaKernelEvent, endCudaKernelEvent));
            CudaSafeCall(hipEventElapsedTime(&msecD2H, startCudaMemcpyD2HEvent, endCudaMemcpyD2HEvent));
            printf("CUDA malloc: %lf msec\n", msecMalloc);
            printf("CUDA h2d: %lf msec\n", msecH2D);
            printf("CUDA kernel: %lf msec\n", msecKernel);
            printf("CUDA d2h: %lf msec\n", msecD2H);
#endif

            //for (int i = 0; i < GPUN; i++) {
            //  printf("C[%d] = %lf\n", start+i, C[start+i]);
            //}

            CudaSafeCall(hipFree(dA));
            CudaSafeCall(hipFree(dB));
            CudaSafeCall(hipFree(dC));
        }
    }
}

	.text
	.file	"mm.hip"
	.globl	_Z14getCurrentTimev             # -- Begin function _Z14getCurrentTimev
	.type	_Z14getCurrentTimev,@function
_Z14getCurrentTimev:                    # @_Z14getCurrentTimev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	imulq	$1000000, (%rbx), %rax          # imm = 0xF4240
	addq	8(%rbx), %rax
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z14getCurrentTimev, .Lfunc_end0-_Z14getCurrentTimev
	.cfi_endproc
                                        # -- End function
	.globl	_Z17__device_stub__mmPfS_S_iii  # -- Begin function _Z17__device_stub__mmPfS_S_iii
	.type	_Z17__device_stub__mmPfS_S_iii,@function
_Z17__device_stub__mmPfS_S_iii:         # @_Z17__device_stub__mmPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z2mmPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z17__device_stub__mmPfS_S_iii, .Lfunc_end1-_Z17__device_stub__mmPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__mm_tiledPfS_S_iii # -- Begin function _Z23__device_stub__mm_tiledPfS_S_iii
	.type	_Z23__device_stub__mm_tiledPfS_S_iii,@function
_Z23__device_stub__mm_tiledPfS_S_iii:   # @_Z23__device_stub__mm_tiledPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8mm_tiledPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z23__device_stub__mm_tiledPfS_S_iii, .Lfunc_end2-_Z23__device_stub__mm_tiledPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function mmCUDA
.LCPI3_0:
	.quad	0x3fa0000000000000              # double 0.03125
.LCPI3_2:
	.quad	0x0000000000000000              # double 0
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI3_1:
	.long	0x3a800000                      # float 9.765625E-4
	.text
	.globl	mmCUDA
	.type	mmCUDA,@function
mmCUDA:                                 # @mmCUDA
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, 4(%rsp)                   # 4-byte Spill
	movl	112(%rsp), %r15d
	testl	%r15d, %r15d
	jle	.LBB3_43
# %bb.1:
	movl	%r9d, %ebp
	movl	%r8d, %r13d
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movq	%rdx, 48(%rsp)                  # 8-byte Spill
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$.L.str.1, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.2, %edi
	movl	%r13d, %esi
	movl	%ebp, %edx
	xorl	%eax, %eax
	callq	printf
	movl	%r15d, %r14d
	shlq	$2, %r14
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.3:                                # %_Z14__cudaSafeCall10hipError_tPKci.exit
	movslq	4(%rsp), %rbp                   # 4-byte Folded Reload
	shlq	$2, %rbp
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.5:                                # %_Z14__cudaSafeCall10hipError_tPKci.exit39
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB3_6
# %bb.7:                                # %_Z14__cudaSafeCall10hipError_tPKci.exit41
	movq	32(%rsp), %rdi
	movslq	%r13d, %r13
	leaq	(%rbx,%r13,4), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB3_8
# %bb.9:                                # %_Z14__cudaSafeCall10hipError_tPKci.exit43
	movq	24(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB3_10
# %bb.11:                               # %_Z14__cudaSafeCall10hipError_tPKci.exit45
	movl	120(%rsp), %eax
	cmpl	$1, %eax
	je	.LBB3_18
# %bb.12:                               # %_Z14__cudaSafeCall10hipError_tPKci.exit45
	testl	%eax, %eax
	jne	.LBB3_27
# %bb.13:
	cvtsi2ss	%r15d, %xmm0
	mulss	.LCPI3_1(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rax
	movl	%eax, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1024, %rdx                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_27
# %bb.14:
	movq	32(%rsp), %rbx
	movq	24(%rsp), %r12
	xorps	%xmm0, %xmm0
	cvtsi2sdl	4(%rsp), %xmm0          # 4-byte Folded Reload
	movq	16(%rsp), %rbp
	xorpd	%xmm1, %xmm1
	ucomisd	%xmm1, %xmm0
	jb	.LBB3_16
# %bb.15:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB3_17
.LBB3_18:
	cvtsi2sdl	4(%rsp), %xmm1          # 4-byte Folded Reload
	sqrtsd	%xmm1, %xmm0
	xorpd	%xmm2, %xmm2
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	ucomisd	%xmm2, %xmm1
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	jae	.LBB3_20
# %bb.19:                               # %call.sqrt64
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	sqrt
.LBB3_20:                               # %.split63
	mulsd	.LCPI3_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %rbx
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	ucomisd	.LCPI3_2(%rip), %xmm0
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	jae	.LBB3_22
# %bb.21:                               # %call.sqrt65
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	sqrt
.LBB3_22:                               # %.split63.split
	mulsd	.LCPI3_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %rdi
	movl	%ebx, %eax
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_27
# %bb.23:
	movq	32(%rsp), %rbx
	movq	24(%rsp), %r15
	movq	16(%rsp), %r12
	xorpd	%xmm0, %xmm0
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	ucomisd	%xmm0, %xmm1
	movapd	%xmm1, %xmm0
	jb	.LBB3_25
# %bb.24:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB3_26
.LBB3_16:                               # %call.sqrt
	callq	sqrt
.LBB3_17:                               # %.split
	callq	ceil@PLT
	cvttsd2si	%xmm0, %ecx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	movq	%rbp, %rdx
	movl	4(%rsp), %r8d                   # 4-byte Reload
	movl	%r15d, %r9d
	callq	_Z17__device_stub__mmPfS_S_iii
	jmp	.LBB3_27
.LBB3_25:                               # %call.sqrt67
	callq	sqrt
.LBB3_26:                               # %.split66
	callq	ceil@PLT
	cvttsd2si	%xmm0, %ecx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	4(%rsp), %r8d                   # 4-byte Reload
	movl	%r8d, %r9d
	callq	_Z23__device_stub__mm_tiledPfS_S_iii
.LBB3_27:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB3_28
# %bb.31:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB3_32
# %bb.33:                               # %_Z16__cudaCheckErrorPKci.exit
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB3_34
# %bb.35:                               # %_Z14__cudaSafeCall10hipError_tPKci.exit48
	movq	48(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%r13,4), %rdi
	movq	16(%rsp), %rsi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB3_36
# %bb.37:                               # %_Z14__cudaSafeCall10hipError_tPKci.exit50
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB3_38
# %bb.39:                               # %_Z14__cudaSafeCall10hipError_tPKci.exit52
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB3_40
# %bb.41:                               # %_Z14__cudaSafeCall10hipError_tPKci.exit54
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB3_42
.LBB3_43:                               # %_Z14__cudaSafeCall10hipError_tPKci.exit56
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_2:
	.cfi_def_cfa_offset 112
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.3, %edx
	movq	%rbx, %rdi
	movl	$139, %ecx
	jmp	.LBB3_30
.LBB3_4:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.3, %edx
	movq	%rbx, %rdi
	movl	$140, %ecx
	jmp	.LBB3_30
.LBB3_6:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.3, %edx
	movq	%rbx, %rdi
	movl	$141, %ecx
	jmp	.LBB3_30
.LBB3_8:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.3, %edx
	movq	%rbx, %rdi
	movl	$150, %ecx
	jmp	.LBB3_30
.LBB3_10:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.3, %edx
	movq	%rbx, %rdi
	movl	$151, %ecx
	jmp	.LBB3_30
.LBB3_28:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	jmp	.LBB3_29
.LBB3_32:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
.LBB3_29:
	movl	$.L.str.3, %edx
	movq	%rbx, %rdi
	movl	$191, %ecx
	jmp	.LBB3_30
.LBB3_34:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.3, %edx
	movq	%rbx, %rdi
	movl	$196, %ecx
	jmp	.LBB3_30
.LBB3_36:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.3, %edx
	movq	%rbx, %rdi
	movl	$201, %ecx
	jmp	.LBB3_30
.LBB3_38:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.3, %edx
	movq	%rbx, %rdi
	movl	$223, %ecx
	jmp	.LBB3_30
.LBB3_40:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.3, %edx
	movq	%rbx, %rdi
	movl	$224, %ecx
	jmp	.LBB3_30
.LBB3_42:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.3, %edx
	movq	%rbx, %rdi
	movl	$225, %ecx
.LBB3_30:
	movq	%rax, %r8
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.Lfunc_end3:
	.size	mmCUDA, .Lfunc_end3-mmCUDA
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z2mmPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8mm_tiledPfS_S_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z2mmPfS_S_iii,@object          # @_Z2mmPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z2mmPfS_S_iii
	.p2align	3, 0x0
_Z2mmPfS_S_iii:
	.quad	_Z17__device_stub__mmPfS_S_iii
	.size	_Z2mmPfS_S_iii, 8

	.type	_Z8mm_tiledPfS_S_iii,@object    # @_Z8mm_tiledPfS_S_iii
	.globl	_Z8mm_tiledPfS_S_iii
	.p2align	3, 0x0
_Z8mm_tiledPfS_S_iii:
	.quad	_Z23__device_stub__mm_tiledPfS_S_iii
	.size	_Z8mm_tiledPfS_S_iii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"\t GPUN: %d\n"
	.size	.L.str.1, 12

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\t range: %d..%d\n"
	.size	.L.str.2, 17

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/ahayashi/chapel-gpu/master/apps/mm/mm.hip"
	.size	.L.str.3, 104

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"cudaSafeCall() failed at %s:%i : %s\n"
	.size	.L.str.4, 37

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"cudaCheckError() failed at %s:%i : %s\n"
	.size	.L.str.5, 39

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"cudaCheckError() with sync failed at %s:%i : %s\n"
	.size	.L.str.6, 49

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z2mmPfS_S_iii"
	.size	.L__unnamed_1, 15

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z8mm_tiledPfS_S_iii"
	.size	.L__unnamed_2, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"In mmCUDA"
	.size	.Lstr, 10

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z17__device_stub__mmPfS_S_iii
	.addrsig_sym _Z23__device_stub__mm_tiledPfS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z2mmPfS_S_iii
	.addrsig_sym _Z8mm_tiledPfS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z2mmPfS_S_iii          ; -- Begin function _Z2mmPfS_S_iii
	.globl	_Z2mmPfS_S_iii
	.p2align	8
	.type	_Z2mmPfS_S_iii,@function
_Z2mmPfS_S_iii:                         ; @_Z2mmPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b32 s3, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_ge_i32_e64 s3, v1
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	s_ashr_i32 s3, s2, 31
	v_add_nc_u32_e32 v4, v1, v2
	s_add_i32 s8, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_xor_b32 s3, s8, s3
	v_xor_b32_e32 v4, v4, v2
	v_cvt_f32_u32_e32 v0, s3
	s_sub_i32 s8, 0, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, s8, v0
	v_mul_hi_u32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v3
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v0, s3
	v_sub_nc_u32_e32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s3, v0
	v_cmp_le_u32_e32 vcc_lo, s3, v0
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s3, v0
	v_cmp_le_u32_e32 vcc_lo, s3, v0
	s_mov_b32 s3, 0
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v2
	v_sub_nc_u32_e32 v3, v0, v2
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_nc_u32_e32 v5, v1, v3
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, s3, v5
	v_ashrrev_i32_e32 v4, 31, v3
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s2, s3
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[8:9], 2, v[3:4]
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s6, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v4, v[8:9], off
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v0, v6, v4 :: v_dual_add_nc_u32 v3, s2, v3
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v0, 0
.LBB0_5:                                ; %Flow40
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z2mmPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z2mmPfS_S_iii, .Lfunc_end0-_Z2mmPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 436
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8mm_tiledPfS_S_iii    ; -- Begin function _Z8mm_tiledPfS_S_iii
	.globl	_Z8mm_tiledPfS_S_iii
	.p2align	8
	.type	_Z8mm_tiledPfS_S_iii,@function
_Z8mm_tiledPfS_S_iii:                   ; @_Z8mm_tiledPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x18
	s_load_b32 s3, s[0:1], 0x20
	v_bfe_u32 v4, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, s15, 5, v4
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v3, v1, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, s14, 5, v2
	v_add_nc_u32_e32 v0, v1, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB1_8
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB1_6
; %bb.2:                                ; %.lr.ph
	v_lshlrev_b32_e32 v5, 2, v2
	v_lshlrev_b32_e32 v6, 7, v4
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v8, v3, v2
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v7, 0x1000, v5
	v_add_nc_u32_e32 v9, v6, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v10, v7, v6
.LBB1_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
	v_add_nc_u32_e32 v13, s3, v4
	v_add_nc_u32_e32 v2, s3, v8
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[11:12], null, v13, s2, v[1:2]
	v_mov_b32_e32 v12, v3
	v_lshlrev_b64 v[13:14], 2, v[2:3]
	v_mov_b32_e32 v2, v7
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v13, vcc_lo, s4, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v9, v13
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_4:                                ;   Parent Loop BB1_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v11, s8, v6
	s_add_i32 s8, s8, 4
	ds_load_b32 v12, v2
	ds_load_b32 v11, v11
	v_add_nc_u32_e32 v2, 0x80, v2
	s_cmpk_lg_i32 s8, 0x80
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v5, v11, v12
	s_cbranch_scc1 .LBB1_4
; %bb.5:                                ;   in Loop: Header=BB1_3 Depth=1
	s_add_i32 s3, s3, 32
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s3, s2
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_3
	s_branch .LBB1_7
.LBB1_6:
	v_mov_b32_e32 v5, 0
.LBB1_7:                                ; %._crit_edge
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v5, off
.LBB1_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8mm_tiledPfS_S_iii
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z8mm_tiledPfS_S_iii, .Lfunc_end1-_Z8mm_tiledPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 448
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z2mmPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z2mmPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8mm_tiledPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8mm_tiledPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
