#include "includes.h"
__global__ void GaussianEliminationGlobal(const int clusterSize,float *x, const float *diagonal_values , const float *non_diagonal_values ,float *y , const int size)
{
const int index = blockIdx.x * blockDim.x + threadIdx.x ;
const int gi = index * clusterSize;

float matrix[180][180];	//size of matrix
for (int i = gi; i < gi + clusterSize;++i)
{
for (int j = gi; j < gi + clusterSize;++j)
{
matrix[i][j]=0;
}
matrix[i][i] = diagonal_values[i];
}
for(int i = gi; i < gi + clusterSize - 1 ;++i)
{
matrix[i][i+1] = non_diagonal_values[2*i+1];
matrix[i+1][i] = non_diagonal_values[2*i+2];
}

// triangle form
for (int i = gi ; i < gi + clusterSize; ++i)
{
//for every row...
for (int j = i+1; j < gi + clusterSize; ++j)
{
//calculate ratio for every row below it using the triangular
double ratio = matrix[j][i] / matrix[i][i];
for(int k = gi; k < gi + clusterSize; ++k)
{
//Eliminate every column based on that ratio
matrix[j][k] = matrix[j][k] - (matrix[i][k] * ratio);
}
//elimination on the coefficient vector
y[j] = y[j] - (y[i] * ratio);
}
}
__syncthreads();
//Back substitution
for (int i = gi + clusterSize-1; i > gi-1; --i)
{
double current = 0;
for (unsigned int j = i; j < gi + clusterSize; ++j)
{
current = current + (matrix[i][j] * x[j]);
}
x[i] = (y[i] - current) / matrix[i][i];
}
}
	.file	"tmpxft_002d4959_00000000-6_GaussianEliminationGlobal.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z55__device_stub__Z25GaussianEliminationGlobaliPfPKfS1_S_iiPfPKfS1_S_i
	.type	_Z55__device_stub__Z25GaussianEliminationGlobaliPfPKfS1_S_iiPfPKfS1_S_i, @function
_Z55__device_stub__Z25GaussianEliminationGlobaliPfPKfS1_S_iiPfPKfS1_S_i:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 40(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z25GaussianEliminationGlobaliPfPKfS1_S_i(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z55__device_stub__Z25GaussianEliminationGlobaliPfPKfS1_S_iiPfPKfS1_S_i, .-_Z55__device_stub__Z25GaussianEliminationGlobaliPfPKfS1_S_iiPfPKfS1_S_i
	.globl	_Z25GaussianEliminationGlobaliPfPKfS1_S_i
	.type	_Z25GaussianEliminationGlobaliPfPKfS1_S_i, @function
_Z25GaussianEliminationGlobaliPfPKfS1_S_i:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z25GaussianEliminationGlobaliPfPKfS1_S_iiPfPKfS1_S_i
	.cfi_endproc
.LFE2033:
	.size	_Z25GaussianEliminationGlobaliPfPKfS1_S_i, .-_Z25GaussianEliminationGlobaliPfPKfS1_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z25GaussianEliminationGlobaliPfPKfS1_S_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z25GaussianEliminationGlobaliPfPKfS1_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void GaussianEliminationGlobal(const int clusterSize,float *x, const float *diagonal_values , const float *non_diagonal_values ,float *y , const int size)
{
const int index = blockIdx.x * blockDim.x + threadIdx.x ;
const int gi = index * clusterSize;

float matrix[180][180];	//size of matrix
for (int i = gi; i < gi + clusterSize;++i)
{
for (int j = gi; j < gi + clusterSize;++j)
{
matrix[i][j]=0;
}
matrix[i][i] = diagonal_values[i];
}
for(int i = gi; i < gi + clusterSize - 1 ;++i)
{
matrix[i][i+1] = non_diagonal_values[2*i+1];
matrix[i+1][i] = non_diagonal_values[2*i+2];
}

// triangle form
for (int i = gi ; i < gi + clusterSize; ++i)
{
//for every row...
for (int j = i+1; j < gi + clusterSize; ++j)
{
//calculate ratio for every row below it using the triangular
double ratio = matrix[j][i] / matrix[i][i];
for(int k = gi; k < gi + clusterSize; ++k)
{
//Eliminate every column based on that ratio
matrix[j][k] = matrix[j][k] - (matrix[i][k] * ratio);
}
//elimination on the coefficient vector
y[j] = y[j] - (y[i] * ratio);
}
}
__syncthreads();
//Back substitution
for (int i = gi + clusterSize-1; i > gi-1; --i)
{
double current = 0;
for (unsigned int j = i; j < gi + clusterSize; ++j)
{
current = current + (matrix[i][j] * x[j]);
}
x[i] = (y[i] - current) / matrix[i][i];
}
}
	.text
	.file	"GaussianEliminationGlobal.hip"
	.globl	_Z40__device_stub__GaussianEliminationGlobaliPfPKfS1_S_i # -- Begin function _Z40__device_stub__GaussianEliminationGlobaliPfPKfS1_S_i
	.type	_Z40__device_stub__GaussianEliminationGlobaliPfPKfS1_S_i,@function
_Z40__device_stub__GaussianEliminationGlobaliPfPKfS1_S_i: # @_Z40__device_stub__GaussianEliminationGlobaliPfPKfS1_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z25GaussianEliminationGlobaliPfPKfS1_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z40__device_stub__GaussianEliminationGlobaliPfPKfS1_S_i, .Lfunc_end0-_Z40__device_stub__GaussianEliminationGlobaliPfPKfS1_S_i
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z25GaussianEliminationGlobaliPfPKfS1_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z25GaussianEliminationGlobaliPfPKfS1_S_i,@object # @_Z25GaussianEliminationGlobaliPfPKfS1_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z25GaussianEliminationGlobaliPfPKfS1_S_i
	.p2align	3, 0x0
_Z25GaussianEliminationGlobaliPfPKfS1_S_i:
	.quad	_Z40__device_stub__GaussianEliminationGlobaliPfPKfS1_S_i
	.size	_Z25GaussianEliminationGlobaliPfPKfS1_S_i, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z25GaussianEliminationGlobaliPfPKfS1_S_i"
	.size	.L__unnamed_1, 42

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z40__device_stub__GaussianEliminationGlobaliPfPKfS1_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z25GaussianEliminationGlobaliPfPKfS1_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z25GaussianEliminationGlobaliPfPKfS1_S_i ; -- Begin function _Z25GaussianEliminationGlobaliPfPKfS1_S_i
	.globl	_Z25GaussianEliminationGlobaliPfPKfS1_S_i
	.p2align	8
	.type	_Z25GaussianEliminationGlobaliPfPKfS1_S_i,@function
_Z25GaussianEliminationGlobaliPfPKfS1_S_i: ; @_Z25GaussianEliminationGlobaliPfPKfS1_S_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x3c
	s_load_b32 s2, s[0:1], 0x0
	s_load_b256 s[4:11], s[0:1], 0x8
	s_mov_b32 s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_cmp_gt_i32 s2, 0
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	s_cselect_b32 s0, -1, 0
	s_cmp_lt_i32 s2, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v9, v1, s2
	v_add_nc_u32_e32 v10, s2, v9
	s_cbranch_scc1 .LBB0_6
; %bb.1:                                ; %.preheader101.preheader
	s_mov_b32 s12, 16
	v_mov_b32_e32 v0, 0
	v_mad_u64_u32 v[2:3], null, 0x2d4, v9, s[12:13]
	v_mov_b32_e32 v3, v9
.LBB0_2:                                ; %.preheader101
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v5, v9
	s_mov_b32 s3, 0
.LBB0_3:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v5, 1, v5
	scratch_store_b32 v4, v0, off
	v_add_nc_u32_e32 v4, 4, v4
	v_cmp_ge_i32_e32 vcc_lo, v5, v10
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_3
; %bb.4:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_ashrrev_i32_e32 v4, 31, v3
	v_mul_lo_u32 v6, 0x2d0, v3
	v_add_nc_u32_e32 v2, 0x2d0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	v_lshlrev_b32_e32 v5, 2, v3
	v_add_nc_u32_e32 v3, 1, v3
	v_add3_u32 v5, 16, v6, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, v3, v10
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	scratch_store_b32 v5, v4, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_2
; %bb.5:                                ; %Flow182
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_6:                                ; %.preheader100
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, -1, v10
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_i32_e64 v9, v0
	s_cbranch_execz .LBB0_9
; %bb.7:                                ; %.lr.ph106.preheader
	v_mul_lo_u32 v2, 0x2d4, v9
	v_mov_b32_e32 v3, 16
	s_add_i32 s3, s2, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v4, v2, v3, 0x2d0
	v_lshlrev_b32_e32 v2, 1, v9
.LBB0_8:                                ; %.lr.ph106
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_add_i32 s3, s3, -1
	s_cmp_eq_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[2:3]
	v_add_nc_u32_e32 v2, 2, v2
	v_add_co_u32 v5, vcc_lo, s8, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v6, vcc_lo
	global_load_b64 v[5:6], v[5:6], off offset:4
	s_waitcnt vmcnt(0)
	s_clause 0x1
	scratch_store_b32 v4, v5, off offset:-716
	scratch_store_b32 v4, v6, off
	v_add_nc_u32_e32 v4, 0x2d4, v4
	s_cbranch_scc0 .LBB0_8
.LBB0_9:                                ; %Flow181
	s_or_b32 exec_lo, exec_lo, s1
	v_cndmask_b32_e64 v11, 0, 1, s0
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_19
; %bb.10:                               ; %.lr.ph116.preheader
	s_mov_b32 s0, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, 0x2d4, v9, s[0:1]
	s_mov_b32 s0, 0
                                        ; implicit-def: $sgpr1
	v_dual_mov_b32 v3, v9 :: v_dual_add_nc_u32 v12, 0x2d0, v2
.LBB0_11:                               ; %.lr.ph116
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_13 Depth 2
                                        ;       Child Loop BB0_14 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v13, 1, v3
	s_or_b32 s1, s1, exec_lo
	s_mov_b32 s3, exec_lo
	v_cmpx_lt_i32_e64 v13, v10
	s_cbranch_execz .LBB0_17
; %bb.12:                               ; %.lr.ph114
                                        ;   in Loop: Header=BB0_11 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	v_mul_lo_u32 v5, 0x2d0, v3
	v_dual_mov_b32 v15, v12 :: v_dual_lshlrev_b32 v14, 2, v3
	s_mov_b32 s6, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add3_u32 v16, 16, v5, v14
	v_mov_b32_e32 v5, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
.LBB0_13:                               ; %.lr.ph110.preheader
                                        ;   Parent Loop BB0_11 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_14 Depth 3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, 0x2d0, v5
	s_mov_b32 s7, 0
	v_add3_u32 v6, 16, v6, v14
	s_clause 0x1
	scratch_load_b32 v6, v6, off
	scratch_load_b32 v7, v16, off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v8, null, v7, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v17, v8
	s_waitcnt_depctr 0xfff
	v_fma_f32 v18, -v8, v17, 1.0
	v_fmac_f32_e32 v17, v18, v17
	v_div_scale_f32 v18, vcc_lo, v6, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v19, v18, v17
	v_fma_f32 v20, -v8, v19, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v19, v20, v17
	v_fma_f32 v8, -v8, v19, v18
	v_mov_b32_e32 v18, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v8, v8, v17, v19
	v_mov_b32_e32 v17, v15
	v_div_fixup_f32 v6, v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[7:8], v6
	v_mov_b32_e32 v6, v2
.LBB0_14:                               ; %.lr.ph110
                                        ;   Parent Loop BB0_11 Depth=1
                                        ;     Parent Loop BB0_13 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	scratch_load_b32 v19, v17, off
	scratch_load_b32 v21, v6, off
	v_add_nc_u32_e32 v18, 1, v18
	v_add_nc_u32_e32 v6, 4, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, v18, v10
	s_or_b32 s7, vcc_lo, s7
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[19:20], v19
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[21:22], v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], -v[7:8], v[21:22], v[19:20]
	v_cvt_f32_f64_e32 v19, v[19:20]
	scratch_store_b32 v17, v19, off
	v_add_nc_u32_e32 v17, 4, v17
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_14
; %bb.15:                               ; %._crit_edge111
                                        ;   in Loop: Header=BB0_13 Depth=2
	s_or_b32 exec_lo, exec_lo, s7
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_nc_u32_e32 v15, 0x2d0, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[17:18], 2, v[5:6]
	v_add_nc_u32_e32 v5, 1, v5
	v_add_co_u32 v17, vcc_lo, s10, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v18, vcc_lo, s11, v18, vcc_lo
	v_cmp_ge_i32_e32 vcc_lo, v5, v10
	s_clause 0x1
	global_load_b32 v6, v[17:18], off
	global_load_b32 v21, v[3:4], off
	s_or_b32 s6, vcc_lo, s6
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[19:20], v6
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[21:22], v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[7:8], v[21:22], v[19:20]
	v_cvt_f32_f64_e32 v6, v[6:7]
	global_store_b32 v[17:18], v6, off
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_13
; %bb.16:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_11 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_add_nc_u32_e32 v12, 0x2d0, v12
	v_add_nc_u32_e32 v2, 0x2d0, v2
	s_and_not1_b32 s1, s1, exec_lo
.LBB0_17:                               ; %Flow177
                                        ;   in Loop: Header=BB0_11 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v3, v13
	s_and_b32 s3, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s3, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_11
; %bb.18:                               ; %Flow178
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_19:                               ; %._crit_edge117
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, 1, v11
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_25
; %bb.20:                               ; %.preheader.preheader
	v_mad_u64_u32 v[2:3], null, s2, v1, s[2:3]
	s_mov_b32 s1, 1
	s_mov_b32 s2, 0
	v_mov_b32_e32 v7, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, 0x2d4, v2
	v_mov_b32_e32 v2, 16
	v_add3_u32 v6, v1, v2, 0xfffffd2c
.LBB0_21:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_23 Depth 2
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_u32_e64 v0, v10
	s_cbranch_execz .LBB0_24
; %bb.22:                               ; %.lr.ph120.preheader
                                        ;   in Loop: Header=BB0_21 Depth=1
	v_dual_mov_b32 v1, v7 :: v_dual_mov_b32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	v_mov_b32_e32 v1, v6
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
.LBB0_23:                               ; %.lr.ph120
                                        ;   Parent Loop BB0_21 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	scratch_load_b32 v8, v1, off
	global_load_b32 v11, v[4:5], off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_add_i32 s3, s3, -1
	v_add_nc_u32_e32 v1, 4, v1
	s_cmp_eq_u32 s3, 0
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v8, v8, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[11:12], v8
	v_add_f64 v[2:3], v[2:3], v[11:12]
	s_cbranch_scc0 .LBB0_23
.LBB0_24:                               ; %Flow174
                                        ;   in Loop: Header=BB0_21 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_ashrrev_i32_e32 v1, 31, v0
	v_mul_lo_u32 v8, 0x2d0, v0
	v_add_nc_u32_e32 v6, 0xfffffd2c, v6
	s_add_i32 s1, s1, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	v_add_co_u32 v11, vcc_lo, s10, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v5, vcc_lo
	global_load_b32 v1, v[11:12], off
	v_lshlrev_b32_e32 v11, 2, v0
	v_add3_u32 v8, 16, v8, v11
	scratch_load_b32 v8, v8, off
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[11:12], v1
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[13:14], v8
	v_add_nc_u32_e32 v8, -1, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[11:12], -v[2:3]
	v_div_scale_f64 v[11:12], null, v[13:14], v[13:14], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[15:16], v[11:12]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[17:18], -v[11:12], v[15:16], 1.0
	v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], -v[11:12], v[15:16], 1.0
	v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16]
	v_div_scale_f64 v[17:18], vcc_lo, v[1:2], v[13:14], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[19:20], v[17:18], v[15:16]
	v_fma_f64 v[11:12], -v[11:12], v[19:20], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[11:12], v[11:12], v[15:16], v[19:20]
	v_cmp_le_i32_e32 vcc_lo, v0, v9
	v_mov_b32_e32 v0, v8
	s_or_b32 s2, vcc_lo, s2
	v_div_fixup_f64 v[1:2], v[11:12], v[13:14], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v3, v[1:2]
	v_add_co_u32 v1, s0, s4, v4
	v_add_co_ci_u32_e64 v2, s0, s5, v5, s0
	global_store_b32 v[1:2], v3, off
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_21
.LBB0_25:                               ; %._crit_edge125
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z25GaussianEliminationGlobaliPfPKfS1_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 129616
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z25GaussianEliminationGlobaliPfPKfS1_S_i, .Lfunc_end0-_Z25GaussianEliminationGlobaliPfPKfS1_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1524
; NumSgprs: 18
; NumVgprs: 23
; ScratchSize: 129616
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z25GaussianEliminationGlobaliPfPKfS1_S_i
    .private_segment_fixed_size: 129616
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z25GaussianEliminationGlobaliPfPKfS1_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     23
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
