#include "device_launch_parameters.h"
#include <iostream>
#include <stdio.h>
#include <cuda_runtime.h>
#include <time.h>
using namespace std;
#define eps 1e-4

__global__ void im2col(float ***img, float **img_flat, int c1, int n, int m, int kw, int kh, int out_n, int out_m){
    //each thread process a [c1 * kw * kh] flatten op
    int tx = threadIdx.x;
    int bx = blockIdx.x;
    int idx = bx * blockDim.x + tx;

    if(idx < out_n * out_m){
        int i = idx / out_m;
        int j = idx % out_m;
        int col = c1 * kw * kh;
        //printf("%d %d\n", i, j);
        
        for(int c = 0; c < c1; c++){
            for(int p = 0; p < kw; p++){
                for(int q = 0; q < kh; q++){
                    int x = idx;            
                    int y = c * kw * kh + p * kh + q;
                    int newidx = x * col + y;
                    
                    int oldx = c;
                    int oldy = p + i;
                    int oldz = q + j;
                    int oldidx = oldx * n * m + oldy * m + oldz;
                    *((float*)img_flat + newidx) = *((float*)img + oldidx);
                    //printf("%d %d %f %f\n", newidx, oldidx, *((float*)img_flat + newidx), *((float*)img + oldidx));
                }
            }
        }
    }
}


void im2col_cpu(float ***img, float **img_flat, int c1, int n, int m, int kw, int kh, int out_n, int out_m){
    //img: [C1, N, M]
    //kernel: [C2, C1, kw, kh]
    //return: img_flat[out_n*out_m, C1*kw*kh]

    int row = out_n * out_m;
    int col = c1 * kw * kh;

    for(int i = 0; i < out_n; i++){
        for(int j = 0; j < out_m; j++){
            for(int c = 0; c < c1; c++){
                for(int p = 0; p < kw; p++){
                    for(int q = 0; q < kh; q++){
                        //printf("%d %d %d %d %d\n", i * out_m + j, c * kw + (p * kh + q), c, p+i, q+j);
                        //img_flat[i * out_m + j][c * kw * kh + (p * kh + q)] = img[c][p+i][q+j];
                        int x = i * out_m + j; 
                        int y = c * kw * kh + (p * kh + q);
                        int idx = x * col + y;

                        int oldx = c;
                        int oldy = p + i;
                        int oldz = q + j;
                        int oldidx = oldx * n * m + (oldy * m + oldz);
                        *((float*)img_flat + idx) = *((float*)img + oldidx);
                    }
                }
            }
        }
    }
}

bool check(float **img_flat, float **img_flat_cpu, int c1, int n, int m, int kw, int kh, int out_n, int out_m){
    int row = out_n * out_m;
    int col = c1 * kw * kh;
    for(int i = 0; i < row; i++){
        for(int j = 0; j < col; j++){
            int idx = i * col + j;
            float x = *((float*)img_flat + idx);
            float y = *((float*)img_flat_cpu + idx);
            //cout<<x<<' '<<y<<endl;
            if(abs(x - y) > eps){
                cout<<"Not Equal!!!"<<endl;
                exit(0);
            }
        }
    }
    cout<<"Oh Nice Equal!!!"<<endl;
    return true;
}

int main(){
    //feature map size[C1, N, M]
    int in_channel = 32;
    int n = 64;
    int m = 64;
    size_t size = sizeof(float);

    //kernel size
    int kw = 3;
    int kh = 3;

    //output featuremap size[out_n * out_m, C1 * kw * kh]
    int out_n = n - kw + 1;
    int out_m = m - kh + 1;
    int row = out_n * out_m;
    int col = in_channel * kw * kh;

    // sizes
    int img_size = in_channel * n * m * size;
    int imgflat_size = out_n * out_m * in_channel * kw * kh * size;


    float ***img = (float***)malloc(img_size);
    float **img_flat = (float**)malloc(imgflat_size);
    float **img_flat_cpu = (float**)malloc(imgflat_size);

    float ***img_d = NULL;
    float **img_flat_d = NULL;

    cudaMalloc((void**)&img_d, img_size);
    cudaMalloc((void**)&img_flat_d, imgflat_size);

    for(int c = 0; c < in_channel; c++){
        for(int i = 0; i < n; i++){
            for(int j = 0; j < m; j++){
                int idx = c * n * m + i * m + j;
                *((float*)img + idx) = (i + j) % 255;
            }
        }
    }
    
    im2col_cpu(img, img_flat_cpu, in_channel, n, m, kw, kh, out_n, out_m);
    // for(int i = 0; i < row; i++){
    //     for(int j = 0; j < col; j++){
    //         int idx = i * col + j;
    //         cout<<*((float*)img_flat_cpu + idx)<<' ' ;
    //     }
    //     cout<<endl;
    // }

    cudaMemcpy(img_d, img, img_size, cudaMemcpyHostToDevice);
 
    
    dim3 threadPerBlock(32);
    dim3 BlockPerGrid((out_n * out_m + threadPerBlock.x - 1) / threadPerBlock.x);

    im2col<<<BlockPerGrid, threadPerBlock>>>(img_d, img_flat_d, in_channel, n, m, kw, kh, out_n, out_m);

    cudaDeviceSynchronize();
    cudaMemcpy(img_flat, img_flat_d, imgflat_size, cudaMemcpyDeviceToHost);

    // cout<<endl;
    // for(int i = 0; i < row; i++){
    //     for(int j = 0; j < col; j++){
    //         int idx = i * col + j;
    //         cout<<*((float*)img_flat + idx)<<' ' ;
    //     }
    //     cout<<endl;
    // }





    check(img_flat, img_flat_cpu, in_channel, n, m, kw, kh, out_n, out_m);
    
    free(img);
    free(img_flat);
    free(img_flat_cpu);

    cudaFree(img_d);
    cudaFree(img_flat_d);
    //float img[2][2][2]={1, 2, 3, 4, 5, 6, 7, 8};
    //float result[4][2] = {0};
    //float kernel[1][1][1];
    //im2col_cpu((float***)img, (float**)result, 2, 2, 2, 1, 1, 2, 2);
    // for(int i = 0; i < 4; i++){
    //     for(int j = 0; j < 2; j++){
    //         cout<<result[i][j]<<' ';
    //     }
    //     cout<<endl;
    // }


    return 0;
}
	.file	"tmpxft_0024907e_00000000-6_im2col.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10im2col_cpuPPPfS0_iiiiiii
	.type	_Z10im2col_cpuPPPfS0_iiiiiii, @function
_Z10im2col_cpuPPPfS0_iiiiiii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	imull	%r8d, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	72(%rsp), %eax
	movq	%rsi, -32(%rsp)
	movl	%edx, %esi
	imull	%r9d, %edx
	imull	56(%rsp), %edx
	movl	%ecx, -40(%rsp)
	xorl	%ecx, %ecx
	movl	%ecx, -48(%rsp)
	movl	%ecx, -52(%rsp)
	imull	%edx, %eax
	movl	%eax, -36(%rsp)
	movl	56(%rsp), %eax
	imull	%r9d, %eax
	movl	%eax, -44(%rsp)
.L3:
	cmpl	64(%rsp), %r14d
	jge	.L15
	movl	-52(%rsp), %eax
	xorl	%ecx, %ecx
	movl	%eax, -56(%rsp)
.L11:
	cmpl	%ecx, 72(%rsp)
	jle	.L9
	xorl	%eax, %eax
	xorl	%r11d, %r11d
	xorl	%r10d, %r10d
	movl	%eax, -60(%rsp)
	movslq	-56(%rsp), %rax
	movq	%rax, -8(%rsp)
.L10:
	cmpl	%esi, -60(%rsp)
	jge	.L7
	movslq	%r11d, %rax
	movslq	%r10d, %rbx
	movl	-48(%rsp), %r13d
	xorl	%r12d, %r12d
	addq	%rcx, %rax
	xorl	%ebp, %ebp
	movq	%rax, -24(%rsp)
	movq	-8(%rsp), %rax
	addq	%rbx, %rax
	movq	%rax, -16(%rsp)
.L8:
	cmpl	%r9d, %ebp
	jge	.L5
	movq	-24(%rsp), %rbx
	movslq	%r13d, %rax
	addq	%rbx, %rax
	movq	-16(%rsp), %rbx
	leaq	(%rdi,%rax,4), %r15
	movslq	%r12d, %rax
	addq	%rbx, %rax
	movq	-32(%rsp), %rbx
	leaq	(%rbx,%rax,4), %rbx
	xorl	%eax, %eax
.L6:
	cmpl	%eax, 56(%rsp)
	jle	.L16
	movss	(%r15,%rax,4), %xmm0
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	jmp	.L6
.L16:
	incl	%ebp
	addl	56(%rsp), %r12d
	addl	%r8d, %r13d
	jmp	.L8
.L5:
	movl	-44(%rsp), %eax
	incl	-60(%rsp)
	addl	%eax, %r10d
	movl	-40(%rsp), %eax
	addl	%eax, %r11d
	jmp	.L10
.L7:
	addl	%edx, -56(%rsp)
	incq	%rcx
	jmp	.L11
.L9:
	movl	-36(%rsp), %ecx
	addl	%r8d, -48(%rsp)
	incl	%r14d
	addl	%ecx, -52(%rsp)
	jmp	.L3
.L15:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z10im2col_cpuPPPfS0_iiiiiii, .-_Z10im2col_cpuPPPfS0_iiiiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Not Equal!!!"
.LC3:
	.string	"Oh Nice Equal!!!"
	.text
	.globl	_Z5checkPPfS0_iiiiiii
	.type	_Z5checkPPfS0_iiiiiii, @function
_Z5checkPPfS0_iiiiiii:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rcx
	.cfi_def_cfa_offset 16
	imull	%r9d, %edx
	movl	32(%rsp), %r11d
	movq	%rdi, %r8
	imull	24(%rsp), %r11d
	movsd	.LC1(%rip), %xmm2
	movq	%rsi, %r10
	xorl	%edi, %edi
	imull	16(%rsp), %edx
	xorl	%esi, %esi
	movss	.LC0(%rip), %xmm1
.L18:
	cmpl	%r11d, %edi
	jge	.L22
	movslq	%esi, %rax
	xorl	%ecx, %ecx
	salq	$2, %rax
.L23:
	cmpl	%edx, %ecx
	jge	.L27
	movss	(%r8,%rax), %xmm0
	subss	(%r10,%rax), %xmm0
	addq	$4, %rax
	andps	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm2, %xmm0
	jbe	.L25
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	xorl	%edi, %edi
	call	exit@PLT
.L25:
	incl	%ecx
	jmp	.L23
.L27:
	incl	%edi
	addl	%edx, %esi
	jmp	.L18
.L22:
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movb	$1, %al
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z5checkPPfS0_iiiiiii, .-_Z5checkPPfS0_iiiiiii
	.globl	_Z37__device_stub__Z6im2colPPPfS0_iiiiiiiPPPfS0_iiiiiii
	.type	_Z37__device_stub__Z6im2colPPPfS0_iiiiiiiPPPfS0_iiiiiii, @function
_Z37__device_stub__Z6im2colPPPfS0_iiiiiiiPPPfS0_iiiiiii:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	40(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z6im2colPPPfS0_iiiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 208
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L28:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z37__device_stub__Z6im2colPPPfS0_iiiiiiiPPPfS0_iiiiiii, .-_Z37__device_stub__Z6im2colPPPfS0_iiiiiiiPPPfS0_iiiiiii
	.globl	_Z6im2colPPPfS0_iiiiiii
	.type	_Z6im2colPPPfS0_iiiiiii, @function
_Z6im2colPPPfS0_iiiiiii:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z6im2colPPPfS0_iiiiiiiPPPfS0_iiiiiii
	.cfi_endproc
.LFE3663:
	.size	_Z6im2colPPPfS0_iiiiiii, .-_Z6im2colPPPfS0_iiiiiii
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$524288, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$4428288, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$4428288, %edi
	movq	%rax, %r12
	call	malloc@PLT
	xorl	%esi, %esi
	movq	%rsp, %rdi
	movq	%rsi, (%rsp)
	movq	%rax, %rbp
	movq	%rsi, 8(%rsp)
	movl	$524288, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$4428288, %esi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	xorl	%edi, %edi
.L34:
	movq	%rsi, %rcx
	xorl	%edx, %edx
.L38:
	xorl	%eax, %eax
.L35:
	leal	(%rdx,%rax), %r8d
	cvtsi2ssl	%r8d, %xmm0
	movss	%xmm0, (%rcx,%rax,4)
	incq	%rax
	cmpq	$64, %rax
	jne	.L35
	incl	%edx
	addq	$256, %rcx
	cmpl	$64, %edx
	jne	.L38
	addl	$4096, %edi
	addq	$16384, %rsi
	cmpl	$131072, %edi
	jne	.L34
	pushq	%rcx
	.cfi_def_cfa_offset 88
	movl	$3, %r9d
	movl	$64, %r8d
	movq	%rbp, %rsi
	pushq	$62
	.cfi_def_cfa_offset 96
	movl	$64, %ecx
	movl	$32, %edx
	movq	%rbx, %rdi
	pushq	$62
	.cfi_def_cfa_offset 104
	pushq	$3
	.cfi_def_cfa_offset 112
	call	_Z10im2col_cpuPPPfS0_iiiiiii
	movq	32(%rsp), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$524288, %edx
	call	cudaMemcpy@PLT
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967417, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	pushq	%rdx
	.cfi_def_cfa_offset 88
	movl	$3, %r9d
	movl	$64, %r8d
	movl	$64, %ecx
	pushq	$62
	.cfi_def_cfa_offset 96
	movl	$32, %edx
	pushq	$62
	.cfi_def_cfa_offset 104
	pushq	$3
	.cfi_def_cfa_offset 112
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z37__device_stub__Z6im2colPPPfS0_iiiiiiiPPPfS0_iiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 80
.L39:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$4428288, %edx
	call	cudaMemcpy@PLT
	movl	$64, %ecx
	movq	%rbp, %rsi
	movq	%r12, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 88
	movl	$3, %r9d
	movl	$64, %r8d
	movl	$32, %edx
	pushq	$62
	.cfi_def_cfa_offset 96
	pushq	$62
	.cfi_def_cfa_offset 104
	pushq	$3
	.cfi_def_cfa_offset 112
	call	_Z5checkPPfS0_iiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z6im2colPPPfS0_iiiiiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6im2colPPPfS0_iiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC0:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	-350469331
	.long	1058682594
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <iostream>
#include <stdio.h>
#include <hip/hip_runtime.h>
#include <time.h>
using namespace std;
#define eps 1e-4

__global__ void im2col(float ***img, float **img_flat, int c1, int n, int m, int kw, int kh, int out_n, int out_m){
    //each thread process a [c1 * kw * kh] flatten op
    int tx = threadIdx.x;
    int bx = blockIdx.x;
    int idx = bx * blockDim.x + tx;

    if(idx < out_n * out_m){
        int i = idx / out_m;
        int j = idx % out_m;
        int col = c1 * kw * kh;
        //printf("%d %d\n", i, j);
        
        for(int c = 0; c < c1; c++){
            for(int p = 0; p < kw; p++){
                for(int q = 0; q < kh; q++){
                    int x = idx;            
                    int y = c * kw * kh + p * kh + q;
                    int newidx = x * col + y;
                    
                    int oldx = c;
                    int oldy = p + i;
                    int oldz = q + j;
                    int oldidx = oldx * n * m + oldy * m + oldz;
                    *((float*)img_flat + newidx) = *((float*)img + oldidx);
                    //printf("%d %d %f %f\n", newidx, oldidx, *((float*)img_flat + newidx), *((float*)img + oldidx));
                }
            }
        }
    }
}


void im2col_cpu(float ***img, float **img_flat, int c1, int n, int m, int kw, int kh, int out_n, int out_m){
    //img: [C1, N, M]
    //kernel: [C2, C1, kw, kh]
    //return: img_flat[out_n*out_m, C1*kw*kh]

    int row = out_n * out_m;
    int col = c1 * kw * kh;

    for(int i = 0; i < out_n; i++){
        for(int j = 0; j < out_m; j++){
            for(int c = 0; c < c1; c++){
                for(int p = 0; p < kw; p++){
                    for(int q = 0; q < kh; q++){
                        //printf("%d %d %d %d %d\n", i * out_m + j, c * kw + (p * kh + q), c, p+i, q+j);
                        //img_flat[i * out_m + j][c * kw * kh + (p * kh + q)] = img[c][p+i][q+j];
                        int x = i * out_m + j; 
                        int y = c * kw * kh + (p * kh + q);
                        int idx = x * col + y;

                        int oldx = c;
                        int oldy = p + i;
                        int oldz = q + j;
                        int oldidx = oldx * n * m + (oldy * m + oldz);
                        *((float*)img_flat + idx) = *((float*)img + oldidx);
                    }
                }
            }
        }
    }
}

bool check(float **img_flat, float **img_flat_cpu, int c1, int n, int m, int kw, int kh, int out_n, int out_m){
    int row = out_n * out_m;
    int col = c1 * kw * kh;
    for(int i = 0; i < row; i++){
        for(int j = 0; j < col; j++){
            int idx = i * col + j;
            float x = *((float*)img_flat + idx);
            float y = *((float*)img_flat_cpu + idx);
            //cout<<x<<' '<<y<<endl;
            if(abs(x - y) > eps){
                cout<<"Not Equal!!!"<<endl;
                exit(0);
            }
        }
    }
    cout<<"Oh Nice Equal!!!"<<endl;
    return true;
}

int main(){
    //feature map size[C1, N, M]
    int in_channel = 32;
    int n = 64;
    int m = 64;
    size_t size = sizeof(float);

    //kernel size
    int kw = 3;
    int kh = 3;

    //output featuremap size[out_n * out_m, C1 * kw * kh]
    int out_n = n - kw + 1;
    int out_m = m - kh + 1;
    int row = out_n * out_m;
    int col = in_channel * kw * kh;

    // sizes
    int img_size = in_channel * n * m * size;
    int imgflat_size = out_n * out_m * in_channel * kw * kh * size;


    float ***img = (float***)malloc(img_size);
    float **img_flat = (float**)malloc(imgflat_size);
    float **img_flat_cpu = (float**)malloc(imgflat_size);

    float ***img_d = NULL;
    float **img_flat_d = NULL;

    hipMalloc((void**)&img_d, img_size);
    hipMalloc((void**)&img_flat_d, imgflat_size);

    for(int c = 0; c < in_channel; c++){
        for(int i = 0; i < n; i++){
            for(int j = 0; j < m; j++){
                int idx = c * n * m + i * m + j;
                *((float*)img + idx) = (i + j) % 255;
            }
        }
    }
    
    im2col_cpu(img, img_flat_cpu, in_channel, n, m, kw, kh, out_n, out_m);
    // for(int i = 0; i < row; i++){
    //     for(int j = 0; j < col; j++){
    //         int idx = i * col + j;
    //         cout<<*((float*)img_flat_cpu + idx)<<' ' ;
    //     }
    //     cout<<endl;
    // }

    hipMemcpy(img_d, img, img_size, hipMemcpyHostToDevice);
 
    
    dim3 threadPerBlock(32);
    dim3 BlockPerGrid((out_n * out_m + threadPerBlock.x - 1) / threadPerBlock.x);

    im2col<<<BlockPerGrid, threadPerBlock>>>(img_d, img_flat_d, in_channel, n, m, kw, kh, out_n, out_m);

    hipDeviceSynchronize();
    hipMemcpy(img_flat, img_flat_d, imgflat_size, hipMemcpyDeviceToHost);

    // cout<<endl;
    // for(int i = 0; i < row; i++){
    //     for(int j = 0; j < col; j++){
    //         int idx = i * col + j;
    //         cout<<*((float*)img_flat + idx)<<' ' ;
    //     }
    //     cout<<endl;
    // }





    check(img_flat, img_flat_cpu, in_channel, n, m, kw, kh, out_n, out_m);
    
    free(img);
    free(img_flat);
    free(img_flat_cpu);

    hipFree(img_d);
    hipFree(img_flat_d);
    //float img[2][2][2]={1, 2, 3, 4, 5, 6, 7, 8};
    //float result[4][2] = {0};
    //float kernel[1][1][1];
    //im2col_cpu((float***)img, (float**)result, 2, 2, 2, 1, 1, 2, 2);
    // for(int i = 0; i < 4; i++){
    //     for(int j = 0; j < 2; j++){
    //         cout<<result[i][j]<<' ';
    //     }
    //     cout<<endl;
    // }


    return 0;
}
	.text
	.file	"im2col.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__im2colPPPfS0_iiiiiii # -- Begin function _Z21__device_stub__im2colPPPfS0_iiiiiii
	.type	_Z21__device_stub__im2colPPPfS0_iiiiiii,@function
_Z21__device_stub__im2colPPPfS0_iiiiiii: # @_Z21__device_stub__im2colPPPfS0_iiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6im2colPPPfS0_iiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__im2colPPPfS0_iiiiiii, .Lfunc_end0-_Z21__device_stub__im2colPPPfS0_iiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z10im2col_cpuPPPfS0_iiiiiii    # -- Begin function _Z10im2col_cpuPPPfS0_iiiiiii
	.type	_Z10im2col_cpuPPPfS0_iiiiiii,@function
_Z10im2col_cpuPPPfS0_iiiiiii:           # @_Z10im2col_cpuPPPfS0_iiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, -36(%rsp)                 # 4-byte Spill
	movl	%edx, -32(%rsp)                 # 4-byte Spill
	cmpl	$0, 64(%rsp)
	jle	.LBB1_13
# %bb.1:                                # %.preheader60.lr.ph
	movl	56(%rsp), %r11d
	movl	%r11d, %ebp
	movl	-36(%rsp), %eax                 # 4-byte Reload
	imull	%r8d, %eax
	movl	%eax, -36(%rsp)                 # 4-byte Spill
	movl	%r11d, %eax
	imull	%r9d, %eax
	movl	%eax, -4(%rsp)                  # 4-byte Spill
	imull	-32(%rsp), %eax                 # 4-byte Folded Reload
	movl	%eax, -12(%rsp)                 # 4-byte Spill
	imull	72(%rsp), %eax
	movl	%eax, -20(%rsp)                 # 4-byte Spill
	movl	$0, -44(%rsp)                   # 4-byte Folded Spill
	movl	$0, -28(%rsp)                   # 4-byte Folded Spill
	xorl	%ecx, %ecx
.LBB1_2:                                # %.preheader60
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
                                        #       Child Loop BB1_6 Depth 3
                                        #         Child Loop BB1_8 Depth 4
                                        #           Child Loop BB1_14 Depth 5
	movl	%ecx, -16(%rsp)                 # 4-byte Spill
	cmpl	$0, 72(%rsp)
	jle	.LBB1_12
# %bb.3:                                # %.preheader59.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	xorl	%eax, %eax
	movl	-44(%rsp), %ecx                 # 4-byte Reload
	movl	%ecx, -40(%rsp)                 # 4-byte Spill
	movl	-28(%rsp), %ecx                 # 4-byte Reload
	movl	%ecx, -24(%rsp)                 # 4-byte Spill
.LBB1_4:                                # %.preheader59
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_6 Depth 3
                                        #         Child Loop BB1_8 Depth 4
                                        #           Child Loop BB1_14 Depth 5
	movl	%eax, -8(%rsp)                  # 4-byte Spill
	cmpl	$0, -32(%rsp)                   # 4-byte Folded Reload
	jle	.LBB1_11
# %bb.5:                                # %.preheader58.lr.ph
                                        #   in Loop: Header=BB1_4 Depth=2
	xorl	%eax, %eax
	movl	-40(%rsp), %r14d                # 4-byte Reload
	movl	-24(%rsp), %r15d                # 4-byte Reload
.LBB1_6:                                # %.preheader58
                                        #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_4 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB1_8 Depth 4
                                        #           Child Loop BB1_14 Depth 5
	testl	%r9d, %r9d
	jle	.LBB1_10
# %bb.7:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB1_6 Depth=3
	xorl	%r10d, %r10d
	movl	%r14d, %r12d
	movl	%r15d, %r13d
.LBB1_8:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_4 Depth=2
                                        #       Parent Loop BB1_6 Depth=3
                                        # =>      This Loop Header: Depth=4
                                        #           Child Loop BB1_14 Depth 5
	movq	%rbp, %rbx
	movl	%r12d, %ecx
	movl	%r13d, %edx
	testl	%r11d, %r11d
	jle	.LBB1_9
.LBB1_14:                               #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_4 Depth=2
                                        #       Parent Loop BB1_6 Depth=3
                                        #         Parent Loop BB1_8 Depth=4
                                        # =>        This Inner Loop Header: Depth=5
	movslq	%edx, %rdx
	movss	(%rdi,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movslq	%ecx, %rcx
	movss	%xmm0, (%rsi,%rcx,4)
	incl	%edx
	incl	%ecx
	decq	%rbx
	jne	.LBB1_14
.LBB1_9:                                # %._crit_edge
                                        #   in Loop: Header=BB1_8 Depth=4
	incl	%r10d
	addl	%r8d, %r13d
	addl	%r11d, %r12d
	cmpl	%r9d, %r10d
	jne	.LBB1_8
.LBB1_10:                               # %._crit_edge63
                                        #   in Loop: Header=BB1_6 Depth=3
	incl	%eax
	addl	-36(%rsp), %r15d                # 4-byte Folded Reload
	addl	-4(%rsp), %r14d                 # 4-byte Folded Reload
	cmpl	-32(%rsp), %eax                 # 4-byte Folded Reload
	jne	.LBB1_6
.LBB1_11:                               # %._crit_edge65
                                        #   in Loop: Header=BB1_4 Depth=2
	movl	-8(%rsp), %eax                  # 4-byte Reload
	incl	%eax
	incl	-24(%rsp)                       # 4-byte Folded Spill
	movl	-40(%rsp), %ecx                 # 4-byte Reload
	addl	-12(%rsp), %ecx                 # 4-byte Folded Reload
	movl	%ecx, -40(%rsp)                 # 4-byte Spill
	cmpl	72(%rsp), %eax
	jne	.LBB1_4
.LBB1_12:                               # %._crit_edge67
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	-16(%rsp), %ecx                 # 4-byte Reload
	incl	%ecx
	addl	%r8d, -28(%rsp)                 # 4-byte Folded Spill
	movl	-44(%rsp), %eax                 # 4-byte Reload
	addl	-20(%rsp), %eax                 # 4-byte Folded Reload
	movl	%eax, -44(%rsp)                 # 4-byte Spill
	cmpl	64(%rsp), %ecx
	jne	.LBB1_2
.LBB1_13:                               # %._crit_edge69
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z10im2col_cpuPPPfS0_iiiiiii, .Lfunc_end1-_Z10im2col_cpuPPPfS0_iiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z5checkPPfS0_iiiiiii
.LCPI2_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_1:
	.quad	0x3f1a36e2eb1c432d              # double 1.0E-4
	.text
	.globl	_Z5checkPPfS0_iiiiiii
	.type	_Z5checkPPfS0_iiiiiii,@function
_Z5checkPPfS0_iiiiiii:                  # @_Z5checkPPfS0_iiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	32(%rsp), %eax
	imull	24(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB2_7
# %bb.1:                                # %.preheader.lr.ph
	imull	%edx, %r9d
	imull	16(%rsp), %r9d
	movl	%eax, %eax
	movl	%r9d, %ecx
	xorl	%edx, %edx
	movaps	.LCPI2_0(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero
	xorl	%r8d, %r8d
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%r9d, %r9d
	jle	.LBB2_6
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%edx, %r11d
	leaq	(%rsi,%r11,4), %r10
	leaq	(%rdi,%r11,4), %r11
	xorl	%ebx, %ebx
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r11,%rbx,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	subss	(%r10,%rbx,4), %xmm2
	andps	%xmm0, %xmm2
	cvtss2sd	%xmm2, %xmm2
	ucomisd	%xmm1, %xmm2
	ja	.LBB2_8
# %bb.5:                                #   in Loop: Header=BB2_4 Depth=2
	incq	%rbx
	cmpq	%rbx, %rcx
	jne	.LBB2_4
.LBB2_6:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r8
	addl	%r9d, %edx
	cmpq	%rax, %r8
	jne	.LBB2_2
.LBB2_7:                                # %._crit_edge23
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movb	$1, %al
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB2_8:
	.cfi_def_cfa_offset 16
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	xorl	%edi, %edi
	callq	exit
.Lfunc_end2:
	.size	_Z5checkPPfS0_iiiiiii, .Lfunc_end2-_Z5checkPPfS0_iiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$524288, %edi                   # imm = 0x80000
	callq	malloc
	movq	%rax, %rbx
	movl	$4428288, %edi                  # imm = 0x439200
	callq	malloc
	movq	%rax, %r14
	movl	$4428288, %edi                  # imm = 0x439200
	callq	malloc
	movq	%rax, %r15
	xorl	%r13d, %r13d
	leaq	8(%rsp), %rdi
	movq	%r13, (%rdi)
	movq	%rsp, %r12
	movq	%r13, (%r12)
	movl	$524288, %esi                   # imm = 0x80000
	callq	hipMalloc
	movl	$4428288, %esi                  # imm = 0x439200
	movq	%r12, %rdi
	callq	hipMalloc
	movq	%rbx, %rax
.LBB3_1:                                # %.preheader87
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
                                        #       Child Loop BB3_3 Depth 3
	movq	%rax, %rcx
	xorl	%edx, %edx
.LBB3_2:                                # %.preheader
                                        #   Parent Loop BB3_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_3 Depth 3
	xorl	%esi, %esi
.LBB3_3:                                #   Parent Loop BB3_1 Depth=1
                                        #     Parent Loop BB3_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	leal	(%rdx,%rsi), %edi
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edi, %xmm0
	movss	%xmm0, (%rcx,%rsi,4)
	incq	%rsi
	cmpq	$64, %rsi
	jne	.LBB3_3
# %bb.4:                                #   in Loop: Header=BB3_2 Depth=2
	incq	%rdx
	addq	$256, %rcx                      # imm = 0x100
	cmpq	$64, %rdx
	jne	.LBB3_2
# %bb.5:                                #   in Loop: Header=BB3_1 Depth=1
	incq	%r13
	addq	$16384, %rax                    # imm = 0x4000
	cmpq	$32, %r13
	jne	.LBB3_1
# %bb.6:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$62, %r12d
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movl	$32, %edx
	movl	$64, %ecx
	movl	$64, %r8d
	movl	$3, %r9d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	$3
	.cfi_adjust_cfa_offset 8
	callq	_Z10im2col_cpuPPPfS0_iiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movq	8(%rsp), %rdi
	movl	$524288, %edx                   # imm = 0x80000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967328, %rdx               # imm = 0x100000020
	leaq	89(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_8
# %bb.7:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$32, %edx
	movl	$64, %ecx
	movl	$64, %r8d
	movl	$3, %r9d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	$3
	.cfi_adjust_cfa_offset 8
	callq	_Z21__device_stub__im2colPPPfS0_iiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB3_8:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rsi
	movl	$4428288, %edx                  # imm = 0x439200
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	$32, %edx
	movl	$3, %r9d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	$3
	.cfi_adjust_cfa_offset 8
	callq	_Z5checkPPfS0_iiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6im2colPPPfS0_iiiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6im2colPPPfS0_iiiiiii,@object # @_Z6im2colPPPfS0_iiiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z6im2colPPPfS0_iiiiiii
	.p2align	3, 0x0
_Z6im2colPPPfS0_iiiiiii:
	.quad	_Z21__device_stub__im2colPPPfS0_iiiiiii
	.size	_Z6im2colPPPfS0_iiiiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Not Equal!!!"
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Oh Nice Equal!!!"
	.size	.L.str.1, 17

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6im2colPPPfS0_iiiiiii"
	.size	.L__unnamed_1, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__im2colPPPfS0_iiiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6im2colPPPfS0_iiiiiii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6im2colPPPfS0_iiiiiii ; -- Begin function _Z6im2colPPPfS0_iiiiiii
	.globl	_Z6im2colPPPfS0_iiiiiii
	.p2align	8
	.type	_Z6im2colPPPfS0_iiiiiii,@function
_Z6im2colPPPfS0_iiiiiii:                ; @_Z6im2colPPPfS0_iiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mul_i32 s2, s6, s5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_9
; %bb.1:
	s_load_b128 s[8:11], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s8, 1
	s_cbranch_scc1 .LBB0_9
; %bb.2:                                ; %.preheader54.lr.ph
	s_ashr_i32 s2, s6, 31
	v_ashrrev_i32_e32 v3, 31, v2
	s_add_i32 s3, s6, s2
	s_mul_i32 s9, s10, s9
	s_xor_b32 s3, s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v2, v3
	v_cvt_f32_u32_e32 v0, s3
	s_sub_i32 s5, 0, s3
	s_cmp_gt_i32 s11, 0
	v_xor_b32_e32 v4, v4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_rcp_iflag_f32_e32 v0, v0
	v_xor_b32_e32 v3, s2, v3
	s_cselect_b32 s7, -1, 0
	s_cmp_gt_i32 s4, 0
	s_cselect_b32 s12, -1, 0
	s_sub_i32 s6, s10, s6
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v1, s5, v0
	s_mul_i32 s5, s4, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mul_i32 s13, s5, s8
	v_mul_hi_u32 v1, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v1
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v0, s3
	v_sub_nc_u32_e32 v1, v4, v1
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s3, v1
	v_cmp_le_u32_e32 vcc_lo, s3, v1
	v_dual_cndmask_b32 v1, v1, v5 :: v_dual_cndmask_b32 v0, v0, v4
	v_mul_lo_u32 v5, s13, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s3, v1
	v_add_nc_u32_e32 v4, 1, v0
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	v_xor_b32_e32 v0, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v0, v3
	v_mad_u64_u32 v[0:1], null, v3, s6, v[2:3]
	s_mov_b32 s6, 0
.LBB0_3:                                ; %.preheader54
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;       Child Loop BB0_6 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB0_8
; %bb.4:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v6, v0 :: v_dual_mov_b32 v7, v5
	s_mov_b32 s13, 0
.LBB0_5:                                ; %.preheader
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_6 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v1, v6
	v_mov_b32_e32 v3, v7
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_mov_b32 s14, s4
	s_cbranch_vccnz .LBB0_7
.LBB0_6:                                ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v4, 31, v3
	s_add_i32 s14, s14, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s14, 0
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	v_add_nc_u32_e32 v1, 1, v1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	global_load_b32 v2, v[8:9], off
	v_lshlrev_b64 v[8:9], 2, v[3:4]
	v_add_nc_u32_e32 v3, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[8:9], v2, off
	s_cbranch_scc0 .LBB0_6
.LBB0_7:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_5 Depth=2
	v_add_nc_u32_e32 v7, s4, v7
	v_add_nc_u32_e32 v6, s10, v6
	s_add_i32 s13, s13, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s13, s11
	s_cbranch_scc0 .LBB0_5
.LBB0_8:                                ; %._crit_edge57
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_add_nc_u32_e32 v5, s5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v0, s9, v0
	s_add_i32 s6, s6, 1
	s_cmp_eq_u32 s6, s8
	s_cbranch_scc0 .LBB0_3
.LBB0_9:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6im2colPPPfS0_iiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6im2colPPPfS0_iiiiiii, .Lfunc_end0-_Z6im2colPPPfS0_iiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 532
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6im2colPPPfS0_iiiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6im2colPPPfS0_iiiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
