#include "includes.h"
__global__ void cudaSNearestNeighborKernel(const float* input, size_t inputSizeX, size_t inputSizeY, float* output, size_t outputSizeX, size_t outputSizeY, size_t nbChannels, size_t batchSize)
{
const size_t inputOffset = (blockIdx.z*blockDim.z + threadIdx.z) * (nbChannels*inputSizeY*inputSizeX);
const size_t outputOffset = (blockIdx.z*blockDim.z + threadIdx.z) * (nbChannels*outputSizeY*outputSizeX);

const float multy = ((float) inputSizeY)/((float) outputSizeY);
const float multx = ((float) inputSizeX)/((float) outputSizeX);

for(size_t channel = blockIdx.x; channel < nbChannels; channel += gridDim.x) {
for(size_t oy = threadIdx.y; oy < outputSizeY; oy += blockDim.y) {
for(size_t ox = threadIdx.x; ox < outputSizeX; ox += blockDim.x) {
const size_t iy = (size_t) oy*multy;
const size_t ix = (size_t) ox*multx;


output[outputOffset +
channel*outputSizeY*outputSizeX +
oy*outputSizeX +
ox] = input[inputOffset +
channel*inputSizeY*inputSizeX +
iy*inputSizeX +
ix];

}
}
}
}
	.file	"tmpxft_003442c3_00000000-6_cudaSNearestNeighborKernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z55__device_stub__Z26cudaSNearestNeighborKernelPKfmmPfmmmmPKfmmPfmmmm
	.type	_Z55__device_stub__Z26cudaSNearestNeighborKernelPKfmmPfmmmmPKfmmPfmmmm, @function
_Z55__device_stub__Z26cudaSNearestNeighborKernelPKfmmPfmmmmPKfmmPfmmmm:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z26cudaSNearestNeighborKernelPKfmmPfmmmm(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z55__device_stub__Z26cudaSNearestNeighborKernelPKfmmPfmmmmPKfmmPfmmmm, .-_Z55__device_stub__Z26cudaSNearestNeighborKernelPKfmmPfmmmmPKfmmPfmmmm
	.globl	_Z26cudaSNearestNeighborKernelPKfmmPfmmmm
	.type	_Z26cudaSNearestNeighborKernelPKfmmPfmmmm, @function
_Z26cudaSNearestNeighborKernelPKfmmPfmmmm:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z26cudaSNearestNeighborKernelPKfmmPfmmmmPKfmmPfmmmm
	.cfi_endproc
.LFE2033:
	.size	_Z26cudaSNearestNeighborKernelPKfmmPfmmmm, .-_Z26cudaSNearestNeighborKernelPKfmmPfmmmm
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z26cudaSNearestNeighborKernelPKfmmPfmmmm"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z26cudaSNearestNeighborKernelPKfmmPfmmmm(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void cudaSNearestNeighborKernel(const float* input, size_t inputSizeX, size_t inputSizeY, float* output, size_t outputSizeX, size_t outputSizeY, size_t nbChannels, size_t batchSize)
{
const size_t inputOffset = (blockIdx.z*blockDim.z + threadIdx.z) * (nbChannels*inputSizeY*inputSizeX);
const size_t outputOffset = (blockIdx.z*blockDim.z + threadIdx.z) * (nbChannels*outputSizeY*outputSizeX);

const float multy = ((float) inputSizeY)/((float) outputSizeY);
const float multx = ((float) inputSizeX)/((float) outputSizeX);

for(size_t channel = blockIdx.x; channel < nbChannels; channel += gridDim.x) {
for(size_t oy = threadIdx.y; oy < outputSizeY; oy += blockDim.y) {
for(size_t ox = threadIdx.x; ox < outputSizeX; ox += blockDim.x) {
const size_t iy = (size_t) oy*multy;
const size_t ix = (size_t) ox*multx;


output[outputOffset +
channel*outputSizeY*outputSizeX +
oy*outputSizeX +
ox] = input[inputOffset +
channel*inputSizeY*inputSizeX +
iy*inputSizeX +
ix];

}
}
}
}
	.text
	.file	"cudaSNearestNeighborKernel.hip"
	.globl	_Z41__device_stub__cudaSNearestNeighborKernelPKfmmPfmmmm # -- Begin function _Z41__device_stub__cudaSNearestNeighborKernelPKfmmPfmmmm
	.type	_Z41__device_stub__cudaSNearestNeighborKernelPKfmmPfmmmm,@function
_Z41__device_stub__cudaSNearestNeighborKernelPKfmmPfmmmm: # @_Z41__device_stub__cudaSNearestNeighborKernelPKfmmPfmmmm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z26cudaSNearestNeighborKernelPKfmmPfmmmm, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z41__device_stub__cudaSNearestNeighborKernelPKfmmPfmmmm, .Lfunc_end0-_Z41__device_stub__cudaSNearestNeighborKernelPKfmmPfmmmm
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z26cudaSNearestNeighborKernelPKfmmPfmmmm, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z26cudaSNearestNeighborKernelPKfmmPfmmmm,@object # @_Z26cudaSNearestNeighborKernelPKfmmPfmmmm
	.section	.rodata,"a",@progbits
	.globl	_Z26cudaSNearestNeighborKernelPKfmmPfmmmm
	.p2align	3, 0x0
_Z26cudaSNearestNeighborKernelPKfmmPfmmmm:
	.quad	_Z41__device_stub__cudaSNearestNeighborKernelPKfmmPfmmmm
	.size	_Z26cudaSNearestNeighborKernelPKfmmPfmmmm, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z26cudaSNearestNeighborKernelPKfmmPfmmmm"
	.size	.L__unnamed_1, 42

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z41__device_stub__cudaSNearestNeighborKernelPKfmmPfmmmm
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z26cudaSNearestNeighborKernelPKfmmPfmmmm
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z26cudaSNearestNeighborKernelPKfmmPfmmmm ; -- Begin function _Z26cudaSNearestNeighborKernelPKfmmPfmmmm
	.globl	_Z26cudaSNearestNeighborKernelPKfmmPfmmmm
	.p2align	8
	.type	_Z26cudaSNearestNeighborKernelPKfmmPfmmmm,@function
_Z26cudaSNearestNeighborKernelPKfmmPfmmmm: ; @_Z26cudaSNearestNeighborKernelPKfmmPfmmmm
; %bb.0:
	s_load_b128 s[16:19], s[0:1], 0x30
	s_mov_b32 s2, s15
	s_mov_b32 s15, 0
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_u64_e64 s3, s[14:15], s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_9
; %bb.1:                                ; %.lr.ph54
	s_clause 0x3
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b128 s[20:23], s[0:1], 0x20
	s_load_b32 s3, s[0:1], 0x40
	s_load_b32 s28, s[0:1], 0x50
	s_waitcnt lgkmcnt(0)
	s_clz_i32_u32 s12, s9
	s_clz_i32_u32 s13, s23
	s_clz_i32_u32 s18, s7
	s_clz_i32_u32 s19, s21
	s_min_u32 s24, s12, 32
	s_min_u32 s25, s13, 32
	s_min_u32 s26, s18, 32
	s_min_u32 s29, s19, 32
	s_lshl_b64 s[12:13], s[8:9], s24
	s_lshl_b64 s[18:19], s[22:23], s25
	s_sub_i32 s30, 32, s24
	s_sub_i32 s31, 32, s25
	s_lshl_b64 s[24:25], s[6:7], s26
	s_sub_i32 s33, 32, s26
	s_lshl_b64 s[26:27], s[20:21], s29
	s_min_u32 s12, s12, 1
	s_min_u32 s18, s18, 1
	s_min_u32 s24, s24, 1
	s_min_u32 s26, s26, 1
	s_or_b32 s12, s13, s12
	s_or_b32 s13, s19, s18
	s_or_b32 s18, s25, s24
	s_or_b32 s19, s27, s26
	v_cvt_f32_u32_e32 v1, s12
	v_cvt_f32_u32_e32 v2, s13
	v_cvt_f32_u32_e32 v3, s18
	v_cvt_f32_u32_e32 v4, s19
	s_sub_i32 s12, 32, s29
	v_ldexp_f32 v11, v1, s30
	v_ldexp_f32 v12, v2, s31
	v_ldexp_f32 v13, v3, s33
	v_ldexp_f32 v14, v4, s12
	v_bfe_u32 v1, v0, 20, 10
	s_add_u32 s12, s0, 64
	v_div_scale_f32 v6, null, v12, v12, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v7, null, v14, v14, v13
	s_addc_u32 s13, s1, 0
	v_rcp_f32_e32 v8, v6
	s_and_b32 s0, s28, 0xffff
	s_delay_alu instid0(VALU_DEP_1)
	v_rcp_f32_e32 v9, v7
	v_mad_u64_u32 v[3:4], null, s2, s0, v[1:2]
	v_div_scale_f32 v10, vcc_lo, v11, v12, v11
	v_div_scale_f32 v15, s0, v13, v14, v13
	s_mul_i32 s18, s8, s6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v6, v8, 1.0
	v_mad_u64_u32 v[1:2], null, s16, v3, 0
	v_fma_f32 v5, -v7, v9, 1.0
	s_mul_i32 s19, s8, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v8, v4, v8
	s_mul_hi_u32 s24, s8, s6
	s_mul_i32 s2, s18, s17
	v_fmac_f32_e32 v9, v5, v9
	v_mad_u64_u32 v[4:5], null, s17, v3, v[2:3]
	v_mul_f32_e32 v16, v10, v8
	s_mul_hi_u32 s8, s18, s16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v17, v15, v9
	s_add_i32 s2, s8, s2
	s_mul_i32 s8, s18, s16
	v_fma_f32 v18, -v6, v16, v10
	v_mov_b32_e32 v2, v4
	v_fma_f32 v19, -v7, v17, v15
	s_mul_i32 s1, s9, s6
	s_add_i32 s9, s24, s19
	v_fmac_f32_e32 v16, v18, v8
	s_add_i32 s19, s9, s1
	v_fmac_f32_e32 v17, v19, v9
	s_mul_i32 s1, s19, s16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v10, -v6, v16, v10
	v_mad_u64_u32 v[5:6], null, s8, v3, 0
	v_fma_f32 v7, -v7, v17, v15
	s_add_i32 s2, s2, s1
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fmas_f32 v15, v10, v8, v16
	s_mov_b32 vcc_lo, s0
	s_lshl_b64 s[0:1], s[14:15], 2
	v_div_fmas_f32 v16, v7, v9, v17
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_bfe_u32 v1, v0, 10, 10
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v4, v6
	v_div_fixup_f32 v15, v15, v12, v11
	s_mul_hi_u32 s8, s22, s20
	v_add_co_u32 v17, vcc_lo, v7, s0
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v8, vcc_lo
	v_dual_mov_b32 v7, v2 :: v_dual_lshlrev_b32 v6, 2, v1
	v_mad_u64_u32 v[8:9], null, s2, v3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v18, s22, v10
	v_mul_lo_u32 v19, s23, v17
	v_mad_u64_u32 v[9:10], null, s22, v17, v[6:7]
	v_and_b32_e32 v3, 0x3ff, v0
	v_div_fixup_f32 v0, v16, v14, v13
	v_mov_b32_e32 v6, v8
	v_mov_b32_e32 v8, v2
	s_mul_i32 s2, s22, s21
	v_lshlrev_b32_e32 v7, 2, v3
	v_add3_u32 v10, v19, v10, v18
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_mul_lo_u32 v13, s21, v9
	v_mov_b32_e32 v4, v2
	s_add_i32 s2, s8, s2
	v_mul_lo_u32 v12, s20, v10
	v_mad_u64_u32 v[10:11], null, s20, v9, v[7:8]
	v_add_co_u32 v16, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v6, vcc_lo
	s_mul_i32 s4, s23, s20
	v_cmp_gt_u64_e64 s0, s[22:23], v[1:2]
	s_delay_alu instid0(VALU_DEP_4)
	v_add3_u32 v6, v13, v11, v12
	s_add_i32 s2, s2, s4
	s_mul_i32 s4, s22, s20
	v_add_co_u32 v5, vcc_lo, s10, v10
	v_cmp_gt_u64_e64 s1, s[20:21], v[3:4]
	s_mul_i32 s2, s2, s3
	s_mul_hi_u32 s5, s4, s3
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	s_add_i32 s5, s5, s2
	s_mul_i32 s4, s4, s3
	s_lshl_b64 s[8:9], s[20:21], 2
	s_lshl_b64 s[4:5], s[4:5], 2
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_6 Depth 3
	s_and_saveexec_b32 s10, s0
	s_cbranch_execz .LBB0_8
; %bb.3:                                ; %.lr.ph50
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_load_b32 s2, s[12:13], 0xc
	s_mul_i32 s11, s18, s15
	s_mul_hi_u32 s25, s18, s14
	s_mul_i32 s26, s19, s14
	s_add_i32 s11, s25, s11
	s_mul_i32 s24, s18, s14
	s_add_i32 s25, s11, s26
	v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
	s_lshl_b64 s[24:25], s[24:25], 2
	v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v9, v1
	v_add_co_u32 v18, vcc_lo, v16, s24
	v_add_co_ci_u32_e32 v19, vcc_lo, s25, v17, vcc_lo
	s_mov_b32 s26, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s11, s2, 16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s2, s9, s11
	s_mul_hi_u32 s25, s8, s11
	s_mul_i32 s24, s8, s11
	s_add_i32 s25, s25, s2
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_6 Depth 3
	s_and_saveexec_b32 s27, s1
	s_cbranch_execz .LBB0_7
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_clz_i32_u32_e32 v11, v10
	s_load_b32 s2, s[12:13], 0xc
	s_mov_b32 s30, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v13, 32, v11
	v_lshlrev_b64 v[11:12], v13, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_min_u32_e32 v11, 1, v11
	s_waitcnt lgkmcnt(0)
	s_and_b32 s28, s2, 0xffff
	v_or_b32_e32 v11, v12, v11
	v_sub_nc_u32_e32 v12, 32, v13
	s_lshl_b32 s29, s28, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v11, v11
	v_ldexp_f32 v11, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, v15, v11
	v_trunc_f32_e32 v11, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, 0x2f800000, v11
	v_floor_f32_e32 v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v11, 0xcf800000, v12
	v_cvt_u32_f32_e32 v12, v12
	v_cvt_u32_f32_e32 v13, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v14, v12, s6
	v_mul_lo_u32 v20, v13, s7
	v_mad_u64_u32 v[11:12], null, v13, s6, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v12, v12, v20, v14
	v_lshlrev_b64 v[13:14], 2, v[11:12]
	v_dual_mov_b32 v12, v8 :: v_dual_mov_b32 v11, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v20, vcc_lo, v18, v13
	v_add_co_ci_u32_e32 v21, vcc_lo, v19, v14, vcc_lo
	v_dual_mov_b32 v14, v4 :: v_dual_mov_b32 v13, v3
.LBB0_6:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v22, v14
	v_min_u32_e32 v24, 32, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[22:23], v24, v[13:14]
	v_sub_nc_u32_e32 v24, 32, v24
	v_min_u32_e32 v22, 1, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v22, v23, v22
	v_cvt_f32_u32_e32 v22, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v22, v22, v24
	v_mul_f32_e32 v22, v0, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v22, v22
	v_mul_f32_e32 v23, 0x2f800000, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_floor_f32_e32 v23, v23
	v_fmac_f32_e32 v22, 0xcf800000, v23
	v_cvt_u32_f32_e32 v23, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v22, v22
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v22, vcc_lo, v20, v22
	v_add_co_ci_u32_e32 v23, vcc_lo, v21, v23, vcc_lo
	v_add_co_u32 v13, vcc_lo, v13, s28
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	global_load_b32 v22, v[22:23], off
	v_cmp_le_u64_e32 vcc_lo, s[20:21], v[13:14]
	s_or_b32 s30, vcc_lo, s30
	s_waitcnt vmcnt(0)
	global_store_b32 v[11:12], v22, off
	v_add_co_u32 v11, s2, v11, s29
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s2, 0, v12, s2
	s_and_not1_b32 exec_lo, exec_lo, s30
	s_cbranch_execnz .LBB0_6
.LBB0_7:                                ; %Flow82
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s27
	v_add_co_u32 v9, vcc_lo, v9, s11
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	v_add_co_u32 v7, s2, v7, s24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s2, s25, v8, s2
	v_cmp_le_u64_e32 vcc_lo, s[22:23], v[9:10]
	s_or_b32 s26, vcc_lo, s26
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s26
	s_cbranch_execnz .LBB0_4
.LBB0_8:                                ; %Flow84
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_add_u32 s14, s14, s3
	s_addc_u32 s15, s15, 0
	v_add_co_u32 v5, vcc_lo, v5, s4
	v_cmp_ge_u64_e64 s2, s[14:15], s[16:17]
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB0_2
.LBB0_9:                                ; %._crit_edge55
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z26cudaSNearestNeighborKernelPKfmmPfmmmm
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 34
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z26cudaSNearestNeighborKernelPKfmmPfmmmm, .Lfunc_end0-_Z26cudaSNearestNeighborKernelPKfmmPfmmmm
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1384
; NumSgprs: 36
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 36
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           8
        .value_kind:     by_value
      - .offset:         56
        .size:           8
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z26cudaSNearestNeighborKernelPKfmmPfmmmm
    .private_segment_fixed_size: 0
    .sgpr_count:     36
    .sgpr_spill_count: 0
    .symbol:         _Z26cudaSNearestNeighborKernelPKfmmPfmmmm.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     25
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
