#include <cstdio>


int getThreadNum()
{
	cudaDeviceProp prop;
	int count;
	cudaGetDeviceCount(&count);
	printf("gpu num %d\n", count);

	cudaGetDeviceProperties(&prop, 0);
	printf("max thread num : %d\n", prop.maxThreadsPerBlock);
	printf("grid dimensions : %d %d %d\n", prop.maxGridSize[0], prop.maxGridSize[1], prop.maxGridSize[2]);
	return prop.maxThreadsPerBlock;
}

__global__ void conv (float* img, float* kernel, float* result, int width, int
		height, int channel, int kernelSize)
	
{
	int ti = threadIdx.x;
	int bi = blockIdx.x;
	// int id = (bi * threadNum + ti);
	int id = (bi * blockDim.x + ti);
	if (id >= width * height * channel) return;
	
	int row = id / width;
	int col = id % width;

	for ( int k = 0;k < channel;++k ) {
		for ( int i = 0;i < kernelSize;++i ) {
			for ( int j = 0;j < kernelSize;++j ) {
				float imgValue = 0.0;
				int curRow = row - kernelSize >> 1 + i;
				int curCol = col - kernelSize >> 1 + j;
				if ( curRow < 0 || curCol < 0 || curRow >= height || curCol >= width) {
						continue;
				} else {
					imgValue = img[curRow * width + curCol];
				}
				result[id] += kernel[k * kernelSize * kernelSize + i * kernelSize + j] * imgValue;
			}
		}
	}
//	for ( int i = 0;i < kernelSize; ++i ) {
//		for ( int j = 0;j < kernelSize; ++j ) {
//			float imgValue = 0.0;
//			int curRow = row - kernelSize / 2 + i;
//			int curCol = col - kernelSize / 2 + j;
//			if (curRow < 0 || curCol < 0 || curRow >= height || curCol >= width) {
//				continue;	
//			} else {
//				imgValue = img[curRow * width + curCol];
//			}
//			result[id] += kernel[i * kernelSize + j] * imgValue;
//		}
//	}  
}


int main(void)
{
	int width = 1920;
	int height = 1080;
	int inChannel = 1;
	int outChannel = 8;

	float* img = new float[width * height];

	for ( int row = 0;row < height;++row ) {
		for (int col = 0;col < width;++col ) {
			img[col + row * width] = (col + row) % 256;
		}

	}		
	int kernelSize = 5;
	float* kernel = new float[outChannel * kernelSize * kernelSize];

	for ( int i = 0;i < outChannel * kernelSize * kernelSize; ++i) {
		kernel[i] = i % kernelSize - 1;
	}

	float* imgGpu;
	float* kernelGpu;
	float* resultGpu;

	cudaMalloc((void**)&imgGpu, inChannel * width * height * sizeof(float));
	cudaMalloc((void**)&kernelGpu, outChannel * kernelSize * kernelSize * sizeof(float));
	cudaMalloc((void**)&resultGpu, outChannel * width * height * sizeof(float));


	cudaMemcpy(imgGpu, img, inChannel * width * height * sizeof(float), cudaMemcpyHostToDevice);
	cudaMemcpy(kernelGpu, kernel, outChannel * kernelSize * kernelSize * sizeof(float), cudaMemcpyHostToDevice);


	int threadNum = getThreadNum();
	int blockNum = (width * height - 0.5) / threadNum + 1;
	conv<<<blockNum, threadNum>>>(imgGpu, kernelGpu, resultGpu, width, height,
			outChannel, kernelSize);
	

	float* result = new float[outChannel * width * height];
	cudaMemcpy(result, resultGpu, outChannel * width * height * sizeof(float), cudaMemcpyDeviceToHost);
	
	

	for ( int i = 0;i < 10;++i ) {
		for ( int j = 0;j < 10;++j ) {
			printf("%2.0f ", img[i * width + j]);
		}
		printf("\n");
	} 
	printf("\n");

	for ( int k = 0;k < 2;++k ) {
	for ( int i = 0;i < kernelSize;++i ) {
		for ( int j = 0;j < kernelSize;++j ) {
			printf("%2.0f ", kernel[k * kernelSize * kernelSize + i * kernelSize + j]);
		}
		printf("\n");
	}
	printf("\n\n");
	}

	for ( int k = 0;k < 2;++k ){ 
	for ( int i = 0;i < 10;++i ) {
		for ( int j = 0;j < 10;++j ) {
			printf("%2.0f ", result[k * height * width + i * width + j]);
		}
		printf("\n");
	}	
	printf("\n\n");
	}

	return 0;
}

	.file	"tmpxft_0021b83e_00000000-6_main_8155.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"gpu num %d\n"
.LC1:
	.string	"max thread num : %d\n"
.LC2:
	.string	"grid dimensions : %d %d %d\n"
	.text
	.globl	_Z12getThreadNumv
	.type	_Z12getThreadNumv, @function
_Z12getThreadNumv:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$1064, %rsp
	.cfi_def_cfa_offset 1072
	movq	%fs:40, %rax
	movq	%rax, 1048(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	movl	12(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC0(%rip), %rsi
	call	__printf_chk@PLT
	leaq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaGetDeviceProperties_v2@PLT
	movl	336(%rsp), %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	360(%rsp), %r8d
	xorl	%eax, %eax
	movl	356(%rsp), %ecx
	movl	352(%rsp), %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	336(%rsp), %eax
	movq	1048(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$1064, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z12getThreadNumv, .-_Z12getThreadNumv
	.globl	_Z31__device_stub__Z4convPfS_S_iiiiPfS_S_iiii
	.type	_Z31__device_stub__Z4convPfS_S_iiiiPfS_S_iiii, @function
_Z31__device_stub__Z4convPfS_S_iiiiPfS_S_iiii:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z4convPfS_S_iiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L6:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z31__device_stub__Z4convPfS_S_iiiiPfS_S_iiii, .-_Z31__device_stub__Z4convPfS_S_iiiiPfS_S_iiii
	.globl	_Z4convPfS_S_iiii
	.type	_Z4convPfS_S_iiii, @function
_Z4convPfS_S_iiii:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z4convPfS_S_iiiiPfS_S_iiii
	.cfi_endproc
.LFE2054:
	.size	_Z4convPfS_S_iiii, .-_Z4convPfS_S_iiii
	.section	.rodata.str1.1
.LC5:
	.string	"%2.0f "
.LC6:
	.string	"\n"
.LC7:
	.string	"\n\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$8294400, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	xorl	%edx, %edx
	movq	%rax, %rbx
	movq	%rax, %rcx
.L12:
	xorl	%eax, %eax
.L13:
	leal	(%rdx,%rax), %esi
	movzbl	%sil, %esi
	cvtsi2ssl	%esi, %xmm0
	movss	%xmm0, (%rcx,%rax,4)
	incq	%rax
	cmpq	$1920, %rax
	jne	.L13
	incl	%edx
	addq	$7680, %rcx
	cmpl	$1080, %edx
	jne	.L12
	movl	$800, %edi
	call	_Znam@PLT
	xorl	%ecx, %ecx
	movl	$5, %esi
	movq	%rax, %rbp
.L15:
	movl	%ecx, %eax
	cltd
	idivl	%esi
	decl	%edx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, 0(%rbp,%rcx,4)
	incq	%rcx
	cmpq	$200, %rcx
	jne	.L15
	leaq	8(%rsp), %rdi
	movl	$8294400, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$800, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$66355200, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$8294400, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$800, %edx
	call	cudaMemcpy@PLT
	call	_Z12getThreadNumv
	movsd	.LC3(%rip), %xmm0
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvtsi2sdl	%eax, %xmm1
	movl	%eax, 44(%rsp)
	movabsq	$4294967297, %rdx
	movq	%rdx, 36(%rsp)
	movl	40(%rsp), %esi
	movq	%rdx, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	divsd	%xmm1, %xmm0
	addsd	.LC4(%rip), %xmm0
	cvttsd2sil	%xmm0, %eax
	movl	%eax, 32(%rsp)
	movq	32(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	$1920, %ecx
	movl	$8, %r9d
	movl	$1080, %r8d
	pushq	$5
	.cfi_def_cfa_offset 144
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z31__device_stub__Z4convPfS_S_iiiiPfS_S_iiii
	popq	%rdx
	.cfi_def_cfa_offset 136
	popq	%rcx
	.cfi_def_cfa_offset 128
.L16:
	movl	$66355200, %edi
	xorl	%r13d, %r13d
	call	_Znam@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$66355200, %edx
	movq	%rax, %rdi
	movq	%rax, %r12
	call	cudaMemcpy@PLT
.L17:
	imulq	$7680, %r13, %r14
	xorl	%r15d, %r15d
	addq	%rbx, %r14
.L18:
	cvtss2sd	(%r14,%r15,4), %xmm0
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r15
	cmpq	$10, %r15
	jne	.L18
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r13
	call	__printf_chk@PLT
	cmpq	$10, %r13
	jne	.L17
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r13d, %r13d
	call	__printf_chk@PLT
.L20:
	movq	%r13, %rbx
	xorl	%r15d, %r15d
	negq	%rbx
	andl	$100, %ebx
	addq	%rbp, %rbx
.L24:
	xorl	%r14d, %r14d
.L21:
	cvtss2sd	(%rbx,%r14,4), %xmm0
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r14
	cmpq	$5, %r14
	jne	.L21
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	incl	%r15d
	addq	$20, %rbx
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$5, %r15d
	jne	.L24
	xorl	%eax, %eax
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	testq	%r13, %r13
	jne	.L30
	movl	$1, %r13d
	jmp	.L20
.L30:
	xorl	%r15d, %r15d
.L23:
	movq	%r15, %rbx
	xorl	%ebp, %ebp
	negq	%rbx
	andl	$8294400, %ebx
	addq	%r12, %rbx
.L28:
	xorl	%r14d, %r14d
.L25:
	cvtss2sd	(%rbx,%r14,4), %xmm0
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r14
	cmpq	$10, %r14
	jne	.L25
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%ebp
	call	__printf_chk@PLT
	addq	$7680, %rbx
	cmpl	$10, %ebp
	jne	.L28
	xorl	%eax, %eax
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	testq	%r15, %r15
	jne	.L27
	movq	%r13, %r15
	jmp	.L23
.L27:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z4convPfS_S_iiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4convPfS_S_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	-2147483648
	.long	1094689791
	.align 8
.LC4:
	.long	0
	.long	1072693248
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdio>


int getThreadNum()
{
	hipDeviceProp_t prop;
	int count;
	hipGetDeviceCount(&count);
	printf("gpu num %d\n", count);

	hipGetDeviceProperties(&prop, 0);
	printf("max thread num : %d\n", prop.maxThreadsPerBlock);
	printf("grid dimensions : %d %d %d\n", prop.maxGridSize[0], prop.maxGridSize[1], prop.maxGridSize[2]);
	return prop.maxThreadsPerBlock;
}

__global__ void conv (float* img, float* kernel, float* result, int width, int
		height, int channel, int kernelSize)
	
{
	int ti = threadIdx.x;
	int bi = blockIdx.x;
	// int id = (bi * threadNum + ti);
	int id = (bi * blockDim.x + ti);
	if (id >= width * height * channel) return;
	
	int row = id / width;
	int col = id % width;

	for ( int k = 0;k < channel;++k ) {
		for ( int i = 0;i < kernelSize;++i ) {
			for ( int j = 0;j < kernelSize;++j ) {
				float imgValue = 0.0;
				int curRow = row - kernelSize >> 1 + i;
				int curCol = col - kernelSize >> 1 + j;
				if ( curRow < 0 || curCol < 0 || curRow >= height || curCol >= width) {
						continue;
				} else {
					imgValue = img[curRow * width + curCol];
				}
				result[id] += kernel[k * kernelSize * kernelSize + i * kernelSize + j] * imgValue;
			}
		}
	}
//	for ( int i = 0;i < kernelSize; ++i ) {
//		for ( int j = 0;j < kernelSize; ++j ) {
//			float imgValue = 0.0;
//			int curRow = row - kernelSize / 2 + i;
//			int curCol = col - kernelSize / 2 + j;
//			if (curRow < 0 || curCol < 0 || curRow >= height || curCol >= width) {
//				continue;	
//			} else {
//				imgValue = img[curRow * width + curCol];
//			}
//			result[id] += kernel[i * kernelSize + j] * imgValue;
//		}
//	}  
}


int main(void)
{
	int width = 1920;
	int height = 1080;
	int inChannel = 1;
	int outChannel = 8;

	float* img = new float[width * height];

	for ( int row = 0;row < height;++row ) {
		for (int col = 0;col < width;++col ) {
			img[col + row * width] = (col + row) % 256;
		}

	}		
	int kernelSize = 5;
	float* kernel = new float[outChannel * kernelSize * kernelSize];

	for ( int i = 0;i < outChannel * kernelSize * kernelSize; ++i) {
		kernel[i] = i % kernelSize - 1;
	}

	float* imgGpu;
	float* kernelGpu;
	float* resultGpu;

	hipMalloc((void**)&imgGpu, inChannel * width * height * sizeof(float));
	hipMalloc((void**)&kernelGpu, outChannel * kernelSize * kernelSize * sizeof(float));
	hipMalloc((void**)&resultGpu, outChannel * width * height * sizeof(float));


	hipMemcpy(imgGpu, img, inChannel * width * height * sizeof(float), hipMemcpyHostToDevice);
	hipMemcpy(kernelGpu, kernel, outChannel * kernelSize * kernelSize * sizeof(float), hipMemcpyHostToDevice);


	int threadNum = getThreadNum();
	int blockNum = (width * height - 0.5) / threadNum + 1;
	conv<<<blockNum, threadNum>>>(imgGpu, kernelGpu, resultGpu, width, height,
			outChannel, kernelSize);
	

	float* result = new float[outChannel * width * height];
	hipMemcpy(result, resultGpu, outChannel * width * height * sizeof(float), hipMemcpyDeviceToHost);
	
	

	for ( int i = 0;i < 10;++i ) {
		for ( int j = 0;j < 10;++j ) {
			printf("%2.0f ", img[i * width + j]);
		}
		printf("\n");
	} 
	printf("\n");

	for ( int k = 0;k < 2;++k ) {
	for ( int i = 0;i < kernelSize;++i ) {
		for ( int j = 0;j < kernelSize;++j ) {
			printf("%2.0f ", kernel[k * kernelSize * kernelSize + i * kernelSize + j]);
		}
		printf("\n");
	}
	printf("\n\n");
	}

	for ( int k = 0;k < 2;++k ){ 
	for ( int i = 0;i < 10;++i ) {
		for ( int j = 0;j < 10;++j ) {
			printf("%2.0f ", result[k * height * width + i * width + j]);
		}
		printf("\n");
	}	
	printf("\n\n");
	}

	return 0;
}

	.text
	.file	"main_8155.hip"
	.globl	_Z12getThreadNumv               # -- Begin function _Z12getThreadNumv
	.type	_Z12getThreadNumv,@function
_Z12getThreadNumv:                      # @_Z12getThreadNumv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$1488, %rsp                     # imm = 0x5D0
	.cfi_def_cfa_offset 1504
	.cfi_offset %rbx, -16
	leaq	12(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	movl	(%rbx), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	320(%rbx), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	movl	336(%rbx), %esi
	movl	340(%rbx), %edx
	movl	344(%rbx), %ecx
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	320(%rbx), %eax
	addq	$1488, %rsp                     # imm = 0x5D0
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z12getThreadNumv, .Lfunc_end0-_Z12getThreadNumv
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__convPfS_S_iiii # -- Begin function _Z19__device_stub__convPfS_S_iiii
	.type	_Z19__device_stub__convPfS_S_iiii,@function
_Z19__device_stub__convPfS_S_iiii:      # @_Z19__device_stub__convPfS_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4convPfS_S_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z19__device_stub__convPfS_S_iiii, .Lfunc_end1-_Z19__device_stub__convPfS_S_iiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x413fa3ff80000000              # double 2073599.5
.LCPI2_1:
	.quad	0x3ff0000000000000              # double 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$8294400, %edi                  # imm = 0x7E9000
	callq	_Znam
	movq	%rax, %r14
	xorl	%eax, %eax
	movq	%r14, %rcx
.LBB2_1:                                # %.preheader119
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	xorl	%edx, %edx
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rax,%rdx), %esi
	movzbl	%sil, %esi
	xorps	%xmm0, %xmm0
	cvtsi2ss	%esi, %xmm0
	movss	%xmm0, (%rcx,%rdx,4)
	incq	%rdx
	cmpq	$1920, %rdx                     # imm = 0x780
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%rax
	addq	$7680, %rcx                     # imm = 0x1E00
	cmpq	$1080, %rax                     # imm = 0x438
	jne	.LBB2_1
# %bb.4:
	movl	$800, %edi                      # imm = 0x320
	callq	_Znam
	movq	%rax, %rbx
	movl	$-1, %eax
	xorl	%ecx, %ecx
	movl	$3435973837, %edx               # imm = 0xCCCCCCCD
.LBB2_5:                                # =>This Inner Loop Header: Depth=1
	movl	%ecx, %esi
	imulq	%rdx, %rsi
	shrq	$34, %rsi
	leal	(%rsi,%rsi,4), %esi
	movl	%eax, %edi
	subl	%esi, %edi
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edi, %xmm0
	movss	%xmm0, (%rbx,%rcx,4)
	incq	%rcx
	incl	%eax
	cmpq	$200, %rcx
	jne	.LBB2_5
# %bb.6:
	leaq	32(%rsp), %r15
	movl	$8294400, %esi                  # imm = 0x7E9000
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %r12
	movl	$800, %esi                      # imm = 0x320
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$66355200, %esi                 # imm = 0x3F48000
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$8294400, %edx                  # imm = 0x7E9000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$800, %edx                      # imm = 0x320
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	_Z12getThreadNumv
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	addsd	.LCPI2_1(%rip), %xmm1
	cvttsd2si	%xmm1, %edi
	btsq	$32, %rdi
	movl	%eax, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$5, (%rsp)
	movl	$1920, %ecx                     # imm = 0x780
	movl	$1080, %r8d                     # imm = 0x438
	movl	$8, %r9d
	callq	_Z19__device_stub__convPfS_S_iiii
.LBB2_8:
	movl	$66355200, %edi                 # imm = 0x3F48000
	callq	_Znam
	movq	%rax, %r15
	movq	16(%rsp), %rsi
	movl	$66355200, %edx                 # imm = 0x3F48000
	movq	%rax, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r12d, %r12d
.LBB2_9:                                # %.preheader118
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_10 Depth 2
	xorl	%r13d, %r13d
.LBB2_10:                               #   Parent Loop BB2_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r13,4), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	incq	%r13
	cmpq	$10, %r13
	jne	.LBB2_10
# %bb.11:                               #   in Loop: Header=BB2_9 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r12
	addq	$7680, %r14                     # imm = 0x1E00
	cmpq	$10, %r12
	jne	.LBB2_9
# %bb.12:
	movl	$10, %edi
	callq	putchar@PLT
	movb	$1, %bpl
	xorl	%eax, %eax
.LBB2_13:                               # %.preheader117
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_14 Depth 2
                                        #       Child Loop BB2_15 Depth 3
	leaq	(%rbx,%rax,4), %r14
	xorl	%r12d, %r12d
.LBB2_14:                               # %.preheader116
                                        #   Parent Loop BB2_13 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_15 Depth 3
	xorl	%r13d, %r13d
.LBB2_15:                               #   Parent Loop BB2_13 Depth=1
                                        #     Parent Loop BB2_14 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r13,4), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	incq	%r13
	cmpq	$5, %r13
	jne	.LBB2_15
# %bb.16:                               #   in Loop: Header=BB2_14 Depth=2
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r12
	addq	$20, %r14
	cmpq	$5, %r12
	jne	.LBB2_14
# %bb.17:                               #   in Loop: Header=BB2_13 Depth=1
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$25, %eax
	testb	$1, %bpl
	movl	$0, %ebp
	jne	.LBB2_13
# %bb.18:                               # %.preheader114.preheader
	movb	$1, %bl
	xorl	%eax, %eax
.LBB2_19:                               # %.preheader114
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_20 Depth 2
                                        #       Child Loop BB2_21 Depth 3
	leaq	(%r15,%rax,4), %r14
	xorl	%r12d, %r12d
.LBB2_20:                               # %.preheader
                                        #   Parent Loop BB2_19 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_21 Depth 3
	xorl	%r13d, %r13d
.LBB2_21:                               #   Parent Loop BB2_19 Depth=1
                                        #     Parent Loop BB2_20 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r13,4), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	incq	%r13
	cmpq	$10, %r13
	jne	.LBB2_21
# %bb.22:                               #   in Loop: Header=BB2_20 Depth=2
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r12
	addq	$7680, %r14                     # imm = 0x1E00
	cmpq	$10, %r12
	jne	.LBB2_20
# %bb.23:                               #   in Loop: Header=BB2_19 Depth=1
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$2073600, %eax                  # imm = 0x1FA400
	testb	$1, %bl
	movl	$0, %ebx
	jne	.LBB2_19
# %bb.24:
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4convPfS_S_iiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"gpu num %d\n"
	.size	.L.str, 12

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"max thread num : %d\n"
	.size	.L.str.1, 21

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"grid dimensions : %d %d %d\n"
	.size	.L.str.2, 28

	.type	_Z4convPfS_S_iiii,@object       # @_Z4convPfS_S_iiii
	.section	.rodata,"a",@progbits
	.globl	_Z4convPfS_S_iiii
	.p2align	3, 0x0
_Z4convPfS_S_iiii:
	.quad	_Z19__device_stub__convPfS_S_iiii
	.size	_Z4convPfS_S_iiii, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"%2.0f "
	.size	.L.str.3, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4convPfS_S_iiii"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.1,@object                 # @str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.1:
	.asciz	"\n"
	.size	.Lstr.1, 2

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__convPfS_S_iiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4convPfS_S_iiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4convPfS_S_iiii       ; -- Begin function _Z4convPfS_S_iiii
	.globl	_Z4convPfS_S_iiii
	.p2align	8
	.type	_Z4convPfS_S_iiii,@function
_Z4convPfS_S_iiii:                      ; @_Z4convPfS_S_iiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_cmp_gt_i32 s6, 0
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mul_i32 s2, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s2, s2, s6
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s8, s2
	s_cbranch_execz .LBB0_10
; %bb.1:                                ; %.preheader62.lr.ph
	s_ashr_i32 s2, s4, 31
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s8, s4, s2
	s_load_b64 s[14:15], s[0:1], 0x10
	s_xor_b32 s8, s8, s2
	s_mul_i32 s13, s7, s7
	v_cvt_f32_u32_e32 v0, s8
	s_sub_i32 s9, 0, s8
	v_add_nc_u32_e32 v4, v1, v2
	s_cmp_gt_i32 s7, 0
	s_cselect_b32 s12, -1, 0
	v_rcp_iflag_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, s9, v0
	v_mul_hi_u32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v3
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v0, s8
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s8, v3
	v_cmp_le_u32_e32 vcc_lo, s8, v3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
	v_xor_b32_e32 v5, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s8, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_load_b128 s[8:11], s[0:1], 0x0
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	v_xor_b32_e32 v0, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v0, v5
	v_mul_lo_u32 v0, v4, s4
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v1, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s14, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s15, v3, vcc_lo
	v_subrev_nc_u32_e32 v2, s7, v4
	v_subrev_nc_u32_e32 v3, s7, v5
	v_mov_b32_e32 v4, 0
	s_mov_b32 s14, 0
.LBB0_2:                                ; %.preheader62
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB0_9
; %bb.3:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s15, 0
	s_mov_b32 s16, s3
.LBB0_4:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
	s_add_i32 s15, s15, 1
	s_mov_b32 s18, 0
	v_ashrrev_i32_e32 v6, s15, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v5, v6, s4
	v_cmp_lt_i32_e32 vcc_lo, -1, v6
	v_cmp_gt_i32_e64 s0, s5, v6
.LBB0_5:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s17, s18, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, s17, v3
	v_cmp_lt_i32_e64 s1, -1, v6
	v_cmp_gt_i32_e64 s2, s4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=3
	v_add_nc_u32_e32 v6, v6, v5
	s_add_i32 s18, s16, s18
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s19, s18, 31
	s_lshl_b64 s[18:19], s[18:19], 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	s_add_u32 s18, s10, s18
	s_addc_u32 s19, s11, s19
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, s1, s8, v6
	v_add_co_ci_u32_e64 v7, s1, s9, v7, s1
	global_load_b32 v8, v4, s[18:19]
	global_load_b32 v6, v[6:7], off
	global_load_b32 v7, v[0:1], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v7, v6, v8
	global_store_b32 v[0:1], v7, off
.LBB0_7:                                ;   in Loop: Header=BB0_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_cmp_eq_u32 s7, s17
	s_mov_b32 s18, s17
	s_cbranch_scc0 .LBB0_5
; %bb.8:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_add_i32 s16, s16, s7
	s_cmp_eq_u32 s15, s7
	s_cbranch_scc0 .LBB0_4
.LBB0_9:                                ; %._crit_edge65
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s14, s14, 1
	s_add_i32 s3, s3, s13
	s_cmp_eq_u32 s14, s6
	s_cbranch_scc0 .LBB0_2
.LBB0_10:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4convPfS_S_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4convPfS_S_iiii, .Lfunc_end0-_Z4convPfS_S_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 612
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4convPfS_S_iiii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z4convPfS_S_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
