/* Matrix normalization.
 * Compile with "gcc matrixNorm.c"
 */
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <sys/time.h>
#include <math.h>

/* Program Parameters */
#define N 9000  /* Matrix size */

/* Matrices */
volatile float A[N][N], B[N][N];

// Flattened array A & B
float flattenA[N * N], flattenB[N * N];

/* Initialize A and B*/
void initialize_inputs() {
    int row, col;

    // FIXED RANDOM SEED = 22
    srand(22);
    for (row = 0; row < N; row++) {
        for (col = 0; col < N; col++) {
            A[row][col] = (float)rand() / 32768.0;
            B[row][col] = 0.0;
        }
    }
}

// Printing array func
//  This will help us in both seeing inputs/results before and after normalization
void print_arrays() {
    int row, col;

    if (N < 10) {
        printf("\nA =\n\t");
        for (row = 0; row < N; row++) {
            for (col = 0; col < N; col++) {
                printf("%5.2f%s", A[row][col], (col < N-1) ? ", " : ";\n\t");
            }
        }
        printf("\nB =\n\t");
        for (row = 0; row < N; row++) {
            for (col = 0; col < N; col++) {
                printf("%5.2f%s", B[row][col], (col < N-1) ? ", " : ";\n\t");
            }
        }
        printf("\n");
    }
}

// Even though CUDA API has cudaMemcpy2D, I found it much easier
//  to convert a 2D array into a 1D with mapping scheme like this
void flattenArray() {
    for (int i = 0; i < N; i++) {
        for (int j = 0; j < N; j++) {
            flattenA[i * N + j] = A[i][j];
            flattenB[i * N + j] = B[i][j];
        }
    }
}

// This function basically prints out a 1D array to console
void checkFlatten(float targetArray[]) {
    if (N < 10) {
        printf("---- Checking ----\n");
        for (int i = 0; i < (N * N); i++) {
            if (i % N == 0 && i != 0) {
                printf("\n");
            }
            printf("%5.2f ", targetArray[i]);
        }
        printf("\n");
    }
}

// CUDA device information
void getCudaDevices(int nDevices) {
    for (int i = 0; i < nDevices; i++) {
        cudaDeviceProp prop;
        cudaGetDeviceProperties(&prop, i);
        printf("Device Number: %d\n", i);
        printf("  Device name: %s\n", prop.name);
        printf("  Memory Clock Rate (KHz): %d\n", prop.memoryClockRate);
        printf("  Memory Bus Width (bits): %d\n", prop.memoryBusWidth);
        printf("  Peak Memory Bandwidth (GB/s): %f\n\n", 2.0*prop.memoryClockRate*(prop.memoryBusWidth/8)/1.0e6);
    }
}

// GPU parallel matrix normalization kernel
__global__ void gpuMatrixNorm(float *flattenA, float *flattenB, int arraySize) {
    float mu, sigma;

    // Index when inside GPU i.e. threadID
    //  After flattenning, we can access a pseudo 2D array in the same way
    //  we flatten it i.e. A[i][j] == flattenA[i * arraySize + idx]
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    // If clause here is to prevent faulty computation tasks
    //  where gpu processes an index that is beyond the scope
    //  of the vector A
    if (idx < arraySize) {
        // Mean
        mu = 0.0;
        for (int row = 0; row < arraySize; row++) {
            mu += flattenA[row * arraySize + idx];
        }
        mu /= (float) arraySize;

        // Wait here until every mean computations have arrived
        //  Once arrived, then continue to Standard deviation
        //  syncthreads == barrier
        __syncthreads();

        // Standard deviation
        sigma = 0.0;
        for (int row = 0; row < arraySize; row++) {
            sigma += powf((flattenA[row * arraySize + idx] - mu), 2.0);
        }
        sigma /= (float) arraySize;

        // Wait here until every Standard deviation computations have arrived
        //  Once arrived, then continue to compute the final result for B
        //  syncthreads == barrier
        __syncthreads();
        sigma = sqrt(sigma);

        // Normalization calculation
        for (int row = 0; row < arraySize; row++) {
            if (sigma == 0.0) {
                flattenB[row * arraySize + idx] = 0.0;
            }
            else {
                flattenB[row * arraySize + idx] = (flattenA[row * arraySize + idx] - mu) / sigma;
            }
        }
    }
}

int main(int argc, char **argv) {
    // Variables for CUDA
    float *device_A, *device_B;
    int nDevices;
    int cudaRunTimeVersion;
    int cudaDriverVersion;

    /* Timing variables */
    struct timeval startGPU, stopGPU;  /* Elapsed times using gettimeofday() */
    struct timezone tzdummy;
    unsigned long long runtimeGPU;

    /* Initialize A and B */
    initialize_inputs();

    // Sanity check after inputs initialization
    printf("---- Initialized inputs ----\n");
    print_arrays();

    // Flatten 2D array A & B
    flattenArray();

    // Sanity check after flattening
    //  Usually commented this out ... I only un-conmment it to validate the flattening process went ok
    //  NOTE: This will only print out if N < 10
    checkFlatten(flattenA);

    // After flattening, size of array flattenA will be N * N
    int arraySize = sizeof(float) * N * N;

    // Cuda device info
    cudaGetDeviceCount(&nDevices);
    getCudaDevices(nDevices);
    cudaRuntimeGetVersion(&cudaRunTimeVersion);
    cudaDriverGetVersion(&cudaDriverVersion);

    // Printing out CUDA runtime & driver version to console
    printf("Cuda Runtime Version: %i\n", cudaRunTimeVersion);
    printf("Cuda Driver Version: %i\n", cudaDriverVersion);

    // Start Clock GPU
    printf("---------------------------------------------\n");
    printf("Matrix size N = %d", N);
    printf("\nStarting clock for GPU.\n\n");
    gettimeofday(&startGPU, &tzdummy);

    // Allocating space for GPU device
    cudaMalloc((void**)&device_A, arraySize);
    cudaMalloc((void**)&device_B, arraySize);

    // Copying array A from HOST to GPU
    cudaMemcpy(device_A, flattenA, arraySize, cudaMemcpyHostToDevice);

    // Launch GPU kernel gpuMatrixNorm
    gpuMatrixNorm<<<N, N>>>(device_A, device_B, N);

    // Copying array B from GPU to HOST
    //  Initially I had cudaDeviceSynchronize() before copying B from device to host
    //  However, by reading CUDA's doc further, cudaMemcpy is a blocking method
    cudaMemcpy(flattenB, device_B, arraySize, cudaMemcpyDeviceToHost);

    /* Stop Clock */
    gettimeofday(&stopGPU, &tzdummy);
    runtimeGPU = (unsigned long long)(stopGPU.tv_sec - startGPU.tv_sec) * 1000000 + (stopGPU.tv_usec - startGPU.tv_usec);

    /* Display timing results */
    printf("GPU Runtime = %g ms.\n", (float)runtimeGPU/(float)1000);
    printf("\nStopped clock for GPU.");
    printf("\n---------------------------------------------\n");
    printf("---- Results ----\n");

    // Sanity check the result after computes by GPU and deliver back to host machine
    //  Usually commented this out ... I only un-comment it to validate the computed result went ok
    //  NOTE: This will only print out if N < 10
    checkFlatten(flattenB);

    // Freeing memory in GPU device
    cudaFree(device_A);
    cudaFree(device_B);
    exit(0);
}
	.file	"tmpxft_00215899_00000000-6_matrixNormCuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2035:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z17initialize_inputsv
	.type	_Z17initialize_inputsv, @function
_Z17initialize_inputsv:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$22, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
	call	srand@PLT
.L3:
	movslq	%ebx, %r12
	xorl	%ebp, %ebp
	imulq	$9000, %r12, %r12
.L4:
	call	rand@PLT
	leaq	A(%rip), %rdx
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movslq	%ebp, %rax
	incl	%ebp
	addq	%r12, %rax
	movss	%xmm0, (%rdx,%rax,4)
	leaq	B(%rip), %rdx
	movl	$0x00000000, (%rdx,%rax,4)
	cmpl	$9000, %ebp
	jne	.L4
	incl	%ebx
	cmpl	$9000, %ebx
	jne	.L3
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z17initialize_inputsv, .-_Z17initialize_inputsv
	.globl	_Z12print_arraysv
	.type	_Z12print_arraysv, @function
_Z12print_arraysv:
.LFB2028:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z12print_arraysv, .-_Z12print_arraysv
	.globl	_Z12flattenArrayv
	.type	_Z12flattenArrayv, @function
_Z12flattenArrayv:
.LFB2029:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	leaq	A(%rip), %r8
	leaq	flattenA(%rip), %r9
	leaq	B(%rip), %r10
	leaq	flattenB(%rip), %r11
.L11:
	movslq	%eax, %rdi
	imulq	$36000, %rax, %rcx
	xorl	%edx, %edx
	imulq	$9000, %rdi, %rdi
.L12:
	movslq	%edx, %rsi
	incl	%edx
	addq	%rdi, %rsi
	movss	(%r8,%rsi,4), %xmm0
	movss	%xmm0, (%r9,%rcx)
	movss	(%r10,%rsi,4), %xmm0
	movss	%xmm0, (%r11,%rcx)
	addq	$4, %rcx
	cmpl	$9000, %edx
	jne	.L12
	incq	%rax
	cmpq	$9000, %rax
	jne	.L11
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z12flattenArrayv, .-_Z12flattenArrayv
	.globl	_Z12checkFlattenPf
	.type	_Z12checkFlattenPf, @function
_Z12checkFlattenPf:
.LFB2030:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z12checkFlattenPf, .-_Z12checkFlattenPf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Device Number: %d\n"
.LC3:
	.string	"  Device name: %s\n"
.LC4:
	.string	"  Memory Clock Rate (KHz): %d\n"
.LC5:
	.string	"  Memory Bus Width (bits): %d\n"
.LC7:
	.string	"  Peak Memory Bandwidth (GB/s): %f\n\n"
	.text
	.globl	_Z14getCudaDevicesi
	.type	_Z14getCudaDevicesi, @function
_Z14getCudaDevicesi:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	leaq	.LC2(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	subq	$1048, %rsp
	.cfi_def_cfa_offset 1088
	movq	%fs:40, %rax
	movq	%rax, 1032(%rsp)
	xorl	%eax, %eax
.L17:
	cmpl	%ebp, %ebx
	jge	.L21
	movq	%rsp, %r13
	movl	%ebx, %esi
	movq	%r13, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	%ebx, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%ebx
	call	__printf_chk@PLT
	movq	%r13, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rsi
	call	__printf_chk@PLT
	movl	608(%rsp), %edx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	612(%rsp), %edx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$8, %ecx
	movl	$2, %edi
	movl	612(%rsp), %eax
	cvtsi2sdl	608(%rsp), %xmm0
	leaq	.LC7(%rip), %rsi
	cltd
	idivl	%ecx
	addsd	%xmm0, %xmm0
	cvtsi2sdl	%eax, %xmm1
	movb	$1, %al
	mulsd	%xmm1, %xmm0
	divsd	.LC6(%rip), %xmm0
	call	__printf_chk@PLT
	jmp	.L17
.L21:
	movq	1032(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$1048, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z14getCudaDevicesi, .-_Z14getCudaDevicesi
	.globl	_Z36__device_stub__Z13gpuMatrixNormPfS_iPfS_i
	.type	_Z36__device_stub__Z13gpuMatrixNormPfS_iPfS_i, @function
_Z36__device_stub__Z13gpuMatrixNormPfS_iPfS_i:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13gpuMatrixNormPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L22:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z36__device_stub__Z13gpuMatrixNormPfS_iPfS_i, .-_Z36__device_stub__Z13gpuMatrixNormPfS_iPfS_i
	.globl	_Z13gpuMatrixNormPfS_i
	.type	_Z13gpuMatrixNormPfS_i, @function
_Z13gpuMatrixNormPfS_i:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z13gpuMatrixNormPfS_iPfS_i
	.cfi_endproc
.LFE2058:
	.size	_Z13gpuMatrixNormPfS_i, .-_Z13gpuMatrixNormPfS_i
	.section	.rodata.str1.1
.LC8:
	.string	"---- Initialized inputs ----\n"
.LC9:
	.string	"Cuda Runtime Version: %i\n"
.LC10:
	.string	"Cuda Driver Version: %i\n"
.LC11:
	.string	"---------------------------------------------\n"
.LC12:
	.string	"Matrix size N = %d"
.LC13:
	.string	"\nStarting clock for GPU.\n\n"
.LC15:
	.string	"GPU Runtime = %g ms.\n"
.LC16:
	.string	"\nStopped clock for GPU."
.LC17:
	.string	"\n---------------------------------------------\n"
.LC18:
	.string	"---- Results ----\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	subq	$96, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	36(%rsp), %rbx
	call	_Z17initialize_inputsv
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	_Z12flattenArrayv
	leaq	4(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	movl	4(%rsp), %edi
	call	_Z14getCudaDevicesi
	leaq	8(%rsp), %rdi
	call	cudaRuntimeGetVersion@PLT
	leaq	12(%rsp), %rdi
	call	cudaDriverGetVersion@PLT
	movl	8(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC9(%rip), %rsi
	call	__printf_chk@PLT
	movl	12(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC10(%rip), %rsi
	call	__printf_chk@PLT
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$9000, %edx
	leaq	.LC12(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	56(%rsp), %rdi
	movq	%rbx, %rsi
	call	gettimeofday@PLT
	leaq	16(%rsp), %rdi
	movl	$324000000, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$324000000, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$324000000, %edx
	leaq	flattenA(%rip), %rsi
	call	cudaMemcpy@PLT
	movl	$536872037, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$3, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 80(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$9000, %edx
	call	_Z36__device_stub__Z13gpuMatrixNormPfS_iPfS_i
.L28:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$324000000, %edx
	leaq	flattenB(%rip), %rdi
	call	cudaMemcpy@PLT
	leaq	72(%rsp), %rdi
	movq	%rbx, %rsi
	call	gettimeofday@PLT
	movq	72(%rsp), %rax
	subq	56(%rsp), %rax
	imulq	$1000000, %rax, %rax
	addq	80(%rsp), %rax
	subq	64(%rsp), %rax
	js	.L29
	cvtsi2ssq	%rax, %xmm0
	jmp	.L30
.L29:
	movq	%rax, %rdx
	andl	$1, %eax
	shrq	%rdx
	orq	%rax, %rdx
	cvtsi2ssq	%rdx, %xmm0
	addss	%xmm0, %xmm0
.L30:
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	divss	.LC14(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC16(%rip), %rsi
	call	__printf_chk@PLT
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%edi, %edi
	call	exit@PLT
	.cfi_endproc
.LFE2032:
	.size	main, .-main
	.section	.rodata.str1.1
.LC19:
	.string	"_Z13gpuMatrixNormPfS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13gpuMatrixNormPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	flattenB
	.bss
	.align 32
	.type	flattenB, @object
	.size	flattenB, 324000000
flattenB:
	.zero	324000000
	.globl	flattenA
	.align 32
	.type	flattenA, @object
	.size	flattenA, 324000000
flattenA:
	.zero	324000000
	.globl	B
	.align 32
	.type	B, @object
	.size	B, 324000000
B:
	.zero	324000000
	.globl	A
	.align 32
	.type	A, @object
	.size	A, 324000000
A:
	.zero	324000000
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	939524096
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	0
	.long	1093567616
	.section	.rodata.cst4
	.align 4
.LC14:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* Matrix normalization.
 * Compile with "gcc matrixNorm.c"
 */

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <sys/time.h>
#include <math.h>

/* Program Parameters */
#define N 9000  /* Matrix size */

/* Matrices */
volatile float A[N][N], B[N][N];

// Flattened array A & B
float flattenA[N * N], flattenB[N * N];

/* Initialize A and B*/
void initialize_inputs() {
    int row, col;

    // FIXED RANDOM SEED = 22
    srand(22);
    for (row = 0; row < N; row++) {
        for (col = 0; col < N; col++) {
            A[row][col] = (float)rand() / 32768.0;
            B[row][col] = 0.0;
        }
    }
}

// Printing array func
//  This will help us in both seeing inputs/results before and after normalization
void print_arrays() {
    int row, col;

    if (N < 10) {
        printf("\nA =\n\t");
        for (row = 0; row < N; row++) {
            for (col = 0; col < N; col++) {
                printf("%5.2f%s", A[row][col], (col < N-1) ? ", " : ";\n\t");
            }
        }
        printf("\nB =\n\t");
        for (row = 0; row < N; row++) {
            for (col = 0; col < N; col++) {
                printf("%5.2f%s", B[row][col], (col < N-1) ? ", " : ";\n\t");
            }
        }
        printf("\n");
    }
}

// Even though CUDA API has cudaMemcpy2D, I found it much easier
//  to convert a 2D array into a 1D with mapping scheme like this
void flattenArray() {
    for (int i = 0; i < N; i++) {
        for (int j = 0; j < N; j++) {
            flattenA[i * N + j] = A[i][j];
            flattenB[i * N + j] = B[i][j];
        }
    }
}

// This function basically prints out a 1D array to console
void checkFlatten(float targetArray[]) {
    if (N < 10) {
        printf("---- Checking ----\n");
        for (int i = 0; i < (N * N); i++) {
            if (i % N == 0 && i != 0) {
                printf("\n");
            }
            printf("%5.2f ", targetArray[i]);
        }
        printf("\n");
    }
}

// CUDA device information
void getCudaDevices(int nDevices) {
    for (int i = 0; i < nDevices; i++) {
        hipDeviceProp_t prop;
        hipGetDeviceProperties(&prop, i);
        printf("Device Number: %d\n", i);
        printf("  Device name: %s\n", prop.name);
        printf("  Memory Clock Rate (KHz): %d\n", prop.memoryClockRate);
        printf("  Memory Bus Width (bits): %d\n", prop.memoryBusWidth);
        printf("  Peak Memory Bandwidth (GB/s): %f\n\n", 2.0*prop.memoryClockRate*(prop.memoryBusWidth/8)/1.0e6);
    }
}

// GPU parallel matrix normalization kernel
__global__ void gpuMatrixNorm(float *flattenA, float *flattenB, int arraySize) {
    float mu, sigma;

    // Index when inside GPU i.e. threadID
    //  After flattenning, we can access a pseudo 2D array in the same way
    //  we flatten it i.e. A[i][j] == flattenA[i * arraySize + idx]
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    // If clause here is to prevent faulty computation tasks
    //  where gpu processes an index that is beyond the scope
    //  of the vector A
    if (idx < arraySize) {
        // Mean
        mu = 0.0;
        for (int row = 0; row < arraySize; row++) {
            mu += flattenA[row * arraySize + idx];
        }
        mu /= (float) arraySize;

        // Wait here until every mean computations have arrived
        //  Once arrived, then continue to Standard deviation
        //  syncthreads == barrier
        __syncthreads();

        // Standard deviation
        sigma = 0.0;
        for (int row = 0; row < arraySize; row++) {
            sigma += powf((flattenA[row * arraySize + idx] - mu), 2.0);
        }
        sigma /= (float) arraySize;

        // Wait here until every Standard deviation computations have arrived
        //  Once arrived, then continue to compute the final result for B
        //  syncthreads == barrier
        __syncthreads();
        sigma = sqrt(sigma);

        // Normalization calculation
        for (int row = 0; row < arraySize; row++) {
            if (sigma == 0.0) {
                flattenB[row * arraySize + idx] = 0.0;
            }
            else {
                flattenB[row * arraySize + idx] = (flattenA[row * arraySize + idx] - mu) / sigma;
            }
        }
    }
}

int main(int argc, char **argv) {
    // Variables for CUDA
    float *device_A, *device_B;
    int nDevices;
    int cudaRunTimeVersion;
    int cudaDriverVersion;

    /* Timing variables */
    struct timeval startGPU, stopGPU;  /* Elapsed times using gettimeofday() */
    struct timezone tzdummy;
    unsigned long long runtimeGPU;

    /* Initialize A and B */
    initialize_inputs();

    // Sanity check after inputs initialization
    printf("---- Initialized inputs ----\n");
    print_arrays();

    // Flatten 2D array A & B
    flattenArray();

    // Sanity check after flattening
    //  Usually commented this out ... I only un-conmment it to validate the flattening process went ok
    //  NOTE: This will only print out if N < 10
    checkFlatten(flattenA);

    // After flattening, size of array flattenA will be N * N
    int arraySize = sizeof(float) * N * N;

    // Cuda device info
    hipGetDeviceCount(&nDevices);
    getCudaDevices(nDevices);
    hipRuntimeGetVersion(&cudaRunTimeVersion);
    hipDriverGetVersion(&cudaDriverVersion);

    // Printing out CUDA runtime & driver version to console
    printf("Cuda Runtime Version: %i\n", cudaRunTimeVersion);
    printf("Cuda Driver Version: %i\n", cudaDriverVersion);

    // Start Clock GPU
    printf("---------------------------------------------\n");
    printf("Matrix size N = %d", N);
    printf("\nStarting clock for GPU.\n\n");
    gettimeofday(&startGPU, &tzdummy);

    // Allocating space for GPU device
    hipMalloc((void**)&device_A, arraySize);
    hipMalloc((void**)&device_B, arraySize);

    // Copying array A from HOST to GPU
    hipMemcpy(device_A, flattenA, arraySize, hipMemcpyHostToDevice);

    // Launch GPU kernel gpuMatrixNorm
    gpuMatrixNorm<<<N, N>>>(device_A, device_B, N);

    // Copying array B from GPU to HOST
    //  Initially I had cudaDeviceSynchronize() before copying B from device to host
    //  However, by reading CUDA's doc further, cudaMemcpy is a blocking method
    hipMemcpy(flattenB, device_B, arraySize, hipMemcpyDeviceToHost);

    /* Stop Clock */
    gettimeofday(&stopGPU, &tzdummy);
    runtimeGPU = (unsigned long long)(stopGPU.tv_sec - startGPU.tv_sec) * 1000000 + (stopGPU.tv_usec - startGPU.tv_usec);

    /* Display timing results */
    printf("GPU Runtime = %g ms.\n", (float)runtimeGPU/(float)1000);
    printf("\nStopped clock for GPU.");
    printf("\n---------------------------------------------\n");
    printf("---- Results ----\n");

    // Sanity check the result after computes by GPU and deliver back to host machine
    //  Usually commented this out ... I only un-comment it to validate the computed result went ok
    //  NOTE: This will only print out if N < 10
    checkFlatten(flattenB);

    // Freeing memory in GPU device
    hipFree(device_A);
    hipFree(device_B);
    exit(0);
}
	.text
	.file	"matrixNormCuda.hip"
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z17initialize_inputsv
.LCPI0_0:
	.long	0x38000000                      # float 3.05175781E-5
	.text
	.globl	_Z17initialize_inputsv
	.type	_Z17initialize_inputsv,@function
_Z17initialize_inputsv:                 # @_Z17initialize_inputsv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$22, %edi
	callq	srand
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB0_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_2 Depth 2
	movq	$-36000, %r15                   # imm = 0xFFFF7360
.LBB0_2:                                #   Parent Loop BB0_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movss	.LCPI0_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, A+36000(%rbx,%r15)
	movl	$0, B+36000(%rbx,%r15)
	addq	$4, %r15
	jne	.LBB0_2
# %bb.3:                                #   in Loop: Header=BB0_1 Depth=1
	incq	%r14
	addq	$36000, %rbx                    # imm = 0x8CA0
	cmpq	$9000, %r14                     # imm = 0x2328
	jne	.LBB0_1
# %bb.4:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z17initialize_inputsv, .Lfunc_end0-_Z17initialize_inputsv
	.cfi_endproc
                                        # -- End function
	.globl	_Z12print_arraysv               # -- Begin function _Z12print_arraysv
	.type	_Z12print_arraysv,@function
_Z12print_arraysv:                      # @_Z12print_arraysv
	.cfi_startproc
# %bb.0:
	retq
.Lfunc_end1:
	.size	_Z12print_arraysv, .Lfunc_end1-_Z12print_arraysv
	.cfi_endproc
                                        # -- End function
	.globl	_Z12flattenArrayv               # -- Begin function _Z12flattenArrayv
	.type	_Z12flattenArrayv,@function
_Z12flattenArrayv:                      # @_Z12flattenArrayv
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB2_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	movq	$-9000, %rdx                    # imm = 0xDCD8
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	A+36000(%rax,%rdx,4), %xmm0     # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, flattenA+36000(%rax,%rdx,4)
	movss	B+36000(%rax,%rdx,4), %xmm0     # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, flattenB+36000(%rax,%rdx,4)
	incq	%rdx
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%rcx
	addq	$36000, %rax                    # imm = 0x8CA0
	cmpq	$9000, %rcx                     # imm = 0x2328
	jne	.LBB2_1
# %bb.4:
	retq
.Lfunc_end2:
	.size	_Z12flattenArrayv, .Lfunc_end2-_Z12flattenArrayv
	.cfi_endproc
                                        # -- End function
	.globl	_Z12checkFlattenPf              # -- Begin function _Z12checkFlattenPf
	.type	_Z12checkFlattenPf,@function
_Z12checkFlattenPf:                     # @_Z12checkFlattenPf
	.cfi_startproc
# %bb.0:
	retq
.Lfunc_end3:
	.size	_Z12checkFlattenPf, .Lfunc_end3-_Z12checkFlattenPf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z14getCudaDevicesi
.LCPI4_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z14getCudaDevicesi
	.type	_Z14getCudaDevicesi,@function
_Z14getCudaDevicesi:                    # @_Z14getCudaDevicesi
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jle	.LBB4_4
# %bb.1:                                # %.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$1472, %rsp                     # imm = 0x5C0
	.cfi_def_cfa_offset 1504
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%edi, %ebx
	movq	%rsp, %r14
	xorl	%ebp, %ebp
.LBB4_2:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebp, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$.L.str, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	608(%rsp), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	612(%rsp), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	xorps	%xmm1, %xmm1
	cvtsi2sdl	608(%rsp), %xmm1
	addsd	%xmm1, %xmm1
	movl	612(%rsp), %eax
	leal	7(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$3, %ecx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ecx, %xmm0
	mulsd	%xmm1, %xmm0
	divsd	.LCPI4_0(%rip), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	incl	%ebp
	cmpl	%ebp, %ebx
	jne	.LBB4_2
# %bb.3:
	addq	$1472, %rsp                     # imm = 0x5C0
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %rbp
.LBB4_4:                                # %._crit_edge
	retq
.Lfunc_end4:
	.size	_Z14getCudaDevicesi, .Lfunc_end4-_Z14getCudaDevicesi
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__gpuMatrixNormPfS_i # -- Begin function _Z28__device_stub__gpuMatrixNormPfS_i
	.type	_Z28__device_stub__gpuMatrixNormPfS_i,@function
_Z28__device_stub__gpuMatrixNormPfS_i:  # @_Z28__device_stub__gpuMatrixNormPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13gpuMatrixNormPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z28__device_stub__gpuMatrixNormPfS_i, .Lfunc_end5-_Z28__device_stub__gpuMatrixNormPfS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI6_0:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$72, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	callq	_Z17initialize_inputsv
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB6_1:                                # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_2 Depth 2
	movq	$-36000, %rdx                   # imm = 0xFFFF7360
.LBB6_2:                                #   Parent Loop BB6_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	A+36000(%rax,%rdx), %xmm0       # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, flattenA+36000(%rax,%rdx)
	movss	B+36000(%rax,%rdx), %xmm0       # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, flattenB+36000(%rax,%rdx)
	addq	$4, %rdx
	jne	.LBB6_2
# %bb.3:                                #   in Loop: Header=BB6_1 Depth=1
	incq	%rcx
	addq	$36000, %rax                    # imm = 0x8CA0
	cmpq	$9000, %rcx                     # imm = 0x2328
	jne	.LBB6_1
# %bb.4:                                # %_Z12flattenArrayv.exit
	leaq	36(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	movl	(%rbx), %edi
	callq	_Z14getCudaDevicesi
	leaq	32(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipRuntimeGetVersion
	leaq	28(%rsp), %r14
	movq	%r14, %rdi
	callq	hipDriverGetVersion
	movl	(%rbx), %esi
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	movl	(%r14), %esi
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$.L.str.9, %edi
	movl	$9000, %esi                     # imm = 0x2328
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	leaq	40(%rsp), %rdi
	leaq	20(%rsp), %rsi
	callq	gettimeofday
	leaq	8(%rsp), %rbx
	movl	$324000000, %esi                # imm = 0x134FD900
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$324000000, %esi                # imm = 0x134FD900
	callq	hipMalloc
	movq	(%rbx), %rdi
	movl	$flattenA, %esi
	movl	$324000000, %edx                # imm = 0x134FD900
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294976296, %rdi               # imm = 0x100002328
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_6
# %bb.5:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$9000, %edx                     # imm = 0x2328
	callq	_Z28__device_stub__gpuMatrixNormPfS_i
.LBB6_6:
	movq	(%rsp), %rsi
	movl	$flattenB, %edi
	movl	$324000000, %edx                # imm = 0x134FD900
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	56(%rsp), %rbx
	leaq	20(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	movq	(%rbx), %rcx
	movq	8(%rbx), %rax
	subq	40(%rsp), %rcx
	imulq	$1000000, %rcx, %rcx            # imm = 0xF4240
	subq	48(%rsp), %rax
	addq	%rcx, %rax
	js	.LBB6_7
# %bb.8:
	cvtsi2ss	%rax, %xmm0
	jmp	.LBB6_9
.LBB6_7:
	movq	%rax, %rcx
	shrq	%rcx
	andl	$1, %eax
	orq	%rcx, %rax
	cvtsi2ss	%rax, %xmm0
	addss	%xmm0, %xmm0
.LBB6_9:
	divss	.LCPI6_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.11, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.12, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%edi, %edi
	callq	exit
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13gpuMatrixNormPfS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	A,@object                       # @A
	.bss
	.globl	A
	.p2align	4, 0x0
A:
	.zero	324000000
	.size	A, 324000000

	.type	B,@object                       # @B
	.globl	B
	.p2align	4, 0x0
B:
	.zero	324000000
	.size	B, 324000000

	.type	flattenA,@object                # @flattenA
	.globl	flattenA
	.p2align	4, 0x0
flattenA:
	.zero	324000000
	.size	flattenA, 324000000

	.type	flattenB,@object                # @flattenB
	.globl	flattenB
	.p2align	4, 0x0
flattenB:
	.zero	324000000
	.size	flattenB, 324000000

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Device Number: %d\n"
	.size	.L.str, 19

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"  Device name: %s\n"
	.size	.L.str.1, 19

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"  Memory Clock Rate (KHz): %d\n"
	.size	.L.str.2, 31

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"  Memory Bus Width (bits): %d\n"
	.size	.L.str.3, 31

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"  Peak Memory Bandwidth (GB/s): %f\n\n"
	.size	.L.str.4, 37

	.type	_Z13gpuMatrixNormPfS_i,@object  # @_Z13gpuMatrixNormPfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z13gpuMatrixNormPfS_i
	.p2align	3, 0x0
_Z13gpuMatrixNormPfS_i:
	.quad	_Z28__device_stub__gpuMatrixNormPfS_i
	.size	_Z13gpuMatrixNormPfS_i, 8

	.type	.L.str.6,@object                # @.str.6
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.6:
	.asciz	"Cuda Runtime Version: %i\n"
	.size	.L.str.6, 26

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Cuda Driver Version: %i\n"
	.size	.L.str.7, 25

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Matrix size N = %d"
	.size	.L.str.9, 19

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"GPU Runtime = %g ms.\n"
	.size	.L.str.11, 22

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"\nStopped clock for GPU."
	.size	.L.str.12, 24

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13gpuMatrixNormPfS_i"
	.size	.L__unnamed_1, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"---- Initialized inputs ----"
	.size	.Lstr, 29

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"---------------------------------------------"
	.size	.Lstr.1, 46

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\nStarting clock for GPU.\n"
	.size	.Lstr.2, 26

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"\n---------------------------------------------"
	.size	.Lstr.3, 47

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"---- Results ----"
	.size	.Lstr.4, 18

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__gpuMatrixNormPfS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym A
	.addrsig_sym B
	.addrsig_sym flattenA
	.addrsig_sym flattenB
	.addrsig_sym _Z13gpuMatrixNormPfS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13gpuMatrixNormPfS_i  ; -- Begin function _Z13gpuMatrixNormPfS_i
	.globl	_Z13gpuMatrixNormPfS_i
	.p2align	8
	.type	_Z13gpuMatrixNormPfS_i,@function
_Z13gpuMatrixNormPfS_i:                 ; @_Z13gpuMatrixNormPfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s2, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_12
; %bb.1:                                ; %.preheader
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v0, 0
	s_cmp_gt_i32 s2, 0
	s_cselect_b32 s0, -1, 0
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	v_mov_b32_e32 v2, v1
	s_mov_b32 s1, s2
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_add_i32 s1, s1, -1
	s_cmp_eq_u32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_add_nc_u32_e32 v2, s2, v2
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v3
	s_cbranch_scc0 .LBB0_3
.LBB0_4:                                ; %._crit_edge
	v_cvt_f32_i32_e32 v4, s2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_div_scale_f32 v2, null, v4, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v5, v3
	v_div_scale_f32 v5, vcc_lo, v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v5, v3
	v_fma_f32 v6, -v2, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v7, v6, v3
	v_cndmask_b32_e64 v6, 0, 1, s0
	v_fma_f32 v2, -v2, v7, v5
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v2, v2, v3, v7
	s_and_not1_b32 vcc_lo, exec_lo, s0
	v_div_fixup_f32 v0, v2, v4, v0
	s_cbranch_vccnz .LBB0_7
; %bb.5:                                ; %.lr.ph54.preheader
	v_mov_b32_e32 v2, v1
	s_mov_b32 s3, 0x3e76c4e1
	s_mov_b32 s8, s2
.LBB0_6:                                ; %.lr.ph54
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_add_i32 s8, s8, -1
	v_lshlrev_b64 v[7:8], 2, v[2:3]
	v_add_nc_u32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v3, v[7:8], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v3, v3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f32_e64 v7, |v3|
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v7
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v7, v7, v8
	v_add_f32_e32 v8, 1.0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v9, v8
	v_add_f32_e32 v12, -1.0, v8
	v_dual_add_f32 v10, -1.0, v7 :: v_dual_sub_f32 v7, v7, v12
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v11, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v13, v8, v11
	v_fma_f32 v8, v11, v8, -v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v11, v7
	v_add_f32_e32 v7, v13, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v12, v10, v7 :: v_dual_sub_f32 v13, v7, v13
	v_sub_f32_e32 v8, v13, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v10, v10, v12
	v_sub_f32_e32 v7, v10, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v8, v7
	v_add_f32_e32 v7, v12, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v9, v7
	v_add_f32_e32 v8, v11, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v8, v11
	v_dual_mul_f32 v10, v8, v8 :: v_dual_sub_f32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v9, v8, v8, -v10
	v_add_f32_e32 v11, v7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v8, v11
	v_add_f32_e32 v11, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmaak_f32 v12, s3, v11, 0x3e91f4c4
	v_sub_f32_e32 v10, v11, v10
	v_dual_fmaak_f32 v12, v11, v12, 0x3ecccdef :: v_dual_sub_f32 v9, v9, v10
	v_mul_f32_e32 v15, v8, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v13, v11, v12
	v_fma_f32 v16, v11, v8, -v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, v11, v12, -v13
	v_fmac_f32_e32 v10, v9, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v16, v11, v7
	v_ldexp_f32 v7, v7, 1
	v_add_f32_e32 v12, v13, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v16, v9, v8
	v_ldexp_f32 v8, v8, 1
	v_dual_sub_f32 v13, v12, v13 :: v_dual_add_f32 v14, 0x3f2aaaaa, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v10, v10, v13 :: v_dual_add_f32 v13, 0xbf2aaaaa, v14
	v_add_f32_e32 v10, 0x31739010, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v12, v12, v13
	v_add_f32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v14, v10
	v_dual_add_f32 v11, v15, v16 :: v_dual_sub_f32 v12, v14, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v13, v11, v9
	v_sub_f32_e32 v14, v11, v15
	v_add_f32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v12, v11, v9, -v13
	v_sub_f32_e32 v14, v16, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v12, v11, v10
	v_frexp_exp_i32_f32_e32 v10, v3
	v_fmac_f32_e32 v12, v14, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v9, vcc_lo, 0, v10, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v3
	v_add_f32_e32 v10, v13, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v9, v9
	v_add_f32_e32 v11, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v13, v10, v13 :: v_dual_sub_f32 v8, v11, v8
	v_sub_f32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v14, 0x3f317218, v9
	v_sub_f32_e32 v8, v10, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v7, v7, v12
	v_fma_f32 v13, 0x3f317218, v9, -v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v7, v7, v8
	v_fmac_f32_e32 v13, 0xb102e308, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v9, v11, v7 :: v_dual_add_f32 v8, v14, v13
	v_sub_f32_e32 v11, v9, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v7, v7, v11 :: v_dual_add_f32 v10, v8, v9
	v_sub_f32_e32 v12, v10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v9, v9, v12 :: v_dual_sub_f32 v14, v8, v14
	v_sub_f32_e32 v13, v13, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v13, v7
	v_sub_f32_e32 v15, v10, v12
	v_sub_f32_e32 v8, v8, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v8, v9, v8 :: v_dual_sub_f32 v9, v11, v13
	v_sub_f32_e32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v11, v8
	v_sub_f32_e32 v11, v11, v9
	v_dual_sub_f32 v9, v13, v11 :: v_dual_add_f32 v12, v10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_add_f32 v7, v7, v9 :: v_dual_sub_f32 v10, v12, v10
	v_cndmask_b32_e64 v9, 2.0, 1.0, vcc_lo
	v_sub_f32_e32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v7, v8
	v_add_f32_e32 v8, v12, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v10, v8, v12
	v_sub_f32_e32 v7, v7, v10
	v_mul_f32_e32 v11, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v8, v9, v8, -v11
	v_cmp_class_f32_e64 vcc_lo, v11, 0x204
	v_fmac_f32_e32 v8, v9, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v11, v8
	v_cndmask_b32_e32 v10, v7, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v10
	v_cndmask_b32_e64 v12, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v10|
	v_sub_f32_e32 v13, v10, v12
	v_trunc_f32_e32 v10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v14, 0x3fb8aa3b, v13
	v_fma_f32 v15, 0x3fb8aa3b, v13, -v14
	v_rndne_f32_e32 v16, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v15, 0x32a5705f, v13 :: v_dual_sub_f32 v14, v14, v16
	v_add_f32_e32 v14, v14, v15
	v_sub_f32_e32 v7, v7, v11
	v_cvt_i32_f32_e32 v11, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v14, v14
	v_sub_f32_e32 v7, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v13
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v8, v14, v11
	v_dual_mul_f32 v11, 0.5, v9 :: v_dual_cndmask_b32 v8, 0, v8
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_trunc_f32_e32 v14, v11
	v_dual_add_f32 v7, v12, v7 :: v_dual_cndmask_b32 v8, 0x7f800000, v8
	v_cmp_eq_f32_e32 vcc_lo, v10, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f32_e64 s0, v14, v11
	v_fma_f32 v7, v8, v7, v8
	v_cmp_eq_f32_e64 s1, 0x7f800000, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	v_cndmask_b32_e64 v9, 1.0, v3, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v8, s1
	v_cmp_eq_f32_e64 s1, 0, v3
	v_bfi_b32 v7, 0x7fffffff, v7, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v8, 0x7f800000, 0, s1
	v_cndmask_b32_e64 v9, 0, v3, s0
	v_cmp_class_f32_e64 s0, v3, 0x204
	v_cndmask_b32_e32 v10, 0x7fc00000, v7, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfi_b32 v8, 0x7fffffff, v8, v9
	v_cndmask_b32_e32 v7, v7, v10, vcc_lo
	s_or_b32 vcc_lo, s1, s0
	s_cmp_eq_u32 s8, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, v7, v8, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v3, v3
	v_cndmask_b32_e32 v3, 0x7fc00000, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v5, v5, v3
	s_cbranch_scc0 .LBB0_6
.LBB0_7:                                ; %._crit_edge55
	v_cmp_ne_u32_e32 vcc_lo, 1, v6
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_12
; %bb.8:                                ; %.lr.ph59
	v_div_scale_f32 v2, null, v4, v4, v5
	v_div_scale_f32 v7, vcc_lo, v5, v4, v5
	s_mov_b32 s1, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v7, v3
	v_fma_f32 v8, -v2, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v8, v3
	v_fma_f32 v2, -v2, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v2, v2, v3, v6
	v_div_fixup_f32 v2, v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v3, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v4, -1, v3
	v_add_nc_u32_e32 v5, 1, v3
	v_fma_f32 v6, -v4, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v5, v3, v2
	v_cmp_ge_f32_e64 s0, 0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, v3, v4, s0
	v_cmp_lt_f32_e64 s0, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v3, v5, s0
	v_mul_f32_e32 v4, 0x37800000, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	v_cndmask_b32_e32 v4, v3, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_neq_f32_e64 s0, 0, v4
.LBB0_9:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v5, v5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v6, null, v4, v4, v5
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v6, v7, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v7
	v_div_scale_f32 v8, vcc_lo, v5, v4, v5
	v_mul_f32_e32 v9, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, -v6, v9, v8
	v_fmac_f32_e32 v9, v10, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v6, v9, v8
	v_div_fmas_f32 v6, v6, v7, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v5, v6, v4, v5
.LBB0_11:                               ;   in Loop: Header=BB0_9 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	v_add_nc_u32_e32 v1, s2, v1
	s_add_i32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s1, 0
	global_store_b32 v[2:3], v5, off
	s_cbranch_scc1 .LBB0_9
.LBB0_12:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13gpuMatrixNormPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13gpuMatrixNormPfS_i, .Lfunc_end0-_Z13gpuMatrixNormPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1916
; NumSgprs: 18
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13gpuMatrixNormPfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13gpuMatrixNormPfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
