//双线性插值
__global__ void zoomOutIn(const int n, const float*src, int srcWidth, int srcHeight, \
	float *dst, int dstWidth, int dstHeight) {

	float srcColTidf;
	float srcRowTidf;
	float c, r;
	const float rowScale = srcHeight / (float)(dstHeight);
	const float colScale = srcWidth / (float)(dstWidth);
	//int tid = blockIdx.x * blockDim.x + threadIdx.x;
	for (int i = blockIdx.x * blockDim.x + threadIdx.x; \
		i < (n); \
		i += blockDim.x * gridDim.x) {
		int tidC = i;
		int tidR = i;// *colScaleExtend;
		float srcColTidf = (float)((tidC % (dstWidth)) * colScale);
		float srcRowTidf = (float)((tidR / (dstWidth)) * rowScale);
		int srcColTid = (int)srcColTidf;
		int srcRowTid = (int)srcRowTidf;
		c = srcColTidf - srcColTid;
		r = srcRowTidf - srcRowTid;

		int dstInd = i;
		int srcInd = srcRowTid * srcWidth + srcColTid;
		dst[dstInd] = 0;
		dst[dstInd] += (1 - c)*(1 - r)*src[srcRowTid * srcWidth + srcColTid];
		dst[dstInd] += (1 - c)*r*src[(srcRowTid + 1)*srcWidth + srcColTid];
		dst[dstInd] += c*(1 - r)*src[srcRowTid*srcWidth + srcColTid + 1];
		dst[dstInd] += c*r*src[(srcRowTid + 1)*srcWidth + srcColTid + 1];
	}
}

//双三次插值
__global__ void zoomCubicOutIn(const int n, const float*src, int srcWidth, int srcHeight, \
	float *dst, int dstWidth, int dstHeight) {

	float srcColTidf;
	float srcRowTidf;
	float c, r;
	float A = -0.75;
	const float rowScale = srcHeight / (float)(dstHeight);
	const float colScale = srcWidth / (float)(dstWidth);
	//int tid = blockIdx.x * blockDim.x + threadIdx.x;
	for (int i = blockIdx.x * blockDim.x + threadIdx.x; \
		i < (n); \
		i += blockDim.x * gridDim.x) {
		int tidC = i;
		int tidR = i;// *colScaleExtend;
		float srcColTidf = (float)((tidC % (dstWidth)) * colScale);
		float srcRowTidf = (float)((tidR / (dstWidth)) * rowScale);
		int srcColTid = (int)srcColTidf;
		int srcRowTid = (int)srcRowTidf;
		c = srcColTidf - srcColTid;
		r = srcRowTidf - srcRowTid;

		int dstInd = i;
		int srcInd = srcRowTid * srcWidth + srcColTid;
		dst[dstInd] = 0;

		{
			//
			float coeffsY[4];
			coeffsY[0] = ((A*(r + 1) - 5 * A)*(r + 1) + 8 * A)*(r + 1) - 4 * A;
			coeffsY[1] = ((A + 2)*r - (A + 3))*r*r + 1;
			coeffsY[2] = ((A + 2)*(1 - r) - (A + 3))*(1 - r)*(1 - r) + 1;
			coeffsY[3] = 1.f - coeffsY[0] - coeffsY[1] - coeffsY[2];

			float coeffsX[4];
			coeffsX[0] = ((A*(c + 1) - 5 * A)*(c + 1) + 8 * A)*(c + 1) - 4 * A;
			coeffsX[1] = ((A + 2)*c - (A + 3))*c*c + 1;
			coeffsX[2] = ((A + 2)*(1 - c) - (A + 3))*(1 - c)*(1 - c) + 1;
			coeffsX[3] = 1.f - coeffsX[0] - coeffsX[1] - coeffsX[2];

			dst[dstInd] =
				src[(srcRowTid - 1) * srcWidth + (srcColTid - 1)] * coeffsX[0] * coeffsY[0] \
				+ src[(srcRowTid)* srcWidth + (srcColTid - 1)] * coeffsX[0] * coeffsY[1] \
				+ src[(srcRowTid + 1) * srcWidth + (srcColTid - 1)] * coeffsX[0] * coeffsY[2] \
				+ src[(srcRowTid + 2) * srcWidth + (srcColTid - 1)] * coeffsX[0] * coeffsY[3] \
				+ src[(srcRowTid - 1) * srcWidth + (srcColTid)] * coeffsX[1] * coeffsY[0] \
				+ src[(srcRowTid)* srcWidth + (srcColTid)] * coeffsX[1] * coeffsY[1] \
				+ src[(srcRowTid + 1) * srcWidth + (srcColTid)] * coeffsX[1] * coeffsY[2] \
				+ src[(srcRowTid + 2) * srcWidth + (srcColTid)] * coeffsX[1] * coeffsY[3] \
				+ src[(srcRowTid - 1) * srcWidth + (srcColTid + 1)] * coeffsX[2] * coeffsY[0] \
				+ src[(srcRowTid)* srcWidth + (srcColTid + 1)] * coeffsX[2] * coeffsY[1] \
				+ src[(srcRowTid + 1) * srcWidth + (srcColTid + 1)] * coeffsX[2] * coeffsY[2] \
				+ src[(srcRowTid + 2) * srcWidth + (srcColTid + 1)] * coeffsX[2] * coeffsY[3] \
				+ src[(srcRowTid - 1) * srcWidth + (srcColTid + 2)] * coeffsX[3] * coeffsY[0] \
				+ src[(srcRowTid)* srcWidth + (srcColTid + 2)] * coeffsX[3] * coeffsY[1] \
				+ src[(srcRowTid + 1) * srcWidth + (srcColTid + 2)] * coeffsX[3] * coeffsY[2] \
				+ src[(srcRowTid + 2) * srcWidth + (srcColTid + 2)] * coeffsX[3] * coeffsY[3];
		}
	}
}

	.file	"tmpxft_002a5878_00000000-6_cuResize.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z36__device_stub__Z9zoomOutIniPKfiiPfiiiPKfiiPfii
	.type	_Z36__device_stub__Z9zoomOutIniPKfiiPfiiiPKfiiPfii, @function
_Z36__device_stub__Z9zoomOutIniPKfiiPfiiiPKfiiPfii:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z9zoomOutIniPKfiiPfii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 192
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z36__device_stub__Z9zoomOutIniPKfiiPfiiiPKfiiPfii, .-_Z36__device_stub__Z9zoomOutIniPKfiiPfiiiPKfiiPfii
	.globl	_Z9zoomOutIniPKfiiPfii
	.type	_Z9zoomOutIniPKfiiPfii, @function
_Z9zoomOutIniPKfiiPfii:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z9zoomOutIniPKfiiPfiiiPKfiiPfii
	.cfi_endproc
.LFE2033:
	.size	_Z9zoomOutIniPKfiiPfii, .-_Z9zoomOutIniPKfiiPfii
	.globl	_Z42__device_stub__Z14zoomCubicOutIniPKfiiPfiiiPKfiiPfii
	.type	_Z42__device_stub__Z14zoomCubicOutIniPKfiiPfiiiPKfiiPfii, @function
_Z42__device_stub__Z14zoomCubicOutIniPKfiiPfiiiPKfiiPfii:
.LFB2034:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z14zoomCubicOutIniPKfiiPfii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 192
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L8:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z42__device_stub__Z14zoomCubicOutIniPKfiiPfiiiPKfiiPfii, .-_Z42__device_stub__Z14zoomCubicOutIniPKfiiPfiiiPKfiiPfii
	.globl	_Z14zoomCubicOutIniPKfiiPfii
	.type	_Z14zoomCubicOutIniPKfiiPfii, @function
_Z14zoomCubicOutIniPKfiiPfii:
.LFB2035:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z14zoomCubicOutIniPKfiiPfiiiPKfiiPfii
	.cfi_endproc
.LFE2035:
	.size	_Z14zoomCubicOutIniPKfiiPfii, .-_Z14zoomCubicOutIniPKfiiPfii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z14zoomCubicOutIniPKfiiPfii"
.LC1:
	.string	"_Z9zoomOutIniPKfiiPfii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14zoomCubicOutIniPKfiiPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9zoomOutIniPKfiiPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2037:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
//双线性插值
__global__ void zoomOutIn(const int n, const float*src, int srcWidth, int srcHeight, \
	float *dst, int dstWidth, int dstHeight) {

	float srcColTidf;
	float srcRowTidf;
	float c, r;
	const float rowScale = srcHeight / (float)(dstHeight);
	const float colScale = srcWidth / (float)(dstWidth);
	//int tid = blockIdx.x * blockDim.x + threadIdx.x;
	for (int i = blockIdx.x * blockDim.x + threadIdx.x; \
		i < (n); \
		i += blockDim.x * gridDim.x) {
		int tidC = i;
		int tidR = i;// *colScaleExtend;
		float srcColTidf = (float)((tidC % (dstWidth)) * colScale);
		float srcRowTidf = (float)((tidR / (dstWidth)) * rowScale);
		int srcColTid = (int)srcColTidf;
		int srcRowTid = (int)srcRowTidf;
		c = srcColTidf - srcColTid;
		r = srcRowTidf - srcRowTid;

		int dstInd = i;
		int srcInd = srcRowTid * srcWidth + srcColTid;
		dst[dstInd] = 0;
		dst[dstInd] += (1 - c)*(1 - r)*src[srcRowTid * srcWidth + srcColTid];
		dst[dstInd] += (1 - c)*r*src[(srcRowTid + 1)*srcWidth + srcColTid];
		dst[dstInd] += c*(1 - r)*src[srcRowTid*srcWidth + srcColTid + 1];
		dst[dstInd] += c*r*src[(srcRowTid + 1)*srcWidth + srcColTid + 1];
	}
}

//双三次插值
__global__ void zoomCubicOutIn(const int n, const float*src, int srcWidth, int srcHeight, \
	float *dst, int dstWidth, int dstHeight) {

	float srcColTidf;
	float srcRowTidf;
	float c, r;
	float A = -0.75;
	const float rowScale = srcHeight / (float)(dstHeight);
	const float colScale = srcWidth / (float)(dstWidth);
	//int tid = blockIdx.x * blockDim.x + threadIdx.x;
	for (int i = blockIdx.x * blockDim.x + threadIdx.x; \
		i < (n); \
		i += blockDim.x * gridDim.x) {
		int tidC = i;
		int tidR = i;// *colScaleExtend;
		float srcColTidf = (float)((tidC % (dstWidth)) * colScale);
		float srcRowTidf = (float)((tidR / (dstWidth)) * rowScale);
		int srcColTid = (int)srcColTidf;
		int srcRowTid = (int)srcRowTidf;
		c = srcColTidf - srcColTid;
		r = srcRowTidf - srcRowTid;

		int dstInd = i;
		int srcInd = srcRowTid * srcWidth + srcColTid;
		dst[dstInd] = 0;

		{
			//
			float coeffsY[4];
			coeffsY[0] = ((A*(r + 1) - 5 * A)*(r + 1) + 8 * A)*(r + 1) - 4 * A;
			coeffsY[1] = ((A + 2)*r - (A + 3))*r*r + 1;
			coeffsY[2] = ((A + 2)*(1 - r) - (A + 3))*(1 - r)*(1 - r) + 1;
			coeffsY[3] = 1.f - coeffsY[0] - coeffsY[1] - coeffsY[2];

			float coeffsX[4];
			coeffsX[0] = ((A*(c + 1) - 5 * A)*(c + 1) + 8 * A)*(c + 1) - 4 * A;
			coeffsX[1] = ((A + 2)*c - (A + 3))*c*c + 1;
			coeffsX[2] = ((A + 2)*(1 - c) - (A + 3))*(1 - c)*(1 - c) + 1;
			coeffsX[3] = 1.f - coeffsX[0] - coeffsX[1] - coeffsX[2];

			dst[dstInd] =
				src[(srcRowTid - 1) * srcWidth + (srcColTid - 1)] * coeffsX[0] * coeffsY[0] \
				+ src[(srcRowTid)* srcWidth + (srcColTid - 1)] * coeffsX[0] * coeffsY[1] \
				+ src[(srcRowTid + 1) * srcWidth + (srcColTid - 1)] * coeffsX[0] * coeffsY[2] \
				+ src[(srcRowTid + 2) * srcWidth + (srcColTid - 1)] * coeffsX[0] * coeffsY[3] \
				+ src[(srcRowTid - 1) * srcWidth + (srcColTid)] * coeffsX[1] * coeffsY[0] \
				+ src[(srcRowTid)* srcWidth + (srcColTid)] * coeffsX[1] * coeffsY[1] \
				+ src[(srcRowTid + 1) * srcWidth + (srcColTid)] * coeffsX[1] * coeffsY[2] \
				+ src[(srcRowTid + 2) * srcWidth + (srcColTid)] * coeffsX[1] * coeffsY[3] \
				+ src[(srcRowTid - 1) * srcWidth + (srcColTid + 1)] * coeffsX[2] * coeffsY[0] \
				+ src[(srcRowTid)* srcWidth + (srcColTid + 1)] * coeffsX[2] * coeffsY[1] \
				+ src[(srcRowTid + 1) * srcWidth + (srcColTid + 1)] * coeffsX[2] * coeffsY[2] \
				+ src[(srcRowTid + 2) * srcWidth + (srcColTid + 1)] * coeffsX[2] * coeffsY[3] \
				+ src[(srcRowTid - 1) * srcWidth + (srcColTid + 2)] * coeffsX[3] * coeffsY[0] \
				+ src[(srcRowTid)* srcWidth + (srcColTid + 2)] * coeffsX[3] * coeffsY[1] \
				+ src[(srcRowTid + 1) * srcWidth + (srcColTid + 2)] * coeffsX[3] * coeffsY[2] \
				+ src[(srcRowTid + 2) * srcWidth + (srcColTid + 2)] * coeffsX[3] * coeffsY[3];
		}
	}
}

	.text
	.file	"cuResize.hip"
	.globl	_Z24__device_stub__zoomOutIniPKfiiPfii # -- Begin function _Z24__device_stub__zoomOutIniPKfiiPfii
	.type	_Z24__device_stub__zoomOutIniPKfiiPfii,@function
_Z24__device_stub__zoomOutIniPKfiiPfii: # @_Z24__device_stub__zoomOutIniPKfiiPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9zoomOutIniPKfiiPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__zoomOutIniPKfiiPfii, .Lfunc_end0-_Z24__device_stub__zoomOutIniPKfiiPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__zoomCubicOutIniPKfiiPfii # -- Begin function _Z29__device_stub__zoomCubicOutIniPKfiiPfii
	.type	_Z29__device_stub__zoomCubicOutIniPKfiiPfii,@function
_Z29__device_stub__zoomCubicOutIniPKfiiPfii: # @_Z29__device_stub__zoomCubicOutIniPKfiiPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14zoomCubicOutIniPKfiiPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z29__device_stub__zoomCubicOutIniPKfiiPfii, .Lfunc_end1-_Z29__device_stub__zoomCubicOutIniPKfiiPfii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9zoomOutIniPKfiiPfii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14zoomCubicOutIniPKfiiPfii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9zoomOutIniPKfiiPfii,@object  # @_Z9zoomOutIniPKfiiPfii
	.section	.rodata,"a",@progbits
	.globl	_Z9zoomOutIniPKfiiPfii
	.p2align	3, 0x0
_Z9zoomOutIniPKfiiPfii:
	.quad	_Z24__device_stub__zoomOutIniPKfiiPfii
	.size	_Z9zoomOutIniPKfiiPfii, 8

	.type	_Z14zoomCubicOutIniPKfiiPfii,@object # @_Z14zoomCubicOutIniPKfiiPfii
	.globl	_Z14zoomCubicOutIniPKfiiPfii
	.p2align	3, 0x0
_Z14zoomCubicOutIniPKfiiPfii:
	.quad	_Z29__device_stub__zoomCubicOutIniPKfiiPfii
	.size	_Z14zoomCubicOutIniPKfiiPfii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z9zoomOutIniPKfiiPfii"
	.size	.L__unnamed_1, 23

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z14zoomCubicOutIniPKfiiPfii"
	.size	.L__unnamed_2, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__zoomOutIniPKfiiPfii
	.addrsig_sym _Z29__device_stub__zoomCubicOutIniPKfiiPfii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9zoomOutIniPKfiiPfii
	.addrsig_sym _Z14zoomCubicOutIniPKfiiPfii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9zoomOutIniPKfiiPfii  ; -- Begin function _Z9zoomOutIniPKfiiPfii
	.globl	_Z9zoomOutIniPKfiiPfii
	.p2align	8
	.type	_Z9zoomOutIniPKfiiPfii,@function
_Z9zoomOutIniPKfiiPfii:                 ; @_Z9zoomOutIniPKfiiPfii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x34
	s_load_b32 s12, s[0:1], 0x0
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s13, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s13, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b256 s[4:11], s[0:1], 0x8
	s_load_b32 s2, s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_i32_e32 v2, s7
	v_cvt_f32_i32_e32 v3, s11
	v_cvt_f32_i32_e32 v4, s6
	v_cvt_f32_i32_e32 v5, s10
	s_ashr_i32 s1, s10, 31
	s_sub_i32 s3, 0, s10
	v_div_scale_f32 v0, null, v3, v3, v2
	s_add_i32 s0, s10, s1
	v_div_scale_f32 v6, null, v5, v5, v4
	s_xor_b32 s7, s0, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v7, v0
	v_cvt_f32_u32_e32 v9, s7
	v_rcp_f32_e32 v8, v6
	v_div_scale_f32 v12, vcc_lo, v2, v3, v2
	s_sub_i32 s11, 0, s7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_3)
	v_rcp_iflag_f32_e32 v9, v9
	v_fma_f32 v10, -v0, v7, 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v6, v8, 1.0
	v_fmac_f32_e32 v7, v10, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v9, 0x4f7ffffe, v9 :: v_dual_fmac_f32 v8, v11, v8
	v_div_scale_f32 v10, s0, v4, v5, v4
	v_cvt_u32_f32_e32 v9, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v11, v12, v7
	v_mul_f32_e32 v13, v10, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v16, s11, v9
	v_fma_f32 v14, -v0, v11, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v15, -v6, v13, v10
	v_fmac_f32_e32 v11, v14, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v13, v15, v8
	v_fma_f32 v0, -v0, v11, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v6, -v6, v13, v10
	v_mul_hi_u32 v12, v9, v16
	v_div_fmas_f32 v7, v0, v7, v11
	s_mov_b32 vcc_lo, s0
	s_mul_i32 s0, s2, s13
	v_div_fmas_f32 v6, v6, v8, v13
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v0, v9, v12
	v_div_fixup_f32 v3, v7, v3, v2
	v_div_fixup_f32 v4, v6, v5, v4
	v_mov_b32_e32 v5, 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v1, v2
	v_xor_b32_e32 v6, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v7, v6, v0
	v_mul_lo_u32 v8, v7, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v6, v6, v8
	v_add_nc_u32_e32 v8, 1, v7
	v_subrev_nc_u32_e32 v9, s7, v6
	v_cmp_le_u32_e32 vcc_lo, s7, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v7, v7, v8 :: v_dual_cndmask_b32 v6, v6, v9
	v_xor_b32_e32 v9, s1, v2
	v_add_nc_u32_e32 v8, 1, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s7, v6
	v_cndmask_b32_e32 v6, v7, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v6, v6, v9
	v_sub_nc_u32_e32 v8, v6, v9
	v_lshlrev_b64 v[9:10], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[6:7], null, s3, v8, v[1:2]
	v_cvt_f32_i32_e32 v13, v8
	v_add_nc_u32_e32 v1, s0, v1
	v_cvt_f32_i32_e32 v14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v6, v3, v13 :: v_dual_mul_f32 v7, v4, v14
	v_cvt_i32_f32_e32 v15, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v6, v7
	v_mad_u64_u32 v[7:8], null, v15, s6, v[6:7]
	v_cvt_f32_i32_e32 v6, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[11:12], 2, v[7:8]
	v_add_co_u32 v8, vcc_lo, s8, v9
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v10, vcc_lo, s4, v11
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v12, vcc_lo
	global_store_b32 v[8:9], v5, off
	v_cvt_f32_i32_e32 v12, v15
	global_load_b32 v2, v[10:11], off
	v_fma_f32 v12, v3, v13, -v12
	v_fma_f32 v13, v4, v14, -v6
	v_add_nc_u32_e32 v6, s6, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v14, 1.0, v12 :: v_dual_sub_f32 v15, 1.0, v13
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, v15, v14
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_mul_f32_e32 v15, v15, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s12, v1
	s_or_b32 s2, vcc_lo, s2
	s_waitcnt vmcnt(0)
	v_fma_f32 v2, v2, v16, 0
	global_store_b32 v[8:9], v2, off
	global_load_b32 v16, v[6:7], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v2, v16, v15
	global_store_b32 v[8:9], v2, off
	global_load_b32 v10, v[10:11], off offset:4
	v_mul_f32_e32 v11, v13, v14
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v10, v11
	global_store_b32 v[8:9], v2, off
	global_load_b32 v6, v[6:7], off offset:4
	v_mul_f32_e32 v7, v13, v12
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v2, v7, v6
	global_store_b32 v[8:9], v2, off
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow79
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9zoomOutIniPKfiiPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9zoomOutIniPKfiiPfii, .Lfunc_end0-_Z9zoomOutIniPKfiiPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 800
; NumSgprs: 18
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14zoomCubicOutIniPKfiiPfii ; -- Begin function _Z14zoomCubicOutIniPKfiiPfii
	.globl	_Z14zoomCubicOutIniPKfiiPfii
	.p2align	8
	.type	_Z14zoomCubicOutIniPKfiiPfii,@function
_Z14zoomCubicOutIniPKfiiPfii:           ; @_Z14zoomCubicOutIniPKfiiPfii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x34
	s_load_b32 s12, s[0:1], 0x0
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s13, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s13, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.lr.ph
	s_load_b256 s[4:11], s[0:1], 0x8
	s_load_b32 s3, s[2:3], 0x0
	s_mov_b32 s14, 0xbf400000
	s_mov_b32 s15, 0x3fa00000
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_i32_e32 v2, s7
	v_cvt_f32_i32_e32 v4, s11
	v_cvt_f32_i32_e32 v5, s6
	v_cvt_f32_i32_e32 v6, s10
	s_ashr_i32 s1, s10, 31
	s_mul_i32 s3, s3, s13
	v_div_scale_f32 v3, null, v4, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v7, null, v6, v6, v5
	s_add_i32 s0, s10, s1
	v_rcp_f32_e32 v8, v3
	s_xor_b32 s7, s0, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v9, v7
	v_cvt_f32_u32_e32 v0, s7
	v_div_scale_f32 v12, vcc_lo, v2, v4, v2
	s_sub_i32 s2, 0, s7
	v_rcp_iflag_f32_e32 v0, v0
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f32 v10, -v3, v8, 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v7, v9, 1.0
	v_fmac_f32_e32 v8, v10, v8
	v_div_scale_f32 v10, s0, v5, v6, v5
	v_dual_fmac_f32 v9, v11, v9 :: v_dual_mul_f32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v11, v12, v8
	v_mul_f32_e32 v13, v10, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_u32_f32_e32 v14, v0
	v_fma_f32 v0, -v3, v11, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v15, -v7, v13, v10
	v_mul_lo_u32 v16, s2, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v11, v0, v8 :: v_dual_mov_b32 v0, 0
	s_mov_b32 s2, 0
	v_fmac_f32_e32 v13, v15, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v3, -v3, v11, v12
	v_mul_hi_u32 v12, v14, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v7, -v7, v13, v10
	v_div_fmas_f32 v8, v3, v8, v11
	s_mov_b32 vcc_lo, s0
	s_add_u32 s0, s4, -4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_div_fmas_f32 v7, v7, v9, v13
	s_addc_u32 s11, s5, -1
	v_add_nc_u32_e32 v3, v14, v12
	v_div_fixup_f32 v4, v8, v4, v2
	s_lshl_b32 s13, s6, 1
	v_div_fixup_f32 v5, v7, v6, v5
	s_sub_i32 s10, 0, s10
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v1, v2
	v_xor_b32_e32 v6, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v7, v6, v3
	v_mul_lo_u32 v8, v7, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v6, v6, v8
	v_add_nc_u32_e32 v8, 1, v7
	v_subrev_nc_u32_e32 v9, s7, v6
	v_cmp_le_u32_e32 vcc_lo, s7, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v7, v7, v8 :: v_dual_cndmask_b32 v6, v6, v9
	v_xor_b32_e32 v9, s1, v2
	v_add_nc_u32_e32 v8, 1, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s7, v6
	v_cndmask_b32_e32 v6, v7, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v6, v6, v9
	v_sub_nc_u32_e32 v8, v6, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v24, v8
	v_mad_u64_u32 v[6:7], null, s10, v8, v[1:2]
	v_mul_f32_e32 v7, v4, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v25, v6
	v_cvt_i32_f32_e32 v26, v7
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_add_nc_u32_e32 v1, s3, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v2, v5, v25
	v_mul_lo_u32 v8, v26, s6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, s8, v6
	v_cvt_i32_f32_e32 v2, v2
	v_add_co_ci_u32_e32 v19, vcc_lo, s9, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v11, s6, v8
	v_ashrrev_i32_e32 v22, 31, v2
	v_ashrrev_i32_e32 v7, 31, v8
	v_add_nc_u32_e32 v6, v8, v2
	v_add_co_u32 v8, vcc_lo, v8, v2
	v_add_nc_u32_e32 v15, s13, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, v7, v22, vcc_lo
	v_ashrrev_i32_e32 v13, 31, v11
	v_add_co_u32 v12, vcc_lo, v11, v2
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_ashrrev_i32_e32 v17, 31, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v13, vcc_lo, v13, v22, vcc_lo
	v_add_nc_u32_e32 v21, s6, v15
	v_add_co_u32 v16, vcc_lo, v15, v2
	v_add_co_ci_u32_e32 v17, vcc_lo, v17, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_ashrrev_i32_e32 v23, 31, v21
	v_add_co_u32 v8, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
	v_add_nc_u32_e32 v20, v21, v2
	v_add_co_u32 v21, vcc_lo, v21, v2
	v_add_co_ci_u32_e32 v22, vcc_lo, v23, v22, vcc_lo
	v_add_co_u32 v12, vcc_lo, s0, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v13, vcc_lo
	global_store_b32 v[18:19], v0, off
	s_clause 0x1
	global_load_b32 v27, v[12:13], off
	global_load_b32 v28, v[8:9], off
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	v_lshlrev_b64 v[22:23], 2, v[21:22]
	v_ashrrev_i32_e32 v21, 31, v20
	v_add_nc_u32_e32 v10, v11, v2
	v_add_nc_u32_e32 v14, v15, v2
	v_cvt_f32_i32_e32 v2, v2
	v_add_co_u32 v16, vcc_lo, s0, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s11, v17, vcc_lo
	v_add_co_u32 v8, vcc_lo, s0, v22
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v23, vcc_lo
	global_load_b32 v29, v[16:17], off
	v_fma_f32 v2, v5, v25, -v2
	global_load_b32 v22, v[8:9], off
	v_lshlrev_b64 v[16:17], 2, v[20:21]
	v_cvt_f32_i32_e32 v20, v26
	v_add_f32_e32 v21, 1.0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v20, v4, v24, -v20
	v_add_f32_e32 v23, 1.0, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmaak_f32 v25, s14, v23, 0x40700000
	v_ashrrev_i32_e32 v7, 31, v6
	v_dual_fmaak_f32 v25, v23, v25, 0xc0c00000 :: v_dual_sub_f32 v30, 1.0, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_fmaak_f32 v23, v23, v25, 0x40400000
	v_fmaak_f32 v24, s14, v21, 0x40700000
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v24, v21, v24, 0xc0c00000
	v_fmaak_f32 v21, v21, v24, 0x40400000
	v_ashrrev_i32_e32 v11, 31, v10
	v_fmaak_f32 v26, s15, v20, 0xc0100000
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_add_co_u32 v10, vcc_lo, s4, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	v_add_co_u32 v12, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v7, vcc_lo
	s_clause 0x1
	global_load_b96 v[6:8], v[10:11], off
	global_load_b96 v[9:11], v[12:13], off
	s_waitcnt vmcnt(5)
	v_mul_f32_e32 v27, v27, v21
	s_waitcnt vmcnt(4)
	v_mul_f32_e32 v25, v28, v21
	v_ashrrev_i32_e32 v15, 31, v14
	v_mul_f32_e32 v26, v20, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	v_add_co_u32 v12, vcc_lo, s4, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v15, vcc_lo
	s_waitcnt vmcnt(3)
	v_mul_f32_e32 v29, v29, v21
	v_add_co_u32 v15, vcc_lo, s4, v16
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v17, vcc_lo
	s_clause 0x1
	global_load_b96 v[12:14], v[12:13], off
	global_load_b96 v[15:17], v[15:16], off
	v_fma_f32 v20, v20, v26, 1.0
	s_waitcnt vmcnt(4)
	v_mul_f32_e32 v22, v22, v21
	v_fmaak_f32 v24, s15, v30, 0xc0100000
	v_cmp_le_i32_e32 vcc_lo, s12, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v25, v20, v25 :: v_dual_mul_f32 v24, v30, v24
	s_or_b32 s2, vcc_lo, s2
	v_fmac_f32_e32 v25, v27, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v24, v30, v24, 1.0
	v_dual_sub_f32 v28, 1.0, v23 :: v_dual_fmac_f32 v25, v24, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v28, v28, v20
	v_dual_fmaak_f32 v26, s15, v2, 0xc0100000 :: v_dual_sub_f32 v27, v28, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v26, v2, v26
	v_fmac_f32_e32 v25, v22, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v26, v2, v26, 1.0
	s_waitcnt vmcnt(3)
	v_mul_f32_e32 v6, v6, v26
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v9, v9, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v25, v6, v23
	s_waitcnt vmcnt(1)
	v_dual_fmac_f32 v25, v9, v20 :: v_dual_mul_f32 v12, v12, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v25, v12, v24 :: v_dual_sub_f32 v2, 1.0, v2
	v_fmaak_f32 v22, s15, v2, 0xc0100000
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v2, v22
	v_fma_f32 v2, v2, v6, 1.0
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v15, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v7, v7, v2
	v_dual_fmac_f32 v25, v6, v27 :: v_dual_sub_f32 v6, 1.0, v21
	v_mul_f32_e32 v9, v2, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v25, v7, v23 :: v_dual_sub_f32 v6, v6, v26
	v_mul_f32_e32 v7, v2, v13
	v_dual_fmac_f32 v25, v20, v9 :: v_dual_sub_f32 v6, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v2, v2, v16 :: v_dual_fmac_f32 v25, v24, v7
	v_mul_f32_e32 v7, v8, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v25, v2, v27
	v_mul_f32_e32 v2, v6, v11
	v_fmac_f32_e32 v25, v23, v7
	v_mul_f32_e32 v7, v6, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v25, v20, v2 :: v_dual_mul_f32 v2, v6, v17
	v_fmac_f32_e32 v25, v24, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v25, v27, v2
	global_store_b32 v[18:19], v25, off
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB1_2
.LBB1_3:                                ; %Flow187
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14zoomCubicOutIniPKfiiPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 31
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14zoomCubicOutIniPKfiiPfii, .Lfunc_end1-_Z14zoomCubicOutIniPKfiiPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1424
; NumSgprs: 18
; NumVgprs: 31
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 31
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9zoomOutIniPKfiiPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9zoomOutIniPKfiiPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14zoomCubicOutIniPKfiiPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14zoomCubicOutIniPKfiiPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     31
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
