// Rishabh Agarwal - 18JE0676
#include <bits/stdc++.h>
#include <cuda.h>
using namespace std;

// kernel functions

// single precision addition
__global__ void MatrixAddFloatKernel(float *temp_ha, float *temp_hb, float *temp_hd, int n, int m) {
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if(i < n*m) {
        temp_hd[i] = temp_ha[i] + temp_hb[i];
    }
}

__global__ void MatrixAddFloatKernel(double *temp_had, double *temp_hbd, double *temp_hdd, int n, int m) {
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if(i < n*m) {
        temp_hdd[i] = temp_had[i] + temp_hbd[i];
    }
}

// main()

int main() {

    int n, m;
    cout << "Enter n: ";
    cin >> n;
    cout << "\nEnter m: ";
    cin >> m;
    float totalf = (float)n*m;
    double totald = (double)n*m;

    // Single point precision matrix addition
    cout << "Single point precision matrix addition\n\n";
    
    // allocating memories
    float *ha, *hb, *hc, *temp_ha, *temp_hb, *temp_hd, *hd;
    ha = (float*)malloc(n*m * sizeof(float));
    hb = (float*)malloc(n*m * sizeof(float));
    hc = (float*)malloc(n*m * sizeof(float));
    hd = (float*)malloc(n*m * sizeof(float));

    cudaMalloc((void**)&temp_ha, n*m * sizeof(float));
    cudaMalloc((void**)&temp_hb, n*m * sizeof(float));
    cudaMalloc((void**)&temp_hd, n*m * sizeof(float));

    // assigning values
    for(int i=0; i<n*m; i++) {
        ha[i] = ((float)i + totalf) / totalf;
        hb[i] = ((float)i*i + totalf) / totalf;
        hc[i] = ha[i] + hb[i];
    }

    // copying memory from host to device
    cudaMemcpy(temp_ha, ha, n*m*sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(temp_hb, hb, n*m*sizeof(float), cudaMemcpyHostToDevice);

    // calling kernel
    int blockSize = 1024;
    int gridSize = (int)ceil((float)n/blockSize);
    MatrixAddFloatKernel<<<gridSize, blockSize>>>(temp_ha, temp_hb, temp_hd, n, m);
    
    // copying memory to host
    cudaMemcpy(hd, temp_hd, n*m*sizeof(float), cudaMemcpyDeviceToHost);
    cudaFree(temp_ha);
    cudaFree(temp_hb);
    cudaFree(temp_hd);

    cout << "Result matrix after addition of single point precision numbers in host:\n";
    int t = 0;
    for(int i=0; i<n; i++) {
      for(int j=0; j<m; j++) {
          cout << hc[t] <<  " ";
          t++;
      }
      cout << "\n";
    }

    cout << "\nResult matrix after addition of single point precision numbers in device:\n";
    t = 0;
    for(int i=0; i<n; i++) {
        for(int j=0; j<m; j++) {
            cout << hd[t] <<  " ";
            t++;
        }
        cout << "\n";
    }

    t = 0;
    bool ans = true;
    for(int i=0; i<n; i++) {
        for(int j=0; j<m; j++) {
            if(hc[t] != hd[t]) {
                ans = false;
                break;
            }
            t++;
        }
    }
    if(ans) {
        cout << "\n Matrices are equal\n";
    } else {
        cout << "\n Matrices are unequal\n";
    }

    // Double point precision matrix addition
    cout << "\n\nDouble point precision matrix addition\n\n";

    // allocating memories
    double *had, *hbd, *hcd, *temp_had, *temp_hbd, *temp_hdd, *hdd;
    had = (double*)malloc(n*m * sizeof(double));
    hbd = (double*)malloc(n*m * sizeof(double));
    hcd = (double*)malloc(n*m * sizeof(double));
    hdd = (double*)malloc(n*m * sizeof(double));

    cudaMalloc((void**)&temp_had, n*m * sizeof(double));
    cudaMalloc((void**)&temp_hbd, n*m * sizeof(double));
    cudaMalloc((void**)&temp_hdd, n*m * sizeof(double));

    // assigning values
    for(int i=0; i<n*m; i++) {
        had[i] = ((double)i + totald) / totald;
        hbd[i] = ((double)i*i + totald) / totald;
        hcd[i] = had[i] + hbd[i];
    }

    // copying memory from host to device
    cudaMemcpy(temp_had, had, n*m*sizeof(double), cudaMemcpyHostToDevice);
    cudaMemcpy(temp_hbd, hbd, n*m*sizeof(double), cudaMemcpyHostToDevice);

    // calling kernel
    blockSize = 1024;
    gridSize = (int)ceil((double)n/blockSize);
    MatrixAddFloatKernel<<<gridSize, blockSize>>>(temp_had, temp_hbd, temp_hdd, n, m);
    
    // copying memory to host
    cudaMemcpy(hdd, temp_hdd, n*m*sizeof(double), cudaMemcpyDeviceToHost);
    cudaFree(temp_had);
    cudaFree(temp_hbd);
    cudaFree(temp_hdd);

    cout << "Result matrix after addition of double point precision numbers in host:\n";
    t = 0;
    for(int i=0; i<n; i++) {
      for(int j=0; j<m; j++) {
          cout << hcd[t] <<  " ";
          t++;
      }
      cout << "\n";
    }

    cout << "\nResult matrix after addition of double point precision numbers in device:\n";
    t = 0;
    for(int i=0; i<n; i++) {
        for(int j=0; j<m; j++) {
            cout << hdd[t] <<  " ";
            t++;
        }
        cout << "\n";
    }

    t = 0;
    ans = true;
    for(int i=0; i<n; i++) {
        for(int j=0; j<m; j++) {
            if(hcd[t] != hdd[t]) {
                ans = false;
                break;
            }
            t++;
        }
    }
    if(ans) {
        cout << "\n Matrices are equal\n";
    } else {
        cout << "\n Matrices are unequal\n";
    }
    return 0;
}

	.file	"tmpxft_0036b24d_00000000-6_Assignment_5_double_precision.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10828:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE10828:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0, @function
_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0:
.LFB12550:
	.cfi_startproc
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	testq	%rsi, %rsi
	jne	.L3
	movq	(%rdi), %rax
	movl	$1, %esi
	addq	-24(%rax), %rbx
	addq	$16, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt9basic_iosIcSt11char_traitsIcEE8setstateESt12_Ios_Iostate@PLT
.L3:
	.cfi_restore_state
	movq	%rsi, %rdi
	movq	%rsi, 8(%rsp)
	call	strlen@PLT
	movq	8(%rsp), %rsi
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	movq	%rax, %rdx
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	.cfi_endproc
.LFE12550:
	.size	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0, .-_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	.globl	_Z46__device_stub__Z20MatrixAddFloatKernelPfS_S_iiPfS_S_ii
	.type	_Z46__device_stub__Z20MatrixAddFloatKernelPfS_S_iiPfS_S_ii, @function
_Z46__device_stub__Z20MatrixAddFloatKernelPfS_S_iiPfS_S_ii:
.LFB10850:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z20MatrixAddFloatKernelPfS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L6:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10850:
	.size	_Z46__device_stub__Z20MatrixAddFloatKernelPfS_S_iiPfS_S_ii, .-_Z46__device_stub__Z20MatrixAddFloatKernelPfS_S_iiPfS_S_ii
	.globl	_Z20MatrixAddFloatKernelPfS_S_ii
	.type	_Z20MatrixAddFloatKernelPfS_S_ii, @function
_Z20MatrixAddFloatKernelPfS_S_ii:
.LFB10851:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z20MatrixAddFloatKernelPfS_S_iiPfS_S_ii
	.cfi_endproc
.LFE10851:
	.size	_Z20MatrixAddFloatKernelPfS_S_ii, .-_Z20MatrixAddFloatKernelPfS_S_ii
	.globl	_Z46__device_stub__Z20MatrixAddFloatKernelPdS_S_iiPdS_S_ii
	.type	_Z46__device_stub__Z20MatrixAddFloatKernelPdS_S_iiPdS_S_ii, @function
_Z46__device_stub__Z20MatrixAddFloatKernelPdS_S_iiPdS_S_ii:
.LFB10852:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z20MatrixAddFloatKernelPdS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L11:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10852:
	.size	_Z46__device_stub__Z20MatrixAddFloatKernelPdS_S_iiPdS_S_ii, .-_Z46__device_stub__Z20MatrixAddFloatKernelPdS_S_iiPdS_S_ii
	.globl	_Z20MatrixAddFloatKernelPdS_S_ii
	.type	_Z20MatrixAddFloatKernelPdS_S_ii, @function
_Z20MatrixAddFloatKernelPdS_S_ii:
.LFB10853:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z20MatrixAddFloatKernelPdS_S_iiPdS_S_ii
	.cfi_endproc
.LFE10853:
	.size	_Z20MatrixAddFloatKernelPdS_S_ii, .-_Z20MatrixAddFloatKernelPdS_S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Enter n: "
.LC1:
	.string	"\nEnter m: "
.LC2:
	.string	"Single point precision matrix addition\n\n"
.LC4:
	.string	"Result matrix after addition of single point precision numbers in host:\n"
.LC5:
	.string	" "
.LC6:
	.string	"\n"
.LC7:
	.string	"\nResult matrix after addition of single point precision numbers in device:\n"
.LC8:
	.string	"\n Matrices are equal\n"
.LC9:
	.string	"\n Matrices are unequal\n"
.LC10:
	.string	"\n\nDouble point precision matrix addition\n\n"
.LC12:
	.string	"Result matrix after addition of double point precision numbers in host:\n"
.LC13:
	.string	"\nResult matrix after addition of double point precision numbers in device:\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB10825:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	leaq	_ZSt3cin(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	movq	%rbp, %rdi
	leaq	24(%rsp), %rsi
	call	_ZNSirsERi@PLT
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	movq	%rbp, %rdi
	leaq	28(%rsp), %rsi
	call	_ZNSirsERi@PLT
	movl	24(%rsp), %edx
	movl	28(%rsp), %eax
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	cvtsi2ssl	%edx, %xmm1
	cvtsi2ssl	%eax, %xmm0
	cvtsi2sdl	%edx, %xmm2
	mulss	%xmm0, %xmm1
	cvtsi2sdl	%eax, %xmm0
	mulsd	%xmm0, %xmm2
	movss	%xmm1, 12(%rsp)
	movsd	%xmm2, (%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	movl	24(%rsp), %ebp
	imull	28(%rsp), %ebp
	movslq	%ebp, %rbp
	salq	$2, %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %r15
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %r12
	call	malloc@PLT
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%rax, %r13
	call	cudaMalloc@PLT
	movl	24(%rsp), %esi
	imull	28(%rsp), %esi
	leaq	40(%rsp), %rdi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	24(%rsp), %esi
	imull	28(%rsp), %esi
	leaq	48(%rsp), %rdi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	24(%rsp), %edx
	imull	28(%rsp), %edx
	xorl	%eax, %eax
	movss	12(%rsp), %xmm1
.L17:
	cmpl	%eax, %edx
	jle	.L63
	cvtsi2ssl	%eax, %xmm0
	movaps	%xmm0, %xmm2
	mulss	%xmm0, %xmm0
	addss	%xmm1, %xmm2
	divss	%xmm1, %xmm2
	addss	%xmm1, %xmm0
	divss	%xmm1, %xmm0
	movss	%xmm2, (%r15,%rax,4)
	addss	%xmm0, %xmm2
	movss	%xmm0, (%r14,%rax,4)
	movss	%xmm2, (%r12,%rax,4)
	incq	%rax
	jmp	.L17
.L63:
	movq	32(%rsp), %rdi
	movslq	%edx, %rdx
	movl	$1, %ecx
	movq	%r15, %rsi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	24(%rsp), %edx
	imull	28(%rsp), %edx
	movq	%r14, %rsi
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	cvtsi2ssl	24(%rsp), %xmm0
	mulss	.LC3(%rip), %xmm0
	call	ceilf@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2sil	%xmm0, %eax
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, 100(%rsp)
	movq	%rdx, 92(%rsp)
	movl	%eax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movl	28(%rsp), %r8d
	movl	24(%rsp), %ecx
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z46__device_stub__Z20MatrixAddFloatKernelPfS_S_iiPfS_S_ii
.L19:
	movl	24(%rsp), %edx
	imull	28(%rsp), %edx
	movl	$2, %ecx
	xorl	%ebp, %ebp
	movq	48(%rsp), %rsi
	movq	%r13, %rdi
	xorl	%r14d, %r14d
	leaq	.LC5(%rip), %r15
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
.L20:
	cmpl	%r14d, 24(%rsp)
	jle	.L22
	movslq	%ebp, %rbx
.L23:
	movl	%ebx, %eax
	subl	%ebp, %eax
	cmpl	%eax, 28(%rsp)
	jle	.L64
	leaq	_ZSt4cout(%rip), %rdi
	cvtss2sd	(%r12,%rbx,4), %xmm0
	incq	%rbx
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	jmp	.L23
.L64:
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movl	%ebx, %ebp
	incl	%r14d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	jmp	.L20
.L22:
	leaq	.LC7(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	xorl	%r14d, %r14d
	xorl	%ebp, %ebp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	leaq	.LC5(%rip), %r15
.L24:
	movl	24(%rsp), %edi
	cmpl	%r14d, %edi
	jle	.L26
	movslq	%ebp, %rbx
.L27:
	movl	%ebx, %eax
	subl	%ebp, %eax
	cmpl	%eax, 28(%rsp)
	jle	.L65
	leaq	_ZSt4cout(%rip), %rdi
	cvtss2sd	0(%r13,%rbx,4), %xmm0
	incq	%rbx
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	jmp	.L27
.L65:
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movl	%ebx, %ebp
	incl	%r14d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	jmp	.L24
.L26:
	movl	28(%rsp), %r8d
	xorl	%ecx, %ecx
	movb	$1, %sil
	xorl	%edx, %edx
.L28:
	cmpl	%ecx, %edi
	jle	.L32
	movslq	%edx, %rax
.L33:
	movl	%eax, %r9d
	subl	%edx, %r9d
	cmpl	%r9d, %r8d
	jle	.L29
	movss	(%r12,%rax,4), %xmm0
	ucomiss	0(%r13,%rax,4), %xmm0
	jp	.L56
	jne	.L56
	incq	%rax
	jmp	.L33
.L56:
	xorl	%esi, %esi
.L29:
	movl	%eax, %edx
	incl	%ecx
	jmp	.L28
.L32:
	testb	%sil, %sil
	je	.L34
	leaq	.LC8(%rip), %rsi
	jmp	.L61
.L34:
	leaq	.LC9(%rip), %rsi
.L61:
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	leaq	.LC10(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	movl	24(%rsp), %ebp
	imull	28(%rsp), %ebp
	movslq	%ebp, %rbp
	salq	$3, %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %r15
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %r12
	call	malloc@PLT
	leaq	56(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%rax, %r13
	call	cudaMalloc@PLT
	movl	24(%rsp), %esi
	imull	28(%rsp), %esi
	leaq	64(%rsp), %rdi
	movslq	%esi, %rsi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movl	24(%rsp), %esi
	imull	28(%rsp), %esi
	leaq	72(%rsp), %rdi
	movslq	%esi, %rsi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movl	24(%rsp), %edx
	imull	28(%rsp), %edx
	xorl	%eax, %eax
.L36:
	cmpl	%eax, %edx
	jle	.L66
	cvtsi2sdl	%eax, %xmm0
	movsd	(%rsp), %xmm1
	addsd	%xmm0, %xmm1
	mulsd	%xmm0, %xmm0
	divsd	(%rsp), %xmm1
	movsd	%xmm1, (%r15,%rax,8)
	addsd	(%rsp), %xmm0
	divsd	(%rsp), %xmm0
	addsd	%xmm0, %xmm1
	movsd	%xmm0, (%r14,%rax,8)
	movsd	%xmm1, (%r12,%rax,8)
	incq	%rax
	jmp	.L36
.L66:
	movq	56(%rsp), %rdi
	movslq	%edx, %rdx
	movl	$1, %ecx
	movq	%r15, %rsi
	salq	$3, %rdx
	call	cudaMemcpy@PLT
	movl	24(%rsp), %edx
	imull	28(%rsp), %edx
	movq	%r14, %rsi
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemcpy@PLT
	cvtsi2sdl	24(%rsp), %xmm0
	mulsd	.LC11(%rip), %xmm0
	call	ceil@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttsd2sil	%xmm0, %eax
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, 100(%rsp)
	movq	%rdx, 92(%rsp)
	movl	%eax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	movl	28(%rsp), %r8d
	movl	24(%rsp), %ecx
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z46__device_stub__Z20MatrixAddFloatKernelPdS_S_iiPdS_S_ii
.L38:
	movl	24(%rsp), %edx
	imull	28(%rsp), %edx
	movl	$2, %ecx
	xorl	%ebp, %ebp
	movq	72(%rsp), %rsi
	movq	%r13, %rdi
	xorl	%r14d, %r14d
	leaq	.LC5(%rip), %r15
	movslq	%edx, %rdx
	salq	$3, %rdx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC12(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
.L39:
	cmpl	%r14d, 24(%rsp)
	jle	.L41
	movslq	%ebp, %rbx
.L42:
	movl	%ebx, %eax
	subl	%ebp, %eax
	cmpl	%eax, 28(%rsp)
	jle	.L67
	movsd	(%r12,%rbx,8), %xmm0
	leaq	_ZSt4cout(%rip), %rdi
	incq	%rbx
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	jmp	.L42
.L67:
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movl	%ebx, %ebp
	incl	%r14d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	jmp	.L39
.L41:
	leaq	.LC13(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	xorl	%r14d, %r14d
	xorl	%ebp, %ebp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	leaq	.LC5(%rip), %r15
.L43:
	movl	24(%rsp), %edi
	cmpl	%r14d, %edi
	jle	.L45
	movslq	%ebp, %rbx
.L46:
	movl	%ebx, %eax
	subl	%ebp, %eax
	cmpl	%eax, 28(%rsp)
	jle	.L68
	movsd	0(%r13,%rbx,8), %xmm0
	leaq	_ZSt4cout(%rip), %rdi
	incq	%rbx
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	jmp	.L46
.L68:
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movl	%ebx, %ebp
	incl	%r14d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	jmp	.L43
.L45:
	movl	28(%rsp), %r8d
	xorl	%ecx, %ecx
	movb	$1, %sil
	xorl	%edx, %edx
.L47:
	cmpl	%ecx, %edi
	jle	.L51
	movslq	%edx, %rax
.L52:
	movl	%eax, %r9d
	subl	%edx, %r9d
	cmpl	%r9d, %r8d
	jle	.L48
	movsd	(%r12,%rax,8), %xmm0
	ucomisd	0(%r13,%rax,8), %xmm0
	jp	.L57
	jne	.L57
	incq	%rax
	jmp	.L52
.L57:
	xorl	%esi, %esi
.L48:
	movl	%eax, %edx
	incl	%ecx
	jmp	.L47
.L51:
	testb	%sil, %sil
	je	.L53
	leaq	.LC8(%rip), %rsi
	jmp	.L62
.L53:
	leaq	.LC9(%rip), %rsi
.L62:
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L55
	call	__stack_chk_fail@PLT
.L55:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10825:
	.size	main, .-main
	.section	.rodata.str1.1
.LC14:
	.string	"_Z20MatrixAddFloatKernelPdS_S_ii"
.LC15:
	.string	"_Z20MatrixAddFloatKernelPfS_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB10855:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z20MatrixAddFloatKernelPdS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z20MatrixAddFloatKernelPfS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE10855:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	981467136
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC11:
	.long	0
	.long	1062207488
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Rishabh Agarwal - 18JE0676
#include <bits/stdc++.h>
#include <hip/hip_runtime.h>
using namespace std;

// kernel functions

// single precision addition
__global__ void MatrixAddFloatKernel(float *temp_ha, float *temp_hb, float *temp_hd, int n, int m) {
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if(i < n*m) {
        temp_hd[i] = temp_ha[i] + temp_hb[i];
    }
}

__global__ void MatrixAddFloatKernel(double *temp_had, double *temp_hbd, double *temp_hdd, int n, int m) {
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    if(i < n*m) {
        temp_hdd[i] = temp_had[i] + temp_hbd[i];
    }
}

// main()

int main() {

    int n, m;
    cout << "Enter n: ";
    cin >> n;
    cout << "\nEnter m: ";
    cin >> m;
    float totalf = (float)n*m;
    double totald = (double)n*m;

    // Single point precision matrix addition
    cout << "Single point precision matrix addition\n\n";
    
    // allocating memories
    float *ha, *hb, *hc, *temp_ha, *temp_hb, *temp_hd, *hd;
    ha = (float*)malloc(n*m * sizeof(float));
    hb = (float*)malloc(n*m * sizeof(float));
    hc = (float*)malloc(n*m * sizeof(float));
    hd = (float*)malloc(n*m * sizeof(float));

    hipMalloc((void**)&temp_ha, n*m * sizeof(float));
    hipMalloc((void**)&temp_hb, n*m * sizeof(float));
    hipMalloc((void**)&temp_hd, n*m * sizeof(float));

    // assigning values
    for(int i=0; i<n*m; i++) {
        ha[i] = ((float)i + totalf) / totalf;
        hb[i] = ((float)i*i + totalf) / totalf;
        hc[i] = ha[i] + hb[i];
    }

    // copying memory from host to device
    hipMemcpy(temp_ha, ha, n*m*sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(temp_hb, hb, n*m*sizeof(float), hipMemcpyHostToDevice);

    // calling kernel
    int blockSize = 1024;
    int gridSize = (int)ceil((float)n/blockSize);
    MatrixAddFloatKernel<<<gridSize, blockSize>>>(temp_ha, temp_hb, temp_hd, n, m);
    
    // copying memory to host
    hipMemcpy(hd, temp_hd, n*m*sizeof(float), hipMemcpyDeviceToHost);
    hipFree(temp_ha);
    hipFree(temp_hb);
    hipFree(temp_hd);

    cout << "Result matrix after addition of single point precision numbers in host:\n";
    int t = 0;
    for(int i=0; i<n; i++) {
      for(int j=0; j<m; j++) {
          cout << hc[t] <<  " ";
          t++;
      }
      cout << "\n";
    }

    cout << "\nResult matrix after addition of single point precision numbers in device:\n";
    t = 0;
    for(int i=0; i<n; i++) {
        for(int j=0; j<m; j++) {
            cout << hd[t] <<  " ";
            t++;
        }
        cout << "\n";
    }

    t = 0;
    bool ans = true;
    for(int i=0; i<n; i++) {
        for(int j=0; j<m; j++) {
            if(hc[t] != hd[t]) {
                ans = false;
                break;
            }
            t++;
        }
    }
    if(ans) {
        cout << "\n Matrices are equal\n";
    } else {
        cout << "\n Matrices are unequal\n";
    }

    // Double point precision matrix addition
    cout << "\n\nDouble point precision matrix addition\n\n";

    // allocating memories
    double *had, *hbd, *hcd, *temp_had, *temp_hbd, *temp_hdd, *hdd;
    had = (double*)malloc(n*m * sizeof(double));
    hbd = (double*)malloc(n*m * sizeof(double));
    hcd = (double*)malloc(n*m * sizeof(double));
    hdd = (double*)malloc(n*m * sizeof(double));

    hipMalloc((void**)&temp_had, n*m * sizeof(double));
    hipMalloc((void**)&temp_hbd, n*m * sizeof(double));
    hipMalloc((void**)&temp_hdd, n*m * sizeof(double));

    // assigning values
    for(int i=0; i<n*m; i++) {
        had[i] = ((double)i + totald) / totald;
        hbd[i] = ((double)i*i + totald) / totald;
        hcd[i] = had[i] + hbd[i];
    }

    // copying memory from host to device
    hipMemcpy(temp_had, had, n*m*sizeof(double), hipMemcpyHostToDevice);
    hipMemcpy(temp_hbd, hbd, n*m*sizeof(double), hipMemcpyHostToDevice);

    // calling kernel
    blockSize = 1024;
    gridSize = (int)ceil((double)n/blockSize);
    MatrixAddFloatKernel<<<gridSize, blockSize>>>(temp_had, temp_hbd, temp_hdd, n, m);
    
    // copying memory to host
    hipMemcpy(hdd, temp_hdd, n*m*sizeof(double), hipMemcpyDeviceToHost);
    hipFree(temp_had);
    hipFree(temp_hbd);
    hipFree(temp_hdd);

    cout << "Result matrix after addition of double point precision numbers in host:\n";
    t = 0;
    for(int i=0; i<n; i++) {
      for(int j=0; j<m; j++) {
          cout << hcd[t] <<  " ";
          t++;
      }
      cout << "\n";
    }

    cout << "\nResult matrix after addition of double point precision numbers in device:\n";
    t = 0;
    for(int i=0; i<n; i++) {
        for(int j=0; j<m; j++) {
            cout << hdd[t] <<  " ";
            t++;
        }
        cout << "\n";
    }

    t = 0;
    ans = true;
    for(int i=0; i<n; i++) {
        for(int j=0; j<m; j++) {
            if(hcd[t] != hdd[t]) {
                ans = false;
                break;
            }
            t++;
        }
    }
    if(ans) {
        cout << "\n Matrices are equal\n";
    } else {
        cout << "\n Matrices are unequal\n";
    }
    return 0;
}

	.text
	.file	"Assignment_5_double_precision.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z35__device_stub__MatrixAddFloatKernelPfS_S_ii # -- Begin function _Z35__device_stub__MatrixAddFloatKernelPfS_S_ii
	.type	_Z35__device_stub__MatrixAddFloatKernelPfS_S_ii,@function
_Z35__device_stub__MatrixAddFloatKernelPfS_S_ii: # @_Z35__device_stub__MatrixAddFloatKernelPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20MatrixAddFloatKernelPfS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z35__device_stub__MatrixAddFloatKernelPfS_S_ii, .Lfunc_end0-_Z35__device_stub__MatrixAddFloatKernelPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__MatrixAddFloatKernelPdS_S_ii # -- Begin function _Z35__device_stub__MatrixAddFloatKernelPdS_S_ii
	.type	_Z35__device_stub__MatrixAddFloatKernelPdS_S_ii,@function
_Z35__device_stub__MatrixAddFloatKernelPdS_S_ii: # @_Z35__device_stub__MatrixAddFloatKernelPdS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20MatrixAddFloatKernelPdS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z35__device_stub__MatrixAddFloatKernelPdS_S_ii, .Lfunc_end1-_Z35__device_stub__MatrixAddFloatKernelPdS_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x3a800000                      # float 9.765625E-4
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_1:
	.quad	0x3f50000000000000              # double 9.765625E-4
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	8(%rsp), %rsi
	movl	$_ZSt3cin, %edi
	movq	%rsi, %rbx
	callq	_ZNSirsERi
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	12(%rsp), %rbp
	movl	$_ZSt3cin, %edi
	movq	%rbp, %rsi
	callq	_ZNSirsERi
	movl	(%rbx), %eax
	movl	%eax, 20(%rsp)                  # 4-byte Spill
	movl	(%rbp), %eax
	movl	%eax, 16(%rsp)                  # 4-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$40, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movslq	(%rbx), %rax
	movslq	(%rbp), %rbx
	imulq	%rax, %rbx
	shlq	$2, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r15
	leaq	64(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rbx
	movslq	(%rbx), %rax
	movslq	(%rbp), %rsi
	imulq	%rax, %rsi
	shlq	$2, %rsi
	leaq	56(%rsp), %rdi
	callq	hipMalloc
	movslq	(%rbx), %rax
	movslq	(%rbp), %rsi
	imulq	%rax, %rsi
	shlq	$2, %rsi
	leaq	48(%rsp), %rdi
	callq	hipMalloc
	movslq	(%rbx), %rax
	movslq	(%rbp), %rdx
	imulq	%rax, %rdx
	testl	%edx, %edx
	jle	.LBB2_3
# %bb.1:                                # %.lr.ph.preheader
	cvtsi2ssl	20(%rsp), %xmm1         # 4-byte Folded Reload
	cvtsi2ssl	16(%rsp), %xmm0         # 4-byte Folded Reload
	mulss	%xmm1, %xmm0
	movl	%edx, %eax
	xorl	%ecx, %ecx
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ecx, %xmm1
	movaps	%xmm0, %xmm2
	addss	%xmm1, %xmm2
	divss	%xmm0, %xmm2
	movss	%xmm2, (%r13,%rcx,4)
	mulss	%xmm1, %xmm1
	addss	%xmm0, %xmm1
	divss	%xmm0, %xmm1
	movss	%xmm1, (%r12,%rcx,4)
	addss	%xmm2, %xmm1
	movss	%xmm1, (%r14,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB2_2
.LBB2_3:                                # %._crit_edge
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	movq	64(%rsp), %rdi
	shlq	$2, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	56(%rsp), %rdi
	movslq	8(%rsp), %rax
	movslq	12(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	xorps	%xmm0, %xmm0
	cvtsi2ssl	8(%rsp), %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %edi
	btsq	$32, %rdi
	leaq	1024(%rbx), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_5
# %bb.4:
	movq	64(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdx
	movl	8(%rsp), %ecx
	movl	12(%rsp), %r8d
	callq	_Z35__device_stub__MatrixAddFloatKernelPfS_S_ii
.LBB2_5:
	movq	48(%rsp), %rsi
	movslq	8(%rsp), %rax
	movslq	12(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$72, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cmpl	$0, 8(%rsp)
	jle	.LBB2_12
# %bb.6:                                # %.preheader142.preheader
	xorl	%r12d, %r12d
	xorl	%ebp, %ebp
.LBB2_7:                                # %.preheader142
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_9 Depth 2
	cmpl	$0, 12(%rsp)
	jle	.LBB2_11
# %bb.8:                                # %.lr.ph149.preheader
                                        #   in Loop: Header=BB2_7 Depth=1
	movslq	%r12d, %rax
	leaq	(%r14,%rax,4), %rbx
	xorl	%r13d, %r13d
.LBB2_9:                                # %.lr.ph149
                                        #   Parent Loop BB2_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r13,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r13
	cmpl	12(%rsp), %r13d
	jl	.LBB2_9
# %bb.10:                               # %._crit_edge150.loopexit
                                        #   in Loop: Header=BB2_7 Depth=1
	addl	%r13d, %r12d
.LBB2_11:                               # %._crit_edge150
                                        #   in Loop: Header=BB2_7 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incl	%ebp
	cmpl	8(%rsp), %ebp
	jl	.LBB2_7
.LBB2_12:                               # %._crit_edge154
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$75, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cmpl	$0, 8(%rsp)
	jle	.LBB2_29
# %bb.13:                               # %.preheader141.preheader
	xorl	%r12d, %r12d
	xorl	%ebp, %ebp
.LBB2_14:                               # %.preheader141
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_16 Depth 2
	cmpl	$0, 12(%rsp)
	jle	.LBB2_18
# %bb.15:                               # %.lr.ph157.preheader
                                        #   in Loop: Header=BB2_14 Depth=1
	movslq	%r12d, %rax
	leaq	(%r15,%rax,4), %rbx
	xorl	%r13d, %r13d
.LBB2_16:                               # %.lr.ph157
                                        #   Parent Loop BB2_14 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r13,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r13
	cmpl	12(%rsp), %r13d
	jl	.LBB2_16
# %bb.17:                               # %._crit_edge158.loopexit
                                        #   in Loop: Header=BB2_14 Depth=1
	addl	%r13d, %r12d
.LBB2_18:                               # %._crit_edge158
                                        #   in Loop: Header=BB2_14 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incl	%ebp
	movl	8(%rsp), %eax
	cmpl	%eax, %ebp
	jl	.LBB2_14
# %bb.19:                               # %.preheader140
	testl	%eax, %eax
	jle	.LBB2_29
# %bb.20:                               # %.preheader139.lr.ph
	movl	12(%rsp), %ecx
	movb	$1, %sil
	xorl	%edx, %edx
	xorl	%edi, %edi
.LBB2_21:                               # %.preheader139
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_23 Depth 2
	testl	%ecx, %ecx
	jle	.LBB2_27
# %bb.22:                               # %.lr.ph165.preheader
                                        #   in Loop: Header=BB2_21 Depth=1
	movslq	%edx, %r9
	leal	(%rcx,%r9), %r8d
	leaq	(%r14,%r9,4), %r10
	leaq	(%r15,%r9,4), %r11
	xorl	%r9d, %r9d
.LBB2_23:                               # %.lr.ph165
                                        #   Parent Loop BB2_21 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r10,%r9,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%r11,%r9,4), %xmm0
	jne	.LBB2_26
	jp	.LBB2_26
# %bb.24:                               #   in Loop: Header=BB2_23 Depth=2
	incq	%r9
	cmpl	%r9d, %ecx
	jne	.LBB2_23
# %bb.25:                               #   in Loop: Header=BB2_21 Depth=1
	movl	%r8d, %edx
	jmp	.LBB2_27
.LBB2_26:                               # %._crit_edge166.loopexit.split.loop.exit
                                        #   in Loop: Header=BB2_21 Depth=1
	addl	%r9d, %edx
	xorl	%esi, %esi
.LBB2_27:                               # %._crit_edge166
                                        #   in Loop: Header=BB2_21 Depth=1
	incl	%edi
	cmpl	%eax, %edi
	jne	.LBB2_21
# %bb.28:                               # %._crit_edge175
	testb	$1, %sil
	jne	.LBB2_29
# %bb.30:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$23, %edx
	jmp	.LBB2_31
.LBB2_29:                               # %._crit_edge175.thread
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$21, %edx
.LBB2_31:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$42, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movslq	8(%rsp), %rax
	movslq	12(%rsp), %rbp
	imulq	%rax, %rbp
	shlq	$3, %rbp
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r15
	leaq	40(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movslq	8(%rsp), %rax
	movslq	12(%rsp), %rsi
	imulq	%rax, %rsi
	shlq	$3, %rsi
	leaq	32(%rsp), %rdi
	callq	hipMalloc
	movslq	8(%rsp), %rax
	movslq	12(%rsp), %rsi
	imulq	%rax, %rsi
	shlq	$3, %rsi
	leaq	24(%rsp), %rdi
	callq	hipMalloc
	movslq	8(%rsp), %rax
	movslq	12(%rsp), %rdx
	imulq	%rax, %rdx
	testl	%edx, %edx
	jle	.LBB2_34
# %bb.32:                               # %.lr.ph179.preheader
	cvtsi2sdl	20(%rsp), %xmm1         # 4-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sdl	16(%rsp), %xmm0         # 4-byte Folded Reload
	mulsd	%xmm1, %xmm0
	movl	%edx, %eax
	xorl	%ecx, %ecx
.LBB2_33:                               # %.lr.ph179
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm1, %xmm1
	cvtsi2sd	%ecx, %xmm1
	movapd	%xmm0, %xmm2
	addsd	%xmm1, %xmm2
	divsd	%xmm0, %xmm2
	movsd	%xmm2, (%r13,%rcx,8)
	mulsd	%xmm1, %xmm1
	addsd	%xmm0, %xmm1
	divsd	%xmm0, %xmm1
	movsd	%xmm1, (%r12,%rcx,8)
	addsd	%xmm2, %xmm1
	movsd	%xmm1, (%r14,%rcx,8)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB2_33
.LBB2_34:                               # %._crit_edge180
	movq	40(%rsp), %rdi
	shlq	$3, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	movslq	8(%rsp), %rax
	movslq	12(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$3, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	xorps	%xmm0, %xmm0
	cvtsi2sdl	8(%rsp), %xmm0
	mulsd	.LCPI2_1(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %edi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	%rdx, %rdi
	addq	$1024, %rdx                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_36
# %bb.35:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	8(%rsp), %ecx
	movl	12(%rsp), %r8d
	callq	_Z35__device_stub__MatrixAddFloatKernelPdS_S_ii
.LBB2_36:
	movq	24(%rsp), %rsi
	movslq	8(%rsp), %rax
	movslq	12(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$3, %rdx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$72, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cmpl	$0, 8(%rsp)
	jle	.LBB2_43
# %bb.37:                               # %.preheader138.preheader
	xorl	%ebx, %ebx
	xorl	%ebp, %ebp
.LBB2_38:                               # %.preheader138
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_40 Depth 2
	cmpl	$0, 12(%rsp)
	jle	.LBB2_42
# %bb.39:                               # %.lr.ph184.preheader
                                        #   in Loop: Header=BB2_38 Depth=1
	movslq	%ebp, %rax
	leaq	(%r14,%rax,8), %r13
	xorl	%r12d, %r12d
.LBB2_40:                               # %.lr.ph184
                                        #   Parent Loop BB2_38 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%r13,%r12,8), %xmm0            # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r12
	cmpl	12(%rsp), %r12d
	jl	.LBB2_40
# %bb.41:                               # %._crit_edge185.loopexit
                                        #   in Loop: Header=BB2_38 Depth=1
	addl	%r12d, %ebp
.LBB2_42:                               # %._crit_edge185
                                        #   in Loop: Header=BB2_38 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incl	%ebx
	cmpl	8(%rsp), %ebx
	jl	.LBB2_38
.LBB2_43:                               # %._crit_edge189
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$75, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cmpl	$0, 8(%rsp)
	jle	.LBB2_60
# %bb.44:                               # %.preheader137.preheader
	xorl	%ebx, %ebx
	xorl	%ebp, %ebp
.LBB2_45:                               # %.preheader137
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_47 Depth 2
	cmpl	$0, 12(%rsp)
	jle	.LBB2_49
# %bb.46:                               # %.lr.ph192.preheader
                                        #   in Loop: Header=BB2_45 Depth=1
	movslq	%ebp, %rax
	leaq	(%r15,%rax,8), %r13
	xorl	%r12d, %r12d
.LBB2_47:                               # %.lr.ph192
                                        #   Parent Loop BB2_45 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%r13,%r12,8), %xmm0            # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r12
	cmpl	12(%rsp), %r12d
	jl	.LBB2_47
# %bb.48:                               # %._crit_edge193.loopexit
                                        #   in Loop: Header=BB2_45 Depth=1
	addl	%r12d, %ebp
.LBB2_49:                               # %._crit_edge193
                                        #   in Loop: Header=BB2_45 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incl	%ebx
	movl	8(%rsp), %eax
	cmpl	%eax, %ebx
	jl	.LBB2_45
# %bb.50:                               # %.preheader136
	testl	%eax, %eax
	jle	.LBB2_60
# %bb.51:                               # %.preheader.lr.ph
	movl	12(%rsp), %ecx
	movb	$1, %sil
	xorl	%edx, %edx
	xorl	%edi, %edi
.LBB2_52:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_54 Depth 2
	testl	%ecx, %ecx
	jle	.LBB2_58
# %bb.53:                               # %.lr.ph200.preheader
                                        #   in Loop: Header=BB2_52 Depth=1
	movslq	%edi, %r9
	leal	(%rcx,%r9), %r8d
	leaq	(%r14,%r9,8), %r10
	leaq	(%r15,%r9,8), %r11
	xorl	%r9d, %r9d
.LBB2_54:                               # %.lr.ph200
                                        #   Parent Loop BB2_52 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%r10,%r9,8), %xmm0             # xmm0 = mem[0],zero
	ucomisd	(%r11,%r9,8), %xmm0
	jne	.LBB2_57
	jp	.LBB2_57
# %bb.55:                               #   in Loop: Header=BB2_54 Depth=2
	incq	%r9
	cmpl	%r9d, %ecx
	jne	.LBB2_54
# %bb.56:                               #   in Loop: Header=BB2_52 Depth=1
	movl	%r8d, %edi
	jmp	.LBB2_58
.LBB2_57:                               # %._crit_edge201.loopexit.split.loop.exit
                                        #   in Loop: Header=BB2_52 Depth=1
	addl	%r9d, %edi
	xorl	%esi, %esi
.LBB2_58:                               # %._crit_edge201
                                        #   in Loop: Header=BB2_52 Depth=1
	incl	%edx
	cmpl	%eax, %edx
	jne	.LBB2_52
# %bb.59:                               # %._crit_edge210
	testb	$1, %sil
	jne	.LBB2_60
# %bb.61:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$23, %edx
	jmp	.LBB2_62
.LBB2_60:                               # %._crit_edge210.thread
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$21, %edx
.LBB2_62:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20MatrixAddFloatKernelPfS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20MatrixAddFloatKernelPdS_S_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z20MatrixAddFloatKernelPfS_S_ii,@object # @_Z20MatrixAddFloatKernelPfS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z20MatrixAddFloatKernelPfS_S_ii
	.p2align	3, 0x0
_Z20MatrixAddFloatKernelPfS_S_ii:
	.quad	_Z35__device_stub__MatrixAddFloatKernelPfS_S_ii
	.size	_Z20MatrixAddFloatKernelPfS_S_ii, 8

	.type	_Z20MatrixAddFloatKernelPdS_S_ii,@object # @_Z20MatrixAddFloatKernelPdS_S_ii
	.globl	_Z20MatrixAddFloatKernelPdS_S_ii
	.p2align	3, 0x0
_Z20MatrixAddFloatKernelPdS_S_ii:
	.quad	_Z35__device_stub__MatrixAddFloatKernelPdS_S_ii
	.size	_Z20MatrixAddFloatKernelPdS_S_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Enter n: "
	.size	.L.str, 10

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\nEnter m: "
	.size	.L.str.1, 11

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Single point precision matrix addition\n\n"
	.size	.L.str.2, 41

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Result matrix after addition of single point precision numbers in host:\n"
	.size	.L.str.3, 73

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" "
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\n"
	.size	.L.str.5, 2

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"\nResult matrix after addition of single point precision numbers in device:\n"
	.size	.L.str.6, 76

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"\n Matrices are equal\n"
	.size	.L.str.7, 22

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"\n Matrices are unequal\n"
	.size	.L.str.8, 24

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"\n\nDouble point precision matrix addition\n\n"
	.size	.L.str.9, 43

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Result matrix after addition of double point precision numbers in host:\n"
	.size	.L.str.10, 73

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"\nResult matrix after addition of double point precision numbers in device:\n"
	.size	.L.str.11, 76

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20MatrixAddFloatKernelPfS_S_ii"
	.size	.L__unnamed_1, 33

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z20MatrixAddFloatKernelPdS_S_ii"
	.size	.L__unnamed_2, 33

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__MatrixAddFloatKernelPfS_S_ii
	.addrsig_sym _Z35__device_stub__MatrixAddFloatKernelPdS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z20MatrixAddFloatKernelPfS_S_ii
	.addrsig_sym _Z20MatrixAddFloatKernelPdS_S_ii
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZSt3cin
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20MatrixAddFloatKernelPfS_S_ii ; -- Begin function _Z20MatrixAddFloatKernelPfS_S_ii
	.globl	_Z20MatrixAddFloatKernelPfS_S_ii
	.p2align	8
	.type	_Z20MatrixAddFloatKernelPfS_S_ii,@function
_Z20MatrixAddFloatKernelPfS_S_ii:       ; @_Z20MatrixAddFloatKernelPfS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_mul_i32 s2, s3, s2
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20MatrixAddFloatKernelPfS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20MatrixAddFloatKernelPfS_S_ii, .Lfunc_end0-_Z20MatrixAddFloatKernelPfS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z20MatrixAddFloatKernelPdS_S_ii ; -- Begin function _Z20MatrixAddFloatKernelPdS_S_ii
	.globl	_Z20MatrixAddFloatKernelPdS_S_ii
	.p2align	8
	.type	_Z20MatrixAddFloatKernelPdS_S_ii,@function
_Z20MatrixAddFloatKernelPdS_S_ii:       ; @_Z20MatrixAddFloatKernelPdS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_mul_i32 s2, s3, s2
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	global_store_b64 v[0:1], v[2:3], off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20MatrixAddFloatKernelPdS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z20MatrixAddFloatKernelPdS_S_ii, .Lfunc_end1-_Z20MatrixAddFloatKernelPdS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20MatrixAddFloatKernelPfS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20MatrixAddFloatKernelPfS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20MatrixAddFloatKernelPdS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20MatrixAddFloatKernelPdS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
