#include <stdio.h>
#include <string.h>
#include <sys/types.h>
#include <sys/time.h>
#include <cuda.h>
#include <stdlib.h>

#define IMAGE_HEIGHT 521
#define IMAGE_WIDTH 428


__global__
void blur(int *d_R, int *d_G, int *d_B, int *d_Rnew, int *d_Gnew, int *d_Bnew)
{
  // Get the X and y coords of the pixel for this thread
  int x = (blockIdx.x * blockDim.x) + threadIdx.x;
  int y = (blockIdx.y * blockDim.y) + threadIdx.y;

  // Stop the thread if it is not part of the image
  if (x >= IMAGE_WIDTH || y >= IMAGE_HEIGHT) {
    return;
  }

  // Apply the box blur
  if (y != 0 && y != (IMAGE_HEIGHT-1) && x != 0 && x != (IMAGE_WIDTH-1)){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*(y+1)) + x]+d_R[(IMAGE_WIDTH*(y-1)) + x]+d_R[(IMAGE_WIDTH*y) + x+1]+d_R[(IMAGE_WIDTH*y) + x-1])/4;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*(y+1)) + x]+d_G[(IMAGE_WIDTH*(y-1)) + x]+d_G[(IMAGE_WIDTH*y) + x+1]+d_G[(IMAGE_WIDTH*y) + x-1])/4;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*(y+1)) + x]+d_B[(IMAGE_WIDTH*(y-1)) + x]+d_B[(IMAGE_WIDTH*y) + x+1]+d_B[(IMAGE_WIDTH*y) + x-1])/4;
  }
  else if (y == 0 && x != 0 && x != (IMAGE_WIDTH-1)){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*(y+1)) + x]+d_R[(IMAGE_WIDTH*y) + x+1]+d_R[(IMAGE_WIDTH*y) + x-1])/3;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*(y+1)) + x]+d_G[(IMAGE_WIDTH*y) + x+1]+d_G[(IMAGE_WIDTH*y) + x-1])/3;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*(y+1)) + x]+d_B[(IMAGE_WIDTH*y) + x+1]+d_B[(IMAGE_WIDTH*y) + x-1])/3;
  }
  else if (y == (IMAGE_HEIGHT-1) && x != 0 && x != (IMAGE_WIDTH-1)){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*(y-1)) + x]+d_R[(IMAGE_WIDTH*y) + x+1]+d_R[(IMAGE_WIDTH*y) + x-1])/3;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*(y-1)) + x]+d_G[(IMAGE_WIDTH*y) + x+1]+d_G[(IMAGE_WIDTH*y) + x-1])/3;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*(y-1)) + x]+d_B[(IMAGE_WIDTH*y) + x+1]+d_B[(IMAGE_WIDTH*y) + x-1])/3;
  }
  else if (x == 0 && y != 0 && y != (IMAGE_HEIGHT-1)){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*(y+1)) + x]+d_R[(IMAGE_WIDTH*(y-1)) + x]+d_R[(IMAGE_WIDTH*y) + x+1])/3;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*(y+1)) + x]+d_G[(IMAGE_WIDTH*(y-1)) + x]+d_G[(IMAGE_WIDTH*y) + x+1])/3;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*(y+1)) + x]+d_B[(IMAGE_WIDTH*(y-1)) + x]+d_B[(IMAGE_WIDTH*y) + x+1])/3;
  }
  else if (x == (IMAGE_WIDTH-1) && y != 0 && y != (IMAGE_HEIGHT-1)){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*(y+1)) + x]+d_R[(IMAGE_WIDTH*(y-1)) + x]+d_R[(IMAGE_WIDTH*y) + x-1])/3;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*(y+1)) + x]+d_G[(IMAGE_WIDTH*(y-1)) + x]+d_G[(IMAGE_WIDTH*y) + x-1])/3;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*(y+1)) + x]+d_B[(IMAGE_WIDTH*(y-1)) + x]+d_B[(IMAGE_WIDTH*y) + x-1])/3;
  }
  else if (y==0 &&x==0){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*y) + x+1]+d_R[(IMAGE_WIDTH*(y+1)) + x])/2;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*y) + x+1]+d_G[(IMAGE_WIDTH*(y+1)) + x])/2;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*y) + x+1]+d_B[(IMAGE_WIDTH*(y+1)) + x])/2;
  }
  else if (y==0 &&x==(IMAGE_WIDTH-1)){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*y) + x-1]+d_R[(IMAGE_WIDTH*(y+1)) + x])/2;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*y) + x-1]+d_G[(IMAGE_WIDTH*(y+1)) + x])/2;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*y) + x-1]+d_B[(IMAGE_WIDTH*(y+1)) + x])/2;
  }
  else if (y==(IMAGE_HEIGHT-1) &&x==0){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*y) + x+1]+d_R[(IMAGE_WIDTH*(y-1)) + x])/2;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*y) + x+1]+d_G[(IMAGE_WIDTH*(y-1)) + x])/2;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*y) + x+1]+d_B[(IMAGE_WIDTH*(y-1)) + x])/2;
  }
  else if (y==(IMAGE_HEIGHT-1) &&x==(IMAGE_WIDTH-1)){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*y) + x-1]+d_R[(IMAGE_WIDTH*(y-1)) + x])/2;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*y) + x-1]+d_G[(IMAGE_WIDTH*(y-1)) + x])/2;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*y) + x-1]+d_B[(IMAGE_WIDTH*(y-1)) + x])/2;
  }

}

int main (int argc, const char * argv[]) {
  struct timeval tim;
  gettimeofday(&tim, NULL);
  static int const maxlen = 200, rowsize = 521, colsize = 428, linelen = 12;
  char str[maxlen], lines[5][maxlen];
  FILE *fp, *fout;
  int nlines = 0;
  unsigned int h1, h2, h3;
  char *sptr;
  int R[rowsize][colsize], G[rowsize][colsize], B[rowsize][colsize];
  int row = 0, col = 0, nblurs, lineno=0, k;

  fp = fopen("David.ps", "r");

  while(! feof(fp))
  {
    fscanf(fp, "\n%[^\n]", str);
    if (nlines < 5) {strcpy((char *)lines[nlines++],(char *)str);}
    else{
      for (sptr=&str[0];*sptr != '\0';sptr+=6){
        sscanf(sptr,"%2x",&h1);
        sscanf(sptr+2,"%2x",&h2);
        sscanf(sptr+4,"%2x",&h3);

        if (col==colsize){
          col = 0;
          row++;
        }
        if (row < rowsize) {
          R[row][col] = h1;
          G[row][col] = h2;
          B[row][col] = h3;
        }
        col++;
      }
    }
  }
  fclose(fp);
  // Number of blur iterations
  // nblurs = atoi(argv[1]); // Get iterations from argument
  nblurs = 20;
  // Start the timer
  double t1=tim.tv_sec+(tim.tv_usec/1000000.0);
  // The size of the 1D arrays for the GPU
  int size = sizeof(int) * IMAGE_WIDTH * IMAGE_HEIGHT;
  // Initialise the arrays to hold the flatened image
  int *h_R, *h_G, *h_B;
  h_R = (int *)malloc(size);
  h_G = (int *)malloc(size);
  h_B = (int *)malloc(size);
  // Create pointers to GPU array locations
  int *d_R, *d_G, *d_B, *d_Rnew, *d_Gnew, *d_Bnew;
  // Define how many threads per block
  int numBlocksY = ceil(IMAGE_HEIGHT/16.0);
  int numBlocksX = ceil(IMAGE_WIDTH/16.0);
  dim3 dimBlock(numBlocksX,numBlocksY);
  // Define how many blocks per grid
  dim3 dimGrid(16, 16);
  // Allocate GPU mem for the 1D arrays
  cudaMalloc((void **)&d_R, size);
  cudaMalloc((void **)&d_G, size);
  cudaMalloc((void **)&d_B, size);
  cudaMalloc((void **)&d_Rnew, size);
  cudaMalloc((void **)&d_Bnew, size);
  cudaMalloc((void **)&d_Gnew, size);

  // Flatten the 2D arrays to make them easier to handle with CUDA
  for (int row=0;row<IMAGE_HEIGHT;row++){
    for (int col=0;col<IMAGE_WIDTH;col++){
      h_R[IMAGE_WIDTH*row+col] = R[row][col];
      h_G[IMAGE_WIDTH*row+col] = G[row][col];
      h_B[IMAGE_WIDTH*row+col] = B[row][col];
    }
  }

  // Copy these arrays to the GPU
  cudaMemcpy(d_R, h_R, size, cudaMemcpyHostToDevice);
  cudaMemcpy(d_G, h_G, size, cudaMemcpyHostToDevice);
  cudaMemcpy(d_B, h_B, size, cudaMemcpyHostToDevice);

  // Start the blur loop
  for(k=0;k<nblurs;k++){
    // Punch it Chewie
    blur<<<dimGrid, dimBlock>>>(d_R, d_G, d_B, d_Rnew, d_Gnew, d_Bnew);
    // Copy the modified values to the original locations ready for a new iteration
    cudaMemcpy(d_R, d_Rnew, size, cudaMemcpyDeviceToDevice);
    cudaMemcpy(d_G, d_Gnew, size, cudaMemcpyDeviceToDevice);
    cudaMemcpy(d_B, d_Bnew, size, cudaMemcpyDeviceToDevice);
  }

  // Copy the data off the GPU
  cudaMemcpy(h_R, d_Rnew, size, cudaMemcpyDeviceToHost);
  cudaMemcpy(h_G, d_Gnew, size, cudaMemcpyDeviceToHost);
  cudaMemcpy(h_B, d_Bnew, size, cudaMemcpyDeviceToHost);

  // Convert the 1D arrays back into 2D
  for (int row=0;row<IMAGE_HEIGHT;row++){
    for (int col=0;col<IMAGE_WIDTH;col++){
      R[row][col] = h_R[IMAGE_WIDTH*row+col];
      G[row][col] = h_G[IMAGE_WIDTH*row+col];
      B[row][col] = h_B[IMAGE_WIDTH*row+col];
    }
  }

  // Free up the allocated memory
  cudaFree(d_R); cudaFree(d_G); cudaFree(d_B);
  cudaFree(d_Rnew); cudaFree(d_Gnew); cudaFree(d_Bnew);
  free(h_R); free(h_G); free(h_B);

  fout= fopen("DavidBlur.ps", "w");
  for (k=0;k<nlines;k++) fprintf(fout,"\n%s", lines[k]);
  fprintf(fout,"\n");
  for(row=0;row<rowsize;row++){
    for (col=0;col<colsize;col++){
      fprintf(fout,"%02x%02x%02x",R[row][col],G[row][col],B[row][col]);
      lineno++;
      if (lineno==linelen){
        fprintf(fout,"\n");
        lineno = 0;
      }
    }
  }
  fclose(fout);
  gettimeofday(&tim, NULL);
  double t2=tim.tv_sec+(tim.tv_usec/1000000.0);
  printf("%.6lf seconds elapsed\n", t2-t1);
  return 0;
}

	.file	"tmpxft_0036a1fe_00000000-6_blur.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z33__device_stub__Z4blurPiS_S_S_S_S_PiS_S_S_S_S_
	.type	_Z33__device_stub__Z4blurPiS_S_S_S_S_PiS_S_S_S_S_, @function
_Z33__device_stub__Z4blurPiS_S_S_S_S_PiS_S_S_S_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z4blurPiS_S_S_S_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z33__device_stub__Z4blurPiS_S_S_S_S_PiS_S_S_S_S_, .-_Z33__device_stub__Z4blurPiS_S_S_S_S_PiS_S_S_S_S_
	.globl	_Z4blurPiS_S_S_S_S_
	.type	_Z4blurPiS_S_S_S_S_, @function
_Z4blurPiS_S_S_S_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z4blurPiS_S_S_S_S_PiS_S_S_S_S_
	.cfi_endproc
.LFE2053:
	.size	_Z4blurPiS_S_S_S_S_, .-_Z4blurPiS_S_S_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	"David.ps"
.LC2:
	.string	"\n%[^\n]"
.LC3:
	.string	"%2x"
.LC5:
	.string	"w"
.LC6:
	.string	"DavidBlur.ps"
.LC7:
	.string	"\n%s"
.LC8:
	.string	"\n"
.LC9:
	.string	"%02x%02x%02x"
.LC10:
	.string	"%.6lf seconds elapsed\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-2674688(%rsp), %r11
	.cfi_def_cfa 11, 2674744
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$2520, %rsp
	.cfi_def_cfa_offset 2677264
	xorl	%esi, %esi
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
	xorl	%ebx, %ebx
	leaq	.LC2(%rip), %r14
	movq	%fs:40, %rax
	movq	%rax, 2677192(%rsp)
	xorl	%eax, %eax
	leaq	120(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	gettimeofday@PLT
	leaq	.LC0(%rip), %rsi
	leaq	.LC1(%rip), %rdi
	call	fopen@PLT
	movq	%rax, (%rsp)
.L9:
	movq	(%rsp), %rdi
	call	feof@PLT
	testl	%eax, %eax
	jne	.L29
	leaq	2676992(%rsp), %rbp
	movq	(%rsp), %rdi
	xorl	%eax, %eax
	movq	%r14, %rsi
	movq	%rbp, %rdx
	call	__isoc23_fscanf@PLT
	cmpl	$4, %ebx
	jg	.L25
	leal	1(%rbx), %r15d
	movl	$1000, %edx
	movq	%rbp, %rsi
	imulq	$200, %rbx, %rbx
	cmpq	%rdx, %rbx
	leaq	136(%rsp,%rbx), %rdi
	cmovnb	%rbx, %rdx
	subq	%rbx, %rdx
	movslq	%r15d, %rbx
	call	__strcpy_chk@PLT
	jmp	.L9
.L25:
	leaq	.LC3(%rip), %r15
.L10:
	cmpb	$0, 0(%rbp)
	je	.L9
	leaq	36(%rsp), %rdx
	movq	%r15, %rsi
	movq	%rbp, %rdi
	xorl	%eax, %eax
	call	__isoc23_sscanf@PLT
	leaq	40(%rsp), %rdx
	leaq	2(%rbp), %rdi
	xorl	%eax, %eax
	movq	%r15, %rsi
	call	__isoc23_sscanf@PLT
	xorl	%eax, %eax
	leaq	44(%rsp), %rdx
	leaq	4(%rbp), %rdi
	movq	%r15, %rsi
	call	__isoc23_sscanf@PLT
	cmpl	$428, %r12d
	jne	.L12
	incl	%r13d
	xorl	%r12d, %r12d
.L12:
	cmpl	$520, %r13d
	jg	.L13
	movslq	%r13d, %rax
	movslq	%r12d, %rdx
	imulq	$428, %rax, %rax
	addq	%rdx, %rax
	movl	36(%rsp), %edx
	movl	%edx, 1136(%rsp,%rax,4)
	movl	40(%rsp), %edx
	movl	%edx, 893088(%rsp,%rax,4)
	movl	44(%rsp), %edx
	movl	%edx, 1785040(%rsp,%rax,4)
.L13:
	incl	%r12d
	addq	$6, %rbp
	jmp	.L10
.L29:
	movq	(%rsp), %rdi
	movl	$20, %r14d
	leaq	1136(%rsp), %r13
	leaq	1785040(%rsp), %r15
	call	fclose@PLT
	cvtsi2sdq	120(%rsp), %xmm1
	movl	$891952, %edi
	cvtsi2sdq	128(%rsp), %xmm0
	divsd	.LC4(%rip), %xmm0
	addsd	%xmm1, %xmm0
	movsd	%xmm0, 24(%rsp)
	call	malloc@PLT
	movl	$891952, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$891952, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	48(%rsp), %rdi
	movl	$891952, %esi
	movl	$1, 104(%rsp)
	movq	%rax, (%rsp)
	movabsq	$141733920795, %rax
	movq	%rax, 96(%rsp)
	movabsq	$68719476752, %rax
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$891952, %esi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$891952, %esi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$891952, %esi
	call	cudaMalloc@PLT
	leaq	88(%rsp), %rdi
	movl	$891952, %esi
	call	cudaMalloc@PLT
	leaq	80(%rsp), %rdi
	movl	$891952, %esi
	call	cudaMalloc@PLT
	leaq	1136(%rsp), %rsi
	movl	$222988, %ecx
	movq	%r12, %rdi
	rep movsl
	movl	$222988, %ecx
	movq	%rbp, %rdi
	movl	$891952, %edx
	leaq	893088(%rsp), %rsi
	rep movsl
	movq	(%rsp), %rdi
	leaq	1785040(%rsp), %rsi
	movl	$222988, %ecx
	rep movsl
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$891952, %edx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rsi
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movl	$891952, %edx
	call	cudaMemcpy@PLT
	leaq	893088(%rsp), %rax
	movq	%rax, 16(%rsp)
.L17:
	movl	104(%rsp), %ecx
	movq	96(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	108(%rsp), %rdi
	movl	116(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	88(%rsp), %r9
	movq	80(%rsp), %r8
	movq	72(%rsp), %rcx
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z33__device_stub__Z4blurPiS_S_S_S_S_PiS_S_S_S_S_
.L16:
	movq	72(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	$3, %ecx
	movl	$891952, %edx
	call	cudaMemcpy@PLT
	movq	80(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	$3, %ecx
	movl	$891952, %edx
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rsi
	movq	64(%rsp), %rdi
	movl	$3, %ecx
	movl	$891952, %edx
	call	cudaMemcpy@PLT
	decl	%r14d
	jne	.L17
	movq	72(%rsp), %rsi
	movq	%r12, %rdi
	movl	$2, %ecx
	xorl	%r14d, %r14d
	movl	$891952, %edx
	call	cudaMemcpy@PLT
	movq	80(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$891952, %edx
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$891952, %edx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	%r12, %rsi
	movl	$222988, %ecx
	movq	%r13, %rdi
	rep movsl
	movq	16(%rsp), %rdi
	movl	$222988, %ecx
	movq	%rbp, %rsi
	rep movsl
	movq	(%rsp), %rsi
	movq	%r15, %rdi
	movl	$222988, %ecx
	rep movsl
	movq	48(%rsp), %rdi
	leaq	136(%rsp), %r15
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	leaq	.LC7(%rip), %r12
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	free@PLT
	leaq	.LC5(%rip), %rsi
	leaq	.LC6(%rip), %rdi
	call	fopen@PLT
	movq	%rax, (%rsp)
.L18:
	cmpl	%r14d, %ebx
	jle	.L30
	movq	(%rsp), %rdi
	movq	%r15, %rcx
	movq	%r12, %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	incl	%r14d
	addq	$200, %r15
	call	__fprintf_chk@PLT
	jmp	.L18
.L30:
	movq	(%rsp), %rdi
	leaq	.LC8(%rip), %rdx
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	movl	$2, %esi
	xorl	%ebp, %ebp
	leaq	.LC9(%rip), %r14
	call	__fprintf_chk@PLT
.L20:
	movq	%rbx, %r15
	movl	$428, %r12d
.L22:
	movq	16(%rsp), %rax
	movl	0(%r13,%r15), %ecx
	movq	%r14, %rdx
	incl	%ebp
	movl	1785040(%rsp,%r15), %r9d
	movq	(%rsp), %rdi
	movl	$2, %esi
	movl	(%rax,%r15), %r8d
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	cmpl	$12, %ebp
	jne	.L21
	movq	(%rsp), %rdi
	leaq	.LC8(%rip), %rdx
	xorl	%eax, %eax
	xorl	%ebp, %ebp
	movl	$2, %esi
	call	__fprintf_chk@PLT
.L21:
	addq	$4, %r15
	decl	%r12d
	jne	.L22
	addq	$1712, %rbx
	cmpq	$891952, %rbx
	jne	.L20
	movq	(%rsp), %rdi
	call	fclose@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	cvtsi2sdq	120(%rsp), %xmm1
	leaq	.LC10(%rip), %rsi
	movb	$1, %al
	cvtsi2sdq	128(%rsp), %xmm0
	movl	$2, %edi
	divsd	.LC4(%rip), %xmm0
	addsd	%xmm1, %xmm0
	subsd	24(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	2677192(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$2677208, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z4blurPiS_S_S_S_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4blurPiS_S_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <string.h>
#include <sys/types.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>
#include <stdlib.h>

#define IMAGE_HEIGHT 521
#define IMAGE_WIDTH 428


__global__
void blur(int *d_R, int *d_G, int *d_B, int *d_Rnew, int *d_Gnew, int *d_Bnew)
{
  // Get the X and y coords of the pixel for this thread
  int x = (blockIdx.x * blockDim.x) + threadIdx.x;
  int y = (blockIdx.y * blockDim.y) + threadIdx.y;

  // Stop the thread if it is not part of the image
  if (x >= IMAGE_WIDTH || y >= IMAGE_HEIGHT) {
    return;
  }

  // Apply the box blur
  if (y != 0 && y != (IMAGE_HEIGHT-1) && x != 0 && x != (IMAGE_WIDTH-1)){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*(y+1)) + x]+d_R[(IMAGE_WIDTH*(y-1)) + x]+d_R[(IMAGE_WIDTH*y) + x+1]+d_R[(IMAGE_WIDTH*y) + x-1])/4;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*(y+1)) + x]+d_G[(IMAGE_WIDTH*(y-1)) + x]+d_G[(IMAGE_WIDTH*y) + x+1]+d_G[(IMAGE_WIDTH*y) + x-1])/4;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*(y+1)) + x]+d_B[(IMAGE_WIDTH*(y-1)) + x]+d_B[(IMAGE_WIDTH*y) + x+1]+d_B[(IMAGE_WIDTH*y) + x-1])/4;
  }
  else if (y == 0 && x != 0 && x != (IMAGE_WIDTH-1)){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*(y+1)) + x]+d_R[(IMAGE_WIDTH*y) + x+1]+d_R[(IMAGE_WIDTH*y) + x-1])/3;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*(y+1)) + x]+d_G[(IMAGE_WIDTH*y) + x+1]+d_G[(IMAGE_WIDTH*y) + x-1])/3;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*(y+1)) + x]+d_B[(IMAGE_WIDTH*y) + x+1]+d_B[(IMAGE_WIDTH*y) + x-1])/3;
  }
  else if (y == (IMAGE_HEIGHT-1) && x != 0 && x != (IMAGE_WIDTH-1)){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*(y-1)) + x]+d_R[(IMAGE_WIDTH*y) + x+1]+d_R[(IMAGE_WIDTH*y) + x-1])/3;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*(y-1)) + x]+d_G[(IMAGE_WIDTH*y) + x+1]+d_G[(IMAGE_WIDTH*y) + x-1])/3;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*(y-1)) + x]+d_B[(IMAGE_WIDTH*y) + x+1]+d_B[(IMAGE_WIDTH*y) + x-1])/3;
  }
  else if (x == 0 && y != 0 && y != (IMAGE_HEIGHT-1)){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*(y+1)) + x]+d_R[(IMAGE_WIDTH*(y-1)) + x]+d_R[(IMAGE_WIDTH*y) + x+1])/3;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*(y+1)) + x]+d_G[(IMAGE_WIDTH*(y-1)) + x]+d_G[(IMAGE_WIDTH*y) + x+1])/3;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*(y+1)) + x]+d_B[(IMAGE_WIDTH*(y-1)) + x]+d_B[(IMAGE_WIDTH*y) + x+1])/3;
  }
  else if (x == (IMAGE_WIDTH-1) && y != 0 && y != (IMAGE_HEIGHT-1)){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*(y+1)) + x]+d_R[(IMAGE_WIDTH*(y-1)) + x]+d_R[(IMAGE_WIDTH*y) + x-1])/3;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*(y+1)) + x]+d_G[(IMAGE_WIDTH*(y-1)) + x]+d_G[(IMAGE_WIDTH*y) + x-1])/3;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*(y+1)) + x]+d_B[(IMAGE_WIDTH*(y-1)) + x]+d_B[(IMAGE_WIDTH*y) + x-1])/3;
  }
  else if (y==0 &&x==0){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*y) + x+1]+d_R[(IMAGE_WIDTH*(y+1)) + x])/2;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*y) + x+1]+d_G[(IMAGE_WIDTH*(y+1)) + x])/2;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*y) + x+1]+d_B[(IMAGE_WIDTH*(y+1)) + x])/2;
  }
  else if (y==0 &&x==(IMAGE_WIDTH-1)){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*y) + x-1]+d_R[(IMAGE_WIDTH*(y+1)) + x])/2;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*y) + x-1]+d_G[(IMAGE_WIDTH*(y+1)) + x])/2;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*y) + x-1]+d_B[(IMAGE_WIDTH*(y+1)) + x])/2;
  }
  else if (y==(IMAGE_HEIGHT-1) &&x==0){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*y) + x+1]+d_R[(IMAGE_WIDTH*(y-1)) + x])/2;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*y) + x+1]+d_G[(IMAGE_WIDTH*(y-1)) + x])/2;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*y) + x+1]+d_B[(IMAGE_WIDTH*(y-1)) + x])/2;
  }
  else if (y==(IMAGE_HEIGHT-1) &&x==(IMAGE_WIDTH-1)){
    d_Rnew[(IMAGE_WIDTH*y) + x] = (d_R[(IMAGE_WIDTH*y) + x-1]+d_R[(IMAGE_WIDTH*(y-1)) + x])/2;
    d_Gnew[(IMAGE_WIDTH*y) + x] = (d_G[(IMAGE_WIDTH*y) + x-1]+d_G[(IMAGE_WIDTH*(y-1)) + x])/2;
    d_Bnew[(IMAGE_WIDTH*y) + x] = (d_B[(IMAGE_WIDTH*y) + x-1]+d_B[(IMAGE_WIDTH*(y-1)) + x])/2;
  }

}

int main (int argc, const char * argv[]) {
  struct timeval tim;
  gettimeofday(&tim, NULL);
  static int const maxlen = 200, rowsize = 521, colsize = 428, linelen = 12;
  char str[maxlen], lines[5][maxlen];
  FILE *fp, *fout;
  int nlines = 0;
  unsigned int h1, h2, h3;
  char *sptr;
  int R[rowsize][colsize], G[rowsize][colsize], B[rowsize][colsize];
  int row = 0, col = 0, nblurs, lineno=0, k;

  fp = fopen("David.ps", "r");

  while(! feof(fp))
  {
    fscanf(fp, "\n%[^\n]", str);
    if (nlines < 5) {strcpy((char *)lines[nlines++],(char *)str);}
    else{
      for (sptr=&str[0];*sptr != '\0';sptr+=6){
        sscanf(sptr,"%2x",&h1);
        sscanf(sptr+2,"%2x",&h2);
        sscanf(sptr+4,"%2x",&h3);

        if (col==colsize){
          col = 0;
          row++;
        }
        if (row < rowsize) {
          R[row][col] = h1;
          G[row][col] = h2;
          B[row][col] = h3;
        }
        col++;
      }
    }
  }
  fclose(fp);
  // Number of blur iterations
  // nblurs = atoi(argv[1]); // Get iterations from argument
  nblurs = 20;
  // Start the timer
  double t1=tim.tv_sec+(tim.tv_usec/1000000.0);
  // The size of the 1D arrays for the GPU
  int size = sizeof(int) * IMAGE_WIDTH * IMAGE_HEIGHT;
  // Initialise the arrays to hold the flatened image
  int *h_R, *h_G, *h_B;
  h_R = (int *)malloc(size);
  h_G = (int *)malloc(size);
  h_B = (int *)malloc(size);
  // Create pointers to GPU array locations
  int *d_R, *d_G, *d_B, *d_Rnew, *d_Gnew, *d_Bnew;
  // Define how many threads per block
  int numBlocksY = ceil(IMAGE_HEIGHT/16.0);
  int numBlocksX = ceil(IMAGE_WIDTH/16.0);
  dim3 dimBlock(numBlocksX,numBlocksY);
  // Define how many blocks per grid
  dim3 dimGrid(16, 16);
  // Allocate GPU mem for the 1D arrays
  hipMalloc((void **)&d_R, size);
  hipMalloc((void **)&d_G, size);
  hipMalloc((void **)&d_B, size);
  hipMalloc((void **)&d_Rnew, size);
  hipMalloc((void **)&d_Bnew, size);
  hipMalloc((void **)&d_Gnew, size);

  // Flatten the 2D arrays to make them easier to handle with CUDA
  for (int row=0;row<IMAGE_HEIGHT;row++){
    for (int col=0;col<IMAGE_WIDTH;col++){
      h_R[IMAGE_WIDTH*row+col] = R[row][col];
      h_G[IMAGE_WIDTH*row+col] = G[row][col];
      h_B[IMAGE_WIDTH*row+col] = B[row][col];
    }
  }

  // Copy these arrays to the GPU
  hipMemcpy(d_R, h_R, size, hipMemcpyHostToDevice);
  hipMemcpy(d_G, h_G, size, hipMemcpyHostToDevice);
  hipMemcpy(d_B, h_B, size, hipMemcpyHostToDevice);

  // Start the blur loop
  for(k=0;k<nblurs;k++){
    // Punch it Chewie
    blur<<<dimGrid, dimBlock>>>(d_R, d_G, d_B, d_Rnew, d_Gnew, d_Bnew);
    // Copy the modified values to the original locations ready for a new iteration
    hipMemcpy(d_R, d_Rnew, size, hipMemcpyDeviceToDevice);
    hipMemcpy(d_G, d_Gnew, size, hipMemcpyDeviceToDevice);
    hipMemcpy(d_B, d_Bnew, size, hipMemcpyDeviceToDevice);
  }

  // Copy the data off the GPU
  hipMemcpy(h_R, d_Rnew, size, hipMemcpyDeviceToHost);
  hipMemcpy(h_G, d_Gnew, size, hipMemcpyDeviceToHost);
  hipMemcpy(h_B, d_Bnew, size, hipMemcpyDeviceToHost);

  // Convert the 1D arrays back into 2D
  for (int row=0;row<IMAGE_HEIGHT;row++){
    for (int col=0;col<IMAGE_WIDTH;col++){
      R[row][col] = h_R[IMAGE_WIDTH*row+col];
      G[row][col] = h_G[IMAGE_WIDTH*row+col];
      B[row][col] = h_B[IMAGE_WIDTH*row+col];
    }
  }

  // Free up the allocated memory
  hipFree(d_R); hipFree(d_G); hipFree(d_B);
  hipFree(d_Rnew); hipFree(d_Gnew); hipFree(d_Bnew);
  free(h_R); free(h_G); free(h_B);

  fout= fopen("DavidBlur.ps", "w");
  for (k=0;k<nlines;k++) fprintf(fout,"\n%s", lines[k]);
  fprintf(fout,"\n");
  for(row=0;row<rowsize;row++){
    for (col=0;col<colsize;col++){
      fprintf(fout,"%02x%02x%02x",R[row][col],G[row][col],B[row][col]);
      lineno++;
      if (lineno==linelen){
        fprintf(fout,"\n");
        lineno = 0;
      }
    }
  }
  fclose(fout);
  gettimeofday(&tim, NULL);
  double t2=tim.tv_sec+(tim.tv_usec/1000000.0);
  printf("%.6lf seconds elapsed\n", t2-t1);
  return 0;
}

	.text
	.file	"blur.hip"
	.globl	_Z19__device_stub__blurPiS_S_S_S_S_ # -- Begin function _Z19__device_stub__blurPiS_S_S_S_S_
	.type	_Z19__device_stub__blurPiS_S_S_S_S_,@function
_Z19__device_stub__blurPiS_S_S_S_S_:    # @_Z19__device_stub__blurPiS_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4blurPiS_S_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z19__device_stub__blurPiS_S_S_S_S_, .Lfunc_end0-_Z19__device_stub__blurPiS_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$2677208, %rsp                  # imm = 0x28D9D8
	.cfi_def_cfa_offset 2677264
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	leaq	112(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %r15
	movq	%rax, %rdi
	callq	feof
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.1:                                # %.lr.ph155.preheader
	leaq	128(%rsp), %rbp
	leaq	84(%rsp), %r13
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
	xorl	%ebx, %ebx
	movq	%r15, 8(%rsp)                   # 8-byte Spill
.LBB1_2:                                # %.lr.ph155
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_7 Depth 2
	movl	$.L.str.2, %esi
	movq	%r15, %r12
	movq	%r15, %rdi
	movq	%rbp, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movq	16(%rsp), %rcx                  # 8-byte Reload
	cmpl	$5, %ecx
	jge	.LBB1_3
# %bb.5:                                #   in Loop: Header=BB1_2 Depth=1
	movslq	%ecx, %rax
	incl	%ecx
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	imulq	$200, %rax, %rax
	leaq	(%rsp,%rax), %rdi
	addq	$336, %rdi                      # imm = 0x150
	movq	%rbp, %rsi
	callq	strcpy
	jmp	.LBB1_4
.LBB1_3:                                # %.preheader145
                                        #   in Loop: Header=BB1_2 Depth=1
	cmpb	$0, 128(%rsp)
	je	.LBB1_4
# %bb.6:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_2 Depth=1
	leaq	128(%rsp), %rbp
	leaq	88(%rsp), %r12
.LBB1_7:                                # %.lr.ph
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%r14d, %r15d
	movl	$.L.str.3, %esi
	movq	%rbp, %rdi
	leaq	92(%rsp), %rdx
	xorl	%eax, %eax
	callq	__isoc23_sscanf
	leaq	2(%rbp), %rdi
	movl	$.L.str.3, %esi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	__isoc23_sscanf
	addq	$4, %rbp
	movl	$.L.str.3, %esi
	movq	%rbp, %rdi
	movq	%r13, %rdx
	xorl	%eax, %eax
	callq	__isoc23_sscanf
	xorl	%r14d, %r14d
	cmpl	$428, %ebx                      # imm = 0x1AC
	sete	%r14b
	movl	$0, %eax
	cmovel	%eax, %ebx
	addl	%r15d, %r14d
	cmpl	$520, %r14d                     # imm = 0x208
	jg	.LBB1_9
# %bb.8:                                #   in Loop: Header=BB1_7 Depth=2
	movl	92(%rsp), %eax
	movslq	%r14d, %rcx
	movslq	%ebx, %rdx
	imulq	$1712, %rcx, %rcx               # imm = 0x6B0
	leaq	(%rsp,%rcx), %rsi
	addq	$1785248, %rsi                  # imm = 0x1B3DA0
	movl	%eax, (%rsi,%rdx,4)
	movl	88(%rsp), %eax
	leaq	893296(%rsp,%rcx), %rsi
	movl	%eax, (%rsi,%rdx,4)
	movl	84(%rsp), %eax
	addq	%rsp, %rcx
	addq	$1344, %rcx                     # imm = 0x540
	movl	%eax, (%rcx,%rdx,4)
.LBB1_9:                                #   in Loop: Header=BB1_7 Depth=2
	incl	%ebx
	cmpb	$0, 2(%rbp)
	leaq	2(%rbp), %rbp
	jne	.LBB1_7
# %bb.10:                               #   in Loop: Header=BB1_2 Depth=1
	movq	8(%rsp), %r15                   # 8-byte Reload
	jmp	.LBB1_11
.LBB1_4:                                #   in Loop: Header=BB1_2 Depth=1
	movq	%r12, %r15
.LBB1_11:                               # %.loopexit
                                        #   in Loop: Header=BB1_2 Depth=1
	movq	%r15, %rdi
	callq	feof
	testl	%eax, %eax
	leaq	128(%rsp), %rbp
	je	.LBB1_2
.LBB1_12:                               # %._crit_edge
	movq	%r15, %rdi
	callq	fclose
	movq	112(%rsp), %rax
	movq	%rax, 104(%rsp)                 # 8-byte Spill
	movq	120(%rsp), %rax
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	movl	$891952, %edi                   # imm = 0xD9C30
	callq	malloc
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	$891952, %edi                   # imm = 0xD9C30
	callq	malloc
	movq	%rax, %rbp
	movl	$891952, %edi                   # imm = 0xD9C30
	callq	malloc
	movq	%rax, %rbx
	leaq	72(%rsp), %rdi
	movl	$891952, %esi                   # imm = 0xD9C30
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movl	$891952, %esi                   # imm = 0xD9C30
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movl	$891952, %esi                   # imm = 0xD9C30
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movl	$891952, %esi                   # imm = 0xD9C30
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$891952, %esi                   # imm = 0xD9C30
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movl	$891952, %esi                   # imm = 0xD9C30
	callq	hipMalloc
	xorl	%r14d, %r14d
	movq	%rbx, 8(%rsp)                   # 8-byte Spill
.LBB1_13:                               # %.preheader144
                                        # =>This Inner Loop Header: Depth=1
	movq	8(%rsp), %rax                   # 8-byte Reload
	leaq	(%rax,%r14), %r12
	leaq	(%rsp,%r14), %r13
	addq	$1344, %r13                     # imm = 0x540
	movq	%rbp, %r15
	addq	%r14, %rbp
	leaq	893296(%rsp,%r14), %rbx
	movq	24(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%r14), %rdi
	leaq	(%rsp,%r14), %rsi
	addq	$1785248, %rsi                  # imm = 0x1B3DA0
	movl	$1712, %edx                     # imm = 0x6B0
	callq	memcpy@PLT
	movl	$1712, %edx                     # imm = 0x6B0
	movq	%rbp, %rdi
	movq	%r15, %rbp
	movq	%rbx, %rsi
	callq	memcpy@PLT
	movl	$1712, %edx                     # imm = 0x6B0
	movq	%r12, %rdi
	movq	8(%rsp), %rbx                   # 8-byte Reload
	movq	%r13, %rsi
	callq	memcpy@PLT
	addq	$1712, %r14                     # imm = 0x6B0
	cmpq	$891952, %r14                   # imm = 0xD9C30
	jne	.LBB1_13
# %bb.14:
	movq	72(%rsp), %rdi
	movl	$891952, %edx                   # imm = 0xD9C30
	movq	24(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rdi
	movl	$891952, %edx                   # imm = 0xD9C30
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	56(%rsp), %rdi
	movl	$891952, %edx                   # imm = 0xD9C30
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$20, %ebx
	movabsq	$68719476752, %r12              # imm = 0x1000000010
	movabsq	$141733920795, %r13             # imm = 0x210000001B
.LBB1_15:                               # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_17
# %bb.16:                               #   in Loop: Header=BB1_15 Depth=1
	movq	72(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rcx
	movq	40(%rsp), %r8
	movq	32(%rsp), %r9
	callq	_Z19__device_stub__blurPiS_S_S_S_S_
.LBB1_17:                               #   in Loop: Header=BB1_15 Depth=1
	movq	72(%rsp), %rdi
	movq	48(%rsp), %rsi
	movl	$891952, %edx                   # imm = 0xD9C30
	movl	$3, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rdi
	movq	40(%rsp), %rsi
	movl	$891952, %edx                   # imm = 0xD9C30
	movl	$3, %ecx
	callq	hipMemcpy
	movq	56(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	$891952, %edx                   # imm = 0xD9C30
	movl	$3, %ecx
	callq	hipMemcpy
	decl	%ebx
	jne	.LBB1_15
# %bb.18:
	movq	48(%rsp), %rsi
	movl	$891952, %edx                   # imm = 0xD9C30
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rsi
	movl	$891952, %edx                   # imm = 0xD9C30
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rsi
	movl	$891952, %edx                   # imm = 0xD9C30
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r14d, %r14d
.LBB1_19:                               # %.preheader143
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%rsp,%r14), %rbx
	addq	$1344, %rbx                     # imm = 0x540
	movq	8(%rsp), %rax                   # 8-byte Reload
	leaq	(%rax,%r14), %r12
	leaq	893296(%rsp,%r14), %r13
	leaq	(%r15,%r14), %rbp
	leaq	1785248(%rsp,%r14), %rdi
	movq	24(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%r14), %rsi
	movl	$1712, %edx                     # imm = 0x6B0
	callq	memcpy@PLT
	movl	$1712, %edx                     # imm = 0x6B0
	movq	%r13, %rdi
	movq	%rbp, %rsi
	movq	%r15, %r13
	callq	memcpy@PLT
	movl	$1712, %edx                     # imm = 0x6B0
	movq	%rbx, %rdi
	movq	%r12, %rsi
	movq	8(%rsp), %rbx                   # 8-byte Reload
	callq	memcpy@PLT
	addq	$1712, %r14                     # imm = 0x6B0
	cmpq	$891952, %r14                   # imm = 0xD9C30
	jne	.LBB1_19
# %bb.20:
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	movl	$.L.str.4, %edi
	movl	$.L.str.5, %esi
	callq	fopen
	movq	%rax, %rbx
	movq	16(%rsp), %rax                  # 8-byte Reload
	testl	%eax, %eax
	jle	.LBB1_23
# %bb.21:                               # %.lr.ph164.preheader
	movl	%eax, %r15d
	leaq	336(%rsp), %r14
.LBB1_22:                               # %.lr.ph164
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.6, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	fprintf
	addq	$200, %r14
	decq	%r15
	jne	.LBB1_22
.LBB1_23:                               # %._crit_edge165
	movl	$10, %edi
	movq	%rbx, %rsi
	callq	fputc@PLT
	leaq	1785248(%rsp), %r14
	leaq	893296(%rsp), %r15
	leaq	1344(%rsp), %r12
	xorl	%ecx, %ecx
	xorl	%r13d, %r13d
.LBB1_24:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_25 Depth 2
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	xorl	%ebp, %ebp
.LBB1_25:                               #   Parent Loop BB1_24 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r14,%rbp,4), %edx
	movl	(%r15,%rbp,4), %ecx
	movl	(%r12,%rbp,4), %r8d
	movl	$.L.str.8, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	fprintf
	incl	%r13d
	cmpl	$12, %r13d
	jne	.LBB1_27
# %bb.26:                               #   in Loop: Header=BB1_25 Depth=2
	movl	$10, %edi
	movq	%rbx, %rsi
	callq	fputc@PLT
	xorl	%r13d, %r13d
.LBB1_27:                               #   in Loop: Header=BB1_25 Depth=2
	incq	%rbp
	cmpq	$428, %rbp                      # imm = 0x1AC
	jne	.LBB1_25
# %bb.28:                               #   in Loop: Header=BB1_24 Depth=1
	movq	8(%rsp), %rcx                   # 8-byte Reload
	incq	%rcx
	movl	$1712, %eax                     # imm = 0x6B0
	addq	%rax, %r14
	addq	%rax, %r15
	addq	%rax, %r12
	cmpq	$521, %rcx                      # imm = 0x209
	jne	.LBB1_24
# %bb.29:
	cvtsi2sdq	104(%rsp), %xmm0        # 8-byte Folded Reload
	cvtsi2sdq	96(%rsp), %xmm1         # 8-byte Folded Reload
	divsd	.LCPI1_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	fclose
	leaq	112(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm1, %xmm1
	cvtsi2sdq	(%rbx), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%rbx), %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	subsd	8(%rsp), %xmm0                  # 8-byte Folded Reload
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$2677208, %rsp                  # imm = 0x28D9D8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4blurPiS_S_S_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4blurPiS_S_S_S_S_,@object     # @_Z4blurPiS_S_S_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z4blurPiS_S_S_S_S_
	.p2align	3, 0x0
_Z4blurPiS_S_S_S_S_:
	.quad	_Z19__device_stub__blurPiS_S_S_S_S_
	.size	_Z4blurPiS_S_S_S_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"David.ps"
	.size	.L.str, 9

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"r"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\n%[^\n]"
	.size	.L.str.2, 7

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%2x"
	.size	.L.str.3, 4

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"DavidBlur.ps"
	.size	.L.str.4, 13

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"w"
	.size	.L.str.5, 2

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"\n%s"
	.size	.L.str.6, 4

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"%02x%02x%02x"
	.size	.L.str.8, 13

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"%.6lf seconds elapsed\n"
	.size	.L.str.9, 23

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4blurPiS_S_S_S_S_"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__blurPiS_S_S_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4blurPiS_S_S_S_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4blurPiS_S_S_S_S_     ; -- Begin function _Z4blurPiS_S_S_S_S_
	.globl	_Z4blurPiS_S_S_S_S_
	.p2align	8
	.type	_Z4blurPiS_S_S_S_S_,@function
_Z4blurPiS_S_S_S_S_:                    ; @_Z4blurPiS_S_S_S_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x3c
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	v_cmp_gt_i32_e32 vcc_lo, 0x1ac, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, 0x209, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_47
; %bb.1:
	s_clause 0x1
	s_load_b256 s[8:15], s[0:1], 0x0
	s_load_b128 s[16:19], s[0:1], 0x20
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	v_cmp_eq_u32_e64 s0, 0x208, v2
	v_cmp_eq_u32_e64 s1, 0, v0
	v_cmp_eq_u32_e64 s2, 0x1ab, v0
	s_delay_alu instid0(VALU_DEP_3)
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s5, exec_lo, s1
	s_cbranch_execz .LBB0_45
; %bb.2:
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_mov_b32 s0, -1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.3:                                ; %NodeBlock
	s_mov_b32 s1, -1
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_i32_e32 0x1ab, v0
	s_cbranch_execz .LBB0_7
; %bb.4:                                ; %LeafBlock
	v_cmp_eq_u32_e64 s0, 0, v0
	s_mov_b32 s4, exec_lo
	v_cmpx_ne_u32_e32 0, v0
	s_cbranch_execz .LBB0_6
; %bb.5:
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, s1, s8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s1, s9, v4, s1
	s_clause 0x2
	global_load_b32 v1, v[5:6], off offset:1712
	global_load_b32 v7, v[5:6], off offset:4
	global_load_b32 v5, v[5:6], off offset:-4
	s_waitcnt vmcnt(0)
	v_add3_u32 v1, v7, v1, v5
	v_add_co_u32 v5, s1, s14, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v6, s1, s15, v4, s1
	v_mul_hi_i32 v1, 0x55555556, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v7, 31, v1
	v_add_nc_u32_e32 v1, v1, v7
	v_add_co_u32 v7, s1, s10, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s1, s11, v4, s1
	global_store_b32 v[5:6], v1, off
	s_clause 0x2
	global_load_b32 v1, v[7:8], off offset:1712
	global_load_b32 v5, v[7:8], off offset:4
	global_load_b32 v6, v[7:8], off offset:-4
	s_waitcnt vmcnt(0)
	v_add3_u32 v1, v5, v1, v6
	v_add_co_u32 v5, s1, s16, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v6, s1, s17, v4, s1
	v_mul_hi_i32 v1, 0x55555556, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v7, 31, v1
	v_add_nc_u32_e32 v1, v1, v7
	v_add_co_u32 v7, s1, s12, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s1, s13, v4, s1
	global_store_b32 v[5:6], v1, off
	s_clause 0x2
	global_load_b32 v1, v[7:8], off offset:1712
	global_load_b32 v5, v[7:8], off offset:4
	global_load_b32 v6, v[7:8], off offset:-4
	v_add_co_u32 v3, s1, s18, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s1, s19, v4, s1
	s_waitcnt vmcnt(0)
	v_add3_u32 v1, v5, v1, v6
	v_mul_hi_i32 v1, 0x55555556, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v5, 31, v1
	v_add_nc_u32_e32 v1, v1, v5
	global_store_b32 v[3:4], v1, off
.LBB0_6:                                ; %Flow415
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s1, s0, exec_lo
.LBB0_7:                                ; %Flow414
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s0, s1, exec_lo
.LBB0_8:                                ; %Flow413
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_44
; %bb.9:
	v_cmp_eq_u32_e64 s0, 0x208, v2
	s_mov_b32 s1, -1
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB0_15
; %bb.10:                               ; %NodeBlock385
	s_mov_b32 s2, -1
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_i32_e32 0x1ab, v0
	s_cbranch_execz .LBB0_14
; %bb.11:                               ; %LeafBlock383
	v_cmp_eq_u32_e64 s1, 0, v0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v0
	s_cbranch_execz .LBB0_13
; %bb.12:
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	v_add_co_u32 v1, s2, 0xd8ed0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s2, 0, v4, s2
	v_add_co_u32 v12, s2, 0xd9584, v3
	v_add_co_ci_u32_e64 v13, s2, 0, v4, s2
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, s2, s8, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s2, s9, v11, s2
	v_add_co_u32 v14, s2, 0xd957c, v3
	v_add_co_ci_u32_e64 v15, s2, 0, v4, s2
	v_add_co_u32 v7, s2, s8, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v8, s2, s9, v13, s2
	v_add_co_u32 v9, s2, s8, v14
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s9, v15, s2
	s_clause 0x2
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[7:8], off
	global_load_b32 v7, v[9:10], off
	v_add_co_u32 v16, s2, 0xd9580, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v17, s2, 0, v4, s2
	v_add_co_u32 v3, s2, s14, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s15, v17, s2
	s_waitcnt vmcnt(0)
	v_add3_u32 v5, v6, v5, v7
	v_mul_hi_i32 v9, 0x55555556, v5
	v_add_co_u32 v5, s2, s10, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s2, s11, v11, s2
	v_add_co_u32 v7, s2, s10, v12
	v_add_co_ci_u32_e64 v8, s2, s11, v13, s2
	v_lshrrev_b32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v18, v9, v10
	v_add_co_u32 v9, s2, s10, v14
	v_add_co_ci_u32_e64 v10, s2, s11, v15, s2
	global_store_b32 v[3:4], v18, off
	s_clause 0x2
	global_load_b32 v3, v[5:6], off
	global_load_b32 v4, v[7:8], off
	global_load_b32 v5, v[9:10], off
	s_waitcnt vmcnt(0)
	v_add3_u32 v3, v4, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_hi_i32 v9, 0x55555556, v3
	v_add_co_u32 v3, s2, s16, v16
	v_add_co_ci_u32_e64 v4, s2, s17, v17, s2
	v_add_co_u32 v5, s2, s12, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s2, s13, v11, s2
	v_lshrrev_b32_e32 v1, 31, v9
	v_add_co_u32 v7, s2, s12, v12
	v_add_co_ci_u32_e64 v8, s2, s13, v13, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v9, v1
	v_add_co_u32 v9, s2, s12, v14
	v_add_co_ci_u32_e64 v10, s2, s13, v15, s2
	global_store_b32 v[3:4], v1, off
	s_clause 0x2
	global_load_b32 v1, v[5:6], off
	global_load_b32 v3, v[7:8], off
	global_load_b32 v4, v[9:10], off
	s_waitcnt vmcnt(0)
	v_add3_u32 v1, v3, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_i32 v1, 0x55555556, v1
	v_lshrrev_b32_e32 v3, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v1, v3
	v_add_co_u32 v3, s2, s18, v16
	v_add_co_ci_u32_e64 v4, s2, s19, v17, s2
	global_store_b32 v[3:4], v1, off
.LBB0_13:                               ; %Flow411
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s2, s1, exec_lo
.LBB0_14:                               ; %Flow410
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s1, s2, exec_lo
.LBB0_15:                               ; %Flow409
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB0_44
; %bb.16:
	v_cmp_eq_u32_e64 s1, 0, v0
	s_mov_b32 s2, -1
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s4, s1
	s_cbranch_execz .LBB0_22
; %bb.17:                               ; %NodeBlock389
	s_mov_b32 s3, -1
	s_mov_b32 s7, exec_lo
	v_cmpx_gt_i32_e32 0x208, v2
	s_cbranch_execz .LBB0_21
; %bb.18:                               ; %LeafBlock387
	v_cmp_eq_u32_e64 s2, 0, v2
	s_mov_b32 s20, exec_lo
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB0_20
; %bb.19:
	v_mul_lo_u32 v3, 0x1ac, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, 0xfffffe54, v3
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s3, s8, v5
	v_add_co_ci_u32_e64 v8, s3, s9, v6, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s3, s8, v3
	v_add_co_ci_u32_e64 v10, s3, s9, v4, s3
	s_clause 0x2
	global_load_b32 v1, v[7:8], off
	global_load_b32 v7, v[9:10], off offset:1712
	global_load_b32 v8, v[9:10], off offset:4
	s_waitcnt vmcnt(0)
	v_add3_u32 v1, v1, v7, v8
	v_add_co_u32 v7, s3, s14, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s3, s15, v4, s3
	v_mul_hi_i32 v1, 0x55555556, v1
	v_add_co_u32 v9, s3, s10, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v10, s3, s11, v6, s3
	v_lshrrev_b32_e32 v11, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v1, v11
	v_add_co_u32 v11, s3, s10, v3
	v_add_co_ci_u32_e64 v12, s3, s11, v4, s3
	global_store_b32 v[7:8], v1, off
	s_clause 0x2
	global_load_b32 v1, v[9:10], off
	global_load_b32 v7, v[11:12], off offset:1712
	global_load_b32 v8, v[11:12], off offset:4
	s_waitcnt vmcnt(0)
	v_add3_u32 v1, v1, v7, v8
	v_add_co_u32 v7, s3, s16, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s3, s17, v4, s3
	v_mul_hi_i32 v1, 0x55555556, v1
	v_add_co_u32 v5, s3, s12, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v6, s3, s13, v6, s3
	v_lshrrev_b32_e32 v9, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v1, v9
	v_add_co_u32 v9, s3, s12, v3
	v_add_co_ci_u32_e64 v10, s3, s13, v4, s3
	global_store_b32 v[7:8], v1, off
	s_clause 0x2
	global_load_b32 v1, v[5:6], off
	global_load_b32 v5, v[9:10], off offset:1712
	global_load_b32 v6, v[9:10], off offset:4
	v_add_co_u32 v3, s3, s18, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s3, s19, v4, s3
	s_waitcnt vmcnt(0)
	v_add3_u32 v1, v1, v5, v6
	v_mul_hi_i32 v1, 0x55555556, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v5, 31, v1
	v_add_nc_u32_e32 v1, v1, v5
	global_store_b32 v[3:4], v1, off
.LBB0_20:                               ; %Flow407
	s_or_b32 exec_lo, exec_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s3, s2, exec_lo
.LBB0_21:                               ; %Flow406
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s2, s3, exec_lo
.LBB0_22:                               ; %Flow405
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_44
; %bb.23:
	v_cmp_eq_u32_e64 s2, 0x1ab, v0
	s_mov_b32 s3, -1
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB0_29
; %bb.24:                               ; %NodeBlock393
	s_mov_b32 s4, -1
	s_mov_b32 s20, exec_lo
	v_cmpx_gt_i32_e32 0x208, v2
	s_cbranch_execz .LBB0_28
; %bb.25:                               ; %LeafBlock391
	v_cmp_eq_u32_e64 s3, 0, v2
	s_mov_b32 s21, exec_lo
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB0_27
; %bb.26:
	v_mul_lo_u32 v3, 0x1ac, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, -1, v3
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s4, s8, v5
	v_add_co_ci_u32_e64 v8, s4, s9, v6, s4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s4, s8, v3
	v_add_co_ci_u32_e64 v10, s4, s9, v4, s4
	s_clause 0x2
	global_load_b32 v1, v[7:8], off
	global_load_b32 v7, v[9:10], off offset:3420
	global_load_b32 v8, v[9:10], off offset:1704
	s_waitcnt vmcnt(0)
	v_add3_u32 v1, v1, v7, v8
	v_add_co_u32 v7, s4, s14, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s4, s15, v4, s4
	v_mul_hi_i32 v1, 0x55555556, v1
	v_add_co_u32 v9, s4, s10, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v10, s4, s11, v6, s4
	v_lshrrev_b32_e32 v11, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v1, v11
	v_add_co_u32 v11, s4, s10, v3
	v_add_co_ci_u32_e64 v12, s4, s11, v4, s4
	global_store_b32 v[7:8], v1, off offset:1708
	s_clause 0x2
	global_load_b32 v1, v[9:10], off
	global_load_b32 v7, v[11:12], off offset:3420
	global_load_b32 v8, v[11:12], off offset:1704
	s_waitcnt vmcnt(0)
	v_add3_u32 v1, v1, v7, v8
	v_add_co_u32 v7, s4, s16, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s4, s17, v4, s4
	v_mul_hi_i32 v1, 0x55555556, v1
	v_add_co_u32 v5, s4, s12, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v6, s4, s13, v6, s4
	v_lshrrev_b32_e32 v9, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v1, v9
	v_add_co_u32 v9, s4, s12, v3
	v_add_co_ci_u32_e64 v10, s4, s13, v4, s4
	global_store_b32 v[7:8], v1, off offset:1708
	s_clause 0x2
	global_load_b32 v1, v[5:6], off
	global_load_b32 v5, v[9:10], off offset:3420
	global_load_b32 v6, v[9:10], off offset:1704
	v_add_co_u32 v3, s4, s18, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s4, s19, v4, s4
	s_waitcnt vmcnt(0)
	v_add3_u32 v1, v1, v5, v6
	v_mul_hi_i32 v1, 0x55555556, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v5, 31, v1
	v_add_nc_u32_e32 v1, v1, v5
	global_store_b32 v[3:4], v1, off offset:1708
.LBB0_27:                               ; %Flow403
	s_or_b32 exec_lo, exec_lo, s21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s4, s3, exec_lo
.LBB0_28:                               ; %Flow402
	s_or_b32 exec_lo, exec_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s3, s4, exec_lo
.LBB0_29:                               ; %Flow401
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB0_44
; %bb.30:
	v_or_b32_e32 v0, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s3, 0, v0
	s_and_saveexec_b32 s4, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s4
	s_cbranch_execz .LBB0_42
; %bb.31:
	s_and_b32 s4, s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s4, s4, -1
	s_and_saveexec_b32 s7, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s7
	s_cbranch_execz .LBB0_39
; %bb.32:
	s_and_b32 s1, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s1, s1, -1
	s_and_saveexec_b32 s7, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s7
	s_cbranch_execz .LBB0_36
; %bb.33:
	s_and_b32 s2, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_35
; %bb.34:
	s_mov_b32 s2, 0xd9c28
	s_mov_b32 s7, 0xd957c
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	s_load_b32 s2, s[8:9], s2 offset:0x0
	s_load_b32 s7, s[8:9], s7 offset:0x0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s7, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s7, s2, 31
	s_add_i32 s2, s2, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s2, s2, 1
	v_dual_mov_b32 v0, 0xd9000 :: v_dual_mov_b32 v1, s2
	global_store_b32 v0, v1, s[14:15] offset:3116
	s_clause 0x1
	global_load_b32 v1, v0, s[10:11] offset:3112
	global_load_b32 v2, v0, s[10:11] offset:1404
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 31, v1
	v_add_nc_u32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 1, v1
	global_store_b32 v0, v1, s[16:17] offset:3116
	s_clause 0x1
	global_load_b32 v1, v0, s[12:13] offset:3112
	global_load_b32 v2, v0, s[12:13] offset:1404
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 31, v1
	v_add_nc_u32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 1, v1
	global_store_b32 v0, v1, s[18:19] offset:3116
.LBB0_35:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_36:                               ; %Flow395
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_38
; %bb.37:
	s_mov_b32 s1, 0xd9584
	s_mov_b32 s2, 0xd8ed0
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	s_load_b32 s1, s[8:9], s1 offset:0x0
	s_load_b32 s2, s[8:9], s2 offset:0x0
	v_mov_b32_e32 v2, 0xd8000
	s_waitcnt lgkmcnt(0)
	s_add_i32 s1, s2, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s2, s1, 31
	s_add_i32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s1, s1, 1
	v_dual_mov_b32 v0, 0xd9000 :: v_dual_mov_b32 v1, s1
	global_store_b32 v0, v1, s[14:15] offset:1408
	s_clause 0x1
	global_load_b32 v1, v0, s[10:11] offset:1412
	global_load_b32 v3, v2, s[10:11] offset:3792
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 31, v1
	v_add_nc_u32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 1, v1
	global_store_b32 v0, v1, s[16:17] offset:1408
	s_clause 0x1
	global_load_b32 v1, v0, s[12:13] offset:1412
	global_load_b32 v2, v2, s[12:13] offset:3792
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 31, v1
	v_add_nc_u32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 1, v1
	global_store_b32 v0, v1, s[18:19] offset:1408
.LBB0_38:                               ; %Flow396
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_39:                               ; %Flow397
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB0_41
; %bb.40:
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	s_load_b32 s1, s[8:9], 0x6a8
	s_load_b32 s2, s[8:9], 0xd5c
	s_waitcnt lgkmcnt(0)
	s_add_i32 s1, s2, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s2, s1, 31
	s_add_i32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s1, s1, 1
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s1
	global_store_b32 v0, v1, s[14:15] offset:1708
	s_clause 0x1
	global_load_b32 v1, v0, s[10:11] offset:1704
	global_load_b32 v2, v0, s[10:11] offset:3420
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 31, v1
	v_add_nc_u32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 1, v1
	global_store_b32 v0, v1, s[16:17] offset:1708
	s_clause 0x1
	global_load_b32 v1, v0, s[12:13] offset:1704
	global_load_b32 v2, v0, s[12:13] offset:3420
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 31, v1
	v_add_nc_u32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 1, v1
	global_store_b32 v0, v1, s[18:19] offset:1708
.LBB0_41:                               ; %Flow398
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_42:                               ; %Flow399
	s_and_not1_saveexec_b32 s0, s3
	s_cbranch_execz .LBB0_44
; %bb.43:
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	s_load_b32 s0, s[8:9], 0x4
	s_load_b32 s1, s[8:9], 0x6b0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s1, s0, 31
	s_add_i32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s0, s0, 1
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
	global_store_b32 v0, v1, s[14:15]
	s_clause 0x1
	global_load_b32 v1, v0, s[10:11] offset:4
	global_load_b32 v2, v0, s[10:11] offset:1712
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 31, v1
	v_add_nc_u32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 1, v1
	global_store_b32 v0, v1, s[16:17]
	s_clause 0x1
	global_load_b32 v1, v0, s[12:13] offset:4
	global_load_b32 v2, v0, s[12:13] offset:1712
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 31, v1
	v_add_nc_u32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 1, v1
	global_store_b32 v0, v1, s[18:19]
.LBB0_44:                               ; %Flow416
	s_or_b32 exec_lo, exec_lo, s6
                                        ; implicit-def: $vgpr0_vgpr1
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_45:                               ; %Flow417
	s_and_not1_saveexec_b32 s0, s5
	s_cbranch_execz .LBB0_47
; %bb.46:
	v_mad_u64_u32 v[3:4], null, 0x1ac, v2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v0, 0x1ac, v3
	v_add_nc_u32_e32 v5, 0xfffffe54, v3
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_lshlrev_b64 v[4:5], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	v_add_co_u32 v10, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v11, vcc_lo, s9, v3, vcc_lo
	s_clause 0x3
	global_load_b32 v6, v[6:7], off
	global_load_b32 v7, v[8:9], off
	global_load_b32 v8, v[10:11], off offset:4
	global_load_b32 v9, v[10:11], off offset:-4
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v6, v7, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add3_u32 v10, v6, v8, v9
	v_add_co_u32 v6, vcc_lo, s14, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s15, v3, vcc_lo
	v_ashrrev_i32_e32 v8, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v11, 30, v8
	v_add_co_u32 v8, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v1, vcc_lo
	v_add_nc_u32_e32 v12, v10, v11
	v_add_co_u32 v10, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_ashrrev_i32_e32 v14, 2, v12
	v_add_co_u32 v12, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v3, vcc_lo
	global_store_b32 v[6:7], v14, off
	s_clause 0x3
	global_load_b32 v6, v[8:9], off
	global_load_b32 v7, v[10:11], off
	global_load_b32 v8, v[12:13], off offset:4
	global_load_b32 v9, v[12:13], off offset:-4
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v6, v7, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add3_u32 v8, v6, v8, v9
	v_add_co_u32 v6, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s17, v3, vcc_lo
	v_ashrrev_i32_e32 v9, 31, v8
	v_add_co_u32 v0, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v9, 30, v9
	v_add_co_u32 v4, vcc_lo, s12, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
	v_add_nc_u32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 2, v8
	v_add_co_u32 v8, vcc_lo, s12, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v3, vcc_lo
	global_store_b32 v[6:7], v10, off
	s_clause 0x3
	global_load_b32 v0, v[0:1], off
	global_load_b32 v1, v[4:5], off
	global_load_b32 v4, v[8:9], off offset:4
	global_load_b32 v5, v[8:9], off offset:-4
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v0, v1, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, v0, v4, v5
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v1, 30, v1
	v_add_nc_u32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 2, v0
	v_add_co_u32 v0, vcc_lo, s18, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v3, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB0_47:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4blurPiS_S_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4blurPiS_S_S_S_S_, .Lfunc_end0-_Z4blurPiS_S_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3836
; NumSgprs: 24
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4blurPiS_S_S_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z4blurPiS_S_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
