#include <cuda.h>
#include <assert.h>
#include <stdio.h>

// work-group size * 2
#define N 512


  template<typename dataType>
__global__ void prescan(dataType *g_odata, dataType *g_idata, int n)
{
  __shared__ dataType temp[N];
  int thid = threadIdx.x; 
  int offset = 1;
  temp[2*thid]   = g_idata[2*thid];
  temp[2*thid+1] = g_idata[2*thid+1];
  for (int d = n >> 1; d > 0; d >>= 1) 
  {
    __syncthreads();
    if (thid < d) 
    {
      int ai = offset*(2*thid+1)-1;
      int bi = offset*(2*thid+2)-1;
      temp[bi] += temp[ai];
    }
    offset *= 2;
  }

  if (thid == 0) temp[n-1] = 0; // clear the last elem
  for (int d = 1; d < n; d *= 2) // traverse down
  {
    offset >>= 1;     
    __syncthreads();      
    if (thid < d)
    {
      int ai = offset*(2*thid+1)-1;
      int bi = offset*(2*thid+2)-1;
      float t = temp[ai];
      temp[ai] = temp[bi];
      temp[bi] += t;
    }
  }
  g_odata[2*thid] = temp[2*thid];
  g_odata[2*thid+1] = temp[2*thid+1];
}

template <typename dataType>
void runTest (dataType *in, dataType *out, int n) 
{
  dataType *d_in;
  dataType *d_out;
  cudaMalloc((void**)&d_in, N*sizeof(dataType));
  cudaMalloc((void**)&d_out, N*sizeof(dataType));
  cudaMemcpy(d_in, in, N*sizeof(dataType), cudaMemcpyHostToDevice);
  for (int i = 0; i < 100; i++)
    prescan<<<1, N/2>>>(d_out, d_in, n);
  cudaMemcpy(out, d_out, N*sizeof(dataType), cudaMemcpyDeviceToHost);
}

int main() 
{
  float in[N];
  float gpu_out[N];

  for (int i = 0; i < N; i++) in[i] = (i % 5)+1;

  runTest(in, gpu_out, N);

  return 0;
}

	.file	"tmpxft_002fd0fb_00000000-6_scan.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL35__device_stub__Z7prescanIfEvPT_S1_iPfS_i, @function
_ZL35__device_stub__Z7prescanIfEvPT_S1_iPfS_i:
.LFB2055:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7prescanIfEvPT_S1_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_ZL35__device_stub__Z7prescanIfEvPT_S1_iPfS_i, .-_ZL35__device_stub__Z7prescanIfEvPT_S1_iPfS_i
	.section	.text._Z7prescanIfEvPT_S1_i,"axG",@progbits,_Z7prescanIfEvPT_S1_i,comdat
	.weak	_Z7prescanIfEvPT_S1_i
	.type	_Z7prescanIfEvPT_S1_i, @function
_Z7prescanIfEvPT_S1_i:
.LFB2105:
	.cfi_startproc
	endbr64
	jmp	_ZL35__device_stub__Z7prescanIfEvPT_S1_iPfS_i
	.cfi_endproc
.LFE2105:
	.size	_Z7prescanIfEvPT_S1_i, .-_Z7prescanIfEvPT_S1_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z7prescanIfEvPT_S1_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7prescanIfEvPT_S1_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._Z7runTestIfEvPT_S1_i,"axG",@progbits,_Z7runTestIfEvPT_S1_i,comdat
	.weak	_Z7runTestIfEvPT_S1_i
	.type	_Z7runTestIfEvPT_S1_i, @function
_Z7runTestIfEvPT_S1_i:
.LFB2104:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movabsq	$4294967552, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rsi, %rbx
	movl	$2048, %esi
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$2048, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$2048, %edx
	movl	$100, %ebp
	call	cudaMemcpy@PLT
.L12:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	%r12d, %edx
	call	_ZL35__device_stub__Z7prescanIfEvPT_S1_iPfS_i
.L11:
	decl	%ebp
	jne	.L12
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$2048, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2104:
	.size	_Z7runTestIfEvPT_S1_i, .-_Z7runTestIfEvPT_S1_i
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	subq	$4096, %rsp
	.cfi_def_cfa_offset 4104
	orq	$0, (%rsp)
	subq	$24, %rsp
	.cfi_def_cfa_offset 4128
	xorl	%ecx, %ecx
	movl	$5, %esi
	movq	%fs:40, %rax
	movq	%rax, 4104(%rsp)
	xorl	%eax, %eax
.L17:
	movl	%ecx, %eax
	leaq	8(%rsp), %rdi
	cltd
	idivl	%esi
	incl	%edx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	$512, %rcx
	jne	.L17
	leaq	2056(%rsp), %rsi
	movl	$512, %edx
	call	_Z7runTestIfEvPT_S1_i
	movq	4104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	xorl	%eax, %eax
	addq	$4120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <assert.h>
#include <stdio.h>

// work-group size * 2
#define N 512


  template<typename dataType>
__global__ void prescan(dataType *g_odata, dataType *g_idata, int n)
{
  __shared__ dataType temp[N];
  int thid = threadIdx.x; 
  int offset = 1;
  temp[2*thid]   = g_idata[2*thid];
  temp[2*thid+1] = g_idata[2*thid+1];
  for (int d = n >> 1; d > 0; d >>= 1) 
  {
    __syncthreads();
    if (thid < d) 
    {
      int ai = offset*(2*thid+1)-1;
      int bi = offset*(2*thid+2)-1;
      temp[bi] += temp[ai];
    }
    offset *= 2;
  }

  if (thid == 0) temp[n-1] = 0; // clear the last elem
  for (int d = 1; d < n; d *= 2) // traverse down
  {
    offset >>= 1;     
    __syncthreads();      
    if (thid < d)
    {
      int ai = offset*(2*thid+1)-1;
      int bi = offset*(2*thid+2)-1;
      float t = temp[ai];
      temp[ai] = temp[bi];
      temp[bi] += t;
    }
  }
  g_odata[2*thid] = temp[2*thid];
  g_odata[2*thid+1] = temp[2*thid+1];
}

template <typename dataType>
void runTest (dataType *in, dataType *out, int n) 
{
  dataType *d_in;
  dataType *d_out;
  hipMalloc((void**)&d_in, N*sizeof(dataType));
  hipMalloc((void**)&d_out, N*sizeof(dataType));
  hipMemcpy(d_in, in, N*sizeof(dataType), hipMemcpyHostToDevice);
  for (int i = 0; i < 100; i++)
    prescan<<<1, N/2>>>(d_out, d_in, n);
  hipMemcpy(out, d_out, N*sizeof(dataType), hipMemcpyDeviceToHost);
}

int main() 
{
  float in[N];
  float gpu_out[N];

  for (int i = 0; i < N; i++) in[i] = (i % 5)+1;

  runTest(in, gpu_out, N);

  return 0;
}

	.text
	.file	"scan.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	subq	$4104, %rsp                     # imm = 0x1008
	.cfi_def_cfa_offset 4112
	movw	$1, %ax
	xorl	%ecx, %ecx
	movl	$65535, %edx                    # imm = 0xFFFF
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movl	%ecx, %esi
	andl	%edx, %esi
	imull	$52429, %esi, %esi              # imm = 0xCCCD
	shrl	$18, %esi
	leal	(%rsi,%rsi,4), %esi
	movl	%eax, %edi
	subl	%esi, %edi
	andl	%edx, %edi
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edi, %xmm0
	movss	%xmm0, (%rsp,%rcx,4)
	incq	%rcx
	incl	%eax
	cmpq	$512, %rcx                      # imm = 0x200
	jne	.LBB0_1
# %bb.2:
	movq	%rsp, %rdi
	leaq	2048(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	callq	_Z7runTestIfEvPT_S1_i
	xorl	%eax, %eax
	addq	$4104, %rsp                     # imm = 0x1008
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.section	.text._Z7runTestIfEvPT_S1_i,"axG",@progbits,_Z7runTestIfEvPT_S1_i,comdat
	.weak	_Z7runTestIfEvPT_S1_i           # -- Begin function _Z7runTestIfEvPT_S1_i
	.type	_Z7runTestIfEvPT_S1_i,@function
_Z7runTestIfEvPT_S1_i:                  # @_Z7runTestIfEvPT_S1_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rsi, %rbx
	movq	%rdi, %r15
	movabsq	$4294967297, %r14               # imm = 0x100000001
	leaq	8(%rsp), %r12
	movl	$2048, %esi                     # imm = 0x800
	movq	%r12, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$2048, %esi                     # imm = 0x800
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$2048, %edx                     # imm = 0x800
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$100, %r12d
	leaq	255(%r14), %r15
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.2:                                #   in Loop: Header=BB1_1 Depth=1
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	%ebp, %edx
	callq	_Z22__device_stub__prescanIfEvPT_S1_i
.LBB1_3:                                #   in Loop: Header=BB1_1 Depth=1
	decl	%r12d
	jne	.LBB1_1
# %bb.4:
	movq	(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z7runTestIfEvPT_S1_i, .Lfunc_end1-_Z7runTestIfEvPT_S1_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22__device_stub__prescanIfEvPT_S1_i,"axG",@progbits,_Z22__device_stub__prescanIfEvPT_S1_i,comdat
	.weak	_Z22__device_stub__prescanIfEvPT_S1_i # -- Begin function _Z22__device_stub__prescanIfEvPT_S1_i
	.type	_Z22__device_stub__prescanIfEvPT_S1_i,@function
_Z22__device_stub__prescanIfEvPT_S1_i:  # @_Z22__device_stub__prescanIfEvPT_S1_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7prescanIfEvPT_S1_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z22__device_stub__prescanIfEvPT_S1_i, .Lfunc_end2-_Z22__device_stub__prescanIfEvPT_S1_i
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7prescanIfEvPT_S1_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7prescanIfEvPT_S1_i,@object   # @_Z7prescanIfEvPT_S1_i
	.section	.rodata._Z7prescanIfEvPT_S1_i,"aG",@progbits,_Z7prescanIfEvPT_S1_i,comdat
	.weak	_Z7prescanIfEvPT_S1_i
	.p2align	3, 0x0
_Z7prescanIfEvPT_S1_i:
	.quad	_Z22__device_stub__prescanIfEvPT_S1_i
	.size	_Z7prescanIfEvPT_S1_i, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z7prescanIfEvPT_S1_i"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__prescanIfEvPT_S1_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7prescanIfEvPT_S1_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z7prescanIfEvPT_S1_i,"axG",@progbits,_Z7prescanIfEvPT_S1_i,comdat
	.protected	_Z7prescanIfEvPT_S1_i   ; -- Begin function _Z7prescanIfEvPT_S1_i
	.globl	_Z7prescanIfEvPT_S1_i
	.p2align	8
	.type	_Z7prescanIfEvPT_S1_i,@function
_Z7prescanIfEvPT_S1_i:                  ; @_Z7prescanIfEvPT_S1_i
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v1, 3, v0
	s_load_b32 s0, s[0:1], 0x10
	v_lshlrev_b32_e32 v2, 1, v0
	s_mov_b32 s1, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_or_b32_e32 v3, 1, v2
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[4:5], v1, s[6:7]
	s_ashr_i32 s2, s0, 1
	s_cmp_lt_i32 s2, 1
	s_waitcnt vmcnt(0)
	ds_store_b64 v1, v[4:5]
	s_cbranch_scc1 .LBB0_5
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e64 s2, v0
	s_cbranch_execz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	v_mul_lo_u32 v4, s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v4, v4, 2, -4
	v_lshl_add_u32 v5, s1, 2, v4
	ds_load_b32 v4, v4
	ds_load_b32 v6, v5
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v4, v4, v6
	ds_store_b32 v5, v4
.LBB0_3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_lshl_b32 s1, s1, 1
	s_lshr_b32 s3, s2, 1
	s_cmp_lt_u32 s2, 2
	s_cbranch_scc1 .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_1 Depth=1
	s_mov_b32 s2, s3
	s_branch .LBB0_1
.LBB0_5:                                ; %Flow60
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_7
; %bb.6:
	s_lshl_b32 s3, s0, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, -4
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, s3
	ds_store_b32 v5, v4
.LBB0_7:
	s_or_b32 exec_lo, exec_lo, s2
	s_cmp_lt_i32 s0, 2
	s_cbranch_scc1 .LBB0_12
; %bb.8:                                ; %.lr.ph49
	s_mov_b32 s2, 1
.LBB0_9:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s1, s1, 1
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=1
	v_mul_lo_u32 v4, s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v4, v4, 2, -4
	v_lshl_add_u32 v5, s1, 2, v4
	ds_load_b32 v6, v4
	ds_load_b32 v7, v5
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v6, v7
	ds_store_b32 v4, v7
	ds_store_b32 v5, v6
.LBB0_11:                               ;   in Loop: Header=BB0_9 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_lshl_b32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s2, s0
	s_cbranch_scc0 .LBB0_9
.LBB0_12:                               ; %._crit_edge50
	ds_load_b64 v[0:1], v1
	v_lshlrev_b32_e32 v2, 2, v2
	s_waitcnt lgkmcnt(0)
	global_store_b64 v2, v[0:1], s[4:5]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7prescanIfEvPT_S1_i
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z7prescanIfEvPT_S1_i,"axG",@progbits,_Z7prescanIfEvPT_S1_i,comdat
.Lfunc_end0:
	.size	_Z7prescanIfEvPT_S1_i, .Lfunc_end0-_Z7prescanIfEvPT_S1_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 408
; NumSgprs: 8
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7prescanIfEvPT_S1_i
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z7prescanIfEvPT_S1_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
