#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <math.h>
#include <assert.h>

#include <cuda.h>

__global__ void TournamentKernel ( float* pVector, int stride )
{ 
  unsigned index = 2 * ( blockIdx.x * blockDim.x + threadIdx.x)  * stride ; 

  unsigned offset = threadIdx.x * stride;
  
  float tmpfloat;

  for ( unsigned i=1; i<=blockDim.x; i*=2 )
  {
    if  ( offset % (stride*i) == 0 ) 
    {
      if ( pVector[index] < pVector[index+stride*i] )
      {
        tmpfloat = pVector[index];
        pVector[index] = pVector[index+stride*i];
        pVector[index+stride*i] = tmpfloat;
      }
    }
     __syncthreads();
  }
} 


/*
 *
 *    N is the number of elements in the tournament.
 *       we are going to choose as flat a tournament as possible,
 *       which means grouping 512 elements at each lowest level.
 *       and start by limiting ourselves to two levels.
 *
 *    This subroutine only runs for power of 2 elements per block
 *       and the number of elements must either be 4 blkSize^2 or 
 *       8 blkSize^3.
 * 
 */
bool Tournament ( unsigned N, unsigned blkSize, float* pHostVector ) 
{ 
  unsigned stride = 1;
  unsigned BlockCount= N / 2 / blkSize;     
  unsigned VectorSize= N * sizeof(float); 

  float* pDeviceVector= 0; 

  assert (( N == 8 * blkSize * blkSize * blkSize ) || ( N == 4 * blkSize * blkSize ));
  assert ( (N & ( N-1))  == 0 );

  cudaMalloc((void**)&pDeviceVector, VectorSize); 
  cudaMemcpy(pDeviceVector, pHostVector, VectorSize, cudaMemcpyHostToDevice); 

//  OK let's start with a one-level invocation of a tournament
  while ( BlockCount > 0 )
  {
    printf ( "BlockCount %d, BlockSize %d, Stride %d\n", BlockCount, blkSize, stride );
    TournamentKernel <<<BlockCount,blkSize>>> ( pDeviceVector, stride ); 

    stride *= blkSize * 2;
    BlockCount /= blkSize *2;
  }

  cudaMemcpy(pHostVector, pDeviceVector, VectorSize, cudaMemcpyDeviceToHost); 

  return true;
}

int main ()
{
  int i;
  const int numels = 8 * 64;
  const int blocksize = 4;

  float hostvector[numels];

  // Initialize the input vectors 
  for ( i=0; i<numels; i++ )
  {
    hostvector[i] = i;
  }

  // Call the kernel
  Tournament ( numels, blocksize, hostvector ); 

  // Check the answer
  for ( i=0; i< numels; i++ )
  {
    printf ("Index/Value: %d/%4.4f\n", i, hostvector[i]);
  }
}


	.file	"tmpxft_003661b2_00000000-6_tournament.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z37__device_stub__Z16TournamentKernelPfiPfi
	.type	_Z37__device_stub__Z16TournamentKernelPfiPfi, @function
_Z37__device_stub__Z16TournamentKernelPfiPfi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z16TournamentKernelPfi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z37__device_stub__Z16TournamentKernelPfiPfi, .-_Z37__device_stub__Z16TournamentKernelPfiPfi
	.globl	_Z16TournamentKernelPfi
	.type	_Z16TournamentKernelPfi, @function
_Z16TournamentKernelPfi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z16TournamentKernelPfiPfi
	.cfi_endproc
.LFE2054:
	.size	_Z16TournamentKernelPfi, .-_Z16TournamentKernelPfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"BlockCount %d, BlockSize %d, Stride %d\n"
	.text
	.globl	_Z10TournamentjjPf
	.type	_Z10TournamentjjPf, @function
_Z10TournamentjjPf:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leal	0(,%rdi,4), %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	$1, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leal	(%rbp,%rbp), %r14d
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdx, 8(%rsp)
	xorl	%edx, %edx
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	movl	%edi, %eax
	leaq	24(%rsp), %rdi
	shrl	%eax
	divl	%esi
	movq	%r13, %rsi
	movl	%eax, %ebx
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	movq	%r13, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
.L9:
	testl	%ebx, %ebx
	je	.L14
	movl	%r12d, %r8d
	movl	%ebp, %ecx
	movl	%ebx, %edx
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebp, 44(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%ebx, 32(%rsp)
	movq	%rax, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	%rax, 36(%rsp)
	movq	44(%rsp), %rdx
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	24(%rsp), %rdi
	movl	%r12d, %esi
	call	_Z37__device_stub__Z16TournamentKernelPfiPfi
.L10:
	movl	%ebx, %eax
	imull	%r14d, %r12d
	xorl	%edx, %edx
	divl	%r14d
	movl	%eax, %ebx
	jmp	.L9
.L14:
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movq	%r13, %rdx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movb	$1, %al
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10TournamentjjPf, .-_Z10TournamentjjPf
	.section	.rodata.str1.1
.LC1:
	.string	"Index/Value: %d/%4.4f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$2064, %rsp
	.cfi_def_cfa_offset 2096
	movq	%fs:40, %rax
	movq	%rax, 2056(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rbp
.L16:
	cvtsi2ssl	%eax, %xmm0
	movss	%xmm0, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$512, %rax
	jne	.L16
	movq	%rbp, %rdx
	movl	$4, %esi
	movl	$512, %edi
	xorl	%ebx, %ebx
	call	_Z10TournamentjjPf
	leaq	.LC1(%rip), %r12
.L17:
	movl	%ebx, %edx
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	movq	%r12, %rsi
	movb	$1, %al
	movl	$2, %edi
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$512, %rbx
	jne	.L17
	movq	2056(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$2064, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z16TournamentKernelPfi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16TournamentKernelPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <math.h>
#include <assert.h>

#include <hip/hip_runtime.h>

__global__ void TournamentKernel ( float* pVector, int stride )
{ 
  unsigned index = 2 * ( blockIdx.x * blockDim.x + threadIdx.x)  * stride ; 

  unsigned offset = threadIdx.x * stride;
  
  float tmpfloat;

  for ( unsigned i=1; i<=blockDim.x; i*=2 )
  {
    if  ( offset % (stride*i) == 0 ) 
    {
      if ( pVector[index] < pVector[index+stride*i] )
      {
        tmpfloat = pVector[index];
        pVector[index] = pVector[index+stride*i];
        pVector[index+stride*i] = tmpfloat;
      }
    }
     __syncthreads();
  }
} 


/*
 *
 *    N is the number of elements in the tournament.
 *       we are going to choose as flat a tournament as possible,
 *       which means grouping 512 elements at each lowest level.
 *       and start by limiting ourselves to two levels.
 *
 *    This subroutine only runs for power of 2 elements per block
 *       and the number of elements must either be 4 blkSize^2 or 
 *       8 blkSize^3.
 * 
 */
bool Tournament ( unsigned N, unsigned blkSize, float* pHostVector ) 
{ 
  unsigned stride = 1;
  unsigned BlockCount= N / 2 / blkSize;     
  unsigned VectorSize= N * sizeof(float); 

  float* pDeviceVector= 0; 

  assert (( N == 8 * blkSize * blkSize * blkSize ) || ( N == 4 * blkSize * blkSize ));
  assert ( (N & ( N-1))  == 0 );

  hipMalloc((void**)&pDeviceVector, VectorSize); 
  hipMemcpy(pDeviceVector, pHostVector, VectorSize, hipMemcpyHostToDevice); 

//  OK let's start with a one-level invocation of a tournament
  while ( BlockCount > 0 )
  {
    printf ( "BlockCount %d, BlockSize %d, Stride %d\n", BlockCount, blkSize, stride );
    TournamentKernel <<<BlockCount,blkSize>>> ( pDeviceVector, stride ); 

    stride *= blkSize * 2;
    BlockCount /= blkSize *2;
  }

  hipMemcpy(pHostVector, pDeviceVector, VectorSize, hipMemcpyDeviceToHost); 

  return true;
}

int main ()
{
  int i;
  const int numels = 8 * 64;
  const int blocksize = 4;

  float hostvector[numels];

  // Initialize the input vectors 
  for ( i=0; i<numels; i++ )
  {
    hostvector[i] = i;
  }

  // Call the kernel
  Tournament ( numels, blocksize, hostvector ); 

  // Check the answer
  for ( i=0; i< numels; i++ )
  {
    printf ("Index/Value: %d/%4.4f\n", i, hostvector[i]);
  }
}


	.text
	.file	"tournament.hip"
	.globl	_Z31__device_stub__TournamentKernelPfi # -- Begin function _Z31__device_stub__TournamentKernelPfi
	.type	_Z31__device_stub__TournamentKernelPfi,@function
_Z31__device_stub__TournamentKernelPfi: # @_Z31__device_stub__TournamentKernelPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16TournamentKernelPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__TournamentKernelPfi, .Lfunc_end0-_Z31__device_stub__TournamentKernelPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10TournamentjjPf              # -- Begin function _Z10TournamentjjPf
	.type	_Z10TournamentjjPf,@function
_Z10TournamentjjPf:                     # @_Z10TournamentjjPf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %r14
	movl	%esi, %r15d
	movl	%edi, %ebx
	movl	%edi, %r12d
	shrl	%r12d
	shll	$2, %ebx
	movq	%rsp, %r13
	movq	$0, (%r13)
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$1, %ebp
	movq	%r14, 8(%rsp)                   # 8-byte Spill
	movq	%r14, %rsi
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	cmpl	%r15d, %r12d
	jb	.LBB1_5
# %bb.1:                                # %.lr.ph
	movabsq	$4294967296, %r14               # imm = 0x100000000
	movl	%r12d, %eax
	xorl	%edx, %edx
	divl	%r15d
	movl	%eax, %r13d
	movl	%r15d, %r12d
	btsq	$32, %r12
	leal	(%r15,%r15), %ebx
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	movl	$.L.str, %edi
	movl	%r13d, %esi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	xorl	%eax, %eax
	callq	printf
	movl	%r13d, %edi
	orq	%r14, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:                                #   in Loop: Header=BB1_2 Depth=1
	movq	(%rsp), %rdi
	movl	%ebp, %esi
	callq	_Z31__device_stub__TournamentKernelPfi
.LBB1_4:                                #   in Loop: Header=BB1_2 Depth=1
	imull	%ebx, %ebp
	movl	%r13d, %eax
	xorl	%edx, %edx
	divl	%ebx
	cmpl	%r13d, %ebx
	movl	%eax, %r13d
	jbe	.LBB1_2
.LBB1_5:                                # %._crit_edge
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movb	$1, %al
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z10TournamentjjPf, .Lfunc_end1-_Z10TournamentjjPf
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$2048, %rsp                     # imm = 0x800
	.cfi_def_cfa_offset 2064
	.cfi_offset %rbx, -16
	xorl	%eax, %eax
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rsp,%rax,4)
	incq	%rax
	cmpq	$512, %rax                      # imm = 0x200
	jne	.LBB2_1
# %bb.2:
	movq	%rsp, %rdx
	movl	$512, %edi                      # imm = 0x200
	movl	$4, %esi
	callq	_Z10TournamentjjPf
	xorl	%ebx, %ebx
.LBB2_3:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp,%rbx,4), %xmm0
	movl	$.L.str.1, %edi
	movl	%ebx, %esi
	movb	$1, %al
	callq	printf
	incq	%rbx
	cmpq	$512, %rbx                      # imm = 0x200
	jne	.LBB2_3
# %bb.4:
	xorl	%eax, %eax
	addq	$2048, %rsp                     # imm = 0x800
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16TournamentKernelPfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16TournamentKernelPfi,@object # @_Z16TournamentKernelPfi
	.section	.rodata,"a",@progbits
	.globl	_Z16TournamentKernelPfi
	.p2align	3, 0x0
_Z16TournamentKernelPfi:
	.quad	_Z31__device_stub__TournamentKernelPfi
	.size	_Z16TournamentKernelPfi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"BlockCount %d, BlockSize %d, Stride %d\n"
	.size	.L.str, 40

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Index/Value: %d/%4.4f\n"
	.size	.L.str.1, 23

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16TournamentKernelPfi"
	.size	.L__unnamed_1, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__TournamentKernelPfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16TournamentKernelPfi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16TournamentKernelPfi ; -- Begin function _Z16TournamentKernelPfi
	.globl	_Z16TournamentKernelPfi
	.p2align	8
	.type	_Z16TournamentKernelPfi,@function
_Z16TournamentKernelPfi:                ; @_Z16TournamentKernelPfi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc1 .LBB0_6
; %bb.1:                                ; %.lr.ph
	s_load_b32 s3, s[0:1], 0x8
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x0
	s_mov_b32 s4, 1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v1, s3
	v_mov_b32_e32 v1, 0
	v_mul_lo_u32 v7, v0, s3
	v_dual_mov_b32 v3, v1 :: v_dual_lshlrev_b32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_mul_i32 s5, s4, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, s5
	s_sub_i32 s6, 0, s5
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v5, s6, v0
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v0, v5
	v_add_nc_u32_e32 v0, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v0, v7, v0
	v_mul_lo_u32 v0, v0, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v7, v0
	v_subrev_nc_u32_e32 v5, s5, v0
	v_cmp_le_u32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v5, vcc_lo
	v_subrev_nc_u32_e32 v5, s5, v0
	v_cmp_le_u32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v5, vcc_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_5
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v0, s5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_add_co_u32 v5, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[3:4], off
	global_load_b32 v8, v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, v0, v8
	s_and_b32 exec_lo, exec_lo, vcc_lo
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x1
	global_store_b32 v[3:4], v8, off
	global_store_b32 v[5:6], v0, off
.LBB0_5:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_lshl_b32 s4, s4, 1
	s_waitcnt_vscnt null, 0x0
	s_cmp_gt_u32 s4, s2
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_6:                                ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16TournamentKernelPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16TournamentKernelPfi, .Lfunc_end0-_Z16TournamentKernelPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 380
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16TournamentKernelPfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16TournamentKernelPfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
