#include<stdio.h>
#include<stdlib.h>

// This value is the largest subsets we must unrank.
#define LARGEST_SUBSET 5

// This is value is the largest number a graph could have.
// It is 2^(LARGEST_SUBSET*LARGEST_SUBSET)-1 (i.e. the LARGEST_SUBSET x LARGEST_SUBSET matrix of all 1's).
#define SMALLEST_GRAPH 33554431

// Device code to compute the binomial coefficient "n choose k."
__device__ int binom_d(int n, int k){
	if(k > n){
		return 0;
	}
	if(k == n){
		return 1;
	}
	int retVal = 1;
	for(int i=0; i<k; i++){
		retVal = retVal * (n-i) / (i+1);
	}
	return retVal;
}


__device__ void unrank_combination(int n, int k, int initial_value, int* Kset) {
	int cash_on_hand = initial_value;
	int digit;
	int cost_to_increment;
	Kset[0] = 0;	//Initialize the first element.
					//Each of the following elements will start off one bigger than the previous element.
	//Use the cash_on_hand value to "pay" for incrementing each digit.
	//Pay 1-unit for each combination that is "skipped" over.
	//E.g. To increment the 0 in 0, 1, 2, ..., k-1 to a 1 (and force the others to increment to 2, 3, ..., k)
	//it would cost binom(n-1, k-1) since we skipped over each combination of the form
	// 0 * * * ... * and there are binom(n-1, k-1) of those combinations
	for(digit=0; digit<k-1; digit++){
		//There are n-1-Kset[digit] elements left to choose from.
		//Those elements must be used to fill k-1-digit places.
		cost_to_increment = binom_d( n-1-Kset[digit], k-1-digit );
		while(cost_to_increment <= cash_on_hand){
			Kset[digit]++;
			cash_on_hand = cash_on_hand - cost_to_increment;
			cost_to_increment = binom_d( n-1-Kset[digit], k-1-digit );
		}
		Kset[digit+1] = Kset[digit]+1;	//Ititialize the next element of Kset making sure the elements
										//come in sorted order.
	}
	//Kset[k-1] has been initialized to Kset[k-2]+1 (last step).
	//Now, if there is anything left to pay, we simply increment Kset[k-1] by this amount.
	Kset[k-1] += cash_on_hand;
}

// The Myrvold/Rusky linear time algorithm for ranking/unranking permutations.
// See: http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.216.9916&rep=rep1&type=pdf  [4 pages]
__device__ void unrank_permutation(int k, int initial_value, int* Perm){
	int r = initial_value;
	int tmp;
	int n, index;
	for(n=k; n>0; n--){
		index = r % n;
		//swap Perm[index1] with Perm[index2]
		tmp = Perm[n-1];
		Perm[n-1] = Perm[index];
		Perm[index] = tmp;
		r = r / (index + 1);
	}
}


// IMPORTANT: we must make sure that the number of subsets (N choose K) is a value that fits in a integer type (probably 4 bytes).
// Otherwise, "my_subset" will overflow and not be able to write to its location in the array.
// We don't allow bigger than 4 byte values of "my_subset" because we don't want to assume that we have more than 4 GB of memory on the card.
__global__ void examine_subsets(int n, int k, long offset, long MAX, int KFAC, short* A, int* Results){
	const long my_subset = threadIdx.x + blockIdx.x*blockDim.x + offset;		
	if( my_subset < MAX ){
		int i, j;
		int Kset[LARGEST_SUBSET];
		for(i=0; i<k; i++){
			Kset[i] = 0;
		}
		unrank_combination(n, k, my_subset, Kset);	//unrank should modify Kset to be the selection of k vertices to examine.
		short local_A[LARGEST_SUBSET*LARGEST_SUBSET];
		//short local_B[LARGEST_SUBSET*LARGEST_SUBSET];
		for(i=0; i<k; i++){
			for(j=0; j<k; j++){
				local_A[i*k + j] = A[ Kset[i]*n + Kset[j] ];	//A is n by n (in 1D form) but local_A is k by k (in 1D form)
			}
		}

		//Apply permutations to the vertices of local_A to try to create the "smallest" representative graph.
		int permutation_number;
		int Perm[LARGEST_SUBSET];
		int smallest_graph = SMALLEST_GRAPH;	//Default "maximum" graph.
		int this_graph;
		for(permutation_number=0; permutation_number < KFAC; permutation_number++){
			//Apply the Myrvold/Rusky Linear time unranking algorithm to determine the permutation.
			for(i=0; i<k; i++){
				Perm[i] = i;	//Initialize the permutaiton
			}
			unrank_permutation(k, permutation_number, Perm);
			this_graph = 0;
			for(i=0; i<k; i++){
				for(j=0; j<k; j++){
					//Applying Perm to local_A sends vertex i to Perm[i], vertex j to Perm[j].
					//local_B[ i*k + j] = local_A[ Perm[i]*k + Perm[j] ];
					if( local_A[Perm[i]*k + Perm[j]] == 1 ){
						this_graph = this_graph | (1 << (i*k + j));
					}
				}
			}
			if(this_graph < smallest_graph){
				smallest_graph = this_graph;
			}
		}
		Results[my_subset-offset] = smallest_graph;
	}
}




int binom_h(int n, int k){
	int retVal = 1;
	for(int i=0; i<k; i++){
		retVal = retVal*(n-i) / (i+1);
	}
	return retVal;
}


int main(int argc, char** argv){
	int N = atoi( argv[1] );		//Number of vertices in the graph (not necessarily required from command-line)
	int K = atoi( argv[2] );		//Size of the subsets to examine (upper bounded by LARGEST_SUBSET)
	int threads_per_block = atoi( argv[3] );

	short* h_A;
	short* d_A;
	int* h_Results;
	int* d_Results;

	int number_of_subsets = binom_h(N, K);
	int size_of_subsets = number_of_subsets*sizeof(int);
	int size_of_A = N*N*sizeof(short);

	h_A = (short *) malloc( size_of_A );
	h_Results = (int *) malloc( size_of_subsets );


	cudaSetDevice(1);
	cudaMalloc((void **) &d_A, size_of_A);
	cudaMalloc((void **) &d_Results, size_of_subsets);

	int i;
	int KFAC = 1;
	for(i=2; i<=K; i++){
		KFAC *= i;
	}

	//h_A is the adjacecy matrix (on the host)... here is just a dummy matrix.
	//
	// IN THESE LINES WE NEED TO MAKE SURE THAT THE ADJACENCY MATRIX IS THE ONE WE WANT TO EXAMINE
	//
	for(i=0; i<N*N; i++){
		h_A[i] = 0;
	}
	h_A[ 0*N+1 ] = 1;	//h_A[0][1] = 1
	h_A[ 0*N+2 ] = 1;	//h_A[0][2] = 1
	
	//Initialize the results matrix.
	//In h_Results[i] will be the integer representing the graph found by looking at subset i.
	for(i=0; i<N; i++){
		h_Results[i]=-1;
	}

	//Copy adjacency matrix and results array to the device
	cudaMemcpy(d_A, h_A, size_of_A, cudaMemcpyHostToDevice);
	cudaMemcpy(d_Results, h_Results, size_of_subsets, cudaMemcpyHostToDevice);

	examine_subsets<<<(number_of_subsets+threads_per_block-1)/threads_per_block, threads_per_block>>>(N, K, 0, number_of_subsets, KFAC, d_A, d_Results);
	printf("CUDA error: %s\n", cudaGetErrorString(cudaGetLastError()));
	cudaMemcpy(h_Results, d_Results, size_of_subsets, cudaMemcpyDeviceToHost);
	
	cudaDeviceSynchronize();

	for(i=0; i<number_of_subsets; i++){
		if(h_Results[i] != 0){
			printf("%d\t%d\n", i, h_Results[i]);
		}
	}
	
	free(h_A);
	free(h_Results);
	cudaFree(d_A);
	cudaFree(d_Results);

	return 0;
}

	.file	"tmpxft_00287c38_00000000-6_subsets.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7binom_dii
	.type	_Z7binom_dii, @function
_Z7binom_dii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z7binom_dii, .-_Z7binom_dii
	.globl	_Z18unrank_combinationiiiPi
	.type	_Z18unrank_combinationiiiPi, @function
_Z18unrank_combinationiiiPi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z18unrank_combinationiiiPi, .-_Z18unrank_combinationiiiPi
	.globl	_Z18unrank_permutationiiPi
	.type	_Z18unrank_permutationiiPi, @function
_Z18unrank_permutationiiPi:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z18unrank_permutationiiPi, .-_Z18unrank_permutationiiPi
	.globl	_Z7binom_hii
	.type	_Z7binom_hii, @function
_Z7binom_hii:
.LFB2030:
	.cfi_startproc
	endbr64
	xorl	%ecx, %ecx
	movl	$1, %eax
.L9:
	cmpl	%esi, %ecx
	jge	.L12
	movl	%edi, %edx
	subl	%ecx, %edx
	incl	%ecx
	imull	%edx, %eax
	cltd
	idivl	%ecx
	jmp	.L9
.L12:
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z7binom_hii, .-_Z7binom_hii
	.globl	_Z42__device_stub__Z15examine_subsetsiilliPsPiiilliPsPi
	.type	_Z42__device_stub__Z15examine_subsetsiilliPsPiiilliPsPi, @function
_Z42__device_stub__Z15examine_subsetsiilliPsPiiilliPsPi:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movl	%edi, 44(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 20(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15examine_subsetsiilliPsPi(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L13:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z42__device_stub__Z15examine_subsetsiilliPsPiiilliPsPi, .-_Z42__device_stub__Z15examine_subsetsiilliPsPiiilliPsPi
	.globl	_Z15examine_subsetsiilliPsPi
	.type	_Z15examine_subsetsiilliPsPi, @function
_Z15examine_subsetsiilliPsPi:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z15examine_subsetsiilliPsPiiilliPsPi
	.cfi_endproc
.LFE2057:
	.size	_Z15examine_subsetsiilliPsPi, .-_Z15examine_subsetsiilliPsPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error: %s\n"
.LC1:
	.string	"%d\t%d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movq	24(%rbx), %rdi
	movl	%eax, %r15d
	call	atoi@PLT
	movl	%r15d, %esi
	movl	%ebp, %edi
	movl	%eax, %r14d
	call	_Z7binom_hii
	movl	%ebp, %edx
	imull	%ebp, %edx
	movl	%eax, %r13d
	leal	(%rdx,%rdx), %eax
	movl	%edx, 28(%rsp)
	cltq
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	%rax, %r12
	leal	0(,%r13,4), %eax
	cltq
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movl	$1, %edi
	movq	%rax, %rbx
	call	cudaSetDevice@PLT
	movq	16(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	28(%rsp), %edx
	movl	$1, %r10d
	movl	$2, %eax
.L19:
	cmpl	%r15d, %eax
	jg	.L34
	imull	%eax, %r10d
	incl	%eax
	jmp	.L19
.L34:
	xorl	%eax, %eax
.L21:
	cmpl	%eax, %edx
	jle	.L35
	movw	$0, (%r12,%rax,2)
	incq	%rax
	jmp	.L21
.L35:
	movl	$65537, 2(%r12)
	xorl	%eax, %eax
.L23:
	cmpl	%eax, %ebp
	jle	.L36
	movl	$-1, (%rbx,%rax,4)
	incq	%rax
	jmp	.L23
.L36:
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	%r10d, 28(%rsp)
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leal	-1(%r14,%r13), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rcx
	cltd
	movl	%r14d, 60(%rsp)
	idivl	%r14d
	movq	%rcx, 52(%rsp)
	movl	56(%rsp), %esi
	movq	%rcx, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	movl	%eax, 48(%rsp)
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	movl	28(%rsp), %r10d
	testl	%eax, %eax
	jne	.L25
	pushq	%rax
	.cfi_def_cfa_offset 152
	movslq	%r13d, %rcx
	xorl	%edx, %edx
	movl	%r10d, %r8d
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	48(%rsp), %r9
	movl	%r15d, %esi
	movl	%ebp, %edi
	call	_Z42__device_stub__Z15examine_subsetsiilliPsPiiilliPsPi
	popq	%rdx
	.cfi_def_cfa_offset 152
	popq	%rcx
	.cfi_def_cfa_offset 144
.L25:
	call	cudaGetLastError@PLT
	xorl	%ebp, %ebp
	leaq	.LC1(%rip), %r14
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
.L26:
	cmpl	%ebp, %r13d
	jle	.L37
	movl	(%rbx,%rbp,4), %ecx
	testl	%ecx, %ecx
	je	.L27
	movl	%ebp, %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L27:
	incq	%rbp
	jmp	.L26
.L37:
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z15examine_subsetsiilliPsPi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15examine_subsetsiilliPsPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdio.h>
#include<stdlib.h>

// This value is the largest subsets we must unrank.
#define LARGEST_SUBSET 5

// This is value is the largest number a graph could have.
// It is 2^(LARGEST_SUBSET*LARGEST_SUBSET)-1 (i.e. the LARGEST_SUBSET x LARGEST_SUBSET matrix of all 1's).
#define SMALLEST_GRAPH 33554431

// Device code to compute the binomial coefficient "n choose k."
__device__ int binom_d(int n, int k){
	if(k > n){
		return 0;
	}
	if(k == n){
		return 1;
	}
	int retVal = 1;
	for(int i=0; i<k; i++){
		retVal = retVal * (n-i) / (i+1);
	}
	return retVal;
}


__device__ void unrank_combination(int n, int k, int initial_value, int* Kset) {
	int cash_on_hand = initial_value;
	int digit;
	int cost_to_increment;
	Kset[0] = 0;	//Initialize the first element.
					//Each of the following elements will start off one bigger than the previous element.
	//Use the cash_on_hand value to "pay" for incrementing each digit.
	//Pay 1-unit for each combination that is "skipped" over.
	//E.g. To increment the 0 in 0, 1, 2, ..., k-1 to a 1 (and force the others to increment to 2, 3, ..., k)
	//it would cost binom(n-1, k-1) since we skipped over each combination of the form
	// 0 * * * ... * and there are binom(n-1, k-1) of those combinations
	for(digit=0; digit<k-1; digit++){
		//There are n-1-Kset[digit] elements left to choose from.
		//Those elements must be used to fill k-1-digit places.
		cost_to_increment = binom_d( n-1-Kset[digit], k-1-digit );
		while(cost_to_increment <= cash_on_hand){
			Kset[digit]++;
			cash_on_hand = cash_on_hand - cost_to_increment;
			cost_to_increment = binom_d( n-1-Kset[digit], k-1-digit );
		}
		Kset[digit+1] = Kset[digit]+1;	//Ititialize the next element of Kset making sure the elements
										//come in sorted order.
	}
	//Kset[k-1] has been initialized to Kset[k-2]+1 (last step).
	//Now, if there is anything left to pay, we simply increment Kset[k-1] by this amount.
	Kset[k-1] += cash_on_hand;
}

// The Myrvold/Rusky linear time algorithm for ranking/unranking permutations.
// See: http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.216.9916&rep=rep1&type=pdf  [4 pages]
__device__ void unrank_permutation(int k, int initial_value, int* Perm){
	int r = initial_value;
	int tmp;
	int n, index;
	for(n=k; n>0; n--){
		index = r % n;
		//swap Perm[index1] with Perm[index2]
		tmp = Perm[n-1];
		Perm[n-1] = Perm[index];
		Perm[index] = tmp;
		r = r / (index + 1);
	}
}


// IMPORTANT: we must make sure that the number of subsets (N choose K) is a value that fits in a integer type (probably 4 bytes).
// Otherwise, "my_subset" will overflow and not be able to write to its location in the array.
// We don't allow bigger than 4 byte values of "my_subset" because we don't want to assume that we have more than 4 GB of memory on the card.
__global__ void examine_subsets(int n, int k, long offset, long MAX, int KFAC, short* A, int* Results){
	const long my_subset = threadIdx.x + blockIdx.x*blockDim.x + offset;		
	if( my_subset < MAX ){
		int i, j;
		int Kset[LARGEST_SUBSET];
		for(i=0; i<k; i++){
			Kset[i] = 0;
		}
		unrank_combination(n, k, my_subset, Kset);	//unrank should modify Kset to be the selection of k vertices to examine.
		short local_A[LARGEST_SUBSET*LARGEST_SUBSET];
		//short local_B[LARGEST_SUBSET*LARGEST_SUBSET];
		for(i=0; i<k; i++){
			for(j=0; j<k; j++){
				local_A[i*k + j] = A[ Kset[i]*n + Kset[j] ];	//A is n by n (in 1D form) but local_A is k by k (in 1D form)
			}
		}

		//Apply permutations to the vertices of local_A to try to create the "smallest" representative graph.
		int permutation_number;
		int Perm[LARGEST_SUBSET];
		int smallest_graph = SMALLEST_GRAPH;	//Default "maximum" graph.
		int this_graph;
		for(permutation_number=0; permutation_number < KFAC; permutation_number++){
			//Apply the Myrvold/Rusky Linear time unranking algorithm to determine the permutation.
			for(i=0; i<k; i++){
				Perm[i] = i;	//Initialize the permutaiton
			}
			unrank_permutation(k, permutation_number, Perm);
			this_graph = 0;
			for(i=0; i<k; i++){
				for(j=0; j<k; j++){
					//Applying Perm to local_A sends vertex i to Perm[i], vertex j to Perm[j].
					//local_B[ i*k + j] = local_A[ Perm[i]*k + Perm[j] ];
					if( local_A[Perm[i]*k + Perm[j]] == 1 ){
						this_graph = this_graph | (1 << (i*k + j));
					}
				}
			}
			if(this_graph < smallest_graph){
				smallest_graph = this_graph;
			}
		}
		Results[my_subset-offset] = smallest_graph;
	}
}




int binom_h(int n, int k){
	int retVal = 1;
	for(int i=0; i<k; i++){
		retVal = retVal*(n-i) / (i+1);
	}
	return retVal;
}


int main(int argc, char** argv){
	int N = atoi( argv[1] );		//Number of vertices in the graph (not necessarily required from command-line)
	int K = atoi( argv[2] );		//Size of the subsets to examine (upper bounded by LARGEST_SUBSET)
	int threads_per_block = atoi( argv[3] );

	short* h_A;
	short* d_A;
	int* h_Results;
	int* d_Results;

	int number_of_subsets = binom_h(N, K);
	int size_of_subsets = number_of_subsets*sizeof(int);
	int size_of_A = N*N*sizeof(short);

	h_A = (short *) malloc( size_of_A );
	h_Results = (int *) malloc( size_of_subsets );


	hipSetDevice(1);
	hipMalloc((void **) &d_A, size_of_A);
	hipMalloc((void **) &d_Results, size_of_subsets);

	int i;
	int KFAC = 1;
	for(i=2; i<=K; i++){
		KFAC *= i;
	}

	//h_A is the adjacecy matrix (on the host)... here is just a dummy matrix.
	//
	// IN THESE LINES WE NEED TO MAKE SURE THAT THE ADJACENCY MATRIX IS THE ONE WE WANT TO EXAMINE
	//
	for(i=0; i<N*N; i++){
		h_A[i] = 0;
	}
	h_A[ 0*N+1 ] = 1;	//h_A[0][1] = 1
	h_A[ 0*N+2 ] = 1;	//h_A[0][2] = 1
	
	//Initialize the results matrix.
	//In h_Results[i] will be the integer representing the graph found by looking at subset i.
	for(i=0; i<N; i++){
		h_Results[i]=-1;
	}

	//Copy adjacency matrix and results array to the device
	hipMemcpy(d_A, h_A, size_of_A, hipMemcpyHostToDevice);
	hipMemcpy(d_Results, h_Results, size_of_subsets, hipMemcpyHostToDevice);

	examine_subsets<<<(number_of_subsets+threads_per_block-1)/threads_per_block, threads_per_block>>>(N, K, 0, number_of_subsets, KFAC, d_A, d_Results);
	printf("CUDA error: %s\n", hipGetErrorString(hipGetLastError()));
	hipMemcpy(h_Results, d_Results, size_of_subsets, hipMemcpyDeviceToHost);
	
	hipDeviceSynchronize();

	for(i=0; i<number_of_subsets; i++){
		if(h_Results[i] != 0){
			printf("%d\t%d\n", i, h_Results[i]);
		}
	}
	
	free(h_A);
	free(h_Results);
	hipFree(d_A);
	hipFree(d_Results);

	return 0;
}

	.text
	.file	"subsets.hip"
	.globl	_Z30__device_stub__examine_subsetsiilliPsPi # -- Begin function _Z30__device_stub__examine_subsetsiilliPsPi
	.type	_Z30__device_stub__examine_subsetsiilliPsPi,@function
_Z30__device_stub__examine_subsetsiilliPsPi: # @_Z30__device_stub__examine_subsetsiilliPsPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15examine_subsetsiilliPsPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__examine_subsetsiilliPsPi, .Lfunc_end0-_Z30__device_stub__examine_subsetsiilliPsPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z7binom_hii                    # -- Begin function _Z7binom_hii
	.type	_Z7binom_hii,@function
_Z7binom_hii:                           # @_Z7binom_hii
	.cfi_startproc
# %bb.0:
                                        # kill: def $esi killed $esi def $rsi
	testl	%esi, %esi
	jle	.LBB1_1
# %bb.3:                                # %.lr.ph.preheader
	negl	%esi
	movl	$1, %ecx
	movl	$1, %eax
.LBB1_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	imull	%edi, %eax
	cltd
	idivl	%ecx
	leal	(%rsi,%rcx), %edx
	incl	%edx
                                        # kill: def $ecx killed $ecx killed $rcx
	incl	%ecx
	decl	%edi
                                        # kill: def $ecx killed $ecx def $rcx
	cmpl	$1, %edx
	jne	.LBB1_4
# %bb.2:                                # %._crit_edge
	retq
.LBB1_1:
	movl	$1, %eax
	retq
.Lfunc_end1:
	.size	_Z7binom_hii, .Lfunc_end1-_Z7binom_hii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %r15d
	movq	24(%rbx), %rdi
	callq	atoi
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movl	$1, %r13d
	movl	$1, %r14d
	movl	%r15d, 8(%rsp)                  # 4-byte Spill
	testl	%r15d, %r15d
	jle	.LBB2_3
# %bb.1:                                # %.lr.ph.i.preheader
	movl	8(%rsp), %eax                   # 4-byte Reload
	movl	%eax, %ecx
	negl	%ecx
	movl	$1, %edi
	movl	%ebp, %esi
	movl	$1, %r14d
.LBB2_2:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	imull	%esi, %r14d
	movl	%r14d, %eax
	cltd
	idivl	%edi
	leal	(%rcx,%rdi), %edx
	incl	%edx
                                        # kill: def $edi killed $edi killed $rdi
	incl	%edi
	decl	%esi
                                        # kill: def $edi killed $edi def $rdi
	movl	%eax, %r14d
	cmpl	$1, %edx
	jne	.LBB2_2
.LBB2_3:                                # %_Z7binom_hii.exit
	leal	(,%r14,4), %ebx
	movl	%ebp, 12(%rsp)                  # 4-byte Spill
                                        # kill: def $ebp killed $ebp def $rbp
	imull	%ebp, %ebp
	leal	(,%rbp,2), %eax
	movslq	%eax, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movslq	%ebx, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r15
	movl	$1, %edi
	callq	hipSetDevice
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbx, 48(%rsp)                  # 8-byte Spill
	movq	%rbx, %rsi
	callq	hipMalloc
	cmpl	$2, 8(%rsp)                     # 4-byte Folded Reload
	jl	.LBB2_6
# %bb.4:                                # %.lr.ph.preheader
	movl	8(%rsp), %eax                   # 4-byte Reload
                                        # kill: def $eax killed $eax def $rax
	negl	%eax
	movl	$1, %r13d
	movl	$2, %ecx
.LBB2_5:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	imull	%ecx, %r13d
	leal	(%rax,%rcx), %edx
	incl	%edx
                                        # kill: def $ecx killed $ecx killed $rcx
	incl	%ecx
                                        # kill: def $ecx killed $ecx def $rcx
	cmpl	$1, %edx
	jne	.LBB2_5
.LBB2_6:                                # %.preheader
	movl	12(%rsp), %ebx                  # 4-byte Reload
	testl	%ebx, %ebx
	je	.LBB2_7
# %bb.8:                                # %._crit_edge
	cmpl	$1, %ebp
	adcl	$0, %ebp
	addl	%ebp, %ebp
	movq	32(%rsp), %rdi                  # 8-byte Reload
	xorl	%esi, %esi
	movq	%rbp, %rdx
	movq	%rdi, %rbp
	callq	memset@PLT
	movl	$65537, 2(%rbp)                 # imm = 0x10001
	testl	%ebx, %ebx
	jle	.LBB2_10
# %bb.9:                                # %.lr.ph73.preheader
	movl	12(%rsp), %edx                  # 4-byte Reload
	shlq	$2, %rdx
	movq	%r15, %rdi
	movl	$255, %esi
	callq	memset@PLT
	jmp	.LBB2_10
.LBB2_7:                                # %._crit_edge.thread
	movq	32(%rsp), %rbp                  # 8-byte Reload
	movl	$65537, 2(%rbp)                 # imm = 0x10001
.LBB2_10:                               # %._crit_edge74
	movq	24(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%r15, %rsi
	movq	48(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rcx                  # 8-byte Reload
	leal	(%rcx,%r14), %eax
	decl	%eax
	cltd
	idivl	%ecx
                                        # kill: def $eax killed $eax def $rax
	btsq	$32, %rax
	movl	%ecx, %edx
	btsq	$32, %rdx
	movq	%rax, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.11:
	movslq	%r14d, %rcx
	movq	24(%rsp), %r9
	movq	16(%rsp), %rax
	movq	%rax, (%rsp)
	movl	12(%rsp), %edi                  # 4-byte Reload
	movl	8(%rsp), %esi                   # 4-byte Reload
	xorl	%edx, %edx
	movl	%r13d, %r8d
	callq	_Z30__device_stub__examine_subsetsiilliPsPi
.LBB2_12:
	callq	hipGetLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rsi
	movq	%r15, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	testl	%r14d, %r14d
	jle	.LBB2_17
# %bb.13:                               # %.lr.ph77.preheader
	movl	%r14d, %r14d
	xorl	%ebx, %ebx
.LBB2_14:                               # %.lr.ph77
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r15,%rbx,4), %edx
	testl	%edx, %edx
	je	.LBB2_16
# %bb.15:                               #   in Loop: Header=BB2_14 Depth=1
	movl	$.L.str.1, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
.LBB2_16:                               #   in Loop: Header=BB2_14 Depth=1
	incq	%rbx
	cmpq	%rbx, %r14
	jne	.LBB2_14
.LBB2_17:                               # %._crit_edge78
	movq	%rbp, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15examine_subsetsiilliPsPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15examine_subsetsiilliPsPi,@object # @_Z15examine_subsetsiilliPsPi
	.section	.rodata,"a",@progbits
	.globl	_Z15examine_subsetsiilliPsPi
	.p2align	3, 0x0
_Z15examine_subsetsiilliPsPi:
	.quad	_Z30__device_stub__examine_subsetsiilliPsPi
	.size	_Z15examine_subsetsiilliPsPi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: %s\n"
	.size	.L.str, 16

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d\t%d\n"
	.size	.L.str.1, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15examine_subsetsiilliPsPi"
	.size	.L__unnamed_1, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__examine_subsetsiilliPsPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15examine_subsetsiilliPsPi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15examine_subsetsiilliPsPi ; -- Begin function _Z15examine_subsetsiilliPsPi
	.globl	_Z15examine_subsetsiilliPsPi
	.p2align	8
	.type	_Z15examine_subsetsiilliPsPi,@function
_Z15examine_subsetsiilliPsPi:           ; @_Z15examine_subsetsiilliPsPi
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[2:3], 0x3c
	s_load_b128 s[4:7], s[2:3], 0x8
	v_and_b32_e32 v10, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s8, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[6:7], null, s15, s8, v[10:11]
	v_mov_b32_e32 v7, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s4, v6, s4
	v_add_co_ci_u32_e64 v9, null, 0, s5, s4
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i64_e64 s[6:7], v[8:9]
	s_cbranch_execz .LBB0_43
; %bb.1:                                ; %.preheader76
	s_load_b64 s[12:13], s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s13, 0
	s_cselect_b32 s14, -1, 0
	s_cmp_lt_i32 s13, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_mov_b64 s[10:11], 0
                                        ; implicit-def: $sgpr4
                                        ; implicit-def: $sgpr5
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s10, 0
	s_cselect_b32 s4, s4, 0
	s_cmp_lg_u32 s10, 1
	s_cselect_b32 s5, s5, 0
	s_cmp_lg_u32 s10, 2
	s_cselect_b32 s6, s6, 0
	s_cmp_lg_u32 s10, 3
	s_cselect_b32 s7, s7, 0
	s_cmp_lg_u32 s10, 4
	s_cselect_b32 s8, s8, 0
	s_add_u32 s10, s10, 1
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s13, s10
	s_cbranch_scc1 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
                                        ; implicit-def: $sgpr8
.LBB0_5:                                ; %._crit_edge
	v_mov_b32_e32 v1, 0
	s_add_i32 s15, s13, -1
	s_cmp_lt_i32 s13, 2
	s_cbranch_scc1 .LBB0_22
; %bb.6:                                ; %.lr.ph47.i
	s_mov_b32 s4, 0
	v_mov_b32_e32 v9, 0
	v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
	v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
	v_mov_b32_e32 v5, s8
	s_add_i32 s5, s12, -1
	s_add_i32 s6, s12, -2
	s_mov_b32 s7, s13
.LBB0_7:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_10 Depth 2
                                        ;     Child Loop BB0_14 Depth 2
                                        ;       Child Loop BB0_17 Depth 3
	v_sub_nc_u32_e32 v12, s5, v9
	v_mov_b32_e32 v11, 0
	s_sub_i32 s8, s15, s4
	s_mov_b32 s9, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_le_i32_e64 s8, v12
	s_cbranch_execz .LBB0_12
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, s8, v12
	s_cmp_gt_i32 s8, 0
	v_mov_b32_e32 v11, 1
	s_cselect_b32 s10, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s11, s10, vcc_lo
	s_and_saveexec_b32 s10, s11
	s_cbranch_execz .LBB0_11
; %bb.9:                                ; %.lr.ph.i.i.preheader
                                        ;   in Loop: Header=BB0_7 Depth=1
	v_mov_b32_e32 v11, 1
	s_mov_b32 s11, 1
.LBB0_10:                               ; %.lr.ph.i.i
                                        ;   Parent Loop BB0_7 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v13, s11
	v_mul_lo_u32 v11, v12, v11
	s_sub_i32 s16, 0, s11
	v_add_nc_u32_e32 v12, -1, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_iflag_f32_e32 v13, v13
	v_ashrrev_i32_e32 v15, 31, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v11, v15
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v13, 0x4f7ffffe, v13
	v_xor_b32_e32 v11, v11, v15
	v_cvt_u32_f32_e32 v13, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v14, s16, v13
	v_mul_hi_u32 v14, v13, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v13, v13, v14
	v_mul_hi_u32 v13, v11, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v14, v13, s11
	v_sub_nc_u32_e32 v11, v11, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v14, s11, v11
	v_cmp_le_u32_e32 vcc_lo, s11, v11
	v_dual_cndmask_b32 v11, v11, v14 :: v_dual_add_nc_u32 v16, 1, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v13, v13, v16, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s11, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v14, 1, v13
	s_add_i32 s11, s11, 1
	s_cmp_lg_u32 s7, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v11, v13, v14, vcc_lo
	v_xor_b32_e32 v11, v11, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v11, v11, v15
	s_cbranch_scc1 .LBB0_10
.LBB0_11:                               ; %Flow226
                                        ;   in Loop: Header=BB0_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
.LBB0_12:                               ; %_Z7binom_dii.exit.i
                                        ;   in Loop: Header=BB0_7 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s9, exec_lo
	v_cmpx_le_i32_e64 v11, v8
	s_cbranch_execz .LBB0_21
; %bb.13:                               ; %.lr.ph.i
                                        ;   in Loop: Header=BB0_7 Depth=1
	v_sub_nc_u32_e32 v12, s6, v9
	s_cmp_gt_i32 s8, 0
	s_mov_b32 s10, 0
	s_cselect_b32 s11, -1, 0
.LBB0_14:                               ;   Parent Loop BB0_7 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_17 Depth 3
	v_add_nc_u32_e32 v9, 1, v9
	v_mov_b32_e32 v13, 0
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v14, s5, v9
	v_cmpx_le_i32_e64 s8, v14
	s_cbranch_execz .LBB0_19
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, s8, v14
	v_mov_b32_e32 v13, 1
	s_and_b32 s18, s11, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s17, s18
	s_cbranch_execz .LBB0_18
; %bb.16:                               ; %.lr.ph.i33.i.preheader
                                        ;   in Loop: Header=BB0_14 Depth=2
	v_dual_mov_b32 v13, 1 :: v_dual_mov_b32 v14, v12
	s_mov_b32 s18, 1
.LBB0_17:                               ; %.lr.ph.i33.i
                                        ;   Parent Loop BB0_7 Depth=1
                                        ;     Parent Loop BB0_14 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v15, s18
	v_mul_lo_u32 v13, v14, v13
	s_sub_i32 s19, 0, s18
	v_add_nc_u32_e32 v14, -1, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_iflag_f32_e32 v15, v15
	v_ashrrev_i32_e32 v17, 31, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v13, v13, v17
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v15, 0x4f7ffffe, v15
	v_xor_b32_e32 v13, v13, v17
	v_cvt_u32_f32_e32 v15, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v16, s19, v15
	v_mul_hi_u32 v16, v15, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v15, v15, v16
	v_mul_hi_u32 v15, v13, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v16, v15, s18
	v_sub_nc_u32_e32 v13, v13, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v16, s18, v13
	v_cmp_le_u32_e32 vcc_lo, s18, v13
	v_dual_cndmask_b32 v13, v13, v16 :: v_dual_add_nc_u32 v18, 1, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v15, v15, v18, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s18, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v16, 1, v15
	s_add_i32 s18, s18, 1
	s_cmp_lg_u32 s7, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v13, v15, v16, vcc_lo
	v_xor_b32_e32 v13, v13, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v13, v13, v17
	s_cbranch_scc1 .LBB0_17
.LBB0_18:                               ; %Flow223
                                        ;   in Loop: Header=BB0_14 Depth=2
	s_or_b32 exec_lo, exec_lo, s17
.LBB0_19:                               ; %_Z7binom_dii.exit37.i
                                        ;   in Loop: Header=BB0_14 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s16
	v_sub_nc_u32_e32 v8, v8, v11
	v_dual_mov_b32 v11, v13 :: v_dual_add_nc_u32 v12, -1, v12
	v_cmp_gt_i32_e32 vcc_lo, v13, v8
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_14
; %bb.20:                               ; %._crit_edge.i
                                        ;   in Loop: Header=BB0_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_cmp_eq_u32 s4, 4
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 3
	v_cndmask_b32_e32 v5, v5, v9, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 2
	v_cndmask_b32_e32 v4, v4, v9, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_cndmask_b32_e32 v3, v3, v9, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 0
	v_cndmask_b32_e32 v2, v2, v9, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e32 v1, v1, v9, vcc_lo
.LBB0_21:                               ; %Flow224
                                        ;   in Loop: Header=BB0_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_add_i32 s4, s4, 1
	v_add_nc_u32_e32 v9, 1, v9
	s_cmp_eq_u32 s4, 4
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 3
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v5, v9, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 2
	v_cndmask_b32_e32 v4, v4, v9, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 1
	v_cndmask_b32_e32 v3, v3, v9, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 0
	v_cndmask_b32_e32 v2, v2, v9, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_add_i32 s7, s7, -1
	v_cndmask_b32_e32 v1, v1, v9, vcc_lo
	s_cmp_lg_u32 s4, s15
	s_cbranch_scc1 .LBB0_7
	s_branch .LBB0_23
.LBB0_22:
	v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v4, s7
	v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v2, s5
.LBB0_23:                               ; %_Z18unrank_combinationiiiPi.exit
	s_load_b64 s[0:1], s[0:1], 0x4
	v_bfe_u32 v9, v0, 10, 10
	s_load_b128 s[8:11], s[2:3], 0x20
	v_bfe_u32 v0, v0, 20, 10
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s0, 16
	v_mul_u32_u24_e32 v9, s1, v9
	s_mul_i32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v10, s0, v10
	v_add3_u32 v9, v10, v9, v0
	v_cndmask_b32_e64 v0, 0, 1, s14
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_lo_u32 v9, v9, 50
	s_cbranch_vccnz .LBB0_28
; %bb.24:                               ; %.preheader75.preheader
	s_cmp_eq_u32 s15, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s15, 2
	v_cndmask_b32_e32 v10, v1, v2, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s15, 3
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v10, v10, v3, s0
	s_cmp_eq_u32 s15, 4
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s15, 0
	v_cndmask_b32_e64 v10, v10, v4, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v10, v10, v5, s4
	v_add_nc_u32_e32 v8, v10, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v5, v5, v8, s4
	v_cndmask_b32_e64 v4, v4, v8, s1
	v_cndmask_b32_e64 v3, v3, v8, s0
	v_cndmask_b32_e32 v1, v1, v8, vcc_lo
	v_mov_b32_e32 v8, v9
	s_mov_b32 s4, 0
	s_lshl_b32 s5, s13, 1
.LBB0_25:                               ; %.preheader75
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_26 Depth 2
	s_cmp_eq_u32 s4, 1
	s_mov_b64 s[0:1], 0
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 2
	v_dual_cndmask_b32 v10, v1, v2 :: v_dual_mov_b32 v11, v8
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v10, v3, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 4
	v_cndmask_b32_e32 v10, v10, v4, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v10, v5, vcc_lo
	v_mul_lo_u32 v10, v10, s12
.LBB0_26:                               ;   Parent Loop BB0_25 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_cmp_eq_u32 s0, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 2
	v_cndmask_b32_e32 v12, v1, v2, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v12, v12, v3, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 4
	v_cndmask_b32_e32 v12, v12, v4, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s13, s0
	v_cndmask_b32_e32 v12, v12, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v12, v12, v10
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 1, v[12:13]
	v_add_co_u32 v12, vcc_lo, s8, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v13, vcc_lo
	global_load_u16 v12, v[12:13], off
	s_waitcnt vmcnt(0)
	ds_store_b16 v11, v12
	v_add_nc_u32_e32 v11, 2, v11
	s_cbranch_scc1 .LBB0_26
; %bb.27:                               ; %._crit_edge85
                                        ;   in Loop: Header=BB0_25 Depth=1
	v_add_nc_u32_e32 v8, s5, v8
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s4, s13
	s_cbranch_scc1 .LBB0_25
.LBB0_28:                               ; %._crit_edge87
	s_load_b32 s0, s[2:3], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s0, 1
	s_cbranch_scc1 .LBB0_41
; %bb.29:                               ; %.preheader74.lr.ph
	s_lshl_b32 s1, s13, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e64 v1, s1, 16
	s_mov_b32 s1, 0
	v_dual_mov_b32 v1, 0x1ffffff :: v_dual_add_nc_u32 v2, -4, v1
.LBB0_30:                               ; %.preheader74
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_32 Depth 2
                                        ;     Child Loop BB0_34 Depth 2
                                        ;     Child Loop BB0_36 Depth 2
                                        ;       Child Loop BB0_37 Depth 3
	v_cmp_ne_u32_e32 vcc_lo, 1, v0
	s_cbranch_vccnz .LBB0_39
; %bb.31:                               ; %.lr.ph89.preheader
                                        ;   in Loop: Header=BB0_30 Depth=1
	v_mov_b32_e32 v3, 16
	s_mov_b32 s2, 0
.LBB0_32:                               ; %.lr.ph89
                                        ;   Parent Loop BB0_30 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s2
	s_add_i32 s2, s2, 1
	s_cmp_lg_u32 s13, s2
	scratch_store_b32 v3, v4, off
	v_add_nc_u32_e32 v3, 4, v3
	s_cbranch_scc1 .LBB0_32
; %bb.33:                               ; %._crit_edge90
                                        ;   in Loop: Header=BB0_30 Depth=1
	v_mov_b32_e32 v3, v2
	s_mov_b32 s3, s1
	s_mov_b32 s2, s13
.LBB0_34:                               ; %.lr.ph.i65
                                        ;   Parent Loop BB0_30 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s4, s2, 31
	s_add_i32 s5, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_xor_b32 s4, s5, s4
	s_ashr_i32 s5, s3, 31
	v_cvt_f32_u32_e32 v4, s4
	s_sub_i32 s7, 0, s4
	s_add_i32 s3, s3, s5
	s_xor_b32 s3, s3, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v4
	s_mul_i32 s7, s7, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s7, s6, s7
	s_add_i32 s6, s6, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s6, s3, s6
	s_mul_i32 s6, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s6, s3, s6
	s_sub_i32 s7, s6, s4
	s_cmp_ge_u32 s6, s4
	s_cselect_b32 s6, s7, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_sub_i32 s7, s6, s4
	s_cmp_ge_u32 s6, s4
	s_cselect_b32 s4, s7, s6
	s_xor_b32 s4, s4, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s4, s4, s5
	s_lshl_b32 s6, s4, 2
	s_add_i32 s4, s4, 1
	s_add_i32 s6, s6, 16
	s_ashr_i32 s7, s4, 31
	scratch_load_b32 v4, off, s6
	scratch_load_b32 v5, v3, off
	s_add_i32 s4, s4, s7
	s_xor_b32 s5, s5, s7
	s_xor_b32 s4, s4, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v8, s4
	s_sub_i32 s7, 0, s4
	v_rcp_iflag_f32_e32 v8, v8
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v8, 0x4f7ffffe, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v8, v8
	v_readfirstlane_b32 s8, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s7, s8
	s_mul_hi_u32 s7, s8, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s8, s8, s7
	s_mul_hi_u32 s7, s3, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_mul_i32 s8, s7, s4
	s_add_i32 s9, s7, 1
	s_sub_i32 s3, s3, s8
	s_sub_i32 s8, s3, s4
	s_cmp_ge_u32 s3, s4
	s_cselect_b32 s7, s9, s7
	s_cselect_b32 s3, s8, s3
	s_add_i32 s8, s7, 1
	s_cmp_ge_u32 s3, s4
	s_cselect_b32 s3, s8, s7
	s_add_i32 s4, s2, -1
	s_xor_b32 s3, s3, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s3, s3, s5
	s_cmp_gt_u32 s2, 1
	s_mov_b32 s2, s4
	s_waitcnt vmcnt(1)
	scratch_store_b32 v3, v4, off
	v_add_nc_u32_e32 v3, -4, v3
	s_waitcnt vmcnt(0)
	scratch_store_b32 off, v5, s6
	s_cbranch_scc1 .LBB0_34
; %bb.35:                               ; %_Z18unrank_permutationiiPi.exit
                                        ;   in Loop: Header=BB0_30 Depth=1
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, 0
	s_mov_b32 s3, 0
.LBB0_36:                               ; %.preheader
                                        ;   Parent Loop BB0_30 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_37 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s4, s3, 2
	v_mov_b32_e32 v5, 16
	s_add_i32 s4, s4, 16
	scratch_load_b32 v4, off, s4
	s_mov_b32 s4, 0
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v4, v4, s13
.LBB0_37:                               ;   Parent Loop BB0_30 Depth=1
                                        ;     Parent Loop BB0_36 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	scratch_load_b32 v8, v5, off
	s_add_i32 s5, s2, s4
	v_add_nc_u32_e32 v5, 4, v5
	s_lshl_b32 s5, 1, s5
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s13, s4
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v8, v4, v8
	v_lshl_add_u32 v8, v8, 1, v9
	ds_load_u16 v8, v8
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 1, v8
	v_cndmask_b32_e64 v8, 0, s5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v3, v8, v3
	s_cbranch_scc1 .LBB0_37
; %bb.38:                               ; %._crit_edge94
                                        ;   in Loop: Header=BB0_36 Depth=2
	s_add_i32 s3, s3, 1
	s_add_i32 s2, s2, s13
	s_cmp_lg_u32 s3, s13
	s_cbranch_scc1 .LBB0_36
	s_branch .LBB0_40
.LBB0_39:                               ;   in Loop: Header=BB0_30 Depth=1
	v_mov_b32_e32 v3, 0
.LBB0_40:                               ; %._crit_edge98
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_min_i32_e32 v1, v3, v1
	s_add_i32 s1, s1, 1
	s_cmp_lg_u32 s1, s0
	s_cbranch_scc1 .LBB0_30
	s_branch .LBB0_42
.LBB0_41:
	v_mov_b32_e32 v1, 0x1ffffff
.LBB0_42:                               ; %._crit_edge102
	v_lshlrev_b64 v[2:3], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	global_store_b32 v[2:3], v1, off
.LBB0_43:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15examine_subsetsiilliPsPi
		.amdhsa_group_segment_fixed_size 51200
		.amdhsa_private_segment_fixed_size 48
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 1
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15examine_subsetsiilliPsPi, .Lfunc_end0-_Z15examine_subsetsiilliPsPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2168
; NumSgprs: 22
; NumVgprs: 19
; ScratchSize: 48
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 51200 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 51200
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15examine_subsetsiilliPsPi
    .private_segment_fixed_size: 48
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z15examine_subsetsiilliPsPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
