#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdio.h>
#include <cstdlib>
#include <time.h>
#include <unistd.h>

#define MASK_WIDTH 5
#define TILE_SIZE 4


__constant__ float Mc[1024];

__global__ void Convolution3d(float* input, float* output, int numARows, int numACols, int numAHeight, int numCRows, int numCCols, int numCHeight, int k_dim)
{
    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int tz = threadIdx.z;

    int row_o = blockIdx.y*TILE_SIZE + ty;
    int col_o = blockIdx.x*TILE_SIZE + tx;
    int height_o = blockIdx.z*TILE_SIZE + tz;
    
    int row_i = row_o - ((k_dim -1)/2);
    int col_i = col_o - ((k_dim -1)/2);
    int height_i = height_o - ((k_dim -1)/2);

    __shared__ float Ns[1024];
    
    if((row_i >= 0) && (row_i < numARows) && (col_i >= 0) && (col_i < numACols) && (height_i >= 0) && (height_i < numAHeight)){
        Ns[tz*(TILE_SIZE + (k_dim - 1))*(TILE_SIZE + (k_dim - 1)) + ty*(TILE_SIZE + (k_dim - 1)) + tx] = input[numACols*numARows*height_i + row_i*numACols+col_i];
    }else{
        Ns[tz*(TILE_SIZE + (k_dim - 1))*(TILE_SIZE + (k_dim - 1)) + ty*(TILE_SIZE + (k_dim - 1)) + tx] = 0.0f;
    }
    __syncthreads();
    if(ty < TILE_SIZE && tx < TILE_SIZE && tz < TILE_SIZE){
        float out = 0.0f;
        for(int i = 0; i < k_dim; i++){
            for(int j = 0; j < k_dim; j++){
                for(int k = 0; k < k_dim; k++){
                    out += Mc[i*k_dim*k_dim+j*k_dim+k] * Ns[(i+tz)*(TILE_SIZE + (k_dim - 1))*(TILE_SIZE + (k_dim - 1)) + (j+ty)*(TILE_SIZE + (k_dim - 1)) + k+tx];
                }
            }
        }
        __syncthreads();
        if(row_o < numCRows && col_o < numCCols && height_o < numCHeight){
            output[height_o * numCCols * numCRows + row_o * numCCols + col_o] = out;
        }
    }
}


int main(int argc, char** argv)
{
    int check;
    extern char *optarg;
	extern int optind;
    check = getopt(argc, argv, "abcde :");
    FILE* input_file;
    FILE* output_file;
    FILE* kernel_file;
    float *input,*output,*kernel;
    float *d_input;
    switch (check)
    {
        case 'a':
            input_file = fopen("./sample/test1/input.txt", "r");
            if(input_file==NULL) printf("input파일 열기 실패\n");
            output_file = fopen("./sample/test1/output.txt","r");
            if(output_file==NULL) printf("output파일 열기 실패\n");
            kernel_file = fopen("./sample/test1/kernel.txt","r");
            if(kernel_file==NULL) printf("kernel파일 열기 실패\n");
            break;
        case 'b':
            input_file = fopen("./sample/test2/input.txt", "r");
            if(input_file==NULL) printf("input파일 열기 실패\n");
            output_file = fopen("./sample/test2/output.txt","r");
            if(output_file==NULL) printf("output파일 열기 실패\n");
            kernel_file = fopen("./sample/test2/kernel.txt","r");
            if(kernel_file==NULL) printf("kernel파일 열기 실패\n");
            break;
        case 'c':
            input_file = fopen("./sample/test3/input.txt", "r");
            if(input_file==NULL) printf("input파일 열기 실패\n");
            output_file = fopen("./sample/test3/output.txt","r");
            if(output_file==NULL) printf("output파일 열기 실패\n");
            kernel_file = fopen("./sample/test3/kernel.txt","r");
            if(kernel_file==NULL) printf("kernel파일 열기 실패\n");
            break;
        case 'd':
            input_file = fopen("./sample/test4/input.txt", "r");
            if(input_file==NULL) printf("input파일 열기 실패\n");
            output_file = fopen("./sample/test4/output.txt","r");
            if(output_file==NULL) printf("output파일 열기 실패\n");
            kernel_file = fopen("./sample/test4/kernel.txt","r");
            if(kernel_file==NULL) printf("kernel파일 열기 실패\n");
            break;
        case 'e':
            input_file = fopen("./sample/test5/input.txt", "r");
            if(input_file==NULL) printf("input파일 열기 실패\n");
            output_file = fopen("./sample/test5/output.txt","r");
            if(output_file==NULL) printf("output파일 열기 실패\n");
            kernel_file = fopen("./sample/test5/kernel.txt","r");
            if(kernel_file==NULL) printf("kernel파일 열기 실패\n");
            break;
        default:
            printf("Wrong argument ./conv3d -[a...e]");
            break;
    }

    int i_x,i_y,i_z;
    int o_x,o_y,o_z;
    int k_dim;
    
    fscanf(input_file,"%d %d %d",&i_z,&i_y,&i_x);
    input=(float*)malloc(sizeof(float)*i_x*i_y*i_z);
    cudaMalloc(&d_input,sizeof(float)*i_x*i_y*i_z);
    
    for(int i=0;i<i_x*i_y*i_z;i++){
        fscanf(input_file,"%f",input+i);
    }
    cudaMemcpy(d_input,input, sizeof(float)*i_x*i_y*i_z, cudaMemcpyHostToDevice);

    fscanf(kernel_file,"%d",&k_dim);
    kernel=(float*)malloc(sizeof(float)*k_dim*k_dim*k_dim);
    for(int i=0;i<k_dim*k_dim*k_dim;i++){
        fscanf(kernel_file,"%f",kernel+i);
    }
    cudaMemcpyToSymbol(Mc,kernel, sizeof(float)*k_dim*k_dim*k_dim);

    fscanf(output_file,"%d %d %d",&o_z,&o_y,&o_x);
    output=(float*)malloc(sizeof(float)*o_x*o_y*o_z);
    for(int i=0;i<o_x*o_y*o_z;i++){
        fscanf(output_file,"%f",output+i);
    }

    printf("input: %d %d %d \n", i_x, i_y, i_z);
    printf("kernel: %d\n", k_dim);
    printf("output: %d %d %d\n", o_x, o_y, o_z);

    float *h_out, *d_out;
    h_out = (float*)malloc(sizeof(float)*o_x*o_y*o_z);
    cudaMalloc(&d_out, sizeof(float)*o_x*o_y*o_z);

    int blocksize = TILE_SIZE + (k_dim - 1);
    dim3 dimGrid(ceil(i_x/(TILE_SIZE*1.0)), ceil(i_y/(TILE_SIZE*1.0)), ceil(i_z/(TILE_SIZE*1.0)));
    dim3 dimBlock(blocksize, blocksize, blocksize);
    cudaEvent_t start, end;
    float elapsedTime;
    cudaEventCreate(&start);
	cudaEventCreate(&end);
    
    cudaEventRecord(start);
    Convolution3d<<<dimGrid, dimBlock>>>(d_input, d_out, i_y, i_x, i_z, o_y, o_x, o_z, k_dim);
    cudaEventRecord(end);
    cudaEventSynchronize(end);
    cudaEventElapsedTime(&elapsedTime, start, end);
    printf("Execution time for CUDA: %.3fms\n", elapsedTime);
    cudaEventDestroy(start);
    cudaEventDestroy(end);
    //cudaEventRecord(end,0);
	//cudaEventSynchronize(end);
	//cudaEventElapsedTime(&time_ms, start, end);


    cudaDeviceSynchronize();
    cudaMemcpy(h_out, d_out, sizeof(float)*o_x*o_y*o_z, cudaMemcpyDeviceToHost);

    /*
    for(int i = 0; i < o_x*o_y*o_z; i++){
        if(i % (o_x*o_y) == 0){
            printf("\n");
        }
        if(i % o_x == 0){
            printf("\n");
        }
        printf("%f ", h_out[i]);
    }
    */

    int err = 0;
    for(int i=0;i<o_x*o_y*o_z;i++){
        if(abs(h_out[i] - output[i]) >= 0.001f){
            err++;
        }
    }
    
    if(err == 0){
        printf("validation complete\n");
    }else{
        printf("%d\n", err);
    }
    
    

	return EXIT_SUCCESS;
}
	.file	"tmpxft_0027f9fa_00000000-6_conv3d.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2043:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2043:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z42__device_stub__Z13Convolution3dPfS_iiiiiiiPfS_iiiiiii
	.type	_Z42__device_stub__Z13Convolution3dPfS_iiiiiiiPfS_iiiiiii, @function
_Z42__device_stub__Z13Convolution3dPfS_iiiiiiiPfS_iiiiiii:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13Convolution3dPfS_iiiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 208
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z42__device_stub__Z13Convolution3dPfS_iiiiiiiPfS_iiiiiii, .-_Z42__device_stub__Z13Convolution3dPfS_iiiiiiiPfS_iiiiiii
	.globl	_Z13Convolution3dPfS_iiiiiii
	.type	_Z13Convolution3dPfS_iiiiiii, @function
_Z13Convolution3dPfS_iiiiiii:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z13Convolution3dPfS_iiiiiiiPfS_iiiiiii
	.cfi_endproc
.LFE2066:
	.size	_Z13Convolution3dPfS_iiiiiii, .-_Z13Convolution3dPfS_iiiiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"abcde :"
.LC1:
	.string	"r"
.LC2:
	.string	"./sample/test1/input.txt"
.LC3:
	.string	"input\355\214\214\354\235\274 \354\227\264\352\270\260 \354\213\244\355\214\250\n"
.LC4:
	.string	"./sample/test1/output.txt"
.LC5:
	.string	"output\355\214\214\354\235\274 \354\227\264\352\270\260 \354\213\244\355\214\250\n"
.LC6:
	.string	"./sample/test1/kernel.txt"
.LC7:
	.string	"kernel\355\214\214\354\235\274 \354\227\264\352\270\260 \354\213\244\355\214\250\n"
.LC8:
	.string	"./sample/test2/input.txt"
.LC9:
	.string	"./sample/test2/output.txt"
.LC10:
	.string	"./sample/test2/kernel.txt"
.LC11:
	.string	"./sample/test3/input.txt"
.LC12:
	.string	"./sample/test3/output.txt"
.LC13:
	.string	"./sample/test3/kernel.txt"
.LC14:
	.string	"./sample/test4/input.txt"
.LC15:
	.string	"./sample/test4/output.txt"
.LC16:
	.string	"./sample/test4/kernel.txt"
.LC17:
	.string	"./sample/test5/input.txt"
.LC18:
	.string	"./sample/test5/output.txt"
.LC19:
	.string	"./sample/test5/kernel.txt"
.LC20:
	.string	"Wrong argument ./conv3d -[a...e]"
.LC21:
	.string	"%d %d %d"
.LC22:
	.string	"%f"
.LC23:
	.string	"%d"
.LC24:
	.string	"input: %d %d %d \n"
.LC25:
	.string	"kernel: %d\n"
.LC26:
	.string	"output: %d %d %d\n"
.LC28:
	.string	"Execution time for CUDA: %.3fms\n"
.LC31:
	.string	"validation complete\n"
.LC32:
	.string	"%d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2040:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rdx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	getopt@PLT
	subl	$97, %eax
	cmpl	$4, %eax
	ja	.L9
	leaq	.L11(%rip), %rdx
	leaq	.LC1(%rip), %rbp
	movslq	(%rdx,%rax,4), %rax
	movq	%rbp, %rsi
	addq	%rdx, %rax
	notrack jmp	*%rax
	.section	.rodata
	.align 4
	.align 4
.L11:
	.long	.L15-.L11
	.long	.L14-.L11
	.long	.L13-.L11
	.long	.L12-.L11
	.long	.L10-.L11
	.section	.text.startup
.L15:
	leaq	.LC2(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %r12
	testq	%rax, %rax
	jne	.L16
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L16:
	movq	%rbp, %rsi
	leaq	.LC4(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.L17
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L17:
	movq	%rbp, %rsi
	leaq	.LC6(%rip), %rdi
	jmp	.L51
.L14:
	leaq	.LC8(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %r12
	testq	%rax, %rax
	jne	.L20
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L20:
	movq	%rbp, %rsi
	leaq	.LC9(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.L21
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L21:
	movq	%rbp, %rsi
	leaq	.LC10(%rip), %rdi
	jmp	.L51
.L13:
	leaq	.LC11(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %r12
	testq	%rax, %rax
	jne	.L23
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L23:
	movq	%rbp, %rsi
	leaq	.LC12(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.L24
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L24:
	movq	%rbp, %rsi
	leaq	.LC13(%rip), %rdi
	jmp	.L51
.L12:
	leaq	.LC14(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %r12
	testq	%rax, %rax
	jne	.L26
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L26:
	movq	%rbp, %rsi
	leaq	.LC15(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.L27
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L27:
	movq	%rbp, %rsi
	leaq	.LC16(%rip), %rdi
	jmp	.L51
.L10:
	leaq	.LC17(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %r12
	testq	%rax, %rax
	jne	.L29
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L29:
	movq	%rbp, %rsi
	leaq	.LC18(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.L30
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L30:
	movq	%rbp, %rsi
	leaq	.LC19(%rip), %rdi
.L51:
	call	fopen@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rbp
	testq	%rax, %rax
	jne	.L19
	jmp	.L48
.L9:
	leaq	.LC20(%rip), %rsi
.L48:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L19:
	leaq	4(%rsp), %rcx
	leaq	8(%rsp), %rdx
	movq	%rsp, %r8
	movq	%r12, %rdi
	leaq	.LC21(%rip), %rsi
	xorl	%eax, %eax
	xorl	%r14d, %r14d
	call	__isoc23_fscanf@PLT
	movslq	4(%rsp), %rax
	movslq	(%rsp), %r15
	imulq	%rax, %r15
	movslq	8(%rsp), %rax
	imulq	%rax, %r15
	salq	$2, %r15
	movq	%r15, %rdi
	call	malloc@PLT
	movq	%r15, %rsi
	leaq	32(%rsp), %rdi
	movq	%rax, %r13
	call	cudaMalloc@PLT
	movq	%r13, %r15
.L32:
	movl	(%rsp), %eax
	movslq	4(%rsp), %rsi
	movslq	8(%rsp), %rcx
	movl	%eax, %edx
	imull	%esi, %edx
	imull	%ecx, %edx
	cmpl	%r14d, %edx
	jle	.L55
	movq	%r15, %rdx
	leaq	.LC22(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	incl	%r14d
	addq	$4, %r15
	jmp	.L32
.L55:
	movslq	%eax, %rdx
	movq	32(%rsp), %rdi
	xorl	%r15d, %r15d
	leaq	.LC22(%rip), %r14
	imulq	%rsi, %rdx
	movq	%r13, %rsi
	imulq	%rcx, %rdx
	movl	$1, %ecx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	leaq	24(%rsp), %rdx
	movq	%rbp, %rdi
	xorl	%eax, %eax
	leaq	.LC23(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movslq	24(%rsp), %rax
	movq	%rax, %rdi
	imulq	%rax, %rdi
	imulq	%rax, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movq	%rax, %r12
	movq	%rax, %r13
.L34:
	movslq	24(%rsp), %rdx
	movl	%edx, %eax
	imull	%edx, %eax
	imull	%edx, %eax
	cmpl	%r15d, %eax
	jle	.L56
	movq	%r13, %rdx
	movq	%r14, %rsi
	movq	%rbp, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	incl	%r15d
	addq	$4, %r13
	jmp	.L34
.L56:
	movq	%rdx, %rax
	movq	%r12, %rsi
	movl	$1, %r8d
	xorl	%ecx, %ecx
	imulq	%rdx, %rax
	leaq	_ZL2Mc(%rip), %rdi
	xorl	%r13d, %r13d
	leaq	.LC22(%rip), %r12
	imulq	%rax, %rdx
	salq	$2, %rdx
	call	cudaMemcpyToSymbol@PLT
	leaq	16(%rsp), %rcx
	movq	%rbx, %rdi
	xorl	%eax, %eax
	leaq	20(%rsp), %rdx
	leaq	12(%rsp), %r8
	leaq	.LC21(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movslq	16(%rsp), %rax
	movslq	12(%rsp), %rdi
	imulq	%rax, %rdi
	movslq	20(%rsp), %rax
	imulq	%rax, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movq	%rax, %rbp
	movq	%rax, %r14
.L36:
	movl	12(%rsp), %eax
	imull	16(%rsp), %eax
	imull	20(%rsp), %eax
	cmpl	%r13d, %eax
	jle	.L57
	movq	%r14, %rdx
	movq	%r12, %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	incl	%r13d
	addq	$4, %r14
	jmp	.L36
.L57:
	movl	8(%rsp), %r8d
	movl	4(%rsp), %ecx
	movl	$2, %edi
	xorl	%eax, %eax
	movl	(%rsp), %edx
	leaq	.LC24(%rip), %rsi
	call	__printf_chk@PLT
	movl	24(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC25(%rip), %rsi
	call	__printf_chk@PLT
	movl	20(%rsp), %r8d
	movl	16(%rsp), %ecx
	xorl	%eax, %eax
	movl	12(%rsp), %edx
	leaq	.LC26(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movslq	16(%rsp), %rax
	movslq	12(%rsp), %rbx
	imulq	%rax, %rbx
	movslq	20(%rsp), %rax
	imulq	%rax, %rbx
	salq	$2, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rsi
	leaq	40(%rsp), %rdi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	cvtsi2sdl	8(%rsp), %xmm0
	movl	24(%rsp), %eax
	mulsd	.LC27(%rip), %xmm0
	leal	3(%rax), %ebx
	call	ceil@PLT
	movq	%xmm0, %r13
	cvtsi2sdl	4(%rsp), %xmm0
	mulsd	.LC27(%rip), %xmm0
	call	ceil@PLT
	movq	%xmm0, %r14
	cvtsi2sdl	(%rsp), %xmm0
	mulsd	.LC27(%rip), %xmm0
	call	ceil@PLT
	movq	%r14, %xmm2
	movq	%r13, %xmm3
	leaq	48(%rsp), %rdi
	cvttsd2siq	%xmm0, %rax
	movl	%ebx, 76(%rsp)
	movl	%ebx, 80(%rsp)
	movl	%ebx, 84(%rsp)
	movl	%eax, 64(%rsp)
	cvttsd2siq	%xmm2, %rax
	movl	%eax, 68(%rsp)
	cvttsd2siq	%xmm3, %rax
	movl	%eax, 72(%rsp)
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	84(%rsp), %ecx
	movl	72(%rsp), %esi
	xorl	%r9d, %r9d
	movq	76(%rsp), %rdx
	movq	64(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	pushq	%rax
	.cfi_def_cfa_offset 168
	movl	32(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 176
	movl	36(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 184
	movl	36(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 192
	movl	48(%rsp), %r9d
	movl	40(%rsp), %r8d
	movl	32(%rsp), %ecx
	movl	36(%rsp), %edx
	movq	72(%rsp), %rsi
	movq	64(%rsp), %rdi
	call	_Z42__device_stub__Z13Convolution3dPfS_iiiiiiiPfS_iiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 160
.L38:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	28(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC28(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	28(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	48(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	56(%rsp), %rdi
	call	cudaEventDestroy@PLT
	call	cudaDeviceSynchronize@PLT
	movslq	16(%rsp), %rax
	movslq	12(%rsp), %rdx
	movq	%r12, %rdi
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	imulq	%rax, %rdx
	movslq	20(%rsp), %rax
	imulq	%rax, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	12(%rsp), %edx
	imull	16(%rsp), %edx
	xorl	%eax, %eax
	imull	20(%rsp), %edx
	xorl	%ecx, %ecx
	movss	.LC29(%rip), %xmm1
.L39:
	cmpl	%eax, %edx
	jle	.L58
	movss	(%r12,%rax,4), %xmm0
	subss	0(%rbp,%rax,4), %xmm0
	andps	%xmm1, %xmm0
	comiss	.LC30(%rip), %xmm0
	jb	.L40
	incl	%ecx
.L40:
	incq	%rax
	jmp	.L39
.L58:
	testl	%ecx, %ecx
	jne	.L43
	leaq	.LC31(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L44
.L43:
	movl	%ecx, %edx
	leaq	.LC32(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L44:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	main, .-main
	.section	.rodata.str1.1
.LC33:
	.string	"_Z13Convolution3dPfS_iiiiiii"
.LC34:
	.string	"Mc"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2068:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC33(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13Convolution3dPfS_iiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC34(%rip), %rdx
	movl	$4096, %r9d
	leaq	_ZL2Mc(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2068:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL2Mc
	.comm	_ZL2Mc,4096,32
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC27:
	.long	0
	.long	1070596096
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC29:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC30:
	.long	981668463
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "hip/hip_runtime.h"


#include <stdio.h>
#include <cstdlib>
#include <time.h>
#include <unistd.h>

#define MASK_WIDTH 5
#define TILE_SIZE 4


__constant__ float Mc[1024];

__global__ void Convolution3d(float* input, float* output, int numARows, int numACols, int numAHeight, int numCRows, int numCCols, int numCHeight, int k_dim)
{
    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int tz = threadIdx.z;

    int row_o = blockIdx.y*TILE_SIZE + ty;
    int col_o = blockIdx.x*TILE_SIZE + tx;
    int height_o = blockIdx.z*TILE_SIZE + tz;
    
    int row_i = row_o - ((k_dim -1)/2);
    int col_i = col_o - ((k_dim -1)/2);
    int height_i = height_o - ((k_dim -1)/2);

    __shared__ float Ns[1024];
    
    if((row_i >= 0) && (row_i < numARows) && (col_i >= 0) && (col_i < numACols) && (height_i >= 0) && (height_i < numAHeight)){
        Ns[tz*(TILE_SIZE + (k_dim - 1))*(TILE_SIZE + (k_dim - 1)) + ty*(TILE_SIZE + (k_dim - 1)) + tx] = input[numACols*numARows*height_i + row_i*numACols+col_i];
    }else{
        Ns[tz*(TILE_SIZE + (k_dim - 1))*(TILE_SIZE + (k_dim - 1)) + ty*(TILE_SIZE + (k_dim - 1)) + tx] = 0.0f;
    }
    __syncthreads();
    if(ty < TILE_SIZE && tx < TILE_SIZE && tz < TILE_SIZE){
        float out = 0.0f;
        for(int i = 0; i < k_dim; i++){
            for(int j = 0; j < k_dim; j++){
                for(int k = 0; k < k_dim; k++){
                    out += Mc[i*k_dim*k_dim+j*k_dim+k] * Ns[(i+tz)*(TILE_SIZE + (k_dim - 1))*(TILE_SIZE + (k_dim - 1)) + (j+ty)*(TILE_SIZE + (k_dim - 1)) + k+tx];
                }
            }
        }
        __syncthreads();
        if(row_o < numCRows && col_o < numCCols && height_o < numCHeight){
            output[height_o * numCCols * numCRows + row_o * numCCols + col_o] = out;
        }
    }
}


int main(int argc, char** argv)
{
    int check;
    extern char *optarg;
	extern int optind;
    check = getopt(argc, argv, "abcde :");
    FILE* input_file;
    FILE* output_file;
    FILE* kernel_file;
    float *input,*output,*kernel;
    float *d_input;
    switch (check)
    {
        case 'a':
            input_file = fopen("./sample/test1/input.txt", "r");
            if(input_file==NULL) printf("input파일 열기 실패\n");
            output_file = fopen("./sample/test1/output.txt","r");
            if(output_file==NULL) printf("output파일 열기 실패\n");
            kernel_file = fopen("./sample/test1/kernel.txt","r");
            if(kernel_file==NULL) printf("kernel파일 열기 실패\n");
            break;
        case 'b':
            input_file = fopen("./sample/test2/input.txt", "r");
            if(input_file==NULL) printf("input파일 열기 실패\n");
            output_file = fopen("./sample/test2/output.txt","r");
            if(output_file==NULL) printf("output파일 열기 실패\n");
            kernel_file = fopen("./sample/test2/kernel.txt","r");
            if(kernel_file==NULL) printf("kernel파일 열기 실패\n");
            break;
        case 'c':
            input_file = fopen("./sample/test3/input.txt", "r");
            if(input_file==NULL) printf("input파일 열기 실패\n");
            output_file = fopen("./sample/test3/output.txt","r");
            if(output_file==NULL) printf("output파일 열기 실패\n");
            kernel_file = fopen("./sample/test3/kernel.txt","r");
            if(kernel_file==NULL) printf("kernel파일 열기 실패\n");
            break;
        case 'd':
            input_file = fopen("./sample/test4/input.txt", "r");
            if(input_file==NULL) printf("input파일 열기 실패\n");
            output_file = fopen("./sample/test4/output.txt","r");
            if(output_file==NULL) printf("output파일 열기 실패\n");
            kernel_file = fopen("./sample/test4/kernel.txt","r");
            if(kernel_file==NULL) printf("kernel파일 열기 실패\n");
            break;
        case 'e':
            input_file = fopen("./sample/test5/input.txt", "r");
            if(input_file==NULL) printf("input파일 열기 실패\n");
            output_file = fopen("./sample/test5/output.txt","r");
            if(output_file==NULL) printf("output파일 열기 실패\n");
            kernel_file = fopen("./sample/test5/kernel.txt","r");
            if(kernel_file==NULL) printf("kernel파일 열기 실패\n");
            break;
        default:
            printf("Wrong argument ./conv3d -[a...e]");
            break;
    }

    int i_x,i_y,i_z;
    int o_x,o_y,o_z;
    int k_dim;
    
    fscanf(input_file,"%d %d %d",&i_z,&i_y,&i_x);
    input=(float*)malloc(sizeof(float)*i_x*i_y*i_z);
    hipMalloc(&d_input,sizeof(float)*i_x*i_y*i_z);
    
    for(int i=0;i<i_x*i_y*i_z;i++){
        fscanf(input_file,"%f",input+i);
    }
    hipMemcpy(d_input,input, sizeof(float)*i_x*i_y*i_z, hipMemcpyHostToDevice);

    fscanf(kernel_file,"%d",&k_dim);
    kernel=(float*)malloc(sizeof(float)*k_dim*k_dim*k_dim);
    for(int i=0;i<k_dim*k_dim*k_dim;i++){
        fscanf(kernel_file,"%f",kernel+i);
    }
    hipMemcpyToSymbol(HIP_SYMBOL(Mc),kernel, sizeof(float)*k_dim*k_dim*k_dim);

    fscanf(output_file,"%d %d %d",&o_z,&o_y,&o_x);
    output=(float*)malloc(sizeof(float)*o_x*o_y*o_z);
    for(int i=0;i<o_x*o_y*o_z;i++){
        fscanf(output_file,"%f",output+i);
    }

    printf("input: %d %d %d \n", i_x, i_y, i_z);
    printf("kernel: %d\n", k_dim);
    printf("output: %d %d %d\n", o_x, o_y, o_z);

    float *h_out, *d_out;
    h_out = (float*)malloc(sizeof(float)*o_x*o_y*o_z);
    hipMalloc(&d_out, sizeof(float)*o_x*o_y*o_z);

    int blocksize = TILE_SIZE + (k_dim - 1);
    dim3 dimGrid(ceil(i_x/(TILE_SIZE*1.0)), ceil(i_y/(TILE_SIZE*1.0)), ceil(i_z/(TILE_SIZE*1.0)));
    dim3 dimBlock(blocksize, blocksize, blocksize);
    hipEvent_t start, end;
    float elapsedTime;
    hipEventCreate(&start);
	hipEventCreate(&end);
    
    hipEventRecord(start);
    Convolution3d<<<dimGrid, dimBlock>>>(d_input, d_out, i_y, i_x, i_z, o_y, o_x, o_z, k_dim);
    hipEventRecord(end);
    hipEventSynchronize(end);
    hipEventElapsedTime(&elapsedTime, start, end);
    printf("Execution time for CUDA: %.3fms\n", elapsedTime);
    hipEventDestroy(start);
    hipEventDestroy(end);
    //cudaEventRecord(end,0);
	//cudaEventSynchronize(end);
	//cudaEventElapsedTime(&time_ms, start, end);


    hipDeviceSynchronize();
    hipMemcpy(h_out, d_out, sizeof(float)*o_x*o_y*o_z, hipMemcpyDeviceToHost);

    /*
    for(int i = 0; i < o_x*o_y*o_z; i++){
        if(i % (o_x*o_y) == 0){
            printf("\n");
        }
        if(i % o_x == 0){
            printf("\n");
        }
        printf("%f ", h_out[i]);
    }
    */

    int err = 0;
    for(int i=0;i<o_x*o_y*o_z;i++){
        if(abs(h_out[i] - output[i]) >= 0.001f){
            err++;
        }
    }
    
    if(err == 0){
        printf("validation complete\n");
    }else{
        printf("%d\n", err);
    }
    
    

	return EXIT_SUCCESS;
}
	.text
	.file	"conv3d.hip"
	.globl	_Z28__device_stub__Convolution3dPfS_iiiiiii # -- Begin function _Z28__device_stub__Convolution3dPfS_iiiiiii
	.type	_Z28__device_stub__Convolution3dPfS_iiiiiii,@function
_Z28__device_stub__Convolution3dPfS_iiiiiii: # @_Z28__device_stub__Convolution3dPfS_iiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13Convolution3dPfS_iiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__Convolution3dPfS_iiiiiii, .Lfunc_end0-_Z28__device_stub__Convolution3dPfS_iiiiiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x3fd0000000000000              # double 0.25
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI1_1:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI1_2:
	.long	0x3a83126f                      # float 0.00100000005
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str, %edx
	callq	getopt
                                        # kill: def $eax killed $eax def $rax
	addl	$-97, %eax
	cmpl	$4, %eax
	ja	.LBB1_30
# %bb.1:
	jmpq	*.LJTI1_0(,%rax,8)
.LBB1_2:
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %r14
	testq	%rax, %rax
	jne	.LBB1_4
# %bb.3:
	movl	$.Lstr.12, %edi
	callq	puts@PLT
.LBB1_4:
	movl	$.L.str.4, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.LBB1_6
# %bb.5:
	movl	$.Lstr.13, %edi
	callq	puts@PLT
.LBB1_6:
	movl	$.L.str.6, %edi
	jmp	.LBB1_7
.LBB1_24:
	movl	$.L.str.17, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %r14
	testq	%rax, %rax
	jne	.LBB1_26
# %bb.25:
	movl	$.Lstr.12, %edi
	callq	puts@PLT
.LBB1_26:
	movl	$.L.str.18, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.LBB1_28
# %bb.27:
	movl	$.Lstr.13, %edi
	callq	puts@PLT
.LBB1_28:
	movl	$.L.str.19, %edi
	jmp	.LBB1_7
.LBB1_14:
	movl	$.L.str.11, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %r14
	testq	%rax, %rax
	jne	.LBB1_16
# %bb.15:
	movl	$.Lstr.12, %edi
	callq	puts@PLT
.LBB1_16:
	movl	$.L.str.12, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.LBB1_18
# %bb.17:
	movl	$.Lstr.13, %edi
	callq	puts@PLT
.LBB1_18:
	movl	$.L.str.13, %edi
	jmp	.LBB1_7
.LBB1_19:
	movl	$.L.str.14, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %r14
	testq	%rax, %rax
	jne	.LBB1_21
# %bb.20:
	movl	$.Lstr.12, %edi
	callq	puts@PLT
.LBB1_21:
	movl	$.L.str.15, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.LBB1_23
# %bb.22:
	movl	$.Lstr.13, %edi
	callq	puts@PLT
.LBB1_23:
	movl	$.L.str.16, %edi
	jmp	.LBB1_7
.LBB1_9:
	movl	$.L.str.8, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %r14
	testq	%rax, %rax
	jne	.LBB1_11
# %bb.10:
	movl	$.Lstr.12, %edi
	callq	puts@PLT
.LBB1_11:
	movl	$.L.str.9, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.LBB1_13
# %bb.12:
	movl	$.Lstr.13, %edi
	callq	puts@PLT
.LBB1_13:
	movl	$.L.str.10, %edi
.LBB1_7:
	movl	$.L.str.2, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB1_8
# %bb.29:
	movq	%rax, %r15
	jmp	.LBB1_31
.LBB1_8:
	movl	$.Lstr.14, %edi
	callq	puts@PLT
	xorl	%r15d, %r15d
	jmp	.LBB1_31
.LBB1_30:
	movl	$.L.str.20, %edi
	xorl	%eax, %eax
	callq	printf
                                        # implicit-def: $r15
                                        # implicit-def: $rbx
                                        # implicit-def: $r14
.LBB1_31:
	leaq	24(%rsp), %rbp
	leaq	28(%rsp), %r13
	leaq	36(%rsp), %r12
	movl	$.L.str.21, %esi
	movq	%r14, %rdi
	movq	%rbp, %rdx
	movq	%r13, %rcx
	movq	%r12, %r8
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movslq	(%r12), %rax
	movslq	(%r13), %rcx
	imulq	%rax, %rcx
	movslq	(%rbp), %r13
	imulq	%rcx, %r13
	shlq	$2, %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %rbp
	leaq	64(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movl	(%r12), %eax
	leaq	28(%rsp), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, %esi
	imull	%eax, %esi
	leaq	24(%rsp), %rdx
	movl	(%rdx), %edx
	imull	%edx, %esi
	testl	%esi, %esi
	jle	.LBB1_34
# %bb.32:                               # %.lr.ph.preheader
	movq	%rbp, %r13
	xorl	%r12d, %r12d
.LBB1_33:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.22, %esi
	movq	%r14, %rdi
	movq	%r13, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%r12
	movl	36(%rsp), %eax
	movl	28(%rsp), %ecx
	movl	%ecx, %esi
	imull	%eax, %esi
	movl	24(%rsp), %edx
	imull	%edx, %esi
	movslq	%esi, %rsi
	addq	$4, %r13
	cmpq	%rsi, %r12
	jl	.LBB1_33
.LBB1_34:                               # %._crit_edge
	movq	64(%rsp), %rdi
	cltq
	movslq	%ecx, %rcx
	imulq	%rax, %rcx
	movslq	%edx, %rdx
	imulq	%rcx, %rdx
	shlq	$2, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %r14
	movl	$.L.str.23, %esi
	movq	%r15, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movslq	(%r14), %r13
	movq	%r13, %r12
	imulq	%r13, %r12
	imulq	%r13, %r12
	shlq	$2, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r14
	movl	%r13d, %eax
	imull	%r13d, %eax
	imull	%r13d, %eax
	testl	%eax, %eax
	jle	.LBB1_38
# %bb.35:                               # %.lr.ph98.preheader
	movq	%r14, %r12
	xorl	%r13d, %r13d
.LBB1_36:                               # %.lr.ph98
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.22, %esi
	movq	%r15, %rdi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%r13
	movslq	32(%rsp), %rax
	movl	%eax, %ecx
	imull	%eax, %ecx
	imull	%eax, %ecx
	movslq	%ecx, %rcx
	addq	$4, %r12
	cmpq	%rcx, %r13
	jl	.LBB1_36
# %bb.37:                               # %._crit_edge99.loopexit
	movq	%rax, %r12
	imulq	%rax, %r12
	imulq	%rax, %r12
	shlq	$2, %r12
.LBB1_38:                               # %._crit_edge99
	movl	$Mc, %edi
	movq	%r14, %rsi
	movq	%r12, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	leaq	12(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	20(%rsp), %r12
	movl	$.L.str.21, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movq	%r15, %rcx
	movq	%r12, %r8
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movslq	(%r12), %r12
	movslq	(%r15), %r15
	movq	%r12, %rdi
	imulq	%r15, %rdi
	movslq	(%r14), %r13
	imulq	%r13, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %r14
	imull	%r12d, %r15d
	imull	%r13d, %r15d
	testl	%r15d, %r15d
	jle	.LBB1_41
# %bb.39:                               # %.lr.ph103.preheader
	movq	%r14, %r15
	xorl	%r12d, %r12d
.LBB1_40:                               # %.lr.ph103
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.22, %esi
	movq	%rbx, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%r12
	movslq	20(%rsp), %rax
	movslq	16(%rsp), %rcx
	imulq	%rax, %rcx
	movslq	12(%rsp), %rax
	imulq	%rcx, %rax
	addq	$4, %r15
	cmpq	%rax, %r12
	jl	.LBB1_40
.LBB1_41:                               # %._crit_edge104
	movl	36(%rsp), %esi
	movl	28(%rsp), %edx
	movl	24(%rsp), %ecx
	movl	$.L.str.24, %edi
	xorl	%eax, %eax
	callq	printf
	movl	32(%rsp), %esi
	movl	$.L.str.25, %edi
	xorl	%eax, %eax
	callq	printf
	movl	20(%rsp), %esi
	movl	16(%rsp), %edx
	movl	12(%rsp), %ecx
	movl	$.L.str.26, %edi
	xorl	%eax, %eax
	callq	printf
	movslq	20(%rsp), %rax
	movslq	16(%rsp), %rcx
	imulq	%rax, %rcx
	movslq	12(%rsp), %r15
	imulq	%rcx, %r15
	shlq	$2, %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbx
	leaq	56(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movl	32(%rsp), %r15d
	addl	$3, %r15d
	cvtsi2sdl	36(%rsp), %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %r13
	xorps	%xmm0, %xmm0
	cvtsi2sdl	28(%rsp), %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %r12
	xorps	%xmm0, %xmm0
	cvtsi2sdl	24(%rsp), %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	%r13d, %eax
	shlq	$32, %r12
	orq	%rax, %r12
	movq	%r15, %rbp
	shlq	$32, %rbp
	orq	%r15, %rbp
	leaq	48(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventCreate
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r13), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r12, %rdi
	movq	72(%rsp), %rsi                  # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movq	%rbp, %rdx
	movl	%r15d, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_43
# %bb.42:
	movq	64(%rsp), %rdi
	movq	56(%rsp), %rsi
	movl	28(%rsp), %edx
	movl	36(%rsp), %ecx
	movl	24(%rsp), %r8d
	movl	16(%rsp), %r9d
	movl	20(%rsp), %eax
	movl	12(%rsp), %r10d
	movl	32(%rsp), %r11d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__Convolution3dPfS_iiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB1_43:
	movq	40(%rsp), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	40(%rsp), %rdi
	callq	hipEventSynchronize
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdx
	leaq	84(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12), %xmm0
	movl	$.L.str.27, %edi
	movb	$1, %al
	callq	printf
	movq	48(%rsp), %rdi
	callq	hipEventDestroy
	movq	40(%rsp), %rdi
	callq	hipEventDestroy
	callq	hipDeviceSynchronize
	movq	56(%rsp), %rsi
	movslq	20(%rsp), %rax
	movslq	16(%rsp), %rcx
	imulq	%rax, %rcx
	movslq	12(%rsp), %rdx
	imulq	%rcx, %rdx
	shlq	$2, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	16(%rsp), %eax
	imull	20(%rsp), %eax
	imull	12(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB1_47
# %bb.44:                               # %.lr.ph108.preheader
	movl	%eax, %eax
	movaps	.LCPI1_1(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movss	.LCPI1_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorl	%ecx, %ecx
.LBB1_45:                               # %.lr.ph108
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rbx,%rcx,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	subss	(%r14,%rcx,4), %xmm2
	andps	%xmm0, %xmm2
	ucomiss	%xmm1, %xmm2
	sbbl	$-1, %r15d
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_45
# %bb.46:                               # %._crit_edge109
	testl	%r15d, %r15d
	je	.LBB1_47
# %bb.48:
	movl	$.L.str.29, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB1_49
.LBB1_47:                               # %._crit_edge109.thread
	movl	$.Lstr.15, %edi
	callq	puts@PLT
.LBB1_49:
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
.LJTI1_0:
	.quad	.LBB1_2
	.quad	.LBB1_9
	.quad	.LBB1_14
	.quad	.LBB1_19
	.quad	.LBB1_24
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13Convolution3dPfS_iiiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$Mc, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$4096, %r9d                     # imm = 0x1000
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	Mc,@object                      # @Mc
	.local	Mc
	.comm	Mc,4096,16
	.type	_Z13Convolution3dPfS_iiiiiii,@object # @_Z13Convolution3dPfS_iiiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z13Convolution3dPfS_iiiiiii
	.p2align	3, 0x0
_Z13Convolution3dPfS_iiiiiii:
	.quad	_Z28__device_stub__Convolution3dPfS_iiiiiii
	.size	_Z13Convolution3dPfS_iiiiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"abcde :"
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"./sample/test1/input.txt"
	.size	.L.str.1, 25

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"r"
	.size	.L.str.2, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"./sample/test1/output.txt"
	.size	.L.str.4, 26

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"./sample/test1/kernel.txt"
	.size	.L.str.6, 26

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"./sample/test2/input.txt"
	.size	.L.str.8, 25

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"./sample/test2/output.txt"
	.size	.L.str.9, 26

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"./sample/test2/kernel.txt"
	.size	.L.str.10, 26

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"./sample/test3/input.txt"
	.size	.L.str.11, 25

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"./sample/test3/output.txt"
	.size	.L.str.12, 26

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"./sample/test3/kernel.txt"
	.size	.L.str.13, 26

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"./sample/test4/input.txt"
	.size	.L.str.14, 25

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"./sample/test4/output.txt"
	.size	.L.str.15, 26

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"./sample/test4/kernel.txt"
	.size	.L.str.16, 26

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"./sample/test5/input.txt"
	.size	.L.str.17, 25

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"./sample/test5/output.txt"
	.size	.L.str.18, 26

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"./sample/test5/kernel.txt"
	.size	.L.str.19, 26

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"Wrong argument ./conv3d -[a...e]"
	.size	.L.str.20, 33

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"%d %d %d"
	.size	.L.str.21, 9

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"%f"
	.size	.L.str.22, 3

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"%d"
	.size	.L.str.23, 3

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"input: %d %d %d \n"
	.size	.L.str.24, 18

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"kernel: %d\n"
	.size	.L.str.25, 12

	.type	.L.str.26,@object               # @.str.26
.L.str.26:
	.asciz	"output: %d %d %d\n"
	.size	.L.str.26, 18

	.type	.L.str.27,@object               # @.str.27
.L.str.27:
	.asciz	"Execution time for CUDA: %.3fms\n"
	.size	.L.str.27, 33

	.type	.L.str.29,@object               # @.str.29
.L.str.29:
	.asciz	"%d\n"
	.size	.L.str.29, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13Convolution3dPfS_iiiiiii"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"Mc"
	.size	.L__unnamed_2, 3

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.12,@object                # @str.12
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.12:
	.asciz	"input\355\214\214\354\235\274 \354\227\264\352\270\260 \354\213\244\355\214\250"
	.size	.Lstr.12, 26

	.type	.Lstr.13,@object                # @str.13
.Lstr.13:
	.asciz	"output\355\214\214\354\235\274 \354\227\264\352\270\260 \354\213\244\355\214\250"
	.size	.Lstr.13, 27

	.type	.Lstr.14,@object                # @str.14
.Lstr.14:
	.asciz	"kernel\355\214\214\354\235\274 \354\227\264\352\270\260 \354\213\244\355\214\250"
	.size	.Lstr.14, 27

	.type	.Lstr.15,@object                # @str.15
.Lstr.15:
	.asciz	"validation complete"
	.size	.Lstr.15, 20

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__Convolution3dPfS_iiiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym Mc
	.addrsig_sym _Z13Convolution3dPfS_iiiiiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13Convolution3dPfS_iiiiiii ; -- Begin function _Z13Convolution3dPfS_iiiiiii
	.globl	_Z13Convolution3dPfS_iiiiiii
	.p2align	8
	.type	_Z13Convolution3dPfS_iiiiiii,@function
_Z13Convolution3dPfS_iiiiiii:           ; @_Z13Convolution3dPfS_iiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[16:19], s[0:1], 0x20
	s_load_b256 s[4:11], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v6, 0x3ff, v0
	v_bfe_u32 v7, v0, 20, 10
	v_mov_b32_e32 v8, 0
	s_mov_b32 s2, exec_lo
	v_lshl_add_u32 v1, s14, 2, v2
	v_lshl_add_u32 v0, s13, 2, v6
	v_lshl_add_u32 v5, s15, 2, v7
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s1, s0, 31
	s_add_i32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s1, s0, 1
	v_subrev_nc_u32_e32 v3, s1, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 -1, v3
	s_cbranch_execz .LBB0_6
; %bb.1:
	v_subrev_nc_u32_e32 v4, s1, v0
	v_cmp_gt_i32_e32 vcc_lo, s8, v3
	v_mov_b32_e32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e64 s0, -1, v4
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB0_5
; %bb.2:
	v_subrev_nc_u32_e32 v9, s1, v5
	v_cmp_gt_i32_e32 vcc_lo, s9, v4
	v_mov_b32_e32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s0, s10, v9
	v_cmp_lt_i32_e64 s1, -1, v9
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_mad_u64_u32 v[10:11], null, v9, s8, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v10, s9, v[4:5]
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[8:9]
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v8, v[3:4], off
.LBB0_4:                                ; %Flow172
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_5:                                ; %Flow173
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_6:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s0, s18, 3
	s_mov_b32 s1, exec_lo
	v_mad_u64_u32 v[3:4], null, s0, v7, v[2:3]
	v_or3_b32 v2, v2, v6, v7
	v_mul_lo_u32 v3, v3, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_lshl_u32 v4, v3, v6, 2
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 4, v2
	s_cbranch_execz .LBB0_17
; %bb.7:                                ; %.preheader110
	s_cmp_lt_i32 s18, 1
	s_cbranch_scc1 .LBB0_14
; %bb.8:                                ; %.preheader109.lr.ph
	v_lshlrev_b32_e32 v2, 2, v6
	s_mul_i32 s0, s0, s0
	s_lshl_b32 s8, s18, 2
	s_mul_i32 s4, s18, s18
	s_lshl_b32 s5, s0, 2
	v_lshl_add_u32 v3, v3, 2, v2
	v_mov_b32_e32 v2, 0
	s_add_i32 s8, s8, 12
	s_mov_b32 s9, 0
	s_mov_b32 s10, 0
.LBB0_9:                                ; %.preheader109
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_10 Depth 2
                                        ;       Child Loop BB0_11 Depth 3
	v_mov_b32_e32 v4, v3
	s_mov_b32 s0, s9
	s_mov_b32 s12, 0
.LBB0_10:                               ; %.preheader
                                        ;   Parent Loop BB0_9 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_11 Depth 3
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, Mc@rel32@lo+4
	s_addc_u32 s3, s3, Mc@rel32@hi+12
	s_ashr_i32 s1, s0, 31
	v_mov_b32_e32 v6, v4
	s_lshl_b64 s[14:15], s[0:1], 2
	s_mov_b32 s1, s18
	s_add_u32 s2, s14, s2
	s_addc_u32 s3, s15, s3
.LBB0_11:                               ;   Parent Loop BB0_9 Depth=1
                                        ;     Parent Loop BB0_10 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_load_b32 s13, s[2:3], 0x0
	ds_load_b32 v7, v6
	s_add_i32 s1, s1, -1
	v_add_nc_u32_e32 v6, 4, v6
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s1, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v2, s13, v7
	s_cbranch_scc0 .LBB0_11
; %bb.12:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_10 Depth=2
	v_add_nc_u32_e32 v4, s8, v4
	s_add_i32 s12, s12, 1
	s_add_i32 s0, s0, s18
	s_cmp_eq_u32 s12, s18
	s_cbranch_scc0 .LBB0_10
; %bb.13:                               ; %._crit_edge115
                                        ;   in Loop: Header=BB0_9 Depth=1
	v_add_nc_u32_e32 v3, s5, v3
	s_add_i32 s10, s10, 1
	s_add_i32 s9, s9, s4
	s_cmp_eq_u32 s10, s18
	s_cbranch_scc0 .LBB0_9
	s_branch .LBB0_15
.LBB0_14:
	v_mov_b32_e32 v2, 0
.LBB0_15:                               ; %._crit_edge119
	v_cmp_gt_i32_e32 vcc_lo, s11, v1
	v_cmp_gt_i32_e64 s0, s16, v0
	v_cmp_gt_i32_e64 s1, s17, v5
	s_barrier
	buffer_gl0_inv
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_17
; %bb.16:
	v_mad_u64_u32 v[3:4], null, v5, s11, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v3, s16, v[0:1]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_17:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13Convolution3dPfS_iiiiiii
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13Convolution3dPfS_iiiiiii, .Lfunc_end0-_Z13Convolution3dPfS_iiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 704
; NumSgprs: 22
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	Mc                      ; @Mc
	.type	Mc,@object
	.section	.bss,"aw",@nobits
	.globl	Mc
	.p2align	4, 0x0
Mc:
	.zero	4096
	.size	Mc, 4096

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym Mc
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 4096
    .kernarg_segment_align: 8
    .kernarg_segment_size: 44
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13Convolution3dPfS_iiiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z13Convolution3dPfS_iiiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
