


extern "C"
__device__ int classify(float* ins, int iniIns, int* attributes, int* isLeaf, int* numbersOfArcs, int* evalTypes, float* vals, int* nodeIndices, int MAX_NUM_ARCS)
{
  int actual = 0;
  while(isLeaf[actual] == 0) //is not a leaf
    {			
      int auxx = actual;
      int att = attributes[actual];			
      float insVal = ins[iniIns +  att]; //the actual value of the attribute for this instance
      //System.out.println("Atributoo: " + att + "vaal :" + insVal);
      for(int i = 0; i < numbersOfArcs[actual]; i++) //traverse each arc
	{
	  int arcIndi = (actual * MAX_NUM_ARCS) + i; //the actual index of the arc
	  float arcVal = vals[arcIndi];				
	  int evType = evalTypes[arcIndi];
	  //System.out.println("aaaarc :" + arcVal + "evvtype" + evType);
	  if(evType == 0)
	    {
	      if(insVal <=  arcVal) //<=
		{			
		  actual = nodeIndices[arcIndi];
		  break;
		}
						
	      else
		{
		  continue;
		}
	    }
	  else if(evType == 1)
	    {
	      if(insVal >  arcVal) // >
		{
		  actual = nodeIndices[arcIndi];
		  break;
		}
	      else
		continue;
	    }
	  else if(evType == 2)
	    {
	      if(insVal ==  arcVal) // =
		{						
		  actual = nodeIndices[arcIndi];
		  break;
		}
	      else
		continue;
	    }									
	}
      if(auxx == actual) //there wasn't an appropiate path, None value found 
	{
	  //System.out.println("Aquí se ciclaría :" + insVal);
	  return 0;
	}
			
    }
  //pack two integers in one using bitwise operations 8388607 possible leaves, 256 possible class values
  int auxPack = isLeaf[actual] << 8; // reserve 1 byte for class value
  return (auxPack | attributes[actual]);  //or bitewise pack
}


extern "C"
__global__ void hilo(float* ins, int insSize, int chunk, int* attributes, int* isLeaf, int* numbersOfArcs, int* evalTypes, float* vals, int* nodeIndices, int MAX_NUM_ARCS, int NIntances, int* res, int* used, int* resHojas)
{
  // Each thread computes one element of C
  // by accumulating results into Cvalue
  int tid = blockIdx.x * blockDim.x + threadIdx.x;
  int i =  tid * chunk; //begin to save index in own slot, i points to the instance index
  int fin = i + chunk;
  int resi = i;
  while(i < NIntances && i < fin)
    {
      int iniIns= i * insSize; 
      int auxPredicted = classify(ins, iniIns, attributes, isLeaf, numbersOfArcs, evalTypes, vals, nodeIndices, MAX_NUM_ARCS); //its necessesary to unpack
      int predicted = auxPredicted & 255; //bitwise unpack
      int actual = ins[iniIns + insSize-1];
      if(predicted != actual) //counter example
	{
	  res[resi] = i; //this index was a counter example
	  resHojas[resi] = auxPredicted >> 8; //unpack leaf index
	  resi++;
        }
      i++;
    }
  //if(tid < NIntances)
    used[tid] =  resi -  (tid * chunk);  //how many results does this thread saved
  
}

//extracts the size needed for the counter examples set, to allocate memory for res
extern "C"
__global__ void  countSize(int* used, int threads, int*  res)
{
  int cont = 0;
  for(int i = 0; i < threads; i++)
    {
      cont += used[i];
    }
  res[0] = cont;
}

/*
Takes the number of results generated by each thread and crates a shrink version
 */
extern "C"
__global__ void  genResult(int* resHuecos, int* resHojas, int* used, int threads, int chunk, int*  res, int* resCounterHojas)
{
  int loc = 0; //the loc in resHuecos
  int resi = 0;
  for(int i = 0; i < threads; i++)
    {
      for(int j = 0; j < used[i]; j++)
	{
	  res[resi] = resHuecos[loc+j];
	  resCounterHojas[resi] = resHojas[loc+j];
	  resi++;
	}
      loc += chunk;
    }
}

//removes counter examples
extern "C"
__global__ void filter(int* counterIndis, float* data, int lenData, int lenIns, float* newData)
{
  int indiCounter = 0;
  int actual = 0;
  int resi = 0;
  for(int i = 0; i < lenData; i++)
    {
      if(i == counterIndis[indiCounter]) //don't copy
	{
	  indiCounter++;
	}
      else //copy the instance
	{
	  for(int j = 0; j < lenIns; j++)
	    {
	      newData[resi+j] = data[actual+j];
	    }
	  resi+=lenIns;
	}
      actual += lenIns;
    }
}

//removes counter examples
extern "C"
__global__ void filterParallel(int* counterIndis, int* used, float* data, int lenData, int lenIns, int chunk, int threads, float* newData)
{
  int tid = blockIdx.x * blockDim.x + threadIdx.x;
  //determine search space
  int iniIndi = 0;
  int iniChunk = tid * chunk;
  if(iniChunk >= lenData) //you can't do anything
    return;
   
  for(int i = 0; i < tid; i++) //how many counter examples do the other thrads found
    {
      iniIndi += used[i];
    }
  // instances before tid minus the counter found multiplied by the len of the instance
    int iniResi = ((tid * chunk) - iniIndi) * lenIns;
  
  // int finIndi = iniIndi+ used[tid];  
  int finChunk = iniChunk + chunk;
  
  int indiCounter = iniIndi;
  int actual = iniChunk * lenIns;
  int resi = iniResi;
  int i = iniChunk;
  while(i < lenData && i < finChunk)
    {
      if(i == counterIndis[indiCounter]) //don't copy
	{
	  indiCounter++;
	}
      else //copy the instance
	{
	  for(int j = 0; j < lenIns; j++)
	    {
	      newData[resi+j] = data[actual+j];
	      //newData[resi+j] = 0.0;
	    }
	  resi+=lenIns;
	}
      actual += lenIns;
      i++;
    }
}

//compute how many counters are per leaf, pos 0 is not used
extern "C"
__global__ void countersForLeaf(int numCounters, int* hojasCounters, int hojas, int*res)
{
  //initialize array
  for(int i = 0; i < hojas; i++)
    {
      res[i] = 0;
    }
  //count counters for each leaf
  for(int i = 0; i < numCounters; i++)
    {
      res[hojasCounters[i]]++;
    }
}

//compute how many counter examples to consider per leaf accoriding to a %
extern "C"
__global__ void countersPerLeaf(int hojas, int* countersInHojas, float percent, int min, int* res, int* count)
{
  count[0] = 0; // to save total number
  for(int i = 0; i < hojas; i++)
    {
      int normal = countersInHojas[i];
      int consider = normal * percent;
      if(consider > min)
	{
	  res[i] = consider;
	  count[0] += consider;
	}
      else
	{
	  res[i] = normal;
	  count[0] += normal;
	}
    }
}

//filters counter examples 
extern "C"
__global__ void filterCounters(int hojas, int numCounters, int* counters, int* hojasCounters, int* countersPerHoja, int* contador, int* res)
{
  //put contador to 0
  for(int i = 0; i < hojas; i++)
    {
      contador[i] = 0;
    }
  //traverse each counter example
  int resi = 0;
  for(int  i = 0; i < numCounters; i++)
    {
      int h = hojasCounters[i];
      if(contador[h] < countersPerHoja[h])
	{
	  res[resi] = counters[i];
	  resi++;
	  contador[h]++;
	}
    }
}

extern "C"
__global__ void calcAcc(float* ins, int insSize, int chunk, int* attributes, int* isLeaf, int* numbersOfArcs, int* evalTypes, float* vals, int* nodeIndices, int MAX_NUM_ARCS, int NIntances, int* res)
{
  // Each thread computes one element of C
  // by accumulating results into Cvalue
  int tid = blockIdx.x * blockDim.x + threadIdx.x;
  int i =  tid * chunk; //begin to save index in own slot, i points to the instance index
  int fin = i + chunk;
  res[tid] = 0; 
  while(i < NIntances && i < fin)
    {
      int iniIns= i * insSize; 
      int auxPredicted = classify(ins, iniIns, attributes, isLeaf, numbersOfArcs, evalTypes, vals, nodeIndices, MAX_NUM_ARCS);
      int predicted = auxPredicted & 255; //bitwise unpack
      int actual = ins[iniIns + insSize-1];
      if(predicted == actual) //correctly classified
	{
	  res[tid] += 1; 
        }
      i++;
    }
  //if(tid < NIntances)
}

//extracts the total sum computed by each thread
extern "C"
__global__ void totalAcc(int* sums, int threads, int* res)
{
  int cont = 0;
  for(int i = 0; i < threads; i++)
    {
      cont += sums[i];
    }
  res[0] = cont;
}

	.file	"tmpxft_002b0507_00000000-6_gpu.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2011:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2011:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	classify
	.type	classify, @function
classify:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2008:
	.size	classify, .-classify
	.globl	_Z52__device_stub__Z4hiloPfiiPiS0_S0_S0_S_S0_iiS0_S0_S0_PfiiPiS0_S0_S0_S_S0_iiS0_S0_S0_
	.type	_Z52__device_stub__Z4hiloPfiiPiS0_S0_S0_S_S0_iiS0_S0_S0_PfiiPiS0_S0_S0_S_S0_iiS0_S0_S0_, @function
_Z52__device_stub__Z4hiloPfiiPiS0_S0_S0_S_S0_iiS0_S0_S0_PfiiPiS0_S0_S0_S_S0_iiS0_S0_S0_:
.LFB2033:
	.cfi_startproc
	endbr64
	subq	$296, %rsp
	.cfi_def_cfa_offset 304
	movq	304(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	120(%rsp), %rdi
	movl	%esi, 84(%rsp)
	leaq	132(%rsp), %rsi
	movq	%rax, 48(%rsp)
	movq	312(%rsp), %rax
	movl	%edx, 80(%rsp)
	leaq	104(%rsp), %rdx
	movq	%rax, 40(%rsp)
	movq	320(%rsp), %rax
	movq	%rcx, 72(%rsp)
	leaq	112(%rsp), %rcx
	movq	%rax, 32(%rsp)
	movq	344(%rsp), %rax
	movq	%r8, 64(%rsp)
	movq	%rax, 24(%rsp)
	movq	352(%rsp), %rax
	movq	%r9, 56(%rsp)
	movq	%rax, 16(%rsp)
	movq	360(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 280(%rsp)
	xorl	%eax, %eax
	leaq	88(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	84(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	328(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	336(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 272(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 120(%rsp)
	movl	$1, 128(%rsp)
	movq	%rax, 132(%rsp)
	movl	$1, 140(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	112(%rsp)
	.cfi_def_cfa_offset 312
	leaq	hilo(%rip), %rdi
	pushq	112(%rsp)
	.cfi_def_cfa_offset 320
	movq	148(%rsp), %rcx
	movl	156(%rsp), %r8d
	movq	136(%rsp), %rsi
	movl	144(%rsp), %edx
	leaq	184(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 312
	popq	%rdx
	.cfi_def_cfa_offset 304
.L4:
	movq	280(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$296, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z52__device_stub__Z4hiloPfiiPiS0_S0_S0_S_S0_iiS0_S0_S0_PfiiPiS0_S0_S0_S_S0_iiS0_S0_S0_, .-_Z52__device_stub__Z4hiloPfiiPiS0_S0_S0_S_S0_iiS0_S0_S0_PfiiPiS0_S0_S0_S_S0_iiS0_S0_S0_
	.globl	hilo
	.type	hilo, @function
hilo:
.LFB2034:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z4hiloPfiiPiS0_S0_S0_S_S0_iiS0_S0_S0_PfiiPiS0_S0_S0_S_S0_iiS0_S0_S0_
	.cfi_endproc
.LFE2034:
	.size	hilo, .-hilo
	.globl	_Z31__device_stub__Z9countSizePiiS_PiiS_
	.type	_Z31__device_stub__Z9countSizePiiS_PiiS_, @function
_Z31__device_stub__Z9countSizePiiS_PiiS_:
.LFB2035:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	countSize(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L10:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z31__device_stub__Z9countSizePiiS_PiiS_, .-_Z31__device_stub__Z9countSizePiiS_PiiS_
	.globl	countSize
	.type	countSize, @function
countSize:
.LFB2036:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9countSizePiiS_PiiS_
	.cfi_endproc
.LFE2036:
	.size	countSize, .-countSize
	.globl	_Z38__device_stub__Z9genResultPiS_S_iiS_S_PiS_S_iiS_S_
	.type	_Z38__device_stub__Z9genResultPiS_S_iiS_S_PiS_S_iiS_S_, @function
_Z38__device_stub__Z9genResultPiS_S_iiS_S_PiS_S_iiS_S_:
.LFB2037:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	genResult(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L15:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2037:
	.size	_Z38__device_stub__Z9genResultPiS_S_iiS_S_PiS_S_iiS_S_, .-_Z38__device_stub__Z9genResultPiS_S_iiS_S_PiS_S_iiS_S_
	.globl	genResult
	.type	genResult, @function
genResult:
.LFB2038:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z9genResultPiS_S_iiS_S_PiS_S_iiS_S_
	.cfi_endproc
.LFE2038:
	.size	genResult, .-genResult
	.globl	_Z32__device_stub__Z6filterPiPfiiS0_PiPfiiS0_
	.type	_Z32__device_stub__Z6filterPiPfiiS0_PiPfiiS0_, @function
_Z32__device_stub__Z6filterPiPfiiS0_PiPfiiS0_:
.LFB2039:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	filter(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L20:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2039:
	.size	_Z32__device_stub__Z6filterPiPfiiS0_PiPfiiS0_, .-_Z32__device_stub__Z6filterPiPfiiS0_PiPfiiS0_
	.globl	filter
	.type	filter, @function
filter:
.LFB2040:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z6filterPiPfiiS0_PiPfiiS0_
	.cfi_endproc
.LFE2040:
	.size	filter, .-filter
	.globl	_Z45__device_stub__Z14filterParallelPiS_PfiiiiS0_PiS_PfiiiiS0_
	.type	_Z45__device_stub__Z14filterParallelPiS_PfiiiiS0_PiS_PfiiiiS0_, @function
_Z45__device_stub__Z14filterParallelPiS_PfiiiiS0_PiS_PfiiiiS0_:
.LFB2041:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	216(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	%rsp, %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	filterParallel(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L25:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2041:
	.size	_Z45__device_stub__Z14filterParallelPiS_PfiiiiS0_PiS_PfiiiiS0_, .-_Z45__device_stub__Z14filterParallelPiS_PfiiiiS0_PiS_PfiiiiS0_
	.globl	filterParallel
	.type	filterParallel, @function
filterParallel:
.LFB2042:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z14filterParallelPiS_PfiiiiS0_PiS_PfiiiiS0_
	.cfi_endproc
.LFE2042:
	.size	filterParallel, .-filterParallel
	.globl	_Z39__device_stub__Z15countersForLeafiPiiS_iPiiS_
	.type	_Z39__device_stub__Z15countersForLeafiPiiS_iPiiS_, @function
_Z39__device_stub__Z15countersForLeafiPiiS_iPiiS_:
.LFB2043:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 24(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	countersForLeaf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L30:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2043:
	.size	_Z39__device_stub__Z15countersForLeafiPiiS_iPiiS_, .-_Z39__device_stub__Z15countersForLeafiPiiS_iPiiS_
	.globl	countersForLeaf
	.type	countersForLeaf, @function
countersForLeaf:
.LFB2044:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z15countersForLeafiPiiS_iPiiS_
	.cfi_endproc
.LFE2044:
	.size	countersForLeaf, .-countersForLeaf
	.globl	_Z42__device_stub__Z15countersPerLeafiPifiS_S_iPifiS_S_
	.type	_Z42__device_stub__Z15countersPerLeafiPifiS_S_iPifiS_S_, @function
_Z42__device_stub__Z15countersPerLeafiPifiS_S_iPifiS_S_:
.LFB2045:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movss	%xmm0, 40(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	countersPerLeaf(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L35:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2045:
	.size	_Z42__device_stub__Z15countersPerLeafiPifiS_S_iPifiS_S_, .-_Z42__device_stub__Z15countersPerLeafiPifiS_S_iPifiS_S_
	.globl	countersPerLeaf
	.type	countersPerLeaf, @function
countersPerLeaf:
.LFB2046:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z15countersPerLeafiPifiS_S_iPifiS_S_
	.cfi_endproc
.LFE2046:
	.size	countersPerLeaf, .-countersPerLeaf
	.globl	_Z44__device_stub__Z14filterCountersiiPiS_S_S_S_iiPiS_S_S_S_
	.type	_Z44__device_stub__Z14filterCountersiiPiS_S_S_S_iiPiS_S_S_S_, @function
_Z44__device_stub__Z14filterCountersiiPiS_S_S_S_iiPiS_S_S_S_:
.LFB2047:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movl	%edi, 44(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	filterCounters(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L40:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2047:
	.size	_Z44__device_stub__Z14filterCountersiiPiS_S_S_S_iiPiS_S_S_S_, .-_Z44__device_stub__Z14filterCountersiiPiS_S_S_S_iiPiS_S_S_S_
	.globl	filterCounters
	.type	filterCounters, @function
filterCounters:
.LFB2048:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z14filterCountersiiPiS_S_S_S_iiPiS_S_S_S_
	.cfi_endproc
.LFE2048:
	.size	filterCounters, .-filterCounters
	.globl	_Z49__device_stub__Z7calcAccPfiiPiS0_S0_S0_S_S0_iiS0_PfiiPiS0_S0_S0_S_S0_iiS0_
	.type	_Z49__device_stub__Z7calcAccPfiiPiS0_S0_S0_S_S0_iiS0_PfiiPiS0_S0_S0_S_S0_iiS0_, @function
_Z49__device_stub__Z7calcAccPfiiPiS0_S0_S0_S_S0_iiS0_PfiiPiS0_S0_S0_S_S0_iiS0_:
.LFB2049:
	.cfi_startproc
	endbr64
	subq	$264, %rsp
	.cfi_def_cfa_offset 272
	movq	272(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	104(%rsp), %rdi
	movl	%esi, 68(%rsp)
	leaq	116(%rsp), %rsi
	movq	%rax, 32(%rsp)
	movq	280(%rsp), %rax
	movl	%edx, 64(%rsp)
	leaq	88(%rsp), %rdx
	movq	%rax, 24(%rsp)
	movq	288(%rsp), %rax
	movq	%rcx, 56(%rsp)
	leaq	96(%rsp), %rcx
	movq	%rax, 16(%rsp)
	movq	312(%rsp), %rax
	movq	%r8, 48(%rsp)
	movq	%r9, 40(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 248(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 112(%rsp)
	movq	%rax, 152(%rsp)
	leaq	68(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	296(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	304(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 240(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 104(%rsp)
	movq	%rax, 116(%rsp)
	movl	$1, 124(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	pushq	96(%rsp)
	.cfi_def_cfa_offset 280
	leaq	calcAcc(%rip), %rdi
	pushq	96(%rsp)
	.cfi_def_cfa_offset 288
	movq	132(%rsp), %rcx
	movl	140(%rsp), %r8d
	movq	120(%rsp), %rsi
	movl	128(%rsp), %edx
	leaq	168(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 280
	popq	%rdx
	.cfi_def_cfa_offset 272
.L45:
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	je	.L47
	call	__stack_chk_fail@PLT
.L47:
	addq	$264, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2049:
	.size	_Z49__device_stub__Z7calcAccPfiiPiS0_S0_S0_S_S0_iiS0_PfiiPiS0_S0_S0_S_S0_iiS0_, .-_Z49__device_stub__Z7calcAccPfiiPiS0_S0_S0_S_S0_iiS0_PfiiPiS0_S0_S0_S_S0_iiS0_
	.globl	calcAcc
	.type	calcAcc, @function
calcAcc:
.LFB2050:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z7calcAccPfiiPiS0_S0_S0_S_S0_iiS0_PfiiPiS0_S0_S0_S_S0_iiS0_
	.cfi_endproc
.LFE2050:
	.size	calcAcc, .-calcAcc
	.globl	_Z30__device_stub__Z8totalAccPiiS_PiiS_
	.type	_Z30__device_stub__Z8totalAccPiiS_PiiS_, @function
_Z30__device_stub__Z8totalAccPiiS_PiiS_:
.LFB2051:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	totalAcc(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L50:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L52
	call	__stack_chk_fail@PLT
.L52:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2051:
	.size	_Z30__device_stub__Z8totalAccPiiS_PiiS_, .-_Z30__device_stub__Z8totalAccPiiS_PiiS_
	.globl	totalAcc
	.type	totalAcc, @function
totalAcc:
.LFB2052:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z8totalAccPiiS_PiiS_
	.cfi_endproc
.LFE2052:
	.size	totalAcc, .-totalAcc
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"totalAcc"
.LC1:
	.string	"calcAcc"
.LC2:
	.string	"filterCounters"
.LC3:
	.string	"countersPerLeaf"
.LC4:
	.string	"countersForLeaf"
.LC5:
	.string	"filterParallel"
.LC6:
	.string	"filter"
.LC7:
	.string	"genResult"
.LC8:
	.string	"countSize"
.LC9:
	.string	"hilo"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	totalAcc(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	movq	%rbx, %rdi
	leaq	calcAcc(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	leaq	filterCounters(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	leaq	countersPerLeaf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	leaq	countersForLeaf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	leaq	filterParallel(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	leaq	filter(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	leaq	genResult(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC8(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	movq	%rdx, %rcx
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	countSize(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	hilo(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2054:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>



extern "C"
__device__ int classify(float* ins, int iniIns, int* attributes, int* isLeaf, int* numbersOfArcs, int* evalTypes, float* vals, int* nodeIndices, int MAX_NUM_ARCS)
{
  int actual = 0;
  while(isLeaf[actual] == 0) //is not a leaf
    {			
      int auxx = actual;
      int att = attributes[actual];			
      float insVal = ins[iniIns +  att]; //the actual value of the attribute for this instance
      //System.out.println("Atributoo: " + att + "vaal :" + insVal);
      for(int i = 0; i < numbersOfArcs[actual]; i++) //traverse each arc
	{
	  int arcIndi = (actual * MAX_NUM_ARCS) + i; //the actual index of the arc
	  float arcVal = vals[arcIndi];				
	  int evType = evalTypes[arcIndi];
	  //System.out.println("aaaarc :" + arcVal + "evvtype" + evType);
	  if(evType == 0)
	    {
	      if(insVal <=  arcVal) //<=
		{			
		  actual = nodeIndices[arcIndi];
		  break;
		}
						
	      else
		{
		  continue;
		}
	    }
	  else if(evType == 1)
	    {
	      if(insVal >  arcVal) // >
		{
		  actual = nodeIndices[arcIndi];
		  break;
		}
	      else
		continue;
	    }
	  else if(evType == 2)
	    {
	      if(insVal ==  arcVal) // =
		{						
		  actual = nodeIndices[arcIndi];
		  break;
		}
	      else
		continue;
	    }									
	}
      if(auxx == actual) //there wasn't an appropiate path, None value found 
	{
	  //System.out.println("Aquí se ciclaría :" + insVal);
	  return 0;
	}
			
    }
  //pack two integers in one using bitwise operations 8388607 possible leaves, 256 possible class values
  int auxPack = isLeaf[actual] << 8; // reserve 1 byte for class value
  return (auxPack | attributes[actual]);  //or bitewise pack
}


extern "C"
__global__ void hilo(float* ins, int insSize, int chunk, int* attributes, int* isLeaf, int* numbersOfArcs, int* evalTypes, float* vals, int* nodeIndices, int MAX_NUM_ARCS, int NIntances, int* res, int* used, int* resHojas)
{
  // Each thread computes one element of C
  // by accumulating results into Cvalue
  int tid = blockIdx.x * blockDim.x + threadIdx.x;
  int i =  tid * chunk; //begin to save index in own slot, i points to the instance index
  int fin = i + chunk;
  int resi = i;
  while(i < NIntances && i < fin)
    {
      int iniIns= i * insSize; 
      int auxPredicted = classify(ins, iniIns, attributes, isLeaf, numbersOfArcs, evalTypes, vals, nodeIndices, MAX_NUM_ARCS); //its necessesary to unpack
      int predicted = auxPredicted & 255; //bitwise unpack
      int actual = ins[iniIns + insSize-1];
      if(predicted != actual) //counter example
	{
	  res[resi] = i; //this index was a counter example
	  resHojas[resi] = auxPredicted >> 8; //unpack leaf index
	  resi++;
        }
      i++;
    }
  //if(tid < NIntances)
    used[tid] =  resi -  (tid * chunk);  //how many results does this thread saved
  
}

//extracts the size needed for the counter examples set, to allocate memory for res
extern "C"
__global__ void  countSize(int* used, int threads, int*  res)
{
  int cont = 0;
  for(int i = 0; i < threads; i++)
    {
      cont += used[i];
    }
  res[0] = cont;
}

/*
Takes the number of results generated by each thread and crates a shrink version
 */
extern "C"
__global__ void  genResult(int* resHuecos, int* resHojas, int* used, int threads, int chunk, int*  res, int* resCounterHojas)
{
  int loc = 0; //the loc in resHuecos
  int resi = 0;
  for(int i = 0; i < threads; i++)
    {
      for(int j = 0; j < used[i]; j++)
	{
	  res[resi] = resHuecos[loc+j];
	  resCounterHojas[resi] = resHojas[loc+j];
	  resi++;
	}
      loc += chunk;
    }
}

//removes counter examples
extern "C"
__global__ void filter(int* counterIndis, float* data, int lenData, int lenIns, float* newData)
{
  int indiCounter = 0;
  int actual = 0;
  int resi = 0;
  for(int i = 0; i < lenData; i++)
    {
      if(i == counterIndis[indiCounter]) //don't copy
	{
	  indiCounter++;
	}
      else //copy the instance
	{
	  for(int j = 0; j < lenIns; j++)
	    {
	      newData[resi+j] = data[actual+j];
	    }
	  resi+=lenIns;
	}
      actual += lenIns;
    }
}

//removes counter examples
extern "C"
__global__ void filterParallel(int* counterIndis, int* used, float* data, int lenData, int lenIns, int chunk, int threads, float* newData)
{
  int tid = blockIdx.x * blockDim.x + threadIdx.x;
  //determine search space
  int iniIndi = 0;
  int iniChunk = tid * chunk;
  if(iniChunk >= lenData) //you can't do anything
    return;
   
  for(int i = 0; i < tid; i++) //how many counter examples do the other thrads found
    {
      iniIndi += used[i];
    }
  // instances before tid minus the counter found multiplied by the len of the instance
    int iniResi = ((tid * chunk) - iniIndi) * lenIns;
  
  // int finIndi = iniIndi+ used[tid];  
  int finChunk = iniChunk + chunk;
  
  int indiCounter = iniIndi;
  int actual = iniChunk * lenIns;
  int resi = iniResi;
  int i = iniChunk;
  while(i < lenData && i < finChunk)
    {
      if(i == counterIndis[indiCounter]) //don't copy
	{
	  indiCounter++;
	}
      else //copy the instance
	{
	  for(int j = 0; j < lenIns; j++)
	    {
	      newData[resi+j] = data[actual+j];
	      //newData[resi+j] = 0.0;
	    }
	  resi+=lenIns;
	}
      actual += lenIns;
      i++;
    }
}

//compute how many counters are per leaf, pos 0 is not used
extern "C"
__global__ void countersForLeaf(int numCounters, int* hojasCounters, int hojas, int*res)
{
  //initialize array
  for(int i = 0; i < hojas; i++)
    {
      res[i] = 0;
    }
  //count counters for each leaf
  for(int i = 0; i < numCounters; i++)
    {
      res[hojasCounters[i]]++;
    }
}

//compute how many counter examples to consider per leaf accoriding to a %
extern "C"
__global__ void countersPerLeaf(int hojas, int* countersInHojas, float percent, int min, int* res, int* count)
{
  count[0] = 0; // to save total number
  for(int i = 0; i < hojas; i++)
    {
      int normal = countersInHojas[i];
      int consider = normal * percent;
      if(consider > min)
	{
	  res[i] = consider;
	  count[0] += consider;
	}
      else
	{
	  res[i] = normal;
	  count[0] += normal;
	}
    }
}

//filters counter examples 
extern "C"
__global__ void filterCounters(int hojas, int numCounters, int* counters, int* hojasCounters, int* countersPerHoja, int* contador, int* res)
{
  //put contador to 0
  for(int i = 0; i < hojas; i++)
    {
      contador[i] = 0;
    }
  //traverse each counter example
  int resi = 0;
  for(int  i = 0; i < numCounters; i++)
    {
      int h = hojasCounters[i];
      if(contador[h] < countersPerHoja[h])
	{
	  res[resi] = counters[i];
	  resi++;
	  contador[h]++;
	}
    }
}

extern "C"
__global__ void calcAcc(float* ins, int insSize, int chunk, int* attributes, int* isLeaf, int* numbersOfArcs, int* evalTypes, float* vals, int* nodeIndices, int MAX_NUM_ARCS, int NIntances, int* res)
{
  // Each thread computes one element of C
  // by accumulating results into Cvalue
  int tid = blockIdx.x * blockDim.x + threadIdx.x;
  int i =  tid * chunk; //begin to save index in own slot, i points to the instance index
  int fin = i + chunk;
  res[tid] = 0; 
  while(i < NIntances && i < fin)
    {
      int iniIns= i * insSize; 
      int auxPredicted = classify(ins, iniIns, attributes, isLeaf, numbersOfArcs, evalTypes, vals, nodeIndices, MAX_NUM_ARCS);
      int predicted = auxPredicted & 255; //bitwise unpack
      int actual = ins[iniIns + insSize-1];
      if(predicted == actual) //correctly classified
	{
	  res[tid] += 1; 
        }
      i++;
    }
  //if(tid < NIntances)
}

//extracts the total sum computed by each thread
extern "C"
__global__ void totalAcc(int* sums, int threads, int* res)
{
  int cont = 0;
  for(int i = 0; i < threads; i++)
    {
      cont += sums[i];
    }
  res[0] = cont;
}

	.text
	.file	"gpu.hip"
	.globl	__device_stub__hilo             # -- Begin function __device_stub__hilo
	.type	__device_stub__hilo,@function
__device_stub__hilo:                    # @__device_stub__hilo
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$hilo, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	__device_stub__hilo, .Lfunc_end0-__device_stub__hilo
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__countSize        # -- Begin function __device_stub__countSize
	.type	__device_stub__countSize,@function
__device_stub__countSize:               # @__device_stub__countSize
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$countSize, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	__device_stub__countSize, .Lfunc_end1-__device_stub__countSize
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__genResult        # -- Begin function __device_stub__genResult
	.type	__device_stub__genResult,@function
__device_stub__genResult:               # @__device_stub__genResult
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$genResult, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	__device_stub__genResult, .Lfunc_end2-__device_stub__genResult
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__filter           # -- Begin function __device_stub__filter
	.type	__device_stub__filter,@function
__device_stub__filter:                  # @__device_stub__filter
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$filter, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	__device_stub__filter, .Lfunc_end3-__device_stub__filter
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__filterParallel   # -- Begin function __device_stub__filterParallel
	.type	__device_stub__filterParallel,@function
__device_stub__filterParallel:          # @__device_stub__filterParallel
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$filterParallel, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	__device_stub__filterParallel, .Lfunc_end4-__device_stub__filterParallel
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__countersForLeaf  # -- Begin function __device_stub__countersForLeaf
	.type	__device_stub__countersForLeaf,@function
__device_stub__countersForLeaf:         # @__device_stub__countersForLeaf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$countersForLeaf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	__device_stub__countersForLeaf, .Lfunc_end5-__device_stub__countersForLeaf
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__countersPerLeaf  # -- Begin function __device_stub__countersPerLeaf
	.type	__device_stub__countersPerLeaf,@function
__device_stub__countersPerLeaf:         # @__device_stub__countersPerLeaf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	16(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	12(%rsp), %r9
	movl	%edx, (%r9)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r9, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$countersPerLeaf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	__device_stub__countersPerLeaf, .Lfunc_end6-__device_stub__countersPerLeaf
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__filterCounters   # -- Begin function __device_stub__filterCounters
	.type	__device_stub__filterCounters,@function
__device_stub__filterCounters:          # @__device_stub__filterCounters
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$filterCounters, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	__device_stub__filterCounters, .Lfunc_end7-__device_stub__filterCounters
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__calcAcc          # -- Begin function __device_stub__calcAcc
	.type	__device_stub__calcAcc,@function
__device_stub__calcAcc:                 # @__device_stub__calcAcc
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$calcAcc, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	__device_stub__calcAcc, .Lfunc_end8-__device_stub__calcAcc
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__totalAcc         # -- Begin function __device_stub__totalAcc
	.type	__device_stub__totalAcc,@function
__device_stub__totalAcc:                # @__device_stub__totalAcc
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$totalAcc, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	__device_stub__totalAcc, .Lfunc_end9-__device_stub__totalAcc
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB10_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB10_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$hilo, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$countSize, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$genResult, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$filter, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$filterParallel, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$countersForLeaf, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$countersPerLeaf, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$filterCounters, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$calcAcc, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$totalAcc, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end10:
	.size	__hip_module_ctor, .Lfunc_end10-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB11_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB11_2:
	retq
.Lfunc_end11:
	.size	__hip_module_dtor, .Lfunc_end11-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	hilo,@object                    # @hilo
	.section	.rodata,"a",@progbits
	.globl	hilo
	.p2align	3, 0x0
hilo:
	.quad	__device_stub__hilo
	.size	hilo, 8

	.type	countSize,@object               # @countSize
	.globl	countSize
	.p2align	3, 0x0
countSize:
	.quad	__device_stub__countSize
	.size	countSize, 8

	.type	genResult,@object               # @genResult
	.globl	genResult
	.p2align	3, 0x0
genResult:
	.quad	__device_stub__genResult
	.size	genResult, 8

	.type	filter,@object                  # @filter
	.globl	filter
	.p2align	3, 0x0
filter:
	.quad	__device_stub__filter
	.size	filter, 8

	.type	filterParallel,@object          # @filterParallel
	.globl	filterParallel
	.p2align	3, 0x0
filterParallel:
	.quad	__device_stub__filterParallel
	.size	filterParallel, 8

	.type	countersForLeaf,@object         # @countersForLeaf
	.globl	countersForLeaf
	.p2align	3, 0x0
countersForLeaf:
	.quad	__device_stub__countersForLeaf
	.size	countersForLeaf, 8

	.type	countersPerLeaf,@object         # @countersPerLeaf
	.globl	countersPerLeaf
	.p2align	3, 0x0
countersPerLeaf:
	.quad	__device_stub__countersPerLeaf
	.size	countersPerLeaf, 8

	.type	filterCounters,@object          # @filterCounters
	.globl	filterCounters
	.p2align	3, 0x0
filterCounters:
	.quad	__device_stub__filterCounters
	.size	filterCounters, 8

	.type	calcAcc,@object                 # @calcAcc
	.globl	calcAcc
	.p2align	3, 0x0
calcAcc:
	.quad	__device_stub__calcAcc
	.size	calcAcc, 8

	.type	totalAcc,@object                # @totalAcc
	.globl	totalAcc
	.p2align	3, 0x0
totalAcc:
	.quad	__device_stub__totalAcc
	.size	totalAcc, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"hilo"
	.size	.L__unnamed_1, 5

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"countSize"
	.size	.L__unnamed_2, 10

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"genResult"
	.size	.L__unnamed_3, 10

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"filter"
	.size	.L__unnamed_4, 7

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"filterParallel"
	.size	.L__unnamed_5, 15

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"countersForLeaf"
	.size	.L__unnamed_6, 16

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"countersPerLeaf"
	.size	.L__unnamed_7, 16

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"filterCounters"
	.size	.L__unnamed_8, 15

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"calcAcc"
	.size	.L__unnamed_9, 8

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"totalAcc"
	.size	.L__unnamed_10, 9

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __device_stub__hilo
	.addrsig_sym __device_stub__countSize
	.addrsig_sym __device_stub__genResult
	.addrsig_sym __device_stub__filter
	.addrsig_sym __device_stub__filterParallel
	.addrsig_sym __device_stub__countersForLeaf
	.addrsig_sym __device_stub__countersPerLeaf
	.addrsig_sym __device_stub__filterCounters
	.addrsig_sym __device_stub__calcAcc
	.addrsig_sym __device_stub__totalAcc
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym hilo
	.addrsig_sym countSize
	.addrsig_sym genResult
	.addrsig_sym filter
	.addrsig_sym filterParallel
	.addrsig_sym countersForLeaf
	.addrsig_sym countersPerLeaf
	.addrsig_sym filterCounters
	.addrsig_sym calcAcc
	.addrsig_sym totalAcc
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	hilo                    ; -- Begin function hilo
	.globl	hilo
	.p2align	8
	.type	hilo,@function
hilo:                                   ; @hilo
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x6c
	s_load_b64 s[16:17], s[0:1], 0x8
	s_load_b64 s[18:19], s[0:1], 0x40
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_clause 0x1
	s_load_b64 s[20:21], s[0:1], 0x58
	s_load_b128 s[12:15], s[0:1], 0x48
	v_mul_lo_u32 v0, v1, s17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v0 :: v_dual_add_nc_u32 v2, s17, v0
	s_mov_b32 s17, exec_lo
	v_min_i32_e32 v2, s19, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v0, v2
	s_cbranch_execz .LBB0_34
; %bb.1:                                ; %.lr.ph.preheader
	s_clause 0x2
	s_load_b64 s[22:23], s[0:1], 0x0
	s_load_b256 s[4:11], s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x30
	v_mov_b32_e32 v10, v0
	v_mov_b32_e32 v3, v0
	s_mov_b32 s26, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s19, s22, -4
	s_addc_u32 s27, s23, -1
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;       Child Loop BB0_6 Depth 3
	v_mul_lo_u32 v11, v10, s16
	v_mov_b32_e32 v6, 0
	s_mov_b32 s28, 0
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr30
                                        ; implicit-def: $sgpr29
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_6 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	s_or_b32 s29, s29, exec_lo
	s_or_b32 s30, s30, exec_lo
	s_mov_b32 s33, exec_lo
                                        ; implicit-def: $sgpr24
	v_lshlrev_b64 v[4:5], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v5, vcc_lo
	global_load_b32 v12, v[7:8], off
                                        ; implicit-def: $vgpr7
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v12
	s_cbranch_execz .LBB0_27
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=2
	v_add_co_u32 v7, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v5, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, 0, v7
	v_mov_b32_e32 v7, v6
	s_and_saveexec_b32 s34, vcc_lo
	s_cbranch_execz .LBB0_26
; %bb.5:                                ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB0_3 Depth=2
	v_add_co_u32 v7, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v5, vcc_lo
	s_mov_b64 s[24:25], 0
	s_mov_b32 s35, 0
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v7, v7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s22, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s23, v8, vcc_lo
	global_load_b32 v13, v[7:8], off
	v_mov_b32_e32 v7, v6
.LBB0_6:                                ; %NodeBlock117
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v8, v7, s18
	s_mov_b32 s37, 0
	s_mov_b32 s36, exec_lo
	v_ashrrev_i32_e32 v9, 31, v8
	v_add_co_u32 v8, vcc_lo, s24, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, s25, v9, vcc_lo
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, s10, v8
	v_add_co_ci_u32_e32 v15, vcc_lo, s11, v9, vcc_lo
	v_add_co_u32 v17, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v18, vcc_lo, s1, v9, vcc_lo
	global_load_b32 v16, v[14:15], off
	global_load_b32 v15, v[17:18], off
                                        ; implicit-def: $vgpr14
	s_waitcnt vmcnt(1)
	v_cmpx_lt_i32_e32 0, v16
	s_xor_b32 s36, exec_lo, s36
	s_cbranch_execz .LBB0_14
; %bb.7:                                ; %NodeBlock
                                        ;   in Loop: Header=BB0_6 Depth=3
	s_mov_b32 s38, exec_lo
                                        ; implicit-def: $vgpr14
	v_cmpx_lt_i32_e32 1, v16
	s_xor_b32 s38, exec_lo, s38
	s_cbranch_execz .LBB0_11
; %bb.8:                                ; %LeafBlock115
                                        ;   in Loop: Header=BB0_6 Depth=3
	v_mov_b32_e32 v14, 0
	s_mov_b32 s39, exec_lo
	v_cmpx_eq_u32_e32 2, v16
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_6 Depth=3
	s_waitcnt vmcnt(0)
	v_cmp_eq_f32_e32 vcc_lo, v13, v15
	v_mov_b32_e32 v14, 6
	s_and_b32 s37, vcc_lo, exec_lo
.LBB0_10:                               ; %Flow125
                                        ;   in Loop: Header=BB0_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s39
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s37, s37, exec_lo
                                        ; implicit-def: $vgpr15
.LBB0_11:                               ; %Flow124
                                        ;   in Loop: Header=BB0_6 Depth=3
	s_and_not1_saveexec_b32 s38, s38
	s_cbranch_execz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_6 Depth=3
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, v13, v15
	s_and_not1_b32 s37, s37, exec_lo
	v_mov_b32_e32 v14, 6
	s_and_b32 s39, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s37, s37, s39
.LBB0_13:                               ; %Flow126
                                        ;   in Loop: Header=BB0_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s38
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s37, s37, exec_lo
                                        ; implicit-def: $vgpr16
                                        ; implicit-def: $vgpr15
.LBB0_14:                               ; %Flow
                                        ;   in Loop: Header=BB0_6 Depth=3
	s_and_not1_saveexec_b32 s36, s36
	s_cbranch_execz .LBB0_18
; %bb.15:                               ; %LeafBlock
                                        ;   in Loop: Header=BB0_6 Depth=3
	v_mov_b32_e32 v14, 0
	s_mov_b32 s38, s37
	s_mov_b32 s39, exec_lo
	v_cmpx_eq_u32_e32 0, v16
	s_cbranch_execz .LBB0_17
; %bb.16:                               ;   in Loop: Header=BB0_6 Depth=3
	s_waitcnt vmcnt(0)
	v_cmp_le_f32_e32 vcc_lo, v13, v15
	v_mov_b32_e32 v14, 6
	s_and_not1_b32 s38, s37, exec_lo
	s_and_b32 s40, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s38, s38, s40
.LBB0_17:                               ; %Flow128
                                        ;   in Loop: Header=BB0_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s39
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s37, s37, exec_lo
	s_and_b32 s38, s38, exec_lo
	s_or_b32 s37, s37, s38
.LBB0_18:                               ; %Flow127
                                        ;   in Loop: Header=BB0_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s36
	s_and_saveexec_b32 s36, s37
	s_cbranch_execz .LBB0_20
; %bb.19:                               ; %.sink.split.i
                                        ;   in Loop: Header=BB0_6 Depth=3
	v_add_co_u32 v7, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v9, vcc_lo
	v_mov_b32_e32 v14, 4
	global_load_b32 v7, v[7:8], off
.LBB0_20:                               ;   in Loop: Header=BB0_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s36
	s_mov_b32 s36, -1
	s_mov_b32 s38, -1
	s_mov_b32 s37, exec_lo
	v_cmpx_gt_i32_e32 6, v14
; %bb.21:                               ; %LeafBlock119
                                        ;   in Loop: Header=BB0_6 Depth=3
	v_cmp_eq_u32_e32 vcc_lo, 0, v14
	s_or_not1_b32 s38, vcc_lo, exec_lo
; %bb.22:                               ; %Flow129
                                        ;   in Loop: Header=BB0_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s37
	s_and_saveexec_b32 s37, s38
	s_cbranch_execz .LBB0_24
; %bb.23:                               ;   in Loop: Header=BB0_6 Depth=3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v8, 31, v7
	s_add_u32 s24, s24, 1
	s_addc_u32 s25, s25, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[7:8]
	v_add_co_u32 v8, vcc_lo, s8, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s24, v8
	s_or_not1_b32 s36, vcc_lo, exec_lo
.LBB0_24:                               ; %Flow130
                                        ;   in Loop: Header=BB0_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s37
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s36, exec_lo, s36
	s_or_b32 s35, s36, s35
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB0_6
; %bb.25:                               ; %Flow131
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s35
.LBB0_26:                               ; %Flow132
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s34
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v6, v7
	s_and_not1_b32 s25, s30, exec_lo
	s_mov_b32 s24, 0
	s_and_not1_b32 s29, s29, exec_lo
	s_and_b32 s30, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s30, s25, s30
.LBB0_27:                               ; %Flow133
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s33
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s25, exec_lo, s30
	v_mov_b32_e32 v8, s24
	s_or_b32 s28, s25, s28
	v_mov_b32_e32 v6, v7
	s_and_not1_b32 s24, s31, exec_lo
	s_and_b32 s25, s29, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s31, s24, s25
	s_and_not1_b32 exec_lo, exec_lo, s28
	s_cbranch_execnz .LBB0_3
; %bb.28:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s28
	s_and_saveexec_b32 s24, s31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s24, exec_lo, s24
	s_cbranch_execz .LBB0_30
; %bb.29:                               ;   in Loop: Header=BB0_2 Depth=1
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_lshl_or_b32 v8, v12, 8, v4
.LBB0_30:                               ; %classify.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s24
	v_add_nc_u32_e32 v4, s16, v11
	s_mov_b32 s24, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s19, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s27, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	v_and_b32_e32 v5, 0xff, v8
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v5, v4
	s_cbranch_execz .LBB0_32
; %bb.31:                               ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v8, 8, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	v_add_nc_u32_e32 v3, 1, v3
	v_add_co_u32 v6, vcc_lo, s12, v4
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s20, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s21, v5, vcc_lo
	global_store_b32 v[6:7], v10, off
	global_store_b32 v[4:5], v8, off
.LBB0_32:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s24
	v_add_nc_u32_e32 v10, 1, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v10, v2
	s_or_b32 s26, vcc_lo, s26
	s_and_not1_b32 exec_lo, exec_lo, s26
	s_cbranch_execnz .LBB0_2
; %bb.33:                               ; %Flow134
	s_or_b32 exec_lo, exec_lo, s26
.LBB0_34:                               ; %Flow135
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s17
	v_ashrrev_i32_e32 v2, 31, v1
	v_sub_nc_u32_e32 v3, v3, v0
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s14, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s15, v2, vcc_lo
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel hilo
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 352
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 41
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	hilo, .Lfunc_end0-hilo
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1224
; NumSgprs: 43
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 43
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	countSize               ; -- Begin function countSize
	.globl	countSize
	.p2align	8
	.type	countSize,@function
countSize:                              ; @countSize
; %bb.0:
	s_load_b32 s5, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB1_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b64 s[2:3], s[0:1], 0x0
	s_mov_b32 s4, 0
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_load_b32 s6, s[2:3], 0x0
	s_add_i32 s5, s5, -1
	s_waitcnt lgkmcnt(0)
	s_add_i32 s4, s6, s4
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc0 .LBB1_2
	s_branch .LBB1_4
.LBB1_3:
	s_mov_b32 s4, 0
.LBB1_4:                                ; %Flow18
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s4
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel countSize
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 7
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	countSize, .Lfunc_end1-countSize
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 120
; NumSgprs: 7
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 7
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	genResult               ; -- Begin function genResult
	.globl	genResult
	.p2align	8
	.type	genResult,@function
genResult:                              ; @genResult
; %bb.0:
	s_load_b64 s[8:9], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s8, 1
	s_cbranch_scc1 .LBB2_7
; %bb.1:                                ; %.preheader.preheader
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[10:11], s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x20
	v_mov_b32_e32 v0, 0
	s_ashr_i32 s15, s9, 31
	s_mov_b32 s14, s9
	s_mov_b32 s13, 0
	s_lshl_b64 s[14:15], s[14:15], 2
	s_mov_b32 s12, s13
	s_mov_b32 s16, s13
.LBB2_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_4 Depth 2
	s_lshl_b64 s[18:19], s[12:13], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s10, s18
	s_addc_u32 s19, s11, s19
	global_load_b32 v1, v0, s[18:19]
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, 1, v1
	s_cbranch_vccnz .LBB2_6
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_ashr_i32 s17, s16, 31
	s_mov_b32 s9, 0
	s_lshl_b64 s[24:25], s[16:17], 2
	s_mov_b64 s[20:21], s[6:7]
	s_add_u32 s22, s0, s24
	s_addc_u32 s23, s1, s25
	s_add_u32 s24, s2, s24
	s_addc_u32 s25, s3, s25
	s_mov_b64 s[26:27], s[4:5]
.LBB2_4:                                ; %.lr.ph
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v1, v0, s[26:27]
	s_add_i32 s9, s9, 1
	s_add_u32 s26, s26, 4
	s_addc_u32 s27, s27, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[22:23]
	global_load_b32 v1, v0, s[20:21]
	s_add_u32 s20, s20, 4
	s_addc_u32 s21, s21, 0
	s_add_u32 s22, s22, 4
	s_addc_u32 s23, s23, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[24:25]
	global_load_b32 v1, v0, s[18:19]
	s_add_u32 s24, s24, 4
	s_addc_u32 s25, s25, 0
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s9, v1
	s_cbranch_vccz .LBB2_4
; %bb.5:                                ; %Flow
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_add_i32 s16, s16, s9
.LBB2_6:                                ; %._crit_edge
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_add_i32 s12, s12, 1
	s_add_u32 s4, s4, s14
	s_addc_u32 s5, s5, s15
	s_add_u32 s6, s6, s14
	s_addc_u32 s7, s7, s15
	s_cmp_eq_u32 s12, s8
	s_cbranch_scc0 .LBB2_2
.LBB2_7:                                ; %._crit_edge32
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel genResult
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	genResult, .Lfunc_end2-genResult
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 288
; NumSgprs: 30
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	filter                  ; -- Begin function filter
	.globl	filter
	.p2align	8
	.type	filter,@function
filter:                                 ; @filter
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB3_10
; %bb.1:                                ; %.lr.ph35
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x18
	s_cmp_gt_i32 s3, 0
	s_mov_b32 s10, s3
	s_cselect_b32 s0, -1, 0
	s_ashr_i32 s11, s3, 31
	v_cndmask_b32_e64 v0, 0, 1, s0
	s_mov_b32 s1, 0
	s_lshl_b64 s[10:11], s[10:11], 2
	s_mov_b32 s14, 0
	s_mov_b32 s12, 0
	v_cmp_ne_u32_e64 s0, 1, v0
	v_mov_b32_e32 v0, 0
.LBB3_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_5 Depth 2
	s_ashr_i32 s13, s12, 31
	s_mov_b32 s15, -1
	s_lshl_b64 s[16:17], s[12:13], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s4, s16
	s_addc_u32 s17, s5, s17
	s_load_b32 s13, s[16:17], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s1, s13
                                        ; implicit-def: $sgpr13
	s_cbranch_scc1 .LBB3_7
; %bb.3:                                ; %.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_6
; %bb.4:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_ashr_i32 s15, s14, 31
	s_mov_b64 s[16:17], s[6:7]
	s_lshl_b64 s[18:19], s[14:15], 2
	s_mov_b32 s13, s3
	s_add_u32 s18, s8, s18
	s_addc_u32 s19, s9, s19
.LBB3_5:                                ; %.lr.ph
                                        ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v1, v0, s[16:17]
	s_add_i32 s13, s13, -1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[18:19]
	s_add_u32 s18, s18, 4
	s_addc_u32 s19, s19, 0
	s_add_u32 s16, s16, 4
	s_addc_u32 s17, s17, 0
	s_cmp_eq_u32 s13, 0
	s_cbranch_scc0 .LBB3_5
.LBB3_6:                                ; %._crit_edge
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_add_i32 s13, s14, s3
	s_mov_b32 s15, 0
.LBB3_7:                                ; %Flow58
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s15
	s_cbranch_vccz .LBB3_9
; %bb.8:                                ;   in Loop: Header=BB3_2 Depth=1
	s_add_i32 s12, s12, 1
	s_mov_b32 s13, s14
.LBB3_9:                                ;   in Loop: Header=BB3_2 Depth=1
	s_add_i32 s1, s1, 1
	s_add_u32 s6, s6, s10
	s_addc_u32 s7, s7, s11
	s_cmp_eq_u32 s1, s2
	s_mov_b32 s14, s13
	s_cbranch_scc0 .LBB3_2
.LBB3_10:                               ; %._crit_edge36
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel filter
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	filter, .Lfunc_end3-filter
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 22
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	filterParallel          ; -- Begin function filterParallel
	.globl	filterParallel
	.p2align	8
	.type	filterParallel,@function
filterParallel:                         ; @filterParallel
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_mul_lo_u32 v10, v1, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s4, v10
	s_cbranch_execz .LBB4_15
; %bb.1:                                ; %.preheader56
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x10
	v_mov_b32_e32 v0, 0
	s_mov_b32 s3, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_i32_e32 0, v1
	s_cbranch_execz .LBB4_5
; %bb.2:                                ; %.lr.ph.preheader
	s_mov_b32 s7, 0
.LBB4_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_load_b32 s14, s[10:11], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s7, s14, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v0, s7 :: v_dual_add_nc_u32 v1, -1, v1
	s_add_u32 s10, s10, 4
	s_addc_u32 s11, s11, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB4_3
; %bb.4:                                ; %Flow107
	s_or_b32 exec_lo, exec_lo, s3
.LBB4_5:                                ; %Flow108
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v1, s6, v10
	v_min_i32_e32 v11, s4, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, v10, v11
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB4_15
; %bb.6:                                ; %.lr.ph68
	v_mul_lo_u32 v1, v10, s5
	s_load_b64 s[2:3], s[0:1], 0x28
	v_sub_nc_u32_e32 v3, v10, v0
	s_cmp_gt_i32 s5, 0
	s_mov_b32 s6, s5
	s_cselect_b32 s1, -1, 0
	s_ashr_i32 s7, s5, 31
	s_mov_b32 s4, 0
	v_ashrrev_i32_e32 v2, 31, v1
	s_lshl_b64 s[6:7], s[6:7], 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_mul_lo_u32 v2, v3, s5
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s12, v4
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
.LBB4_7:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB4_10 Depth 2
	v_ashrrev_i32_e32 v1, 31, v0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[0:1]
	v_add_co_u32 v6, vcc_lo, s8, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
	global_load_b32 v1, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v10, v1
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB4_12
; %bb.8:                                ; %.preheader
                                        ;   in Loop: Header=BB4_7 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB4_11
; %bb.9:                                ; %.lr.ph60.preheader
                                        ;   in Loop: Header=BB4_7 Depth=1
	v_ashrrev_i32_e32 v3, 31, v2
	v_dual_mov_b32 v9, v5 :: v_dual_mov_b32 v8, v4
	s_mov_b32 s10, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_add_co_u32 v6, vcc_lo, s2, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
.LBB4_10:                               ; %.lr.ph60
                                        ;   Parent Loop BB4_7 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v1, v[8:9], off
	v_add_co_u32 v8, vcc_lo, v8, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_add_i32 s10, s10, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s10, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v1, off
	v_add_co_u32 v6, vcc_lo, v6, 4
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_cbranch_scc0 .LBB4_10
.LBB4_11:                               ; %._crit_edge61
                                        ;   in Loop: Header=BB4_7 Depth=1
	v_add_nc_u32_e32 v2, s5, v2
.LBB4_12:                               ; %Flow104
                                        ;   in Loop: Header=BB4_7 Depth=1
	s_and_not1_saveexec_b32 s0, s0
; %bb.13:                               ;   in Loop: Header=BB4_7 Depth=1
	v_add_nc_u32_e32 v0, 1, v0
; %bb.14:                               ;   in Loop: Header=BB4_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v10, 1, v10
	v_add_co_u32 v4, s0, v4, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
	v_cmp_ge_i32_e32 vcc_lo, v10, v11
	s_or_b32 s4, vcc_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB4_7
.LBB4_15:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel filterParallel
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	filterParallel, .Lfunc_end4-filterParallel
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 548
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	countersForLeaf         ; -- Begin function countersForLeaf
	.globl	countersForLeaf
	.p2align	8
	.type	countersForLeaf,@function
countersForLeaf:                        ; @countersForLeaf
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x10
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB5_3
; %bb.1:
	v_mov_b32_e32 v0, 0
	s_mov_b64 s[4:5], s[2:3]
.LBB5_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_add_i32 s6, s6, -1
	global_store_b32 v0, v0, s[4:5]
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc0 .LBB5_2
.LBB5_3:                                ; %.preheader
	s_load_b32 s4, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB5_6
; %bb.4:                                ; %.lr.ph15.preheader
	s_load_b64 s[0:1], s[0:1], 0x8
	v_mov_b32_e32 v0, 0
.LBB5_5:                                ; %.lr.ph15
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b32 v1, v0, s[0:1]
	s_add_i32 s4, s4, -1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s4, 0
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_load_b32 v3, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 1, v3
	global_store_b32 v[1:2], v3, off
	s_cbranch_scc0 .LBB5_5
.LBB5_6:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel countersForLeaf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 7
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	countersForLeaf, .Lfunc_end5-countersForLeaf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 204
; NumSgprs: 9
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 9
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	countersPerLeaf         ; -- Begin function countersPerLeaf
	.globl	countersPerLeaf
	.p2align	8
	.type	countersPerLeaf,@function
countersPerLeaf:                        ; @countersPerLeaf
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x0
	s_load_b128 s[4:7], s[0:1], 0x18
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s8, 1
	global_store_b32 v0, v0, s[6:7]
	s_cbranch_scc1 .LBB6_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b128 s[0:3], s[0:1], 0x8
.LBB6_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b32 v1, v0, s[0:1]
	s_add_i32 s8, s8, -1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, s2, v2
	v_cvt_i32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, s3, v2
	v_cndmask_b32_e32 v1, v1, v2, vcc_lo
	global_store_b32 v0, v1, s[4:5]
	global_load_b32 v2, v0, s[6:7]
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmp_eq_u32 s8, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	global_store_b32 v0, v1, s[6:7]
	s_cbranch_scc0 .LBB6_2
.LBB6_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel countersPerLeaf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 40
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 9
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	countersPerLeaf, .Lfunc_end6-countersPerLeaf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 168
; NumSgprs: 11
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 11
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	filterCounters          ; -- Begin function filterCounters
	.globl	filterCounters
	.p2align	8
	.type	filterCounters,@function
filterCounters:                         ; @filterCounters
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB7_3
; %bb.1:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s12, s10
	s_mov_b32 s13, s11
.LBB7_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_add_i32 s2, s2, -1
	global_store_b32 v0, v0, s[12:13]
	s_add_u32 s12, s12, 4
	s_addc_u32 s13, s13, 0
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc0 .LBB7_2
.LBB7_3:                                ; %.preheader
	s_cmp_lt_i32 s3, 1
	s_cbranch_scc1 .LBB7_8
; %bb.4:                                ; %.lr.ph30.preheader
	s_load_b64 s[0:1], s[0:1], 0x28
	v_mov_b32_e32 v2, 0
	s_mov_b32 s12, 0
.LBB7_5:                                ; %.lr.ph30
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v0, v2, s[6:7]
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	global_load_b32 v5, v[0:1], off
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v5, v3
	s_cbranch_vccnz .LBB7_7
; %bb.6:                                ;   in Loop: Header=BB7_5 Depth=1
	global_load_b32 v3, v2, s[4:5]
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[14:15], s[12:13], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s14, s0, s14
	s_addc_u32 s15, s1, s15
	s_add_i32 s12, s12, 1
	s_waitcnt vmcnt(0)
	global_store_b32 v2, v3, s[14:15]
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 1, v3
	global_store_b32 v[0:1], v3, off
.LBB7_7:                                ;   in Loop: Header=BB7_5 Depth=1
	s_add_i32 s3, s3, -1
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc0 .LBB7_5
.LBB7_8:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel filterCounters
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	filterCounters, .Lfunc_end7-filterCounters
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 292
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	calcAcc                 ; -- Begin function calcAcc
	.globl	calcAcc
	.p2align	8
	.type	calcAcc,@function
calcAcc:                                ; @calcAcc
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x5c
	s_load_b64 s[16:17], s[0:1], 0x8
	v_mov_b32_e32 v8, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_load_b128 s[12:15], s[0:1], 0x40
	s_mov_b32 s2, exec_lo
	v_mul_lo_u32 v6, v1, s17
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_nc_u32_e32 v3, s17, v6
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s14, v0
	v_min_i32_e32 v7, s13, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s15, v1, vcc_lo
	global_store_b32 v[0:1], v8, off
	v_cmpx_lt_i32_e64 v6, v7
	s_cbranch_execz .LBB8_31
; %bb.1:                                ; %.lr.ph.preheader
	s_clause 0x2
	s_load_b64 s[14:15], s[0:1], 0x0
	s_load_b256 s[4:11], s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x30
	s_mov_b32 s20, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s13, s14, -4
	s_addc_u32 s17, s15, -1
.LBB8_2:                                ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB8_3 Depth 2
                                        ;       Child Loop BB8_6 Depth 3
	v_mul_lo_u32 v9, v6, s16
	v_mov_b32_e32 v2, 0
	s_mov_b32 s21, 0
                                        ; implicit-def: $sgpr22
.LBB8_3:                                ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB8_6 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_or_b32 s22, s22, exec_lo
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v5, vcc_lo
	global_load_b32 v3, v[10:11], off
	v_add_co_u32 v10, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v10, v[10:11], off
	s_waitcnt vmcnt(1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
                                        ; implicit-def: $vgpr3
	s_and_saveexec_b32 s23, vcc_lo
	s_cbranch_execz .LBB8_27
; %bb.4:                                ;   in Loop: Header=BB8_3 Depth=2
	v_add_co_u32 v3, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v5, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, 0, v3
	v_mov_b32_e32 v3, v2
	s_and_saveexec_b32 s24, vcc_lo
	s_cbranch_execz .LBB8_26
; %bb.5:                                ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB8_3 Depth=2
	v_add_nc_u32_e32 v3, v10, v9
	s_mov_b64 s[18:19], 0
	s_mov_b32 s25, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s14, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s15, v4, vcc_lo
	global_load_b32 v10, v[3:4], off
	v_mov_b32_e32 v3, v2
.LBB8_6:                                ; %NodeBlock84
                                        ;   Parent Loop BB8_2 Depth=1
                                        ;     Parent Loop BB8_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v3, s12
	s_mov_b32 s27, 0
	s_mov_b32 s26, exec_lo
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_co_u32 v4, vcc_lo, s18, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s19, v5, vcc_lo
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v5, vcc_lo
	v_add_co_u32 v14, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v15, vcc_lo, s1, v5, vcc_lo
	global_load_b32 v13, v[11:12], off
	global_load_b32 v12, v[14:15], off
                                        ; implicit-def: $vgpr11
	s_waitcnt vmcnt(1)
	v_cmpx_lt_i32_e32 0, v13
	s_xor_b32 s26, exec_lo, s26
	s_cbranch_execz .LBB8_14
; %bb.7:                                ; %NodeBlock
                                        ;   in Loop: Header=BB8_6 Depth=3
	s_mov_b32 s28, exec_lo
                                        ; implicit-def: $vgpr11
	v_cmpx_lt_i32_e32 1, v13
	s_xor_b32 s28, exec_lo, s28
	s_cbranch_execz .LBB8_11
; %bb.8:                                ; %LeafBlock82
                                        ;   in Loop: Header=BB8_6 Depth=3
	v_mov_b32_e32 v11, 0
	s_mov_b32 s29, exec_lo
	v_cmpx_eq_u32_e32 2, v13
	s_cbranch_execz .LBB8_10
; %bb.9:                                ;   in Loop: Header=BB8_6 Depth=3
	s_waitcnt vmcnt(0)
	v_cmp_eq_f32_e32 vcc_lo, v10, v12
	v_mov_b32_e32 v11, 6
	s_and_b32 s27, vcc_lo, exec_lo
.LBB8_10:                               ; %Flow91
                                        ;   in Loop: Header=BB8_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s29
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s27, s27, exec_lo
                                        ; implicit-def: $vgpr12
.LBB8_11:                               ; %Flow90
                                        ;   in Loop: Header=BB8_6 Depth=3
	s_and_not1_saveexec_b32 s28, s28
	s_cbranch_execz .LBB8_13
; %bb.12:                               ;   in Loop: Header=BB8_6 Depth=3
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, v10, v12
	s_and_not1_b32 s27, s27, exec_lo
	v_mov_b32_e32 v11, 6
	s_and_b32 s29, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s27, s27, s29
.LBB8_13:                               ; %Flow92
                                        ;   in Loop: Header=BB8_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s28
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s27, s27, exec_lo
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr12
.LBB8_14:                               ; %Flow
                                        ;   in Loop: Header=BB8_6 Depth=3
	s_and_not1_saveexec_b32 s26, s26
	s_cbranch_execz .LBB8_18
; %bb.15:                               ; %LeafBlock
                                        ;   in Loop: Header=BB8_6 Depth=3
	v_mov_b32_e32 v11, 0
	s_mov_b32 s28, s27
	s_mov_b32 s29, exec_lo
	v_cmpx_eq_u32_e32 0, v13
	s_cbranch_execz .LBB8_17
; %bb.16:                               ;   in Loop: Header=BB8_6 Depth=3
	s_waitcnt vmcnt(0)
	v_cmp_le_f32_e32 vcc_lo, v10, v12
	v_mov_b32_e32 v11, 6
	s_and_not1_b32 s28, s27, exec_lo
	s_and_b32 s30, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s28, s28, s30
.LBB8_17:                               ; %Flow94
                                        ;   in Loop: Header=BB8_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s29
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s27, s27, exec_lo
	s_and_b32 s28, s28, exec_lo
	s_or_b32 s27, s27, s28
.LBB8_18:                               ; %Flow93
                                        ;   in Loop: Header=BB8_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s26
	s_and_saveexec_b32 s26, s27
	s_cbranch_execz .LBB8_20
; %bb.19:                               ; %.sink.split.i
                                        ;   in Loop: Header=BB8_6 Depth=3
	v_add_co_u32 v3, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v5, vcc_lo
	v_mov_b32_e32 v11, 4
	global_load_b32 v3, v[3:4], off
.LBB8_20:                               ;   in Loop: Header=BB8_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s26
	s_mov_b32 s26, -1
	s_mov_b32 s28, -1
	s_mov_b32 s27, exec_lo
	v_cmpx_gt_i32_e32 6, v11
; %bb.21:                               ; %LeafBlock86
                                        ;   in Loop: Header=BB8_6 Depth=3
	v_cmp_eq_u32_e32 vcc_lo, 0, v11
	s_or_not1_b32 s28, vcc_lo, exec_lo
; %bb.22:                               ; %Flow95
                                        ;   in Loop: Header=BB8_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s27
	s_and_saveexec_b32 s27, s28
	s_cbranch_execz .LBB8_24
; %bb.23:                               ;   in Loop: Header=BB8_6 Depth=3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v4, 31, v3
	s_add_u32 s18, s18, 1
	s_addc_u32 s19, s19, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	v_add_co_u32 v4, vcc_lo, s8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s18, v4
	s_or_not1_b32 s26, vcc_lo, exec_lo
.LBB8_24:                               ; %Flow96
                                        ;   in Loop: Header=BB8_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s27
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s26, exec_lo, s26
	s_or_b32 s25, s26, s25
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s25
	s_cbranch_execnz .LBB8_6
; %bb.25:                               ; %Flow97
                                        ;   in Loop: Header=BB8_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s25
.LBB8_26:                               ; %Flow98
                                        ;   in Loop: Header=BB8_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s24
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v2, v3
	v_mov_b32_e32 v10, 0
	s_and_not1_b32 s18, s22, exec_lo
	s_and_b32 s19, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s22, s18, s19
.LBB8_27:                               ; %Flow99
                                        ;   in Loop: Header=BB8_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s23
	v_mov_b32_e32 v2, v3
	s_and_b32 s18, exec_lo, s22
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s21, s18, s21
	s_and_not1_b32 exec_lo, exec_lo, s21
	s_cbranch_execnz .LBB8_3
; %bb.28:                               ; %classify.exit
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s21
	v_add_nc_u32_e32 v2, s16, v9
	s_mov_b32 s18, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s13, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, 0xff, v10
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e64 v3, v2
	s_cbranch_execz .LBB8_30
; %bb.29:                               ;   in Loop: Header=BB8_2 Depth=1
	v_add_nc_u32_e32 v8, 1, v8
	global_store_b32 v[0:1], v8, off
.LBB8_30:                               ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	v_add_nc_u32_e32 v6, 1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v6, v7
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB8_2
.LBB8_31:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel calcAcc
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 31
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	calcAcc, .Lfunc_end8-calcAcc
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1048
; NumSgprs: 33
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 33
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	totalAcc                ; -- Begin function totalAcc
	.globl	totalAcc
	.p2align	8
	.type	totalAcc,@function
totalAcc:                               ; @totalAcc
; %bb.0:
	s_load_b32 s5, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB9_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b64 s[2:3], s[0:1], 0x0
	s_mov_b32 s4, 0
.LBB9_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_load_b32 s6, s[2:3], 0x0
	s_add_i32 s5, s5, -1
	s_waitcnt lgkmcnt(0)
	s_add_i32 s4, s6, s4
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc0 .LBB9_2
	s_branch .LBB9_4
.LBB9_3:
	s_mov_b32 s4, 0
.LBB9_4:                                ; %Flow18
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s4
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel totalAcc
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 7
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end9:
	.size	totalAcc, .Lfunc_end9-totalAcc
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 120
; NumSgprs: 7
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 7
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .offset:         64
        .size:           4
        .value_kind:     by_value
      - .offset:         68
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .offset:         96
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         100
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         108
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         110
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         112
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         114
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         116
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         118
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         160
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 352
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           hilo
    .private_segment_fixed_size: 0
    .sgpr_count:     43
    .sgpr_spill_count: 0
    .symbol:         hilo.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           countSize
    .private_segment_fixed_size: 0
    .sgpr_count:     7
    .sgpr_spill_count: 0
    .symbol:         countSize.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 48
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           genResult
    .private_segment_fixed_size: 0
    .sgpr_count:     30
    .sgpr_spill_count: 0
    .symbol:         genResult.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           filter
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         filter.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           filterParallel
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         filterParallel.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           countersForLeaf
    .private_segment_fixed_size: 0
    .sgpr_count:     9
    .sgpr_spill_count: 0
    .symbol:         countersForLeaf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 40
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           countersPerLeaf
    .private_segment_fixed_size: 0
    .sgpr_count:     11
    .sgpr_spill_count: 0
    .symbol:         countersPerLeaf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 48
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           filterCounters
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         filterCounters.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
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      - .offset:         8
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      - .address_space:  global
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        .size:           8
        .value_kind:     global_buffer
      - .offset:         80
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        .value_kind:     hidden_block_count_x
      - .offset:         84
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         88
        .size:           4
        .value_kind:     hidden_block_count_z
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        .size:           2
        .value_kind:     hidden_group_size_x
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        .value_kind:     hidden_group_size_y
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        .value_kind:     hidden_group_size_z
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      - .offset:         144
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 336
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           calcAcc
    .private_segment_fixed_size: 0
    .sgpr_count:     33
    .sgpr_spill_count: 0
    .symbol:         calcAcc.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
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        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
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    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           totalAcc
    .private_segment_fixed_size: 0
    .sgpr_count:     7
    .sgpr_spill_count: 0
    .symbol:         totalAcc.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
