#include <stdio.h>
#include <cuda_runtime.h>
#include <sys/time.h>

double seconds(){
    struct timeval tp;
    struct timezone tzp;
    int i = gettimeofday(&tp,&tzp);
    return ((double)tp.tv_sec+(double)tp.tv_usec*1.e-6);
    }

int recursiveReduce(int *data, int const size){
    // terminate check
    if (size == 1) return data[0];

    // renew stride
    int const stride = size / 2;

    // in-place reduction
    for (int i = 0; i < stride; i++){
        data[i] += data[i+stride];
        }

    return recursiveReduce(data,stride);
    }

// kernel 1
__global__ void reduceNeighbored(int *g_idata, int *g_odata, unsigned int n){
    /*
    Do calculations on each block, save partly reduced result on the series of g_odata.
    After it, sum g_odata up for getting the last result on the host side.
    */
    
    // set thread ID
    unsigned int tid = threadIdx.x;
    unsigned int idx = threadIdx.x + blockDim.x * blockIdx.x;

    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x * blockDim.x;

    // boundary check
    if (idx >= n) return;

    // in-place reduction in global memory on each block
    for (int stride = 1; stride < blockDim.x; stride *= 2){
        if ((tid % (2 * stride)) == 0){
            idata[tid] += idata[tid+stride];
            }
        // synchronize within block
        __syncthreads();
        }

    // write result for this block to global memory
    if (tid == 0) g_odata[blockIdx.x] = idata[0];
    }

// kernel 2
__global__ void reduceNeighboredLess(int *g_idata,int *g_odata,unsigned int n){
    // set threadID
    unsigned int tid = threadIdx.x;
    unsigned int idx = threadIdx.x + blockDim.x * blockIdx.x;

    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x*blockDim.x;

    // boundary check
    if (idx >= n) return;

    // in-place reduction
    for (int stride = 1; stride < blockDim.x; stride *= 2){
        // convert tid into local array index
        int index = 2 * stride * tid;
        if (index < blockDim.x){
            idata[index] += idata[index+stride];
            }
        // synchronize within threadblock
        __syncthreads();
        }
     // write the result for this block to global memory
     if (tid == 0) g_odata[blockIdx.x] = idata[0];
     }

// kernel 3
__global__ void reduceInterleaved (int *g_idata, int *g_odata, unsigned int n){
    // interleaved pair implementation with less divergence
    unsigned int tid = threadIdx.x;
    unsigned int idx = threadIdx.x + blockDim.x * blockIdx.x;
    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x*blockDim.x;
    // boundary check
    if (idx >= n) return;
    // in-place reduction in global memory
    for (int stride = blockDim.x/2; stride > 0; stride >>= 1){
        if (tid < stride) idata[tid] += idata[tid+stride];
        __syncthreads();
        }
    // write result for this block to global memory
    if (tid == 0) g_odata[blockIdx.x] = idata[0];
}

// kernel 4
__global__ void reduceUnrolling2(int *g_idata,int *g_odata, unsigned int n){
    // set thread ID, one threadblock operates on two datablocks
    // so that blockidx * 2 * blockdim.x
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x * 2 + threadIdx.x;    
    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x * blockDim.x * 2;
    // unrolling 2 data blocks, add data from an adjacent data block
    if (idx + blockDim.x < n) g_idata[idx] += g_idata[idx+blockDim.x];
    __syncthreads();
    // inplace reduction in global memory
    for (int stride = blockDim.x / 2; stride > 0; stride >>= 1){
        if (tid < stride){
            idata[tid] += idata[tid+stride];
            }
        // synchronize within threadBlock
        __syncthreads();
        }
    // write result for this block to global memory
    if (tid ==0) g_odata[blockIdx.x] = idata[0];
    }

// kernel 5
__global__ void reduceUnrolling4(int *g_idata,int *g_odata,unsigned int n){
    // set threadId, one threadBlock operates on four dataBlocks
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x * 4 + threadIdx.x;
    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x * blockDim.x * 4;
    // unrolling 4 data blocks
    if (idx + 3 * blockDim.x < n){
        int a1 = g_idata[idx];
        int a2 = g_idata[idx + blockDim.x];
        int a3 = g_idata[idx + blockDim.x * 2];
        int a4 = g_idata[idx + blockDim.x * 3];
        g_idata[idx] = a1 + a2 + a3 + a4;
        }
    __syncthreads();
    // in-place reduction in global memory
    for (int stride = blockDim.x / 2; stride > 0; stride >>= 1){
        if (tid < stride){
            idata[tid] += idata[tid+stride];
            }
        __syncthreads();
        }
    if (tid == 0) g_odata[blockIdx.x] = idata[0];
    }

// kernel 6
__global__ void reduceUnrollWarps4(int *g_idata,int *g_odata,unsigned int n){
    // set threadId, one threadBlock operates on four dataBlocks
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x * 4 + threadIdx.x;
    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x * blockDim.x * 4;
    // unrolling 4 data blocks
    if (idx + 3 * blockDim.x < n){
        int a1 = g_idata[idx];
        int a2 = g_idata[idx + blockDim.x];
        int a3 = g_idata[idx + blockDim.x * 2];
        int a4 = g_idata[idx + blockDim.x * 3];
        g_idata[idx] = a1 + a2 + a3 + a4;
        }
    __syncthreads();
    // in-place reduction in global memory
    for (int stride = blockDim.x / 2; stride > 32; stride >>= 1){
        if (tid < stride){
            idata[tid] += idata[tid+stride];
            }
        __syncthreads();
        }

    // unrolling warp
    if (tid <32){
        volatile int *vmem = idata;
        vmem[tid] += vmem[tid+32];
        vmem[tid] += vmem[tid+16];
        vmem[tid] += vmem[tid+8];
        vmem[tid] += vmem[tid+4];
        vmem[tid] += vmem[tid+2];
        vmem[tid] += vmem[tid+1];
        }

    if (tid == 0) g_odata[blockIdx.x] = idata[0];
    }

// kernel 7
__global__ void reduceCompleteUnrollWarps4(int *g_idata, int *g_odata, unsigned int n){
    // set threadId
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x * 4 + threadIdx.x;
    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x * blockDim.x * 4;
    // unrolling 4
    if (idx + 3*blockDim.x < n){
        int a1 = g_idata[idx];
        int a2 = g_idata[idx+blockDim.x];
        int a3 = g_idata[idx+2*blockDim.x];
        int a4 = g_idata[idx+3*blockDim.x];
        g_idata[idx] = a1+a2+a3+a4;
        }
    __syncthreads();
    // in-place reduction and complete unroll
    if (blockDim.x>=1024 && tid < 512) idata[tid] += idata[tid+512];
    __syncthreads();
    if (blockDim.x>=512 && tid < 256)  idata[tid] += idata[tid+256];
    __syncthreads();
    if (blockDim.x>=256 && tid < 128)  idata[tid] += idata[tid+128];
    __syncthreads();
    if (blockDim.x>=128 && tid < 64)   idata[tid] += idata[tid+64];
    __syncthreads();
    // unrolling warp
    if (tid < 32) {
        volatile int *vsmem = idata;
        vsmem[tid] += vsmem[tid+32];
        vsmem[tid] += vsmem[tid+16];
        vsmem[tid] += vsmem[tid+ 8];
        vsmem[tid] += vsmem[tid+ 4];
        vsmem[tid] += vsmem[tid+ 2];
        vsmem[tid] += vsmem[tid+ 1];
        }
    // write result
    if (tid == 0) g_odata[blockIdx.x] = idata[0];
    }


template <unsigned int iBlockSize>
__global__ void reduceCompleteUnroll(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x * 4 + threadIdx.x;
    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x * blockDim.x * 4;
    // unrolling 4
    if (idx + 3 * blockDim.x < n){
        int a1 = g_idata[idx];
        int a2 = g_idata[idx + blockDim.x];
        int a3 = g_idata[idx + blockDim.x * 2];
        int a4 = g_idata[idx + blockDim.x * 3];
        g_idata[idx] = a1 + a2 + a3 + a4;
        }
    __syncthreads(); 
    // in-place reduction and complete unroll
    if (iBlockSize>=1024 && tid < 512) idata[tid] += idata[tid+512];
    __syncthreads();
    if (iBlockSize>=512 && tid < 256)  idata[tid] += idata[tid+256];
    __syncthreads();
    if (iBlockSize>=256 && tid < 128)  idata[tid] += idata[tid+128];
    __syncthreads();
    if (iBlockSize>=128 && tid < 64)   idata[tid] += idata[tid+64];
    __syncthreads();
    // unrolling warp
    if (tid < 32) {
        volatile int *vsmem = idata;
        vsmem[tid] += vsmem[tid+32];
        vsmem[tid] += vsmem[tid+16];
        vsmem[tid] += vsmem[tid+ 8];
        vsmem[tid] += vsmem[tid+ 4];
        vsmem[tid] += vsmem[tid+ 2];
        vsmem[tid] += vsmem[tid+ 1];
        }
    // write result
    if (tid == 0) g_odata[blockIdx.x] = idata[0];
    }

int main(int argc, char** argv){
    // set up device
    int dev = 0;
    cudaDeviceProp deviceProp;
    cudaGetDeviceProperties(&deviceProp,dev);
    printf("%s starting reduction at ",argv[0]);
    printf("device %d: %s ",dev,deviceProp.name);
    cudaSetDevice(dev);

    bool bResult = false;

    // initialization
    int size = 1 << 24; // total number of elementse to reduce
    printf("reduce with array size %d ",size);

    // execution configuration
    int blocksize = 512;
    if (argc > 1) blocksize = atoi(argv[1]);
    
    dim3 block(blocksize,1);
    dim3 grid ((size+block.x-1)/block.x,1);
    printf("grid %d block %d\n",grid.x,block.x);
    
    // allocate host memory
    size_t bytes = size * sizeof(int);
    int *h_idata = (int *) malloc(bytes);
    int *h_odata = (int *) malloc(grid.x*sizeof(int));
    int *tmp     = (int *) malloc(bytes);

    // initialize the array
    for (int i = 0; i <size; i++){
        // mask off high 2 bytes to force max number to 255
        h_idata[i] = (int)(rand() & 0xFF);
        }
    memcpy(tmp,h_idata,bytes);
    
    double iStart,iElaps;
    int gpu_sum = 0;

    // allocate device memory
    int *d_idata = NULL;
    int *d_odata = NULL;
    cudaMalloc((void **) &d_idata,bytes);
    cudaMalloc((void **) &d_odata,grid.x*sizeof(int));

    // cpu reduction
    iStart = seconds();
    int cpu_sum = recursiveReduce(tmp,size);
    iElaps = seconds() - iStart;
    printf("cpu reduce elapsed %f sec cpu_sum: %d \n",iElaps,cpu_sum);

    // kernel 1: reduceNeighbored
    cudaMemcpy(d_idata,h_idata,bytes,cudaMemcpyHostToDevice);
    cudaDeviceSynchronize();
    iStart = seconds();
    reduceNeighbored<<<grid,block>>>(d_idata,d_odata,size);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    cudaMemcpy(h_odata,d_odata,grid.x * sizeof(int),cudaMemcpyDeviceToHost);
    for (int i=0; i <grid.x; i++) gpu_sum += h_odata[i];
    printf("gpu Neighbored elapsed %f sec gpu_sum: %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x,block.x);
    
    // kernel 2: reduceNeighbored with less divergence
    cudaMemcpy(d_idata,h_idata,bytes,cudaMemcpyHostToDevice);
    cudaDeviceSynchronize();
    iStart = seconds();
    reduceNeighboredLess<<<grid,block>>>(d_idata,d_odata,size);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    cudaMemcpy(h_odata,d_odata,grid.x * sizeof(int),cudaMemcpyDeviceToHost);
    gpu_sum = 0;
    for(int i = 0;i<grid.x;i++) gpu_sum += h_odata[i];
    printf("gpu Neighbored2 elapsed %f sec gpu_sum: %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x,block.x);
    
    // kernel 3: reduceInterleaved
    cudaMemcpy(d_idata,h_idata,bytes,cudaMemcpyHostToDevice);
    cudaDeviceSynchronize();
    iStart = seconds();
    reduceInterleaved<<<grid,block>>>(d_idata,d_odata,size);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    cudaMemcpy(h_odata,d_odata,grid.x*sizeof(int),cudaMemcpyDeviceToHost);
    gpu_sum = 0;
    for(int i=0;i<grid.x;i++) gpu_sum += h_odata[i];
    printf("gpu Interleaved elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x,block.x);
    
    // kernel 4: reduceUnrolling2
    cudaMemcpy(d_idata,h_idata,bytes,cudaMemcpyHostToDevice);
    cudaDeviceSynchronize();
    iStart = seconds();
    reduceUnrolling2<<<grid.x/2,block>>>(d_idata,d_odata,size);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    cudaMemcpy(h_odata,d_odata,(grid.x/2)*sizeof(int),cudaMemcpyDeviceToHost);
    gpu_sum = 0;
    for(int i=0;i<grid.x/2;i++) gpu_sum += h_odata[i];
    printf("gpu Unrolling2 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x/2,block.x);
    
    // kernel 5: reduceUnrolling4
    cudaMemcpy(d_idata,h_idata,bytes,cudaMemcpyHostToDevice);
    cudaDeviceSynchronize();
    iStart = seconds();
    reduceUnrolling4<<<grid.x/4,block>>>(d_idata,d_odata,size);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    cudaMemcpy(h_odata,d_odata,(grid.x/4)*sizeof(int),cudaMemcpyDeviceToHost);
    gpu_sum = 0;
    for(int i=0;i<grid.x/4;i++) gpu_sum += h_odata[i];
    printf("gpu Unrolling4 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x/4,block.x);
    
    // kernel 6: reduceUnrollWarps4
    cudaMemcpy(d_idata,h_idata,bytes,cudaMemcpyHostToDevice);
    cudaDeviceSynchronize();
    iStart = seconds();
    reduceUnrollWarps4<<<grid.x/4,block>>>(d_idata,d_odata,size);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    cudaMemcpy(h_odata,d_odata,(grid.x/4)*sizeof(int),cudaMemcpyDeviceToHost);
    gpu_sum = 0;
    for(int i=0;i<grid.x/4;i++) gpu_sum += h_odata[i];
    printf("gpu UnrollWarps4 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x/4,block.x);
    
    // kernel 7: reduceCompleteUnrollWarps4
    cudaMemcpy(d_idata,h_idata,bytes,cudaMemcpyHostToDevice);
    cudaDeviceSynchronize();
    iStart = seconds();
    reduceCompleteUnrollWarps4<<<grid.x/4,block>>>(d_idata,d_odata,size);
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    cudaMemcpy(h_odata,d_odata,(grid.x/4)*sizeof(int),cudaMemcpyDeviceToHost);
    gpu_sum = 0;
    for(int i=0;i<grid.x/4;i++) gpu_sum += h_odata[i];
    printf("gpu CompleteUnrollWarps4 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x/4,block.x);
    
    // kernel 8: reduceCompleteUnroll (template function)
    cudaMemcpy(d_idata,h_idata,bytes,cudaMemcpyHostToDevice);
    cudaDeviceSynchronize();
    iStart = seconds();
    switch (blocksize)
    {
    case 1024:
        reduceCompleteUnroll<1024><<<grid.x/4,block>>>(d_idata,d_odata,size);
        break;
    case 512:
        reduceCompleteUnroll<512><<<grid.x/4,block>>>(d_idata,d_odata,size);
        break;
    case 256:
        reduceCompleteUnroll<256><<<grid.x/4,block>>>(d_idata,d_odata,size);
        break;
    case 128:
        reduceCompleteUnroll<128><<<grid.x/4,block>>>(d_idata,d_odata,size);
        break;
    case 64:
        reduceCompleteUnroll<64><<<grid.x/4,block>>>(d_idata,d_odata,size);
        break;
    }
    cudaDeviceSynchronize();
    iElaps = seconds() - iStart;
    cudaMemcpy(h_odata,d_odata,(grid.x/4)*sizeof(int),cudaMemcpyDeviceToHost);
    gpu_sum = 0;
    for(int i=0;i<grid.x/4;i++) gpu_sum += h_odata[i];
    printf("gpu CompleteUnroll<template> elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x/4,block.x);


    free(h_idata);
    free(h_odata);
    cudaFree(d_idata);
    cudaFree(d_odata);

    cudaDeviceReset();
    

    // check the results
    bResult = (gpu_sum == cpu_sum);
    if (!bResult) printf("Test Failed!\n");
    return EXIT_SUCCESS;
    }







	.file	"tmpxft_003b7e00_00000000-6_reduceInteger.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function
_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0:
.LFB2202:
	.cfi_startproc
	jmp	cudaLaunchKernel@PLT
	.cfi_endproc
.LFE2202:
	.size	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	.type	_ZL52__device_stub__Z20reduceCompleteUnrollILj64EEvPiS0_jPiS_j, @function
_ZL52__device_stub__Z20reduceCompleteUnrollILj64EEvPiS0_jPiS_j:
.LFB2078:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20reduceCompleteUnrollILj64EEvPiS0_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L3:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2078:
	.size	_ZL52__device_stub__Z20reduceCompleteUnrollILj64EEvPiS0_jPiS_j, .-_ZL52__device_stub__Z20reduceCompleteUnrollILj64EEvPiS0_jPiS_j
	.type	_ZL53__device_stub__Z20reduceCompleteUnrollILj128EEvPiS0_jPiS_j, @function
_ZL53__device_stub__Z20reduceCompleteUnrollILj128EEvPiS0_jPiS_j:
.LFB2076:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20reduceCompleteUnrollILj128EEvPiS0_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2076:
	.size	_ZL53__device_stub__Z20reduceCompleteUnrollILj128EEvPiS0_jPiS_j, .-_ZL53__device_stub__Z20reduceCompleteUnrollILj128EEvPiS0_jPiS_j
	.type	_ZL53__device_stub__Z20reduceCompleteUnrollILj256EEvPiS0_jPiS_j, @function
_ZL53__device_stub__Z20reduceCompleteUnrollILj256EEvPiS0_jPiS_j:
.LFB2074:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20reduceCompleteUnrollILj256EEvPiS0_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L12:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2074:
	.size	_ZL53__device_stub__Z20reduceCompleteUnrollILj256EEvPiS0_jPiS_j, .-_ZL53__device_stub__Z20reduceCompleteUnrollILj256EEvPiS0_jPiS_j
	.type	_ZL53__device_stub__Z20reduceCompleteUnrollILj512EEvPiS0_jPiS_j, @function
_ZL53__device_stub__Z20reduceCompleteUnrollILj512EEvPiS0_jPiS_j:
.LFB2072:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20reduceCompleteUnrollILj512EEvPiS0_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L16:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2072:
	.size	_ZL53__device_stub__Z20reduceCompleteUnrollILj512EEvPiS0_jPiS_j, .-_ZL53__device_stub__Z20reduceCompleteUnrollILj512EEvPiS0_jPiS_j
	.type	_ZL54__device_stub__Z20reduceCompleteUnrollILj1024EEvPiS0_jPiS_j, @function
_ZL54__device_stub__Z20reduceCompleteUnrollILj1024EEvPiS0_jPiS_j:
.LFB2070:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20reduceCompleteUnrollILj1024EEvPiS0_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L20:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2070:
	.size	_ZL54__device_stub__Z20reduceCompleteUnrollILj1024EEvPiS0_jPiS_j, .-_ZL54__device_stub__Z20reduceCompleteUnrollILj1024EEvPiS0_jPiS_j
	.section	.text._Z20reduceCompleteUnrollILj64EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj64EEvPiS0_j,comdat
	.weak	_Z20reduceCompleteUnrollILj64EEvPiS0_j
	.type	_Z20reduceCompleteUnrollILj64EEvPiS0_j, @function
_Z20reduceCompleteUnrollILj64EEvPiS0_j:
.LFB2131:
	.cfi_startproc
	endbr64
	jmp	_ZL52__device_stub__Z20reduceCompleteUnrollILj64EEvPiS0_jPiS_j
	.cfi_endproc
.LFE2131:
	.size	_Z20reduceCompleteUnrollILj64EEvPiS0_j, .-_Z20reduceCompleteUnrollILj64EEvPiS0_j
	.section	.text._Z20reduceCompleteUnrollILj1024EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj1024EEvPiS0_j,comdat
	.weak	_Z20reduceCompleteUnrollILj1024EEvPiS0_j
	.type	_Z20reduceCompleteUnrollILj1024EEvPiS0_j, @function
_Z20reduceCompleteUnrollILj1024EEvPiS0_j:
.LFB2127:
	.cfi_startproc
	endbr64
	jmp	_ZL54__device_stub__Z20reduceCompleteUnrollILj1024EEvPiS0_jPiS_j
	.cfi_endproc
.LFE2127:
	.size	_Z20reduceCompleteUnrollILj1024EEvPiS0_j, .-_Z20reduceCompleteUnrollILj1024EEvPiS0_j
	.section	.text._Z20reduceCompleteUnrollILj512EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj512EEvPiS0_j,comdat
	.weak	_Z20reduceCompleteUnrollILj512EEvPiS0_j
	.type	_Z20reduceCompleteUnrollILj512EEvPiS0_j, @function
_Z20reduceCompleteUnrollILj512EEvPiS0_j:
.LFB2128:
	.cfi_startproc
	endbr64
	jmp	_ZL53__device_stub__Z20reduceCompleteUnrollILj512EEvPiS0_jPiS_j
	.cfi_endproc
.LFE2128:
	.size	_Z20reduceCompleteUnrollILj512EEvPiS0_j, .-_Z20reduceCompleteUnrollILj512EEvPiS0_j
	.section	.text._Z20reduceCompleteUnrollILj256EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj256EEvPiS0_j,comdat
	.weak	_Z20reduceCompleteUnrollILj256EEvPiS0_j
	.type	_Z20reduceCompleteUnrollILj256EEvPiS0_j, @function
_Z20reduceCompleteUnrollILj256EEvPiS0_j:
.LFB2129:
	.cfi_startproc
	endbr64
	jmp	_ZL53__device_stub__Z20reduceCompleteUnrollILj256EEvPiS0_jPiS_j
	.cfi_endproc
.LFE2129:
	.size	_Z20reduceCompleteUnrollILj256EEvPiS0_j, .-_Z20reduceCompleteUnrollILj256EEvPiS0_j
	.section	.text._Z20reduceCompleteUnrollILj128EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj128EEvPiS0_j,comdat
	.weak	_Z20reduceCompleteUnrollILj128EEvPiS0_j
	.type	_Z20reduceCompleteUnrollILj128EEvPiS0_j, @function
_Z20reduceCompleteUnrollILj128EEvPiS0_j:
.LFB2130:
	.cfi_startproc
	endbr64
	jmp	_ZL53__device_stub__Z20reduceCompleteUnrollILj128EEvPiS0_jPiS_j
	.cfi_endproc
.LFE2130:
	.size	_Z20reduceCompleteUnrollILj128EEvPiS0_j, .-_Z20reduceCompleteUnrollILj128EEvPiS0_j
	.text
	.globl	_Z7secondsv
	.type	_Z7secondsv, @function
_Z7secondsv:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC0(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z7secondsv, .-_Z7secondsv
	.globl	_Z15recursiveReducePii
	.type	_Z15recursiveReducePii, @function
_Z15recursiveReducePii:
.LFB2028:
	.cfi_startproc
	endbr64
	movl	$2, %ecx
.L36:
	cmpl	$1, %esi
	je	.L38
	movl	%esi, %eax
	cltd
	idivl	%ecx
	movslq	%eax, %rdx
	movq	%rdx, %rsi
	leaq	(%rdi,%rdx,4), %r8
	xorl	%edx, %edx
.L34:
	cmpl	%edx, %eax
	jle	.L36
	movl	(%r8,%rdx,4), %r9d
	addl	%r9d, (%rdi,%rdx,4)
	incq	%rdx
	jmp	.L34
.L38:
	movl	(%rdi), %eax
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z15recursiveReducePii, .-_Z15recursiveReducePii
	.globl	_Z39__device_stub__Z16reduceNeighboredPiS_jPiS_j
	.type	_Z39__device_stub__Z16reduceNeighboredPiS_jPiS_j, @function
_Z39__device_stub__Z16reduceNeighboredPiS_jPiS_j:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z16reduceNeighboredPiS_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L39:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
	call	__stack_chk_fail@PLT
.L41:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z39__device_stub__Z16reduceNeighboredPiS_jPiS_j, .-_Z39__device_stub__Z16reduceNeighboredPiS_jPiS_j
	.globl	_Z16reduceNeighboredPiS_j
	.type	_Z16reduceNeighboredPiS_j, @function
_Z16reduceNeighboredPiS_j:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16reduceNeighboredPiS_jPiS_j
	.cfi_endproc
.LFE2057:
	.size	_Z16reduceNeighboredPiS_j, .-_Z16reduceNeighboredPiS_j
	.globl	_Z43__device_stub__Z20reduceNeighboredLessPiS_jPiS_j
	.type	_Z43__device_stub__Z20reduceNeighboredLessPiS_jPiS_j, @function
_Z43__device_stub__Z20reduceNeighboredLessPiS_jPiS_j:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20reduceNeighboredLessPiS_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L44:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z43__device_stub__Z20reduceNeighboredLessPiS_jPiS_j, .-_Z43__device_stub__Z20reduceNeighboredLessPiS_jPiS_j
	.globl	_Z20reduceNeighboredLessPiS_j
	.type	_Z20reduceNeighboredLessPiS_j, @function
_Z20reduceNeighboredLessPiS_j:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z20reduceNeighboredLessPiS_jPiS_j
	.cfi_endproc
.LFE2059:
	.size	_Z20reduceNeighboredLessPiS_j, .-_Z20reduceNeighboredLessPiS_j
	.globl	_Z40__device_stub__Z17reduceInterleavedPiS_jPiS_j
	.type	_Z40__device_stub__Z17reduceInterleavedPiS_jPiS_j, @function
_Z40__device_stub__Z17reduceInterleavedPiS_jPiS_j:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17reduceInterleavedPiS_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L49:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z40__device_stub__Z17reduceInterleavedPiS_jPiS_j, .-_Z40__device_stub__Z17reduceInterleavedPiS_jPiS_j
	.globl	_Z17reduceInterleavedPiS_j
	.type	_Z17reduceInterleavedPiS_j, @function
_Z17reduceInterleavedPiS_j:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z17reduceInterleavedPiS_jPiS_j
	.cfi_endproc
.LFE2061:
	.size	_Z17reduceInterleavedPiS_j, .-_Z17reduceInterleavedPiS_j
	.globl	_Z39__device_stub__Z16reduceUnrolling2PiS_jPiS_j
	.type	_Z39__device_stub__Z16reduceUnrolling2PiS_jPiS_j, @function
_Z39__device_stub__Z16reduceUnrolling2PiS_jPiS_j:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z16reduceUnrolling2PiS_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L54:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L56
	call	__stack_chk_fail@PLT
.L56:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z39__device_stub__Z16reduceUnrolling2PiS_jPiS_j, .-_Z39__device_stub__Z16reduceUnrolling2PiS_jPiS_j
	.globl	_Z16reduceUnrolling2PiS_j
	.type	_Z16reduceUnrolling2PiS_j, @function
_Z16reduceUnrolling2PiS_j:
.LFB2063:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16reduceUnrolling2PiS_jPiS_j
	.cfi_endproc
.LFE2063:
	.size	_Z16reduceUnrolling2PiS_j, .-_Z16reduceUnrolling2PiS_j
	.globl	_Z39__device_stub__Z16reduceUnrolling4PiS_jPiS_j
	.type	_Z39__device_stub__Z16reduceUnrolling4PiS_jPiS_j, @function
_Z39__device_stub__Z16reduceUnrolling4PiS_jPiS_j:
.LFB2064:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z16reduceUnrolling4PiS_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L59:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L61
	call	__stack_chk_fail@PLT
.L61:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2064:
	.size	_Z39__device_stub__Z16reduceUnrolling4PiS_jPiS_j, .-_Z39__device_stub__Z16reduceUnrolling4PiS_jPiS_j
	.globl	_Z16reduceUnrolling4PiS_j
	.type	_Z16reduceUnrolling4PiS_j, @function
_Z16reduceUnrolling4PiS_j:
.LFB2065:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16reduceUnrolling4PiS_jPiS_j
	.cfi_endproc
.LFE2065:
	.size	_Z16reduceUnrolling4PiS_j, .-_Z16reduceUnrolling4PiS_j
	.globl	_Z41__device_stub__Z18reduceUnrollWarps4PiS_jPiS_j
	.type	_Z41__device_stub__Z18reduceUnrollWarps4PiS_jPiS_j, @function
_Z41__device_stub__Z18reduceUnrollWarps4PiS_jPiS_j:
.LFB2066:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18reduceUnrollWarps4PiS_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L64:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L66
	call	__stack_chk_fail@PLT
.L66:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2066:
	.size	_Z41__device_stub__Z18reduceUnrollWarps4PiS_jPiS_j, .-_Z41__device_stub__Z18reduceUnrollWarps4PiS_jPiS_j
	.globl	_Z18reduceUnrollWarps4PiS_j
	.type	_Z18reduceUnrollWarps4PiS_j, @function
_Z18reduceUnrollWarps4PiS_j:
.LFB2067:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z18reduceUnrollWarps4PiS_jPiS_j
	.cfi_endproc
.LFE2067:
	.size	_Z18reduceUnrollWarps4PiS_j, .-_Z18reduceUnrollWarps4PiS_j
	.globl	_Z49__device_stub__Z26reduceCompleteUnrollWarps4PiS_jPiS_j
	.type	_Z49__device_stub__Z26reduceCompleteUnrollWarps4PiS_jPiS_j, @function
_Z49__device_stub__Z26reduceCompleteUnrollWarps4PiS_jPiS_j:
.LFB2068:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L69
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z26reduceCompleteUnrollWarps4PiS_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L69:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L71
	call	__stack_chk_fail@PLT
.L71:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2068:
	.size	_Z49__device_stub__Z26reduceCompleteUnrollWarps4PiS_jPiS_j, .-_Z49__device_stub__Z26reduceCompleteUnrollWarps4PiS_jPiS_j
	.globl	_Z26reduceCompleteUnrollWarps4PiS_j
	.type	_Z26reduceCompleteUnrollWarps4PiS_j, @function
_Z26reduceCompleteUnrollWarps4PiS_j:
.LFB2069:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z26reduceCompleteUnrollWarps4PiS_jPiS_j
	.cfi_endproc
.LFE2069:
	.size	_Z26reduceCompleteUnrollWarps4PiS_j, .-_Z26reduceCompleteUnrollWarps4PiS_j
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"%s starting reduction at "
.LC2:
	.string	"device %d: %s "
.LC3:
	.string	"reduce with array size %d "
.LC4:
	.string	"grid %d block %d\n"
.LC5:
	.string	"cpu reduce elapsed %f sec cpu_sum: %d \n"
.LC6:
	.string	"gpu Neighbored elapsed %f sec gpu_sum: %d <<<grid %d block %d>>>\n"
.LC7:
	.string	"gpu Neighbored2 elapsed %f sec gpu_sum: %d <<<grid %d block %d>>>\n"
.LC8:
	.string	"gpu Interleaved elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n"
.LC9:
	.string	"gpu Unrolling2 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n"
.LC10:
	.string	"gpu Unrolling4 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n"
.LC11:
	.string	"gpu UnrollWarps4 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n"
.LC12:
	.string	"gpu CompleteUnrollWarps4 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n"
.LC13:
	.string	"gpu CompleteUnroll<template> elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n"
.LC14:
	.string	"Test Failed!\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	xorl	%esi, %esi
	subq	$1128, %rsp
	.cfi_def_cfa_offset 1184
	movq	%fs:40, %rax
	movq	%rax, 1112(%rsp)
	xorl	%eax, %eax
	leaq	80(%rsp), %rbp
	movq	%rbp, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movq	(%rbx), %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rsi
	call	__printf_chk@PLT
	movq	%rbp, %rcx
	xorl	%edx, %edx
	movl	$2, %edi
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	movl	$512, %ebp
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	xorl	%eax, %eax
	movl	$16777216, %edx
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	decl	%r12d
	jle	.L75
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movl	%eax, %ebp
.L75:
	leal	16777215(%rbp), %ebx
	xorl	%edx, %edx
	movl	%ebp, %ecx
	movl	$2, %edi
	movl	%ebx, %eax
	leaq	.LC4(%rip), %rsi
	movl	$1, 48(%rsp)
	divl	%ebp
	movl	$1, 52(%rsp)
	movl	$1, 60(%rsp)
	movl	$1, 64(%rsp)
	movl	%eax, %r15d
	xorl	%eax, %eax
	movl	%r15d, %edx
	movq	%r15, %rbx
	salq	$2, %r15
	call	__printf_chk@PLT
	movl	$67108864, %edi
	call	malloc@PLT
	movq	%r15, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$67108864, %edi
	movq	%rax, %r12
	call	malloc@PLT
	xorl	%ecx, %ecx
	movq	%rax, %r14
.L76:
	movq	%rcx, 8(%rsp)
	call	rand@PLT
	movq	8(%rsp), %rcx
	movzbl	%al, %eax
	movl	%eax, 0(%r13,%rcx,4)
	incq	%rcx
	cmpq	$16777216, %rcx
	jne	.L76
	movq	%r14, %rdi
	movq	%r13, %rsi
	xorl	%eax, %eax
	rep movsl
	leaq	24(%rsp), %rdi
	movl	$67108864, %esi
	movq	%rax, 24(%rsp)
	movq	%rax, 32(%rsp)
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	call	_Z7secondsv
	movq	%r14, %rdi
	movl	$16777216, %esi
	movsd	%xmm0, 8(%rsp)
	call	_Z15recursiveReducePii
	movl	%eax, %r14d
	call	_Z7secondsv
	subsd	8(%rsp), %xmm0
	movl	%r14d, %edx
	movb	$1, %al
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movl	%ebx, 56(%rsp)
	movl	52(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	56(%rsp), %rdi
	movl	64(%rsp), %esi
	movl	%ebp, 44(%rsp)
	xorl	%r8d, %r8d
	movq	44(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L77
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$16777216, %edx
	call	_Z39__device_stub__Z16reduceNeighboredPiS_jPiS_j
.L77:
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movq	32(%rsp), %rsi
	movq	%r15, %rdx
	movq	%r12, %rdi
	subsd	8(%rsp), %xmm0
	movl	$2, %ecx
	movsd	%xmm0, 8(%rsp)
	call	cudaMemcpy@PLT
	movsd	8(%rsp), %xmm0
	xorl	%eax, %eax
	xorl	%edx, %edx
.L78:
	cmpl	%ebx, %eax
	jnb	.L117
	addl	(%r12,%rax,4), %edx
	incq	%rax
	jmp	.L78
.L117:
	movl	%ebp, %r8d
	movl	%ebx, %ecx
	leaq	.LC6(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movl	52(%rsp), %ecx
	movl	64(%rsp), %esi
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	movq	56(%rsp), %rdi
	xorl	%r8d, %r8d
	movsd	%xmm0, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L80
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$16777216, %edx
	call	_Z43__device_stub__Z20reduceNeighboredLessPiS_jPiS_j
.L80:
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movq	32(%rsp), %rsi
	movq	%r15, %rdx
	movq	%r12, %rdi
	subsd	8(%rsp), %xmm0
	movl	$2, %ecx
	movsd	%xmm0, 8(%rsp)
	call	cudaMemcpy@PLT
	movsd	8(%rsp), %xmm0
	xorl	%eax, %eax
	xorl	%edx, %edx
.L81:
	cmpl	%ebx, %eax
	jnb	.L118
	addl	(%r12,%rax,4), %edx
	incq	%rax
	jmp	.L81
.L118:
	movl	%ebp, %r8d
	movl	%ebx, %ecx
	leaq	.LC7(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movl	52(%rsp), %ecx
	movl	64(%rsp), %esi
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	movq	56(%rsp), %rdi
	xorl	%r8d, %r8d
	movsd	%xmm0, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L83
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$16777216, %edx
	call	_Z40__device_stub__Z17reduceInterleavedPiS_jPiS_j
.L83:
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movq	32(%rsp), %rsi
	movq	%r15, %rdx
	movq	%r12, %rdi
	subsd	8(%rsp), %xmm0
	movl	$2, %ecx
	movsd	%xmm0, 8(%rsp)
	call	cudaMemcpy@PLT
	movsd	8(%rsp), %xmm0
	xorl	%eax, %eax
	xorl	%edx, %edx
.L84:
	cmpl	%ebx, %eax
	jnb	.L119
	addl	(%r12,%rax,4), %edx
	incq	%rax
	jmp	.L84
.L119:
	movl	%ebp, %r8d
	movl	%ebx, %ecx
	leaq	.LC8(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	movl	%ebx, %r15d
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	movq	%r13, %rsi
	shrl	%r15d
	movl	$1, %ecx
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movl	%r15d, 68(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	movabsq	$4294967297, %rax
	movsd	%xmm0, 8(%rsp)
	movq	%rax, 72(%rsp)
	movq	68(%rsp), %rdi
	movl	76(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L86
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$16777216, %edx
	call	_Z39__device_stub__Z16reduceUnrolling2PiS_jPiS_j
.L86:
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movq	32(%rsp), %rsi
	movl	%r15d, %edx
	movq	%r12, %rdi
	subsd	8(%rsp), %xmm0
	salq	$2, %rdx
	movl	$2, %ecx
	movsd	%xmm0, 8(%rsp)
	call	cudaMemcpy@PLT
	movsd	8(%rsp), %xmm0
	xorl	%eax, %eax
	xorl	%edx, %edx
.L87:
	cmpl	%r15d, %eax
	jnb	.L120
	addl	(%r12,%rax,4), %edx
	incq	%rax
	jmp	.L87
.L120:
	movl	%ebp, %r8d
	movl	%r15d, %ecx
	leaq	.LC9(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	shrl	$2, %ebx
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movl	%ebx, 68(%rsp)
	movl	52(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	xorl	%r8d, %r8d
	movsd	%xmm0, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	68(%rsp), %rdi
	movl	76(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L89
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$16777216, %edx
	call	_Z39__device_stub__Z16reduceUnrolling4PiS_jPiS_j
.L89:
	call	cudaDeviceSynchronize@PLT
	leal	0(,%rbx,4), %r15d
	call	_Z7secondsv
	movq	32(%rsp), %rsi
	movq	%r15, %rdx
	movq	%r12, %rdi
	subsd	8(%rsp), %xmm0
	movl	$2, %ecx
	movsd	%xmm0, 8(%rsp)
	call	cudaMemcpy@PLT
	movsd	8(%rsp), %xmm0
	xorl	%eax, %eax
	xorl	%edx, %edx
.L90:
	cmpl	%ebx, %eax
	jnb	.L121
	addl	(%r12,%rax,4), %edx
	incq	%rax
	jmp	.L90
.L121:
	movl	%ebp, %r8d
	movl	%ebx, %ecx
	leaq	.LC10(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movl	%ebx, 68(%rsp)
	movl	52(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	xorl	%r8d, %r8d
	movsd	%xmm0, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	68(%rsp), %rdi
	movl	76(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L92
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$16777216, %edx
	call	_Z41__device_stub__Z18reduceUnrollWarps4PiS_jPiS_j
.L92:
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movq	32(%rsp), %rsi
	movq	%r15, %rdx
	movq	%r12, %rdi
	subsd	8(%rsp), %xmm0
	movl	$2, %ecx
	movsd	%xmm0, 8(%rsp)
	call	cudaMemcpy@PLT
	movsd	8(%rsp), %xmm0
	xorl	%eax, %eax
	xorl	%edx, %edx
.L93:
	cmpl	%ebx, %eax
	jnb	.L122
	addl	(%r12,%rax,4), %edx
	incq	%rax
	jmp	.L93
.L122:
	movl	%ebp, %r8d
	movl	%ebx, %ecx
	leaq	.LC11(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movl	%ebx, 68(%rsp)
	movl	52(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	xorl	%r8d, %r8d
	movsd	%xmm0, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	68(%rsp), %rdi
	movl	76(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L95
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$16777216, %edx
	call	_Z49__device_stub__Z26reduceCompleteUnrollWarps4PiS_jPiS_j
.L95:
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movq	32(%rsp), %rsi
	movq	%r15, %rdx
	movq	%r12, %rdi
	subsd	8(%rsp), %xmm0
	movl	$2, %ecx
	movsd	%xmm0, 8(%rsp)
	call	cudaMemcpy@PLT
	movsd	8(%rsp), %xmm0
	xorl	%eax, %eax
	xorl	%edx, %edx
.L96:
	cmpl	%ebx, %eax
	jnb	.L123
	addl	(%r12,%rax,4), %edx
	incq	%rax
	jmp	.L96
.L123:
	movl	%ebp, %r8d
	movl	%ebx, %ecx
	leaq	.LC12(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movsd	%xmm0, 8(%rsp)
	cmpl	$256, %ebp
	je	.L98
	jg	.L99
	cmpl	$64, %ebp
	je	.L100
	cmpl	$128, %ebp
	je	.L101
	jmp	.L102
.L99:
	cmpl	$512, %ebp
	je	.L103
	cmpl	$1024, %ebp
	jne	.L102
	movl	%ebx, 68(%rsp)
	movl	52(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movq	44(%rsp), %rdx
	movq	%rax, 72(%rsp)
	movq	68(%rsp), %rdi
	movl	76(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L102
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$16777216, %edx
	call	_ZL54__device_stub__Z20reduceCompleteUnrollILj1024EEvPiS0_jPiS_j
	jmp	.L102
.L103:
	movl	%ebx, 68(%rsp)
	movl	52(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movq	44(%rsp), %rdx
	movq	%rax, 72(%rsp)
	movq	68(%rsp), %rdi
	movl	76(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L102
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$16777216, %edx
	call	_ZL53__device_stub__Z20reduceCompleteUnrollILj512EEvPiS0_jPiS_j
	jmp	.L102
.L98:
	movl	%ebx, 68(%rsp)
	movl	52(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movq	44(%rsp), %rdx
	movq	%rax, 72(%rsp)
	movq	68(%rsp), %rdi
	movl	76(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L102
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$16777216, %edx
	call	_ZL53__device_stub__Z20reduceCompleteUnrollILj256EEvPiS0_jPiS_j
	jmp	.L102
.L101:
	movl	%ebx, 68(%rsp)
	movl	52(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movq	44(%rsp), %rdx
	movq	%rax, 72(%rsp)
	movq	68(%rsp), %rdi
	movl	76(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L102
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$16777216, %edx
	call	_ZL53__device_stub__Z20reduceCompleteUnrollILj128EEvPiS0_jPiS_j
	jmp	.L102
.L100:
	movl	%ebx, 68(%rsp)
	movl	52(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movq	44(%rsp), %rdx
	movq	%rax, 72(%rsp)
	movq	68(%rsp), %rdi
	movl	76(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L102
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$16777216, %edx
	call	_ZL52__device_stub__Z20reduceCompleteUnrollILj64EEvPiS0_jPiS_j
.L102:
	call	cudaDeviceSynchronize@PLT
	call	_Z7secondsv
	movq	32(%rsp), %rsi
	movq	%r15, %rdx
	movq	%r12, %rdi
	subsd	8(%rsp), %xmm0
	movl	$2, %ecx
	xorl	%r15d, %r15d
	movsd	%xmm0, 8(%rsp)
	call	cudaMemcpy@PLT
	movsd	8(%rsp), %xmm0
	xorl	%eax, %eax
.L109:
	cmpl	%ebx, %eax
	jnb	.L124
	addl	(%r12,%rax,4), %r15d
	incq	%rax
	jmp	.L109
.L124:
	movl	%ebp, %r8d
	movl	%ebx, %ecx
	movl	%r15d, %edx
	movl	$2, %edi
	leaq	.LC13(%rip), %rsi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	call	cudaDeviceReset@PLT
	cmpl	%r14d, %r15d
	je	.L111
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L111:
	movq	1112(%rsp), %rax
	subq	%fs:40, %rax
	je	.L112
	call	__stack_chk_fail@PLT
.L112:
	addq	$1128, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC15:
	.string	"_Z20reduceCompleteUnrollILj64EEvPiS0_j"
.LC16:
	.string	"_Z20reduceCompleteUnrollILj128EEvPiS0_j"
.LC17:
	.string	"_Z20reduceCompleteUnrollILj256EEvPiS0_j"
.LC18:
	.string	"_Z20reduceCompleteUnrollILj512EEvPiS0_j"
.LC19:
	.string	"_Z20reduceCompleteUnrollILj1024EEvPiS0_j"
.LC20:
	.string	"_Z26reduceCompleteUnrollWarps4PiS_j"
.LC21:
	.string	"_Z18reduceUnrollWarps4PiS_j"
.LC22:
	.string	"_Z16reduceUnrolling4PiS_j"
.LC23:
	.string	"_Z16reduceUnrolling2PiS_j"
.LC24:
	.string	"_Z17reduceInterleavedPiS_j"
.LC25:
	.string	"_Z20reduceNeighboredLessPiS_j"
.LC26:
	.string	"_Z16reduceNeighboredPiS_j"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2081:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z20reduceCompleteUnrollILj64EEvPiS0_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20reduceCompleteUnrollILj128EEvPiS0_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20reduceCompleteUnrollILj256EEvPiS0_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20reduceCompleteUnrollILj512EEvPiS0_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20reduceCompleteUnrollILj1024EEvPiS0_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z26reduceCompleteUnrollWarps4PiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z18reduceUnrollWarps4PiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC22(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16reduceUnrolling4PiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC23(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	movq	%rdx, %rcx
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z16reduceUnrolling2PiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17reduceInterleavedPiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC25(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z20reduceNeighboredLessPiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16reduceNeighboredPiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2081:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-1598689907
	.long	1051772663
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>
#include <sys/time.h>

double seconds(){
    struct timeval tp;
    struct timezone tzp;
    int i = gettimeofday(&tp,&tzp);
    return ((double)tp.tv_sec+(double)tp.tv_usec*1.e-6);
    }

int recursiveReduce(int *data, int const size){
    // terminate check
    if (size == 1) return data[0];

    // renew stride
    int const stride = size / 2;

    // in-place reduction
    for (int i = 0; i < stride; i++){
        data[i] += data[i+stride];
        }

    return recursiveReduce(data,stride);
    }

// kernel 1
__global__ void reduceNeighbored(int *g_idata, int *g_odata, unsigned int n){
    /*
    Do calculations on each block, save partly reduced result on the series of g_odata.
    After it, sum g_odata up for getting the last result on the host side.
    */
    
    // set thread ID
    unsigned int tid = threadIdx.x;
    unsigned int idx = threadIdx.x + blockDim.x * blockIdx.x;

    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x * blockDim.x;

    // boundary check
    if (idx >= n) return;

    // in-place reduction in global memory on each block
    for (int stride = 1; stride < blockDim.x; stride *= 2){
        if ((tid % (2 * stride)) == 0){
            idata[tid] += idata[tid+stride];
            }
        // synchronize within block
        __syncthreads();
        }

    // write result for this block to global memory
    if (tid == 0) g_odata[blockIdx.x] = idata[0];
    }

// kernel 2
__global__ void reduceNeighboredLess(int *g_idata,int *g_odata,unsigned int n){
    // set threadID
    unsigned int tid = threadIdx.x;
    unsigned int idx = threadIdx.x + blockDim.x * blockIdx.x;

    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x*blockDim.x;

    // boundary check
    if (idx >= n) return;

    // in-place reduction
    for (int stride = 1; stride < blockDim.x; stride *= 2){
        // convert tid into local array index
        int index = 2 * stride * tid;
        if (index < blockDim.x){
            idata[index] += idata[index+stride];
            }
        // synchronize within threadblock
        __syncthreads();
        }
     // write the result for this block to global memory
     if (tid == 0) g_odata[blockIdx.x] = idata[0];
     }

// kernel 3
__global__ void reduceInterleaved (int *g_idata, int *g_odata, unsigned int n){
    // interleaved pair implementation with less divergence
    unsigned int tid = threadIdx.x;
    unsigned int idx = threadIdx.x + blockDim.x * blockIdx.x;
    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x*blockDim.x;
    // boundary check
    if (idx >= n) return;
    // in-place reduction in global memory
    for (int stride = blockDim.x/2; stride > 0; stride >>= 1){
        if (tid < stride) idata[tid] += idata[tid+stride];
        __syncthreads();
        }
    // write result for this block to global memory
    if (tid == 0) g_odata[blockIdx.x] = idata[0];
}

// kernel 4
__global__ void reduceUnrolling2(int *g_idata,int *g_odata, unsigned int n){
    // set thread ID, one threadblock operates on two datablocks
    // so that blockidx * 2 * blockdim.x
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x * 2 + threadIdx.x;    
    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x * blockDim.x * 2;
    // unrolling 2 data blocks, add data from an adjacent data block
    if (idx + blockDim.x < n) g_idata[idx] += g_idata[idx+blockDim.x];
    __syncthreads();
    // inplace reduction in global memory
    for (int stride = blockDim.x / 2; stride > 0; stride >>= 1){
        if (tid < stride){
            idata[tid] += idata[tid+stride];
            }
        // synchronize within threadBlock
        __syncthreads();
        }
    // write result for this block to global memory
    if (tid ==0) g_odata[blockIdx.x] = idata[0];
    }

// kernel 5
__global__ void reduceUnrolling4(int *g_idata,int *g_odata,unsigned int n){
    // set threadId, one threadBlock operates on four dataBlocks
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x * 4 + threadIdx.x;
    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x * blockDim.x * 4;
    // unrolling 4 data blocks
    if (idx + 3 * blockDim.x < n){
        int a1 = g_idata[idx];
        int a2 = g_idata[idx + blockDim.x];
        int a3 = g_idata[idx + blockDim.x * 2];
        int a4 = g_idata[idx + blockDim.x * 3];
        g_idata[idx] = a1 + a2 + a3 + a4;
        }
    __syncthreads();
    // in-place reduction in global memory
    for (int stride = blockDim.x / 2; stride > 0; stride >>= 1){
        if (tid < stride){
            idata[tid] += idata[tid+stride];
            }
        __syncthreads();
        }
    if (tid == 0) g_odata[blockIdx.x] = idata[0];
    }

// kernel 6
__global__ void reduceUnrollWarps4(int *g_idata,int *g_odata,unsigned int n){
    // set threadId, one threadBlock operates on four dataBlocks
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x * 4 + threadIdx.x;
    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x * blockDim.x * 4;
    // unrolling 4 data blocks
    if (idx + 3 * blockDim.x < n){
        int a1 = g_idata[idx];
        int a2 = g_idata[idx + blockDim.x];
        int a3 = g_idata[idx + blockDim.x * 2];
        int a4 = g_idata[idx + blockDim.x * 3];
        g_idata[idx] = a1 + a2 + a3 + a4;
        }
    __syncthreads();
    // in-place reduction in global memory
    for (int stride = blockDim.x / 2; stride > 32; stride >>= 1){
        if (tid < stride){
            idata[tid] += idata[tid+stride];
            }
        __syncthreads();
        }

    // unrolling warp
    if (tid <32){
        volatile int *vmem = idata;
        vmem[tid] += vmem[tid+32];
        vmem[tid] += vmem[tid+16];
        vmem[tid] += vmem[tid+8];
        vmem[tid] += vmem[tid+4];
        vmem[tid] += vmem[tid+2];
        vmem[tid] += vmem[tid+1];
        }

    if (tid == 0) g_odata[blockIdx.x] = idata[0];
    }

// kernel 7
__global__ void reduceCompleteUnrollWarps4(int *g_idata, int *g_odata, unsigned int n){
    // set threadId
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x * 4 + threadIdx.x;
    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x * blockDim.x * 4;
    // unrolling 4
    if (idx + 3*blockDim.x < n){
        int a1 = g_idata[idx];
        int a2 = g_idata[idx+blockDim.x];
        int a3 = g_idata[idx+2*blockDim.x];
        int a4 = g_idata[idx+3*blockDim.x];
        g_idata[idx] = a1+a2+a3+a4;
        }
    __syncthreads();
    // in-place reduction and complete unroll
    if (blockDim.x>=1024 && tid < 512) idata[tid] += idata[tid+512];
    __syncthreads();
    if (blockDim.x>=512 && tid < 256)  idata[tid] += idata[tid+256];
    __syncthreads();
    if (blockDim.x>=256 && tid < 128)  idata[tid] += idata[tid+128];
    __syncthreads();
    if (blockDim.x>=128 && tid < 64)   idata[tid] += idata[tid+64];
    __syncthreads();
    // unrolling warp
    if (tid < 32) {
        volatile int *vsmem = idata;
        vsmem[tid] += vsmem[tid+32];
        vsmem[tid] += vsmem[tid+16];
        vsmem[tid] += vsmem[tid+ 8];
        vsmem[tid] += vsmem[tid+ 4];
        vsmem[tid] += vsmem[tid+ 2];
        vsmem[tid] += vsmem[tid+ 1];
        }
    // write result
    if (tid == 0) g_odata[blockIdx.x] = idata[0];
    }


template <unsigned int iBlockSize>
__global__ void reduceCompleteUnroll(int *g_idata, int *g_odata, unsigned int n){
    unsigned int tid = threadIdx.x;
    unsigned int idx = blockIdx.x * blockDim.x * 4 + threadIdx.x;
    // convert global data pointer to the local pointer of this block
    int *idata = g_idata + blockIdx.x * blockDim.x * 4;
    // unrolling 4
    if (idx + 3 * blockDim.x < n){
        int a1 = g_idata[idx];
        int a2 = g_idata[idx + blockDim.x];
        int a3 = g_idata[idx + blockDim.x * 2];
        int a4 = g_idata[idx + blockDim.x * 3];
        g_idata[idx] = a1 + a2 + a3 + a4;
        }
    __syncthreads(); 
    // in-place reduction and complete unroll
    if (iBlockSize>=1024 && tid < 512) idata[tid] += idata[tid+512];
    __syncthreads();
    if (iBlockSize>=512 && tid < 256)  idata[tid] += idata[tid+256];
    __syncthreads();
    if (iBlockSize>=256 && tid < 128)  idata[tid] += idata[tid+128];
    __syncthreads();
    if (iBlockSize>=128 && tid < 64)   idata[tid] += idata[tid+64];
    __syncthreads();
    // unrolling warp
    if (tid < 32) {
        volatile int *vsmem = idata;
        vsmem[tid] += vsmem[tid+32];
        vsmem[tid] += vsmem[tid+16];
        vsmem[tid] += vsmem[tid+ 8];
        vsmem[tid] += vsmem[tid+ 4];
        vsmem[tid] += vsmem[tid+ 2];
        vsmem[tid] += vsmem[tid+ 1];
        }
    // write result
    if (tid == 0) g_odata[blockIdx.x] = idata[0];
    }

int main(int argc, char** argv){
    // set up device
    int dev = 0;
    hipDeviceProp_t deviceProp;
    hipGetDeviceProperties(&deviceProp,dev);
    printf("%s starting reduction at ",argv[0]);
    printf("device %d: %s ",dev,deviceProp.name);
    hipSetDevice(dev);

    bool bResult = false;

    // initialization
    int size = 1 << 24; // total number of elementse to reduce
    printf("reduce with array size %d ",size);

    // execution configuration
    int blocksize = 512;
    if (argc > 1) blocksize = atoi(argv[1]);
    
    dim3 block(blocksize,1);
    dim3 grid ((size+block.x-1)/block.x,1);
    printf("grid %d block %d\n",grid.x,block.x);
    
    // allocate host memory
    size_t bytes = size * sizeof(int);
    int *h_idata = (int *) malloc(bytes);
    int *h_odata = (int *) malloc(grid.x*sizeof(int));
    int *tmp     = (int *) malloc(bytes);

    // initialize the array
    for (int i = 0; i <size; i++){
        // mask off high 2 bytes to force max number to 255
        h_idata[i] = (int)(rand() & 0xFF);
        }
    memcpy(tmp,h_idata,bytes);
    
    double iStart,iElaps;
    int gpu_sum = 0;

    // allocate device memory
    int *d_idata = NULL;
    int *d_odata = NULL;
    hipMalloc((void **) &d_idata,bytes);
    hipMalloc((void **) &d_odata,grid.x*sizeof(int));

    // cpu reduction
    iStart = seconds();
    int cpu_sum = recursiveReduce(tmp,size);
    iElaps = seconds() - iStart;
    printf("cpu reduce elapsed %f sec cpu_sum: %d \n",iElaps,cpu_sum);

    // kernel 1: reduceNeighbored
    hipMemcpy(d_idata,h_idata,bytes,hipMemcpyHostToDevice);
    hipDeviceSynchronize();
    iStart = seconds();
    reduceNeighbored<<<grid,block>>>(d_idata,d_odata,size);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    hipMemcpy(h_odata,d_odata,grid.x * sizeof(int),hipMemcpyDeviceToHost);
    for (int i=0; i <grid.x; i++) gpu_sum += h_odata[i];
    printf("gpu Neighbored elapsed %f sec gpu_sum: %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x,block.x);
    
    // kernel 2: reduceNeighbored with less divergence
    hipMemcpy(d_idata,h_idata,bytes,hipMemcpyHostToDevice);
    hipDeviceSynchronize();
    iStart = seconds();
    reduceNeighboredLess<<<grid,block>>>(d_idata,d_odata,size);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    hipMemcpy(h_odata,d_odata,grid.x * sizeof(int),hipMemcpyDeviceToHost);
    gpu_sum = 0;
    for(int i = 0;i<grid.x;i++) gpu_sum += h_odata[i];
    printf("gpu Neighbored2 elapsed %f sec gpu_sum: %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x,block.x);
    
    // kernel 3: reduceInterleaved
    hipMemcpy(d_idata,h_idata,bytes,hipMemcpyHostToDevice);
    hipDeviceSynchronize();
    iStart = seconds();
    reduceInterleaved<<<grid,block>>>(d_idata,d_odata,size);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    hipMemcpy(h_odata,d_odata,grid.x*sizeof(int),hipMemcpyDeviceToHost);
    gpu_sum = 0;
    for(int i=0;i<grid.x;i++) gpu_sum += h_odata[i];
    printf("gpu Interleaved elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x,block.x);
    
    // kernel 4: reduceUnrolling2
    hipMemcpy(d_idata,h_idata,bytes,hipMemcpyHostToDevice);
    hipDeviceSynchronize();
    iStart = seconds();
    reduceUnrolling2<<<grid.x/2,block>>>(d_idata,d_odata,size);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    hipMemcpy(h_odata,d_odata,(grid.x/2)*sizeof(int),hipMemcpyDeviceToHost);
    gpu_sum = 0;
    for(int i=0;i<grid.x/2;i++) gpu_sum += h_odata[i];
    printf("gpu Unrolling2 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x/2,block.x);
    
    // kernel 5: reduceUnrolling4
    hipMemcpy(d_idata,h_idata,bytes,hipMemcpyHostToDevice);
    hipDeviceSynchronize();
    iStart = seconds();
    reduceUnrolling4<<<grid.x/4,block>>>(d_idata,d_odata,size);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    hipMemcpy(h_odata,d_odata,(grid.x/4)*sizeof(int),hipMemcpyDeviceToHost);
    gpu_sum = 0;
    for(int i=0;i<grid.x/4;i++) gpu_sum += h_odata[i];
    printf("gpu Unrolling4 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x/4,block.x);
    
    // kernel 6: reduceUnrollWarps4
    hipMemcpy(d_idata,h_idata,bytes,hipMemcpyHostToDevice);
    hipDeviceSynchronize();
    iStart = seconds();
    reduceUnrollWarps4<<<grid.x/4,block>>>(d_idata,d_odata,size);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    hipMemcpy(h_odata,d_odata,(grid.x/4)*sizeof(int),hipMemcpyDeviceToHost);
    gpu_sum = 0;
    for(int i=0;i<grid.x/4;i++) gpu_sum += h_odata[i];
    printf("gpu UnrollWarps4 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x/4,block.x);
    
    // kernel 7: reduceCompleteUnrollWarps4
    hipMemcpy(d_idata,h_idata,bytes,hipMemcpyHostToDevice);
    hipDeviceSynchronize();
    iStart = seconds();
    reduceCompleteUnrollWarps4<<<grid.x/4,block>>>(d_idata,d_odata,size);
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    hipMemcpy(h_odata,d_odata,(grid.x/4)*sizeof(int),hipMemcpyDeviceToHost);
    gpu_sum = 0;
    for(int i=0;i<grid.x/4;i++) gpu_sum += h_odata[i];
    printf("gpu CompleteUnrollWarps4 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x/4,block.x);
    
    // kernel 8: reduceCompleteUnroll (template function)
    hipMemcpy(d_idata,h_idata,bytes,hipMemcpyHostToDevice);
    hipDeviceSynchronize();
    iStart = seconds();
    switch (blocksize)
    {
    case 1024:
        reduceCompleteUnroll<1024><<<grid.x/4,block>>>(d_idata,d_odata,size);
        break;
    case 512:
        reduceCompleteUnroll<512><<<grid.x/4,block>>>(d_idata,d_odata,size);
        break;
    case 256:
        reduceCompleteUnroll<256><<<grid.x/4,block>>>(d_idata,d_odata,size);
        break;
    case 128:
        reduceCompleteUnroll<128><<<grid.x/4,block>>>(d_idata,d_odata,size);
        break;
    case 64:
        reduceCompleteUnroll<64><<<grid.x/4,block>>>(d_idata,d_odata,size);
        break;
    }
    hipDeviceSynchronize();
    iElaps = seconds() - iStart;
    hipMemcpy(h_odata,d_odata,(grid.x/4)*sizeof(int),hipMemcpyDeviceToHost);
    gpu_sum = 0;
    for(int i=0;i<grid.x/4;i++) gpu_sum += h_odata[i];
    printf("gpu CompleteUnroll<template> elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n",
        iElaps,gpu_sum,grid.x/4,block.x);


    free(h_idata);
    free(h_odata);
    hipFree(d_idata);
    hipFree(d_odata);

    hipDeviceReset();
    

    // check the results
    bResult = (gpu_sum == cpu_sum);
    if (!bResult) printf("Test Failed!\n");
    return EXIT_SUCCESS;
    }







	.text
	.file	"reduceInteger.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7secondsv
.LCPI0_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z7secondsv
	.type	_Z7secondsv,@function
_Z7secondsv:                            # @_Z7secondsv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	leaq	16(%rsp), %rbx
	leaq	8(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z7secondsv, .Lfunc_end0-_Z7secondsv
	.cfi_endproc
                                        # -- End function
	.globl	_Z15recursiveReducePii          # -- Begin function _Z15recursiveReducePii
	.type	_Z15recursiveReducePii,@function
_Z15recursiveReducePii:                 # @_Z15recursiveReducePii
	.cfi_startproc
# %bb.0:
	cmpl	$1, %esi
	je	.LBB1_1
.LBB1_3:                                # %.lr.ph19
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_5 Depth 2
	movl	%esi, %eax
	shrl	$31, %esi
	addl	%eax, %esi
	sarl	%esi
	cmpl	$2, %eax
	jl	.LBB1_2
# %bb.4:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_3 Depth=1
	movl	%esi, %ecx
	leaq	(%rdi,%rcx,4), %rdx
	xorl	%r8d, %r8d
.LBB1_5:                                # %.lr.ph
                                        #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rdx,%r8,4), %r9d
	addl	%r9d, (%rdi,%r8,4)
	incq	%r8
	cmpq	%r8, %rcx
	jne	.LBB1_5
.LBB1_2:                                # %tailrecurse.loopexit
                                        #   in Loop: Header=BB1_3 Depth=1
	andl	$-2, %eax
	cmpl	$2, %eax
	jne	.LBB1_3
.LBB1_1:                                # %tailrecurse._crit_edge
	movl	(%rdi), %eax
	retq
.Lfunc_end1:
	.size	_Z15recursiveReducePii, .Lfunc_end1-_Z15recursiveReducePii
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__reduceNeighboredPiS_j # -- Begin function _Z31__device_stub__reduceNeighboredPiS_j
	.type	_Z31__device_stub__reduceNeighboredPiS_j,@function
_Z31__device_stub__reduceNeighboredPiS_j: # @_Z31__device_stub__reduceNeighboredPiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16reduceNeighboredPiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z31__device_stub__reduceNeighboredPiS_j, .Lfunc_end2-_Z31__device_stub__reduceNeighboredPiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__reduceNeighboredLessPiS_j # -- Begin function _Z35__device_stub__reduceNeighboredLessPiS_j
	.type	_Z35__device_stub__reduceNeighboredLessPiS_j,@function
_Z35__device_stub__reduceNeighboredLessPiS_j: # @_Z35__device_stub__reduceNeighboredLessPiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20reduceNeighboredLessPiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z35__device_stub__reduceNeighboredLessPiS_j, .Lfunc_end3-_Z35__device_stub__reduceNeighboredLessPiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__reduceInterleavedPiS_j # -- Begin function _Z32__device_stub__reduceInterleavedPiS_j
	.type	_Z32__device_stub__reduceInterleavedPiS_j,@function
_Z32__device_stub__reduceInterleavedPiS_j: # @_Z32__device_stub__reduceInterleavedPiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17reduceInterleavedPiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z32__device_stub__reduceInterleavedPiS_j, .Lfunc_end4-_Z32__device_stub__reduceInterleavedPiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__reduceUnrolling2PiS_j # -- Begin function _Z31__device_stub__reduceUnrolling2PiS_j
	.type	_Z31__device_stub__reduceUnrolling2PiS_j,@function
_Z31__device_stub__reduceUnrolling2PiS_j: # @_Z31__device_stub__reduceUnrolling2PiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16reduceUnrolling2PiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z31__device_stub__reduceUnrolling2PiS_j, .Lfunc_end5-_Z31__device_stub__reduceUnrolling2PiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__reduceUnrolling4PiS_j # -- Begin function _Z31__device_stub__reduceUnrolling4PiS_j
	.type	_Z31__device_stub__reduceUnrolling4PiS_j,@function
_Z31__device_stub__reduceUnrolling4PiS_j: # @_Z31__device_stub__reduceUnrolling4PiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16reduceUnrolling4PiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z31__device_stub__reduceUnrolling4PiS_j, .Lfunc_end6-_Z31__device_stub__reduceUnrolling4PiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__reduceUnrollWarps4PiS_j # -- Begin function _Z33__device_stub__reduceUnrollWarps4PiS_j
	.type	_Z33__device_stub__reduceUnrollWarps4PiS_j,@function
_Z33__device_stub__reduceUnrollWarps4PiS_j: # @_Z33__device_stub__reduceUnrollWarps4PiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18reduceUnrollWarps4PiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z33__device_stub__reduceUnrollWarps4PiS_j, .Lfunc_end7-_Z33__device_stub__reduceUnrollWarps4PiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z41__device_stub__reduceCompleteUnrollWarps4PiS_j # -- Begin function _Z41__device_stub__reduceCompleteUnrollWarps4PiS_j
	.type	_Z41__device_stub__reduceCompleteUnrollWarps4PiS_j,@function
_Z41__device_stub__reduceCompleteUnrollWarps4PiS_j: # @_Z41__device_stub__reduceCompleteUnrollWarps4PiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z26reduceCompleteUnrollWarps4PiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z41__device_stub__reduceCompleteUnrollWarps4PiS_j, .Lfunc_end8-_Z41__device_stub__reduceCompleteUnrollWarps4PiS_j
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI9_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1576, %rsp                     # imm = 0x628
	.cfi_def_cfa_offset 1632
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	leaq	104(%rsp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movq	(%rbx), %rsi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	xorl	%esi, %esi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	printf
	xorl	%edi, %edi
	callq	hipSetDevice
	movl	$.L.str.2, %edi
	movl	$16777216, %esi                 # imm = 0x1000000
	xorl	%eax, %eax
	callq	printf
	movl	$512, %ecx                      # imm = 0x200
	cmpl	$2, %ebp
	jl	.LBB9_2
# %bb.1:
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %ecx
.LBB9_2:
	movl	%ecx, %r13d
	leal	16777215(%rcx), %eax
	xorl	%r12d, %r12d
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %ebp
	movl	$.L.str.3, %edi
	movl	%eax, %esi
	movl	%ecx, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %r14
	leaq	(,%rbp,4), %rdi
	movq	%rdi, 40(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %r15
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %rbx
.LBB9_3:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	movzbl	%al, %eax
	movl	%eax, (%r14,%r12,4)
	incq	%r12
	cmpq	$16777216, %r12                 # imm = 0x1000000
	jne	.LBB9_3
# %bb.4:
	movq	%r13, 80(%rsp)                  # 8-byte Spill
	btsq	$32, %r13
	movq	%r13, 48(%rsp)                  # 8-byte Spill
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	memcpy@PLT
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	movq	%rax, (%rdi)
	movq	%rsp, %r13
	movq	%rax, (%r13)
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	hipMalloc
	movq	%r13, %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
	leaq	56(%rsp), %r13
	leaq	16(%rsp), %rsi
	movq	%r13, %rdi
	callq	gettimeofday
	cvtsi2sdq	8(%r13), %xmm1
	movq	(%r13), %rax
	mulsd	.LCPI9_0(%rip), %xmm1
	movl	$16777216, %ecx                 # imm = 0x1000000
.LBB9_6:                                # %.lr.ph19.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB9_8 Depth 2
	movl	%ecx, %edx
	shrl	$31, %ecx
	addl	%edx, %ecx
	sarl	%ecx
	cmpl	$2, %edx
	jl	.LBB9_5
# %bb.7:                                # %.lr.ph.preheader.i
                                        #   in Loop: Header=BB9_6 Depth=1
	movl	%ecx, %esi
	movq	%rbx, %rdi
	movq	%rsi, %r8
.LBB9_8:                                # %.lr.ph.i
                                        #   Parent Loop BB9_6 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rdi,%rsi,4), %r9d
	addl	%r9d, (%rdi)
	addq	$4, %rdi
	decq	%r8
	jne	.LBB9_8
.LBB9_5:                                # %tailrecurse.loopexit.i
                                        #   in Loop: Header=BB9_6 Depth=1
	andl	$-2, %edx
	cmpl	$2, %edx
	jne	.LBB9_6
# %bb.9:                                # %_Z15recursiveReducePii.exit
	movq	%rbp, %r13
	movabsq	$4294967296, %rcx               # imm = 0x100000000
	orq	%rcx, %r13
	cvtsi2sd	%rax, %xmm0
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 24(%rsp)                 # 8-byte Spill
	movl	(%rbx), %r12d
	leaq	56(%rsp), %rbx
	leaq	16(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	xorps	%xmm1, %xmm1
	cvtsi2sdq	(%rbx), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%rbx), %xmm0
	mulsd	.LCPI9_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	subsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.4, %edi
	movl	%r12d, 100(%rsp)                # 4-byte Spill
	movl	%r12d, %esi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %rbx
	leaq	16(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%rbx), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%rbx), %xmm1
	mulsd	.LCPI9_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	xorl	%ebx, %ebx
	movq	%r13, 24(%rsp)                  # 8-byte Spill
	movq	%r13, %rdi
	movl	$1, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_11
# %bb.10:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z31__device_stub__reduceNeighboredPiS_j
.LBB9_11:
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r12
	leaq	16(%rsp), %rsi
	movq	%r12, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r12), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r12), %xmm1
	mulsd	.LCPI9_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	subsd	32(%rsp), %xmm1                 # 8-byte Folded Reload
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	movq	(%rsp), %rsi
	movq	%r15, %rdi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$-16777216, 80(%rsp)            # 4-byte Folded Reload
                                        # imm = 0xFF000000
	ja	.LBB9_14
# %bb.12:                               # %.lr.ph.preheader
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.LBB9_13:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r15,%rax,4), %ebx
	incq	%rax
	cmpq	%rbp, %rax
	jb	.LBB9_13
.LBB9_14:                               # %._crit_edge
	movl	$.L.str.5, %edi
	movsd	32(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %esi
	movl	%ebp, %edx
	movq	80(%rsp), %r13                  # 8-byte Reload
	movl	%r13d, %ecx
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %rbx
	leaq	16(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%rbx), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%rbx), %xmm1
	mulsd	.LCPI9_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	xorl	%ebx, %ebx
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_16
# %bb.15:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z35__device_stub__reduceNeighboredLessPiS_j
.LBB9_16:
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r12
	leaq	16(%rsp), %rsi
	movq	%r12, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r12), %xmm0
	movsd	%xmm0, 72(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%r12), %xmm0
	movsd	%xmm0, 88(%rsp)                 # 8-byte Spill
	movq	(%rsp), %rsi
	movq	%r15, %rdi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movsd	88(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI9_0(%rip), %xmm0
	addsd	72(%rsp), %xmm0                 # 8-byte Folded Reload
	subsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	cmpl	$-16777216, %r13d               # imm = 0xFF000000
	ja	.LBB9_19
# %bb.17:                               # %.lr.ph368.preheader
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.LBB9_18:                               # %.lr.ph368
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r15,%rax,4), %ebx
	incq	%rax
	cmpq	%rbp, %rax
	jb	.LBB9_18
.LBB9_19:                               # %._crit_edge369
	movl	$.L.str.6, %edi
	movl	%ebx, %esi
	movl	%ebp, %edx
	movq	80(%rsp), %r13                  # 8-byte Reload
	movl	%r13d, %ecx
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %rbx
	leaq	16(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%rbx), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%rbx), %xmm1
	mulsd	.LCPI9_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	xorl	%ebx, %ebx
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_21
# %bb.20:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z32__device_stub__reduceInterleavedPiS_j
.LBB9_21:
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r12
	leaq	16(%rsp), %rsi
	movq	%r12, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r12), %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%r12), %xmm0
	movsd	%xmm0, 72(%rsp)                 # 8-byte Spill
	movq	(%rsp), %rsi
	movq	%r15, %rdi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movsd	72(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI9_0(%rip), %xmm0
	addsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	subsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	cmpl	$-16777216, %r13d               # imm = 0xFF000000
	ja	.LBB9_24
# %bb.22:                               # %.lr.ph374.preheader
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.LBB9_23:                               # %.lr.ph374
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r15,%rax,4), %ebx
	incq	%rax
	cmpq	%rbp, %rax
	jb	.LBB9_23
.LBB9_24:                               # %._crit_edge375
	movl	$.L.str.7, %edi
	movl	%ebx, %esi
	movl	%ebp, %edx
	movl	%r13d, %ecx
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %rbx
	leaq	16(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%rbx), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%rbx), %xmm1
	mulsd	.LCPI9_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 40(%rsp)                 # 8-byte Spill
	movl	%ebp, %ebx
	shrl	%ebx
	movq	%rbx, %rdi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	xorl	%r12d, %r12d
	movl	$1, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_26
# %bb.25:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z31__device_stub__reduceUnrolling2PiS_j
.LBB9_26:
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r13
	leaq	16(%rsp), %rsi
	movq	%r13, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r13), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r13), %xmm1
	mulsd	.LCPI9_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	subsd	40(%rsp), %xmm1                 # 8-byte Folded Reload
	movsd	%xmm1, 40(%rsp)                 # 8-byte Spill
	movq	(%rsp), %rsi
	leaq	(,%rbx,4), %rdx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$2, %ebp
	jb	.LBB9_29
# %bb.27:                               # %.lr.ph380.preheader
	xorl	%eax, %eax
	xorl	%r12d, %r12d
.LBB9_28:                               # %.lr.ph380
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r15,%rax,4), %r12d
	incq	%rax
	cmpq	%rbx, %rax
	jb	.LBB9_28
.LBB9_29:                               # %._crit_edge381
	movl	$.L.str.8, %edi
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%r12d, %esi
	movl	%ebx, %edx
	movq	80(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %rbx
	leaq	16(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%rbx), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%rbx), %xmm1
	mulsd	.LCPI9_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 40(%rsp)                 # 8-byte Spill
	movl	%ebp, %r12d
	shrl	$2, %r12d
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	orq	%r12, %rdi
	xorl	%ebx, %ebx
	movq	%rdi, 24(%rsp)                  # 8-byte Spill
	movl	$1, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_31
# %bb.30:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z31__device_stub__reduceUnrolling4PiS_j
.LBB9_31:
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r13
	leaq	16(%rsp), %rsi
	movq	%r13, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r13), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r13), %xmm1
	mulsd	.LCPI9_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	subsd	40(%rsp), %xmm1                 # 8-byte Folded Reload
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	movq	(%rsp), %rsi
	movl	%ebp, %edx
	andl	$-4, %edx
	movq	%r15, %rdi
	movq	%rdx, 40(%rsp)                  # 8-byte Spill
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$4, %ebp
	jb	.LBB9_34
# %bb.32:                               # %.lr.ph386.preheader
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.LBB9_33:                               # %.lr.ph386
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r15,%rax,4), %ebx
	incq	%rax
	cmpq	%r12, %rax
	jb	.LBB9_33
.LBB9_34:                               # %._crit_edge387
	movl	$.L.str.9, %edi
	movsd	32(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movl	%ebx, %esi
	movl	%r12d, %edx
	movq	80(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %rbx
	leaq	16(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%rbx), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%rbx), %xmm1
	mulsd	.LCPI9_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	xorl	%ebx, %ebx
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_36
# %bb.35:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z33__device_stub__reduceUnrollWarps4PiS_j
.LBB9_36:
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r13
	leaq	16(%rsp), %rsi
	movq	%r13, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r13), %xmm0
	movsd	%xmm0, 72(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%r13), %xmm0
	movsd	%xmm0, 88(%rsp)                 # 8-byte Spill
	movq	(%rsp), %rsi
	movq	%r15, %rdi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movsd	88(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI9_0(%rip), %xmm0
	addsd	72(%rsp), %xmm0                 # 8-byte Folded Reload
	subsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	cmpl	$4, %ebp
	jb	.LBB9_39
# %bb.37:                               # %.lr.ph392.preheader
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.LBB9_38:                               # %.lr.ph392
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r15,%rax,4), %ebx
	incq	%rax
	cmpq	%r12, %rax
	jb	.LBB9_38
.LBB9_39:                               # %._crit_edge393
	movl	$.L.str.10, %edi
	movl	%ebx, %esi
	movl	%r12d, %edx
	movq	80(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %rbx
	leaq	16(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%rbx), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%rbx), %xmm1
	mulsd	.LCPI9_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	xorl	%ebx, %ebx
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_41
# %bb.40:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z41__device_stub__reduceCompleteUnrollWarps4PiS_j
.LBB9_41:
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r13
	leaq	16(%rsp), %rsi
	movq	%r13, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r13), %xmm0
	movsd	%xmm0, 72(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%r13), %xmm0
	movsd	%xmm0, 88(%rsp)                 # 8-byte Spill
	movq	(%rsp), %rsi
	movq	%r15, %rdi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movsd	88(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI9_0(%rip), %xmm0
	addsd	72(%rsp), %xmm0                 # 8-byte Folded Reload
	subsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	cmpl	$4, %ebp
	jb	.LBB9_44
# %bb.42:                               # %.lr.ph398.preheader
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.LBB9_43:                               # %.lr.ph398
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r15,%rax,4), %ebx
	incq	%rax
	cmpq	%r12, %rax
	jb	.LBB9_43
.LBB9_44:                               # %._crit_edge399
	movl	$.L.str.11, %edi
	movl	%ebx, %esi
	movl	%r12d, %edx
	movq	80(%rsp), %r13                  # 8-byte Reload
	movl	%r13d, %ecx
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %rbx
	leaq	16(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%rbx), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%rbx), %xmm1
	mulsd	.LCPI9_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	cmpl	$255, %r13d
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	jle	.LBB9_45
# %bb.49:                               # %._crit_edge399
	cmpl	$256, %r13d                     # imm = 0x100
	je	.LBB9_56
# %bb.50:                               # %._crit_edge399
	cmpl	$512, %r13d                     # imm = 0x200
	je	.LBB9_54
# %bb.51:                               # %._crit_edge399
	cmpl	$1024, %r13d                    # imm = 0x400
	jne	.LBB9_60
# %bb.52:
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_60
# %bb.53:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z35__device_stub__reduceCompleteUnrollILj1024EEvPiS0_j
	jmp	.LBB9_60
.LBB9_45:                               # %._crit_edge399
	cmpl	$64, %r13d
	je	.LBB9_58
# %bb.46:                               # %._crit_edge399
	cmpl	$128, %r13d
	jne	.LBB9_60
# %bb.47:
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_60
# %bb.48:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z35__device_stub__reduceCompleteUnrollILj128EEvPiS0_j
	jmp	.LBB9_60
.LBB9_56:
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_60
# %bb.57:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z35__device_stub__reduceCompleteUnrollILj256EEvPiS0_j
	jmp	.LBB9_60
.LBB9_54:
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_60
# %bb.55:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z35__device_stub__reduceCompleteUnrollILj512EEvPiS0_j
	jmp	.LBB9_60
.LBB9_58:
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_60
# %bb.59:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	callq	_Z35__device_stub__reduceCompleteUnrollILj64EEvPiS0_j
.LBB9_60:
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %rbx
	leaq	16(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%rbx), %xmm0
	movsd	%xmm0, 48(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%rbx), %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movq	(%rsp), %rsi
	movq	%r15, %rdi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI9_0(%rip), %xmm0
	xorl	%ebx, %ebx
	addsd	48(%rsp), %xmm0                 # 8-byte Folded Reload
	subsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	cmpl	$4, %ebp
	jb	.LBB9_63
# %bb.61:                               # %.lr.ph404.preheader
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.LBB9_62:                               # %.lr.ph404
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r15,%rax,4), %ebx
	incq	%rax
	cmpq	%r12, %rax
	jb	.LBB9_62
.LBB9_63:                               # %._crit_edge405
	movl	$.L.str.12, %edi
	movl	%ebx, %esi
	movl	%r12d, %edx
	movl	%r13d, %ecx
	movb	$1, %al
	callq	printf
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	callq	hipDeviceReset
	cmpl	100(%rsp), %ebx                 # 4-byte Folded Reload
	je	.LBB9_65
# %bb.64:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB9_65:
	xorl	%eax, %eax
	addq	$1576, %rsp                     # imm = 0x628
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	main, .Lfunc_end9-main
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35__device_stub__reduceCompleteUnrollILj1024EEvPiS0_j,"axG",@progbits,_Z35__device_stub__reduceCompleteUnrollILj1024EEvPiS0_j,comdat
	.weak	_Z35__device_stub__reduceCompleteUnrollILj1024EEvPiS0_j # -- Begin function _Z35__device_stub__reduceCompleteUnrollILj1024EEvPiS0_j
	.type	_Z35__device_stub__reduceCompleteUnrollILj1024EEvPiS0_j,@function
_Z35__device_stub__reduceCompleteUnrollILj1024EEvPiS0_j: # @_Z35__device_stub__reduceCompleteUnrollILj1024EEvPiS0_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20reduceCompleteUnrollILj1024EEvPiS0_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z35__device_stub__reduceCompleteUnrollILj1024EEvPiS0_j, .Lfunc_end10-_Z35__device_stub__reduceCompleteUnrollILj1024EEvPiS0_j
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35__device_stub__reduceCompleteUnrollILj512EEvPiS0_j,"axG",@progbits,_Z35__device_stub__reduceCompleteUnrollILj512EEvPiS0_j,comdat
	.weak	_Z35__device_stub__reduceCompleteUnrollILj512EEvPiS0_j # -- Begin function _Z35__device_stub__reduceCompleteUnrollILj512EEvPiS0_j
	.type	_Z35__device_stub__reduceCompleteUnrollILj512EEvPiS0_j,@function
_Z35__device_stub__reduceCompleteUnrollILj512EEvPiS0_j: # @_Z35__device_stub__reduceCompleteUnrollILj512EEvPiS0_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20reduceCompleteUnrollILj512EEvPiS0_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z35__device_stub__reduceCompleteUnrollILj512EEvPiS0_j, .Lfunc_end11-_Z35__device_stub__reduceCompleteUnrollILj512EEvPiS0_j
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35__device_stub__reduceCompleteUnrollILj256EEvPiS0_j,"axG",@progbits,_Z35__device_stub__reduceCompleteUnrollILj256EEvPiS0_j,comdat
	.weak	_Z35__device_stub__reduceCompleteUnrollILj256EEvPiS0_j # -- Begin function _Z35__device_stub__reduceCompleteUnrollILj256EEvPiS0_j
	.type	_Z35__device_stub__reduceCompleteUnrollILj256EEvPiS0_j,@function
_Z35__device_stub__reduceCompleteUnrollILj256EEvPiS0_j: # @_Z35__device_stub__reduceCompleteUnrollILj256EEvPiS0_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20reduceCompleteUnrollILj256EEvPiS0_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z35__device_stub__reduceCompleteUnrollILj256EEvPiS0_j, .Lfunc_end12-_Z35__device_stub__reduceCompleteUnrollILj256EEvPiS0_j
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35__device_stub__reduceCompleteUnrollILj128EEvPiS0_j,"axG",@progbits,_Z35__device_stub__reduceCompleteUnrollILj128EEvPiS0_j,comdat
	.weak	_Z35__device_stub__reduceCompleteUnrollILj128EEvPiS0_j # -- Begin function _Z35__device_stub__reduceCompleteUnrollILj128EEvPiS0_j
	.type	_Z35__device_stub__reduceCompleteUnrollILj128EEvPiS0_j,@function
_Z35__device_stub__reduceCompleteUnrollILj128EEvPiS0_j: # @_Z35__device_stub__reduceCompleteUnrollILj128EEvPiS0_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20reduceCompleteUnrollILj128EEvPiS0_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z35__device_stub__reduceCompleteUnrollILj128EEvPiS0_j, .Lfunc_end13-_Z35__device_stub__reduceCompleteUnrollILj128EEvPiS0_j
	.cfi_endproc
                                        # -- End function
	.section	.text._Z35__device_stub__reduceCompleteUnrollILj64EEvPiS0_j,"axG",@progbits,_Z35__device_stub__reduceCompleteUnrollILj64EEvPiS0_j,comdat
	.weak	_Z35__device_stub__reduceCompleteUnrollILj64EEvPiS0_j # -- Begin function _Z35__device_stub__reduceCompleteUnrollILj64EEvPiS0_j
	.type	_Z35__device_stub__reduceCompleteUnrollILj64EEvPiS0_j,@function
_Z35__device_stub__reduceCompleteUnrollILj64EEvPiS0_j: # @_Z35__device_stub__reduceCompleteUnrollILj64EEvPiS0_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20reduceCompleteUnrollILj64EEvPiS0_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_Z35__device_stub__reduceCompleteUnrollILj64EEvPiS0_j, .Lfunc_end14-_Z35__device_stub__reduceCompleteUnrollILj64EEvPiS0_j
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB15_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB15_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16reduceNeighboredPiS_j, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20reduceNeighboredLessPiS_j, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17reduceInterleavedPiS_j, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16reduceUnrolling2PiS_j, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16reduceUnrolling4PiS_j, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18reduceUnrollWarps4PiS_j, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z26reduceCompleteUnrollWarps4PiS_j, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20reduceCompleteUnrollILj1024EEvPiS0_j, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20reduceCompleteUnrollILj512EEvPiS0_j, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20reduceCompleteUnrollILj256EEvPiS0_j, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20reduceCompleteUnrollILj128EEvPiS0_j, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20reduceCompleteUnrollILj64EEvPiS0_j, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end15:
	.size	__hip_module_ctor, .Lfunc_end15-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB16_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB16_2:
	retq
.Lfunc_end16:
	.size	__hip_module_dtor, .Lfunc_end16-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16reduceNeighboredPiS_j,@object # @_Z16reduceNeighboredPiS_j
	.section	.rodata,"a",@progbits
	.globl	_Z16reduceNeighboredPiS_j
	.p2align	3, 0x0
_Z16reduceNeighboredPiS_j:
	.quad	_Z31__device_stub__reduceNeighboredPiS_j
	.size	_Z16reduceNeighboredPiS_j, 8

	.type	_Z20reduceNeighboredLessPiS_j,@object # @_Z20reduceNeighboredLessPiS_j
	.globl	_Z20reduceNeighboredLessPiS_j
	.p2align	3, 0x0
_Z20reduceNeighboredLessPiS_j:
	.quad	_Z35__device_stub__reduceNeighboredLessPiS_j
	.size	_Z20reduceNeighboredLessPiS_j, 8

	.type	_Z17reduceInterleavedPiS_j,@object # @_Z17reduceInterleavedPiS_j
	.globl	_Z17reduceInterleavedPiS_j
	.p2align	3, 0x0
_Z17reduceInterleavedPiS_j:
	.quad	_Z32__device_stub__reduceInterleavedPiS_j
	.size	_Z17reduceInterleavedPiS_j, 8

	.type	_Z16reduceUnrolling2PiS_j,@object # @_Z16reduceUnrolling2PiS_j
	.globl	_Z16reduceUnrolling2PiS_j
	.p2align	3, 0x0
_Z16reduceUnrolling2PiS_j:
	.quad	_Z31__device_stub__reduceUnrolling2PiS_j
	.size	_Z16reduceUnrolling2PiS_j, 8

	.type	_Z16reduceUnrolling4PiS_j,@object # @_Z16reduceUnrolling4PiS_j
	.globl	_Z16reduceUnrolling4PiS_j
	.p2align	3, 0x0
_Z16reduceUnrolling4PiS_j:
	.quad	_Z31__device_stub__reduceUnrolling4PiS_j
	.size	_Z16reduceUnrolling4PiS_j, 8

	.type	_Z18reduceUnrollWarps4PiS_j,@object # @_Z18reduceUnrollWarps4PiS_j
	.globl	_Z18reduceUnrollWarps4PiS_j
	.p2align	3, 0x0
_Z18reduceUnrollWarps4PiS_j:
	.quad	_Z33__device_stub__reduceUnrollWarps4PiS_j
	.size	_Z18reduceUnrollWarps4PiS_j, 8

	.type	_Z26reduceCompleteUnrollWarps4PiS_j,@object # @_Z26reduceCompleteUnrollWarps4PiS_j
	.globl	_Z26reduceCompleteUnrollWarps4PiS_j
	.p2align	3, 0x0
_Z26reduceCompleteUnrollWarps4PiS_j:
	.quad	_Z41__device_stub__reduceCompleteUnrollWarps4PiS_j
	.size	_Z26reduceCompleteUnrollWarps4PiS_j, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%s starting reduction at "
	.size	.L.str, 26

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"device %d: %s "
	.size	.L.str.1, 15

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"reduce with array size %d "
	.size	.L.str.2, 27

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"grid %d block %d\n"
	.size	.L.str.3, 18

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"cpu reduce elapsed %f sec cpu_sum: %d \n"
	.size	.L.str.4, 40

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"gpu Neighbored elapsed %f sec gpu_sum: %d <<<grid %d block %d>>>\n"
	.size	.L.str.5, 66

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"gpu Neighbored2 elapsed %f sec gpu_sum: %d <<<grid %d block %d>>>\n"
	.size	.L.str.6, 67

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"gpu Interleaved elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n"
	.size	.L.str.7, 65

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"gpu Unrolling2 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n"
	.size	.L.str.8, 64

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"gpu Unrolling4 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n"
	.size	.L.str.9, 64

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"gpu UnrollWarps4 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n"
	.size	.L.str.10, 66

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"gpu CompleteUnrollWarps4 elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n"
	.size	.L.str.11, 74

	.type	_Z20reduceCompleteUnrollILj1024EEvPiS0_j,@object # @_Z20reduceCompleteUnrollILj1024EEvPiS0_j
	.section	.rodata._Z20reduceCompleteUnrollILj1024EEvPiS0_j,"aG",@progbits,_Z20reduceCompleteUnrollILj1024EEvPiS0_j,comdat
	.weak	_Z20reduceCompleteUnrollILj1024EEvPiS0_j
	.p2align	3, 0x0
_Z20reduceCompleteUnrollILj1024EEvPiS0_j:
	.quad	_Z35__device_stub__reduceCompleteUnrollILj1024EEvPiS0_j
	.size	_Z20reduceCompleteUnrollILj1024EEvPiS0_j, 8

	.type	_Z20reduceCompleteUnrollILj512EEvPiS0_j,@object # @_Z20reduceCompleteUnrollILj512EEvPiS0_j
	.section	.rodata._Z20reduceCompleteUnrollILj512EEvPiS0_j,"aG",@progbits,_Z20reduceCompleteUnrollILj512EEvPiS0_j,comdat
	.weak	_Z20reduceCompleteUnrollILj512EEvPiS0_j
	.p2align	3, 0x0
_Z20reduceCompleteUnrollILj512EEvPiS0_j:
	.quad	_Z35__device_stub__reduceCompleteUnrollILj512EEvPiS0_j
	.size	_Z20reduceCompleteUnrollILj512EEvPiS0_j, 8

	.type	_Z20reduceCompleteUnrollILj256EEvPiS0_j,@object # @_Z20reduceCompleteUnrollILj256EEvPiS0_j
	.section	.rodata._Z20reduceCompleteUnrollILj256EEvPiS0_j,"aG",@progbits,_Z20reduceCompleteUnrollILj256EEvPiS0_j,comdat
	.weak	_Z20reduceCompleteUnrollILj256EEvPiS0_j
	.p2align	3, 0x0
_Z20reduceCompleteUnrollILj256EEvPiS0_j:
	.quad	_Z35__device_stub__reduceCompleteUnrollILj256EEvPiS0_j
	.size	_Z20reduceCompleteUnrollILj256EEvPiS0_j, 8

	.type	_Z20reduceCompleteUnrollILj128EEvPiS0_j,@object # @_Z20reduceCompleteUnrollILj128EEvPiS0_j
	.section	.rodata._Z20reduceCompleteUnrollILj128EEvPiS0_j,"aG",@progbits,_Z20reduceCompleteUnrollILj128EEvPiS0_j,comdat
	.weak	_Z20reduceCompleteUnrollILj128EEvPiS0_j
	.p2align	3, 0x0
_Z20reduceCompleteUnrollILj128EEvPiS0_j:
	.quad	_Z35__device_stub__reduceCompleteUnrollILj128EEvPiS0_j
	.size	_Z20reduceCompleteUnrollILj128EEvPiS0_j, 8

	.type	_Z20reduceCompleteUnrollILj64EEvPiS0_j,@object # @_Z20reduceCompleteUnrollILj64EEvPiS0_j
	.section	.rodata._Z20reduceCompleteUnrollILj64EEvPiS0_j,"aG",@progbits,_Z20reduceCompleteUnrollILj64EEvPiS0_j,comdat
	.weak	_Z20reduceCompleteUnrollILj64EEvPiS0_j
	.p2align	3, 0x0
_Z20reduceCompleteUnrollILj64EEvPiS0_j:
	.quad	_Z35__device_stub__reduceCompleteUnrollILj64EEvPiS0_j
	.size	_Z20reduceCompleteUnrollILj64EEvPiS0_j, 8

	.type	.L.str.12,@object               # @.str.12
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.12:
	.asciz	"gpu CompleteUnroll<template> elaped %f sec gpu_sum %d <<<grid %d block %d>>>\n"
	.size	.L.str.12, 78

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16reduceNeighboredPiS_j"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z20reduceNeighboredLessPiS_j"
	.size	.L__unnamed_2, 30

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z17reduceInterleavedPiS_j"
	.size	.L__unnamed_3, 27

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z16reduceUnrolling2PiS_j"
	.size	.L__unnamed_4, 26

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z16reduceUnrolling4PiS_j"
	.size	.L__unnamed_5, 26

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z18reduceUnrollWarps4PiS_j"
	.size	.L__unnamed_6, 28

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z26reduceCompleteUnrollWarps4PiS_j"
	.size	.L__unnamed_7, 36

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z20reduceCompleteUnrollILj1024EEvPiS0_j"
	.size	.L__unnamed_8, 41

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z20reduceCompleteUnrollILj512EEvPiS0_j"
	.size	.L__unnamed_9, 40

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z20reduceCompleteUnrollILj256EEvPiS0_j"
	.size	.L__unnamed_10, 40

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"_Z20reduceCompleteUnrollILj128EEvPiS0_j"
	.size	.L__unnamed_11, 40

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"_Z20reduceCompleteUnrollILj64EEvPiS0_j"
	.size	.L__unnamed_12, 39

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Test Failed!"
	.size	.Lstr, 13

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__reduceNeighboredPiS_j
	.addrsig_sym _Z35__device_stub__reduceNeighboredLessPiS_j
	.addrsig_sym _Z32__device_stub__reduceInterleavedPiS_j
	.addrsig_sym _Z31__device_stub__reduceUnrolling2PiS_j
	.addrsig_sym _Z31__device_stub__reduceUnrolling4PiS_j
	.addrsig_sym _Z33__device_stub__reduceUnrollWarps4PiS_j
	.addrsig_sym _Z41__device_stub__reduceCompleteUnrollWarps4PiS_j
	.addrsig_sym _Z35__device_stub__reduceCompleteUnrollILj1024EEvPiS0_j
	.addrsig_sym _Z35__device_stub__reduceCompleteUnrollILj512EEvPiS0_j
	.addrsig_sym _Z35__device_stub__reduceCompleteUnrollILj256EEvPiS0_j
	.addrsig_sym _Z35__device_stub__reduceCompleteUnrollILj128EEvPiS0_j
	.addrsig_sym _Z35__device_stub__reduceCompleteUnrollILj64EEvPiS0_j
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16reduceNeighboredPiS_j
	.addrsig_sym _Z20reduceNeighboredLessPiS_j
	.addrsig_sym _Z17reduceInterleavedPiS_j
	.addrsig_sym _Z16reduceUnrolling2PiS_j
	.addrsig_sym _Z16reduceUnrolling4PiS_j
	.addrsig_sym _Z18reduceUnrollWarps4PiS_j
	.addrsig_sym _Z26reduceCompleteUnrollWarps4PiS_j
	.addrsig_sym _Z20reduceCompleteUnrollILj1024EEvPiS0_j
	.addrsig_sym _Z20reduceCompleteUnrollILj512EEvPiS0_j
	.addrsig_sym _Z20reduceCompleteUnrollILj256EEvPiS0_j
	.addrsig_sym _Z20reduceCompleteUnrollILj128EEvPiS0_j
	.addrsig_sym _Z20reduceCompleteUnrollILj64EEvPiS0_j
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16reduceNeighboredPiS_j ; -- Begin function _Z16reduceNeighboredPiS_j
	.globl	_Z16reduceNeighboredPiS_j
	.p2align	8
	.type	_Z16reduceNeighboredPiS_j,@function
_Z16reduceNeighboredPiS_j:              ; @_Z16reduceNeighboredPiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_mov_b32 s2, exec_lo
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s6, v0
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB0_8
; %bb.1:                                ; %.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s7, 0
	s_mov_b32 s4, s15
	s_lshl_b64 s[6:7], s[6:7], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_cmp_lt_u32 s5, 2
	s_cbranch_scc1 .LBB0_6
; %bb.2:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s6, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
	s_mov_b32 s6, 1
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s8, s6, 1
	s_mov_b32 s9, exec_lo
	s_add_i32 s7, s8, -1
	v_and_b32_e32 v3, s7, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[6:7], 2
	v_add_co_u32 v3, vcc_lo, v1, s6
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	global_store_b32 v[1:2], v3, off
.LBB0_5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_cmp_ge_u32 s8, s5
	s_mov_b32 s6, s8
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_3
.LBB0_6:                                ; %._crit_edge
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.7:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB0_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16reduceNeighboredPiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16reduceNeighboredPiS_j, .Lfunc_end0-_Z16reduceNeighboredPiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 320
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z20reduceNeighboredLessPiS_j ; -- Begin function _Z20reduceNeighboredLessPiS_j
	.globl	_Z20reduceNeighboredLessPiS_j
	.p2align	8
	.type	_Z20reduceNeighboredLessPiS_j,@function
_Z20reduceNeighboredLessPiS_j:          ; @_Z20reduceNeighboredLessPiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_mov_b32 s2, exec_lo
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s6, v0
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB1_8
; %bb.1:                                ; %.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s7, 0
	s_mov_b32 s4, s15
	s_lshl_b64 s[6:7], s[6:7], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_cmp_lt_u32 s5, 2
	s_cbranch_scc1 .LBB1_6
; %bb.2:                                ; %.lr.ph.preheader
	v_mov_b32_e32 v2, 0
	s_mov_b32 s6, 1
.LBB1_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_lshl_b32 s8, s6, 1
	s_mov_b32 s9, exec_lo
	v_mul_lo_u32 v1, s8, v0
	v_cmpx_gt_u32_e64 s5, v1
	s_cbranch_execz .LBB1_5
; %bb.4:                                ;   in Loop: Header=BB1_3 Depth=1
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[6:7], s[6:7], 2
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, v3, s6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	s_clause 0x1
	global_load_b32 v1, v[5:6], off
	global_load_b32 v5, v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v5, v1
	global_store_b32 v[3:4], v1, off
.LBB1_5:                                ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_cmp_ge_u32 s8, s5
	s_mov_b32 s6, s8
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_3
.LBB1_6:                                ; %._crit_edge
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_8
; %bb.7:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB1_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20reduceNeighboredLessPiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z20reduceNeighboredLessPiS_j, .Lfunc_end1-_Z20reduceNeighboredLessPiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 328
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17reduceInterleavedPiS_j ; -- Begin function _Z17reduceInterleavedPiS_j
	.globl	_Z17reduceInterleavedPiS_j
	.p2align	8
	.type	_Z17reduceInterleavedPiS_j,@function
_Z17reduceInterleavedPiS_j:             ; @_Z17reduceInterleavedPiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_mov_b32 s2, exec_lo
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s6, v0
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB2_8
; %bb.1:                                ; %.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s7, 0
	s_mov_b32 s4, s15
	s_lshl_b64 s[8:9], s[6:7], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s8
	s_addc_u32 s1, s1, s9
	s_cmp_lt_u32 s5, 2
	s_cbranch_scc1 .LBB2_6
; %bb.2:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s6, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
.LBB2_3:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s6, s5, 1
	s_mov_b32 s8, exec_lo
	v_cmpx_gt_u32_e64 s6, v0
	s_cbranch_execz .LBB2_5
; %bb.4:                                ;   in Loop: Header=BB2_3 Depth=1
	s_lshl_b64 s[10:11], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v3, vcc_lo, v1, s10
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	global_store_b32 v[1:2], v3, off
.LBB2_5:                                ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_3
.LBB2_6:                                ; %._crit_edge
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_8
; %bb.7:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB2_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17reduceInterleavedPiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z17reduceInterleavedPiS_j, .Lfunc_end2-_Z17reduceInterleavedPiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 300
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16reduceUnrolling2PiS_j ; -- Begin function _Z16reduceUnrolling2PiS_j
	.globl	_Z16reduceUnrolling2PiS_j
	.p2align	8
	.type	_Z16reduceUnrolling2PiS_j,@function
_Z16reduceUnrolling2PiS_j:              ; @_Z16reduceUnrolling2PiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s7, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 1
	v_add_nc_u32_e32 v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, s5, v1
	v_cmp_gt_u32_e32 vcc_lo, s7, v3
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB3_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v2
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	global_store_b32 v[1:2], v3, off
.LBB3_2:
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s7, 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_barrier
	s_add_u32 s0, s0, s8
	s_addc_u32 s1, s1, s9
	s_cmp_lt_u32 s5, 2
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_7
; %bb.3:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s6, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
.LBB3_4:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s6, s5, 1
	s_mov_b32 s8, exec_lo
	v_cmpx_gt_u32_e64 s6, v0
	s_cbranch_execz .LBB3_6
; %bb.5:                                ;   in Loop: Header=BB3_4 Depth=1
	s_lshl_b64 s[10:11], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v3, vcc_lo, v1, s10
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	global_store_b32 v[1:2], v3, off
.LBB3_6:                                ;   in Loop: Header=BB3_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB3_4
.LBB3_7:                                ; %._crit_edge
	s_mov_b32 s5, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_9
; %bb.8:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB3_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16reduceUnrolling2PiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z16reduceUnrolling2PiS_j, .Lfunc_end3-_Z16reduceUnrolling2PiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 428
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16reduceUnrolling4PiS_j ; -- Begin function _Z16reduceUnrolling4PiS_j
	.globl	_Z16reduceUnrolling4PiS_j
	.p2align	8
	.type	_Z16reduceUnrolling4PiS_j,@function
_Z16reduceUnrolling4PiS_j:              ; @_Z16reduceUnrolling4PiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s7, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 2
	v_add_nc_u32_e32 v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s5, 3, v[1:2]
	v_cmp_gt_u32_e32 vcc_lo, s7, v3
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB4_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_dual_mov_b32 v4, v2 :: v_dual_add_nc_u32 v1, s5, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_add_nc_u32_e32 v1, s5, v1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_clause 0x3
	global_load_b32 v9, v[5:6], off
	global_load_b32 v7, v[7:8], off
	global_load_b32 v1, v[1:2], off
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v3, v7, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v1, v3, v1, v2
	global_store_b32 v[5:6], v1, off
.LBB4_2:
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s7, 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_barrier
	s_add_u32 s0, s0, s8
	s_addc_u32 s1, s1, s9
	s_cmp_lt_u32 s5, 2
	buffer_gl0_inv
	s_cbranch_scc1 .LBB4_7
; %bb.3:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s6, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
.LBB4_4:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s6, s5, 1
	s_mov_b32 s8, exec_lo
	v_cmpx_gt_u32_e64 s6, v0
	s_cbranch_execz .LBB4_6
; %bb.5:                                ;   in Loop: Header=BB4_4 Depth=1
	s_lshl_b64 s[10:11], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v3, vcc_lo, v1, s10
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	global_store_b32 v[1:2], v3, off
.LBB4_6:                                ;   in Loop: Header=BB4_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB4_4
.LBB4_7:                                ; %._crit_edge
	s_mov_b32 s5, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB4_9
; %bb.8:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB4_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16reduceUnrolling4PiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z16reduceUnrolling4PiS_j, .Lfunc_end4-_Z16reduceUnrolling4PiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 512
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z18reduceUnrollWarps4PiS_j ; -- Begin function _Z18reduceUnrollWarps4PiS_j
	.globl	_Z18reduceUnrollWarps4PiS_j
	.p2align	8
	.type	_Z18reduceUnrollWarps4PiS_j,@function
_Z18reduceUnrollWarps4PiS_j:            ; @_Z18reduceUnrollWarps4PiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s7, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 2
	v_add_nc_u32_e32 v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s5, 3, v[1:2]
	v_cmp_gt_u32_e32 vcc_lo, s7, v3
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB5_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_dual_mov_b32 v4, v2 :: v_dual_add_nc_u32 v1, s5, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_add_nc_u32_e32 v1, s5, v1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_clause 0x3
	global_load_b32 v9, v[5:6], off
	global_load_b32 v7, v[7:8], off
	global_load_b32 v1, v[1:2], off
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v3, v7, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v1, v3, v1, v2
	global_store_b32 v[5:6], v1, off
.LBB5_2:
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s7, 0
	v_lshlrev_b32_e32 v3, 2, v0
	s_lshl_b64 s[8:9], s[6:7], 2
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_add_u32 s0, s0, s8
	s_addc_u32 s1, s1, s9
	s_cmpk_lt_u32 s5, 0x42
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB5_7
; %bb.3:                                ; %.lr.ph
	v_add_co_u32 v1, s6, s0, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
.LBB5_4:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s6, s5, 1
	s_mov_b32 s8, exec_lo
	v_cmpx_gt_u32_e64 s6, v0
	s_cbranch_execz .LBB5_6
; %bb.5:                                ;   in Loop: Header=BB5_4 Depth=1
	s_lshl_b64 s[10:11], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v4, vcc_lo, v1, s10
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[4:5], off
	global_load_b32 v5, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v5, v4
	global_store_b32 v[1:2], v4, off
.LBB5_6:                                ;   in Loop: Header=BB5_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_cmpk_lt_u32 s5, 0x84
	s_mov_b32 s5, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB5_4
.LBB5_7:                                ; %._crit_edge
	s_mov_b32 s5, exec_lo
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB5_9
; %bb.8:
	v_or_b32_e32 v1, 0x80, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s6, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
	v_add_co_u32 v3, s6, s0, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, null, s1, 0, s6
	flat_load_b32 v1, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:64 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:32 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:16 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:8 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:4 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB5_9:
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s5, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB5_11
; %bb.10:
	v_mov_b32_e32 v0, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB5_11:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18reduceUnrollWarps4PiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z18reduceUnrollWarps4PiS_j, .Lfunc_end5-_Z18reduceUnrollWarps4PiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 808
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z26reduceCompleteUnrollWarps4PiS_j ; -- Begin function _Z26reduceCompleteUnrollWarps4PiS_j
	.globl	_Z26reduceCompleteUnrollWarps4PiS_j
	.p2align	8
	.type	_Z26reduceCompleteUnrollWarps4PiS_j,@function
_Z26reduceCompleteUnrollWarps4PiS_j:    ; @_Z26reduceCompleteUnrollWarps4PiS_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s7, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 2
	v_add_nc_u32_e32 v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s5, 3, v[1:2]
	v_cmp_gt_u32_e32 vcc_lo, s7, v3
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB6_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_dual_mov_b32 v4, v2 :: v_dual_add_nc_u32 v1, s5, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_add_nc_u32_e32 v1, s5, v1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_clause 0x3
	global_load_b32 v9, v[5:6], off
	global_load_b32 v7, v[7:8], off
	global_load_b32 v1, v[1:2], off
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v3, v7, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v1, v3, v1, v2
	global_store_b32 v[5:6], v1, off
.LBB6_2:
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s7, 0
	v_cmp_gt_u32_e32 vcc_lo, 0x200, v0
	s_lshl_b64 s[6:7], s[6:7], 2
	v_lshlrev_b32_e32 v1, 2, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_cmpk_gt_u32 s5, 0x3ff
	s_waitcnt_vscnt null, 0x0
	s_cselect_b32 s6, -1, 0
	s_barrier
	s_and_b32 s7, vcc_lo, s6
	buffer_gl0_inv
	s_and_saveexec_b32 s6, s7
	s_cbranch_execz .LBB6_4
; %bb.3:
	s_clause 0x1
	global_load_b32 v2, v1, s[0:1] offset:2048
	global_load_b32 v3, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v1, v2, s[0:1]
.LBB6_4:
	s_or_b32 exec_lo, exec_lo, s6
	v_cmp_gt_u32_e32 vcc_lo, 0x100, v0
	s_cmpk_gt_u32 s5, 0x1ff
	s_waitcnt_vscnt null, 0x0
	s_cselect_b32 s6, -1, 0
	s_barrier
	s_and_b32 s7, vcc_lo, s6
	buffer_gl0_inv
	s_and_saveexec_b32 s6, s7
	s_cbranch_execz .LBB6_6
; %bb.5:
	s_clause 0x1
	global_load_b32 v2, v1, s[0:1] offset:1024
	global_load_b32 v3, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v1, v2, s[0:1]
.LBB6_6:
	s_or_b32 exec_lo, exec_lo, s6
	v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
	s_cmpk_gt_u32 s5, 0xff
	s_waitcnt_vscnt null, 0x0
	s_cselect_b32 s6, -1, 0
	s_barrier
	s_and_b32 s7, vcc_lo, s6
	buffer_gl0_inv
	s_and_saveexec_b32 s6, s7
	s_cbranch_execz .LBB6_8
; %bb.7:
	s_clause 0x1
	global_load_b32 v2, v1, s[0:1] offset:512
	global_load_b32 v3, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v1, v2, s[0:1]
.LBB6_8:
	s_or_b32 exec_lo, exec_lo, s6
	v_cmp_gt_u32_e32 vcc_lo, 64, v0
	s_cmpk_gt_u32 s5, 0x7f
	s_waitcnt_vscnt null, 0x0
	s_cselect_b32 s5, -1, 0
	s_barrier
	s_and_b32 s6, vcc_lo, s5
	buffer_gl0_inv
	s_and_saveexec_b32 s5, s6
	s_cbranch_execz .LBB6_10
; %bb.9:
	s_clause 0x1
	global_load_b32 v2, v1, s[0:1] offset:256
	global_load_b32 v3, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v1, v2, s[0:1]
.LBB6_10:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB6_12
; %bb.11:
	v_or_b32_e32 v2, 0x80, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s6, s0, v2
	v_add_co_ci_u32_e64 v3, null, s1, 0, s6
	v_add_co_u32 v4, s6, s0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, null, s1, 0, s6
	flat_load_b32 v1, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:64 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:32 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:16 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:8 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:4 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB6_12:
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s5, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB6_14
; %bb.13:
	v_mov_b32_e32 v0, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB6_14:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z26reduceCompleteUnrollWarps4PiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z26reduceCompleteUnrollWarps4PiS_j, .Lfunc_end6-_Z26reduceCompleteUnrollWarps4PiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1008
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z20reduceCompleteUnrollILj1024EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj1024EEvPiS0_j,comdat
	.protected	_Z20reduceCompleteUnrollILj1024EEvPiS0_j ; -- Begin function _Z20reduceCompleteUnrollILj1024EEvPiS0_j
	.globl	_Z20reduceCompleteUnrollILj1024EEvPiS0_j
	.p2align	8
	.type	_Z20reduceCompleteUnrollILj1024EEvPiS0_j,@function
_Z20reduceCompleteUnrollILj1024EEvPiS0_j: ; @_Z20reduceCompleteUnrollILj1024EEvPiS0_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s5, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s2, 0xffff
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s15, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 2
	v_add_nc_u32_e32 v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s7, 3, v[1:2]
	v_cmp_gt_u32_e32 vcc_lo, s5, v3
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB7_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_dual_mov_b32 v4, v2 :: v_dual_add_nc_u32 v1, s7, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_add_nc_u32_e32 v1, s7, v1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_clause 0x3
	global_load_b32 v9, v[5:6], off
	global_load_b32 v7, v[7:8], off
	global_load_b32 v1, v[1:2], off
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v3, v7, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v1, v3, v1, v2
	global_store_b32 v[5:6], v1, off
.LBB7_2:
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s7, 0
	v_lshlrev_b32_e32 v1, 2, v0
	s_lshl_b64 s[6:7], s[6:7], 2
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x200, v0
	s_cbranch_execz .LBB7_4
; %bb.3:
	v_or_b32_e32 v2, 0x800, v1
	s_clause 0x1
	global_load_b32 v2, v2, s[0:1]
	global_load_b32 v3, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v1, v2, s[0:1]
.LBB7_4:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x100, v0
	s_cbranch_execz .LBB7_6
; %bb.5:
	v_or_b32_e32 v2, 0x400, v1
	s_clause 0x1
	global_load_b32 v2, v2, s[0:1]
	global_load_b32 v3, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v1, v2, s[0:1]
.LBB7_6:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x80, v0
	s_cbranch_execz .LBB7_8
; %bb.7:
	v_or_b32_e32 v2, 0x200, v1
	s_clause 0x1
	global_load_b32 v2, v2, s[0:1]
	global_load_b32 v3, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v1, v2, s[0:1]
.LBB7_8:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 64, v0
	s_cbranch_execz .LBB7_10
; %bb.9:
	v_or_b32_e32 v2, 0x100, v1
	s_clause 0x1
	global_load_b32 v2, v2, s[0:1]
	global_load_b32 v3, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v1, v2, s[0:1]
.LBB7_10:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB7_12
; %bb.11:
	v_or_b32_e32 v2, 0x80, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s6, s0, v2
	v_add_co_ci_u32_e64 v3, null, s1, 0, s6
	v_add_co_u32 v4, s6, s0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, null, s1, 0, s6
	flat_load_b32 v1, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:64 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:32 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:16 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:8 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:4 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB7_12:
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s5, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB7_14
; %bb.13:
	v_mov_b32_e32 v0, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB7_14:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20reduceCompleteUnrollILj1024EEvPiS0_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z20reduceCompleteUnrollILj1024EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj1024EEvPiS0_j,comdat
.Lfunc_end7:
	.size	_Z20reduceCompleteUnrollILj1024EEvPiS0_j, .Lfunc_end7-_Z20reduceCompleteUnrollILj1024EEvPiS0_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1004
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z20reduceCompleteUnrollILj512EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj512EEvPiS0_j,comdat
	.protected	_Z20reduceCompleteUnrollILj512EEvPiS0_j ; -- Begin function _Z20reduceCompleteUnrollILj512EEvPiS0_j
	.globl	_Z20reduceCompleteUnrollILj512EEvPiS0_j
	.p2align	8
	.type	_Z20reduceCompleteUnrollILj512EEvPiS0_j,@function
_Z20reduceCompleteUnrollILj512EEvPiS0_j: ; @_Z20reduceCompleteUnrollILj512EEvPiS0_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s5, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s2, 0xffff
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s15, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 2
	v_add_nc_u32_e32 v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s7, 3, v[1:2]
	v_cmp_gt_u32_e32 vcc_lo, s5, v3
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB8_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_dual_mov_b32 v4, v2 :: v_dual_add_nc_u32 v1, s7, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_add_nc_u32_e32 v1, s7, v1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_clause 0x3
	global_load_b32 v9, v[5:6], off
	global_load_b32 v7, v[7:8], off
	global_load_b32 v1, v[1:2], off
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v3, v7, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v1, v3, v1, v2
	global_store_b32 v[5:6], v1, off
.LBB8_2:
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s7, 0
	v_lshlrev_b32_e32 v1, 2, v0
	s_lshl_b64 s[6:7], s[6:7], 2
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x100, v0
	s_cbranch_execz .LBB8_4
; %bb.3:
	v_or_b32_e32 v2, 0x400, v1
	s_clause 0x1
	global_load_b32 v2, v2, s[0:1]
	global_load_b32 v3, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v1, v2, s[0:1]
.LBB8_4:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x80, v0
	s_cbranch_execz .LBB8_6
; %bb.5:
	v_or_b32_e32 v2, 0x200, v1
	s_clause 0x1
	global_load_b32 v2, v2, s[0:1]
	global_load_b32 v3, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v1, v2, s[0:1]
.LBB8_6:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 64, v0
	s_cbranch_execz .LBB8_8
; %bb.7:
	v_or_b32_e32 v2, 0x100, v1
	s_clause 0x1
	global_load_b32 v2, v2, s[0:1]
	global_load_b32 v3, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v1, v2, s[0:1]
.LBB8_8:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB8_10
; %bb.9:
	v_or_b32_e32 v2, 0x80, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s6, s0, v2
	v_add_co_ci_u32_e64 v3, null, s1, 0, s6
	v_add_co_u32 v4, s6, s0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, null, s1, 0, s6
	flat_load_b32 v1, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:64 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:32 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:16 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:8 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:4 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB8_10:
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s5, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB8_12
; %bb.11:
	v_mov_b32_e32 v0, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB8_12:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20reduceCompleteUnrollILj512EEvPiS0_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z20reduceCompleteUnrollILj512EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj512EEvPiS0_j,comdat
.Lfunc_end8:
	.size	_Z20reduceCompleteUnrollILj512EEvPiS0_j, .Lfunc_end8-_Z20reduceCompleteUnrollILj512EEvPiS0_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 932
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z20reduceCompleteUnrollILj256EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj256EEvPiS0_j,comdat
	.protected	_Z20reduceCompleteUnrollILj256EEvPiS0_j ; -- Begin function _Z20reduceCompleteUnrollILj256EEvPiS0_j
	.globl	_Z20reduceCompleteUnrollILj256EEvPiS0_j
	.p2align	8
	.type	_Z20reduceCompleteUnrollILj256EEvPiS0_j,@function
_Z20reduceCompleteUnrollILj256EEvPiS0_j: ; @_Z20reduceCompleteUnrollILj256EEvPiS0_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s5, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s2, 0xffff
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s15, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 2
	v_add_nc_u32_e32 v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s7, 3, v[1:2]
	v_cmp_gt_u32_e32 vcc_lo, s5, v3
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB9_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_dual_mov_b32 v4, v2 :: v_dual_add_nc_u32 v1, s7, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_add_nc_u32_e32 v1, s7, v1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_clause 0x3
	global_load_b32 v9, v[5:6], off
	global_load_b32 v7, v[7:8], off
	global_load_b32 v1, v[1:2], off
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v3, v7, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v1, v3, v1, v2
	global_store_b32 v[5:6], v1, off
.LBB9_2:
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s7, 0
	v_lshlrev_b32_e32 v1, 2, v0
	s_lshl_b64 s[6:7], s[6:7], 2
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x80, v0
	s_cbranch_execz .LBB9_4
; %bb.3:
	v_or_b32_e32 v2, 0x200, v1
	s_clause 0x1
	global_load_b32 v2, v2, s[0:1]
	global_load_b32 v3, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v1, v2, s[0:1]
.LBB9_4:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 64, v0
	s_cbranch_execz .LBB9_6
; %bb.5:
	v_or_b32_e32 v2, 0x100, v1
	s_clause 0x1
	global_load_b32 v2, v2, s[0:1]
	global_load_b32 v3, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v1, v2, s[0:1]
.LBB9_6:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB9_8
; %bb.7:
	v_or_b32_e32 v2, 0x80, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s6, s0, v2
	v_add_co_ci_u32_e64 v3, null, s1, 0, s6
	v_add_co_u32 v4, s6, s0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, null, s1, 0, s6
	flat_load_b32 v1, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:64 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:32 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:16 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:8 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:4 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB9_8:
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s5, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB9_10
; %bb.9:
	v_mov_b32_e32 v0, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB9_10:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20reduceCompleteUnrollILj256EEvPiS0_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z20reduceCompleteUnrollILj256EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj256EEvPiS0_j,comdat
.Lfunc_end9:
	.size	_Z20reduceCompleteUnrollILj256EEvPiS0_j, .Lfunc_end9-_Z20reduceCompleteUnrollILj256EEvPiS0_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 860
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z20reduceCompleteUnrollILj128EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj128EEvPiS0_j,comdat
	.protected	_Z20reduceCompleteUnrollILj128EEvPiS0_j ; -- Begin function _Z20reduceCompleteUnrollILj128EEvPiS0_j
	.globl	_Z20reduceCompleteUnrollILj128EEvPiS0_j
	.p2align	8
	.type	_Z20reduceCompleteUnrollILj128EEvPiS0_j,@function
_Z20reduceCompleteUnrollILj128EEvPiS0_j: ; @_Z20reduceCompleteUnrollILj128EEvPiS0_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s5, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s2, 0xffff
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s15, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 2
	v_add_nc_u32_e32 v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s7, 3, v[1:2]
	v_cmp_gt_u32_e32 vcc_lo, s5, v3
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB10_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_dual_mov_b32 v4, v2 :: v_dual_add_nc_u32 v1, s7, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_add_nc_u32_e32 v1, s7, v1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_clause 0x3
	global_load_b32 v9, v[5:6], off
	global_load_b32 v7, v[7:8], off
	global_load_b32 v1, v[1:2], off
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v3, v7, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v1, v3, v1, v2
	global_store_b32 v[5:6], v1, off
.LBB10_2:
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s7, 0
	v_lshlrev_b32_e32 v1, 2, v0
	s_lshl_b64 s[6:7], s[6:7], 2
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 64, v0
	s_cbranch_execz .LBB10_4
; %bb.3:
	v_or_b32_e32 v2, 0x100, v1
	s_clause 0x1
	global_load_b32 v2, v2, s[0:1]
	global_load_b32 v3, v1, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v1, v2, s[0:1]
.LBB10_4:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB10_6
; %bb.5:
	v_or_b32_e32 v2, 0x80, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s6, s0, v2
	v_add_co_ci_u32_e64 v3, null, s1, 0, s6
	v_add_co_u32 v4, s6, s0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, null, s1, 0, s6
	flat_load_b32 v1, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:64 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:32 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:16 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:8 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] offset:4 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB10_6:
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s5, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB10_8
; %bb.7:
	v_mov_b32_e32 v0, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB10_8:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20reduceCompleteUnrollILj128EEvPiS0_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z20reduceCompleteUnrollILj128EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj128EEvPiS0_j,comdat
.Lfunc_end10:
	.size	_Z20reduceCompleteUnrollILj128EEvPiS0_j, .Lfunc_end10-_Z20reduceCompleteUnrollILj128EEvPiS0_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 788
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z20reduceCompleteUnrollILj64EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj64EEvPiS0_j,comdat
	.protected	_Z20reduceCompleteUnrollILj64EEvPiS0_j ; -- Begin function _Z20reduceCompleteUnrollILj64EEvPiS0_j
	.globl	_Z20reduceCompleteUnrollILj64EEvPiS0_j
	.p2align	8
	.type	_Z20reduceCompleteUnrollILj64EEvPiS0_j,@function
_Z20reduceCompleteUnrollILj64EEvPiS0_j: ; @_Z20reduceCompleteUnrollILj64EEvPiS0_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s5, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s2, 0xffff
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s15, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 2
	v_add_nc_u32_e32 v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s7, 3, v[1:2]
	v_cmp_gt_u32_e32 vcc_lo, s5, v3
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB11_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_dual_mov_b32 v4, v2 :: v_dual_add_nc_u32 v1, s7, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_add_nc_u32_e32 v1, s7, v1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_clause 0x3
	global_load_b32 v9, v[5:6], off
	global_load_b32 v7, v[7:8], off
	global_load_b32 v1, v[1:2], off
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v3, v7, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v1, v3, v1, v2
	global_store_b32 v[5:6], v1, off
.LBB11_2:
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s7, 0
	s_mov_b32 s5, exec_lo
	s_lshl_b64 s[6:7], s[6:7], 2
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
	s_barrier
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB11_4
; %bb.3:
	v_lshlrev_b32_e32 v3, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v1, 0x80, v3
	v_add_co_u32 v1, s6, s0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s1, 0, s6
	v_add_co_u32 v3, s6, s0, v3
	v_add_co_ci_u32_e64 v4, null, s1, 0, s6
	flat_load_b32 v1, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:64 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:32 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:16 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:8 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[3:4] offset:4 glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v2, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	flat_store_b32 v[3:4], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB11_4:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB11_6
; %bb.5:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	global_load_b32 v1, v0, s[0:1]
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB11_6:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20reduceCompleteUnrollILj64EEvPiS0_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z20reduceCompleteUnrollILj64EEvPiS0_j,"axG",@progbits,_Z20reduceCompleteUnrollILj64EEvPiS0_j,comdat
.Lfunc_end11:
	.size	_Z20reduceCompleteUnrollILj64EEvPiS0_j, .Lfunc_end11-_Z20reduceCompleteUnrollILj64EEvPiS0_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 724
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16reduceNeighboredPiS_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16reduceNeighboredPiS_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20reduceNeighboredLessPiS_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20reduceNeighboredLessPiS_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17reduceInterleavedPiS_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17reduceInterleavedPiS_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16reduceUnrolling2PiS_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16reduceUnrolling2PiS_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16reduceUnrolling4PiS_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16reduceUnrolling4PiS_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18reduceUnrollWarps4PiS_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18reduceUnrollWarps4PiS_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z26reduceCompleteUnrollWarps4PiS_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z26reduceCompleteUnrollWarps4PiS_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20reduceCompleteUnrollILj1024EEvPiS0_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20reduceCompleteUnrollILj1024EEvPiS0_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20reduceCompleteUnrollILj512EEvPiS0_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20reduceCompleteUnrollILj512EEvPiS0_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20reduceCompleteUnrollILj256EEvPiS0_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20reduceCompleteUnrollILj256EEvPiS0_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20reduceCompleteUnrollILj128EEvPiS0_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20reduceCompleteUnrollILj128EEvPiS0_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20reduceCompleteUnrollILj64EEvPiS0_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20reduceCompleteUnrollILj64EEvPiS0_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
