#include <iostream>
#include <math.h>

// Kernel function to determine depth of mandelbrot at cr, ci
__device__ unsigned int mandelDepth(float cr, float ci, int maxDepth)
{
    float zr = 0.0f;
    float zi = 0.0f;
    float zrSqr = 0.0f;
    float ziSqr = 0.0f;

    unsigned int i;

    for (i = 0; i < maxDepth; i++)
    {
        zi = zr * zi;
        zi += zi + ci;
        zr = zrSqr - ziSqr + cr;
        zrSqr = zr * zr;
        ziSqr = zi * zi;

        if (zrSqr + ziSqr > 4.0f) break;
    }

    return i;
}

__device__ float3 color(unsigned int depth, unsigned int maxDepth)
{
    if(depth == maxDepth)
        return make_float3(0.0f, 0.0f, 0.0f);
    else
        return make_float3(1.0f, 1.0f, 1.0f);
}

__global__ void mandel(float* buffer, 
    float xMin, float xMax,
    float yMin, float yMax,
    unsigned int maxDepth)
{
    int nx = blockDim.x;
    int ny = gridDim.x;
    float dx = (xMax - xMin) / nx;
    float dy = (yMax - yMin) / ny;
    float x = xMin + (threadIdx.x + 0.5f) * dx;
    float y = yMin + (blockIdx.x + 0.5f) * dy;

    unsigned int depth = mandelDepth(x, y, maxDepth);
    float3 depthColor = color(depth, maxDepth);

    int index = blockIdx.x*blockDim.x + threadIdx.x;
    buffer[3*index + 0] = depthColor.x;
    buffer[3*index + 1] = depthColor.y;
    buffer[3*index + 2] = depthColor.z;
}


int main(void)
{
    float xMin = -2.0f;
    float xMax = 1.0f;
    float yMin = -1.0f;
    float yMax = 1.0f;
    float step = 0.005f; 

    int nx = (xMax - xMin) / step;
    int ny = (yMax - yMin) / step;
    float* buffer;

    // Allocate Unified Memory – accessible from CPU or GPU
    cudaMallocManaged(&buffer, 3*nx*ny*sizeof(float));

    // Run kernel on nx*ny elements on the GPU
    mandel<<<ny, nx>>>(buffer, 
        xMin, xMax,
        yMin, yMax,
        100
    );

    // Wait for GPU to finish before accessing on host
    cudaDeviceSynchronize();

    // Print the buffer out to command
    std::cout << "P3\n" << nx << " " << ny << "\n255\n";
    for (int j = ny-1; j >= 0; j--)
        for (int i = 0; i < nx; i++)
        {
            float* triplet = buffer + 3*(j*nx + i);
            int ir = int(255.99f * triplet[0]);
            int ig = int(255.99f * triplet[1]);
            int ib = int(255.99f * triplet[2]);
            std::cout << ir << " " << ig << " " << ib << "\n";
        }

    // Free memory
    cudaFree(buffer);
  
    return 0;
}

	.file	"tmpxft_00219c0c_00000000-6_mandelbrot.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11mandelDepthffi
	.type	_Z11mandelDepthffi, @function
_Z11mandelDepthffi:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z11mandelDepthffi, .-_Z11mandelDepthffi
	.globl	_Z5colorjj
	.type	_Z5colorjj, @function
_Z5colorjj:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3636:
	.size	_Z5colorjj, .-_Z5colorjj
	.globl	_Z30__device_stub__Z6mandelPfffffjPfffffj
	.type	_Z30__device_stub__Z6mandelPfffffjPfffffj, @function
_Z30__device_stub__Z6mandelPfffffjPfffffj:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	40(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	56(%rsp), %rdi
	leaq	68(%rsp), %rsi
	movss	%xmm0, 20(%rsp)
	movss	%xmm1, 16(%rsp)
	movss	%xmm2, 12(%rsp)
	movss	%xmm3, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z6mandelPfffffj(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L6:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z30__device_stub__Z6mandelPfffffjPfffffj, .-_Z30__device_stub__Z6mandelPfffffjPfffffj
	.globl	_Z6mandelPfffffj
	.type	_Z6mandelPfffffj, @function
_Z6mandelPfffffj:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6mandelPfffffjPfffffj
	.cfi_endproc
.LFE3663:
	.size	_Z6mandelPfffffj, .-_Z6mandelPfffffj
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"P3\n"
.LC4:
	.string	" "
.LC5:
	.string	"\n255\n"
.LC7:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1, %edx
	movl	$2880000, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movl	$536870987, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$268435481, %edi
	salq	$3, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$4, %rdi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movss	.LC0(%rip), %xmm3
	movq	8(%rsp), %rdi
	movl	$100, %esi
	movss	.LC1(%rip), %xmm2
	movss	.LC2(%rip), %xmm0
	movaps	%xmm3, %xmm1
	call	_Z30__device_stub__Z6mandelPfffffjPfffffj
.L13:
	leaq	_ZSt4cout(%rip), %r12
	leaq	.LC4(%rip), %rbp
	movl	$2872800, %r15d
	call	cudaDeviceSynchronize@PLT
	leaq	.LC3(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$600, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$400, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	.LC6(%rip), %xmm0
.L14:
	xorl	%ebx, %ebx
.L15:
	imulq	$12, %rbx, %rax
	movq	%r12, %rdi
	incq	%rbx
	addq	%r15, %rax
	addq	8(%rsp), %rax
	movss	4(%rax), %xmm1
	mulss	%xmm0, %xmm1
	cvttss2sil	%xmm1, %r14d
	movss	8(%rax), %xmm1
	mulss	%xmm0, %xmm1
	cvttss2sil	%xmm1, %r13d
	movss	(%rax), %xmm1
	mulss	%xmm0, %xmm1
	cvttss2sil	%xmm1, %esi
	call	_ZNSolsEi@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r13d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$600, %rbx
	movss	.LC6(%rip), %xmm0
	jne	.L15
	subq	$7200, %r15
	cmpq	$-7200, %r15
	jne	.L14
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z6mandelPfffffj"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6mandelPfffffj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.align 4
.LC1:
	.long	-1082130432
	.align 4
.LC2:
	.long	-1073741824
	.align 4
.LC6:
	.long	1132461425
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>

// Kernel function to determine depth of mandelbrot at cr, ci
__device__ unsigned int mandelDepth(float cr, float ci, int maxDepth)
{
    float zr = 0.0f;
    float zi = 0.0f;
    float zrSqr = 0.0f;
    float ziSqr = 0.0f;

    unsigned int i;

    for (i = 0; i < maxDepth; i++)
    {
        zi = zr * zi;
        zi += zi + ci;
        zr = zrSqr - ziSqr + cr;
        zrSqr = zr * zr;
        ziSqr = zi * zi;

        if (zrSqr + ziSqr > 4.0f) break;
    }

    return i;
}

__device__ float3 color(unsigned int depth, unsigned int maxDepth)
{
    if(depth == maxDepth)
        return make_float3(0.0f, 0.0f, 0.0f);
    else
        return make_float3(1.0f, 1.0f, 1.0f);
}

__global__ void mandel(float* buffer, 
    float xMin, float xMax,
    float yMin, float yMax,
    unsigned int maxDepth)
{
    int nx = blockDim.x;
    int ny = gridDim.x;
    float dx = (xMax - xMin) / nx;
    float dy = (yMax - yMin) / ny;
    float x = xMin + (threadIdx.x + 0.5f) * dx;
    float y = yMin + (blockIdx.x + 0.5f) * dy;

    unsigned int depth = mandelDepth(x, y, maxDepth);
    float3 depthColor = color(depth, maxDepth);

    int index = blockIdx.x*blockDim.x + threadIdx.x;
    buffer[3*index + 0] = depthColor.x;
    buffer[3*index + 1] = depthColor.y;
    buffer[3*index + 2] = depthColor.z;
}


int main(void)
{
    float xMin = -2.0f;
    float xMax = 1.0f;
    float yMin = -1.0f;
    float yMax = 1.0f;
    float step = 0.005f; 

    int nx = (xMax - xMin) / step;
    int ny = (yMax - yMin) / step;
    float* buffer;

    // Allocate Unified Memory – accessible from CPU or GPU
    hipMallocManaged(&buffer, 3*nx*ny*sizeof(float));

    // Run kernel on nx*ny elements on the GPU
    mandel<<<ny, nx>>>(buffer, 
        xMin, xMax,
        yMin, yMax,
        100
    );

    // Wait for GPU to finish before accessing on host
    hipDeviceSynchronize();

    // Print the buffer out to command
    std::cout << "P3\n" << nx << " " << ny << "\n255\n";
    for (int j = ny-1; j >= 0; j--)
        for (int i = 0; i < nx; i++)
        {
            float* triplet = buffer + 3*(j*nx + i);
            int ir = int(255.99f * triplet[0]);
            int ig = int(255.99f * triplet[1]);
            int ib = int(255.99f * triplet[2]);
            std::cout << ir << " " << ig << " " << ib << "\n";
        }

    // Free memory
    hipFree(buffer);
  
    return 0;
}

	.text
	.file	"mandelbrot.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__mandelPfffffj # -- Begin function _Z21__device_stub__mandelPfffffj
	.type	_Z21__device_stub__mandelPfffffj,@function
_Z21__device_stub__mandelPfffffj:       # @_Z21__device_stub__mandelPfffffj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	16(%rsp), %rdx
	movss	%xmm1, (%rdx)
	leaq	12(%rsp), %rdi
	movss	%xmm2, (%rdi)
	leaq	8(%rsp), %r8
	movss	%xmm3, (%r8)
	leaq	4(%rsp), %r9
	movl	%esi, (%r9)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	movq	%rdi, 24(%rbx)
	movq	%r8, 32(%rbx)
	movq	%r9, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6mandelPfffffj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__mandelPfffffj, .Lfunc_end0-_Z21__device_stub__mandelPfffffj
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0xc0000000                      # float -2
.LCPI1_1:
	.long	0xbf800000                      # float -1
.LCPI1_2:
	.long	0x3f800000                      # float 1
.LCPI1_3:
	.long	0x437ffd71                      # float 255.990005
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsp, %rdi
	movl	$2880000, %esi                  # imm = 0x2BF200
	movl	$1, %edx
	callq	hipMallocManaged
	movabsq	$4294967696, %rdi               # imm = 0x100000190
	leaq	200(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	(%rsp), %rdi
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI1_1(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	movss	.LCPI1_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movaps	%xmm1, %xmm3
	movl	$100, %esi
	callq	_Z21__device_stub__mandelPfffffj
.LBB1_2:
	callq	hipDeviceSynchronize
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$3, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$600, %esi                      # imm = 0x258
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	_ZNSolsEi
	movl	$.L.str.2, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$399, %r15d                     # imm = 0x18F
	movl	$2872808, %r12d                 # imm = 0x2BD5E8
	movss	.LCPI1_3(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
.LBB1_3:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	xorl	%r13d, %r13d
.LBB1_4:                                #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%rsp), %rax
	addq	%r12, %rax
	movss	-8(%r13,%rax), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	cvttss2si	%xmm0, %esi
	movss	-4(%r13,%rax), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	cvttss2si	%xmm0, %ebx
	movss	(%r13,%rax), %xmm0              # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	cvttss2si	%xmm0, %ebp
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movl	$.L.str.3, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	.LCPI1_3(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	addq	$12, %r13
	cmpq	$7200, %r13                     # imm = 0x1C20
	jne	.LBB1_4
# %bb.5:                                #   in Loop: Header=BB1_3 Depth=1
	addq	$-7200, %r12                    # imm = 0xE3E0
	subq	$1, %r15
	jae	.LBB1_3
# %bb.6:
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6mandelPfffffj, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6mandelPfffffj,@object        # @_Z6mandelPfffffj
	.section	.rodata,"a",@progbits
	.globl	_Z6mandelPfffffj
	.p2align	3, 0x0
_Z6mandelPfffffj:
	.quad	_Z21__device_stub__mandelPfffffj
	.size	_Z6mandelPfffffj, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"P3\n"
	.size	.L.str, 4

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" "
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\n255\n"
	.size	.L.str.2, 6

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\n"
	.size	.L.str.3, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6mandelPfffffj"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__mandelPfffffj
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6mandelPfffffj
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6mandelPfffffj        ; -- Begin function _Z6mandelPfffffj
	.globl	_Z6mandelPfffffj
	.p2align	8
	.type	_Z6mandelPfffffj,@function
_Z6mandelPfffffj:                       ; @_Z6mandelPfffffj
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x18
	s_load_b32 s9, s[0:1], 0x2c
	v_mov_b32_e32 v5, 0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s8, 0
	s_cbranch_scc1 .LBB0_6
; %bb.1:                                ; %.lr.ph.i.preheader
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s2, s[2:3], 0x0
	s_and_b32 s3, 0xffff, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cvt_f32_u32_e32 v1, s3
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e64 v2, s5, s4
	v_sub_f32_e64 v3, s7, s6
	v_cvt_f32_i32_e32 v4, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v5, null, v1, v1, v2
	v_div_scale_f32 v6, null, v4, v4, v3
	v_div_scale_f32 v11, vcc_lo, v2, v1, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v7, v5
	v_rcp_f32_e32 v8, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v5, v7, 1.0
	v_fma_f32 v10, -v6, v8, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v7, v9, v7 :: v_dual_fmac_f32 v8, v10, v8
	v_div_scale_f32 v9, s2, v3, v4, v3
	v_mul_f32_e32 v10, v11, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v13, -v5, v10, v11
	v_fmac_f32_e32 v10, v13, v7
	v_cvt_f32_u32_e32 v13, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f32 v5, -v5, v10, v11
	v_cvt_f32_u32_e32 v11, s15
	v_mul_f32_e32 v12, v9, v8
	v_div_fmas_f32 v5, v5, v7, v10
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f32 v14, -v6, v12, v9
	v_add_f32_e32 v7, 0.5, v13
	s_mov_b32 s2, 0
	v_div_fixup_f32 v2, v5, v1, v2
	v_dual_mov_b32 v1, 0 :: v_dual_fmac_f32 v12, v14, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v2, v7, v2, s4
                                        ; implicit-def: $sgpr4
	v_fma_f32 v6, -v6, v12, v9
	v_add_f32_e32 v9, 0.5, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v6, v6, v8, v12
	v_mov_b32_e32 v8, 0
	v_div_fixup_f32 v3, v6, v4, v3
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f32 v3, v9, v3, s6
.LBB0_2:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v7, v8, v4, v3
	v_sub_f32_e32 v1, v6, v1
	s_or_b32 s4, s4, exec_lo
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v7, v8, v4 :: v_dual_add_f32 v4, v2, v1
	v_mul_f32_e32 v1, v7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, v4, v4, v1
	v_cmp_nlt_f32_e32 vcc_lo, 4.0, v5
	v_mov_b32_e32 v5, s3
	s_and_saveexec_b32 s5, vcc_lo
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s3, s3, 1
	v_dual_mul_f32 v6, v4, v4 :: v_dual_mov_b32 v5, s8
	s_cmp_eq_u32 s8, s3
	s_cselect_b32 s6, -1, 0
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s6, s6, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.4:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v8, v7
	s_and_b32 s5, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s5, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_2
; %bb.5:                                ; %Flow38
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_6:                                ; %_Z11mandelDepthffi.exit
	s_and_b32 s2, 0xffff, s9
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_cmp_eq_u32_e32 vcc_lo, s8, v5
	v_cndmask_b32_e64 v0, 1.0, 0, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 1, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_mov_b32_e32 v1, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
	v_mov_b32_e32 v2, v0
	global_store_b96 v[4:5], v[0:2], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6mandelPfffffj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6mandelPfffffj, .Lfunc_end0-_Z6mandelPfffffj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 584
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6mandelPfffffj
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6mandelPfffffj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
