#include <cuda.h>
#include <cmath>
#include <cstdio>
#include <iostream>
#include <chrono>

//#define SIZE 32

using namespace std;
/*
//F 5.13
__global__
void Sum1_Kernel(float* X, float *Y) {
	__shared__ float partialSum[SIZE];
	partialSum[threadIdx.x] = X[blockIdx.x*blockDim.x + threadIdx.x];
	unsigned int t = threadIdx.x;
	for (unsigned int stride = 1; stride < blockDim.x; stride *= 2) {
		__syncthreads();
		if (t % (2 * stride) == 0) {
			partialSum[t] += partialSum[t + stride];
		}
	}
	if (t == 0) {
		Y[blockIdx.x] = partialSum[0];
	}
}

//F 5.15
__global__
void Sum2_Kernel(float* X, float* Y) {
	__shared__ float partialSum[SIZE];
	partialSum[threadIdx.x] = X[blockIdx.x*blockDim.x + threadIdx.x];
	unsigned int t = threadIdx.x;
	for (unsigned int stride = blockDim.x / 2; stride >= 1; stride = stride >> 1) {
		__syncthreads();
		if (t < stride) {
			partialSum[t] += partialSum[t + stride];
		}
	}
	if (t == 0) {
		Y[blockIdx.x] = partialSum[0];
	}
}

//E 5.12
__global__
void Sum3_Kernel(float* X, float* Y) {
	__shared__ float partialSum[SIZE];
	partialSum[threadIdx.x] = X[blockIdx.x*blockDim.x + threadIdx.x];
	unsigned int tid = threadIdx.x;
	for (unsigned int stride = n>>1; stride >=32; stride >>= 1) {
		__syncthreads();
		if (tid == stride) {
			partialSum[tid] += partialSum[tid + stride];
		}
	}
	__syncthreads();
	if (tid < 32) { // unroll last 5 predicated steps
		partialSum[tid] += partialSum[tid + 16];
		partialSum[tid] += partialSum[tid + 8];
		partialSum[tid] += partialSum[tid + 4];
		partialSum[tid] += partialSum[tid + 2];
		partialSum[tid] += partialSum[tid + 1];
	}
	if (tid == 0) {
		Y[blockIdx.x] = partialSum[0];
	}
}
*/

// E 5.1
__global__
void Sum1_Kernel(float* X, float *Y, int size) {
	extern __shared__ float partialSum[];
	unsigned int t = threadIdx.x;
	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	partialSum[t] = 0;
	if (i < size) {
		partialSum[t] = X[i];
	}
	__syncthreads();
	for (unsigned int stride = 1; stride < 2048; stride <<= 2) {
		if (t % (2 * stride) == 0) {
			partialSum[t] += partialSum[t + stride];
		}
		__syncthreads();
	}
	if (t == 0) {
		Y[blockIdx.x] = partialSum[0];
	}
}

// E 5.1
__global__
void Sum2_Kernel(float* X, float* Y, int size) {
	extern __shared__ float partialSum[];
	unsigned int t = threadIdx.x;
	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	partialSum[t] = 0;
	if (i < size) {
		partialSum[t] = X[i];
	}
	__syncthreads();
	for (unsigned int stride = blockDim.x/2; stride > 0; stride >>= 1) {
		if (t < stride) {
			partialSum[t] += partialSum[t + stride];
		}
		__syncthreads();
	}
	if (t == 0) {
		Y[blockIdx.x] = partialSum[0];
	}
}

// E 5.3
__global__
void Sum3_Kernel(float* X, float* Y, int size) {
	extern __shared__ float partialSum[];
	unsigned int t = threadIdx.x;
	unsigned int i = blockIdx.x*(blockDim.x*2) + threadIdx.x;
	partialSum[t] = 0;
	if (i < size) {
		partialSum[t] = X[i] + X[i + blockDim.x];
	}
	__syncthreads();
	for (unsigned int stride = blockDim.x/2; stride > 0; stride >>= 1) {
		if (t < stride) {
			partialSum[t] += partialSum[t + stride];
		}
		__syncthreads();
	}
	if (t == 0) {
		Y[blockIdx.x] = partialSum[0];
	}
}

//E 5.12
__global__
void Sum4_Kernel(float* X, float* Y, int size) {
	extern __shared__ float partialSum[];
	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x*(blockDim.x*2) + threadIdx.x;
	partialSum[tid] = 0;
	if (i < size) {
		partialSum[tid] = X[i] + X[i + blockDim.x];
	}
	__syncthreads();
	for (unsigned int stride = blockDim.x/2; stride > 32; stride >>= 1) {
		if (tid == stride) {
			partialSum[tid] += partialSum[tid + stride];
		}
		__syncthreads();
	}
	if (tid < 32) {
		partialSum[tid] += partialSum[tid + 32];
		partialSum[tid] += partialSum[tid + 16];
		partialSum[tid] += partialSum[tid + 8];
		partialSum[tid] += partialSum[tid + 4];
		partialSum[tid] += partialSum[tid + 2];
		partialSum[tid] += partialSum[tid + 1];
	}
	if (tid == 0) {
		Y[blockIdx.x] = partialSum[0];
	}
}

float Sum_GPU(float* x, int x_sz) {
	float total_sum = 0;
	int block_sz = 1024;
	int max_sz = block_sz;
	int grid_sz = 0;
	if (x_sz <= max_sz) {
		grid_sz = (int)ceil(float(x_sz) / float(max_sz));
	}
	else {
		grid_sz = x_sz / max_sz;
		if ((x_sz % max_sz) != 0) {
			grid_sz++;
		}
	}
	float *d_block_sums;
	cudaMalloc(&d_block_sums, sizeof(float)*grid_sz);
	cudaMemset(d_block_sums, 0, sizeof(float)*grid_sz);
	Sum4_Kernel <<< grid_sz, block_sz, sizeof(float)*max_sz >>> (x, d_block_sums, x_sz);
	if (grid_sz <= max_sz) {
		float* d_total_sum;
		cudaMalloc(&d_total_sum, sizeof(float));
		cudaMemset(d_total_sum, 0, sizeof(float));
		Sum4_Kernel <<< 1, block_sz, sizeof(float)*max_sz >>> (d_total_sum, d_block_sums, grid_sz);
		cudaMemcpy(&total_sum, d_total_sum, sizeof(float), cudaMemcpyDeviceToHost);
		cudaFree(d_total_sum);
	}
	else {
		float* d_in_block_sums;
		cudaMalloc(&d_in_block_sums, sizeof(float)*grid_sz);
		cudaMemcpy(&d_in_block_sums, d_block_sums, sizeof(float)*grid_sz, cudaMemcpyDeviceToDevice);
		total_sum = Sum_GPU(d_in_block_sums, grid_sz);
		cudaFree(d_in_block_sums);
	}
	cudaFree(d_block_sums);
	return total_sum;
}

int main() {
	//Host
	float *h_X;

	int size = 1024;

	h_X = (float*)malloc(size * sizeof(float));

	//Create
	for (int i = 0; i < size; i++) {
		h_X[i] = i + 1.0f;
	}

	float* d_X;
	cudaMalloc(&d_X, sizeof(unsigned int) * size);
	cudaMemcpy(d_X, h_X, sizeof(unsigned int) * size, cudaMemcpyHostToDevice);

	//Sum (Main)
	chrono::time_point<chrono::system_clock> Sum_GPU_Start, Sum_GPU_End;
	Sum_GPU_Start = chrono::system_clock::now();
	float gpu_total_sum = Sum_GPU(d_X, size);
	Sum_GPU_End = chrono::system_clock::now();

	cout << "Sum_GPU: " << chrono::duration_cast<chrono::nanoseconds>(Sum_GPU_End - Sum_GPU_Start).count() << "ns." << endl;

	cout << "Result: " << gpu_total_sum << endl;

	//Free
	cudaFree(d_X);
	free(h_X);

	return 0;
}

	.file	"tmpxft_00231655_00000000-6_sum.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3744:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3744:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z34__device_stub__Z11Sum1_KernelPfS_iPfS_i
	.type	_Z34__device_stub__Z11Sum1_KernelPfS_iPfS_i, @function
_Z34__device_stub__Z11Sum1_KernelPfS_iPfS_i:
.LFB3766:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11Sum1_KernelPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3766:
	.size	_Z34__device_stub__Z11Sum1_KernelPfS_iPfS_i, .-_Z34__device_stub__Z11Sum1_KernelPfS_iPfS_i
	.globl	_Z11Sum1_KernelPfS_i
	.type	_Z11Sum1_KernelPfS_i, @function
_Z11Sum1_KernelPfS_i:
.LFB3767:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z11Sum1_KernelPfS_iPfS_i
	.cfi_endproc
.LFE3767:
	.size	_Z11Sum1_KernelPfS_i, .-_Z11Sum1_KernelPfS_i
	.globl	_Z34__device_stub__Z11Sum2_KernelPfS_iPfS_i
	.type	_Z34__device_stub__Z11Sum2_KernelPfS_iPfS_i, @function
_Z34__device_stub__Z11Sum2_KernelPfS_iPfS_i:
.LFB3768:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11Sum2_KernelPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3768:
	.size	_Z34__device_stub__Z11Sum2_KernelPfS_iPfS_i, .-_Z34__device_stub__Z11Sum2_KernelPfS_iPfS_i
	.globl	_Z11Sum2_KernelPfS_i
	.type	_Z11Sum2_KernelPfS_i, @function
_Z11Sum2_KernelPfS_i:
.LFB3769:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z11Sum2_KernelPfS_iPfS_i
	.cfi_endproc
.LFE3769:
	.size	_Z11Sum2_KernelPfS_i, .-_Z11Sum2_KernelPfS_i
	.globl	_Z34__device_stub__Z11Sum3_KernelPfS_iPfS_i
	.type	_Z34__device_stub__Z11Sum3_KernelPfS_iPfS_i, @function
_Z34__device_stub__Z11Sum3_KernelPfS_iPfS_i:
.LFB3770:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11Sum3_KernelPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L13:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3770:
	.size	_Z34__device_stub__Z11Sum3_KernelPfS_iPfS_i, .-_Z34__device_stub__Z11Sum3_KernelPfS_iPfS_i
	.globl	_Z11Sum3_KernelPfS_i
	.type	_Z11Sum3_KernelPfS_i, @function
_Z11Sum3_KernelPfS_i:
.LFB3771:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z11Sum3_KernelPfS_iPfS_i
	.cfi_endproc
.LFE3771:
	.size	_Z11Sum3_KernelPfS_i, .-_Z11Sum3_KernelPfS_i
	.globl	_Z34__device_stub__Z11Sum4_KernelPfS_iPfS_i
	.type	_Z34__device_stub__Z11Sum4_KernelPfS_iPfS_i, @function
_Z34__device_stub__Z11Sum4_KernelPfS_iPfS_i:
.LFB3772:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11Sum4_KernelPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L18:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3772:
	.size	_Z34__device_stub__Z11Sum4_KernelPfS_iPfS_i, .-_Z34__device_stub__Z11Sum4_KernelPfS_iPfS_i
	.globl	_Z11Sum4_KernelPfS_i
	.type	_Z11Sum4_KernelPfS_i, @function
_Z11Sum4_KernelPfS_i:
.LFB3773:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z11Sum4_KernelPfS_iPfS_i
	.cfi_endproc
.LFE3773:
	.size	_Z11Sum4_KernelPfS_i, .-_Z11Sum4_KernelPfS_i
	.globl	_Z7Sum_GPUPfi
	.type	_Z7Sum_GPUPfi, @function
_Z7Sum_GPUPfi:
.LFB3734:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	movl	$0x00000000, 4(%rsp)
	cmpl	$1024, %esi
	jg	.L24
	cvtsi2ssl	%esi, %xmm0
	mulss	.LC1(%rip), %xmm0
	call	ceilf@PLT
	cvttss2sil	%xmm0, %ebx
	jmp	.L25
.L24:
	movl	%esi, %eax
	movl	%esi, %ebx
	andl	$1023, %eax
	sarl	$10, %ebx
	cmpl	$1, %eax
	sbbl	$-1, %ebx
.L25:
	movslq	%ebx, %r12
	leaq	8(%rsp), %rdi
	salq	$2, %r12
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	call	cudaMemset@PLT
	movl	%ebx, 28(%rsp)
	movl	$4194305, %edx
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	28(%rsp), %rdi
	salq	$10, %rdx
	xorl	%r9d, %r9d
	movl	36(%rsp), %esi
	movl	$4096, %r8d
	movl	$1, %ecx
	movq	%rdx, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	8(%rsp), %rsi
	movl	%ebp, %edx
	movq	%r13, %rdi
	call	_Z34__device_stub__Z11Sum4_KernelPfS_iPfS_i
.L26:
	cmpl	$1024, %ebx
	jg	.L27
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	call	cudaMemset@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rdi
	salq	$10, %rdx
	movl	$4096, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rdi, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z34__device_stub__Z11Sum4_KernelPfS_iPfS_i
.L28:
	movq	16(%rsp), %rsi
	leaq	4(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	jmp	.L34
.L27:
	leaq	40(%rsp), %rbp
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	movq	%r12, %rdx
	movq	%rbp, %rdi
	movl	$3, %ecx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z7Sum_GPUPfi
	movq	40(%rsp), %rdi
	movss	%xmm0, 4(%rsp)
.L34:
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movss	4(%rsp), %xmm0
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3734:
	.size	_Z7Sum_GPUPfi, .-_Z7Sum_GPUPfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"Sum_GPU: "
.LC4:
	.string	"ns."
.LC5:
	.string	"Result: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3735:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$4096, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movss	.LC2(%rip), %xmm1
	movq	%rax, %rbx
	xorl	%eax, %eax
.L36:
	cvtsi2ssl	%eax, %xmm0
	addss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$1024, %rax
	jne	.L36
	leaq	16(%rsp), %rdi
	movl	$4096, %esi
	leaq	_ZSt4cout(%rip), %r12
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4096, %edx
	call	cudaMemcpy@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	16(%rsp), %rdi
	movl	$1024, %esi
	movq	%rax, %r13
	call	_Z7Sum_GPUPfi
	movss	%xmm0, 12(%rsp)
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC3(%rip), %rsi
	movq	%r12, %rdi
	movq	%rax, %rbp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbp, %rsi
	subq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	.LC5(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	12(%rsp), %xmm0
	movq	%rax, %rdi
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3735:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z11Sum4_KernelPfS_i"
.LC7:
	.string	"_Z11Sum3_KernelPfS_i"
.LC8:
	.string	"_Z11Sum2_KernelPfS_i"
.LC9:
	.string	"_Z11Sum1_KernelPfS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3775:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11Sum4_KernelPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11Sum3_KernelPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11Sum2_KernelPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11Sum1_KernelPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3775:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	981467136
	.align 4
.LC2:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <cmath>
#include <cstdio>
#include <iostream>
#include <chrono>

//#define SIZE 32

using namespace std;
/*
//F 5.13
__global__
void Sum1_Kernel(float* X, float *Y) {
	__shared__ float partialSum[SIZE];
	partialSum[threadIdx.x] = X[blockIdx.x*blockDim.x + threadIdx.x];
	unsigned int t = threadIdx.x;
	for (unsigned int stride = 1; stride < blockDim.x; stride *= 2) {
		__syncthreads();
		if (t % (2 * stride) == 0) {
			partialSum[t] += partialSum[t + stride];
		}
	}
	if (t == 0) {
		Y[blockIdx.x] = partialSum[0];
	}
}

//F 5.15
__global__
void Sum2_Kernel(float* X, float* Y) {
	__shared__ float partialSum[SIZE];
	partialSum[threadIdx.x] = X[blockIdx.x*blockDim.x + threadIdx.x];
	unsigned int t = threadIdx.x;
	for (unsigned int stride = blockDim.x / 2; stride >= 1; stride = stride >> 1) {
		__syncthreads();
		if (t < stride) {
			partialSum[t] += partialSum[t + stride];
		}
	}
	if (t == 0) {
		Y[blockIdx.x] = partialSum[0];
	}
}

//E 5.12
__global__
void Sum3_Kernel(float* X, float* Y) {
	__shared__ float partialSum[SIZE];
	partialSum[threadIdx.x] = X[blockIdx.x*blockDim.x + threadIdx.x];
	unsigned int tid = threadIdx.x;
	for (unsigned int stride = n>>1; stride >=32; stride >>= 1) {
		__syncthreads();
		if (tid == stride) {
			partialSum[tid] += partialSum[tid + stride];
		}
	}
	__syncthreads();
	if (tid < 32) { // unroll last 5 predicated steps
		partialSum[tid] += partialSum[tid + 16];
		partialSum[tid] += partialSum[tid + 8];
		partialSum[tid] += partialSum[tid + 4];
		partialSum[tid] += partialSum[tid + 2];
		partialSum[tid] += partialSum[tid + 1];
	}
	if (tid == 0) {
		Y[blockIdx.x] = partialSum[0];
	}
}
*/

// E 5.1
__global__
void Sum1_Kernel(float* X, float *Y, int size) {
	extern __shared__ float partialSum[];
	unsigned int t = threadIdx.x;
	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	partialSum[t] = 0;
	if (i < size) {
		partialSum[t] = X[i];
	}
	__syncthreads();
	for (unsigned int stride = 1; stride < 2048; stride <<= 2) {
		if (t % (2 * stride) == 0) {
			partialSum[t] += partialSum[t + stride];
		}
		__syncthreads();
	}
	if (t == 0) {
		Y[blockIdx.x] = partialSum[0];
	}
}

// E 5.1
__global__
void Sum2_Kernel(float* X, float* Y, int size) {
	extern __shared__ float partialSum[];
	unsigned int t = threadIdx.x;
	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	partialSum[t] = 0;
	if (i < size) {
		partialSum[t] = X[i];
	}
	__syncthreads();
	for (unsigned int stride = blockDim.x/2; stride > 0; stride >>= 1) {
		if (t < stride) {
			partialSum[t] += partialSum[t + stride];
		}
		__syncthreads();
	}
	if (t == 0) {
		Y[blockIdx.x] = partialSum[0];
	}
}

// E 5.3
__global__
void Sum3_Kernel(float* X, float* Y, int size) {
	extern __shared__ float partialSum[];
	unsigned int t = threadIdx.x;
	unsigned int i = blockIdx.x*(blockDim.x*2) + threadIdx.x;
	partialSum[t] = 0;
	if (i < size) {
		partialSum[t] = X[i] + X[i + blockDim.x];
	}
	__syncthreads();
	for (unsigned int stride = blockDim.x/2; stride > 0; stride >>= 1) {
		if (t < stride) {
			partialSum[t] += partialSum[t + stride];
		}
		__syncthreads();
	}
	if (t == 0) {
		Y[blockIdx.x] = partialSum[0];
	}
}

//E 5.12
__global__
void Sum4_Kernel(float* X, float* Y, int size) {
	extern __shared__ float partialSum[];
	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x*(blockDim.x*2) + threadIdx.x;
	partialSum[tid] = 0;
	if (i < size) {
		partialSum[tid] = X[i] + X[i + blockDim.x];
	}
	__syncthreads();
	for (unsigned int stride = blockDim.x/2; stride > 32; stride >>= 1) {
		if (tid == stride) {
			partialSum[tid] += partialSum[tid + stride];
		}
		__syncthreads();
	}
	if (tid < 32) {
		partialSum[tid] += partialSum[tid + 32];
		partialSum[tid] += partialSum[tid + 16];
		partialSum[tid] += partialSum[tid + 8];
		partialSum[tid] += partialSum[tid + 4];
		partialSum[tid] += partialSum[tid + 2];
		partialSum[tid] += partialSum[tid + 1];
	}
	if (tid == 0) {
		Y[blockIdx.x] = partialSum[0];
	}
}

float Sum_GPU(float* x, int x_sz) {
	float total_sum = 0;
	int block_sz = 1024;
	int max_sz = block_sz;
	int grid_sz = 0;
	if (x_sz <= max_sz) {
		grid_sz = (int)ceil(float(x_sz) / float(max_sz));
	}
	else {
		grid_sz = x_sz / max_sz;
		if ((x_sz % max_sz) != 0) {
			grid_sz++;
		}
	}
	float *d_block_sums;
	hipMalloc(&d_block_sums, sizeof(float)*grid_sz);
	hipMemset(d_block_sums, 0, sizeof(float)*grid_sz);
	Sum4_Kernel <<< grid_sz, block_sz, sizeof(float)*max_sz >>> (x, d_block_sums, x_sz);
	if (grid_sz <= max_sz) {
		float* d_total_sum;
		hipMalloc(&d_total_sum, sizeof(float));
		hipMemset(d_total_sum, 0, sizeof(float));
		Sum4_Kernel <<< 1, block_sz, sizeof(float)*max_sz >>> (d_total_sum, d_block_sums, grid_sz);
		hipMemcpy(&total_sum, d_total_sum, sizeof(float), hipMemcpyDeviceToHost);
		hipFree(d_total_sum);
	}
	else {
		float* d_in_block_sums;
		hipMalloc(&d_in_block_sums, sizeof(float)*grid_sz);
		hipMemcpy(&d_in_block_sums, d_block_sums, sizeof(float)*grid_sz, hipMemcpyDeviceToDevice);
		total_sum = Sum_GPU(d_in_block_sums, grid_sz);
		hipFree(d_in_block_sums);
	}
	hipFree(d_block_sums);
	return total_sum;
}

int main() {
	//Host
	float *h_X;

	int size = 1024;

	h_X = (float*)malloc(size * sizeof(float));

	//Create
	for (int i = 0; i < size; i++) {
		h_X[i] = i + 1.0f;
	}

	float* d_X;
	hipMalloc(&d_X, sizeof(unsigned int) * size);
	hipMemcpy(d_X, h_X, sizeof(unsigned int) * size, hipMemcpyHostToDevice);

	//Sum (Main)
	chrono::time_point<chrono::system_clock> Sum_GPU_Start, Sum_GPU_End;
	Sum_GPU_Start = chrono::system_clock::now();
	float gpu_total_sum = Sum_GPU(d_X, size);
	Sum_GPU_End = chrono::system_clock::now();

	cout << "Sum_GPU: " << chrono::duration_cast<chrono::nanoseconds>(Sum_GPU_End - Sum_GPU_Start).count() << "ns." << endl;

	cout << "Result: " << gpu_total_sum << endl;

	//Free
	hipFree(d_X);
	free(h_X);

	return 0;
}

	.text
	.file	"sum.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z26__device_stub__Sum1_KernelPfS_i # -- Begin function _Z26__device_stub__Sum1_KernelPfS_i
	.type	_Z26__device_stub__Sum1_KernelPfS_i,@function
_Z26__device_stub__Sum1_KernelPfS_i:    # @_Z26__device_stub__Sum1_KernelPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11Sum1_KernelPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__Sum1_KernelPfS_i, .Lfunc_end0-_Z26__device_stub__Sum1_KernelPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__Sum2_KernelPfS_i # -- Begin function _Z26__device_stub__Sum2_KernelPfS_i
	.type	_Z26__device_stub__Sum2_KernelPfS_i,@function
_Z26__device_stub__Sum2_KernelPfS_i:    # @_Z26__device_stub__Sum2_KernelPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11Sum2_KernelPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z26__device_stub__Sum2_KernelPfS_i, .Lfunc_end1-_Z26__device_stub__Sum2_KernelPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__Sum3_KernelPfS_i # -- Begin function _Z26__device_stub__Sum3_KernelPfS_i
	.type	_Z26__device_stub__Sum3_KernelPfS_i,@function
_Z26__device_stub__Sum3_KernelPfS_i:    # @_Z26__device_stub__Sum3_KernelPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11Sum3_KernelPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z26__device_stub__Sum3_KernelPfS_i, .Lfunc_end2-_Z26__device_stub__Sum3_KernelPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__Sum4_KernelPfS_i # -- Begin function _Z26__device_stub__Sum4_KernelPfS_i
	.type	_Z26__device_stub__Sum4_KernelPfS_i,@function
_Z26__device_stub__Sum4_KernelPfS_i:    # @_Z26__device_stub__Sum4_KernelPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11Sum4_KernelPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z26__device_stub__Sum4_KernelPfS_i, .Lfunc_end3-_Z26__device_stub__Sum4_KernelPfS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z7Sum_GPUPfi
.LCPI4_0:
	.long	0x3a800000                      # float 9.765625E-4
	.text
	.globl	_Z7Sum_GPUPfi
	.type	_Z7Sum_GPUPfi,@function
_Z7Sum_GPUPfi:                          # @_Z7Sum_GPUPfi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, 32(%rsp)                  # 8-byte Spill
	movl	$0, 12(%rsp)
	cmpl	$1024, %esi                     # imm = 0x400
	jg	.LBB4_2
# %bb.1:
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %ebx
	jmp	.LBB4_3
.LBB4_2:
	movl	%ebp, %ebx
	shrl	$10, %ebx
	movl	%ebp, %eax
	andl	$1023, %eax                     # imm = 0x3FF
	cmpl	$1, %eax
	sbbl	$-1, %ebx
.LBB4_3:
	movabsq	$4294968320, %r14               # imm = 0x100000400
	movslq	%ebx, %r15
	leaq	(,%r15,4), %r12
	leaq	24(%rsp), %r13
	movq	%r13, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	callq	hipMemset
	movl	%r15d, %eax
	leaq	(%rax,%r14), %rdi
	addq	$-1024, %rdi                    # imm = 0xFC00
	movl	$4096, %r8d                     # imm = 0x1000
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_5
# %bb.4:
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movl	%ebp, %edx
	callq	_Z26__device_stub__Sum4_KernelPfS_i
.LBB4_5:
	cmpl	$1024, %ebx                     # imm = 0x400
	jg	.LBB4_9
# %bb.6:
	leaq	16(%rsp), %r15
	movl	$4, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$4, %edx
	xorl	%esi, %esi
	callq	hipMemset
	leaq	-1023(%r14), %rdi
	movl	$4096, %r8d                     # imm = 0x1000
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_8
# %bb.7:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__Sum4_KernelPfS_i
.LBB4_8:
	movq	16(%rsp), %rsi
	leaq	12(%rsp), %rdi
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	jmp	.LBB4_10
.LBB4_9:
	leaq	16(%rsp), %r14
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	24(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r12, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movl	%ebx, %esi
	callq	_Z7Sum_GPUPfi
	movss	%xmm0, 12(%rsp)
	movq	(%r14), %rdi
.LBB4_10:
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z7Sum_GPUPfi, .Lfunc_end4-_Z7Sum_GPUPfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI5_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$4096, %edi                     # imm = 0x1000
	callq	malloc
	movq	%rax, %rbx
	xorl	%eax, %eax
	movss	.LCPI5_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB5_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm1, %xmm1
	cvtsi2ss	%eax, %xmm1
	addss	%xmm0, %xmm1
	movss	%xmm1, (%rbx,%rax,4)
	incq	%rax
	cmpq	$1024, %rax                     # imm = 0x400
	jne	.LBB5_1
# %bb.2:
	leaq	16(%rsp), %r14
	movl	$4096, %esi                     # imm = 0x1000
	movq	%r14, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
	movq	(%r14), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	_Z7Sum_GPUPfi
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	subq	%r15, %r12
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertIlEERSoT_
	movq	%rax, %r15
	movl	$.L.str.1, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r15), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$8, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%r14), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11Sum1_KernelPfS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11Sum2_KernelPfS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11Sum3_KernelPfS_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11Sum4_KernelPfS_i, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11Sum1_KernelPfS_i,@object    # @_Z11Sum1_KernelPfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z11Sum1_KernelPfS_i
	.p2align	3, 0x0
_Z11Sum1_KernelPfS_i:
	.quad	_Z26__device_stub__Sum1_KernelPfS_i
	.size	_Z11Sum1_KernelPfS_i, 8

	.type	_Z11Sum2_KernelPfS_i,@object    # @_Z11Sum2_KernelPfS_i
	.globl	_Z11Sum2_KernelPfS_i
	.p2align	3, 0x0
_Z11Sum2_KernelPfS_i:
	.quad	_Z26__device_stub__Sum2_KernelPfS_i
	.size	_Z11Sum2_KernelPfS_i, 8

	.type	_Z11Sum3_KernelPfS_i,@object    # @_Z11Sum3_KernelPfS_i
	.globl	_Z11Sum3_KernelPfS_i
	.p2align	3, 0x0
_Z11Sum3_KernelPfS_i:
	.quad	_Z26__device_stub__Sum3_KernelPfS_i
	.size	_Z11Sum3_KernelPfS_i, 8

	.type	_Z11Sum4_KernelPfS_i,@object    # @_Z11Sum4_KernelPfS_i
	.globl	_Z11Sum4_KernelPfS_i
	.p2align	3, 0x0
_Z11Sum4_KernelPfS_i:
	.quad	_Z26__device_stub__Sum4_KernelPfS_i
	.size	_Z11Sum4_KernelPfS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Sum_GPU: "
	.size	.L.str, 10

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"ns."
	.size	.L.str.1, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Result: "
	.size	.L.str.2, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11Sum1_KernelPfS_i"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11Sum2_KernelPfS_i"
	.size	.L__unnamed_2, 21

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z11Sum3_KernelPfS_i"
	.size	.L__unnamed_3, 21

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z11Sum4_KernelPfS_i"
	.size	.L__unnamed_4, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__Sum1_KernelPfS_i
	.addrsig_sym _Z26__device_stub__Sum2_KernelPfS_i
	.addrsig_sym _Z26__device_stub__Sum3_KernelPfS_i
	.addrsig_sym _Z26__device_stub__Sum4_KernelPfS_i
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11Sum1_KernelPfS_i
	.addrsig_sym _Z11Sum2_KernelPfS_i
	.addrsig_sym _Z11Sum3_KernelPfS_i
	.addrsig_sym _Z11Sum4_KernelPfS_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11Sum1_KernelPfS_i    ; -- Begin function _Z11Sum1_KernelPfS_i
	.globl	_Z11Sum1_KernelPfS_i
	.p2align	8
	.type	_Z11Sum1_KernelPfS_i,@function
_Z11Sum1_KernelPfS_i:                   ; @_Z11Sum1_KernelPfS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s5, s[0:1], 0x24
	s_load_b32 s6, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	v_lshl_add_u32 v3, v0, 2, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	s_mov_b32 s5, exec_lo
	ds_store_b32 v3, v2
	v_cmpx_gt_u32_e64 s6, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v1
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s0, 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s1, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s1, s1, -1
	v_and_b32_e32 v1, s1, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_lshl_add_u32 v1, s0, 2, v3
	ds_load_b32 v1, v1
	ds_load_b32 v2, v3
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
	ds_store_b32 v3, v1
.LBB0_5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_lshl_b32 s1, s0, 2
	s_cmpk_gt_u32 s0, 0x1ff
	s_mov_b32 s0, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_3
; %bb.6:
	s_mov_b32 s5, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_8
; %bb.7:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB0_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11Sum1_KernelPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11Sum1_KernelPfS_i, .Lfunc_end0-_Z11Sum1_KernelPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 336
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11Sum2_KernelPfS_i    ; -- Begin function _Z11Sum2_KernelPfS_i
	.globl	_Z11Sum2_KernelPfS_i
	.p2align	8
	.type	_Z11Sum2_KernelPfS_i,@function
_Z11Sum2_KernelPfS_i:                   ; @_Z11Sum2_KernelPfS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s5, s[0:1], 0x24
	s_load_b32 s6, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	v_lshl_add_u32 v3, v0, 2, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	ds_store_b32 v3, v2
	v_cmp_gt_u32_e32 vcc_lo, s6, v1
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v1
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s6
	s_cmp_lt_u32 s5, 2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_7
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_lshr_b32 s0, s5, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_3 Depth=1
	v_lshl_add_u32 v1, s0, 2, v3
	ds_load_b32 v1, v1
	ds_load_b32 v2, v3
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
	ds_store_b32 v3, v1
.LBB1_6:                                ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s0
	s_branch .LBB1_3
.LBB1_7:                                ; %._crit_edge
	s_mov_b32 s5, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_9
; %bb.8:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB1_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11Sum2_KernelPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11Sum2_KernelPfS_i, .Lfunc_end1-_Z11Sum2_KernelPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 312
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11Sum3_KernelPfS_i    ; -- Begin function _Z11Sum3_KernelPfS_i
	.globl	_Z11Sum3_KernelPfS_i
	.p2align	8
	.type	_Z11Sum3_KernelPfS_i,@function
_Z11Sum3_KernelPfS_i:                   ; @_Z11Sum3_KernelPfS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s5, s[0:1], 0x24
	s_load_b32 s6, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshl_add_u32 v5, v0, 2, 0
	v_mov_b32_e32 v4, 0
	s_mov_b32 s4, s15
	ds_store_b32 v5, v4
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s15, s5
	v_lshl_add_u32 v1, s7, 1, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s6, v1
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB2_2
; %bb.1:
	v_dual_mov_b32 v2, v4 :: v_dual_add_nc_u32 v3, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_clause 0x1
	global_load_b32 v1, v[1:2], off
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	ds_store_b32 v5, v1
.LBB2_2:
	s_or_b32 exec_lo, exec_lo, s6
	s_cmp_lt_u32 s5, 2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB2_3:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_7
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_lshr_b32 s0, s5, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB2_6
; %bb.5:                                ;   in Loop: Header=BB2_3 Depth=1
	v_lshl_add_u32 v1, s0, 2, v5
	ds_load_b32 v1, v1
	ds_load_b32 v2, v5
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
	ds_store_b32 v5, v1
.LBB2_6:                                ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s0
	s_branch .LBB2_3
.LBB2_7:                                ; %._crit_edge
	s_mov_b32 s5, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_9
; %bb.8:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB2_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11Sum3_KernelPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z11Sum3_KernelPfS_i, .Lfunc_end2-_Z11Sum3_KernelPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 372
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11Sum4_KernelPfS_i    ; -- Begin function _Z11Sum4_KernelPfS_i
	.globl	_Z11Sum4_KernelPfS_i
	.p2align	8
	.type	_Z11Sum4_KernelPfS_i,@function
_Z11Sum4_KernelPfS_i:                   ; @_Z11Sum4_KernelPfS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s5, s[0:1], 0x24
	s_load_b32 s6, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshl_add_u32 v5, v0, 2, 0
	v_mov_b32_e32 v4, 0
	s_mov_b32 s4, s15
	ds_store_b32 v5, v4
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s15, s5
	v_lshl_add_u32 v1, s7, 1, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s6, v1
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB3_2
; %bb.1:
	v_dual_mov_b32 v2, v4 :: v_dual_add_nc_u32 v3, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_clause 0x1
	global_load_b32 v1, v[1:2], off
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	ds_store_b32 v5, v1
.LBB3_2:
	s_or_b32 exec_lo, exec_lo, s6
	s_cmpk_lt_u32 s5, 0x42
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_7
; %bb.3:                                ; %.lr.ph.preheader
	v_lshlrev_b32_e32 v1, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v5, v1
.LBB3_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s0, s5, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e64 s0, v0
	s_cbranch_execz .LBB3_6
; %bb.5:                                ;   in Loop: Header=BB3_4 Depth=1
	ds_load_b32 v2, v1
	ds_load_b32 v3, v5
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v5, v2
.LBB3_6:                                ;   in Loop: Header=BB3_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_cmpk_lt_u32 s5, 0x84
	s_mov_b32 s5, s0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB3_4
.LBB3_7:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB3_9
; %bb.8:
	ds_load_b32 v8, v5 offset:128
	ds_load_2addr_b32 v[1:2], v5 offset1:1
	ds_load_2addr_b32 v[3:4], v5 offset0:8 offset1:16
	ds_load_2addr_b32 v[6:7], v5 offset0:2 offset1:4
	s_waitcnt lgkmcnt(2)
	v_add_f32_e32 v1, v8, v1
	s_waitcnt lgkmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v4
	v_add_f32_e32 v1, v1, v3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v7
	v_add_f32_e32 v1, v1, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v2
	ds_store_b32 v5, v1
.LBB3_9:
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s5, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_11
; %bb.10:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB3_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11Sum4_KernelPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z11Sum4_KernelPfS_i, .Lfunc_end3-_Z11Sum4_KernelPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 488
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11Sum1_KernelPfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11Sum1_KernelPfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11Sum2_KernelPfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11Sum2_KernelPfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11Sum3_KernelPfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11Sum3_KernelPfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11Sum4_KernelPfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11Sum4_KernelPfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
