/*
 *                         Tiled Matrix Multiplication
 *             (MP2, Fall 2014, GPU Programming/Auburn University)
 *
 *   Compile with -DTILE_WIDTH=16 (for example) to change the tile size.
 *   Compile with -DSEED=12 (for example) to seed the random number generator.
 */

#include <assert.h>
#include <cuda.h>
#include <stdio.h>
#include <math.h>

/* Usage message displayed when invalid command line arguments are supplied */
#define USAGE \
	"MP2 generates a random (m x k) matrix M and (k x n) matrix N\n" \
	"and multiplies M by N using tiled matrix multiplication.\n" \
	"The values of m, k, and n must be >= 1.\n" \
	"\n" \
	"Usage: mp2 m k n\n"

/* Tile size -- define here if not defined using the -D compiler flag */
#ifndef TILE_WIDTH
#  define TILE_WIDTH 16
#endif

/* Seed for the random number generator -- define here if not using -D */
#ifndef SEED
#  define SEED 1
#endif

/* Maximum difference allowed between the GPU and CPU result matrices */
#define EPSILON 1e-2

/* If a CUDA call fails, display an error message and exit */
#define CUDA_CHECK(e) { \
	cudaError_t err = (e); \
	if (err != cudaSuccess) \
	{ \
		fprintf(stderr, "CUDA error: %s, line %d, %s: %s\n", \
			__FILE__, __LINE__, #e, cudaGetErrorString(err)); \
		exit(EXIT_FAILURE); \
	} \
}

/* assert() is only supported on devices of compute capability >= 2.0 */
#if defined(__CUDA_ARCH__) && (__CUDA_ARCH__ < 200)
#  undef  assert
#  define assert(arg)
#endif

/* Tiled matrix multiplication kernel */
__global__  static void matMul(float *d_M, float *d_N, float *d_P,
                       int m, int k, int n)
{
	assert(blockDim.x == TILE_WIDTH && blockDim.y == TILE_WIDTH);

	/*
	 *
	 *
	 * TODO: IMPLEMENT TILED MATRIX MULTIPLICATION
	 *
	 * Multiply matrix d_M by d_N, storing product in d_P.
	 * Use tiled matrix multiplication with shared memory.
	 *
	 *
	 */

//__shared__ float Mds[TILE_WIDTH][TILE_WIDTH];
//__shared__ float Nds[TILE_WIDTH][TILE_WIDTH];


__shared__ float ds_A[TILE_WIDTH][TILE_WIDTH];
__shared__ float ds_B[TILE_WIDTH][TILE_WIDTH];

int tx = threadIdx.x, ty = threadIdx.y;

int row = blockIdx.y * TILE_WIDTH + threadIdx.y;
int col= blockIdx.x  * TILE_WIDTH + threadIdx.x;

float sum = 0;

//double numberoftiles =ceil(m/TILE_WIDTH);

if (m == k== n) {   
for (int l=0;l<m/TILE_WIDTH ; ++l) {     //iterate through tiles

	for (int j=0; j< TILE_WIDTH ; ++j) {    //iterate through elements in the tile

           sum = sum + d_M[(row*m) + ( l*TILE_WIDTH+j)] * d_N[(l*TILE_WIDTH+j)*m + col ];

         }
    
     __syncthreads();


 }

d_P[row*m +col] = sum;  

} else  {

for (int l=0;l<ceil((float) k/TILE_WIDTH) ; ++l) {     //iterate through tiles


             if (row < m  && l * TILE_WIDTH + tx < k)
		
			ds_A[ty][tx] = d_M[row *k  + l * TILE_WIDTH + tx];
	    else
			ds_A[ty][tx] = 0.0;

           if (l * TILE_WIDTH + ty < k  && col < n)

		ds_B[ty][tx] = d_N[(l * TILE_WIDTH + ty) *n  + col];
            
	 else
		ds_B[ty][tx] = 0.0;  
        
	 __syncthreads();  

        for (int j=0; j< TILE_WIDTH &&  j < k ; ++j) {    //iterate through elements in the tile

           sum = sum +  ds_A[ty][j] * ds_B[j][tx];


         }

     __syncthreads();


 }

 if (row < m  && col < n)

d_P[row*n+col] =sum;


}          


}




/* Displays one row of the given matrix */
static void printRow(int row, float *matrix, int cols)
{
	printf("[");
	if (cols >= 1) printf(" %3.3f", matrix[row*cols+0]);
	if (cols >= 2) printf(" %3.3f", matrix[row*cols+1]);
	if (cols >= 3) printf(" %3.3f", matrix[row*cols+2]);
	if (cols >= 6) printf(" ...");
	if (cols >= 5) printf(" %3.3f", matrix[row*cols+(cols-2)]);
	if (cols >= 4) printf(" %3.3f", matrix[row*cols+(cols-1)]);
	printf(" ]\n");
}

/* Displays the given matrix */
static void printMatrix(float *matrix, int rows, int cols)
{
	if (rows >= 1) printRow(0, matrix, cols);
	if (rows >= 2) printRow(1, matrix, cols);
	if (rows >= 3) printRow(2, matrix, cols);
	if (rows >= 6) printf("  ...\n");
	if (rows >= 5) printRow(rows-2, matrix, cols);
	if (rows >= 4) printRow(rows-1, matrix, cols);
}

/* Program entrypoint.  Invoke with three command line arguments: m k n */
int main(int argc, char **argv)
{
	/* Get command line arguments; save as m, k, and n */
	if (argc != 4)
	{
		fprintf(stderr, USAGE);
		fprintf(stderr, "Expected 3 arguments; received %d.\n", argc-1);
		return EXIT_FAILURE;
	}
	int m = atoi(argv[1]);
	int k = atoi(argv[2]);
	int n = atoi(argv[3]);
	if (m < 1 || k < 1 || n < 1)
	{
		fprintf(stderr, USAGE);
		fprintf(stderr, "Invalid value for m, k, or n (%d, %d, %d)\n",
			m, k, n);
		return EXIT_FAILURE;
	}
	printf("Multiplying MN = P.  M is (%d x %d); N is (%d x %d); ",
		m, k, k, n);
	printf("using (%d x %d) tiles.\n", TILE_WIDTH, TILE_WIDTH);

	/********************************************/
	/* M is (m x k), N is (k x n), P is (m x n) */
	/********************************************/

	/* Compute number of bytes needed to stores matrices M, N, and P */
	size_t bytesForM = m * k * sizeof(float);
	size_t bytesForN = k * n * sizeof(float);
	size_t bytesForP = m * n * sizeof(float);

	/* Allocate host memory for matrices */
	float *h_M, *h_N, *h_P;
	h_M = (float *)malloc(bytesForM);
	h_N = (float *)malloc(bytesForN);
	h_P = (float *)malloc(bytesForP);
	if (h_M == NULL || h_N == NULL || h_P == NULL)
	{
		fprintf(stderr, "Unable to allocate host memory\n");
		return EXIT_FAILURE;
	}

	/* Allocate device memory for matrices */
	float *d_M, *d_N, *d_P;
	CUDA_CHECK(cudaMalloc((void **)&d_M, bytesForM));
	CUDA_CHECK(cudaMalloc((void **)&d_N, bytesForN));
	CUDA_CHECK(cudaMalloc((void **)&d_P, bytesForP));

	/* Fill M and N with random numbers (on host) */
	srand(SEED);
	for (int i = 0; i < m*k; ++i)
		h_M[i] = rand()/(float)RAND_MAX*10.0;
	for (int i = 0; i < k*n; ++i)
		h_N[i] = rand()/(float)RAND_MAX*10.0;

	if (m <= 5 && k <= 5 && n <= 5)
	{
		printf("M =\n"); printMatrix(h_M, m, k);
		printf("N =\n"); printMatrix(h_N, k, n);
	}

	/* Copy M and N to device global memory */
	CUDA_CHECK(cudaMemcpy(d_M, h_M, bytesForM, cudaMemcpyHostToDevice));
	CUDA_CHECK(cudaMemcpy(d_N, h_N, bytesForN, cudaMemcpyHostToDevice));

	/* Launch the CUDA kernel */
	dim3 dimGrid((n+TILE_WIDTH-1)/TILE_WIDTH, (m+TILE_WIDTH-1)/TILE_WIDTH);
	dim3 dimBlock(TILE_WIDTH, TILE_WIDTH);

        printf("matMul called from host");
    
	matMul<<<dimGrid, dimBlock>>>(d_M, d_N, d_P, m, k, n);
	CUDA_CHECK(cudaDeviceSynchronize());

	/* Copy result matrix from device global memory back to host memory */
	CUDA_CHECK(cudaMemcpy(h_P, d_P, bytesForP, cudaMemcpyDeviceToHost));
          
          printf(" product received from host");
       
	if (m <= 5 && k <= 5 && n <= 5)
	{
		printf("P =\n"); printMatrix(h_P, m, n);
	}

	/* Verify that the result matrix is correct */
	for (int row = 0; row < m; row++)
	{
		for (int col = 0; col < n; col++)
		{
			float expected = 0.0;
			for (int i = 0; i < k; i++)
			{
				expected += h_M[row*k+i] * h_N[i*n+col];
			}

			float actual = h_P[row*n+col];

			if (fabs(expected - actual) > EPSILON)
			{
				fprintf(stderr, "d_P[%d, %d] is incorrect\n",
					row, col);
				fprintf(stderr, "    Expected: %f\n", expected);
				fprintf(stderr, "    Computed: %f\n", actual);
				return EXIT_FAILURE;
			}
		}
	}

	/* Free device global memory */
	CUDA_CHECK(cudaFree(d_M));
	CUDA_CHECK(cudaFree(d_N));
	CUDA_CHECK(cudaFree(d_P));

	/* Free host memory */
	free(h_M);
	free(h_N);
	free(h_P);

	/* Reset the device (unnecessary if not profiling, but good practice) */
	CUDA_CHECK(cudaDeviceReset());

	printf("Done\n");
	return EXIT_SUCCESS;
}

	.file	"tmpxft_0026acc8_00000000-6_mp2.cudafe1.cpp"
	.text
#APP

	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"["
.LC1:
	.string	" %3.3f"
.LC2:
	.string	" ..."
.LC3:
	.string	" ]\n"
#NO_APP
	.text
	.type	_ZL8printRowiPfi, @function
_ZL8printRowiPfi:
.LFB2027:
	.cfi_startproc
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%eax, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%edi, %r12d
	movl	$2, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rsi, %rbp
	leaq	.LC0(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%edx, %ebx
	call	__printf_chk@PLT
	testl	%ebx, %ebx
	jle	.L3
	imull	%ebx, %r12d
	leaq	.LC1(%rip), %r13
	movl	$2, %edi
	movq	%r13, %rsi
	movslq	%r12d, %rax
	leaq	0(,%rax,4), %r14
	cvtss2sd	0(%rbp,%rax,4), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
	cmpl	$1, %ebx
	je	.L3
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rbp,%r14), %xmm0
	call	__printf_chk@PLT
	cmpl	$2, %ebx
	je	.L3
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	8(%rbp,%r14), %xmm0
	call	__printf_chk@PLT
	cmpl	$5, %ebx
	jle	.L5
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L6
.L5:
	jne	.L7
.L6:
	leal	-2(%r12,%rbx), %eax
	movq	%r13, %rsi
	movl	$2, %edi
	cltq
	cvtss2sd	0(%rbp,%rax,4), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
	jmp	.L8
.L7:
	cmpl	$4, %ebx
	jne	.L3
.L8:
	leal	-1(%r12,%rbx), %eax
	movq	%r13, %rsi
	movl	$2, %edi
	cltq
	cvtss2sd	0(%rbp,%rax,4), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
.L3:
	popq	%rbx
	.cfi_def_cfa_offset 40
	leaq	.LC3(%rip), %rsi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%r12
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2027:
	.size	_ZL8printRowiPfi, .-_ZL8printRowiPfi
	.section	.rodata.str1.1
.LC4:
	.string	"  ...\n"
	.text
	.type	_ZL11printMatrixPfii, @function
_ZL11printMatrixPfii:
.LFB2028:
	.cfi_startproc
	testl	%esi, %esi
	jle	.L32
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%esi, %ebx
	movq	%rdi, %rsi
	xorl	%edi, %edi
	call	_ZL8printRowiPfi
	cmpl	$1, %ebx
	je	.L17
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movl	$1, %edi
	call	_ZL8printRowiPfi
	cmpl	$2, %ebx
	je	.L17
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movl	$2, %edi
	call	_ZL8printRowiPfi
	cmpl	$5, %ebx
	jle	.L21
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L22
.L21:
	jne	.L23
.L22:
	leal	-2(%rbx), %edi
	movl	%r12d, %edx
	movq	%rbp, %rsi
	call	_ZL8printRowiPfi
	jmp	.L24
.L23:
	cmpl	$4, %ebx
	jne	.L17
.L24:
	leal	-1(%rbx), %edi
	movl	%r12d, %edx
	popq	%rbx
	.cfi_remember_state
	.cfi_restore 3
	.cfi_def_cfa_offset 24
	movq	%rbp, %rsi
	popq	%rbp
	.cfi_restore 6
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_restore 12
	.cfi_def_cfa_offset 8
	jmp	_ZL8printRowiPfi
.L17:
	.cfi_restore_state
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
.L32:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	ret
	.cfi_endproc
.LFE2028:
	.size	_ZL11printMatrixPfii, .-_ZL11printMatrixPfii
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL32__device_stub__Z6matMulPfS_S_iiiPfS_S_iii, @function
_ZL32__device_stub__Z6matMulPfS_S_iiiPfS_S_iii:
.LFB2054:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_ZL6matMulPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L36:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_ZL32__device_stub__Z6matMulPfS_S_iiiPfS_S_iii, .-_ZL32__device_stub__Z6matMulPfS_S_iiiPfS_S_iii
	.type	_ZL6matMulPfS_S_iii, @function
_ZL6matMulPfS_S_iii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_ZL32__device_stub__Z6matMulPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2055:
	.size	_ZL6matMulPfS_S_iii, .-_ZL6matMulPfS_S_iii
	.section	.rodata.str1.1
.LC6:
	.string	"MP2 generates a random (m x k) matrix M and (k x n) matrix N\nand multiplies M by N using tiled matrix multiplication.\nThe values of m, k, and n must be >= 1.\n\nUsage: mp2 m k n\n"
.LC7:
	.string	"Expected 3 arguments; received %d.\n"
.LC8:
	.string	"Invalid value for m, k, or n (%d, %d, %d)\n"
.LC9:
	.string	"Multiplying MN = P.  M is (%d x %d); N is (%d x %d); "
.LC10:
	.string	"using (%d x %d) tiles.\n"
.LC11:
	.string	"Unable to allocate host memory\n"
.LC12:
	.string	"cudaMalloc((void **)&d_M, bytesForM)"
.LC13:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/venkateshreddy74/Tiled-Matrix-Multiplication-for-Square-and-Non-Square-Matrices/master/mp2.cu"
.LC14:
	.string	"CUDA error: %s, line %d, %s: %s\n"
.LC15:
	.string	"cudaMalloc((void **)&d_N, bytesForN)"
.LC16:
	.string	"cudaMalloc((void **)&d_P, bytesForP)"
.LC19:
	.string	"M =\n"
.LC20:
	.string	"N =\n"
.LC21:
	.string	"cudaMemcpy(d_M, h_M, bytesForM, cudaMemcpyHostToDevice)"
.LC22:
	.string	"cudaMemcpy(d_N, h_N, bytesForN, cudaMemcpyHostToDevice)"
.LC23:
	.string	"matMul called from host"
.LC24:
	.string	"cudaDeviceSynchronize()"
.LC25:
	.string	"cudaMemcpy(h_P, d_P, bytesForP, cudaMemcpyDeviceToHost)"
.LC26:
	.string	" product received from host"
.LC27:
	.string	"P =\n"
.LC30:
	.string	"d_P[%d, %d] is incorrect\n"
.LC31:
	.string	"    Expected: %f\n"
.LC32:
	.string	"    Computed: %f\n"
.LC33:
	.string	"cudaFree(d_M)"
.LC34:
	.string	"cudaFree(d_N)"
.LC35:
	.string	"cudaFree(d_P)"
.LC36:
	.string	"cudaDeviceReset()"
.LC37:
	.string	"Done\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	cmpl	$4, %edi
	je	.L42
	movl	%edi, %ebx
	movq	stderr(%rip), %rdi
	leaq	.LC6(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	leal	-1(%rbx), %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	movq	stderr(%rip), %rdi
	leaq	.LC7(%rip), %rdx
	call	__fprintf_chk@PLT
	jmp	.L43
.L42:
	movq	8(%rsi), %rdi
	movq	%rsi, %rbp
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	movq	24(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	testl	%r12d, %r12d
	movl	%eax, %ebp
	setle	%al
	testl	%ebx, %ebx
	setle	%dl
	orb	%dl, %al
	jne	.L73
	testl	%ebp, %ebp
	jg	.L44
.L73:
	movq	stderr(%rip), %rdi
	leaq	.LC6(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	%ebp, %r9d
	movl	%ebx, %r8d
	movl	%r12d, %ecx
	movq	stderr(%rip), %rdi
	leaq	.LC8(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L43:
	movl	$1, %eax
	jmp	.L41
.L44:
	movl	%ebp, %r9d
	movl	%ebx, %r8d
	movl	%ebx, %ecx
	movl	%r12d, %edx
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$16, %edx
	movl	$16, %ecx
	xorl	%eax, %eax
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	%r12d, %eax
	imull	%ebx, %eax
	cltq
	salq	$2, %rax
	movq	%rax, 8(%rsp)
	movl	%ebx, %eax
	movq	8(%rsp), %rdi
	imull	%ebp, %eax
	cltq
	salq	$2, %rax
	movq	%rax, 16(%rsp)
	movl	%r12d, %eax
	imull	%ebp, %eax
	cltq
	salq	$2, %rax
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	16(%rsp), %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	24(%rsp), %rdi
	movq	%rax, %r13
	call	malloc@PLT
	testq	%r14, %r14
	movq	%rax, (%rsp)
	sete	%al
	testq	%r13, %r13
	sete	%dl
	orb	%dl, %al
	jne	.L74
	cmpq	$0, (%rsp)
	jne	.L47
.L74:
	movq	stderr(%rip), %rdi
	leaq	.LC11(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L43
.L47:
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L49
	call	cudaGetErrorString@PLT
	leaq	.LC12(%rip), %r9
	pushq	%r12
	.cfi_remember_state
	.cfi_def_cfa_offset 184
	movl	$216, %r8d
	pushq	%rax
	.cfi_def_cfa_offset 192
	jmp	.L87
.L49:
	.cfi_restore_state
	movq	16(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L50
	call	cudaGetErrorString@PLT
	pushq	%rbp
	.cfi_def_cfa_offset 184
	leaq	.LC15(%rip), %r9
	movl	$217, %r8d
	pushq	%rax
	.cfi_def_cfa_offset 192
.L87:
	movq	stderr(%rip), %rdi
	leaq	.LC13(%rip), %rcx
	leaq	.LC14(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L50:
	.cfi_def_cfa_offset 176
	movq	24(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L51
	call	cudaGetErrorString@PLT
	leaq	.LC16(%rip), %r9
	pushq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 184
	movl	$218, %r8d
	pushq	%rax
	.cfi_def_cfa_offset 192
	jmp	.L87
.L51:
	.cfi_restore_state
	movl	$1, %edi
	movq	%r14, %r15
	call	srand@PLT
	movq	8(%rsp), %rax
	movq	%r14, %rdx
	addq	%r14, %rax
	movq	%rax, 32(%rsp)
.L52:
	movq	%rdx, 40(%rsp)
	call	rand@PLT
	movq	40(%rsp), %rdx
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC17(%rip), %xmm0
	mulss	.LC18(%rip), %xmm0
	addq	$4, %rdx
	movss	%xmm0, -4(%rdx)
	cmpq	%rdx, 32(%rsp)
	jne	.L52
	movq	16(%rsp), %rax
	movq	%r13, %rdx
	addq	%r13, %rax
	movq	%rax, 32(%rsp)
.L53:
	movq	%rdx, 40(%rsp)
	call	rand@PLT
	movq	40(%rsp), %rdx
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC17(%rip), %xmm0
	mulss	.LC18(%rip), %xmm0
	addq	$4, %rdx
	movss	%xmm0, -4(%rdx)
	cmpq	%rdx, 32(%rsp)
	jne	.L53
	cmpl	$5, %r12d
	setle	%al
	cmpl	$5, %ebx
	setle	%dl
	andl	%edx, %eax
	cmpl	$5, %ebp
	setle	%dl
	andb	%dl, %al
	movb	%al, 32(%rsp)
	je	.L54
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edx
	movl	%r12d, %esi
	movq	%r14, %rdi
	call	_ZL11printMatrixPfii
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebp, %edx
	movl	%ebx, %esi
	movq	%r13, %rdi
	call	_ZL11printMatrixPfii
.L54:
	movq	56(%rsp), %rdi
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L55
	call	cudaGetErrorString@PLT
	leaq	.LC21(%rip), %r9
	movl	$234, %r8d
	pushq	%r11
	.cfi_remember_state
	.cfi_def_cfa_offset 184
	pushq	%rax
	.cfi_def_cfa_offset 192
	jmp	.L87
.L55:
	.cfi_restore_state
	movq	64(%rsp), %rdi
	movq	16(%rsp), %rdx
	movl	$1, %ecx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L56
	call	cudaGetErrorString@PLT
	leaq	.LC22(%rip), %r9
	movl	$235, %r8d
	pushq	%r10
	.cfi_remember_state
	.cfi_def_cfa_offset 184
	pushq	%rax
	.cfi_def_cfa_offset 192
	jmp	.L87
.L56:
	.cfi_restore_state
	leal	15(%rbp), %eax
	leaq	.LC23(%rip), %rsi
	movl	$2, %edi
	movl	$1, 88(%rsp)
	sarl	$4, %eax
	movl	$1, 100(%rsp)
	movl	%eax, 80(%rsp)
	leal	15(%r12), %eax
	sarl	$4, %eax
	movl	%eax, 84(%rsp)
	movabsq	$68719476752, %rax
	movq	%rax, 92(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	100(%rsp), %ecx
	movl	88(%rsp), %esi
	xorl	%r9d, %r9d
	movq	92(%rsp), %rdx
	movq	80(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L57
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	%ebp, %r9d
	movl	%ebx, %r8d
	movq	56(%rsp), %rdi
	movl	%r12d, %ecx
	call	_ZL32__device_stub__Z6matMulPfS_S_iiiPfS_S_iii
.L57:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L58
	call	cudaGetErrorString@PLT
	movl	$244, %r8d
	pushq	%r9
	.cfi_remember_state
	.cfi_def_cfa_offset 184
	leaq	.LC24(%rip), %r9
	pushq	%rax
	.cfi_def_cfa_offset 192
	jmp	.L87
.L58:
	.cfi_restore_state
	movq	(%rsp), %rdi
	movq	24(%rsp), %rdx
	movl	$2, %ecx
	movq	72(%rsp), %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L59
	call	cudaGetErrorString@PLT
	leaq	.LC25(%rip), %r9
	pushq	%r8
	.cfi_remember_state
	.cfi_def_cfa_offset 184
	movl	$247, %r8d
	pushq	%rax
	.cfi_def_cfa_offset 192
	jmp	.L87
.L59:
	.cfi_restore_state
	xorl	%eax, %eax
	leaq	.LC26(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpb	$0, 32(%rsp)
	je	.L60
	leaq	.LC27(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	movl	%ebp, %edx
	movl	%r12d, %esi
	call	_ZL11printMatrixPfii
.L60:
	movslq	%ebp, %rax
	movslq	%ebx, %rsi
	movq	(%rsp), %rdi
	xorl	%ecx, %ecx
	movsd	.LC29(%rip), %xmm4
	salq	$2, %rax
	salq	$2, %rsi
	movss	.LC28(%rip), %xmm3
.L61:
	xorl	%r8d, %r8d
.L67:
	leaq	0(%r13,%r8,4), %r9
	xorl	%edx, %edx
	xorps	%xmm0, %xmm0
.L62:
	movss	(%r15,%rdx,4), %xmm1
	mulss	(%r9), %xmm1
	incq	%rdx
	addq	%rax, %r9
	addss	%xmm1, %xmm0
	cmpl	%edx, %ebx
	jg	.L62
	movss	(%rdi,%r8,4), %xmm2
	movaps	%xmm0, %xmm1
	subss	%xmm2, %xmm1
	andps	%xmm3, %xmm1
	cvtss2sd	%xmm1, %xmm1
	comisd	%xmm4, %xmm1
	jbe	.L85
	movq	stderr(%rip), %rdi
	leaq	.LC30(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	movss	%xmm2, (%rsp)
	movss	%xmm0, 8(%rsp)
	call	__fprintf_chk@PLT
	movss	8(%rsp), %xmm0
	movl	$2, %esi
	movb	$1, %al
	movq	stderr(%rip), %rdi
	leaq	.LC31(%rip), %rdx
	cvtss2sd	%xmm0, %xmm0
	call	__fprintf_chk@PLT
	movss	(%rsp), %xmm2
	movl	$2, %esi
	movb	$1, %al
	movq	stderr(%rip), %rdi
	leaq	.LC32(%rip), %rdx
	cvtss2sd	%xmm2, %xmm0
	call	__fprintf_chk@PLT
	jmp	.L43
.L85:
	incq	%r8
	cmpl	%r8d, %ebp
	jg	.L67
	incl	%ecx
	addq	%rax, %rdi
	addq	%rsi, %r15
	cmpl	%ecx, %r12d
	jg	.L61
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L68
	call	cudaGetErrorString@PLT
	leaq	.LC33(%rip), %r9
	movl	$281, %r8d
	pushq	%rdi
	.cfi_remember_state
	.cfi_def_cfa_offset 184
	pushq	%rax
	.cfi_def_cfa_offset 192
	jmp	.L87
.L68:
	.cfi_restore_state
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L69
	call	cudaGetErrorString@PLT
	leaq	.LC34(%rip), %r9
	movl	$282, %r8d
	pushq	%rsi
	.cfi_remember_state
	.cfi_def_cfa_offset 184
	pushq	%rax
	.cfi_def_cfa_offset 192
	jmp	.L87
.L69:
	.cfi_restore_state
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L70
	call	cudaGetErrorString@PLT
	leaq	.LC35(%rip), %r9
	movl	$283, %r8d
	pushq	%rcx
	.cfi_remember_state
	.cfi_def_cfa_offset 184
	pushq	%rax
	.cfi_def_cfa_offset 192
	jmp	.L87
.L70:
	.cfi_restore_state
	movq	%r14, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	free@PLT
	call	cudaDeviceReset@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L71
	call	cudaGetErrorString@PLT
	leaq	.LC36(%rip), %r9
	movl	$291, %r8d
	pushq	%rdx
	.cfi_remember_state
	.cfi_def_cfa_offset 184
	pushq	%rax
	.cfi_def_cfa_offset 192
	jmp	.L87
.L71:
	.cfi_restore_state
	leaq	.LC37(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L41:
	movq	104(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L72
	call	__stack_chk_fail@PLT
.L72:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC38:
	.string	"_Z6matMulPfS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC38(%rip), %rdx
	movq	%rax, %rdi
	leaq	_ZL6matMulPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC17:
	.long	805306368
	.align 4
.LC18:
	.long	1092616192
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC28:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC29:
	.long	1202590843
	.long	1065646817
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 *                         Tiled Matrix Multiplication
 *             (MP2, Fall 2014, GPU Programming/Auburn University)
 *
 *   Compile with -DTILE_WIDTH=16 (for example) to change the tile size.
 *   Compile with -DSEED=12 (for example) to seed the random number generator.
 */

#include <assert.h>
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>

/* Usage message displayed when invalid command line arguments are supplied */
#define USAGE \
	"MP2 generates a random (m x k) matrix M and (k x n) matrix N\n" \
	"and multiplies M by N using tiled matrix multiplication.\n" \
	"The values of m, k, and n must be >= 1.\n" \
	"\n" \
	"Usage: mp2 m k n\n"

/* Tile size -- define here if not defined using the -D compiler flag */
#ifndef TILE_WIDTH
#  define TILE_WIDTH 16
#endif

/* Seed for the random number generator -- define here if not using -D */
#ifndef SEED
#  define SEED 1
#endif

/* Maximum difference allowed between the GPU and CPU result matrices */
#define EPSILON 1e-2

/* If a CUDA call fails, display an error message and exit */
#define CUDA_CHECK(e) { \
	hipError_t err = (e); \
	if (err != hipSuccess) \
	{ \
		fprintf(stderr, "CUDA error: %s, line %d, %s: %s\n", \
			__FILE__, __LINE__, #e, hipGetErrorString(err)); \
		exit(EXIT_FAILURE); \
	} \
}

/* assert() is only supported on devices of compute capability >= 2.0 */
#if defined(__CUDA_ARCH__) && (__CUDA_ARCH__ < 200)
#  undef  assert
#  define assert(arg)
#endif

/* Tiled matrix multiplication kernel */
__global__  static void matMul(float *d_M, float *d_N, float *d_P,
                       int m, int k, int n)
{
	assert(blockDim.x == TILE_WIDTH && blockDim.y == TILE_WIDTH);

	/*
	 *
	 *
	 * TODO: IMPLEMENT TILED MATRIX MULTIPLICATION
	 *
	 * Multiply matrix d_M by d_N, storing product in d_P.
	 * Use tiled matrix multiplication with shared memory.
	 *
	 *
	 */

//__shared__ float Mds[TILE_WIDTH][TILE_WIDTH];
//__shared__ float Nds[TILE_WIDTH][TILE_WIDTH];


__shared__ float ds_A[TILE_WIDTH][TILE_WIDTH];
__shared__ float ds_B[TILE_WIDTH][TILE_WIDTH];

int tx = threadIdx.x, ty = threadIdx.y;

int row = blockIdx.y * TILE_WIDTH + threadIdx.y;
int col= blockIdx.x  * TILE_WIDTH + threadIdx.x;

float sum = 0;

//double numberoftiles =ceil(m/TILE_WIDTH);

if (m == k== n) {   
for (int l=0;l<m/TILE_WIDTH ; ++l) {     //iterate through tiles

	for (int j=0; j< TILE_WIDTH ; ++j) {    //iterate through elements in the tile

           sum = sum + d_M[(row*m) + ( l*TILE_WIDTH+j)] * d_N[(l*TILE_WIDTH+j)*m + col ];

         }
    
     __syncthreads();


 }

d_P[row*m +col] = sum;  

} else  {

for (int l=0;l<ceil((float) k/TILE_WIDTH) ; ++l) {     //iterate through tiles


             if (row < m  && l * TILE_WIDTH + tx < k)
		
			ds_A[ty][tx] = d_M[row *k  + l * TILE_WIDTH + tx];
	    else
			ds_A[ty][tx] = 0.0;

           if (l * TILE_WIDTH + ty < k  && col < n)

		ds_B[ty][tx] = d_N[(l * TILE_WIDTH + ty) *n  + col];
            
	 else
		ds_B[ty][tx] = 0.0;  
        
	 __syncthreads();  

        for (int j=0; j< TILE_WIDTH &&  j < k ; ++j) {    //iterate through elements in the tile

           sum = sum +  ds_A[ty][j] * ds_B[j][tx];


         }

     __syncthreads();


 }

 if (row < m  && col < n)

d_P[row*n+col] =sum;


}          


}




/* Displays one row of the given matrix */
static void printRow(int row, float *matrix, int cols)
{
	printf("[");
	if (cols >= 1) printf(" %3.3f", matrix[row*cols+0]);
	if (cols >= 2) printf(" %3.3f", matrix[row*cols+1]);
	if (cols >= 3) printf(" %3.3f", matrix[row*cols+2]);
	if (cols >= 6) printf(" ...");
	if (cols >= 5) printf(" %3.3f", matrix[row*cols+(cols-2)]);
	if (cols >= 4) printf(" %3.3f", matrix[row*cols+(cols-1)]);
	printf(" ]\n");
}

/* Displays the given matrix */
static void printMatrix(float *matrix, int rows, int cols)
{
	if (rows >= 1) printRow(0, matrix, cols);
	if (rows >= 2) printRow(1, matrix, cols);
	if (rows >= 3) printRow(2, matrix, cols);
	if (rows >= 6) printf("  ...\n");
	if (rows >= 5) printRow(rows-2, matrix, cols);
	if (rows >= 4) printRow(rows-1, matrix, cols);
}

/* Program entrypoint.  Invoke with three command line arguments: m k n */
int main(int argc, char **argv)
{
	/* Get command line arguments; save as m, k, and n */
	if (argc != 4)
	{
		fprintf(stderr, USAGE);
		fprintf(stderr, "Expected 3 arguments; received %d.\n", argc-1);
		return EXIT_FAILURE;
	}
	int m = atoi(argv[1]);
	int k = atoi(argv[2]);
	int n = atoi(argv[3]);
	if (m < 1 || k < 1 || n < 1)
	{
		fprintf(stderr, USAGE);
		fprintf(stderr, "Invalid value for m, k, or n (%d, %d, %d)\n",
			m, k, n);
		return EXIT_FAILURE;
	}
	printf("Multiplying MN = P.  M is (%d x %d); N is (%d x %d); ",
		m, k, k, n);
	printf("using (%d x %d) tiles.\n", TILE_WIDTH, TILE_WIDTH);

	/********************************************/
	/* M is (m x k), N is (k x n), P is (m x n) */
	/********************************************/

	/* Compute number of bytes needed to stores matrices M, N, and P */
	size_t bytesForM = m * k * sizeof(float);
	size_t bytesForN = k * n * sizeof(float);
	size_t bytesForP = m * n * sizeof(float);

	/* Allocate host memory for matrices */
	float *h_M, *h_N, *h_P;
	h_M = (float *)malloc(bytesForM);
	h_N = (float *)malloc(bytesForN);
	h_P = (float *)malloc(bytesForP);
	if (h_M == NULL || h_N == NULL || h_P == NULL)
	{
		fprintf(stderr, "Unable to allocate host memory\n");
		return EXIT_FAILURE;
	}

	/* Allocate device memory for matrices */
	float *d_M, *d_N, *d_P;
	CUDA_CHECK(hipMalloc((void **)&d_M, bytesForM));
	CUDA_CHECK(hipMalloc((void **)&d_N, bytesForN));
	CUDA_CHECK(hipMalloc((void **)&d_P, bytesForP));

	/* Fill M and N with random numbers (on host) */
	srand(SEED);
	for (int i = 0; i < m*k; ++i)
		h_M[i] = rand()/(float)RAND_MAX*10.0;
	for (int i = 0; i < k*n; ++i)
		h_N[i] = rand()/(float)RAND_MAX*10.0;

	if (m <= 5 && k <= 5 && n <= 5)
	{
		printf("M =\n"); printMatrix(h_M, m, k);
		printf("N =\n"); printMatrix(h_N, k, n);
	}

	/* Copy M and N to device global memory */
	CUDA_CHECK(hipMemcpy(d_M, h_M, bytesForM, hipMemcpyHostToDevice));
	CUDA_CHECK(hipMemcpy(d_N, h_N, bytesForN, hipMemcpyHostToDevice));

	/* Launch the CUDA kernel */
	dim3 dimGrid((n+TILE_WIDTH-1)/TILE_WIDTH, (m+TILE_WIDTH-1)/TILE_WIDTH);
	dim3 dimBlock(TILE_WIDTH, TILE_WIDTH);

        printf("matMul called from host");
    
	matMul<<<dimGrid, dimBlock>>>(d_M, d_N, d_P, m, k, n);
	CUDA_CHECK(hipDeviceSynchronize());

	/* Copy result matrix from device global memory back to host memory */
	CUDA_CHECK(hipMemcpy(h_P, d_P, bytesForP, hipMemcpyDeviceToHost));
          
          printf(" product received from host");
       
	if (m <= 5 && k <= 5 && n <= 5)
	{
		printf("P =\n"); printMatrix(h_P, m, n);
	}

	/* Verify that the result matrix is correct */
	for (int row = 0; row < m; row++)
	{
		for (int col = 0; col < n; col++)
		{
			float expected = 0.0;
			for (int i = 0; i < k; i++)
			{
				expected += h_M[row*k+i] * h_N[i*n+col];
			}

			float actual = h_P[row*n+col];

			if (fabs(expected - actual) > EPSILON)
			{
				fprintf(stderr, "d_P[%d, %d] is incorrect\n",
					row, col);
				fprintf(stderr, "    Expected: %f\n", expected);
				fprintf(stderr, "    Computed: %f\n", actual);
				return EXIT_FAILURE;
			}
		}
	}

	/* Free device global memory */
	CUDA_CHECK(hipFree(d_M));
	CUDA_CHECK(hipFree(d_N));
	CUDA_CHECK(hipFree(d_P));

	/* Free host memory */
	free(h_M);
	free(h_N);
	free(h_P);

	/* Reset the device (unnecessary if not profiling, but good practice) */
	CUDA_CHECK(hipDeviceReset());

	printf("Done\n");
	return EXIT_SUCCESS;
}

	.text
	.file	"mp2.hip"
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI0_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI0_1:
	.long	0x41200000                      # float 10
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI0_2:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI0_3:
	.quad	0x3f847ae147ae147b              # double 0.01
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$4, %edi
	jne	.LBB0_44
# %bb.1:
	movq	%rsi, %r14
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r15d
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	24(%r14), %rdi
	callq	atoi
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, (%rsp)                    # 8-byte Spill
	testl	%r15d, %r15d
	jle	.LBB0_45
# %bb.2:
	testl	%ebx, %ebx
	jle	.LBB0_45
# %bb.3:
	cmpl	$0, (%rsp)                      # 4-byte Folded Reload
	jle	.LBB0_45
# %bb.4:
	movl	$.L.str.3, %edi
	movl	%r15d, %esi
	movl	%ebx, %edx
	movl	%ebx, %ecx
	movq	(%rsp), %r14                    # 8-byte Reload
	movl	%r14d, %r8d
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.4, %edi
	movl	$16, %esi
	movl	$16, %edx
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %ebp
	imull	%r15d, %ebp
	movslq	%ebp, %rdi
	shlq	$2, %rdi
	movl	%r14d, %r13d
	imull	%ebx, %r13d
	movslq	%r13d, %r12
	shlq	$2, %r12
	movl	%r14d, %eax
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	imull	%r15d, %eax
	movslq	%eax, %r14
	shlq	$2, %r14
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %r15
	movq	%r12, 48(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	testq	%r15, %r15
	je	.LBB0_46
# %bb.5:
	testq	%r12, %r12
	je	.LBB0_46
# %bb.6:
	cmpq	$0, 8(%rsp)                     # 8-byte Folded Reload
	je	.LBB0_46
# %bb.7:
	leaq	40(%rsp), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB0_47
# %bb.8:
	leaq	32(%rsp), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB0_48
# %bb.9:
	leaq	24(%rsp), %rdi
	movq	%r14, 56(%rsp)                  # 8-byte Spill
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB0_49
# %bb.10:
	movl	$1, %edi
	callq	srand
	testl	%ebp, %ebp
	jle	.LBB0_13
# %bb.11:                               # %.lr.ph.preheader
	movl	%ebp, %ebp
	xorl	%r14d, %r14d
.LBB0_12:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI0_0(%rip), %xmm0
	mulss	.LCPI0_1(%rip), %xmm0
	movss	%xmm0, (%r15,%r14,4)
	incq	%r14
	cmpq	%r14, %rbp
	jne	.LBB0_12
.LBB0_13:                               # %.preheader201
	testl	%r13d, %r13d
	jle	.LBB0_16
# %bb.14:                               # %.lr.ph205.preheader
	movl	%r13d, %r13d
	xorl	%r14d, %r14d
.LBB0_15:                               # %.lr.ph205
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI0_0(%rip), %xmm0
	mulss	.LCPI0_1(%rip), %xmm0
	movss	%xmm0, (%r12,%r14,4)
	incq	%r14
	cmpq	%r14, %r13
	jne	.LBB0_15
.LBB0_16:                               # %._crit_edge
	movq	64(%rsp), %r14                  # 8-byte Reload
	cmpl	$6, %r14d
	setl	%al
	cmpl	$6, %ebx
	setl	%cl
	andb	%al, %cl
	cmpl	$6, (%rsp)                      # 4-byte Folded Reload
	setl	%bpl
	andb	%cl, %bpl
	je	.LBB0_18
# %bb.17:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%ebx, %edx
	callq	_ZL11printMatrixPfii
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	%r12, %rdi
	movl	%ebx, %esi
	movq	(%rsp), %rdx                    # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	callq	_ZL11printMatrixPfii
.LBB0_18:
	movq	40(%rsp), %rdi
	movq	%r15, %rsi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_50
# %bb.19:
	movq	32(%rsp), %rdi
	movq	%r12, %rsi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_51
# %bb.20:
	movq	(%rsp), %rcx                    # 8-byte Reload
	leal	15(%rcx), %eax
	addl	$30, %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$4, %ecx
	leal	15(%r14), %eax
	leal	30(%r14), %r13d
	testl	%eax, %eax
	cmovnsl	%eax, %r13d
	sarl	$4, %r13d
	shlq	$32, %r13
	orq	%rcx, %r13
	movl	$.L.str.15, %edi
	xorl	%eax, %eax
	callq	printf
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%r13, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_22
# %bb.21:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	%r14d, %ecx
	movl	%ebx, %r8d
	movq	(%rsp), %r9                     # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	callq	_ZL21__device_stub__matMulPfS_S_iii
.LBB0_22:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB0_52
# %bb.23:
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_53
# %bb.24:
	movl	$.L.str.18, %edi
	xorl	%eax, %eax
	callq	printf
	testb	%bpl, %bpl
	je	.LBB0_26
# %bb.25:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movl	%r14d, %esi
	movq	(%rsp), %rdx                    # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	callq	_ZL11printMatrixPfii
.LBB0_26:
	testl	%r14d, %r14d
	jle	.LBB0_36
# %bb.27:                               # %.preheader200.lr.ph
	movq	(%rsp), %rax                    # 8-byte Reload
	movslq	%eax, %rcx
	movl	%r14d, %esi
	movl	%eax, %edi
	movl	%ebx, %r8d
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	leaq	(,%rcx,4), %r9
	xorl	%r10d, %r10d
	movaps	.LCPI0_2(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI0_3(%rip), %xmm1           # xmm1 = mem[0],zero
	xorl	%edx, %edx
.LBB0_28:                               # %.preheader200
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_30 Depth 2
                                        #       Child Loop BB0_32 Depth 3
	cmpl	$0, (%rsp)                      # 4-byte Folded Reload
	jle	.LBB0_35
# %bb.29:                               # %.preheader.lr.ph
                                        #   in Loop: Header=BB0_28 Depth=1
	movl	%r10d, %eax
	leaq	(%r15,%rax,4), %r11
	movq	%rdx, %rax
	imulq	16(%rsp), %rax                  # 8-byte Folded Reload
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	movq	%r12, %rbp
	xorl	%ecx, %ecx
.LBB0_30:                               # %.preheader
                                        #   Parent Loop BB0_28 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_32 Depth 3
	xorps	%xmm3, %xmm3
	testl	%ebx, %ebx
	jle	.LBB0_33
# %bb.31:                               # %.lr.ph208.preheader
                                        #   in Loop: Header=BB0_30 Depth=2
	movq	%rbp, %r14
	xorl	%eax, %eax
.LBB0_32:                               # %.lr.ph208
                                        #   Parent Loop BB0_28 Depth=1
                                        #     Parent Loop BB0_30 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r11,%rax,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	mulss	(%r14), %xmm2
	addss	%xmm2, %xmm3
	incq	%rax
	addq	%r9, %r14
	cmpq	%rax, %r8
	jne	.LBB0_32
.LBB0_33:                               # %._crit_edge209
                                        #   in Loop: Header=BB0_30 Depth=2
	movss	(%r13,%rcx,4), %xmm4            # xmm4 = mem[0],zero,zero,zero
	movaps	%xmm3, %xmm2
	subss	%xmm4, %xmm2
	andps	%xmm0, %xmm2
	cvtss2sd	%xmm2, %xmm2
	ucomisd	%xmm1, %xmm2
	ja	.LBB0_41
# %bb.34:                               #   in Loop: Header=BB0_30 Depth=2
	incq	%rcx
	addq	$4, %rbp
	cmpq	%rdi, %rcx
	jne	.LBB0_30
.LBB0_35:                               # %.thread195
                                        #   in Loop: Header=BB0_28 Depth=1
	incq	%rdx
	addl	%ebx, %r10d
	cmpq	%rsi, %rdx
	jne	.LBB0_28
.LBB0_36:                               # %.thread198
	movq	40(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB0_54
# %bb.37:
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB0_55
# %bb.38:
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB0_56
# %bb.39:
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	8(%rsp), %rdi                   # 8-byte Reload
	callq	free
	callq	hipDeviceReset
	testl	%eax, %eax
	jne	.LBB0_57
# %bb.40:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	xorl	%eax, %eax
	jmp	.LBB0_43
.LBB0_41:
	movq	stderr(%rip), %rdi
	movl	$.L.str.20, %esi
                                        # kill: def $edx killed $edx killed $rdx
                                        # kill: def $ecx killed $ecx killed $rcx
	xorl	%eax, %eax
	movss	%xmm3, 8(%rsp)                  # 4-byte Spill
	movss	%xmm4, (%rsp)                   # 4-byte Spill
	callq	fprintf
	movq	stderr(%rip), %rdi
	xorps	%xmm0, %xmm0
	cvtss2sd	8(%rsp), %xmm0                  # 4-byte Folded Reload
	movl	$.L.str.21, %esi
	movb	$1, %al
	callq	fprintf
	movq	stderr(%rip), %rdi
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp), %xmm0                   # 4-byte Folded Reload
	movl	$.L.str.22, %esi
	movb	$1, %al
	callq	fprintf
.LBB0_42:
	movl	$1, %eax
.LBB0_43:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_44:
	.cfi_def_cfa_offset 128
	movl	%edi, %ebx
	movq	stderr(%rip), %rcx
	movl	$.L.str, %edi
	movl	$176, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	movq	stderr(%rip), %rdi
	decl	%ebx
	movl	$.L.str.1, %esi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB0_42
.LBB0_45:
	movq	stderr(%rip), %rcx
	movl	$.L.str, %edi
	movl	$176, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	movq	stderr(%rip), %rdi
	movl	$.L.str.2, %esi
	movl	%r15d, %edx
	movl	%ebx, %ecx
	movq	(%rsp), %r8                     # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB0_42
.LBB0_46:
	movq	stderr(%rip), %rcx
	movl	$.L.str.5, %edi
	movl	$31, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	jmp	.LBB0_42
.LBB0_47:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.7, %edx
	movl	$.L.str.8, %r8d
	movq	%rbx, %rdi
	movl	$216, %ecx
	jmp	.LBB0_58
.LBB0_48:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.7, %edx
	movl	$.L.str.9, %r8d
	movq	%rbx, %rdi
	movl	$217, %ecx
	jmp	.LBB0_58
.LBB0_49:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.7, %edx
	movl	$.L.str.10, %r8d
	movq	%rbx, %rdi
	movl	$218, %ecx
	jmp	.LBB0_58
.LBB0_50:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.7, %edx
	movl	$.L.str.13, %r8d
	movq	%rbx, %rdi
	movl	$234, %ecx
	jmp	.LBB0_58
.LBB0_51:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.7, %edx
	movl	$.L.str.14, %r8d
	movq	%rbx, %rdi
	movl	$235, %ecx
	jmp	.LBB0_58
.LBB0_52:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.7, %edx
	movl	$.L.str.16, %r8d
	movq	%rbx, %rdi
	movl	$244, %ecx
	jmp	.LBB0_58
.LBB0_53:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.7, %edx
	movl	$.L.str.17, %r8d
	movq	%rbx, %rdi
	movl	$247, %ecx
	jmp	.LBB0_58
.LBB0_54:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.7, %edx
	movl	$.L.str.23, %r8d
	movq	%rbx, %rdi
	movl	$281, %ecx                      # imm = 0x119
	jmp	.LBB0_58
.LBB0_55:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.7, %edx
	movl	$.L.str.24, %r8d
	movq	%rbx, %rdi
	movl	$282, %ecx                      # imm = 0x11A
	jmp	.LBB0_58
.LBB0_56:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.7, %edx
	movl	$.L.str.25, %r8d
	movq	%rbx, %rdi
	movl	$283, %ecx                      # imm = 0x11B
	jmp	.LBB0_58
.LBB0_57:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.7, %edx
	movl	$.L.str.26, %r8d
	movq	%rbx, %rdi
	movl	$291, %ecx                      # imm = 0x123
.LBB0_58:
	movq	%rax, %r9
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.type	_ZL11printMatrixPfii,@function  # -- Begin function _ZL11printMatrixPfii
_ZL11printMatrixPfii:                   # @_ZL11printMatrixPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %ebp
	movq	%rdi, %r14
	xorl	%edi, %edi
	movq	%r14, %rsi
	callq	_ZL8printRowiPfi
	cmpl	$2, %ebp
	jl	.LBB1_6
# %bb.1:
	movl	$1, %edi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_ZL8printRowiPfi
	cmpl	$2, %ebp
	jne	.LBB1_2
.LBB1_6:                                # %.thread19
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_2:
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_ZL8printRowiPfi
	cmpl	$5, %ebp
	jb	.LBB1_5
# %bb.3:                                # %.thread18
	movl	$3, %edi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_ZL8printRowiPfi
	jmp	.LBB1_4
.LBB1_5:
	cmpl	$4, %ebp
	jne	.LBB1_6
.LBB1_4:
	decl	%ebp
	movl	%ebp, %edi
	movq	%r14, %rsi
	movl	%ebx, %edx
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZL8printRowiPfi                # TAILCALL
.Lfunc_end1:
	.size	_ZL11printMatrixPfii, .Lfunc_end1-_ZL11printMatrixPfii
	.cfi_endproc
                                        # -- End function
	.type	_ZL21__device_stub__matMulPfS_S_iii,@function # -- Begin function _ZL21__device_stub__matMulPfS_S_iii
_ZL21__device_stub__matMulPfS_S_iii:    # @_ZL21__device_stub__matMulPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZL6matMulPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_ZL21__device_stub__matMulPfS_S_iii, .Lfunc_end2-_ZL21__device_stub__matMulPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.type	_ZL8printRowiPfi,@function      # -- Begin function _ZL8printRowiPfi
_ZL8printRowiPfi:                       # @_ZL8printRowiPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%edx, %r14d
	movq	%rsi, %rbx
	movl	%edi, %r15d
	movl	$91, %edi
	callq	putchar@PLT
	movl	%r14d, %r12d
	imull	%r15d, %r12d
	cvtss2sd	(%rbx,%r12,4), %xmm0
	movl	$.L.str.30, %edi
	movb	$1, %al
	callq	printf
	cmpl	$2, %r14d
	jl	.LBB3_6
# %bb.1:
	movslq	%r12d, %r13
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rbx,%r13,4), %xmm0
	movl	$.L.str.30, %edi
	movb	$1, %al
	callq	printf
	cmpl	$2, %r14d
	je	.LBB3_6
# %bb.2:
	xorps	%xmm0, %xmm0
	cvtss2sd	8(%rbx,%r13,4), %xmm0
	movl	$.L.str.30, %edi
	movb	$1, %al
	callq	printf
	cmpl	$5, %r14d
	jb	.LBB3_4
# %bb.3:                                # %.thread23
	leal	(%r15,%r15,4), %eax
	cltq
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rbx,%rax,4), %xmm0
	movl	$.L.str.30, %edi
	movb	$1, %al
	callq	printf
	jmp	.LBB3_5
.LBB3_4:
	cmpl	$4, %r14d
	jne	.LBB3_6
.LBB3_5:
	leal	(%r14,%r12), %eax
	decl	%eax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%rax,4), %xmm0
	movl	$.L.str.30, %edi
	movb	$1, %al
	callq	printf
.LBB3_6:                                # %.thread24
	movl	$.Lstr.4, %edi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end3:
	.size	_ZL8printRowiPfi, .Lfunc_end3-_ZL8printRowiPfi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZL6matMulPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"MP2 generates a random (m x k) matrix M and (k x n) matrix N\nand multiplies M by N using tiled matrix multiplication.\nThe values of m, k, and n must be >= 1.\n\nUsage: mp2 m k n\n"
	.size	.L.str, 177

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Expected 3 arguments; received %d.\n"
	.size	.L.str.1, 36

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Invalid value for m, k, or n (%d, %d, %d)\n"
	.size	.L.str.2, 43

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Multiplying MN = P.  M is (%d x %d); N is (%d x %d); "
	.size	.L.str.3, 54

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"using (%d x %d) tiles.\n"
	.size	.L.str.4, 24

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Unable to allocate host memory\n"
	.size	.L.str.5, 32

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"CUDA error: %s, line %d, %s: %s\n"
	.size	.L.str.6, 33

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/venkateshreddy74/Tiled-Matrix-Multiplication-for-Square-and-Non-Square-Matrices/master/mp2.hip"
	.size	.L.str.7, 157

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"hipMalloc((void **)&d_M, bytesForM)"
	.size	.L.str.8, 36

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"hipMalloc((void **)&d_N, bytesForN)"
	.size	.L.str.9, 36

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"hipMalloc((void **)&d_P, bytesForP)"
	.size	.L.str.10, 36

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"hipMemcpy(d_M, h_M, bytesForM, hipMemcpyHostToDevice)"
	.size	.L.str.13, 54

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"hipMemcpy(d_N, h_N, bytesForN, hipMemcpyHostToDevice)"
	.size	.L.str.14, 54

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"matMul called from host"
	.size	.L.str.15, 24

	.type	_ZL6matMulPfS_S_iii,@object     # @_ZL6matMulPfS_S_iii
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
_ZL6matMulPfS_S_iii:
	.quad	_ZL21__device_stub__matMulPfS_S_iii
	.size	_ZL6matMulPfS_S_iii, 8

	.type	.L.str.16,@object               # @.str.16
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.16:
	.asciz	"hipDeviceSynchronize()"
	.size	.L.str.16, 23

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"hipMemcpy(h_P, d_P, bytesForP, hipMemcpyDeviceToHost)"
	.size	.L.str.17, 54

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	" product received from host"
	.size	.L.str.18, 28

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"d_P[%d, %d] is incorrect\n"
	.size	.L.str.20, 26

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"    Expected: %f\n"
	.size	.L.str.21, 18

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"    Computed: %f\n"
	.size	.L.str.22, 18

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"hipFree(d_M)"
	.size	.L.str.23, 13

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"hipFree(d_N)"
	.size	.L.str.24, 13

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"hipFree(d_P)"
	.size	.L.str.25, 13

	.type	.L.str.26,@object               # @.str.26
.L.str.26:
	.asciz	"hipDeviceReset()"
	.size	.L.str.26, 17

	.type	.L.str.30,@object               # @.str.30
.L.str.30:
	.asciz	" %3.3f"
	.size	.L.str.30, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_ZL6matMulPfS_S_iii"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"M ="
	.size	.Lstr, 4

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"N ="
	.size	.Lstr.1, 4

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"P ="
	.size	.Lstr.2, 4

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Done"
	.size	.Lstr.3, 5

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	" ]"
	.size	.Lstr.4, 3

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _ZL21__device_stub__matMulPfS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZL6matMulPfS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._ZL6matMulPfS_S_iii,"axG",@progbits,_ZL6matMulPfS_S_iii,comdat
	.globl	_ZL6matMulPfS_S_iii             ; -- Begin function _ZL6matMulPfS_S_iii
	.p2align	8
	.type	_ZL6matMulPfS_S_iii,@function
_ZL6matMulPfS_S_iii:                    ; @_ZL6matMulPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b128 s[8:11], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_lshl_add_u32 v0, s14, 4, v3
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s4, s5
	s_cselect_b32 s2, -1, 0
	v_cndmask_b32_e64 v2, 0, 1, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, s6, v2
	v_lshl_add_u32 v2, s15, 4, v1
	s_cbranch_vccnz .LBB0_13
; %bb.1:                                ; %.preheader88
	v_cvt_f32_i32_e32 v4, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e64 s2, s4, v2
	v_cmp_gt_i32_e64 s3, s6, v0
	s_mov_b32 s7, 0
	v_mul_f32_e32 v4, 0x3d800000, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ceil_f32_e32 v5, v4
	v_mov_b32_e32 v4, 0
	v_cmp_nlt_f32_e32 vcc_lo, 0, v5
	s_cbranch_vccnz .LBB0_10
; %bb.2:                                ; %.lr.ph93
	v_dual_mov_b32 v4, 0 :: v_dual_lshlrev_b32 v9, 2, v3
	v_lshlrev_b32_e32 v6, 6, v1
	v_mul_lo_u32 v7, v2, s5
	s_cmp_gt_i32 s5, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v8, 0x400, v9
	s_cselect_b32 s12, -1, 0
	s_add_i32 s13, s5, -1
	v_add_nc_u32_e32 v9, v6, v9
	s_min_u32 s13, s13, 15
	v_add_nc_u32_e32 v10, v8, v6
	s_add_i32 s13, s13, 1
.LBB0_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_8 Depth 2
	s_lshl_b32 s14, s7, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v11, 0 :: v_dual_add_nc_u32 v12, s14, v3
	v_cmp_gt_i32_e32 vcc_lo, s5, v12
	s_and_b32 s16, s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s15, s16
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_add_nc_u32_e32 v11, v12, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s8, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s9, v12, vcc_lo
	global_load_b32 v11, v[11:12], off
.LBB0_5:                                ; %._crit_edge105
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
	v_dual_mov_b32 v13, 0 :: v_dual_add_nc_u32 v12, s14, v1
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v11
	v_cmp_gt_i32_e32 vcc_lo, s5, v12
	s_and_b32 s15, s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s14, s15
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_3 Depth=1
	v_mad_u64_u32 v[13:14], null, v12, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v14, 31, v13
	v_lshlrev_b64 v[11:12], 2, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s10, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v12, vcc_lo
	global_load_b32 v13, v[11:12], off
.LBB0_7:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v11, v8 :: v_dual_mov_b32 v12, v6
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_mov_b32 s14, s13
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v13
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_9
.LBB0_8:                                ; %.lr.ph
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v13, v12
	ds_load_b32 v14, v11
	v_add_nc_u32_e32 v12, 4, v12
	v_add_nc_u32_e32 v11, 64, v11
	s_add_i32 s14, s14, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s14, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v4, v13, v14
	s_cbranch_scc0 .LBB0_8
.LBB0_9:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_add_i32 s7, s7, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cvt_f32_i32_e32 v11, s7
	s_barrier
	buffer_gl0_inv
	v_cmp_ngt_f32_e32 vcc_lo, v5, v11
	s_cbranch_vccz .LBB0_3
.LBB0_10:                               ; %._crit_edge94
	v_cmp_gt_i32_e32 vcc_lo, s4, v2
	v_cmp_gt_i32_e64 s2, s6, v0
	s_mov_b32 s3, 0
                                        ; implicit-def: $vgpr1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, vcc_lo, s2
	s_mov_b32 s2, 0
	s_and_saveexec_b32 s7, s5
	s_xor_b32 s5, exec_lo, s7
; %bb.11:
	s_mov_b32 s2, exec_lo
	v_mul_lo_u32 v1, v2, s6
; %bb.12:                               ; %Flow157
	s_or_b32 exec_lo, exec_lo, s5
	s_branch .LBB0_14
.LBB0_13:
	s_mov_b32 s3, -1
	s_mov_b32 s2, 0
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr1
.LBB0_14:                               ; %Flow156
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB0_21
; %bb.15:                               ; %.preheader87
	v_mul_lo_u32 v1, v2, s4
	v_mov_b32_e32 v4, 0
	s_cmp_lt_i32 s4, 16
	s_cbranch_scc1 .LBB0_20
; %bb.16:                               ; %.preheader.preheader
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s2, s4, 31
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v7, v0
	s_lshr_b32 s2, s2, 28
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_add_i32 s2, s4, s2
	s_lshl_b32 s6, s4, 4
	s_ashr_i32 s5, s2, 4
	s_mov_b32 s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v5, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v3, vcc_lo
.LBB0_17:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_18 Depth 2
	v_mov_b32_e32 v2, v7
	s_mov_b64 s[2:3], 0
.LBB0_18:                               ;   Parent Loop BB0_17 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_co_u32 v8, vcc_lo, v5, s2
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v6, vcc_lo
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	v_add_nc_u32_e32 v2, s4, v2
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 64
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, s10, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v11, vcc_lo
	global_load_b32 v3, v[8:9], off
	global_load_b32 v8, v[10:11], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v4, v3, v8
	s_cbranch_scc0 .LBB0_18
; %bb.19:                               ;   in Loop: Header=BB0_17 Depth=1
	v_add_co_u32 v5, vcc_lo, v5, 64
	v_add_nc_u32_e32 v7, s6, v7
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	s_add_i32 s7, s7, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s7, s5
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_17
.LBB0_20:                               ; %Flow155
	s_mov_b32 s2, -1
.LBB0_21:                               ; %Flow158
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_23
; %bb.22:                               ; %.sink.split
	s_load_b64 s[0:1], s[0:1], 0x10
	v_add_nc_u32_e32 v0, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB0_23:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZL6matMulPfS_S_iii
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZL6matMulPfS_S_iii,"axG",@progbits,_ZL6matMulPfS_S_iii,comdat
.Lfunc_end0:
	.size	_ZL6matMulPfS_S_iii, .Lfunc_end0-_ZL6matMulPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 888
; NumSgprs: 19
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _ZL6matMulPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _ZL6matMulPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
