/*** fir.gpu.cu**/

#include <stdio.h>
/** Tool function*/

void random_ints(int* a, int N){
int i;
 for(i = 0; i < N; ++i)
 a[i] = (int)(rand() / (RAND_MAX + 1.0) * 10.0);
}

/** CUDA parameters */

#define BLOCK_SIZE 512

// Define fir coefficients in the texture memory
#define COEF_NBR 5

__constant__ int C[]={1, -2, 4, -2, 1};
int h_C[]={1, -2, 4, -2, 1}; //host fir coefficients
/* * FIR kernel */

__global__ void fir(int *D, int *O) {
int index = threadIdx.x + blockIdx.x * blockDim.x;
int i;
 O[index] = 0;
 for(i=0; i<COEF_NBR; i++)
 O[index] += C[i] * D[index + i];
}

/** FIR kernel that uses shared memory */

__global__ void fir_fast(int *D, int *O) {
int index = threadIdx.x + blockIdx.x * blockDim.x;
__shared__ int tmpD[BLOCK_SIZE + COEF_NBR-1]; // reserve with overlapped data
__shared__ int tmpC[COEF_NBR];
__shared__ int tmpO[BLOCK_SIZE];
int i; //my loop iterator

 // Copy block of input data to shared memory
 tmpD[threadIdx.x] = D[index];
 // Copy overlapped input data
 if( threadIdx.x < COEF_NBR-1 )
 tmpD[blockDim.x + threadIdx.x] = D[(blockIdx.x+1) * blockDim.x + threadIdx.x];
 // Copy fir coefficients
 if( threadIdx.x < COEF_NBR)
 tmpC[threadIdx.x] = C[threadIdx.x];

 __syncthreads();

 tmpO[threadIdx.x] = 0;
 for(i=0; i<COEF_NBR; i++)
 tmpO[threadIdx.x] += tmpC[i] * tmpD[threadIdx.x + i];
 __syncthreads();
  O[index] = tmpO[threadIdx.x];
}

/** host program */

int main(void) {
int *h_D, *h_O; // host copies of D, O
int *d_D, *d_O; // device copies of D, O
int nBlk = 512;
int nThx = BLOCK_SIZE;
int N = nBlk * nThx;
int sizeD = (N + COEF_NBR) * sizeof(int);
int sizeO = N * sizeof(int);
int i, j; //my loop iterators
int result;
 // Alloc space for device copies of D, O
 cudaMalloc((void **)&d_D, sizeD);
 cudaMalloc((void **)&d_O, sizeO);

 // Alloc space for host copies of D, O and setup input values
 h_D = (int *)malloc(sizeD); random_ints(h_D, N+COEF_NBR);
 h_O = (int *)malloc(sizeO);

 // Copy input data to device
 cudaMemcpy(d_D, h_D, sizeD, cudaMemcpyHostToDevice);

cudaEvent_t start, stop;
float time;
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start, 0);

 // Launch add() kernel on GPU with N threads
 fir<<<nBlk,nThx>>>(d_D, d_O);


cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&time, start, stop);
printf("GPU time is %f ms\n", time);

 // Copy result back to host
 cudaMemcpy(h_O, d_O, sizeO, cudaMemcpyDeviceToHost);
 //Checkup
 for(i=0; i<N; i++){
 result=0;
 for(j=0; j<COEF_NBR; j++)
 result += h_C[j] * h_D[i + j];
 if( result != h_O[i] ){
 printf("Error at %d. %d != %d\n", i, h_O[i], result);
 goto cleanup;
 }
 }
 printf("Success\n");
cleanup:
 // Cleanup
 free(h_D); free(h_O);
 cudaFree(d_D); cudaFree(d_O);
 return 0;
}




	.file	"tmpxft_00309c78_00000000-6_fir_gpu.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11random_intsPii
	.type	_Z11random_intsPii, @function
_Z11random_intsPii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L3:
	cmpl	%ebx, %ebp
	jle	.L7
	call	rand@PLT
	cvtsi2sdl	%eax, %xmm0
	mulsd	.LC0(%rip), %xmm0
	mulsd	.LC1(%rip), %xmm0
	cvttsd2sil	%xmm0, %eax
	movl	%eax, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L3
.L7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z11random_intsPii, .-_Z11random_intsPii
	.globl	_Z24__device_stub__Z3firPiS_PiS_
	.type	_Z24__device_stub__Z3firPiS_PiS_, @function
_Z24__device_stub__Z3firPiS_PiS_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z3firPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z24__device_stub__Z3firPiS_PiS_, .-_Z24__device_stub__Z3firPiS_PiS_
	.globl	_Z3firPiS_
	.type	_Z3firPiS_, @function
_Z3firPiS_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z24__device_stub__Z3firPiS_PiS_
	.cfi_endproc
.LFE2054:
	.size	_Z3firPiS_, .-_Z3firPiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"GPU time is %f ms\n"
.LC3:
	.string	"Error at %d. %d != %d\n"
.LC4:
	.string	"Success\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$1048596, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$72, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	movl	$1048576, %esi
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1048596, %edi
	call	malloc@PLT
	movl	$262149, %esi
	movq	%rax, %rdi
	movq	%rax, %rbx
	call	_Z11random_intsPii
	movl	$1048576, %edi
	call	malloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$1048596, %edx
	movq	%rax, %rbp
	call	cudaMemcpy@PLT
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$8388609, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$9, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 44(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z24__device_stub__Z3firPiS_PiS_
.L14:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	leaq	44(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	44(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rsi
	movl	$1048576, %edx
	movq	%rbp, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	xorl	%edx, %edx
	leaq	h_C(%rip), %rdi
.L15:
	leaq	(%rbx,%rdx,4), %rsi
	xorl	%eax, %eax
	xorl	%r8d, %r8d
.L16:
	movl	(%rdi,%rax), %ecx
	imull	(%rsi,%rax), %ecx
	addq	$4, %rax
	addl	%ecx, %r8d
	cmpq	$20, %rax
	jne	.L16
	movl	0(%rbp,%rdx,4), %ecx
	cmpl	%r8d, %ecx
	je	.L17
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L18
.L17:
	incq	%rdx
	cmpq	$262144, %rdx
	jne	.L15
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L18:
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.text
	.globl	_Z29__device_stub__Z8fir_fastPiS_PiS_
	.type	_Z29__device_stub__Z8fir_fastPiS_PiS_, @function
_Z29__device_stub__Z8fir_fastPiS_PiS_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z8fir_fastPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L23:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z29__device_stub__Z8fir_fastPiS_PiS_, .-_Z29__device_stub__Z8fir_fastPiS_PiS_
	.globl	_Z8fir_fastPiS_
	.type	_Z8fir_fastPiS_, @function
_Z8fir_fastPiS_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z8fir_fastPiS_PiS_
	.cfi_endproc
.LFE2056:
	.size	_Z8fir_fastPiS_, .-_Z8fir_fastPiS_
	.section	.rodata.str1.1
.LC5:
	.string	"_Z8fir_fastPiS_"
.LC6:
	.string	"_Z3firPiS_"
.LC7:
	.string	"C"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8fir_fastPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z3firPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movl	$20, %r9d
	leaq	_ZL1C(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	h_C
	.data
	.align 16
	.type	h_C, @object
	.size	h_C, 20
h_C:
	.long	1
	.long	-2
	.long	4
	.long	-2
	.long	1
	.local	_ZL1C
	.comm	_ZL1C,20,16
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1040187392
	.align 8
.LC1:
	.long	0
	.long	1076101120
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*** fir.gpu.cu**/


#include <hip/hip_runtime.h>
#include <stdio.h>
/** Tool function*/

void random_ints(int* a, int N){
int i;
 for(i = 0; i < N; ++i)
 a[i] = (int)(rand() / (RAND_MAX + 1.0) * 10.0);
}

/** CUDA parameters */

#define BLOCK_SIZE 512

// Define fir coefficients in the texture memory
#define COEF_NBR 5

__constant__ int C[]={1, -2, 4, -2, 1};
int h_C[]={1, -2, 4, -2, 1}; //host fir coefficients
/* * FIR kernel */

__global__ void fir(int *D, int *O) {
int index = threadIdx.x + blockIdx.x * blockDim.x;
int i;
 O[index] = 0;
 for(i=0; i<COEF_NBR; i++)
 O[index] += C[i] * D[index + i];
}

/** FIR kernel that uses shared memory */

__global__ void fir_fast(int *D, int *O) {
int index = threadIdx.x + blockIdx.x * blockDim.x;
__shared__ int tmpD[BLOCK_SIZE + COEF_NBR-1]; // reserve with overlapped data
__shared__ int tmpC[COEF_NBR];
__shared__ int tmpO[BLOCK_SIZE];
int i; //my loop iterator

 // Copy block of input data to shared memory
 tmpD[threadIdx.x] = D[index];
 // Copy overlapped input data
 if( threadIdx.x < COEF_NBR-1 )
 tmpD[blockDim.x + threadIdx.x] = D[(blockIdx.x+1) * blockDim.x + threadIdx.x];
 // Copy fir coefficients
 if( threadIdx.x < COEF_NBR)
 tmpC[threadIdx.x] = C[threadIdx.x];

 __syncthreads();

 tmpO[threadIdx.x] = 0;
 for(i=0; i<COEF_NBR; i++)
 tmpO[threadIdx.x] += tmpC[i] * tmpD[threadIdx.x + i];
 __syncthreads();
  O[index] = tmpO[threadIdx.x];
}

/** host program */

int main(void) {
int *h_D, *h_O; // host copies of D, O
int *d_D, *d_O; // device copies of D, O
int nBlk = 512;
int nThx = BLOCK_SIZE;
int N = nBlk * nThx;
int sizeD = (N + COEF_NBR) * sizeof(int);
int sizeO = N * sizeof(int);
int i, j; //my loop iterators
int result;
 // Alloc space for device copies of D, O
 hipMalloc((void **)&d_D, sizeD);
 hipMalloc((void **)&d_O, sizeO);

 // Alloc space for host copies of D, O and setup input values
 h_D = (int *)malloc(sizeD); random_ints(h_D, N+COEF_NBR);
 h_O = (int *)malloc(sizeO);

 // Copy input data to device
 hipMemcpy(d_D, h_D, sizeD, hipMemcpyHostToDevice);

hipEvent_t start, stop;
float time;
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start, 0);

 // Launch add() kernel on GPU with N threads
 fir<<<nBlk,nThx>>>(d_D, d_O);


hipEventRecord(stop, 0);
hipEventSynchronize(stop);
hipEventElapsedTime(&time, start, stop);
printf("GPU time is %f ms\n", time);

 // Copy result back to host
 hipMemcpy(h_O, d_O, sizeO, hipMemcpyDeviceToHost);
 //Checkup
 for(i=0; i<N; i++){
 result=0;
 for(j=0; j<COEF_NBR; j++)
 result += h_C[j] * h_D[i + j];
 if( result != h_O[i] ){
 printf("Error at %d. %d != %d\n", i, h_O[i], result);
 goto cleanup;
 }
 }
 printf("Success\n");
cleanup:
 // Cleanup
 free(h_D); free(h_O);
 hipFree(d_D); hipFree(d_O);
 return 0;
}




	.text
	.file	"fir_gpu.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z11random_intsPii
.LCPI0_0:
	.quad	0x3e00000000000000              # double 4.6566128730773926E-10
.LCPI0_1:
	.quad	0x4024000000000000              # double 10
	.text
	.globl	_Z11random_intsPii
	.type	_Z11random_intsPii,@function
_Z11random_intsPii:                     # @_Z11random_intsPii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	mulsd	.LCPI0_1(%rip), %xmm0
	cvttsd2si	%xmm0, %eax
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB0_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB0_4:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z11random_intsPii, .Lfunc_end0-_Z11random_intsPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__firPiS_      # -- Begin function _Z18__device_stub__firPiS_
	.type	_Z18__device_stub__firPiS_,@function
_Z18__device_stub__firPiS_:             # @_Z18__device_stub__firPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3firPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z18__device_stub__firPiS_, .Lfunc_end1-_Z18__device_stub__firPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__fir_fastPiS_ # -- Begin function _Z23__device_stub__fir_fastPiS_
	.type	_Z23__device_stub__fir_fastPiS_,@function
_Z23__device_stub__fir_fastPiS_:        # @_Z23__device_stub__fir_fastPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8fir_fastPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z23__device_stub__fir_fastPiS_, .Lfunc_end2-_Z23__device_stub__fir_fastPiS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x3e00000000000000              # double 4.6566128730773926E-10
.LCPI3_1:
	.quad	0x4024000000000000              # double 10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	16(%rsp), %rdi
	movl	$1048596, %esi                  # imm = 0x100014
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	callq	hipMalloc
	movl	$1048596, %edi                  # imm = 0x100014
	callq	malloc
	movq	%rax, %rbx
	xorl	%r14d, %r14d
.LBB3_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	mulsd	.LCPI3_0(%rip), %xmm0
	mulsd	.LCPI3_1(%rip), %xmm0
	cvttsd2si	%xmm0, %eax
	movl	%eax, (%rbx,%r14,4)
	incq	%r14
	cmpq	$262149, %r14                   # imm = 0x40005
	jne	.LBB3_1
# %bb.2:                                # %_Z11random_intsPii.exit
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	movq	%rax, %r14
	movq	16(%rsp), %rdi
	movl	$1048596, %edx                  # imm = 0x100014
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$4294967808, %rdi               # imm = 0x100000200
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z18__device_stub__firPiS_
.LBB3_4:
	movq	(%rsp), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	36(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %rax
.LBB3_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_6 Depth 2
	xorl	%edx, %edx
	xorl	%ecx, %ecx
.LBB3_6:                                #   Parent Loop BB3_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rax,%rdx), %esi
	imull	h_C(%rdx), %esi
	addl	%esi, %ecx
	addq	$4, %rdx
	cmpq	$20, %rdx
	jne	.LBB3_6
# %bb.7:                                #   in Loop: Header=BB3_5 Depth=1
	movl	(%r14,%r15,4), %edx
	cmpl	%edx, %ecx
	jne	.LBB3_8
# %bb.9:                                #   in Loop: Header=BB3_5 Depth=1
	incq	%r15
	addq	$4, %rax
	cmpq	$262144, %r15                   # imm = 0x40000
	jne	.LBB3_5
# %bb.10:
	movl	$.Lstr, %edi
	callq	puts@PLT
	jmp	.LBB3_11
.LBB3_8:
	movl	$.L.str.1, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
.LBB3_11:
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3firPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8fir_fastPiS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$C, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$20, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	C,@object                       # @C
	.local	C
	.comm	C,20,16
	.type	h_C,@object                     # @h_C
	.data
	.globl	h_C
	.p2align	4, 0x0
h_C:
	.long	1                               # 0x1
	.long	4294967294                      # 0xfffffffe
	.long	4                               # 0x4
	.long	4294967294                      # 0xfffffffe
	.long	1                               # 0x1
	.size	h_C, 20

	.type	_Z3firPiS_,@object              # @_Z3firPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z3firPiS_
	.p2align	3, 0x0
_Z3firPiS_:
	.quad	_Z18__device_stub__firPiS_
	.size	_Z3firPiS_, 8

	.type	_Z8fir_fastPiS_,@object         # @_Z8fir_fastPiS_
	.globl	_Z8fir_fastPiS_
	.p2align	3, 0x0
_Z8fir_fastPiS_:
	.quad	_Z23__device_stub__fir_fastPiS_
	.size	_Z8fir_fastPiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"GPU time is %f ms\n"
	.size	.L.str, 19

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Error at %d. %d != %d\n"
	.size	.L.str.1, 23

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3firPiS_"
	.size	.L__unnamed_1, 11

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z8fir_fastPiS_"
	.size	.L__unnamed_2, 16

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"C"
	.size	.L__unnamed_3, 2

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Success"
	.size	.Lstr, 8

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__firPiS_
	.addrsig_sym _Z23__device_stub__fir_fastPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym C
	.addrsig_sym _Z3firPiS_
	.addrsig_sym _Z8fir_fastPiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3firPiS_              ; -- Begin function _Z3firPiS_
	.globl	_Z3firPiS_
	.p2align	8
	.type	_Z3firPiS_,@function
_Z3firPiS_:                             ; @_Z3firPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_mov_b32_e32 v0, 0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_mov_b64 s[2:3], 0
	global_store_b32 v[3:4], v0, off
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, C@rel32@lo+4
	s_addc_u32 s5, s5, C@rel32@hi+12
	s_add_u32 s4, s2, s4
	s_addc_u32 s5, s3, s5
	s_add_u32 s2, s2, 4
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_load_b32 s4, s[4:5], 0x0
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	global_load_b32 v2, v[5:6], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mad_u64_u32 v[5:6], null, v2, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v0, v5 :: v_dual_add_nc_u32 v1, 1, v1
	global_store_b32 v[3:4], v5, off
	s_cbranch_scc1 .LBB0_1
; %bb.2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3firPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3firPiS_, .Lfunc_end0-_Z3firPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 224
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8fir_fastPiS_         ; -- Begin function _Z8fir_fastPiS_
	.globl	_Z8fir_fastPiS_
	.p2align	8
	.type	_Z8fir_fastPiS_,@function
_Z8fir_fastPiS_:                        ; @_Z8fir_fastPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_add_co_u32 v4, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v4, v[4:5], off
	v_lshlrev_b32_e32 v5, 2, v0
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v4
	v_cmpx_gt_u32_e32 4, v0
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, s4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
	v_lshl_add_u32 v4, s4, 2, v5
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v3
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 5, v0
	s_cbranch_execz .LBB1_4
; %bb.3:
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, C@rel32@lo+4
	s_addc_u32 s5, s5, C@rel32@hi+12
	global_load_b32 v0, v5, s[4:5]
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v0 offset:4112
.LBB1_4:
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v0, 0
	s_mov_b32 s0, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_5:                                ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s0 :: v_dual_add_nc_u32 v4, s0, v5
	s_add_i32 s0, s0, 4
	ds_load_b32 v6, v3 offset:4112
	ds_load_b32 v7, v4
	s_cmp_lg_u32 s0, 20
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[3:4], null, v7, v6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v0, v3
	s_cbranch_scc1 .LBB1_5
; %bb.6:
	ds_store_b32 v5, v3 offset:2064
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v3, v5 offset:2064
	v_add_co_u32 v0, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8fir_fastPiS_
		.amdhsa_group_segment_fixed_size 4132
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z8fir_fastPiS_, .Lfunc_end1-_Z8fir_fastPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 388
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4132 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	C                       ; @C
	.type	C,@object
	.data
	.globl	C
	.p2align	4, 0x0
C:
	.long	1                               ; 0x1
	.long	4294967294                      ; 0xfffffffe
	.long	4                               ; 0x4
	.long	4294967294                      ; 0xfffffffe
	.long	1                               ; 0x1
	.size	C, 20

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym C
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3firPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3firPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 4132
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8fir_fastPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8fir_fastPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
