#include <stdio.h>
#include <cuda.h>
/**/
#define SAMPLE_INTERVAL 4 /* pick a sample every 4 elements */
/**/
/* 
   Inline device function, to compute a rank of a "key" in an array "arr" 
   of length "len" (including this key)
*/
static inline __device__ int get_rank_inclusive(int key, int* arr, int len);
/* 
   Inline device function, to compute a rank of a "key" in an array "arr" 
   of length "len" (excluding this key)
*/
static inline __device__ int get_rank_exclusive(int key, int* arr, int len);
/**/
__global__ void pairwise_merge(int* input, int half_size, int* sb_len_left, int* sb_len_right, int sb_num, int* output)
{
  int i, other_rank, output_rank;
  int* left_half = input;
  int* right_half = input + half_size; 
  int* cur_output = output;
  /* A loop through all pair of sub-blocks */
  for(i=0;i<sb_num;++i)
  {
    /***************************************************************/
    /*  YOUR TASK (with 3 TODOs) STARTS HERE                       */
    /*  Perform the pair-wise merging of corresponding sub-blocks  */
    /***************************************************************/
    if(threadIdx.x < sb_len_left[i])
    {
      int key = left_half[threadIdx.x];
      /***************************/
      /* Your TODO-1 starts here */
      /***************************/
      /* use function get_rank_exclusive() to calculate the rank 
        of key in the right_half */
      /* use function get_rank_exclusive() to calculate the rank 
       of key in the left_right*/
      other_rank = get_rank_exclusive(key,right_half,sb_len_right[i]);
      /* calculate the output rank of key */
      output_rank = threadIdx.x + other_rank;
      /* assign key to the correspoding position in the output array*/
      cur_output[output_rank] = key;
    }
    /**/
    
    /********************************************/
    /* Your TODO-2 starts here:                 */
    /* Use the same process as TODO-1           */
    /* to assign the keys in the right half to  */
    /* the output array                         */
    /* hint: use function get_rank_inclusive    */
    /* instead of get_rank_exclusive            */
    /********************************************/
    if(threadIdx.x < sb_len_right[i])
    {
        int key = right_half[threadIdx.x];
         /* use function get_rank_inclusive() to calculate the rank 
        of key in the left_half*/
        other_rank = get_rank_inclusive(key,left_half,sb_len_left[i]);
        /* calculate the output rank of key */
         output_rank = threadIdx.x + other_rank;
        /* assign key to the correspoding position in the output array*/
        cur_output[output_rank] = key;
    }
    /***************************/
    /* Your TODO-2 ends here   */
    /***************************/
    


    /****************************************************/ 
    /* Your TODO-3 starts here:                         */
    /* Update new positions that                        */
    /* left_half, right_half and cur_output point to    */
    /****************************************************/ 
    left_half += sb_len_left[i];
    right_half += sb_len_right[i];
    /**/
    cur_output += sb_len_left[i];
    cur_output += sb_len_right[i];
    /****************************************************/ 
    /* Your TODO-3 ends here                            */
    /****************************************************/ 

    /**********************************************************/
    /*            YOUR TASK ENDS HERE                         */
    /**********************************************************/

    
  } /* end of the loop through all pair of sub-blocks */
  /**/
}/* end of the kernel*/
/**/
void checkCUDAError(const char *msg);
/**/
int main(int argc, char* argv[])
{   
    int i;
    /**/
    int* h_input, *h_output;
    cudaEvent_t start;
    cudaEvent_t stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);
    /*******************/
    /** READING INPUT **/
    /*******************/
    int half_size,size;
    int sb_num; //number of sub-block
    /* read the value of half_size from stdin*/
    scanf("%d", &half_size);
    size = half_size*2;
    /* Allocate host memory */
    h_input = (int*) malloc(sizeof(int)*size);
    h_output = (int*) malloc(sizeof(int)*size);
    /* read input from stdin */
    for(i=0;i<size;++i) scanf("%d", &h_input[i]);
    /* read the value of sb_num */
    scanf("%d", &sb_num);
    int *h_sb_len_left, *h_sb_len_right;
    h_sb_len_left = (int*) malloc(sizeof(int)*sb_num);
    h_sb_len_right = (int*) malloc(sizeof(int)*sb_num);
    for(i=0;i<sb_num;++i) scanf("%d", &h_sb_len_left[i]);
    for(i=0;i<sb_num;++i) scanf("%d", &h_sb_len_right[i]);
    /**/
    /****************************/
    /** FINISHED INPUT READING **/
    /****************************/
    /******************************/
    /*  allocate device memories  */
    /******************************/
    int* d_input, *d_output, *d_sb_len_left, *d_sb_len_right;
    cudaMalloc(&d_input,sizeof(int)*size);
    cudaMalloc(&d_output,sizeof(int)*size);
    cudaMalloc(&d_sb_len_left,sizeof(int)*sb_num);
    cudaMalloc(&d_sb_len_right,sizeof(int)*sb_num);
    cudaEventRecord(start,0); 
    /***********************************/
    /*      copy input data to device  */
    /***********************************/
    cudaMemcpy(d_input, h_input, size*sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_sb_len_left, h_sb_len_left, sb_num*sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_sb_len_right, h_sb_len_right, sb_num*sizeof(int), cudaMemcpyHostToDevice);
    /* invoke the kernel, with 1 block, SAMPLE_INTERVAL threads */
    pairwise_merge<<<1,SAMPLE_INTERVAL>>>(d_input,half_size,d_sb_len_left,d_sb_len_right,sb_num,d_output);
    checkCUDAError("kernel invocation\n");
    /* copy the sorted results back to host */
    cudaMemcpy(h_output, d_output, sizeof(int)*size, cudaMemcpyDeviceToHost);
    /**/
    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);
    float elapsedTime;
    cudaEventElapsedTime(&elapsedTime, start, stop);
    fprintf(stderr,"Elapsed time = %f (s)\n",elapsedTime);
    cudaEventDestroy(start);
    cudaEventDestroy(stop);
    /*******************************************/
    /* Print the final scan result             */
    /*******************************************/
    printf("The sorted array is :\n");
    for(int i=0;i<size;++i) printf("%d  ",h_output[i]);
    printf("\n");
    /* free device memory */
    cudaFree(d_sb_len_left);
    cudaFree(d_sb_len_right);
    cudaFree(d_input);
    cudaFree(d_output);
    /* free host memory */
    free(h_input);
    free(h_output);
    free(h_sb_len_left);
    free(h_sb_len_right);
    /**/
    return 0;
}
/*function to test CUDA command*/
void checkCUDAError(const char *msg)
{
    cudaError_t err = cudaGetLastError();
    if( cudaSuccess != err)
    {
        fprintf(stderr, "Cuda error: %s: %s.\n", msg,
        cudaGetErrorString( err) );
        exit(EXIT_FAILURE);
    }                        
}
/* 
   Inline device function, to compute a rank of a "key" in an array "arr" 
   of length "len" (including this key)
   Naive implementation. 
   Binary search can be used to implement more efficient function
*/
static inline __device__ int get_rank_inclusive(int key, int* arr, int len)
{
  int rank=0;
  while((rank < len) && (arr[rank]<=key)) ++rank;
  return rank;
}
/* 
   Inline device function, to compute a rank of a "key" in an array "arr" 
   of length "len" (excluding this key)
   Naive implementation. 
   Binary search can be used to implement more efficient function
*/
static inline __device__ int get_rank_exclusive(int key, int* arr, int len)
{
  int rank=0;
  while((rank < len) && (arr[rank]<key)) ++rank;
  return rank;
}

	.file	"tmpxft_0025996d_00000000-6_cudaMergeSort_singleBlock.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Cuda error: %s: %s.\n"
	.text
	.globl	_Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc, @function
_Z14checkCUDAErrorPKc:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L2
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movq	%rbx, %rcx
	leaq	.LC0(%rip), %rdx
	movq	%rax, %r8
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z14checkCUDAErrorPKc, .-_Z14checkCUDAErrorPKc
	.globl	_Z42__device_stub__Z14pairwise_mergePiiS_S_iS_PiiS_S_iS_
	.type	_Z42__device_stub__Z14pairwise_mergePiiS_S_iS_PiiS_S_iS_, @function
_Z42__device_stub__Z14pairwise_mergePiiS_S_iS_PiiS_S_iS_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 32(%rsp)
	movq	%r9, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z14pairwise_mergePiiS_S_iS_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L6:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z42__device_stub__Z14pairwise_mergePiiS_S_iS_PiiS_S_iS_, .-_Z42__device_stub__Z14pairwise_mergePiiS_S_iS_PiiS_S_iS_
	.globl	_Z14pairwise_mergePiiS_S_iS_
	.type	_Z14pairwise_mergePiiS_S_iS_, @function
_Z14pairwise_mergePiiS_S_iS_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z14pairwise_mergePiiS_S_iS_PiiS_S_iS_
	.cfi_endproc
.LFE2056:
	.size	_Z14pairwise_mergePiiS_S_iS_, .-_Z14pairwise_mergePiiS_S_iS_
	.section	.rodata.str1.1
.LC1:
	.string	"%d"
.LC2:
	.string	"kernel invocation\n"
.LC3:
	.string	"Elapsed time = %f (s)\n"
.LC4:
	.string	"The sorted array is :\n"
.LC5:
	.string	"%d  "
.LC6:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	24(%rsp), %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	24(%rsp), %eax
	leal	(%rax,%rax), %r14d
	movslq	%r14d, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%r13, %rbp
	movq	%rax, %r12
.L12:
	cmpl	%r14d, %ebx
	jge	.L23
	movq	%rbp, %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	incl	%ebx
	call	__isoc23_scanf@PLT
	addq	$4, %rbp
	jmp	.L12
.L23:
	leaq	28(%rsp), %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movslq	28(%rsp), %rbx
	salq	$2, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	xorl	%ebx, %ebx
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rbp, %r15
	movq	%rax, 8(%rsp)
.L14:
	cmpl	%ebx, 28(%rsp)
	jle	.L24
	movq	%r15, %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	incl	%ebx
	call	__isoc23_scanf@PLT
	addq	$4, %r15
	jmp	.L14
.L24:
	movq	8(%rsp), %rbx
	xorl	%r15d, %r15d
.L16:
	cmpl	%r15d, 28(%rsp)
	jle	.L25
	movq	%rbx, %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	incl	%r15d
	call	__isoc23_scanf@PLT
	addq	$4, %rbx
	jmp	.L16
.L25:
	movq	(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movslq	28(%rsp), %rsi
	leaq	64(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	28(%rsp), %rsi
	leaq	72(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movslq	28(%rsp), %rdx
	movq	64(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	28(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	72(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$2, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	56(%rsp), %r9
	movl	28(%rsp), %r8d
	movq	72(%rsp), %rcx
	movq	64(%rsp), %rdx
	movl	24(%rsp), %esi
	movq	48(%rsp), %rdi
	call	_Z42__device_stub__Z14pairwise_mergePiiS_S_iS_PiiS_S_iS_
.L18:
	leaq	.LC2(%rip), %rdi
	xorl	%r15d, %r15d
	leaq	.LC5(%rip), %rbx
	call	_Z14checkCUDAErrorPKc
	movq	(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%r12, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	92(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	stderr(%rip), %rdi
	leaq	.LC3(%rip), %rdx
	movb	$1, %al
	movl	$2, %esi
	cvtss2sd	92(%rsp), %xmm0
	call	__fprintf_chk@PLT
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L19:
	cmpl	%r15d, %r14d
	jle	.L26
	movl	(%r12,%r15,4), %edx
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r15
	call	__printf_chk@PLT
	jmp	.L19
.L26:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z14pairwise_mergePiiS_S_iS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14pairwise_mergePiiS_S_iS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>
/**/
#define SAMPLE_INTERVAL 4 /* pick a sample every 4 elements */
/**/
/* 
   Inline device function, to compute a rank of a "key" in an array "arr" 
   of length "len" (including this key)
*/
static inline __device__ int get_rank_inclusive(int key, int* arr, int len);
/* 
   Inline device function, to compute a rank of a "key" in an array "arr" 
   of length "len" (excluding this key)
*/
static inline __device__ int get_rank_exclusive(int key, int* arr, int len);
/**/
__global__ void pairwise_merge(int* input, int half_size, int* sb_len_left, int* sb_len_right, int sb_num, int* output)
{
  int i, other_rank, output_rank;
  int* left_half = input;
  int* right_half = input + half_size; 
  int* cur_output = output;
  /* A loop through all pair of sub-blocks */
  for(i=0;i<sb_num;++i)
  {
    /***************************************************************/
    /*  YOUR TASK (with 3 TODOs) STARTS HERE                       */
    /*  Perform the pair-wise merging of corresponding sub-blocks  */
    /***************************************************************/
    if(threadIdx.x < sb_len_left[i])
    {
      int key = left_half[threadIdx.x];
      /***************************/
      /* Your TODO-1 starts here */
      /***************************/
      /* use function get_rank_exclusive() to calculate the rank 
        of key in the right_half */
      /* use function get_rank_exclusive() to calculate the rank 
       of key in the left_right*/
      other_rank = get_rank_exclusive(key,right_half,sb_len_right[i]);
      /* calculate the output rank of key */
      output_rank = threadIdx.x + other_rank;
      /* assign key to the correspoding position in the output array*/
      cur_output[output_rank] = key;
    }
    /**/
    
    /********************************************/
    /* Your TODO-2 starts here:                 */
    /* Use the same process as TODO-1           */
    /* to assign the keys in the right half to  */
    /* the output array                         */
    /* hint: use function get_rank_inclusive    */
    /* instead of get_rank_exclusive            */
    /********************************************/
    if(threadIdx.x < sb_len_right[i])
    {
        int key = right_half[threadIdx.x];
         /* use function get_rank_inclusive() to calculate the rank 
        of key in the left_half*/
        other_rank = get_rank_inclusive(key,left_half,sb_len_left[i]);
        /* calculate the output rank of key */
         output_rank = threadIdx.x + other_rank;
        /* assign key to the correspoding position in the output array*/
        cur_output[output_rank] = key;
    }
    /***************************/
    /* Your TODO-2 ends here   */
    /***************************/
    


    /****************************************************/ 
    /* Your TODO-3 starts here:                         */
    /* Update new positions that                        */
    /* left_half, right_half and cur_output point to    */
    /****************************************************/ 
    left_half += sb_len_left[i];
    right_half += sb_len_right[i];
    /**/
    cur_output += sb_len_left[i];
    cur_output += sb_len_right[i];
    /****************************************************/ 
    /* Your TODO-3 ends here                            */
    /****************************************************/ 

    /**********************************************************/
    /*            YOUR TASK ENDS HERE                         */
    /**********************************************************/

    
  } /* end of the loop through all pair of sub-blocks */
  /**/
}/* end of the kernel*/
/**/
void checkCUDAError(const char *msg);
/**/
int main(int argc, char* argv[])
{   
    int i;
    /**/
    int* h_input, *h_output;
    hipEvent_t start;
    hipEvent_t stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);
    /*******************/
    /** READING INPUT **/
    /*******************/
    int half_size,size;
    int sb_num; //number of sub-block
    /* read the value of half_size from stdin*/
    scanf("%d", &half_size);
    size = half_size*2;
    /* Allocate host memory */
    h_input = (int*) malloc(sizeof(int)*size);
    h_output = (int*) malloc(sizeof(int)*size);
    /* read input from stdin */
    for(i=0;i<size;++i) scanf("%d", &h_input[i]);
    /* read the value of sb_num */
    scanf("%d", &sb_num);
    int *h_sb_len_left, *h_sb_len_right;
    h_sb_len_left = (int*) malloc(sizeof(int)*sb_num);
    h_sb_len_right = (int*) malloc(sizeof(int)*sb_num);
    for(i=0;i<sb_num;++i) scanf("%d", &h_sb_len_left[i]);
    for(i=0;i<sb_num;++i) scanf("%d", &h_sb_len_right[i]);
    /**/
    /****************************/
    /** FINISHED INPUT READING **/
    /****************************/
    /******************************/
    /*  allocate device memories  */
    /******************************/
    int* d_input, *d_output, *d_sb_len_left, *d_sb_len_right;
    hipMalloc(&d_input,sizeof(int)*size);
    hipMalloc(&d_output,sizeof(int)*size);
    hipMalloc(&d_sb_len_left,sizeof(int)*sb_num);
    hipMalloc(&d_sb_len_right,sizeof(int)*sb_num);
    hipEventRecord(start,0); 
    /***********************************/
    /*      copy input data to device  */
    /***********************************/
    hipMemcpy(d_input, h_input, size*sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_sb_len_left, h_sb_len_left, sb_num*sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_sb_len_right, h_sb_len_right, sb_num*sizeof(int), hipMemcpyHostToDevice);
    /* invoke the kernel, with 1 block, SAMPLE_INTERVAL threads */
    pairwise_merge<<<1,SAMPLE_INTERVAL>>>(d_input,half_size,d_sb_len_left,d_sb_len_right,sb_num,d_output);
    checkCUDAError("kernel invocation\n");
    /* copy the sorted results back to host */
    hipMemcpy(h_output, d_output, sizeof(int)*size, hipMemcpyDeviceToHost);
    /**/
    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);
    float elapsedTime;
    hipEventElapsedTime(&elapsedTime, start, stop);
    fprintf(stderr,"Elapsed time = %f (s)\n",elapsedTime);
    hipEventDestroy(start);
    hipEventDestroy(stop);
    /*******************************************/
    /* Print the final scan result             */
    /*******************************************/
    printf("The sorted array is :\n");
    for(int i=0;i<size;++i) printf("%d  ",h_output[i]);
    printf("\n");
    /* free device memory */
    hipFree(d_sb_len_left);
    hipFree(d_sb_len_right);
    hipFree(d_input);
    hipFree(d_output);
    /* free host memory */
    free(h_input);
    free(h_output);
    free(h_sb_len_left);
    free(h_sb_len_right);
    /**/
    return 0;
}
/*function to test CUDA command*/
void checkCUDAError(const char *msg)
{
    hipError_t err = hipGetLastError();
    if( hipSuccess != err)
    {
        fprintf(stderr, "Cuda error: %s: %s.\n", msg,
        hipGetErrorString( err) );
        exit(EXIT_FAILURE);
    }                        
}
/* 
   Inline device function, to compute a rank of a "key" in an array "arr" 
   of length "len" (including this key)
   Naive implementation. 
   Binary search can be used to implement more efficient function
*/
static inline __device__ int get_rank_inclusive(int key, int* arr, int len)
{
  int rank=0;
  while((rank < len) && (arr[rank]<=key)) ++rank;
  return rank;
}
/* 
   Inline device function, to compute a rank of a "key" in an array "arr" 
   of length "len" (excluding this key)
   Naive implementation. 
   Binary search can be used to implement more efficient function
*/
static inline __device__ int get_rank_exclusive(int key, int* arr, int len)
{
  int rank=0;
  while((rank < len) && (arr[rank]<key)) ++rank;
  return rank;
}

	.text
	.file	"cudaMergeSort_singleBlock.hip"
	.globl	_Z29__device_stub__pairwise_mergePiiS_S_iS_ # -- Begin function _Z29__device_stub__pairwise_mergePiiS_S_iS_
	.type	_Z29__device_stub__pairwise_mergePiiS_S_iS_,@function
_Z29__device_stub__pairwise_mergePiiS_S_iS_: # @_Z29__device_stub__pairwise_mergePiiS_S_iS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14pairwise_mergePiiS_S_iS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__pairwise_mergePiiS_S_iS_, .Lfunc_end0-_Z29__device_stub__pairwise_mergePiiS_S_iS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	leaq	52(%rsp), %rbx
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	(%rbx), %rbx
	leal	(%rbx,%rbx), %eax
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	leaq	(,%rbx,8), %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %rbp
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%rbx, 80(%rsp)                  # 8-byte Spill
	testq	%rbx, %rbx
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	12(%rsp), %eax                  # 4-byte Reload
	cmpl	$2, %eax
	movl	$1, %r12d
	cmovgel	%eax, %r12d
	movq	%rbp, %rbx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	addq	$4, %rbx
	decq	%r12
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	movq	%rbp, 88(%rsp)                  # 8-byte Spill
	leaq	8(%rsp), %rbx
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	(%rbx), %r12
	leaq	(,%r12,4), %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	testq	%r12, %r12
	jle	.LBB1_9
# %bb.4:                                # %.lr.ph41.preheader
	movq	%r15, %rbx
	xorl	%r12d, %r12d
.LBB1_5:                                # %.lr.ph41
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	incq	%r12
	movslq	8(%rsp), %rax
	addq	$4, %rbx
	cmpq	%rax, %r12
	jl	.LBB1_5
# %bb.6:                                # %.preheader
	testl	%eax, %eax
	jle	.LBB1_9
# %bb.7:                                # %.lr.ph43.preheader
	movq	24(%rsp), %rbx                  # 8-byte Reload
	xorl	%r12d, %r12d
.LBB1_8:                                # %.lr.ph43
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	incq	%r12
	movslq	8(%rsp), %rax
	addq	$4, %rbx
	cmpq	%rax, %r12
	jl	.LBB1_8
.LBB1_9:                                # %._crit_edge44
	leaq	72(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movslq	8(%rsp), %rsi
	shlq	$2, %rsi
	leaq	64(%rsp), %r12
	movq	%r12, %rdi
	callq	hipMalloc
	movslq	8(%rsp), %rsi
	shlq	$2, %rsi
	leaq	56(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rbp), %rdi
	movq	88(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movslq	8(%rsp), %rdx
	shlq	$2, %rdx
	movq	%r15, %r12
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movslq	8(%rsp), %rdx
	shlq	$2, %rdx
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	3(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.10:
	movq	72(%rsp), %rdi
	movl	52(%rsp), %esi
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rcx
	movl	8(%rsp), %r8d
	movq	32(%rsp), %r9
	callq	_Z29__device_stub__pairwise_mergePiiS_S_iS_
.LBB1_11:
	movl	$.L.str.1, %edi
	callq	_Z14checkCUDAErrorPKc
	movq	32(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	movq	40(%rsp), %rsi
	movq	16(%rsp), %rdx
	leaq	100(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movq	stderr(%rip), %rdi
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.2, %esi
	movb	$1, %al
	callq	fprintf
	movq	40(%rsp), %rdi
	callq	hipEventDestroy
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movl	$.Lstr, %edi
	callq	puts@PLT
	cmpl	$0, 80(%rsp)                    # 4-byte Folded Reload
	jle	.LBB1_14
# %bb.12:                               # %.lr.ph47.preheader
	movl	12(%rsp), %eax                  # 4-byte Reload
	cmpl	$2, %eax
	movl	$1, %ebx
	cmovgel	%eax, %ebx
	xorl	%r15d, %r15d
.LBB1_13:                               # %.lr.ph47
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r14,%r15,4), %esi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %rbx
	jne	.LBB1_13
.LBB1_14:                               # %._crit_edge48
	movl	$10, %edi
	callq	putchar@PLT
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	%rbp, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	24(%rsp), %rdi                  # 8-byte Reload
	callq	free
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCUDAErrorPKc           # -- Begin function _Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc,@function
_Z14checkCUDAErrorPKc:                  # @_Z14checkCUDAErrorPKc
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB2_2:
	.cfi_def_cfa_offset 32
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movq	%r14, %rdi
	movq	%rbx, %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	_Z14checkCUDAErrorPKc, .Lfunc_end2-_Z14checkCUDAErrorPKc
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14pairwise_mergePiiS_S_iS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14pairwise_mergePiiS_S_iS_,@object # @_Z14pairwise_mergePiiS_S_iS_
	.section	.rodata,"a",@progbits
	.globl	_Z14pairwise_mergePiiS_S_iS_
	.p2align	3, 0x0
_Z14pairwise_mergePiiS_S_iS_:
	.quad	_Z29__device_stub__pairwise_mergePiiS_S_iS_
	.size	_Z14pairwise_mergePiiS_S_iS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d"
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"kernel invocation\n"
	.size	.L.str.1, 19

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Elapsed time = %f (s)\n"
	.size	.L.str.2, 23

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%d  "
	.size	.L.str.4, 5

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Cuda error: %s: %s.\n"
	.size	.L.str.6, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14pairwise_mergePiiS_S_iS_"
	.size	.L__unnamed_1, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"The sorted array is :"
	.size	.Lstr, 22

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__pairwise_mergePiiS_S_iS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14pairwise_mergePiiS_S_iS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14pairwise_mergePiiS_S_iS_ ; -- Begin function _Z14pairwise_mergePiiS_S_iS_
	.globl	_Z14pairwise_mergePiiS_S_iS_
	.p2align	8
	.type	_Z14pairwise_mergePiiS_S_iS_,@function
_Z14pairwise_mergePiiS_S_iS_:           ; @_Z14pairwise_mergePiiS_S_iS_
; %bb.0:
	s_load_b32 s12, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s12, 1
	s_cbranch_scc1 .LBB0_20
; %bb.1:                                ; %.lr.ph
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x28
	s_load_b64 s[10:11], s[0:1], 0x0
	s_load_b128 s[4:7], s[0:1], 0x10
	v_dual_mov_b32 v11, 0 :: v_dual_lshlrev_b32 v12, 2, v0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s3, s2, 31
	v_mov_b32_e32 v1, s8
	s_lshl_b64 s[0:1], s[2:3], 2
	v_mov_b32_e32 v2, s9
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v3, s10 :: v_dual_mov_b32 v6, s1
	v_dual_mov_b32 v4, s11 :: v_dual_mov_b32 v5, s0
	s_mov_b32 s3, 0
	s_mov_b32 s2, s3
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;     Child Loop BB0_14 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[2:3], 2
	s_mov_b32 s1, exec_lo
	s_add_u32 s8, s4, s10
	s_addc_u32 s9, s5, s11
	global_load_b32 v7, v11, s[8:9]
	s_waitcnt vmcnt(0)
	v_cmpx_lt_u32_e64 v0, v7
	s_cbranch_execz .LBB0_11
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_u32 s14, s6, s10
	s_addc_u32 s15, s7, s11
	v_add_co_u32 v7, vcc_lo, v3, v12
	global_load_b32 v10, v11, s[14:15]
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v4, vcc_lo
	global_load_b32 v9, v[7:8], off
	s_waitcnt vmcnt(1)
	v_cmp_gt_i32_e32 vcc_lo, 1, v10
	s_cbranch_vccnz .LBB0_9
; %bb.4:                                ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
	s_mov_b32 s13, 0
	s_mov_b32 s14, 0
                                        ; implicit-def: $sgpr15
.LBB0_5:                                ; %.lr.ph.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v13, v[7:8], off
	s_or_b32 s15, s15, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v13, v9
	v_mov_b32_e32 v13, s14
	s_and_saveexec_b32 s16, vcc_lo
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=2
	s_add_i32 s14, s14, 1
	v_add_co_u32 v7, s0, v7, 4
	v_cmp_eq_u32_e32 vcc_lo, s14, v10
	v_add_co_ci_u32_e64 v8, s0, 0, v8, s0
	v_mov_b32_e32 v13, v10
	s_and_not1_b32 s0, s15, exec_lo
	s_and_b32 s15, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s15, s0, s15
; %bb.7:                                ; %Flow78
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s15
	s_or_b32 s13, s0, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_5
; %bb.8:                                ; %Flow79
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_branch .LBB0_10
.LBB0_9:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v13, 0
.LBB0_10:                               ; %_ZL18get_rank_exclusiveiPii.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v7, v13, v0
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v7, vcc_lo, v1, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, v2, v8, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[7:8], v9, off
	global_load_b32 v7, v11, s[8:9]
.LBB0_11:                               ; %Flow81
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_u32 s10, s6, s10
	s_addc_u32 s11, s7, s11
	s_mov_b32 s1, exec_lo
	global_load_b32 v9, v11, s[10:11]
	s_waitcnt vmcnt(0)
	v_cmpx_lt_u32_e64 v0, v9
	s_cbranch_execz .LBB0_19
; %bb.12:                               ;   in Loop: Header=BB0_2 Depth=1
	v_add_co_u32 v8, vcc_lo, v5, v12
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v6, vcc_lo
	v_mov_b32_e32 v13, 0
	s_mov_b32 s14, 0
	s_mov_b32 s13, exec_lo
	global_load_b32 v10, v[8:9], off
	v_cmpx_lt_i32_e32 0, v7
	s_cbranch_execz .LBB0_18
; %bb.13:                               ; %.lr.ph.i48.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_dual_mov_b32 v9, v4 :: v_dual_mov_b32 v8, v3
	s_mov_b32 s15, 0
                                        ; implicit-def: $sgpr16
.LBB0_14:                               ; %.lr.ph.i48
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v13, v[8:9], off
	s_or_b32 s16, s16, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, v13, v10
	v_mov_b32_e32 v13, s15
	s_and_saveexec_b32 s17, vcc_lo
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=2
	s_add_i32 s15, s15, 1
	v_add_co_u32 v8, s0, v8, 4
	v_cmp_eq_u32_e32 vcc_lo, s15, v7
	v_add_co_ci_u32_e64 v9, s0, 0, v9, s0
	v_mov_b32_e32 v13, v7
	s_and_not1_b32 s0, s16, exec_lo
	s_and_b32 s16, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s16, s0, s16
; %bb.16:                               ; %Flow
                                        ;   in Loop: Header=BB0_14 Depth=2
	s_or_b32 exec_lo, exec_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s16
	s_or_b32 s14, s0, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB0_14
; %bb.17:                               ; %Flow75
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
.LBB0_18:                               ; %Flow76
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v7, v13, v0
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v7, vcc_lo, v1, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, v2, v8, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[7:8], v10, off
	s_clause 0x1
	global_load_b32 v7, v11, s[8:9]
	global_load_b32 v9, v11, s[10:11]
.LBB0_19:                               ; %Flow77
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(1)
	v_ashrrev_i32_e32 v8, 31, v7
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v10, 31, v9
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_cmp_lg_u32 s2, s12
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, v3, v7
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v8, vcc_lo
	v_add_co_u32 v1, vcc_lo, v1, v7
	v_add_co_ci_u32_e32 v2, vcc_lo, v2, v8, vcc_lo
	v_add_co_u32 v5, vcc_lo, v5, v9
	v_add_co_ci_u32_e32 v6, vcc_lo, v6, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, v1, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, v2, v10, vcc_lo
	s_cbranch_scc1 .LBB0_2
.LBB0_20:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14pairwise_mergePiiS_S_iS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14pairwise_mergePiiS_S_iS_, .Lfunc_end0-_Z14pairwise_mergePiiS_S_iS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 792
; NumSgprs: 20
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 48
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14pairwise_mergePiiS_S_iS_
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z14pairwise_mergePiiS_S_iS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
