//This code is a modification of L1 cache benchmark from 
//"Dissecting the NVIDIA Volta GPU Architecture via Microbenchmarking": https://arxiv.org/pdf/1804.06826.pdf

//This benchmark measures the latency of L1 cache

//This code have been tested on Volta V100 architecture

#include <stdio.h>   
#include <stdlib.h> 
#include <cuda.h>
#include <fstream>

//Define constants
#define L1_SIZE_BYTE (128*1024) //L1 size in bytes
#define L2_SIZE_BYTE (6144*1024) //L2 size in bytes
#define WARP_SIZE 32

//Varibales
#define L1_SIZE (L1_SIZE_BYTE/4) //L1 size in 32 bit words
#define L2_SIZE (L2_SIZE_BYTE/4) //L2 size in 32 bit words

#define SHARED_MEM_SIZE_BYTE (48*1024) //size in bytes, max 96KB for v100
#define SHARED_MEM_SIZE (SHARED_MEM_SIZE_BYTE/4)

#define ARRAY_SIZE (4*L2_SIZE)
#define BLOCK_SIZE 32   //Launch only one thread to calcaulte the latency using a pointer-chasing array technique
#define GRID_SIZE 1   
#define TOTAL_THREADS (BLOCK_SIZE*GRID_SIZE)

#define STRIDE_SIZE 1
#define WARMUP_ITER L2_SIZE/STRIDE_SIZE
#define TEST_ITER SHARED_MEM_SIZE


// GPU error check
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true){
        if (code != cudaSuccess) {
                fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
                if (abort) exit(code);
        }
}
 
__global__ void l1_associativity(uint32_t *results, uint32_t *dsink, uint32_t stride, uint32_t *array){

	// thread index
    uint32_t tid = threadIdx.x;
    uint32_t bid = blockIdx.x;
    uint32_t uid = bid*blockDim.x+tid;
    uint32_t n_threads = blockDim.x * gridDim.x;
	
	uint32_t start;
	uint32_t stop;
	__shared__ uint32_t time[SHARED_MEM_SIZE];
    //uint32_t *array = new uint32_t(ARRAY_SIZE);
    //__shared__ uint32_t start[SHARED_MEM_SIZE]; //static shared memory
	//__shared__ uint32_t stop[SHARED_MEM_SIZE]; //static shared memory
	// one thread to initialize the pointer-chasing array
	for (uint32_t i=uid; i<(ARRAY_SIZE); i+=n_threads)
		array[i] = (i+stride)%ARRAY_SIZE;
	__syncthreads();
	if(uid == 0){
        //initalize pointer chaser
		uint32_t p_chaser = 0;
		for(uint32_t i=0; i<WARMUP_ITER; ++i) {
			// chase pointer
			p_chaser = array[p_chaser];
		}

		for(uint32_t i=0; i<TEST_ITER; ++i) {	
			__syncthreads();

			// start timing
			start = clock();
			__syncthreads();

			// chase pointer
			p_chaser = array[p_chaser];
			__syncthreads();

			dsink[i] = p_chaser;
			__syncthreads();

			// stop timing
			stop = clock();
			time[i] = stop - start;
		}
		__syncthreads();
		// write time and data back to memory
		for (uint32_t i=0; i<SHARED_MEM_SIZE; i++){
			results[i] = time[i];
		}
	}

}

int main(){
    uint32_t *results = (uint32_t*) malloc(SHARED_MEM_SIZE*sizeof(uint32_t));
	uint32_t *dsink = (uint32_t*) malloc(TEST_ITER*sizeof(uint32_t));
	uint32_t *array = (uint32_t*) malloc(ARRAY_SIZE*sizeof(uint32_t));
	
	uint32_t *results_g;
	uint32_t *dsink_g;
	uint32_t *array_g;
		
	gpuErrchk( cudaMalloc(&results_g, SHARED_MEM_SIZE*sizeof(uint32_t)) );
	gpuErrchk( cudaMalloc(&dsink_g, TEST_ITER*sizeof(uint32_t)) );
	gpuErrchk( cudaMalloc(&array_g, ARRAY_SIZE*sizeof(uint32_t)) );
	
	l1_associativity<<<GRID_SIZE, BLOCK_SIZE>>>(results_g, dsink_g,STRIDE_SIZE, array_g);
    gpuErrchk( cudaPeekAtLastError() );
	
	gpuErrchk( cudaMemcpy(results, results_g, SHARED_MEM_SIZE*sizeof(uint32_t), cudaMemcpyDeviceToHost) );
	gpuErrchk( cudaMemcpy(dsink, dsink_g, TEST_ITER*sizeof(uint32_t), cudaMemcpyDeviceToHost) );

	// write results to file
	std::ofstream myfile;
	myfile.open ("output_l1_associativity.csv", std::ios::app);
	for (uint32_t i=0; i<SHARED_MEM_SIZE; i++)
		myfile << results[i] << "\n";
	myfile.close();

	return 0;
} 

	.file	"tmpxft_00329568_00000000-6_l2_associativity.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3770:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3770:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB3766:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L8
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L2
	movl	%ebx, %edi
	call	exit@PLT
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L8:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE3766:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.text
	.globl	_Z41__device_stub__Z16l1_associativityPjS_jS_PjS_jS_
	.type	_Z41__device_stub__Z16l1_associativityPjS_jS_PjS_jS_, @function
_Z41__device_stub__Z16l1_associativityPjS_jS_PjS_jS_:
.LFB3792:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16l1_associativityPjS_jS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L12:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3792:
	.size	_Z41__device_stub__Z16l1_associativityPjS_jS_PjS_jS_, .-_Z41__device_stub__Z16l1_associativityPjS_jS_PjS_jS_
	.globl	_Z16l1_associativityPjS_jS_
	.type	_Z16l1_associativityPjS_jS_, @function
_Z16l1_associativityPjS_jS_:
.LFB3793:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z16l1_associativityPjS_jS_PjS_jS_
	.cfi_endproc
.LFE3793:
	.size	_Z16l1_associativityPjS_jS_, .-_Z16l1_associativityPjS_jS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"_Z16l1_associativityPjS_jS_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3795:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16l1_associativityPjS_jS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3795:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC2:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/shen203/GPU_Microbenchmark/master/l2_associativity/l2_associativity.cu"
.LC3:
	.string	"output_l1_associativity.csv"
.LC4:
	.string	"\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3767:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3767
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$49152, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leaq	.LC2(%rip), %rbx
	subq	$584, %rsp
	.cfi_def_cfa_offset 624
	movq	%fs:40, %rax
	movq	%rax, 568(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$49152, %edi
	movq	%rax, %r12
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$49152, %esi
	movq	%rax, %rbp
.LEHB0:
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$106, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	16(%rsp), %rdi
	movl	$49152, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$107, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	24(%rsp), %rdi
	movl	$25165824, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$108, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rsi
	movl	$1, %edx
	movq	8(%rsp), %rdi
	call	_Z41__device_stub__Z16l1_associativityPjS_jS_PjS_jS_
.L20:
	call	cudaPeekAtLastError@PLT
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$111, %edx
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$49152, %edx
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$113, %edx
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$49152, %edx
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	movl	$114, %edx
	movl	$1, %ecx
	movl	%eax, %edi
	leaq	56(%rsp), %rbx
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
	movl	$1, %edx
	leaq	.LC3(%rip), %rsi
	movq	%rbx, %rdi
.LEHB1:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	xorl	%ebp, %ebp
	leaq	.LC4(%rip), %r13
.L21:
	movl	(%r12,%rbp,4), %esi
	movq	%rbx, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	movl	$1, %edx
	movq	%r13, %rsi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	incq	%rbp
	cmpq	$12288, %rbp
	jne	.L21
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
.LEHE1:
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	568(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	jmp	.L27
.L25:
	endbr64
	movq	%rax, %rbp
.L22:
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	568(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L27
	movq	%rbp, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L27:
	call	__stack_chk_fail@PLT
.L24:
	addq	$584, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3767:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3767:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3767-.LLSDACSB3767
.LLSDACSB3767:
	.uleb128 .LEHB0-.LFB3767
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3767
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L25-.LFB3767
	.uleb128 0
	.uleb128 .LEHB2-.LFB3767
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE3767:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//This code is a modification of L1 cache benchmark from 
//"Dissecting the NVIDIA Volta GPU Architecture via Microbenchmarking": https://arxiv.org/pdf/1804.06826.pdf

//This benchmark measures the latency of L1 cache

//This code have been tested on Volta V100 architecture

#include <stdio.h>   
#include <stdlib.h> 
#include <hip/hip_runtime.h>
#include <fstream>

//Define constants
#define L1_SIZE_BYTE (128*1024) //L1 size in bytes
#define L2_SIZE_BYTE (6144*1024) //L2 size in bytes
#define WARP_SIZE 32

//Varibales
#define L1_SIZE (L1_SIZE_BYTE/4) //L1 size in 32 bit words
#define L2_SIZE (L2_SIZE_BYTE/4) //L2 size in 32 bit words

#define SHARED_MEM_SIZE_BYTE (48*1024) //size in bytes, max 96KB for v100
#define SHARED_MEM_SIZE (SHARED_MEM_SIZE_BYTE/4)

#define ARRAY_SIZE (4*L2_SIZE)
#define BLOCK_SIZE 32   //Launch only one thread to calcaulte the latency using a pointer-chasing array technique
#define GRID_SIZE 1   
#define TOTAL_THREADS (BLOCK_SIZE*GRID_SIZE)

#define STRIDE_SIZE 1
#define WARMUP_ITER L2_SIZE/STRIDE_SIZE
#define TEST_ITER SHARED_MEM_SIZE


// GPU error check
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true){
        if (code != hipSuccess) {
                fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
                if (abort) exit(code);
        }
}
 
__global__ void l1_associativity(uint32_t *results, uint32_t *dsink, uint32_t stride, uint32_t *array){

	// thread index
    uint32_t tid = threadIdx.x;
    uint32_t bid = blockIdx.x;
    uint32_t uid = bid*blockDim.x+tid;
    uint32_t n_threads = blockDim.x * gridDim.x;
	
	uint32_t start;
	uint32_t stop;
	__shared__ uint32_t time[SHARED_MEM_SIZE];
    //uint32_t *array = new uint32_t(ARRAY_SIZE);
    //__shared__ uint32_t start[SHARED_MEM_SIZE]; //static shared memory
	//__shared__ uint32_t stop[SHARED_MEM_SIZE]; //static shared memory
	// one thread to initialize the pointer-chasing array
	for (uint32_t i=uid; i<(ARRAY_SIZE); i+=n_threads)
		array[i] = (i+stride)%ARRAY_SIZE;
	__syncthreads();
	if(uid == 0){
        //initalize pointer chaser
		uint32_t p_chaser = 0;
		for(uint32_t i=0; i<WARMUP_ITER; ++i) {
			// chase pointer
			p_chaser = array[p_chaser];
		}

		for(uint32_t i=0; i<TEST_ITER; ++i) {	
			__syncthreads();

			// start timing
			start = clock();
			__syncthreads();

			// chase pointer
			p_chaser = array[p_chaser];
			__syncthreads();

			dsink[i] = p_chaser;
			__syncthreads();

			// stop timing
			stop = clock();
			time[i] = stop - start;
		}
		__syncthreads();
		// write time and data back to memory
		for (uint32_t i=0; i<SHARED_MEM_SIZE; i++){
			results[i] = time[i];
		}
	}

}

int main(){
    uint32_t *results = (uint32_t*) malloc(SHARED_MEM_SIZE*sizeof(uint32_t));
	uint32_t *dsink = (uint32_t*) malloc(TEST_ITER*sizeof(uint32_t));
	uint32_t *array = (uint32_t*) malloc(ARRAY_SIZE*sizeof(uint32_t));
	
	uint32_t *results_g;
	uint32_t *dsink_g;
	uint32_t *array_g;
		
	gpuErrchk( hipMalloc(&results_g, SHARED_MEM_SIZE*sizeof(uint32_t)) );
	gpuErrchk( hipMalloc(&dsink_g, TEST_ITER*sizeof(uint32_t)) );
	gpuErrchk( hipMalloc(&array_g, ARRAY_SIZE*sizeof(uint32_t)) );
	
	l1_associativity<<<GRID_SIZE, BLOCK_SIZE>>>(results_g, dsink_g,STRIDE_SIZE, array_g);
    gpuErrchk( hipPeekAtLastError() );
	
	gpuErrchk( hipMemcpy(results, results_g, SHARED_MEM_SIZE*sizeof(uint32_t), hipMemcpyDeviceToHost) );
	gpuErrchk( hipMemcpy(dsink, dsink_g, TEST_ITER*sizeof(uint32_t), hipMemcpyDeviceToHost) );

	// write results to file
	std::ofstream myfile;
	myfile.open ("output_l1_associativity.csv", std::ios::app);
	for (uint32_t i=0; i<SHARED_MEM_SIZE; i++)
		myfile << results[i] << "\n";
	myfile.close();

	return 0;
} 

	.text
	.file	"l2_associativity.hip"
	.globl	_Z31__device_stub__l1_associativityPjS_jS_ # -- Begin function _Z31__device_stub__l1_associativityPjS_jS_
	.type	_Z31__device_stub__l1_associativityPjS_jS_,@function
_Z31__device_stub__l1_associativityPjS_jS_: # @_Z31__device_stub__l1_associativityPjS_jS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16l1_associativityPjS_jS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__l1_associativityPjS_jS_, .Lfunc_end0-_Z31__device_stub__l1_associativityPjS_jS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$536, %rsp                      # imm = 0x218
	.cfi_def_cfa_offset 576
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$49152, %edi                    # imm = 0xC000
	callq	malloc
	movq	%rax, %rbx
	movl	$49152, %edi                    # imm = 0xC000
	callq	malloc
	movq	%rax, %r14
	leaq	8(%rsp), %rdi
	movl	$49152, %esi                    # imm = 0xC000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_1
# %bb.3:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	movq	%rsp, %rdi
	movl	$49152, %esi                    # imm = 0xC000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.5:                                # %_Z9gpuAssert10hipError_tPKcib.exit14
	leaq	16(%rsp), %rdi
	movl	$25165824, %esi                 # imm = 0x1800000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.7:                                # %_Z9gpuAssert10hipError_tPKcib.exit16
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	31(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	16(%rsp), %rcx
	movl	$1, %edx
	callq	_Z31__device_stub__l1_associativityPjS_jS_
.LBB1_9:
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.11:                               # %_Z9gpuAssert10hipError_tPKcib.exit18
	movq	8(%rsp), %rsi
	movl	$49152, %edx                    # imm = 0xC000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.13:                               # %_Z9gpuAssert10hipError_tPKcib.exit20
	movq	(%rsp), %rsi
	movl	$49152, %edx                    # imm = 0xC000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.15:                               # %_Z9gpuAssert10hipError_tPKcib.exit22
	leaq	24(%rsp), %r14
	movq	%r14, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp0:
	movl	$.L.str.1, %esi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp1:
# %bb.16:                               # %.preheader.preheader
	xorl	%r15d, %r15d
	leaq	24(%rsp), %r14
.LBB1_17:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r15,4), %esi
.Ltmp2:
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp3:
# %bb.18:                               # %_ZNSolsEj.exit
                                        #   in Loop: Header=BB1_17 Depth=1
.Ltmp4:
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp5:
# %bb.19:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
                                        #   in Loop: Header=BB1_17 Depth=1
	incq	%r15
	cmpq	$12288, %r15                    # imm = 0x3000
	jne	.LBB1_17
# %bb.20:
.Ltmp7:
	leaq	24(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp8:
# %bb.21:
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	32(%rsp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, 24(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	272(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	xorl	%eax, %eax
	addq	$536, %rsp                      # imm = 0x218
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_1:
	.cfi_def_cfa_offset 576
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$106, %r8d
	jmp	.LBB1_2
.LBB1_4:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$107, %r8d
	jmp	.LBB1_2
.LBB1_6:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$108, %r8d
	jmp	.LBB1_2
.LBB1_10:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$111, %r8d
	jmp	.LBB1_2
.LBB1_12:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$113, %r8d
	jmp	.LBB1_2
.LBB1_14:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$114, %r8d
.LBB1_2:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB1_22:
.Ltmp9:
	jmp	.LBB1_23
.LBB1_24:
.Ltmp6:
.LBB1_23:
	movq	%rax, %rbx
	leaq	24(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp9-.Lfunc_begin0           #     jumps to .Ltmp9
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp2-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp5-.Ltmp2                  #   Call between .Ltmp2 and .Ltmp5
	.uleb128 .Ltmp6-.Lfunc_begin0           #     jumps to .Ltmp6
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp7-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp8-.Ltmp7                  #   Call between .Ltmp7 and .Ltmp8
	.uleb128 .Ltmp9-.Lfunc_begin0           #     jumps to .Ltmp9
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Lfunc_end1-.Ltmp8             #   Call between .Ltmp8 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16l1_associativityPjS_jS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16l1_associativityPjS_jS_,@object # @_Z16l1_associativityPjS_jS_
	.section	.rodata,"a",@progbits
	.globl	_Z16l1_associativityPjS_jS_
	.p2align	3, 0x0
_Z16l1_associativityPjS_jS_:
	.quad	_Z31__device_stub__l1_associativityPjS_jS_
	.size	_Z16l1_associativityPjS_jS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/shen203/GPU_Microbenchmark/master/l2_associativity/l2_associativity.hip"
	.size	.L.str, 134

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"output_l1_associativity.csv"
	.size	.L.str.1, 28

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\n"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.3, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16l1_associativityPjS_jS_"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__l1_associativityPjS_jS_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z16l1_associativityPjS_jS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16l1_associativityPjS_jS_ ; -- Begin function _Z16l1_associativityPjS_jS_
	.globl	_Z16l1_associativityPjS_jS_
	.p2align	8
	.type	_Z16l1_associativityPjS_jS_,@function
_Z16l1_associativityPjS_jS_:            ; @_Z16l1_associativityPjS_jS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[4:5], s[0:1], 0x18
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s6, 0xffff
	s_mov_b32 s6, exec_lo
	s_mul_i32 s15, s15, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, s15, v0
	v_cmpx_gt_u32_e32 0x600000, v2
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s7, s[0:1], 0x10
	s_load_b32 s3, s[2:3], 0x0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s9, 0
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v3, s15, s7, v0
	s_mul_i32 s3, s3, s8
	s_mov_b32 s8, 0
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v0, 0xaaaaaaab, v3
	v_add_nc_u32_e32 v3, s3, v3
	v_lshrrev_b32_e32 v4, 22, v0
	v_add_nc_u32_e32 v0, s9, v2
	s_add_i32 s9, s9, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v6, s9, v2
	v_mul_u32_u24_e32 v7, 0x600000, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	v_cmp_lt_u32_e32 vcc_lo, 0x5fffff, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v6, s7, v7
	v_add_co_u32 v4, s2, s4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v5, s2, s5, v5, s2
	v_add_nc_u32_e32 v0, v0, v6
	s_or_b32 s8, vcc_lo, s8
	global_store_b32 v[4:5], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow69
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_10
; %bb.4:                                ; %.preheader36.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, 0x180000
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v0, v1
.LBB0_5:                                ; %.preheader36
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_add_i32 s2, s2, -1
	s_cmp_lg_u32 s2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v0, v[2:3], off
	s_cbranch_scc1 .LBB0_5
; %bb.6:                                ; %.preheader.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s6, 0
.LBB0_7:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_getreg_b32 s7, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_barrier
	buffer_gl0_inv
	global_load_b32 v0, v[2:3], off
	s_waitcnt vmcnt(0)
	s_barrier
	buffer_gl0_inv
	global_store_b32 v1, v0, s[2:3]
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_getreg_b32 s8, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s7, s8, s7
	v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s7
	s_add_i32 s6, s6, 4
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmpk_eq_u32 s6, 0xc000
	ds_store_b32 v2, v3
	s_cbranch_scc0 .LBB0_7
; %bb.8:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_9:                                ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v1, s2
	s_add_i32 s2, s2, 4
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_u32 s2, 0xc000
	s_cbranch_scc1 .LBB0_9
.LBB0_10:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16l1_associativityPjS_jS_
		.amdhsa_group_segment_fixed_size 49152
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16l1_associativityPjS_jS_, .Lfunc_end0-_Z16l1_associativityPjS_jS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 588
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 49152 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 49152
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16l1_associativityPjS_jS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16l1_associativityPjS_jS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
