#include <stdio.h>
#include <stdlib.h>
#include <fstream>
#include <chrono>
#include <cuda_runtime.h>
#include <iostream>
#include <vector>

#define BlockSize 32

const int INF = 1000000000;
void input(char *inFileName);
void output(char *outFileName);

void block_FW(int B,char*);
int ceil(int a, int b);
void cal(char* d,size_t pitch,int B, int Round, int block_start_x, int block_start_y, int block_width, int block_height,cudaStream_t stream);
void cpu(int B, int Round, int block_start_x, int block_start_y, int block_width, int block_height);

int n, m;	
int* d;


double io_time = 0;
double comp_time = 0;
double mem_time = 0;

int main(int argc, char* argv[]) {

    auto io_beg = std::chrono::high_resolution_clock::now();
    input(argv[1]);
    auto io_end = std::chrono::high_resolution_clock::now();
    io_time += std::chrono::duration<double>(io_end-io_beg).count();

    int B = BlockSize;
    block_FW(B,argv[2]);

    io_beg = std::chrono::high_resolution_clock::now();
    output(argv[2]);
    io_end = std::chrono::high_resolution_clock::now();
    io_time += std::chrono::duration<double>(io_end-io_beg).count();

    std::cout<< comp_time <<" "<<mem_time<<" "<<io_time;
    delete d;
	return 0;
}

void input(char* infile) {
    FILE* file = fopen(infile, "rb");
    fread(&n, sizeof(int), 1, file);
    fread(&m, sizeof(int), 1, file);

    int *buf = new int[m*3];
    d = new int[n*n];
    fread(buf, sizeof(int), 3*m, file);

    #pragma omp parallel for
    for (int i = 0; i < n; ++ i) {
        for (int j = 0; j < n; ++ j) {
            if (i == j) {
                d[i*n+j] = 0;
            } else {
                d[i*n+j] = INF;
            }
        }
    }

    #pragma omp parallel for
    for (int i = 0; i < m; ++ i) {
        int pair[3];
        // fread(pair, sizeof(int), 3, file);
        for(int j=0;j<3;j++)
            pair[j]=buf[i*3+j];
        d[pair[0]*n+pair[1]] = pair[2];
    }
    fclose(file);
    delete buf;
}

void output(char *outFileName) {
	FILE *outfile = fopen(outFileName, "w");
	fwrite(d, sizeof(int), n*n, outfile);
    fclose(outfile);
}

int ceil(int a, int b) {
	return (a + b - 1) / b;
}

__global__ void kernel_I(char* d,size_t pitch,int block_x,
    int block_y,int n,int B,int r);
__global__ void kernel_II(char* d,size_t pitch,int block_x,
    int block_y,int n,int B,int r);
__global__ void kernel_III(char* d,size_t pitch,int block_x,
    int block_y,int n,int B,int r);

inline void moveBlock(char** ptr,int dst, int src,int x,int y,int B,size_t pitch){
    for(int k=B*x;k<B*(x+1);k++)
        cudaMemcpyPeer(ptr[dst]+pitch*B*k+sizeof(int)*B*y,dst,
                        ptr[src]+pitch*B*k+sizeof(int)*B*y,src,
                        sizeof(int)*B);
}

void block_FW(int B, char* outFileName) {
	int round = ceil(n, B);
    char *device_d[2];
    size_t pitch[2];
    // cudaMalloc(&device_d,sizeof(int)*n*n);
    // cudaMemcpy(device_d,d,sizeof(int)*n*n,cudaMemcpyHostToDevice);
    auto mem_beg = std::chrono::high_resolution_clock::now();
    for(int dev=0;dev<2;dev++){
        cudaSetDevice(dev);
        cudaDeviceEnablePeerAccess(!dev,0);
        cudaMallocPitch(&device_d[dev],&pitch[dev],sizeof(int)*round*B,round*B);
        cudaMemcpy2DAsync(device_d[dev],pitch[dev],
                            d,sizeof(int)*n,
                            sizeof(int)*n,n,cudaMemcpyHostToDevice);
    }
    auto mem_end = std::chrono::high_resolution_clock::now();
    mem_time += std::chrono::duration<double>(mem_end-mem_beg).count();

    for(int dev=0;dev<2;dev++){
        cudaSetDevice(dev);
        cudaDeviceSynchronize();
    }
    
    auto comp_beg = std::chrono::high_resolution_clock::now();
	for (int r = 0; r <= round; ++r) {
        dim3 dimBlock(B,B);
        dim3 dimGrid(1,1);

        // for(int dev=0;dev<2;dev++){
        //     cudaSetDevice(dev);
        //     kernel_I  <<<dimGrid,dimBlock,0,0>>>(device_d[dev],pitch[dev],r,r,n,B,r);
        //     dimGrid = dim3(2,round-1);
        //     kernel_II <<<dimGrid,dimBlock,0,0>>>(device_d[dev],pitch[dev],0,0,n,B,r);
        // }
        
        for(int dev=0;dev<2;dev++){
            cudaSetDevice(dev);
            cudaDeviceSynchronize();
        }
        
        cudaStream_t streams[2][round-round/2];
        for(int i=0;i<round-round/2;i++)
            for(int j=0;j<2;j++)
                cudaStreamCreate(&streams[j][i]);
        #pragma omp parallel sections
        {
            #pragma omp section
            {
                cudaSetDevice(0);
                kernel_I  <<<dimGrid,dimBlock,0,0>>>(device_d[0],pitch[0],r,r,n,B,r);
                dimGrid = dim3(2,round-1);
                kernel_II <<<dimGrid,dimBlock,0,0>>>(device_d[0],pitch[0],0,0,n,B,r);
                dimGrid = dim3(1,round);
                for(int i=0;i<round/2;i++){
                    kernel_III<<<dimGrid,dimBlock,0,streams[0][i]>>>(device_d[0],pitch[0],i,0,n,B,r);
                    // cudaMemcpyPeerAsync(device_d[0]+i*pitch[0]*B,0,
                    //                 device_d[1]+i*pitch[1]*B,1,
                    //                 pitch[1]*B,streams[1]);
                    cudaMemcpy2DAsync(device_d[0]+i*pitch[0]*B,pitch[0],
                                    device_d[1]+i*pitch[1]*B,pitch[1],
                                    sizeof(int)*n,B,cudaMemcpyDefault,streams[0][i]);
                }
                cudaDeviceSynchronize();
            }
            #pragma omp section
            {
                cudaSetDevice(1);
                kernel_I  <<<dimGrid,dimBlock,0,0>>>(device_d[1],pitch[1],r,r,n,B,r);
                dimGrid = dim3(2,round-1);
                kernel_II <<<dimGrid,dimBlock,0,0>>>(device_d[1],pitch[1],0,0,n,B,r);
                dimGrid = dim3(1,round);
                for(int i=round/2;i<round;i++){
                    kernel_III<<<dimGrid,dimBlock,0,streams[1][i-round/2]>>>(device_d[1],pitch[1],i,0,n,B,r);
                    // cudaMemcpyPeerAsync(device_d[1]+i*pitch[1]*B,1,
                    //                 device_d[0]+i*pitch[0]*B,0,
                    //                 pitch[0]*B,streams[1]);
                    cudaMemcpy2DAsync(device_d[1]+i*pitch[1]*B,pitch[1],
                                    device_d[0]+i*pitch[0]*B,pitch[0],
                                    sizeof(int)*n,B,cudaMemcpyDefault,streams[1][i-round/2]);
                }
                cudaDeviceSynchronize();
            }
        }
        
        for(int dev=0;dev<2;dev++){
            cudaSetDevice(dev);
            cudaDeviceSynchronize();
        }
    }

    auto comp_end = std::chrono::high_resolution_clock::now();
    comp_time += std::chrono::duration<double>(comp_end-comp_beg).count();
    mem_beg = std::chrono::high_resolution_clock::now();

    cudaSetDevice(0);
    cudaMemcpy2DAsync(d,sizeof(int)*n,
        device_d[0],pitch[0],
        sizeof(int)*n,round/2*B,cudaMemcpyDeviceToHost);
    cudaSetDevice(1);
    cudaMemcpy2DAsync(d+round/2*B*n,sizeof(int)*n,
        device_d[1]+round/2*B*pitch[1],pitch[1],
        sizeof(int)*n,n-round/2*B,cudaMemcpyDeviceToHost);
    
    for(int dev=0;dev<2;dev++){
        cudaSetDevice(dev);
        cudaDeviceSynchronize();
    }
    mem_end = std::chrono::high_resolution_clock::now();
    mem_time += std::chrono::duration<double>(mem_end-mem_beg).count();
    // cudaMemcpy(d,device_d,sizeof(int)*n*n,cudaMemcpyDeviceToHost);
    for(int dev=0;dev<2;dev++)
        cudaFree(device_d[dev]);
}

__device__ inline int gmin(int a,int b){
    return (a>b)*b+(a<=b)*a;
}

__global__ void kernel_I(char* d,size_t pitch,int block_x,
    int block_y,int n,int B, int r){
    __shared__ int d_i_j[BlockSize][BlockSize+1];

    const unsigned int i = block_x*B+threadIdx.x;
    const unsigned int j = block_y*B+threadIdx.y;
    // const int idx = threadIdx.y*blockDim.x*threadIdx.x;

    int* d_i = (int*)(d+pitch*i);

    unsigned int origin_path = i<n&&j<n? __ldg(&d_i[j]) : INF;
    d_i_j[threadIdx.x][threadIdx.y] = origin_path;

    // int* d_k_j = (int*)(d+pitch*k);
    const unsigned int k_max = gmin((r+1) * B,n);
    #pragma unroll
    for (unsigned int k = r * B; k < k_max; ++k) {
        __syncthreads();
        int new_d = d_i_j[threadIdx.x][k-r*B]+d_i_j[k-r*B][threadIdx.y];
        if(d_i_j[threadIdx.x][threadIdx.y]>new_d){
            d_i_j[threadIdx.x][threadIdx.y]=new_d;
        }
    }

    if(origin_path>d_i_j[threadIdx.x][threadIdx.y]&&i<n&&j<n){
        d_i[j]=d_i_j[threadIdx.x][threadIdx.y];
    }
}

__global__ void kernel_III(char* d,size_t pitch,int block_x,
    int block_y,int n,int B,int r){
    __shared__ int d_i_k[BlockSize][BlockSize+1];
    __shared__ int d_k_j[BlockSize][BlockSize+1];

    int i = (block_x+blockIdx.x)*B+threadIdx.x;
    int j = (block_y+blockIdx.y)*B+threadIdx.y;
    // unsigned int i = (block_x+blockIdx.x)*B+threadIdx.x;
    // unsigned int j = (block_y+blockIdx.y)*B+threadIdx.y;


    int* d_i = ((int*)(d+pitch*i));
    int path = i<n&&j<n?  __ldg(&d_i[j]) : INF;
    int origin_path = path;
    if(r*B+threadIdx.y < n && i < n)
        d_i_k[threadIdx.x][threadIdx.y] = __ldg(&d_i[r*B+threadIdx.y]);
    else
        d_i_k[threadIdx.x][threadIdx.y] = INF;
    if(r*B+threadIdx.x < n && j < n)
        d_k_j[threadIdx.x][threadIdx.y] = __ldg(&((int*)(d+pitch*(r*B+threadIdx.x)))[j]);
    else 
        d_k_j[threadIdx.x][threadIdx.y] = INF;

    __syncthreads();
    // const int k_max = gmin((r+1) * B , n);
    const unsigned int k_max = gmin((r+1) * B,n);
    #pragma unroll
    for (unsigned int k = r * B; k < k_max; ++k) {
        int new_path = d_i_k[threadIdx.x][k-r*B]+d_k_j[k-r*B][threadIdx.y];
        if(path>new_path) path = new_path;
    }
    if(origin_path>path&&i<n&&j<n){
        d_i[j]=path;
    }
}
__global__ void kernel_II(char* d,size_t pitch,int block_x,
    int block_y,int n,int B,int r){
    __shared__ int d_i_k[BlockSize][BlockSize+1];
    __shared__ int d_k_j[BlockSize][BlockSize+1];

    unsigned int i, j;
    if(blockIdx.x==0){
        i = r*B + threadIdx.x;
        j = blockIdx.y * B + threadIdx.y ;
    }
    else{
        i = blockIdx.y * B + threadIdx.x ;
        j = r*B + threadIdx.y;
    }
    // int i = (block_x+blockIdx.x)>=r?
    //     (block_x+blockIdx.x+1)*B+threadIdx.x:(block_x+blockIdx.x)*B+threadIdx.x;
    // int j = (block_y+blockIdx.y)>=r?
    //     (block_y+blockIdx.y+1)*B+threadIdx.y:(block_y+blockIdx.y)*B+threadIdx.y;
    // int j = (block_y+blockIdx.y)*B+threadIdx.y;


    int* d_i = (int*)(d+pitch*i);
    int path = i<n&&j<n? d_i[j] : INF;
    int origin_path = path;
    d_i_k[threadIdx.x][threadIdx.y] = i < n && r*B+threadIdx.y < n ?  __ldg(&d_i[r*B+threadIdx.y]) : INF;
    d_k_j[threadIdx.x][threadIdx.y] = j < n && r*B+threadIdx.x < n ?  __ldg(&((int*)(d+pitch*(r*B+threadIdx.x)))[j]) : INF;

    __syncthreads();
    const unsigned int k_max = gmin((r+1) * B , n);
    #pragma unroll
    for (unsigned int k = r * B; k < k_max; ++k) {
        // int* d_k = (int*)(d+pitch*k);
        int new_path = d_i_k[threadIdx.x][k-r*B]+d_k_j[k-r*B][threadIdx.y];
        if(path>new_path) path = new_path;
    }
    if(origin_path>path&&i<n&&j<n){
        d_i[j]=path;
    }
}


	.file	"tmpxft_002a429b_00000000-6_multi_gpu.wrong.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4240:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4240:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"rb"
	.text
	.globl	_Z5inputPc
	.type	_Z5inputPc, @function
_Z5inputPc:
.LFB4232:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	.LC0(%rip), %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	movl	$1, %ecx
	movl	$4, %edx
	movl	$4, %esi
	movq	%rax, %rbx
	movq	%rax, %r8
	leaq	n(%rip), %rdi
	call	__fread_chk@PLT
	movq	%rbx, %r8
	movl	$1, %ecx
	movl	$4, %edx
	movl	$4, %esi
	leaq	m(%rip), %rdi
	call	__fread_chk@PLT
	imull	$3, m(%rip), %r12d
	movabsq	$2305843009213693950, %rax
	movslq	%r12d, %r12
	cmpq	%r12, %rax
	jb	.L3
	salq	$2, %r12
	movq	%r12, %rdi
	call	_Znam@PLT
	movl	n(%rip), %edi
	movq	%rax, %rbp
	imull	%edi, %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	_Znam@PLT
	movq	%rbx, %r8
	movl	$4, %edx
	movq	%r12, %rsi
	imull	$3, m(%rip), %ecx
	movq	%rbp, %rdi
	movq	%rax, d(%rip)
	movslq	%ecx, %rcx
	call	__fread_chk@PLT
	movq	d(%rip), %rsi
	xorl	%edx, %edx
	xorl	%edi, %edi
	movl	$1000000000, %r8d
	jmp	.L4
.L3:
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L16
	call	__cxa_throw_bad_array_new_length@PLT
.L19:
	incl	%edx
.L4:
	cmpl	%edx, n(%rip)
	jle	.L18
	xorl	%ecx, %ecx
.L8:
	movl	n(%rip), %eax
	cmpl	%ecx, %eax
	jle	.L19
	imull	%edx, %eax
	movl	%r8d, %r9d
	addl	%ecx, %eax
	cmpl	%ecx, %edx
	cmove	%edi, %r9d
	cltq
	incl	%ecx
	movl	%r9d, (%rsi,%rax,4)
	jmp	.L8
.L18:
	movq	%rbp, %rdx
	xorl	%ecx, %ecx
.L9:
	cmpl	%ecx, m(%rip)
	jle	.L20
	movq	(%rdx), %rax
	incl	%ecx
	addq	$12, %rdx
	movq	%rax, 12(%rsp)
	imull	n(%rip), %eax
	movl	-4(%rdx), %edi
	addl	16(%rsp), %eax
	cltq
	movl	%edi, 20(%rsp)
	movl	%edi, (%rsi,%rax,4)
	jmp	.L9
.L20:
	movq	%rbx, %rdi
	call	fclose@PLT
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
.L16:
	call	__stack_chk_fail@PLT
.L11:
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbp, %rdi
	movl	$4, %esi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_ZdlPvm@PLT
	.cfi_endproc
.LFE4232:
	.size	_Z5inputPc, .-_Z5inputPc
	.section	.rodata.str1.1
.LC1:
	.string	"w"
	.text
	.globl	_Z6outputPc
	.type	_Z6outputPc, @function
_Z6outputPc:
.LFB4233:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	.LC1(%rip), %rsi
	call	fopen@PLT
	movl	n(%rip), %edx
	movl	$4, %esi
	movq	d(%rip), %rdi
	movq	%rax, %rbx
	movq	%rax, %rcx
	imull	%edx, %edx
	movslq	%edx, %rdx
	call	fwrite@PLT
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE4233:
	.size	_Z6outputPc, .-_Z6outputPc
	.globl	_Z4ceilii
	.type	_Z4ceilii, @function
_Z4ceilii:
.LFB4234:
	.cfi_startproc
	endbr64
	leal	-1(%rsi,%rdi), %eax
	cltd
	idivl	%esi
	ret
	.cfi_endproc
.LFE4234:
	.size	_Z4ceilii, .-_Z4ceilii
	.globl	_Z33__device_stub__Z8kernel_IPcmiiiiiPcmiiiii
	.type	_Z33__device_stub__Z8kernel_IPcmiiiiiPcmiiiii, @function
_Z33__device_stub__Z8kernel_IPcmiiiiiPcmiiiii:
.LFB4262:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	40(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z8kernel_IPcmiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 192
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L24:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4262:
	.size	_Z33__device_stub__Z8kernel_IPcmiiiiiPcmiiiii, .-_Z33__device_stub__Z8kernel_IPcmiiiiiPcmiiiii
	.globl	_Z8kernel_IPcmiiiii
	.type	_Z8kernel_IPcmiiiii, @function
_Z8kernel_IPcmiiiii:
.LFB4263:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z8kernel_IPcmiiiiiPcmiiiii
	.cfi_endproc
.LFE4263:
	.size	_Z8kernel_IPcmiiiii, .-_Z8kernel_IPcmiiiii
	.globl	_Z36__device_stub__Z10kernel_IIIPcmiiiiiPcmiiiii
	.type	_Z36__device_stub__Z10kernel_IIIPcmiiiiiPcmiiiii, @function
_Z36__device_stub__Z10kernel_IIIPcmiiiiiPcmiiiii:
.LFB4264:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	40(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z10kernel_IIIPcmiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 192
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L29:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4264:
	.size	_Z36__device_stub__Z10kernel_IIIPcmiiiiiPcmiiiii, .-_Z36__device_stub__Z10kernel_IIIPcmiiiiiPcmiiiii
	.globl	_Z10kernel_IIIPcmiiiii
	.type	_Z10kernel_IIIPcmiiiii, @function
_Z10kernel_IIIPcmiiiii:
.LFB4265:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z10kernel_IIIPcmiiiiiPcmiiiii
	.cfi_endproc
.LFE4265:
	.size	_Z10kernel_IIIPcmiiiii, .-_Z10kernel_IIIPcmiiiii
	.globl	_Z34__device_stub__Z9kernel_IIPcmiiiiiPcmiiiii
	.type	_Z34__device_stub__Z9kernel_IIPcmiiiiiPcmiiiii, @function
_Z34__device_stub__Z9kernel_IIPcmiiiiiPcmiiiii:
.LFB4266:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	40(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z9kernel_IIPcmiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 192
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L34:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4266:
	.size	_Z34__device_stub__Z9kernel_IIPcmiiiiiPcmiiiii, .-_Z34__device_stub__Z9kernel_IIPcmiiiiiPcmiiiii
	.globl	_Z9kernel_IIPcmiiiii
	.type	_Z9kernel_IIPcmiiiii, @function
_Z9kernel_IIPcmiiiii:
.LFB4267:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z9kernel_IIPcmiiiiiPcmiiiii
	.cfi_endproc
.LFE4267:
	.size	_Z9kernel_IIPcmiiiii, .-_Z9kernel_IIPcmiiiii
	.section	.rodata.str1.1
.LC2:
	.string	"_Z9kernel_IIPcmiiiii"
.LC3:
	.string	"_Z10kernel_IIIPcmiiiii"
.LC4:
	.string	"_Z8kernel_IPcmiiiii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4269:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9kernel_IIPcmiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10kernel_IIIPcmiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8kernel_IPcmiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4269:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC2IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE,"axG",@progbits,_ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC5IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE,comdat
	.align 2
	.weak	_ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC2IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	.type	_ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC2IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE, @function
_ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC2IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE:
.LFB4613:
	.cfi_startproc
	endbr64
	cvtsi2sdq	(%rsi), %xmm0
	divsd	.LC5(%rip), %xmm0
	movsd	%xmm0, (%rdi)
	ret
	.cfi_endproc
.LFE4613:
	.size	_ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC2IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE, .-_ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC2IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	.weak	_ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	.set	_ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE,_ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC2IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	.text
	.globl	_Z8block_FWiPc
	.type	_Z8block_FWiPc, @function
_Z8block_FWiPc:
.LFB4236:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	leaq	-88(%rbp), %r13
	pushq	%r12
	.cfi_offset 12, -48
	leaq	-72(%rbp), %r12
	pushq	%rbx
	.cfi_offset 3, -56
	movslq	%edi, %rbx
	movq	%rbx, %r14
	subq	$184, %rsp
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	movl	%ebx, %eax
	addl	n(%rip), %eax
	decl	%eax
	cltd
	idivl	%ebx
	movl	%eax, %r15d
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	%rax, -160(%rbp)
	movl	%ebx, %eax
	imull	%r15d, %eax
	cltq
	movq	%rax, -144(%rbp)
	movslq	%ebx, %rax
	movq	%rax, -136(%rbp)
	movslq	%r15d, %rax
	imulq	%rbx, %rax
	xorl	%ebx, %ebx
	salq	$2, %rax
	movq	%rax, -152(%rbp)
.L43:
	movl	%ebx, %edi
	call	cudaSetDevice@PLT
	movl	%ebx, %edi
	xorl	%esi, %esi
	xorl	$1, %edi
	call	cudaDeviceEnablePeerAccess@PLT
	movq	-144(%rbp), %rcx
	movq	%r12, %rsi
	movq	%r13, %rdi
	movq	-152(%rbp), %rdx
	addq	$8, %r13
	addq	$8, %r12
	call	cudaMallocPitch@PLT
	movslq	n(%rip), %r9
	movq	d(%rip), %rdx
	pushq	$0
	movq	-8(%r12), %rsi
	movq	-8(%r13), %rdi
	pushq	$1
	leaq	0(,%r9,4), %rcx
	movq	%rcx, %r8
	call	cudaMemcpy2DAsync@PLT
	popq	%r8
	popq	%r9
	testl	%ebx, %ebx
	jne	.L67
	movl	$1, %ebx
	jmp	.L43
.L67:
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	-160(%rbp), %rbx
	subq	%rbx, %rax
	movq	%rax, -120(%rbp)
	leaq	-120(%rbp), %rax
	movq	%rax, -160(%rbp)
	leaq	-104(%rbp), %rax
	movq	-160(%rbp), %rsi
	movq	%rax, %rdi
	movq	%rax, -168(%rbp)
	call	_ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	movsd	mem_time(%rip), %xmm0
	xorl	%edi, %edi
	addsd	-104(%rbp), %xmm0
	movsd	%xmm0, mem_time(%rip)
	call	cudaSetDevice@PLT
	call	cudaDeviceSynchronize@PLT
	movl	$1, %edi
	call	cudaSetDevice@PLT
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$2, %ecx
	movq	%rax, -208(%rbp)
	movl	%r15d, %eax
	cltd
	idivl	%ecx
	movl	%eax, -144(%rbp)
	negl	-144(%rbp)
	movl	-144(%rbp), %eax
	addl	%r15d, %eax
	movl	%eax, -180(%rbp)
	cltq
	leaq	0(,%rax,8), %rbx
	salq	$4, %rax
	movq	%rax, -192(%rbp)
	movl	-144(%rbp), %eax
	movq	%rbx, -176(%rbp)
	xorl	%ebx, %ebx
	negl	%eax
	movl	%eax, -184(%rbp)
.L44:
	cmpl	%r15d, %ebx
	jg	.L68
	movabsq	$4294967297, %rax
	xorl	%edi, %edi
	movq	%rsp, -200(%rbp)
	movl	%r14d, -120(%rbp)
	movl	%r14d, -116(%rbp)
	movl	$1, -112(%rbp)
	movq	%rax, -104(%rbp)
	movl	$1, -96(%rbp)
	call	cudaSetDevice@PLT
	call	cudaDeviceSynchronize@PLT
	movl	$1, %edi
	call	cudaSetDevice@PLT
	call	cudaDeviceSynchronize@PLT
	movq	-192(%rbp), %rax
	movq	%rsp, %rdx
	movq	%rax, %rcx
	andq	$-4096, %rcx
	subq	%rcx, %rdx
.L45:
	cmpq	%rdx, %rsp
	je	.L46
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L45
.L46:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L47
	orq	$0, -8(%rsp,%rax)
.L47:
	movq	%rsp, -152(%rbp)
	movq	%rsp, %r12
	xorl	%r13d, %r13d
.L49:
	movl	-180(%rbp), %eax
	cmpl	%eax, %r13d
	jge	.L48
	movq	%r12, %rdi
	incl	%r13d
	call	cudaStreamCreate@PLT
	movq	-176(%rbp), %rax
	leaq	(%rax,%r12), %rdi
	addq	$8, %r12
	call	cudaStreamCreate@PLT
	jmp	.L49
.L48:
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movl	-112(%rbp), %ecx
	movq	-120(%rbp), %rdx
	xorl	%r9d, %r9d
	movq	-104(%rbp), %rdi
	movl	-96(%rbp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	movq	-72(%rbp), %rsi
	movq	-88(%rbp), %rdi
	movl	%r14d, %r9d
	movl	%ebx, %edx
	movl	n(%rip), %r8d
	pushq	%rcx
	movl	%ebx, %ecx
	pushq	%rbx
	call	_Z33__device_stub__Z8kernel_IPcmiiiiiPcmiiiii
	popq	%rsi
	popq	%rdi
.L50:
	leal	-1(%r15), %r12d
	movl	-112(%rbp), %ecx
	movq	-120(%rbp), %rdx
	xorl	%r9d, %r9d
	movl	$2, -104(%rbp)
	movl	-96(%rbp), %esi
	xorl	%r8d, %r8d
	movl	%r12d, -100(%rbp)
	movq	-104(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L51
	movl	n(%rip), %r8d
	movq	-72(%rbp), %rsi
	xorl	%edx, %edx
	movl	%r14d, %r9d
	movq	-88(%rbp), %rdi
	pushq	%r13
	xorl	%ecx, %ecx
	pushq	%rbx
	call	_Z34__device_stub__Z9kernel_IIPcmiiiiiPcmiiiii
	popq	%rax
	popq	%rdx
.L51:
	movl	-144(%rbp), %eax
	movl	$1, -104(%rbp)
	xorl	%r13d, %r13d
	movl	%r15d, -100(%rbp)
	negl	%eax
	movl	%eax, -212(%rbp)
.L52:
	cmpl	%r13d, -212(%rbp)
	jle	.L69
	movq	-152(%rbp), %rax
	movl	-112(%rbp), %ecx
	xorl	%r8d, %r8d
	movq	-120(%rbp), %rdx
	movq	-104(%rbp), %rdi
	movq	(%rax,%r13,8), %r9
	movl	-96(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L53
	movl	n(%rip), %r8d
	movq	-72(%rbp), %rsi
	xorl	%ecx, %ecx
	movl	%r13d, %edx
	movq	-88(%rbp), %rdi
	pushq	%r9
	movl	%r14d, %r9d
	pushq	%rbx
	call	_Z36__device_stub__Z10kernel_IIIPcmiiiiiPcmiiiii
	popq	%r10
	popq	%r11
.L53:
	movq	-64(%rbp), %rcx
	movq	-72(%rbp), %rsi
	movq	-136(%rbp), %rdx
	movq	-136(%rbp), %rdi
	movq	-152(%rbp), %r10
	movslq	n(%rip), %rax
	imulq	%rcx, %rdx
	movq	-136(%rbp), %r9
	imulq	%rsi, %rdi
	leaq	0(,%rax,4), %r8
	imulq	%r13, %rdx
	addq	-80(%rbp), %rdx
	imulq	%r13, %rdi
	addq	-88(%rbp), %rdi
	pushq	(%r10,%r13,8)
	incq	%r13
	pushq	$4
	call	cudaMemcpy2DAsync@PLT
	popq	%rcx
	popq	%rsi
	jmp	.L52
.L69:
	call	cudaDeviceSynchronize@PLT
	movl	$1, %edi
	call	cudaSetDevice@PLT
	movl	-112(%rbp), %ecx
	movq	-120(%rbp), %rdx
	xorl	%r9d, %r9d
	movq	-104(%rbp), %rdi
	movl	-96(%rbp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	movl	n(%rip), %r8d
	movq	-64(%rbp), %rsi
	movl	%ebx, %edx
	movl	%r14d, %r9d
	movq	-80(%rbp), %rdi
	pushq	%rax
	movl	%ebx, %ecx
	pushq	%rbx
	call	_Z33__device_stub__Z8kernel_IPcmiiiiiPcmiiiii
	popq	%rax
	popq	%rdx
.L55:
	movl	$2, -104(%rbp)
	movl	-112(%rbp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	-120(%rbp), %rdx
	movl	-96(%rbp), %esi
	movl	%r12d, -100(%rbp)
	movq	-104(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movl	n(%rip), %r8d
	movq	-64(%rbp), %rsi
	movl	%r14d, %r9d
	xorl	%ecx, %ecx
	movq	-80(%rbp), %rdi
	pushq	%r12
	xorl	%edx, %edx
	pushq	%rbx
	call	_Z34__device_stub__Z9kernel_IIPcmiiiiiPcmiiiii
	popq	%r13
	popq	%rax
.L56:
	movq	-152(%rbp), %r12
	movq	-176(%rbp), %rax
	movl	%r15d, -100(%rbp)
	movl	$1, -104(%rbp)
	movl	-184(%rbp), %r13d
	addq	%rax, %r12
.L57:
	cmpl	%r13d, %r15d
	jle	.L70
	movl	-112(%rbp), %ecx
	movq	(%r12), %r9
	xorl	%r8d, %r8d
	movq	-120(%rbp), %rdx
	movq	-104(%rbp), %rdi
	movl	-96(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L58
	movl	n(%rip), %r8d
	movq	-64(%rbp), %rsi
	xorl	%ecx, %ecx
	movl	%r13d, %edx
	movq	-80(%rbp), %rdi
	pushq	%r9
	movl	%r14d, %r9d
	pushq	%rbx
	call	_Z36__device_stub__Z10kernel_IIIPcmiiiiiPcmiiiii
	popq	%r10
	popq	%r11
.L58:
	movq	-72(%rbp), %rcx
	movq	-64(%rbp), %rsi
	addq	$8, %r12
	movq	-136(%rbp), %rdx
	movq	-136(%rbp), %rdi
	movslq	n(%rip), %rax
	movq	-136(%rbp), %r9
	imulq	%rcx, %rdx
	imulq	%rsi, %rdi
	leaq	0(,%rax,4), %r8
	imulq	%r13, %rdx
	addq	-88(%rbp), %rdx
	imulq	%r13, %rdi
	addq	-80(%rbp), %rdi
	pushq	-8(%r12)
	incq	%r13
	pushq	$4
	call	cudaMemcpy2DAsync@PLT
	popq	%rdi
	popq	%r8
	jmp	.L57
.L70:
	call	cudaDeviceSynchronize@PLT
	xorl	%edi, %edi
	incl	%ebx
	call	cudaSetDevice@PLT
	call	cudaDeviceSynchronize@PLT
	movl	$1, %edi
	call	cudaSetDevice@PLT
	call	cudaDeviceSynchronize@PLT
	movq	-200(%rbp), %rsp
	jmp	.L44
.L68:
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	-208(%rbp), %rbx
	movq	-160(%rbp), %rsi
	movq	-168(%rbp), %rdi
	subq	%rbx, %rax
	movq	%rax, -120(%rbp)
	call	_ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	movsd	comp_time(%rip), %xmm0
	addsd	-104(%rbp), %xmm0
	movsd	%xmm0, comp_time(%rip)
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	xorl	%edi, %edi
	movq	%rax, %r12
	call	cudaSetDevice@PLT
	movl	%r15d, %eax
	movl	$2, %ecx
	movslq	n(%rip), %rsi
	cltd
	movq	d(%rip), %rdi
	idivl	%ecx
	movq	-72(%rbp), %rcx
	movq	-88(%rbp), %rdx
	pushq	$0
	pushq	$2
	salq	$2, %rsi
	movq	%rsi, %r8
	imull	%r14d, %eax
	movslq	%eax, %r13
	movq	%r13, %r9
	movq	%r13, %rbx
	call	cudaMemcpy2DAsync@PLT
	popq	%rax
	movl	$1, %edi
	popq	%rdx
	call	cudaSetDevice@PLT
	movslq	n(%rip), %rsi
	movq	-64(%rbp), %rcx
	movq	-80(%rbp), %rdx
	movq	%rsi, %rax
	salq	$2, %rsi
	imull	%eax, %ebx
	movl	%eax, %r9d
	movq	d(%rip), %rax
	pushq	$0
	subl	%r13d, %r9d
	imulq	%rcx, %r13
	pushq	$2
	movq	%rsi, %r8
	movslq	%r9d, %r9
	movslq	%ebx, %rbx
	addq	%r13, %rdx
	leaq	(%rax,%rbx,4), %rdi
	call	cudaMemcpy2DAsync@PLT
	popq	%rcx
	xorl	%edi, %edi
	popq	%rsi
	call	cudaSetDevice@PLT
	call	cudaDeviceSynchronize@PLT
	movl	$1, %edi
	call	cudaSetDevice@PLT
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	-160(%rbp), %rsi
	movq	-168(%rbp), %rdi
	subq	%r12, %rax
	movq	%rax, -120(%rbp)
	call	_ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	movsd	mem_time(%rip), %xmm0
	addsd	-104(%rbp), %xmm0
	movq	-88(%rbp), %rdi
	movsd	%xmm0, mem_time(%rip)
	call	cudaFree@PLT
	movq	-80(%rbp), %rdi
	call	cudaFree@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L61
	call	__stack_chk_fail@PLT
.L61:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4236:
	.size	_Z8block_FWiPc, .-_Z8block_FWiPc
	.section	.rodata.str1.1
.LC6:
	.string	" "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4228:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %r13
	leaq	16(%rsp), %r12
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	8(%rbp), %rdi
	movq	%rax, %rbx
	call	_Z5inputPc
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	%r13, %rsi
	movq	%r12, %rdi
	subq	%rbx, %rax
	movq	%rax, 8(%rsp)
	call	_ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	movq	16(%rbp), %rsi
	movl	$32, %edi
	movsd	io_time(%rip), %xmm0
	addsd	16(%rsp), %xmm0
	movsd	%xmm0, io_time(%rip)
	call	_Z8block_FWiPc
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	16(%rbp), %rdi
	movq	%rax, %rbx
	call	_Z6outputPc
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	%r13, %rsi
	movq	%r12, %rdi
	subq	%rbx, %rax
	leaq	.LC6(%rip), %rbx
	movq	%rax, 8(%rsp)
	call	_ZNSt6chrono8durationIdSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	movsd	io_time(%rip), %xmm0
	addsd	16(%rsp), %xmm0
	leaq	_ZSt4cout(%rip), %rdi
	movsd	%xmm0, io_time(%rip)
	movsd	comp_time(%rip), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	mem_time(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	io_time(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	d(%rip), %rdi
	testq	%rdi, %rdi
	je	.L72
	movl	$4, %esi
	call	_ZdlPvm@PLT
.L72:
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L73
	call	__stack_chk_fail@PLT
.L73:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4228:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	mem_time
	.bss
	.align 8
	.type	mem_time, @object
	.size	mem_time, 8
mem_time:
	.zero	8
	.globl	comp_time
	.align 8
	.type	comp_time, @object
	.size	comp_time, 8
comp_time:
	.zero	8
	.globl	io_time
	.align 8
	.type	io_time, @object
	.size	io_time, 8
io_time:
	.zero	8
	.globl	d
	.align 8
	.type	d, @object
	.size	d, 8
d:
	.zero	8
	.globl	m
	.align 4
	.type	m, @object
	.size	m, 4
m:
	.zero	4
	.globl	n
	.align 4
	.type	n, @object
	.size	n, 4
n:
	.zero	4
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1104006501
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <fstream>
#include <chrono>
#include <hip/hip_runtime.h>
#include <iostream>
#include <vector>

#define BlockSize 32

const int INF = 1000000000;
void input(char *inFileName);
void output(char *outFileName);

void block_FW(int B,char*);
int ceil(int a, int b);
void cal(char* d,size_t pitch,int B, int Round, int block_start_x, int block_start_y, int block_width, int block_height,hipStream_t stream);
void cpu(int B, int Round, int block_start_x, int block_start_y, int block_width, int block_height);

int n, m;	
int* d;


double io_time = 0;
double comp_time = 0;
double mem_time = 0;

int main(int argc, char* argv[]) {

    auto io_beg = std::chrono::high_resolution_clock::now();
    input(argv[1]);
    auto io_end = std::chrono::high_resolution_clock::now();
    io_time += std::chrono::duration<double>(io_end-io_beg).count();

    int B = BlockSize;
    block_FW(B,argv[2]);

    io_beg = std::chrono::high_resolution_clock::now();
    output(argv[2]);
    io_end = std::chrono::high_resolution_clock::now();
    io_time += std::chrono::duration<double>(io_end-io_beg).count();

    std::cout<< comp_time <<" "<<mem_time<<" "<<io_time;
    delete d;
	return 0;
}

void input(char* infile) {
    FILE* file = fopen(infile, "rb");
    fread(&n, sizeof(int), 1, file);
    fread(&m, sizeof(int), 1, file);

    int *buf = new int[m*3];
    d = new int[n*n];
    fread(buf, sizeof(int), 3*m, file);

    #pragma omp parallel for
    for (int i = 0; i < n; ++ i) {
        for (int j = 0; j < n; ++ j) {
            if (i == j) {
                d[i*n+j] = 0;
            } else {
                d[i*n+j] = INF;
            }
        }
    }

    #pragma omp parallel for
    for (int i = 0; i < m; ++ i) {
        int pair[3];
        // fread(pair, sizeof(int), 3, file);
        for(int j=0;j<3;j++)
            pair[j]=buf[i*3+j];
        d[pair[0]*n+pair[1]] = pair[2];
    }
    fclose(file);
    delete buf;
}

void output(char *outFileName) {
	FILE *outfile = fopen(outFileName, "w");
	fwrite(d, sizeof(int), n*n, outfile);
    fclose(outfile);
}

int ceil(int a, int b) {
	return (a + b - 1) / b;
}

__global__ void kernel_I(char* d,size_t pitch,int block_x,
    int block_y,int n,int B,int r);
__global__ void kernel_II(char* d,size_t pitch,int block_x,
    int block_y,int n,int B,int r);
__global__ void kernel_III(char* d,size_t pitch,int block_x,
    int block_y,int n,int B,int r);

inline void moveBlock(char** ptr,int dst, int src,int x,int y,int B,size_t pitch){
    for(int k=B*x;k<B*(x+1);k++)
        hipMemcpyPeer(ptr[dst]+pitch*B*k+sizeof(int)*B*y,dst,
                        ptr[src]+pitch*B*k+sizeof(int)*B*y,src,
                        sizeof(int)*B);
}

void block_FW(int B, char* outFileName) {
	int round = ceil(n, B);
    char *device_d[2];
    size_t pitch[2];
    // cudaMalloc(&device_d,sizeof(int)*n*n);
    // cudaMemcpy(device_d,d,sizeof(int)*n*n,cudaMemcpyHostToDevice);
    auto mem_beg = std::chrono::high_resolution_clock::now();
    for(int dev=0;dev<2;dev++){
        hipSetDevice(dev);
        hipDeviceEnablePeerAccess(!dev,0);
        hipMallocPitch(&device_d[dev],&pitch[dev],sizeof(int)*round*B,round*B);
        hipMemcpy2DAsync(device_d[dev],pitch[dev],
                            d,sizeof(int)*n,
                            sizeof(int)*n,n,hipMemcpyHostToDevice);
    }
    auto mem_end = std::chrono::high_resolution_clock::now();
    mem_time += std::chrono::duration<double>(mem_end-mem_beg).count();

    for(int dev=0;dev<2;dev++){
        hipSetDevice(dev);
        hipDeviceSynchronize();
    }
    
    auto comp_beg = std::chrono::high_resolution_clock::now();
	for (int r = 0; r <= round; ++r) {
        dim3 dimBlock(B,B);
        dim3 dimGrid(1,1);

        // for(int dev=0;dev<2;dev++){
        //     cudaSetDevice(dev);
        //     kernel_I  <<<dimGrid,dimBlock,0,0>>>(device_d[dev],pitch[dev],r,r,n,B,r);
        //     dimGrid = dim3(2,round-1);
        //     kernel_II <<<dimGrid,dimBlock,0,0>>>(device_d[dev],pitch[dev],0,0,n,B,r);
        // }
        
        for(int dev=0;dev<2;dev++){
            hipSetDevice(dev);
            hipDeviceSynchronize();
        }
        
        hipStream_t streams[2][round-round/2];
        for(int i=0;i<round-round/2;i++)
            for(int j=0;j<2;j++)
                hipStreamCreate(&streams[j][i]);
        #pragma omp parallel sections
        {
            #pragma omp section
            {
                hipSetDevice(0);
                kernel_I  <<<dimGrid,dimBlock,0,0>>>(device_d[0],pitch[0],r,r,n,B,r);
                dimGrid = dim3(2,round-1);
                kernel_II <<<dimGrid,dimBlock,0,0>>>(device_d[0],pitch[0],0,0,n,B,r);
                dimGrid = dim3(1,round);
                for(int i=0;i<round/2;i++){
                    kernel_III<<<dimGrid,dimBlock,0,streams[0][i]>>>(device_d[0],pitch[0],i,0,n,B,r);
                    // cudaMemcpyPeerAsync(device_d[0]+i*pitch[0]*B,0,
                    //                 device_d[1]+i*pitch[1]*B,1,
                    //                 pitch[1]*B,streams[1]);
                    hipMemcpy2DAsync(device_d[0]+i*pitch[0]*B,pitch[0],
                                    device_d[1]+i*pitch[1]*B,pitch[1],
                                    sizeof(int)*n,B,hipMemcpyDefault,streams[0][i]);
                }
                hipDeviceSynchronize();
            }
            #pragma omp section
            {
                hipSetDevice(1);
                kernel_I  <<<dimGrid,dimBlock,0,0>>>(device_d[1],pitch[1],r,r,n,B,r);
                dimGrid = dim3(2,round-1);
                kernel_II <<<dimGrid,dimBlock,0,0>>>(device_d[1],pitch[1],0,0,n,B,r);
                dimGrid = dim3(1,round);
                for(int i=round/2;i<round;i++){
                    kernel_III<<<dimGrid,dimBlock,0,streams[1][i-round/2]>>>(device_d[1],pitch[1],i,0,n,B,r);
                    // cudaMemcpyPeerAsync(device_d[1]+i*pitch[1]*B,1,
                    //                 device_d[0]+i*pitch[0]*B,0,
                    //                 pitch[0]*B,streams[1]);
                    hipMemcpy2DAsync(device_d[1]+i*pitch[1]*B,pitch[1],
                                    device_d[0]+i*pitch[0]*B,pitch[0],
                                    sizeof(int)*n,B,hipMemcpyDefault,streams[1][i-round/2]);
                }
                hipDeviceSynchronize();
            }
        }
        
        for(int dev=0;dev<2;dev++){
            hipSetDevice(dev);
            hipDeviceSynchronize();
        }
    }

    auto comp_end = std::chrono::high_resolution_clock::now();
    comp_time += std::chrono::duration<double>(comp_end-comp_beg).count();
    mem_beg = std::chrono::high_resolution_clock::now();

    hipSetDevice(0);
    hipMemcpy2DAsync(d,sizeof(int)*n,
        device_d[0],pitch[0],
        sizeof(int)*n,round/2*B,hipMemcpyDeviceToHost);
    hipSetDevice(1);
    hipMemcpy2DAsync(d+round/2*B*n,sizeof(int)*n,
        device_d[1]+round/2*B*pitch[1],pitch[1],
        sizeof(int)*n,n-round/2*B,hipMemcpyDeviceToHost);
    
    for(int dev=0;dev<2;dev++){
        hipSetDevice(dev);
        hipDeviceSynchronize();
    }
    mem_end = std::chrono::high_resolution_clock::now();
    mem_time += std::chrono::duration<double>(mem_end-mem_beg).count();
    // cudaMemcpy(d,device_d,sizeof(int)*n*n,cudaMemcpyDeviceToHost);
    for(int dev=0;dev<2;dev++)
        hipFree(device_d[dev]);
}

__device__ inline int gmin(int a,int b){
    return (a>b)*b+(a<=b)*a;
}

__global__ void kernel_I(char* d,size_t pitch,int block_x,
    int block_y,int n,int B, int r){
    __shared__ int d_i_j[BlockSize][BlockSize+1];

    const unsigned int i = block_x*B+threadIdx.x;
    const unsigned int j = block_y*B+threadIdx.y;
    // const int idx = threadIdx.y*blockDim.x*threadIdx.x;

    int* d_i = (int*)(d+pitch*i);

    unsigned int origin_path = i<n&&j<n? __ldg(&d_i[j]) : INF;
    d_i_j[threadIdx.x][threadIdx.y] = origin_path;

    // int* d_k_j = (int*)(d+pitch*k);
    const unsigned int k_max = gmin((r+1) * B,n);
    #pragma unroll
    for (unsigned int k = r * B; k < k_max; ++k) {
        __syncthreads();
        int new_d = d_i_j[threadIdx.x][k-r*B]+d_i_j[k-r*B][threadIdx.y];
        if(d_i_j[threadIdx.x][threadIdx.y]>new_d){
            d_i_j[threadIdx.x][threadIdx.y]=new_d;
        }
    }

    if(origin_path>d_i_j[threadIdx.x][threadIdx.y]&&i<n&&j<n){
        d_i[j]=d_i_j[threadIdx.x][threadIdx.y];
    }
}

__global__ void kernel_III(char* d,size_t pitch,int block_x,
    int block_y,int n,int B,int r){
    __shared__ int d_i_k[BlockSize][BlockSize+1];
    __shared__ int d_k_j[BlockSize][BlockSize+1];

    int i = (block_x+blockIdx.x)*B+threadIdx.x;
    int j = (block_y+blockIdx.y)*B+threadIdx.y;
    // unsigned int i = (block_x+blockIdx.x)*B+threadIdx.x;
    // unsigned int j = (block_y+blockIdx.y)*B+threadIdx.y;


    int* d_i = ((int*)(d+pitch*i));
    int path = i<n&&j<n?  __ldg(&d_i[j]) : INF;
    int origin_path = path;
    if(r*B+threadIdx.y < n && i < n)
        d_i_k[threadIdx.x][threadIdx.y] = __ldg(&d_i[r*B+threadIdx.y]);
    else
        d_i_k[threadIdx.x][threadIdx.y] = INF;
    if(r*B+threadIdx.x < n && j < n)
        d_k_j[threadIdx.x][threadIdx.y] = __ldg(&((int*)(d+pitch*(r*B+threadIdx.x)))[j]);
    else 
        d_k_j[threadIdx.x][threadIdx.y] = INF;

    __syncthreads();
    // const int k_max = gmin((r+1) * B , n);
    const unsigned int k_max = gmin((r+1) * B,n);
    #pragma unroll
    for (unsigned int k = r * B; k < k_max; ++k) {
        int new_path = d_i_k[threadIdx.x][k-r*B]+d_k_j[k-r*B][threadIdx.y];
        if(path>new_path) path = new_path;
    }
    if(origin_path>path&&i<n&&j<n){
        d_i[j]=path;
    }
}
__global__ void kernel_II(char* d,size_t pitch,int block_x,
    int block_y,int n,int B,int r){
    __shared__ int d_i_k[BlockSize][BlockSize+1];
    __shared__ int d_k_j[BlockSize][BlockSize+1];

    unsigned int i, j;
    if(blockIdx.x==0){
        i = r*B + threadIdx.x;
        j = blockIdx.y * B + threadIdx.y ;
    }
    else{
        i = blockIdx.y * B + threadIdx.x ;
        j = r*B + threadIdx.y;
    }
    // int i = (block_x+blockIdx.x)>=r?
    //     (block_x+blockIdx.x+1)*B+threadIdx.x:(block_x+blockIdx.x)*B+threadIdx.x;
    // int j = (block_y+blockIdx.y)>=r?
    //     (block_y+blockIdx.y+1)*B+threadIdx.y:(block_y+blockIdx.y)*B+threadIdx.y;
    // int j = (block_y+blockIdx.y)*B+threadIdx.y;


    int* d_i = (int*)(d+pitch*i);
    int path = i<n&&j<n? d_i[j] : INF;
    int origin_path = path;
    d_i_k[threadIdx.x][threadIdx.y] = i < n && r*B+threadIdx.y < n ?  __ldg(&d_i[r*B+threadIdx.y]) : INF;
    d_k_j[threadIdx.x][threadIdx.y] = j < n && r*B+threadIdx.x < n ?  __ldg(&((int*)(d+pitch*(r*B+threadIdx.x)))[j]) : INF;

    __syncthreads();
    const unsigned int k_max = gmin((r+1) * B , n);
    #pragma unroll
    for (unsigned int k = r * B; k < k_max; ++k) {
        // int* d_k = (int*)(d+pitch*k);
        int new_path = d_i_k[threadIdx.x][k-r*B]+d_k_j[k-r*B][threadIdx.y];
        if(path>new_path) path = new_path;
    }
    if(origin_path>path&&i<n&&j<n){
        d_i[j]=path;
    }
}


	.text
	.file	"multi_gpu.wrong.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI0_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %rbx
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r14
	movq	8(%rbx), %rdi
	callq	_Z5inputPc
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%r14, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	addsd	io_time(%rip), %xmm0
	movsd	%xmm0, io_time(%rip)
	movl	$32, %edi
	callq	_Z8block_FWiPc
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r14
	movq	16(%rbx), %rdi
	callq	_Z6outputPc
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%r14, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	addsd	io_time(%rip), %xmm0
	movsd	%xmm0, io_time(%rip)
	movsd	comp_time(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	mem_time(%rip), %xmm0           # xmm0 = mem[0],zero
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	io_time(%rip), %xmm0            # xmm0 = mem[0],zero
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	d(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB0_2
# %bb.1:
	callq	_ZdlPv
.LBB0_2:
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z5inputPc                      # -- Begin function _Z5inputPc
	.type	_Z5inputPc,@function
_Z5inputPc:                             # @_Z5inputPc
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$n, %edi
	movl	$4, %esi
	movl	$1, %edx
	movq	%rax, %rcx
	callq	fread
	movl	$m, %edi
	movl	$4, %esi
	movl	$1, %edx
	movq	%rbx, %rcx
	callq	fread
	movslq	m(%rip), %rax
	leaq	(%rax,%rax,2), %r15
	leaq	(,%r15,4), %rcx
	testq	%rax, %rax
	movq	$-1, %rdi
	cmovnsq	%rcx, %rdi
	callq	_Znam
	movq	%rax, %r14
	movl	n(%rip), %edi
	imull	%edi, %edi
	shlq	$2, %rdi
	callq	_Znam
	movq	%rax, d(%rip)
	movl	$4, %esi
	movq	%r14, %rdi
	movq	%r15, %rdx
	movq	%rbx, %rcx
	callq	fread
	movl	n(%rip), %eax
	testl	%eax, %eax
	jle	.LBB1_6
# %bb.1:                                # %.preheader28.preheader
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB1_2:                                # %.preheader28
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	testl	%eax, %eax
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	xorl	%esi, %esi
	movq	d(%rip), %rdi
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	1(%rax), %r8d
	imull	%edx, %r8d
	imull	%edx, %eax
	addl	%esi, %eax
	cmpl	%esi, %edx
	cmovel	%r8d, %eax
	movl	$1000000000, %r8d               # imm = 0x3B9ACA00
	cmovel	%ecx, %r8d
	cltq
	movl	%r8d, (%rdi,%rax,4)
	incl	%esi
	movl	n(%rip), %eax
	cmpl	%eax, %esi
	jl	.LBB1_4
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incl	%edx
	cmpl	%eax, %edx
	jl	.LBB1_2
.LBB1_6:                                # %.preheader
	cmpl	$0, m(%rip)
	jle	.LBB1_9
# %bb.7:                                # %.lr.ph33
	movq	d(%rip), %rax
	movq	%r14, %rcx
	addq	$8, %rcx
	xorl	%edx, %edx
.LBB1_8:                                # =>This Inner Loop Header: Depth=1
	movslq	-8(%rcx), %rsi
	movslq	-4(%rcx), %rdi
	movl	(%rcx), %r8d
	movslq	n(%rip), %r9
	imulq	%rsi, %r9
	addq	%rdi, %r9
	movl	%r8d, (%rax,%r9,4)
	addq	$12, %rcx
	incl	%edx
	cmpl	%edx, m(%rip)
	jg	.LBB1_8
.LBB1_9:                                # %._crit_edge34
	movq	%rbx, %rdi
	callq	fclose
	movq	%r14, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end1:
	.size	_Z5inputPc, .Lfunc_end1-_Z5inputPc
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z8block_FWiPc
.LCPI2_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
	.text
	.globl	_Z8block_FWiPc
	.type	_Z8block_FWiPc,@function
_Z8block_FWiPc:                         # @_Z8block_FWiPc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$152, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edi, %r14d
	movl	n(%rip), %eax
	addl	%r14d, %eax
	decl	%eax
	cltd
	idivl	%edi
	movl	%eax, %ebx
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, -120(%rbp)                # 8-byte Spill
	movq	%rbx, -88(%rbp)                 # 8-byte Spill
	movslq	%ebx, %rax
	movslq	%r14d, %r15
	movq	%r15, %rbx
	imulq	%rax, %rbx
	shlq	$2, %rbx
	movq	%r14, -56(%rbp)                 # 8-byte Spill
	imull	%r14d, %eax
	cltq
	movq	%rax, -96(%rbp)                 # 8-byte Spill
	movb	$1, %r12b
	xorl	%r13d, %r13d
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	%r13d, %edi
	callq	hipSetDevice
	movl	%r13d, %edi
	xorl	$1, %edi
	xorl	%esi, %esi
	callq	hipDeviceEnablePeerAccess
	leaq	-80(,%r13,8), %r14
	addq	%rbp, %r14
	leaq	-112(%rbp,%r13,8), %r13
	movq	%r14, %rdi
	movq	%r13, %rsi
	movq	%rbx, %rdx
	movq	-96(%rbp), %rcx                 # 8-byte Reload
	callq	hipMallocPitch
	movq	(%r14), %rdi
	movq	(%r13), %rsi
	movq	d(%rip), %rdx
	movslq	n(%rip), %r9
	leaq	(,%r9,4), %rcx
	movq	%rcx, %r8
	pushq	$0
	pushq	$1
	callq	hipMemcpy2DAsync
	addq	$16, %rsp
	movl	$1, %r13d
	testb	$1, %r12b
	movl	$0, %r12d
	jne	.LBB2_1
# %bb.2:                                # %.critedge
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	-120(%rbp), %rax                # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	addsd	mem_time(%rip), %xmm0
	movsd	%xmm0, mem_time(%rip)
	xorl	%eax, %eax
	movq	%rax, -48(%rbp)                 # 8-byte Spill
	xorl	%edi, %edi
	callq	hipSetDevice
	callq	hipDeviceSynchronize
	movl	$1, %edi
	callq	hipSetDevice
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, -152(%rbp)                # 8-byte Spill
	cmpl	$0, -88(%rbp)                   # 4-byte Folded Reload
	js	.LBB2_26
# %bb.3:                                # %.lr.ph259
	movl	%r15d, %eax
	movq	%rax, %rcx
	shlq	$32, %rcx
	orq	%rax, %rcx
	movq	%rcx, -96(%rbp)                 # 8-byte Spill
	movq	-88(%rbp), %rcx                 # 8-byte Reload
	movl	%ecx, %edx
	shrl	%edx
	movl	%ecx, %esi
	subl	%edx, %esi
	leaq	(%rsi,%rsi), %rax
	leal	-1(%rcx), %edi
	shlq	$32, %rdi
	orq	$2, %rdi
	movq	%rdi, -144(%rbp)                # 8-byte Spill
	movq	%rcx, %rdi
	shlq	$32, %rdi
	orq	$1, %rdi
	movq	%rdi, -120(%rbp)                # 8-byte Spill
	movq	%rsi, -136(%rbp)                # 8-byte Spill
	leaq	(,%rsi,8), %r12
	movq	%rdx, %rsi
	imulq	%r15, %rsi
	movq	%rsi, -160(%rbp)                # 8-byte Spill
                                        # kill: def $ecx killed $ecx killed $rcx def $rcx
	negl	%ecx
	movq	%rdx, -128(%rbp)                # 8-byte Spill
	addq	%rdx, %rcx
	movq	%rcx, -184(%rbp)                # 8-byte Spill
	leaq	15(,%rax,8), %rax
	andq	$-16, %rax
	movq	%rax, -168(%rbp)                # 8-byte Spill
.LBB2_4:                                # %.critedge285
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_6 Depth 2
                                        #     Child Loop BB2_13 Depth 2
                                        #     Child Loop BB2_22 Depth 2
	xorl	%edi, %edi
	callq	hipSetDevice
	callq	hipDeviceSynchronize
	movl	$1, %edi
	callq	hipSetDevice
	callq	hipDeviceSynchronize
	movq	%rsp, -176(%rbp)                # 8-byte Spill
	movq	%rsp, %r14
	subq	-168(%rbp), %r14                # 8-byte Folded Reload
	movq	%r14, %rsp
	cmpl	$0, -136(%rbp)                  # 4-byte Folded Reload
	jle	.LBB2_7
# %bb.5:                                # %.preheader.preheader
                                        #   in Loop: Header=BB2_4 Depth=1
	xorl	%r13d, %r13d
	movq	%r14, %rbx
.LBB2_6:                                # %.preheader
                                        #   Parent Loop BB2_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rbx, %rdi
	callq	hipStreamCreate
	leaq	(%rbx,%r12), %rdi
	callq	hipStreamCreate
	addq	$8, %rbx
	addq	$8, %r13
	cmpq	%r13, %r12
	jne	.LBB2_6
.LBB2_7:                                # %._crit_edge
                                        #   in Loop: Header=BB2_4 Depth=1
	xorl	%edi, %edi
	callq	hipSetDevice
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	-96(%rbp), %rbx                 # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_9
# %bb.8:                                #   in Loop: Header=BB2_4 Depth=1
	movq	-80(%rbp), %rdi
	movq	-112(%rbp), %rsi
	movl	n(%rip), %r8d
	subq	$8, %rsp
	movq	-48(%rbp), %rcx                 # 8-byte Reload
	movl	%ecx, %edx
	movq	-56(%rbp), %r9                  # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	%rcx
	callq	_Z23__device_stub__kernel_IPcmiiiii
	addq	$16, %rsp
.LBB2_9:                                #   in Loop: Header=BB2_4 Depth=1
	movq	-144(%rbp), %rdi                # 8-byte Reload
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_11
# %bb.10:                               #   in Loop: Header=BB2_4 Depth=1
	movq	-80(%rbp), %rdi
	movq	-112(%rbp), %rsi
	movl	n(%rip), %r8d
	subq	$8, %rsp
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	movq	-56(%rbp), %r9                  # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	-48(%rbp)                       # 8-byte Folded Reload
	callq	_Z24__device_stub__kernel_IIPcmiiiii
	addq	$16, %rsp
.LBB2_11:                               #   in Loop: Header=BB2_4 Depth=1
	cmpl	$2, -88(%rbp)                   # 4-byte Folded Reload
	jb	.LBB2_16
# %bb.12:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_4 Depth=1
	xorl	%r13d, %r13d
	xorl	%ebx, %ebx
.LBB2_13:                               # %.lr.ph
                                        #   Parent Loop BB2_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%r14,%rbx,8), %r9
	movq	-120(%rbp), %rdi                # 8-byte Reload
	movl	$1, %esi
	movq	-96(%rbp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_15
# %bb.14:                               #   in Loop: Header=BB2_13 Depth=2
	movq	-80(%rbp), %rdi
	movq	-112(%rbp), %rsi
	movl	n(%rip), %r8d
	subq	$8, %rsp
	movl	%ebx, %edx
	xorl	%ecx, %ecx
	movq	-56(%rbp), %r9                  # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	-48(%rbp)                       # 8-byte Folded Reload
	callq	_Z25__device_stub__kernel_IIIPcmiiiii
	addq	$16, %rsp
.LBB2_15:                               #   in Loop: Header=BB2_13 Depth=2
	movq	-112(%rbp), %rsi
	movq	-104(%rbp), %rcx
	movq	%r13, %rdi
	imulq	%rsi, %rdi
	addq	-80(%rbp), %rdi
	movq	%r13, %rdx
	imulq	%rcx, %rdx
	addq	-72(%rbp), %rdx
	movslq	n(%rip), %r8
	shlq	$2, %r8
	movq	%r15, %r9
	pushq	(%r14,%rbx,8)
	pushq	$4
	callq	hipMemcpy2DAsync
	addq	$16, %rsp
	incq	%rbx
	addq	%r15, %r13
	cmpq	%rbx, -128(%rbp)                # 8-byte Folded Reload
	jne	.LBB2_13
.LBB2_16:                               # %._crit_edge250
                                        #   in Loop: Header=BB2_4 Depth=1
	callq	hipDeviceSynchronize
	movl	$1, %edi
	callq	hipSetDevice
	movq	-120(%rbp), %rdi                # 8-byte Reload
	movl	$1, %esi
	movq	-96(%rbp), %rbx                 # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_18
# %bb.17:                               #   in Loop: Header=BB2_4 Depth=1
	movq	-72(%rbp), %rdi
	movq	-104(%rbp), %rsi
	movl	n(%rip), %r8d
	subq	$8, %rsp
	movq	-48(%rbp), %rcx                 # 8-byte Reload
	movl	%ecx, %edx
	movq	-56(%rbp), %r9                  # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	%rcx
	callq	_Z23__device_stub__kernel_IPcmiiiii
	addq	$16, %rsp
.LBB2_18:                               #   in Loop: Header=BB2_4 Depth=1
	movq	-144(%rbp), %rdi                # 8-byte Reload
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_20
# %bb.19:                               #   in Loop: Header=BB2_4 Depth=1
	movq	-72(%rbp), %rdi
	movq	-104(%rbp), %rsi
	movl	n(%rip), %r8d
	subq	$8, %rsp
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	movq	-56(%rbp), %r9                  # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	-48(%rbp)                       # 8-byte Folded Reload
	callq	_Z24__device_stub__kernel_IIPcmiiiii
	addq	$16, %rsp
.LBB2_20:                               #   in Loop: Header=BB2_4 Depth=1
	movq	-128(%rbp), %rax                # 8-byte Reload
	cmpl	-88(%rbp), %eax                 # 4-byte Folded Reload
	jae	.LBB2_25
# %bb.21:                               # %.lr.ph253
                                        #   in Loop: Header=BB2_4 Depth=1
	movq	-136(%rbp), %rax                # 8-byte Reload
	leaq	(%r14,%rax,8), %rbx
	xorl	%r14d, %r14d
	movq	-160(%rbp), %r13                # 8-byte Reload
.LBB2_22:                               #   Parent Loop BB2_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%rbx,%r14,8), %r9
	movq	-120(%rbp), %rdi                # 8-byte Reload
	movl	$1, %esi
	movq	-96(%rbp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_24
# %bb.23:                               #   in Loop: Header=BB2_22 Depth=2
	movq	-72(%rbp), %rdi
	movq	-104(%rbp), %rsi
	movl	n(%rip), %r8d
	movq	-128(%rbp), %rax                # 8-byte Reload
	leal	(%rax,%r14), %edx
	subq	$8, %rsp
	xorl	%ecx, %ecx
	movq	-56(%rbp), %r9                  # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	-48(%rbp)                       # 8-byte Folded Reload
	callq	_Z25__device_stub__kernel_IIIPcmiiiii
	addq	$16, %rsp
.LBB2_24:                               #   in Loop: Header=BB2_22 Depth=2
	movq	-112(%rbp), %rcx
	movq	-104(%rbp), %rsi
	movq	%r13, %rdi
	imulq	%rsi, %rdi
	addq	-72(%rbp), %rdi
	movq	%r13, %rdx
	imulq	%rcx, %rdx
	addq	-80(%rbp), %rdx
	movslq	n(%rip), %r8
	shlq	$2, %r8
	movq	%r15, %r9
	pushq	(%rbx,%r14,8)
	pushq	$4
	callq	hipMemcpy2DAsync
	addq	$16, %rsp
	addq	%r15, %r13
	incq	%r14
	movq	-184(%rbp), %rax                # 8-byte Reload
                                        # kill: def $eax killed $eax killed $rax
	addl	%r14d, %eax
	jne	.LBB2_22
.LBB2_25:                               # %._crit_edge254
                                        #   in Loop: Header=BB2_4 Depth=1
	callq	hipDeviceSynchronize
	xorl	%edi, %edi
	callq	hipSetDevice
	callq	hipDeviceSynchronize
	movl	$1, %edi
	callq	hipSetDevice
	callq	hipDeviceSynchronize
	movq	-176(%rbp), %rsp                # 8-byte Reload
	movq	-48(%rbp), %rcx                 # 8-byte Reload
	leal	1(%rcx), %eax
	cmpl	-88(%rbp), %ecx                 # 4-byte Folded Reload
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, -48(%rbp)                 # 8-byte Spill
	jne	.LBB2_4
.LBB2_26:                               # %._crit_edge260
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	-152(%rbp), %rax                # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	addsd	comp_time(%rip), %xmm0
	movsd	%xmm0, comp_time(%rip)
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r14
	xorl	%r15d, %r15d
	xorl	%edi, %edi
	callq	hipSetDevice
	movq	d(%rip), %rdi
	movslq	n(%rip), %rsi
	shlq	$2, %rsi
	movq	-80(%rbp), %rdx
	movq	-112(%rbp), %rcx
	movq	-88(%rbp), %r8                  # 8-byte Reload
	movl	%r8d, %eax
	shrl	$31, %eax
	addl	%r8d, %eax
	sarl	%eax
	imull	-56(%rbp), %eax                 # 4-byte Folded Reload
	movslq	%eax, %rbx
	movl	$2, %r12d
	movq	%rsi, %r8
	movq	%rbx, %r9
	pushq	%r15
	pushq	%r12
	callq	hipMemcpy2DAsync
	addq	$16, %rsp
	movl	$1, %edi
	callq	hipSetDevice
	movslq	n(%rip), %rax
	movl	%eax, %ecx
	imull	%ebx, %ecx
	movslq	%ecx, %rdi
	shlq	$2, %rdi
	addq	d(%rip), %rdi
	movq	%rax, %rsi
	shlq	$2, %rsi
	movq	-104(%rbp), %rcx
	movq	%rbx, %rdx
	imulq	%rcx, %rdx
	addq	-72(%rbp), %rdx
	subl	%ebx, %eax
	movslq	%eax, %r9
	movq	%rsi, %r8
	pushq	%r15
	pushq	%r12
	callq	hipMemcpy2DAsync
	addq	$16, %rsp
	xorl	%edi, %edi
	callq	hipSetDevice
	callq	hipDeviceSynchronize
	movl	$1, %edi
	callq	hipSetDevice
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%r14, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	addsd	mem_time(%rip), %xmm0
	movsd	%xmm0, mem_time(%rip)
	movq	-80(%rbp), %rdi
	callq	hipFree
	movq	-72(%rbp), %rdi
	callq	hipFree
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end2:
	.size	_Z8block_FWiPc, .Lfunc_end2-_Z8block_FWiPc
	.cfi_endproc
                                        # -- End function
	.globl	_Z6outputPc                     # -- Begin function _Z6outputPc
	.type	_Z6outputPc,@function
_Z6outputPc:                            # @_Z6outputPc
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %rbx
	movq	d(%rip), %rdi
	movl	n(%rip), %edx
	imull	%edx, %edx
	movl	$4, %esi
	movq	%rax, %rcx
	callq	fwrite
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.Lfunc_end3:
	.size	_Z6outputPc, .Lfunc_end3-_Z6outputPc
	.cfi_endproc
                                        # -- End function
	.globl	_Z4ceilii                       # -- Begin function _Z4ceilii
	.type	_Z4ceilii,@function
_Z4ceilii:                              # @_Z4ceilii
	.cfi_startproc
# %bb.0:
                                        # kill: def $esi killed $esi def $rsi
                                        # kill: def $edi killed $edi def $rdi
	leal	(%rdi,%rsi), %eax
	decl	%eax
	cltd
	idivl	%esi
	retq
.Lfunc_end4:
	.size	_Z4ceilii, .Lfunc_end4-_Z4ceilii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__kernel_IPcmiiiii # -- Begin function _Z23__device_stub__kernel_IPcmiiiii
	.type	_Z23__device_stub__kernel_IPcmiiiii,@function
_Z23__device_stub__kernel_IPcmiiiii:    # @_Z23__device_stub__kernel_IPcmiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8kernel_IPcmiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z23__device_stub__kernel_IPcmiiiii, .Lfunc_end5-_Z23__device_stub__kernel_IPcmiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__kernel_IIPcmiiiii # -- Begin function _Z24__device_stub__kernel_IIPcmiiiii
	.type	_Z24__device_stub__kernel_IIPcmiiiii,@function
_Z24__device_stub__kernel_IIPcmiiiii:   # @_Z24__device_stub__kernel_IIPcmiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9kernel_IIPcmiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z24__device_stub__kernel_IIPcmiiiii, .Lfunc_end6-_Z24__device_stub__kernel_IIPcmiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__kernel_IIIPcmiiiii # -- Begin function _Z25__device_stub__kernel_IIIPcmiiiii
	.type	_Z25__device_stub__kernel_IIIPcmiiiii,@function
_Z25__device_stub__kernel_IIIPcmiiiii:  # @_Z25__device_stub__kernel_IIIPcmiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernel_IIIPcmiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z25__device_stub__kernel_IIIPcmiiiii, .Lfunc_end7-_Z25__device_stub__kernel_IIIPcmiiiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8kernel_IPcmiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10kernel_IIIPcmiiiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9kernel_IIPcmiiiii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	n,@object                       # @n
	.bss
	.globl	n
	.p2align	2, 0x0
n:
	.long	0                               # 0x0
	.size	n, 4

	.type	m,@object                       # @m
	.globl	m
	.p2align	2, 0x0
m:
	.long	0                               # 0x0
	.size	m, 4

	.type	d,@object                       # @d
	.globl	d
	.p2align	3, 0x0
d:
	.quad	0
	.size	d, 8

	.type	io_time,@object                 # @io_time
	.globl	io_time
	.p2align	3, 0x0
io_time:
	.quad	0x0000000000000000              # double 0
	.size	io_time, 8

	.type	comp_time,@object               # @comp_time
	.globl	comp_time
	.p2align	3, 0x0
comp_time:
	.quad	0x0000000000000000              # double 0
	.size	comp_time, 8

	.type	mem_time,@object                # @mem_time
	.globl	mem_time
	.p2align	3, 0x0
mem_time:
	.quad	0x0000000000000000              # double 0
	.size	mem_time, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" "
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"rb"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"w"
	.size	.L.str.2, 2

	.type	_Z8kernel_IPcmiiiii,@object     # @_Z8kernel_IPcmiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z8kernel_IPcmiiiii
	.p2align	3, 0x0
_Z8kernel_IPcmiiiii:
	.quad	_Z23__device_stub__kernel_IPcmiiiii
	.size	_Z8kernel_IPcmiiiii, 8

	.type	_Z9kernel_IIPcmiiiii,@object    # @_Z9kernel_IIPcmiiiii
	.globl	_Z9kernel_IIPcmiiiii
	.p2align	3, 0x0
_Z9kernel_IIPcmiiiii:
	.quad	_Z24__device_stub__kernel_IIPcmiiiii
	.size	_Z9kernel_IIPcmiiiii, 8

	.type	_Z10kernel_IIIPcmiiiii,@object  # @_Z10kernel_IIIPcmiiiii
	.globl	_Z10kernel_IIIPcmiiiii
	.p2align	3, 0x0
_Z10kernel_IIIPcmiiiii:
	.quad	_Z25__device_stub__kernel_IIIPcmiiiii
	.size	_Z10kernel_IIIPcmiiiii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z8kernel_IPcmiiiii"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10kernel_IIIPcmiiiii"
	.size	.L__unnamed_2, 23

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z9kernel_IIPcmiiiii"
	.size	.L__unnamed_3, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__kernel_IPcmiiiii
	.addrsig_sym _Z24__device_stub__kernel_IIPcmiiiii
	.addrsig_sym _Z25__device_stub__kernel_IIIPcmiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym n
	.addrsig_sym m
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z8kernel_IPcmiiiii
	.addrsig_sym _Z9kernel_IIPcmiiiii
	.addrsig_sym _Z10kernel_IIIPcmiiiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8kernel_IPcmiiiii     ; -- Begin function _Z8kernel_IPcmiiiii
	.globl	_Z8kernel_IPcmiiiii
	.p2align	8
	.type	_Z8kernel_IPcmiiiii,@function
_Z8kernel_IPcmiiiii:                    ; @_Z8kernel_IPcmiiiii
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_and_b32_e32 v4, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_load_b32 s3, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, s11, s8, v[4:5]
	v_mad_u64_u32 v[1:2], null, v5, s6, s[4:5]
	v_cmp_gt_u32_e32 vcc_lo, s10, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v6, v2
	v_mad_u64_u32 v[2:3], null, s11, s9, v[0:1]
	v_mov_b32_e32 v3, 0x3b9aca00
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[7:8], null, v5, s7, v[6:7]
	v_cmp_gt_u32_e64 s0, s10, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v5, v7
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_add_co_u32 v6, s1, v1, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s1, v5, v7, s1
	global_load_b32 v3, v[6:7], off
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b32_e32 v0, 2, v0
	s_add_i32 s1, s3, 1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v6, v3
	s_mul_i32 s1, s1, s11
	s_mul_i32 s3, s3, s11
	v_mad_u32_u24 v7, 0x84, v4, v0
	s_min_i32 s2, s1, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s3, s2
	ds_store_b32 v7, v3
	s_cbranch_scc1 .LBB0_7
; %bb.3:                                ; %.lr.ph.preheader
	v_mul_u32_u24_e32 v4, 0x84, v4
.LBB0_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v8, v4
	ds_load_b32 v9, v0
	ds_load_b32 v6, v7
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v8, v9, v8
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 v6, v8
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	v_mov_b32_e32 v6, v8
	ds_store_b32 v7, v8
.LBB0_6:                                ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v0, 0x84, v0
	v_add_nc_u32_e32 v4, 4, v4
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s3, s2
	s_cbranch_scc0 .LBB0_4
.LBB0_7:                                ; %Flow69
	v_cmp_gt_u32_e64 s1, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_b32 s0, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_9
; %bb.8:
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v0, vcc_lo, v1, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v3, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8kernel_IPcmiiiii
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 12
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8kernel_IPcmiiiii, .Lfunc_end0-_Z8kernel_IPcmiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 444
; NumSgprs: 14
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 14
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z10kernel_IIIPcmiiiii  ; -- Begin function _Z10kernel_IIIPcmiiiii
	.globl	_Z10kernel_IIIPcmiiiii
	.p2align	8
	.type	_Z10kernel_IIIPcmiiiii,@function
_Z10kernel_IIIPcmiiiii:                 ; @_Z10kernel_IIIPcmiiiii
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_and_b32_e32 v4, 0x3ff, v0
	s_load_b32 s2, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_add_i32 s14, s14, s8
	s_add_i32 s15, s15, s9
	v_mad_u64_u32 v[6:7], null, s14, s11, v[4:5]
	v_bfe_u32 v5, v0, 10, 10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v6
	v_mad_u64_u32 v[0:1], null, s15, s11, v[5:6]
	v_mul_lo_u32 v8, v6, s7
	v_mad_u64_u32 v[2:3], null, v6, s6, s[4:5]
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_lo_u32 v9, v7, s6
	v_cmp_gt_i32_e32 vcc_lo, s10, v6
	v_mov_b32_e32 v7, 0x3b9aca00
	v_cmp_gt_i32_e64 s0, s10, v0
	v_ashrrev_i32_e32 v1, 31, v0
	v_add3_u32 v3, v9, v3, v8
	v_mov_b32_e32 v8, 0x3b9aca00
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s0
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_lshlrev_b64 v[8:9], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s1, v2, v8
	v_add_co_ci_u32_e64 v9, s1, v3, v9, s1
	global_load_b32 v8, v[8:9], off
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s3
	s_mul_i32 s2, s2, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, s2, v5
	v_cmp_gt_u32_e64 s1, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB1_4
; %bb.3:
	v_mov_b32_e32 v7, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, s1, v2, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s1, v3, v7, s1
	global_load_b32 v7, v[6:7], off
.LBB1_4:
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v9, 0x3b9aca00 :: v_dual_add_nc_u32 v10, s2, v4
	v_lshlrev_b32_e32 v6, 2, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e64 s1, s10, v10
	v_mad_u32_u24 v6, 0x84, v4, v6
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s1, s0, s1
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v7
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB1_6
; %bb.5:
	v_mad_u64_u32 v[11:12], null, v10, s6, s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v7, v12
	v_mad_u64_u32 v[12:13], null, v10, s7, v[7:8]
	v_lshlrev_b64 v[9:10], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, s1, v11, v9
	v_mov_b32_e32 v7, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s1, v7, v10, s1
	global_load_b32 v9, v[9:10], off
.LBB1_6:
	s_or_b32 exec_lo, exec_lo, s3
	s_add_i32 s1, s2, s11
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v9 offset:4224
	v_mov_b32_e32 v6, v8
	s_min_i32 s1, s1, s10
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_u32 s2, s1
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_9
; %bb.7:                                ; %.lr.ph.preheader
	v_lshl_add_u32 v5, v5, 2, 0x1080
	v_mul_u32_u24_e32 v4, 0x84, v4
	v_mov_b32_e32 v6, v8
.LBB1_8:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v7, v4
	ds_load_b32 v9, v5
	v_add_nc_u32_e32 v5, 0x84, v5
	v_add_nc_u32_e32 v4, 4, v4
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_cmp_ge_u32 s2, s1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v7, v9, v7
	v_min_i32_e32 v6, v6, v7
	s_cbranch_scc0 .LBB1_8
.LBB1_9:                                ; %Flow99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s1, v8, v6
	s_and_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_11
; %bb.10:
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v3, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB1_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernel_IIIPcmiiiii
		.amdhsa_group_segment_fixed_size 8448
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10kernel_IIIPcmiiiii, .Lfunc_end1-_Z10kernel_IIIPcmiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 620
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8448 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z9kernel_IIPcmiiiii    ; -- Begin function _Z9kernel_IIPcmiiiii
	.globl	_Z9kernel_IIPcmiiiii
	.p2align	8
	.type	_Z9kernel_IIPcmiiiii,@function
_Z9kernel_IIPcmiiiii:                   ; @_Z9kernel_IIPcmiiiii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v1, 0x3ff, v0
	s_cmp_lg_u32 s14, 0
	s_mov_b32 s2, 0
	s_cbranch_scc0 .LBB2_2
; %bb.1:
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[5:6], null, s15, s5, v[1:2]
	s_branch .LBB2_3
.LBB2_2:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr5
.LBB2_3:                                ; %Flow97
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s2, s6
	s_cbranch_vccnz .LBB2_5
; %bb.4:
	v_mad_u64_u32 v[5:6], null, s6, s5, v[1:2]
	s_mov_b32 s2, s15
.LBB2_5:
	s_load_b128 s[8:11], s[0:1], 0x0
	v_bfe_u32 v0, v0, 10, 10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s4, v5
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[2:3], null, v5, s10, s[8:9]
	v_mov_b32_e32 v6, v3
	v_mad_u64_u32 v[3:4], null, s2, s5, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[7:8], null, v5, s11, v[6:7]
	v_mov_b32_e32 v5, 0x3b9aca00
	v_cmp_gt_u32_e64 s0, s4, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v6, v7 :: v_dual_mov_b32 v7, 0x3b9aca00
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB2_7
; %bb.6:
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_co_u32 v7, s1, v2, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s1, v6, v8, s1
	global_load_b32 v7, v[7:8], off
.LBB2_7:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB2_11
; %bb.8:
	v_mad_u64_u32 v[4:5], null, s6, s5, v[0:1]
	v_mov_b32_e32 v5, 0x3b9aca00
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_u32_e64 s4, v4
	s_cbranch_execz .LBB2_10
; %bb.9:
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, s1, v2, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s1, v6, v5, s1
	global_load_b32 v5, v[4:5], off
.LBB2_10:                               ; %Flow96
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_11:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b32_e32 v4, 2, v0
	s_mul_i32 s2, s6, s5
	v_mad_u32_u24 v8, 0x84, v1, v4
	v_mov_b32_e32 v4, 0x3b9aca00
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v5
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB2_15
; %bb.12:
	v_dual_mov_b32 v4, 0x3b9aca00 :: v_dual_add_nc_u32 v5, s2, v1
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s4, v5
	s_cbranch_execz .LBB2_14
; %bb.13:
	v_mad_u64_u32 v[9:10], null, v5, s10, s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v10
	v_mad_u64_u32 v[10:11], null, v5, s11, v[4:5]
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	v_add_co_u32 v4, s1, v9, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s1, v10, v5, s1
	global_load_b32 v4, v[4:5], off
.LBB2_14:                               ; %Flow95
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_15:                               ; %._crit_edge71
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_add_i32 s1, s2, s5
	v_mov_b32_e32 v5, v7
	s_min_i32 s1, s1, s4
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v4 offset:4224
	s_cmp_ge_u32 s2, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_18
; %bb.16:                               ; %.lr.ph.preheader
	v_lshl_add_u32 v0, v0, 2, 0x1080
	v_mul_u32_u24_e32 v1, 0x84, v1
	v_mov_b32_e32 v5, v7
.LBB2_17:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v4, v1
	ds_load_b32 v8, v0
	v_add_nc_u32_e32 v0, 0x84, v0
	v_add_nc_u32_e32 v1, 4, v1
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_cmp_ge_u32 s2, s1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, v8, v4
	v_min_i32_e32 v5, v5, v4
	s_cbranch_scc0 .LBB2_17
.LBB2_18:                               ; %Flow94
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s1, v7, v5
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_20
; %bb.19:
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	v_add_co_u32 v0, vcc_lo, v2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v6, v1, vcc_lo
	global_store_b32 v[0:1], v5, off
.LBB2_20:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9kernel_IIPcmiiiii
		.amdhsa_group_segment_fixed_size 8448
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z9kernel_IIPcmiiiii, .Lfunc_end2-_Z9kernel_IIPcmiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 708
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8448 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 4224
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8kernel_IPcmiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     14
    .sgpr_spill_count: 0
    .symbol:         _Z8kernel_IPcmiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8448
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10kernel_IIIPcmiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10kernel_IIIPcmiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8448
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9kernel_IIPcmiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9kernel_IIPcmiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
