#include <stdio.h>
#include <math.h>
#include <cuda.h>

__host__ void checkCudaState(cudaError_t& cudaState,const char *message){
  /* it will print an error message if there is */
  if(cudaState != cudaSuccess) printf("%s",message);
}

__device__ void swap(int *points,uint lowIndex,uint upIndex){
  /* it will swap two points */
  int aux = points[lowIndex];
  points[lowIndex] = points[upIndex];
  points[upIndex] = aux;
}

__global__ void sort(int *points,uint phase,uint n){
  /* it will sort with points array with respect to phase*/
  uint ti = blockIdx.x*blockDim.x+threadIdx.x;
  if(ti >= n || ti == 0) return;

  if(ti%phase == 0){ // multiplier phase
    uint top = ti, lower = (top - phase) + 1;
    uint middle = lower + phase/2;
    uint lowG1 = lower, lowG2 = middle, topG1 = middle-1, topG2 = top;
    while(true){
      if(lowG1 > topG1 && lowG2 > topG2) break;

      // --------------------- case 1 ---------------------
      if(lowG1 <= topG1 && lowG2 <= topG2){

        if(points[lowG1] > points[lowG2]){
          swap(points,lowG1,lowG2);
          lowG2++;
        }
        else lowG1++;

      }

      // --------------------- case 2 ---------------------
      else if(lowG1 < topG1 && lowG2 > topG2){
        uint next = lowG1 + 1;
        if(points[lowG1] > points[next])
          swap(points,lowG1,next);
        lowG1++;
      }

      // --------------------- case 3 ---------------------
      else if(lowG2 < topG2 && lowG1 > topG1){
        uint next = lowG2 + 1;
        if(points[lowG2] > points[next])
          swap(points,lowG2,next);
        lowG2++;
      }

      else if(lowG1 == topG1)
        lowG1++;
      else if(lowG2 == topG2)
        lowG2++;
    }
  }
}

__host__ void fill(int *points,size_t n){
  /* it will fill points array */
  for(size_t i=0; i<n; i++)
    points[i] = n-i;
}

__host__ void show(int* points,size_t n){
  /* it will show points array */
  for(size_t i=0; i<n; i++)
    printf("%d ",points[i]);
  printf("\n\n");
}

int main(int argc, char const *argv[]) {
  size_t items = 2049;
  size_t size = items*sizeof(int);
  cudaError_t cudaState = cudaSuccess;
  int *h_points = NULL, *d_points = NULL, *h_result = NULL;

  h_points = (int*)malloc(size);
  h_result = (int*)malloc(size);
  fill(h_points,items);
  cudaState = cudaMalloc((void**)&d_points,size);
  checkCudaState(cudaState,"Impossible allocate data\n");
  if(d_points != NULL){
    cudaState = cudaMemcpy(d_points,h_points,size,cudaMemcpyHostToDevice);
    checkCudaState(cudaState,"Impossible copy data from host to device\n");
    show(h_points,items);

    dim3 blockSize(1024,1,1);
    dim3 gridSize((int)(ceil(items/1024.0)),1,1);
    uint i = 1;
    while(pow(2,i) <= items){
      sort<<<gridSize,blockSize>>>(d_points,pow(2,i),items);
      cudaDeviceSynchronize();
      i++;
    }
    cudaState = cudaMemcpy(h_result,d_points,size,cudaMemcpyDeviceToHost);
    checkCudaState(cudaState,"Impossible copy data from device to host\n");
    show(h_result,items);
  }

  if(h_points != NULL) free(h_points);
  if(h_result != NULL) free(h_result);
  if(d_points != NULL) cudaFree(d_points);
  return 0;
}

	.file	"tmpxft_002f88de_00000000-6_mergesort.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%s"
	.text
	.globl	_Z14checkCudaStateR9cudaErrorPKc
	.type	_Z14checkCudaStateR9cudaErrorPKc, @function
_Z14checkCudaStateR9cudaErrorPKc:
.LFB2027:
	.cfi_startproc
	endbr64
	cmpl	$0, (%rdi)
	movq	%rsi, %rdx
	je	.L2
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	jmp	__printf_chk@PLT
.L2:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z14checkCudaStateR9cudaErrorPKc, .-_Z14checkCudaStateR9cudaErrorPKc
	.globl	_Z4swapPijj
	.type	_Z4swapPijj, @function
_Z4swapPijj:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z4swapPijj, .-_Z4swapPijj
	.globl	_Z4fillPim
	.type	_Z4fillPim, @function
_Z4fillPim:
.LFB2029:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L8:
	cmpq	%rsi, %rax
	je	.L10
	movl	%esi, %edx
	subl	%eax, %edx
	movl	%edx, (%rdi,%rax,4)
	incq	%rax
	jmp	.L8
.L10:
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z4fillPim, .-_Z4fillPim
	.section	.rodata.str1.1
.LC1:
	.string	"%d "
.LC2:
	.string	"\n\n"
	.text
	.globl	_Z4showPim
	.type	_Z4showPim, @function
_Z4showPim:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC1(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
.L12:
	cmpq	%rbp, %rbx
	je	.L15
	movl	(%r12,%rbx,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L12
.L15:
	popq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC2(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z4showPim, .-_Z4showPim
	.globl	_Z25__device_stub__Z4sortPijjPijj
	.type	_Z25__device_stub__Z4sortPijjPijj, @function
_Z25__device_stub__Z4sortPijjPijj:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z4sortPijj(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L16:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z25__device_stub__Z4sortPijjPijj, .-_Z25__device_stub__Z4sortPijjPijj
	.globl	_Z4sortPijj
	.type	_Z4sortPijj, @function
_Z4sortPijj:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z4sortPijjPijj
	.cfi_endproc
.LFE2057:
	.size	_Z4sortPijj, .-_Z4sortPijj
	.section	.rodata.str1.1
.LC3:
	.string	"Impossible allocate data\n"
.LC4:
	.string	"Impossible copy data from host to device\n"
.LC7:
	.string	"Impossible copy data from device to host\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$8196, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	leaq	20(%rsp), %r12
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movl	$8196, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$2049, %esi
	movq	%rbx, %rdi
	movq	%rax, %rbp
	call	_Z4fillPim
	leaq	24(%rsp), %rdi
	movl	$8196, %esi
	call	cudaMalloc@PLT
	movq	%r12, %rdi
	leaq	.LC3(%rip), %rsi
	movl	%eax, 20(%rsp)
	call	_Z14checkCudaStateR9cudaErrorPKc
	movq	24(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L22
	movl	$1, %ecx
	movl	$8196, %edx
	movq	%rbx, %rsi
	movl	$1, %r13d
	call	cudaMemcpy@PLT
	leaq	.LC4(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, 20(%rsp)
	call	_Z14checkCudaStateR9cudaErrorPKc
	movl	$2049, %esi
	movq	%rbx, %rdi
	call	_Z4showPim
	movl	$4194305, %eax
	movl	$1, 40(%rsp)
	salq	$10, %rax
	movl	$1, 52(%rsp)
	movq	%rax, 32(%rsp)
	subq	$1021, %rax
	movq	%rax, 44(%rsp)
.L23:
	movl	%r13d, %eax
	movsd	.LC5(%rip), %xmm0
	cvtsi2sdq	%rax, %xmm1
	movsd	%xmm1, 8(%rsp)
	call	pow@PLT
	movsd	.LC6(%rip), %xmm2
	movsd	8(%rsp), %xmm1
	comisd	%xmm0, %xmm2
	jb	.L45
	movl	40(%rsp), %ecx
	movq	32(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	44(%rsp), %rdi
	movl	52(%rsp), %esi
	movsd	%xmm1, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm1
	testl	%eax, %eax
	jne	.L24
	movsd	.LC5(%rip), %xmm0
	call	pow@PLT
	movq	24(%rsp), %rdi
	movl	$2049, %edx
	cvttsd2siq	%xmm0, %rsi
	call	_Z25__device_stub__Z4sortPijjPijj
.L24:
	call	cudaDeviceSynchronize@PLT
	incl	%r13d
	jmp	.L23
.L45:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$8196, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC7(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, 20(%rsp)
	call	_Z14checkCudaStateR9cudaErrorPKc
	movl	$2049, %esi
	movq	%rbp, %rdi
	call	_Z4showPim
.L22:
	testq	%rbx, %rbx
	je	.L28
	movq	%rbx, %rdi
	call	free@PLT
.L28:
	testq	%rbp, %rbp
	je	.L29
	movq	%rbp, %rdi
	call	free@PLT
.L29:
	movq	24(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L30
	call	cudaFree@PLT
.L30:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z4sortPijj"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4sortPijj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1073741824
	.align 8
.LC6:
	.long	0
	.long	1084228096
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <math.h>
#include <hip/hip_runtime.h>

__host__ void checkCudaState(hipError_t& cudaState,const char *message){
  /* it will print an error message if there is */
  if(cudaState != hipSuccess) printf("%s",message);
}

__device__ void swap(int *points,uint lowIndex,uint upIndex){
  /* it will swap two points */
  int aux = points[lowIndex];
  points[lowIndex] = points[upIndex];
  points[upIndex] = aux;
}

__global__ void sort(int *points,uint phase,uint n){
  /* it will sort with points array with respect to phase*/
  uint ti = blockIdx.x*blockDim.x+threadIdx.x;
  if(ti >= n || ti == 0) return;

  if(ti%phase == 0){ // multiplier phase
    uint top = ti, lower = (top - phase) + 1;
    uint middle = lower + phase/2;
    uint lowG1 = lower, lowG2 = middle, topG1 = middle-1, topG2 = top;
    while(true){
      if(lowG1 > topG1 && lowG2 > topG2) break;

      // --------------------- case 1 ---------------------
      if(lowG1 <= topG1 && lowG2 <= topG2){

        if(points[lowG1] > points[lowG2]){
          swap(points,lowG1,lowG2);
          lowG2++;
        }
        else lowG1++;

      }

      // --------------------- case 2 ---------------------
      else if(lowG1 < topG1 && lowG2 > topG2){
        uint next = lowG1 + 1;
        if(points[lowG1] > points[next])
          swap(points,lowG1,next);
        lowG1++;
      }

      // --------------------- case 3 ---------------------
      else if(lowG2 < topG2 && lowG1 > topG1){
        uint next = lowG2 + 1;
        if(points[lowG2] > points[next])
          swap(points,lowG2,next);
        lowG2++;
      }

      else if(lowG1 == topG1)
        lowG1++;
      else if(lowG2 == topG2)
        lowG2++;
    }
  }
}

__host__ void fill(int *points,size_t n){
  /* it will fill points array */
  for(size_t i=0; i<n; i++)
    points[i] = n-i;
}

__host__ void show(int* points,size_t n){
  /* it will show points array */
  for(size_t i=0; i<n; i++)
    printf("%d ",points[i]);
  printf("\n\n");
}

int main(int argc, char const *argv[]) {
  size_t items = 2049;
  size_t size = items*sizeof(int);
  hipError_t cudaState = hipSuccess;
  int *h_points = NULL, *d_points = NULL, *h_result = NULL;

  h_points = (int*)malloc(size);
  h_result = (int*)malloc(size);
  fill(h_points,items);
  cudaState = hipMalloc((void**)&d_points,size);
  checkCudaState(cudaState,"Impossible allocate data\n");
  if(d_points != NULL){
    cudaState = hipMemcpy(d_points,h_points,size,hipMemcpyHostToDevice);
    checkCudaState(cudaState,"Impossible copy data from host to device\n");
    show(h_points,items);

    dim3 blockSize(1024,1,1);
    dim3 gridSize((int)(ceil(items/1024.0)),1,1);
    uint i = 1;
    while(pow(2,i) <= items){
      sort<<<gridSize,blockSize>>>(d_points,pow(2,i),items);
      hipDeviceSynchronize();
      i++;
    }
    cudaState = hipMemcpy(h_result,d_points,size,hipMemcpyDeviceToHost);
    checkCudaState(cudaState,"Impossible copy data from device to host\n");
    show(h_result,items);
  }

  if(h_points != NULL) free(h_points);
  if(h_result != NULL) free(h_result);
  if(d_points != NULL) hipFree(d_points);
  return 0;
}

	.text
	.file	"mergesort.hip"
	.globl	_Z14checkCudaStateR10hipError_tPKc # -- Begin function _Z14checkCudaStateR10hipError_tPKc
	.type	_Z14checkCudaStateR10hipError_tPKc,@function
_Z14checkCudaStateR10hipError_tPKc:     # @_Z14checkCudaStateR10hipError_tPKc
	.cfi_startproc
# %bb.0:
	cmpl	$0, (%rdi)
	je	.LBB0_1
# %bb.2:
	movl	$.L.str, %edi
	xorl	%eax, %eax
	jmp	printf                          # TAILCALL
.LBB0_1:
	retq
.Lfunc_end0:
	.size	_Z14checkCudaStateR10hipError_tPKc, .Lfunc_end0-_Z14checkCudaStateR10hipError_tPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__sortPijj     # -- Begin function _Z19__device_stub__sortPijj
	.type	_Z19__device_stub__sortPijj,@function
_Z19__device_stub__sortPijj:            # @_Z19__device_stub__sortPijj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4sortPijj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z19__device_stub__sortPijj, .Lfunc_end1-_Z19__device_stub__sortPijj
	.cfi_endproc
                                        # -- End function
	.globl	_Z4fillPim                      # -- Begin function _Z4fillPim
	.type	_Z4fillPim,@function
_Z4fillPim:                             # @_Z4fillPim
	.cfi_startproc
# %bb.0:
	testq	%rsi, %rsi
	je	.LBB2_2
.LBB2_1:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%esi, (%rdi)
	addq	$4, %rdi
	decq	%rsi
	jne	.LBB2_1
.LBB2_2:                                # %._crit_edge
	retq
.Lfunc_end2:
	.size	_Z4fillPim, .Lfunc_end2-_Z4fillPim
	.cfi_endproc
                                        # -- End function
	.globl	_Z4showPim                      # -- Begin function _Z4showPim
	.type	_Z4showPim,@function
_Z4showPim:                             # @_Z4showPim
	.cfi_startproc
# %bb.0:
	testq	%rsi, %rsi
	je	.LBB3_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	xorl	%r15d, %r15d
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r14,%r15,4), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %rbx
	jne	.LBB3_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB3_4:                                # %._crit_edge
	movl	$.Lstr, %edi
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end3:
	.size	_Z4showPim, .Lfunc_end3-_Z4showPim
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x3ff0000000000000              # double 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	$0, 8(%rsp)
	movl	$8196, %edi                     # imm = 0x2004
	callq	malloc
	movq	%rax, %r14
	movl	$8196, %edi                     # imm = 0x2004
	callq	malloc
	movq	%rax, %rbx
	movl	$2049, %eax                     # imm = 0x801
	movq	%r14, %rcx
.LBB4_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movl	%eax, (%rcx)
	addq	$4, %rcx
	decq	%rax
	jne	.LBB4_1
# %bb.2:                                # %_Z4fillPim.exit
	leaq	8(%rsp), %rdi
	movl	$8196, %esi                     # imm = 0x2004
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB4_4
# %bb.3:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.LBB4_4:                                # %_Z14checkCudaStateR10hipError_tPKc.exit
	movq	8(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB4_14
# %bb.5:
	movl	$8196, %edx                     # imm = 0x2004
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB4_7
# %bb.6:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
.LBB4_7:                                # %_Z14checkCudaStateR10hipError_tPKc.exit38
	movabsq	$4294967299, %r15               # imm = 0x100000003
	movl	$2049, %esi                     # imm = 0x801
	movq	%r14, %rdi
	callq	_Z4showPim
	movsd	.LCPI4_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	callq	exp2@PLT
	movl	$2, %ebp
	leaq	1021(%r15), %r12
.LBB4_8:                                # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_10
# %bb.9:                                #   in Loop: Header=BB4_8 Depth=1
	movq	8(%rsp), %r13
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	exp2@PLT
	cvttsd2si	%xmm0, %rsi
	movq	%r13, %rdi
                                        # kill: def $esi killed $esi killed $rsi
	movl	$2049, %edx                     # imm = 0x801
	callq	_Z19__device_stub__sortPijj
.LBB4_10:                               #   in Loop: Header=BB4_8 Depth=1
	callq	hipDeviceSynchronize
	movl	%ebp, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	callq	exp2@PLT
	incl	%ebp
	cmpl	$13, %ebp
	jne	.LBB4_8
# %bb.11:
	movq	8(%rsp), %rsi
	movl	$8196, %edx                     # imm = 0x2004
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB4_13
# %bb.12:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
.LBB4_13:
	movl	$2049, %esi                     # imm = 0x801
	movq	%rbx, %rdi
	callq	_Z4showPim
	testq	%r14, %r14
	je	.LBB4_15
.LBB4_14:                               # %.thread
	movq	%r14, %rdi
	callq	free
.LBB4_15:
	testq	%rbx, %rbx
	je	.LBB4_17
# %bb.16:
	movq	%rbx, %rdi
	callq	free
.LBB4_17:
	movq	8(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB4_19
# %bb.18:
	callq	hipFree
.LBB4_19:
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4sortPijj, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%s"
	.size	.L.str, 3

	.type	_Z4sortPijj,@object             # @_Z4sortPijj
	.section	.rodata,"a",@progbits
	.globl	_Z4sortPijj
	.p2align	3, 0x0
_Z4sortPijj:
	.quad	_Z19__device_stub__sortPijj
	.size	_Z4sortPijj, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%d "
	.size	.L.str.1, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4sortPijj"
	.size	.L__unnamed_1, 12

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n"
	.size	.Lstr, 2

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Impossible allocate data"
	.size	.Lstr.1, 25

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Impossible copy data from host to device"
	.size	.Lstr.2, 41

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Impossible copy data from device to host"
	.size	.Lstr.3, 41

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__sortPijj
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4sortPijj
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4sortPijj             ; -- Begin function _Z4sortPijj
	.globl	_Z4sortPijj
	.p2align	8
	.type	_Z4sortPijj,@function
_Z4sortPijj:                            ; @_Z4sortPijj
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b64 s[4:5], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_cmp_gt_u32_e32 vcc_lo, s5, v1
	v_cmp_ne_u32_e64 s2, 0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_27
; %bb.1:
	v_cvt_f32_u32_e32 v0, s4
	s_sub_i32 s2, 0, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s2, v0
	v_mul_hi_u32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v2
	v_mul_hi_u32 v0, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v0, s4
	v_sub_nc_u32_e32 v0, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v2, s4, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_cndmask_b32_e32 v0, v0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v2, s4, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_cndmask_b32_e32 v0, v0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_27
; %bb.2:
	v_subrev_nc_u32_e32 v0, s4, v1
	s_lshr_b32 s2, s4, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, 1, v0
	v_add_nc_u32_e32 v0, s2, v0
	v_add_nc_u32_e32 v4, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e64 s3, v2, v0
	v_cmp_gt_u32_e64 s5, v4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s5
	s_xor_b32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_27
; %bb.3:                                ; %.lr.ph.preheader
	s_load_b64 s[0:1], s[0:1], 0x0
	v_add_nc_u32_e32 v9, 1, v0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, 0
.LBB0_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_or_b32 s4, s3, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s4, s4, -1
	s_and_saveexec_b32 s6, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s6
	s_cbranch_execz .LBB0_10
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	v_mov_b32_e32 v5, v3
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[10:11], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s0, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v7, vcc_lo
	v_add_co_u32 v7, vcc_lo, s0, v10
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v11, vcc_lo
	s_clause 0x1
	global_load_b32 v10, v[5:6], off
	global_load_b32 v11, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmpx_le_i32_e64 v10, v11
	s_xor_b32 s6, exec_lo, s6
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	v_add_nc_u32_e32 v2, 1, v2
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr7_vgpr8
                                        ; implicit-def: $vgpr10
; %bb.7:                                ; %Flow
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_and_not1_saveexec_b32 s6, s6
; %bb.8:                                ;   in Loop: Header=BB0_4 Depth=1
	v_add_nc_u32_e32 v4, 1, v4
	s_clause 0x1
	global_store_b32 v[5:6], v11, off
	global_store_b32 v[7:8], v10, off
; %bb.9:                                ; %Flow84
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_10:                               ; %Flow92
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB0_26
; %bb.11:                               ;   in Loop: Header=BB0_4 Depth=1
	v_cmp_ge_u32_e32 vcc_lo, v2, v0
	s_xor_b32 s5, s5, -1
                                        ; implicit-def: $vgpr5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, vcc_lo, s5
	s_and_saveexec_b32 s6, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, exec_lo, s6
	s_cbranch_execz .LBB0_21
; %bb.12:                               ;   in Loop: Header=BB0_4 Depth=1
	v_cmp_ge_u32_e32 vcc_lo, v4, v1
	s_xor_b32 s3, s3, -1
                                        ; implicit-def: $vgpr5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, vcc_lo, s3
	s_and_saveexec_b32 s6, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s6
	s_cbranch_execz .LBB0_16
; %bb.13:                               ;   in Loop: Header=BB0_4 Depth=1
	v_mov_b32_e32 v5, v9
	s_mov_b32 s6, exec_lo
	v_cmpx_ne_u32_e64 v2, v0
; %bb.14:                               ;   in Loop: Header=BB0_4 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, v4, v1
	v_mov_b32_e32 v5, v2
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
; %bb.15:                               ; %Flow85
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_16:                               ; %Flow87
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB0_20
; %bb.17:                               ;   in Loop: Header=BB0_4 Depth=1
	v_mov_b32_e32 v5, v3
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	global_load_b64 v[7:8], v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i32_e64 v7, v8
	s_cbranch_execz .LBB0_19
; %bb.18:                               ;   in Loop: Header=BB0_4 Depth=1
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v11, v7
	global_store_b64 v[5:6], v[10:11], off
.LBB0_19:                               ; %Flow86
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v5, v2 :: v_dual_add_nc_u32 v4, 1, v4
.LBB0_20:                               ; %Flow88
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_21:                               ; %Flow90
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_and_not1_saveexec_b32 s3, s5
	s_cbranch_execz .LBB0_25
; %bb.22:                               ;   in Loop: Header=BB0_4 Depth=1
	v_lshlrev_b64 v[5:6], 2, v[2:3]
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	global_load_b64 v[7:8], v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i32_e64 v7, v8
	s_cbranch_execz .LBB0_24
; %bb.23:                               ;   in Loop: Header=BB0_4 Depth=1
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v11, v7
	global_store_b64 v[5:6], v[10:11], off
.LBB0_24:                               ; %Flow89
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v5, 1, v2
.LBB0_25:                               ; %Flow91
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v2, v5
.LBB0_26:                               ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, v2, v0
	v_cmp_gt_u32_e64 s5, v4, v1
	s_and_b32 s4, s3, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, exec_lo, s4
	s_or_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_4
.LBB0_27:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4sortPijj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4sortPijj, .Lfunc_end0-_Z4sortPijj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 828
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4sortPijj
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4sortPijj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
