//this is a lite version of a GPU accelerated N-body simulation. Has to be run on an NVIDIA machine with CUDA enabled.
//the interaction is just gravitation
//the simulation trajectory is to be visualized in VMD
#include <cstdio>
#include <cstdlib>
#include <cmath>

#define N 9999  // number of bodies
#define MASS 0  // row in array for mass
#define X_POS 1 // row in array for x position
#define Y_POS 2 // row in array for y position
#define Z_POS 3 // row in array for z position
#define X_VEL 4 // row in array for x velocity
#define Y_VEL 5 // row in array for y velocity
#define Z_VEL 6 // row in array for z velocity
#define G 10    // "gravitational constant" (not really)

float dt = 0.05; // time interval

// each thread computes new position of one body
__global__ void nbody(float *dev_body, float dt) {
int i=threadIdx.x + blockIdx.x* blockDim.x;
int j;
if(i<N) 
{    // force calculation
	float Fx_dir;
 	float Fy_dir;
	float Fz_dir;
    // initialize forces to zero
      Fx_dir = 0.0;
      Fy_dir = 0.0;
      Fz_dir = 0.0; 

 	for(j=0;j<N&&j!=i;j++)
 	{ 
// force on body x due to all other bodies 
	float x_diff, y_diff, z_diff;

	  x_diff = dev_body[i*7+X_POS] - dev_body [j*7+X_POS];  // difference in x direction
	  y_diff = dev_body[i*7+Y_POS] - dev_body [j*7+Y_POS];  // difference in y direction
	  z_diff = dev_body[i*7+Z_POS] - dev_body [j*7+Z_POS];  // difference in z direction

	  // calculate distance (r)
	  float rr = (x_diff * x_diff + y_diff * y_diff + z_diff * z_diff);
	  float r = sqrt(rr);

	  // force between bodies i and x
	  float F = G * dev_body[i*7+MASS] * dev_body[j*7+MASS] / r;

	  // if sufficiently far away, gravitation force
	  if (r > 10.0) {
	    Fx_dir += -F * x_diff / r;  // resolve forces in x and y directions
	    Fy_dir += -F * y_diff / r;  // and accumulate forces
	    Fz_dir += -F * z_diff / r;  // 
	  } 
	  else if(r<=10.0&&r>0.5){//avoid extremely large acceleration due to long time interval
	    // if too close, anti-gravitational force
	    Fx_dir -= -F * x_diff / r;  // resolve forces in x and y directions
	    Fy_dir -= -F * y_diff / r;  // and accumulate forces
	    Fz_dir -= -F * z_diff / r;  // 
	  }
	  }


    // update postions and velocity in array
        
	// update velocities
	dev_body[i*7+X_VEL] += Fx_dir * dt / dev_body[i*7+MASS];
	dev_body[i*7+Y_VEL] += Fy_dir * dt / dev_body[i*7+MASS];
	dev_body[i*7+Z_VEL] += Fz_dir * dt / dev_body[i*7+MASS];
	// update positions
	dev_body[i*7+X_POS] += dev_body[i*7+X_VEL] * dt;
	dev_body[i*7+Y_POS] += dev_body[i*7+Y_VEL] * dt;
	dev_body[i*7+Z_POS] += dev_body[i*7+Z_VEL] * dt;
	}
 
}


int main(int argc, char **argv) {
  float *body; // host data array of bodies
  float *dev_body; // device data array of bodies

  int tmax = 0;

  if (argc != 2) {
    fprintf(stderr, "Format: %s { number of timesteps }\n", argv[0]);
    exit (-1);
  }

  tmax = atoi(argv[1]);

  // allocate memory size for the body
  int bodysize = N * 7 * sizeof(float);    
  body = (float *)malloc(bodysize);
  cudaMalloc((void**) &dev_body, bodysize);

  // assign each body a random position
  for (int i = 0; i < N; i++) {
    body[i * 7 + MASS] =  i%1001?1:1000;//create several heavy regions
    body[i * 7 + X_POS] = (i%2?0.0:200.0)+drand48() * 50.0;//define two galaxis
    body[i * 7 + Y_POS] = drand48() * 50.0;
    body[i * 7 + Z_POS] = drand48() * 20.0;//a plate-like distribution
    body[i * 7 + X_VEL] = drand48() * 0.1/body[i * 7 + MASS];
    body[i * 7 + Y_VEL] = (i%2?-10:10)+drand48() * 1.0/body[i * 7 + MASS];//angular momentum
    body[i * 7 + Z_VEL] = drand48() * 0.1/body[i * 7 + MASS];
  }

  // print out initial positions in PDB format

  printf("MODEL %8d\n", 0);
  for (int i = 0; i < N; i++) {
	printf("%s%7d  %s %s %s%4d     %7.0f %7.0f %7.0f  %4.2f  %4.3f\n",
           "ATOM", i+1, "CA ", "GLY", "A", i+1, body[i * 7 + X_POS], body[i * 7 + Y_POS], body[i * 7 + Z_POS], 1.00, 0.00);
  }
  printf("TER\nENDMDL\n");
 // copy nbody info over to GPU
    cudaMemcpy(dev_body, body, bodysize, cudaMemcpyHostToDevice);

  // step through each time step
  for (int t = 0; t < tmax; t++) {
 
    dim3 blockDim(1024);
    dim3 gridDim((int)ceil(N*1.0 / blockDim.x));

    // run nbody calculation
    nbody<<<gridDim, blockDim>>>(dev_body, dt);
    cudaThreadSynchronize();
if(!(t%1))//change output frequency by the mod factor. help to determine the robusticity quickly
{
    // copy nbody info back to CPU
    cudaMemcpy(body, dev_body, bodysize, cudaMemcpyDeviceToHost);

    // print out positions in PDB format
    printf("MODEL %8d\n", t+1);
    for (int i = 0; i < N; i++) {
	printf("%s%7d  %s %s %s%4d     %7.0f %7.0f %7.0f  %4.2f  %4.3f\n",
               "ATOM", i+1, "CA ", "GLY", "A", i+1, body[i * 7 + X_POS], body[i * 7 + Y_POS], body[i * 7 + Z_POS], 1.00, 0.00);
    }
    printf("TER\nENDMDL\n");
   }

  }  // end of time period loop
  free(body);
  cudaFree(body);
}

	.file	"tmpxft_00319f7e_00000000-6_nbody.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z25__device_stub__Z5nbodyPffPff
	.type	_Z25__device_stub__Z5nbodyPffPff, @function
_Z25__device_stub__Z5nbodyPffPff:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movss	%xmm0, 4(%rsp)
	leaq	52(%rsp), %rsi
	leaq	40(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z5nbodyPff(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z25__device_stub__Z5nbodyPffPff, .-_Z25__device_stub__Z5nbodyPffPff
	.globl	_Z5nbodyPff
	.type	_Z5nbodyPff, @function
_Z5nbodyPff:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z5nbodyPffPff
	.cfi_endproc
.LFE2053:
	.size	_Z5nbodyPff, .-_Z5nbodyPff
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC6:
	.string	"Format: %s { number of timesteps }\n"
.LC10:
	.string	"MODEL %8d\n"
.LC12:
	.string	"GLY"
.LC13:
	.string	"CA "
.LC14:
	.string	"ATOM"
.LC15:
	.string	"%s%7d  %s %s %s%4d     %7.0f %7.0f %7.0f  %4.2f  %4.3f\n"
.LC16:
	.string	"A"
.LC17:
	.string	"TER\nENDMDL\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	je	.L9
	movq	(%rsi), %rcx
	movq	stderr(%rip), %rdi
	leaq	.LC6(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L9:
	movq	8(%rsi), %rdi
	xorl	%r12d, %r12d
	call	atoi@PLT
	movl	$279972, %edi
	movl	%eax, %r13d
	call	malloc@PLT
	leaq	24(%rsp), %rdi
	movl	$279972, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	movq	%rbp, %rbx
.L13:
	movl	%r12d, %eax
	movl	$1001, %ecx
	movss	.LC1(%rip), %xmm0
	cltd
	idivl	%ecx
	testl	%edx, %edx
	je	.L10
	movss	.LC0(%rip), %xmm0
.L10:
	movl	%r12d, %r14d
	movsd	.LC3(%rip), %xmm1
	movss	%xmm0, (%rbx)
	andl	$1, %r14d
	je	.L11
	xorps	%xmm1, %xmm1
.L11:
	movsd	%xmm1, 8(%rsp)
	call	drand48@PLT
	mulsd	.LC7(%rip), %xmm0
	movsd	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 4(%rbx)
	call	drand48@PLT
	mulsd	.LC7(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 8(%rbx)
	call	drand48@PLT
	mulsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 12(%rbx)
	call	drand48@PLT
	mulsd	.LC9(%rip), %xmm0
	cvtss2sd	(%rbx), %xmm1
	divsd	%xmm1, %xmm0
	movsd	.LC5(%rip), %xmm1
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 16(%rbx)
	testl	%r14d, %r14d
	je	.L12
	movsd	.LC4(%rip), %xmm1
.L12:
	movsd	%xmm1, 8(%rsp)
	incl	%r12d
	addq	$28, %rbx
	call	drand48@PLT
	cvtss2sd	-28(%rbx), %xmm2
	movsd	8(%rsp), %xmm1
	divsd	%xmm2, %xmm0
	addsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, -8(%rbx)
	call	drand48@PLT
	mulsd	.LC9(%rip), %xmm0
	cvtss2sd	-28(%rbx), %xmm1
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, -4(%rbx)
	cmpl	$9999, %r12d
	jne	.L13
	xorl	%edx, %edx
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	4(%rbp), %r12
	xorl	%ebx, %ebx
	movq	%r12, %r15
.L14:
	incl	%ebx
	leaq	.LC16(%rip), %rax
	xorps	%xmm4, %xmm4
	addq	$28, %r15
	cvtss2sd	-28(%r15), %xmm0
	pushq	%rbx
	.cfi_def_cfa_offset 136
	movl	%ebx, %ecx
	movsd	.LC11(%rip), %xmm3
	pushq	%rax
	.cfi_def_cfa_offset 144
	leaq	.LC15(%rip), %rsi
	movb	$5, %al
	leaq	.LC12(%rip), %r9
	leaq	.LC13(%rip), %r8
	leaq	.LC14(%rip), %rdx
	movl	$2, %edi
	cvtss2sd	-20(%r15), %xmm2
	cvtss2sd	-24(%r15), %xmm1
	call	__printf_chk@PLT
	popq	%rcx
	.cfi_def_cfa_offset 136
	popq	%rsi
	.cfi_def_cfa_offset 128
	cmpl	$9999, %ebx
	jne	.L14
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$279972, %edx
	call	cudaMemcpy@PLT
.L15:
	cmpl	%r13d, %ebx
	jge	.L27
	movl	$4194305, %edx
	movl	$2147483653, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$10, %rdx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movss	dt(%rip), %xmm0
	movq	24(%rsp), %rdi
	call	_Z25__device_stub__Z5nbodyPffPff
.L16:
	call	cudaThreadSynchronize@PLT
	movq	24(%rsp), %rsi
	movq	%rbp, %rdi
	incl	%ebx
	movl	$2, %ecx
	movl	$279972, %edx
	movq	%r12, %r15
	xorl	%r14d, %r14d
	call	cudaMemcpy@PLT
	movl	%ebx, %edx
	leaq	.LC10(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC16(%rip), %r11
.L17:
	incl	%r14d
	xorps	%xmm4, %xmm4
	movb	$5, %al
	addq	$28, %r15
	cvtss2sd	-28(%r15), %xmm0
	pushq	%r14
	.cfi_def_cfa_offset 136
	movsd	.LC11(%rip), %xmm3
	leaq	.LC14(%rip), %rdx
	pushq	%r11
	.cfi_def_cfa_offset 144
	leaq	.LC12(%rip), %r9
	movl	%r14d, %ecx
	leaq	.LC13(%rip), %r8
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	cvtss2sd	-20(%r15), %xmm2
	cvtss2sd	-24(%r15), %xmm1
	call	__printf_chk@PLT
	cmpl	$9999, %r14d
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
	leaq	.LC16(%rip), %r11
	jne	.L17
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L15
.L27:
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC18:
	.string	"_Z5nbodyPff"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z5nbodyPff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	dt
	.data
	.align 4
	.type	dt, @object
	.size	dt, 4
dt:
	.long	1028443341
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.align 4
.LC1:
	.long	1148846080
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	0
	.long	1080623104
	.align 8
.LC4:
	.long	0
	.long	-1071382528
	.align 8
.LC5:
	.long	0
	.long	1076101120
	.align 8
.LC7:
	.long	0
	.long	1078525952
	.align 8
.LC8:
	.long	0
	.long	1077149696
	.align 8
.LC9:
	.long	-1717986918
	.long	1069128089
	.align 8
.LC11:
	.long	0
	.long	1072693248
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//this is a lite version of a GPU accelerated N-body simulation. Has to be run on an NVIDIA machine with CUDA enabled.
//the interaction is just gravitation
//the simulation trajectory is to be visualized in VMD

#include <hip/hip_runtime.h>
#include <cstdio>
#include <cstdlib>
#include <cmath>

#define N 9999  // number of bodies
#define MASS 0  // row in array for mass
#define X_POS 1 // row in array for x position
#define Y_POS 2 // row in array for y position
#define Z_POS 3 // row in array for z position
#define X_VEL 4 // row in array for x velocity
#define Y_VEL 5 // row in array for y velocity
#define Z_VEL 6 // row in array for z velocity
#define G 10    // "gravitational constant" (not really)

float dt = 0.05; // time interval

// each thread computes new position of one body
__global__ void nbody(float *dev_body, float dt) {
int i=threadIdx.x + blockIdx.x* blockDim.x;
int j;
if(i<N) 
{    // force calculation
	float Fx_dir;
 	float Fy_dir;
	float Fz_dir;
    // initialize forces to zero
      Fx_dir = 0.0;
      Fy_dir = 0.0;
      Fz_dir = 0.0; 

 	for(j=0;j<N&&j!=i;j++)
 	{ 
// force on body x due to all other bodies 
	float x_diff, y_diff, z_diff;

	  x_diff = dev_body[i*7+X_POS] - dev_body [j*7+X_POS];  // difference in x direction
	  y_diff = dev_body[i*7+Y_POS] - dev_body [j*7+Y_POS];  // difference in y direction
	  z_diff = dev_body[i*7+Z_POS] - dev_body [j*7+Z_POS];  // difference in z direction

	  // calculate distance (r)
	  float rr = (x_diff * x_diff + y_diff * y_diff + z_diff * z_diff);
	  float r = sqrt(rr);

	  // force between bodies i and x
	  float F = G * dev_body[i*7+MASS] * dev_body[j*7+MASS] / r;

	  // if sufficiently far away, gravitation force
	  if (r > 10.0) {
	    Fx_dir += -F * x_diff / r;  // resolve forces in x and y directions
	    Fy_dir += -F * y_diff / r;  // and accumulate forces
	    Fz_dir += -F * z_diff / r;  // 
	  } 
	  else if(r<=10.0&&r>0.5){//avoid extremely large acceleration due to long time interval
	    // if too close, anti-gravitational force
	    Fx_dir -= -F * x_diff / r;  // resolve forces in x and y directions
	    Fy_dir -= -F * y_diff / r;  // and accumulate forces
	    Fz_dir -= -F * z_diff / r;  // 
	  }
	  }


    // update postions and velocity in array
        
	// update velocities
	dev_body[i*7+X_VEL] += Fx_dir * dt / dev_body[i*7+MASS];
	dev_body[i*7+Y_VEL] += Fy_dir * dt / dev_body[i*7+MASS];
	dev_body[i*7+Z_VEL] += Fz_dir * dt / dev_body[i*7+MASS];
	// update positions
	dev_body[i*7+X_POS] += dev_body[i*7+X_VEL] * dt;
	dev_body[i*7+Y_POS] += dev_body[i*7+Y_VEL] * dt;
	dev_body[i*7+Z_POS] += dev_body[i*7+Z_VEL] * dt;
	}
 
}


int main(int argc, char **argv) {
  float *body; // host data array of bodies
  float *dev_body; // device data array of bodies

  int tmax = 0;

  if (argc != 2) {
    fprintf(stderr, "Format: %s { number of timesteps }\n", argv[0]);
    exit (-1);
  }

  tmax = atoi(argv[1]);

  // allocate memory size for the body
  int bodysize = N * 7 * sizeof(float);    
  body = (float *)malloc(bodysize);
  hipMalloc((void**) &dev_body, bodysize);

  // assign each body a random position
  for (int i = 0; i < N; i++) {
    body[i * 7 + MASS] =  i%1001?1:1000;//create several heavy regions
    body[i * 7 + X_POS] = (i%2?0.0:200.0)+drand48() * 50.0;//define two galaxis
    body[i * 7 + Y_POS] = drand48() * 50.0;
    body[i * 7 + Z_POS] = drand48() * 20.0;//a plate-like distribution
    body[i * 7 + X_VEL] = drand48() * 0.1/body[i * 7 + MASS];
    body[i * 7 + Y_VEL] = (i%2?-10:10)+drand48() * 1.0/body[i * 7 + MASS];//angular momentum
    body[i * 7 + Z_VEL] = drand48() * 0.1/body[i * 7 + MASS];
  }

  // print out initial positions in PDB format

  printf("MODEL %8d\n", 0);
  for (int i = 0; i < N; i++) {
	printf("%s%7d  %s %s %s%4d     %7.0f %7.0f %7.0f  %4.2f  %4.3f\n",
           "ATOM", i+1, "CA ", "GLY", "A", i+1, body[i * 7 + X_POS], body[i * 7 + Y_POS], body[i * 7 + Z_POS], 1.00, 0.00);
  }
  printf("TER\nENDMDL\n");
 // copy nbody info over to GPU
    hipMemcpy(dev_body, body, bodysize, hipMemcpyHostToDevice);

  // step through each time step
  for (int t = 0; t < tmax; t++) {
 
    dim3 blockDim(1024);
    dim3 gridDim((int)ceil(N*1.0 / blockDim.x));

    // run nbody calculation
    nbody<<<gridDim, blockDim>>>(dev_body, dt);
    hipDeviceSynchronize();
if(!(t%1))//change output frequency by the mod factor. help to determine the robusticity quickly
{
    // copy nbody info back to CPU
    hipMemcpy(body, dev_body, bodysize, hipMemcpyDeviceToHost);

    // print out positions in PDB format
    printf("MODEL %8d\n", t+1);
    for (int i = 0; i < N; i++) {
	printf("%s%7d  %s %s %s%4d     %7.0f %7.0f %7.0f  %4.2f  %4.3f\n",
               "ATOM", i+1, "CA ", "GLY", "A", i+1, body[i * 7 + X_POS], body[i * 7 + Y_POS], body[i * 7 + Z_POS], 1.00, 0.00);
    }
    printf("TER\nENDMDL\n");
   }

  }  // end of time period loop
  free(body);
  hipFree(body);
}

	.text
	.file	"nbody.hip"
	.globl	_Z20__device_stub__nbodyPff     # -- Begin function _Z20__device_stub__nbodyPff
	.type	_Z20__device_stub__nbodyPff,@function
_Z20__device_stub__nbodyPff:            # @_Z20__device_stub__nbodyPff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5nbodyPff, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z20__device_stub__nbodyPff, .Lfunc_end0-_Z20__device_stub__nbodyPff
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3f800000                      # float 1
	.long	0x447a0000                      # float 1000
.LCPI1_1:
	.quad	0x4069000000000000              # double 200
.LCPI1_2:
	.quad	0x4049000000000000              # double 50
.LCPI1_3:
	.quad	0x4034000000000000              # double 20
.LCPI1_4:
	.quad	0x3fb999999999999a              # double 0.10000000000000001
.LCPI1_6:
	.quad	0x3ff0000000000000              # double 1
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	3, 0x0
.LCPI1_5:
	.quad	0xc024000000000000              # double -10
	.quad	0x4024000000000000              # double 10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jne	.LBB1_15
# %bb.1:
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	movl	$279972, %edi                   # imm = 0x445A4
	callq	malloc
	movq	%rax, %rbx
	leaq	24(%rsp), %rdi
	movl	$279972, %esi                   # imm = 0x445A4
	callq	hipMalloc
	movq	%rbx, %r14
	addq	$24, %r14
	xorl	%r15d, %r15d
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	movzwl	%r15w, %eax
	imull	$33521, %eax, %eax              # imm = 0x82F1
	shrl	$25, %eax
	imull	$-1001, %eax, %eax              # imm = 0xFC17
	xorl	%ecx, %ecx
	addw	%r15w, %ax
	sete	%cl
	movss	.LCPI1_0(,%rcx,4), %xmm0        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	movss	%xmm0, -24(%r14)
	xorl	%r12d, %r12d
	movsd	.LCPI1_1(%rip), %xmm0           # xmm0 = mem[0],zero
	testb	$1, %r15b
	sete	%r13b
	je	.LBB1_4
# %bb.3:                                #   in Loop: Header=BB1_2 Depth=1
	xorpd	%xmm0, %xmm0
.LBB1_4:                                #   in Loop: Header=BB1_2 Depth=1
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	callq	drand48
	movsd	.LCPI1_2(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm1, %xmm0
	addsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, -20(%r14)
	callq	drand48
	mulsd	.LCPI1_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, -16(%r14)
	callq	drand48
	mulsd	.LCPI1_3(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, -12(%r14)
	callq	drand48
	movsd	.LCPI1_4(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	16(%rsp), %xmm1                 # 4-byte Folded Reload
	movsd	%xmm1, 16(%rsp)                 # 8-byte Spill
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, -8(%r14)
	movb	%r13b, %r12b
	callq	drand48
	divsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	addsd	.LCPI1_5(,%r12,8), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, -4(%r14)
	callq	drand48
	mulsd	.LCPI1_4(%rip), %xmm0
	divsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r14)
	incq	%r15
	addq	$28, %r14
	cmpq	$9999, %r15                     # imm = 0x270F
	jne	.LBB1_2
# %bb.5:
	movl	$.L.str.1, %edi
	xorl	%esi, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$12, %r15d
	movl	$1, %r14d
.LBB1_6:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	-8(%rbx,%r15), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	-4(%rbx,%r15), %xmm1
	xorps	%xmm2, %xmm2
	cvtss2sd	(%rbx,%r15), %xmm2
	movl	%r14d, (%rsp)
	movl	$.L.str.2, %edi
	movl	$.L.str.3, %esi
	movl	$.L.str.4, %ecx
	movl	$.L.str.5, %r8d
	movl	$.L.str.6, %r9d
	xorps	%xmm4, %xmm4
	movl	%r14d, %edx
	movsd	.LCPI1_6(%rip), %xmm3           # xmm3 = mem[0],zero
	movb	$5, %al
	callq	printf
	addq	$28, %r15
	incl	%r14d
	cmpq	$279984, %r15                   # imm = 0x445B0
	jne	.LBB1_6
# %bb.7:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	24(%rsp), %rdi
	movl	$279972, %edx                   # imm = 0x445A4
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	cmpl	$0, 12(%rsp)                    # 4-byte Folded Reload
	jle	.LBB1_14
# %bb.8:                                # %.lr.ph.preheader
	movabsq	$4294967306, %r14               # imm = 0x10000000A
	leaq	1014(%r14), %r15
	xorl	%r12d, %r12d
.LBB1_9:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_12 Depth 2
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.10:                               #   in Loop: Header=BB1_9 Depth=1
	movq	24(%rsp), %rdi
	movss	dt(%rip), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	callq	_Z20__device_stub__nbodyPff
.LBB1_11:                               #   in Loop: Header=BB1_9 Depth=1
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rsi
	movl	$279972, %edx                   # imm = 0x445A4
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	incl	%r12d
	movl	$.L.str.1, %edi
	movl	%r12d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$12, %ebp
	movl	$1, %r13d
.LBB1_12:                               #   Parent Loop BB1_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	-8(%rbx,%rbp), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	-4(%rbx,%rbp), %xmm1
	xorps	%xmm2, %xmm2
	cvtss2sd	(%rbx,%rbp), %xmm2
	movl	%r13d, (%rsp)
	movl	$.L.str.2, %edi
	movl	$.L.str.3, %esi
	movl	$.L.str.4, %ecx
	movl	$.L.str.5, %r8d
	movl	$.L.str.6, %r9d
	xorps	%xmm4, %xmm4
	movl	%r13d, %edx
	movsd	.LCPI1_6(%rip), %xmm3           # xmm3 = mem[0],zero
	movb	$5, %al
	callq	printf
	addq	$28, %rbp
	incl	%r13d
	cmpq	$279984, %rbp                   # imm = 0x445B0
	jne	.LBB1_12
# %bb.13:                               #   in Loop: Header=BB1_9 Depth=1
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	cmpl	12(%rsp), %r12d                 # 4-byte Folded Reload
	jne	.LBB1_9
.LBB1_14:                               # %._crit_edge
	movq	%rbx, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_15:
	.cfi_def_cfa_offset 96
	movq	stderr(%rip), %rdi
	movq	(%rsi), %rdx
	movl	$.L.str, %esi
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5nbodyPff, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	dt,@object                      # @dt
	.data
	.globl	dt
	.p2align	2, 0x0
dt:
	.long	0x3d4ccccd                      # float 0.0500000007
	.size	dt, 4

	.type	_Z5nbodyPff,@object             # @_Z5nbodyPff
	.section	.rodata,"a",@progbits
	.globl	_Z5nbodyPff
	.p2align	3, 0x0
_Z5nbodyPff:
	.quad	_Z20__device_stub__nbodyPff
	.size	_Z5nbodyPff, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Format: %s { number of timesteps }\n"
	.size	.L.str, 36

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"MODEL %8d\n"
	.size	.L.str.1, 11

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%s%7d  %s %s %s%4d     %7.0f %7.0f %7.0f  %4.2f  %4.3f\n"
	.size	.L.str.2, 56

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"ATOM"
	.size	.L.str.3, 5

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"CA "
	.size	.L.str.4, 4

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"GLY"
	.size	.L.str.5, 4

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"A"
	.size	.L.str.6, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5nbodyPff"
	.size	.L__unnamed_1, 12

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.1,@object                 # @str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.1:
	.asciz	"TER\nENDMDL"
	.size	.Lstr.1, 11

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__nbodyPff
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z5nbodyPff
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5nbodyPff             ; -- Begin function _Z5nbodyPff
	.globl	_Z5nbodyPff
	.p2align	8
	.type	_Z5nbodyPff,@function
_Z5nbodyPff:                            ; @_Z5nbodyPff
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x270f, v6
	s_cbranch_execz .LBB0_12
; %bb.1:                                ; %.preheader
	s_load_b64 s[4:5], s[0:1], 0x0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v7, 0
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v0, 0
	s_mov_b32 s7, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_ne_u32_e32 0, v6
	s_cbranch_execz .LBB0_11
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v4, v6, 7
	v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v6, -1, v6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s8, s4, 8
	s_addc_u32 s9, s5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_min_u32_e32 v6, 0x270e, v6
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, 1, v6
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b128 v[0:3], v[0:1], off
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v8, 0 :: v_dual_mul_f32 v9, 0x41200000, v0
	v_mov_b32_e32 v0, 0
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_add_u32 s2, s8, -8
	s_addc_u32 s3, s9, -1
	s_load_b128 s[12:15], s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_subrev_f32 v12, s14, v2 :: v_dual_subrev_f32 v11, s15, v3
	v_subrev_f32_e32 v14, s13, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v12, v12
	v_fmac_f32_e32 v10, v14, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v11
	v_mul_f32_e32 v13, 0x4f800000, v10
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v10, v13, vcc_lo
	v_sqrt_f32_e32 v13, v10
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v15, -1, v13
	v_add_nc_u32_e32 v16, 1, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v17, -v15, v13, v10
	v_fma_f32 v18, -v16, v13, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v17
	v_cndmask_b32_e64 v13, v13, v15, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v18
	v_cndmask_b32_e64 v13, v13, v16, s2
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, 0x37800000, v13
	v_cndmask_b32_e32 v13, v13, v15, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v10, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v15, s12, v9 :: v_dual_cndmask_b32 v10, v13, v10
	v_div_scale_f32 v13, null, v10, v10, v15
	v_div_scale_f32 v18, vcc_lo, v15, v10, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v16, v13
	s_waitcnt_depctr 0xfff
	v_fma_f32 v17, -v13, v16, 1.0
	v_fmac_f32_e32 v16, v17, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v18, v16
	v_fma_f32 v19, -v13, v17, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v17, v19, v16
	v_fma_f32 v13, -v13, v17, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v13, v13, v16, v17
	v_div_fixup_f32 v13, v13, v10, v15
	v_cmpx_nlt_f32_e32 0x41200000, v10
	s_xor_b32 s10, exec_lo, s2
	s_cbranch_execz .LBB0_7
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_cmp_ge_f32_e32 vcc_lo, 0x41200000, v10
	v_cmp_lt_f32_e64 s2, 0.5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s11, s2
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	v_mul_f32_e32 v11, v11, v13
	v_mul_f32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v16, null, v10, v10, v11
	v_div_scale_f32 v15, null, v10, v10, v12
	v_div_scale_f32 v21, s2, v12, v10, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v19, v16
	v_rcp_f32_e32 v18, v15
	v_div_scale_f32 v25, s3, v11, v10, v11
	s_waitcnt_depctr 0xfff
	v_fma_f32 v24, -v16, v19, 1.0
	v_mul_f32_e32 v14, v14, v13
	v_fma_f32 v23, -v15, v18, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v19, v24, v19
	v_div_scale_f32 v13, null, v10, v10, v14
	v_div_scale_f32 v20, vcc_lo, v14, v10, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v24, v25, v19
	v_rcp_f32_e32 v17, v13
	v_fmac_f32_e32 v18, v23, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v28, -v16, v24, v25
	v_dual_mul_f32 v23, v21, v18 :: v_dual_fmac_f32 v24, v28, v19
	s_waitcnt_depctr 0xfff
	v_fma_f32 v22, -v13, v17, 1.0
	v_fma_f32 v27, -v15, v23, v21
	v_fma_f32 v16, -v16, v24, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v17, v22, v17
	v_dual_fmac_f32 v23, v27, v18 :: v_dual_mul_f32 v22, v20, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v15, -v15, v23, v21
	v_fma_f32 v26, -v13, v22, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v22, v26, v17
	v_fma_f32 v13, -v13, v22, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v13, v13, v17, v22
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f32 v15, v15, v18, v23
	s_mov_b32 vcc_lo, s3
	v_div_fixup_f32 v13, v13, v10, v14
	v_div_fmas_f32 v16, v16, v19, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v12, v15, v10, v12
	v_add_f32_e32 v8, v8, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v10, v16, v10, v11
	v_dual_add_f32 v7, v7, v12 :: v_dual_add_f32 v0, v0, v10
.LBB0_6:                                ; %Flow
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
                                        ; implicit-def: $vgpr14
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr10
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr11
.LBB0_7:                                ; %Flow112
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_and_not1_saveexec_b32 s10, s10
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_3 Depth=1
	v_mul_f32_e32 v11, v11, v13
	v_mul_f32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v16, null, v10, v10, v11
	v_div_scale_f32 v15, null, v10, v10, v12
	v_div_scale_f32 v21, s2, v12, v10, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v19, v16
	v_rcp_f32_e32 v18, v15
	v_div_scale_f32 v25, s3, v11, v10, v11
	s_waitcnt_depctr 0xfff
	v_fma_f32 v24, -v16, v19, 1.0
	v_mul_f32_e32 v14, v14, v13
	v_fma_f32 v23, -v15, v18, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v19, v24, v19
	v_div_scale_f32 v13, null, v10, v10, v14
	v_div_scale_f32 v20, vcc_lo, v14, v10, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v24, v25, v19
	v_rcp_f32_e32 v17, v13
	v_fmac_f32_e32 v18, v23, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v28, -v16, v24, v25
	v_dual_mul_f32 v23, v21, v18 :: v_dual_fmac_f32 v24, v28, v19
	s_waitcnt_depctr 0xfff
	v_fma_f32 v22, -v13, v17, 1.0
	v_fma_f32 v27, -v15, v23, v21
	v_fma_f32 v16, -v16, v24, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v17, v22, v17
	v_dual_fmac_f32 v23, v27, v18 :: v_dual_mul_f32 v22, v20, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v15, -v15, v23, v21
	v_fma_f32 v26, -v13, v22, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v22, v26, v17
	v_fma_f32 v13, -v13, v22, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v13, v13, v17, v22
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f32 v15, v15, v18, v23
	s_mov_b32 vcc_lo, s3
	v_div_fixup_f32 v13, v13, v10, v14
	v_div_fmas_f32 v16, v16, v19, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v12, v15, v10, v12
	v_sub_f32_e32 v8, v8, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v10, v16, v10, v11
	v_dual_sub_f32 v7, v7, v12 :: v_dual_sub_f32 v0, v0, v10
.LBB0_9:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	v_add_nc_u32_e32 v6, -1, v6
	s_add_u32 s8, s8, 28
	s_addc_u32 s9, s9, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v6
	s_or_b32 s7, vcc_lo, s7
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_3
; %bb.10:                               ; %Flow113
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_11:                               ; %Flow114
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_lshlrev_b64 v[1:2], 2, v[4:5]
	s_load_b32 s2, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v12, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v2, vcc_lo
	s_clause 0x1
	global_load_b128 v[1:4], v[12:13], off
	global_load_b96 v[9:11], v[12:13], off offset:16
	v_dual_mul_f32 v5, s2, v8 :: v_dual_mul_f32 v6, s2, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v7, null, v1, v1, v5
	v_div_scale_f32 v8, null, v1, v1, v6
	v_div_scale_f32 v18, vcc_lo, v5, v1, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v15, v7
	v_rcp_f32_e32 v16, v8
	v_div_scale_f32 v19, s0, v6, v1, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v20, -v7, v15, 1.0
	v_mul_f32_e32 v0, s2, v0
	v_fma_f32 v21, -v8, v16, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v15, v20, v15
	v_div_scale_f32 v14, null, v1, v1, v0
	v_div_scale_f32 v23, s1, v0, v1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v17, v14
	s_waitcnt_depctr 0xfff
	v_fma_f32 v22, -v14, v17, 1.0
	v_dual_fmac_f32 v16, v21, v16 :: v_dual_fmac_f32 v17, v22, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v20, v18, v15 :: v_dual_mul_f32 v21, v19, v16
	v_fma_f32 v24, -v7, v20, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v25, -v8, v21, v19
	v_mul_f32_e32 v22, v23, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v20, v24, v15 :: v_dual_fmac_f32 v21, v25, v16
	v_fma_f32 v26, -v14, v22, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v7, -v7, v20, v18
	v_fma_f32 v8, -v8, v21, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v22, v26, v17
	v_div_fmas_f32 v7, v7, v15, v20
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f32 v14, -v14, v22, v23
	v_div_fmas_f32 v8, v8, v16, v21
	s_mov_b32 vcc_lo, s1
	v_div_fixup_f32 v5, v7, v1, v5
	v_div_fmas_f32 v14, v14, v17, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v6, v8, v1, v6
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v5, v9, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v0, v14, v1, v0
	v_fma_f32 v2, s2, v5, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v1, v0, v11 :: v_dual_add_f32 v0, v6, v10
	v_fmac_f32_e32 v4, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f32 v3, s2, v0, v3
	s_clause 0x1
	global_store_b64 v[12:13], v[0:1], off offset:20
	global_store_b128 v[12:13], v[2:5], off offset:4
.LBB0_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5nbodyPff
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 29
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5nbodyPff, .Lfunc_end0-_Z5nbodyPff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1620
; NumSgprs: 18
; NumVgprs: 29
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 29
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5nbodyPff
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z5nbodyPff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     29
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
