 //Complete 3SAT solver using CUDA

// Parallel Processing course assignment

// Author : Gourab Saha
//Contact : 9051110501

// To compile : nvcc sat.cu
 
 #include<stdio.h>
 #include<cuda.h>
 #include<math.h>
 #include <stdlib.h>
 #include <set>
 #include <iostream>
 #include <map>
 #include <time.h>
  
  
  
  
  
  
 #define NO_OF_VARIABLE 25
 #define NO_OF_CLAUSE 20
 #define CLAUSE_SIZE 3
 #define MAX_THREAD_PER_BLOCK 512
  
  int ind;
  
 using namespace std;
 
 
  void generate_random_cnf( int *,int);
  void  reset (int *status,int *new_status);
  void find_sequence(int *sequence,int temp);
  int find_status(int start,int end,int* sat_cnf2,int *sequence,int *status,int *new_status);
  int find_one(int *final_result,int size);
   void  print_details(int i,int j,int k,int index,int *sat_cnf2);
  
  
  
  
  
 __global__ void sat_Kernel1 (int *sat_cnf2_device,int *result_h1_device,int iteration)
 {
 
	 int sequence[5];
	 int temp,i,j,new1,val,start,end;
	 int status[25];
	 
	 unsigned int index = blockIdx.x * blockDim.x + threadIdx.x;
	 result_h1_device[index]=1;
	 
	 temp=index;
	 
	 for(i=4;i>=0;i--)
	 {
		 sequence[i]=temp%3;
		 temp=temp/3;
	 }
	 
	 for(i=0;i<25;i++)
	 {
		 status[i]=2;
	 }
	 
	 start=iteration *5;
	 end=start+4;
	 for(i=start,j=0;i<end;i++,j++)
	 {
		 new1=sat_cnf2_device[i*6+sequence[j]*2];
		 val=sat_cnf2_device[i*6+sequence[j]*2+1];
		 if(status[new1]+val==1)
		 {
			 result_h1_device[index]=0;
			 break;
		 }
		 else
		 {
			 status[new1]=val;
		 }
		 
	 }
	 
	 
	 __syncthreads();
 }
	 
  
  
   
 __global__ void sat_Kernel2 (int * sat_cnf2_device,int *result_h1_device,int *status_device,int *final_result_device)
 {
  
  
  
	 int sequence[5];
	 int temp,i,j,new1,val,start,end;
	 int status[25];
	 int status2[25];
	 int flag;
	 
	 unsigned int index = blockIdx.x * blockDim.x + threadIdx.x;
	 temp= result_h1_device[index];
	 
	 
   
	 
	 for(i=4;i>=0;i--)
	 {
		 sequence[i]=temp%3;
		 temp=temp/3;
	 }
	 
	 for(i=0;i<25;i++)
	 {
		 status[i]=status_device[i];
		 status2[i]=2;
	 }
	 
	 
	 
	 start=15;
	 end=19;
	 for(i=start,j=0;i<end;i++,j++)
	 {
		 new1=sat_cnf2_device[i*6+sequence[j]*2];
		 val=sat_cnf2_device[i*6+sequence[j]*2+1];
		 status2[new1]=val;
		
	  }
	  
	  flag=1;
	  for(i=0;i<25;i++)
	  {
	   if((status[i]+status2[i])==1)
	   {
	      flag=0;
	      break;
	   }
	  
	  }
	  
	  final_result_device[index]=flag;
	 
	 __syncthreads();
  
     
  
 }
 
 
 
 
 
 
 
 int main(void)
 {
   
   
   int *sat_cnf,*sat_cnf2,*result_h1;
   int size,size2,no_of_iteration;
   int i,j,k,z1,*result_h1_device,*status_device;
   
   
   size_t array_size,block_size,num_blocks; 
   int *sat_cnf2_device,*final_result_device;
   int count[4];
   int status[25];
   int *final_result;
   int p1,p2,p3,flag,final_flag;
   int sequence[5],new_status_h[25],new_status_i[25],new_status_j[25],new_status_k[25];
 
  
   
   
   
   
   
   size=NO_OF_CLAUSE *NO_OF_VARIABLE;
   size2=NO_OF_CLAUSE * CLAUSE_SIZE * 2 ;
   sat_cnf=(int*) malloc(size * sizeof(int));
   sat_cnf2=(int*) malloc(size2 * sizeof(int));
   
   
 
   
   
   
   
   
   generate_random_cnf( sat_cnf,size);
   
  printf("\nRandom generated boolean expression with 25 variables and 20 clasues(with 3 literals) in Conjunctive normal form\n\n");
   
    for(i=0;i<NO_OF_CLAUSE;i++)
   {
    
	 printf("(");
	 z1=0;
	 for(j=0;j<NO_OF_VARIABLE;j++)
	 {
		 if(sat_cnf[i*NO_OF_VARIABLE+j]==1)
		 {
				  printf("x%d",j);
				 sat_cnf2[i*CLAUSE_SIZE * 2+2*z1]=j;
				 sat_cnf2[i*CLAUSE_SIZE * 2+2*z1+1]=1;
				 
				 z1++;
			    
		 }
		 if(sat_cnf[i*NO_OF_VARIABLE+j]==0)
		 {
				  printf("~x%d",j);
				 sat_cnf2[i*CLAUSE_SIZE * 2+2*z1]=j;
				 sat_cnf2[i*CLAUSE_SIZE * 2+2*z1+1]=0;
				 
				 z1++;
		 }
		 if(z1<CLAUSE_SIZE && sat_cnf[i*NO_OF_VARIABLE+j]!=2)
			  printf("+");
		 
		 
	 }
    
	 printf(")");
	 if(i<NO_OF_CLAUSE-1)
		  printf(" * ");
   }
		 
   
   
   
   
   array_size=NO_OF_CLAUSE * CLAUSE_SIZE * 2 * sizeof(int) ;
   cudaMalloc((void **) &sat_cnf2_device,array_size);
   cudaMemcpy(sat_cnf2_device,sat_cnf2,array_size,cudaMemcpyHostToDevice);
   
   
    block_size=243;
    num_blocks=1;
    no_of_iteration=4;
    
     size= no_of_iteration*243;
     result_h1=(int*) malloc(size * sizeof(int));
     
     array_size=243*sizeof(int);
     cudaMalloc((void **) &result_h1_device,array_size);
     
    array_size=no_of_iteration*243*sizeof(int);
    cudaMalloc((void **) &result_h1_device,array_size);
    
     
     
     for(i=0;i<no_of_iteration;i++)
     {
	 sat_Kernel1<<<1,block_size>>>(sat_cnf2_device,result_h1_device,i);
	 
	 array_size=243*sizeof(int);
	 cudaMemcpy(&result_h1[i*243],result_h1_device,array_size,cudaMemcpyDeviceToHost);
     }
	 
	 
	 
     for(i=0;i<no_of_iteration;i++)
   {
      count[i]=0;
      for(j=0;j<243;j++)
      { 	
	   if(result_h1[i*243+j]==1)
	   {
	     result_h1[i*243+count[i]]=j;
	     count[i]++;
	   }
	 
      }	
    }
    
    
    
 
    
    final_result=(int *)malloc(count[3]*sizeof(int));
    
    block_size=count[3];
    num_blocks=1;
    
     dim3 dimBlock(block_size);
     dim3 dimGrid(num_blocks);
    
    
    array_size=25*sizeof(int);
    cudaMalloc((void **) &status_device,array_size);
   
    
     array_size=count[3]*sizeof(int);
     cudaMalloc((void **) &final_result_device,array_size);
     
      array_size=243*sizeof(int);
      cudaMemcpy(result_h1_device,&result_h1[729],array_size,cudaMemcpyHostToDevice);
 
     
 
    final_flag=0;
    
     for(i=0;i<25;i++)
    {
      new_status_h[i]=2;
    }
    for(i=0;i<count[0];i++)
    {
       if(final_flag==1)
       {
	   i--;
	   break;
	  
       }
       reset(status,new_status_h);
       p1=result_h1[i];
       find_sequence(sequence,p1);
       flag=find_status(0,4,sat_cnf2,sequence,status,new_status_i);
       if(flag==0)
	continue;
       
      for(j=0;j<count[1];j++)
      {
	if(final_flag==1)
	{
	  j--;
	   break;
	}
	reset(status,new_status_i);
	p2=result_h1[243+j];
	find_sequence(sequence,p2);
	flag=find_status(5,9,sat_cnf2,sequence,status,new_status_j);
	if(flag==0)
	 continue;
	
       for(k=0;k<count[2];k++)
       {
	  reset(status,new_status_j);
	  p3=result_h1[2*243+k];
	 find_sequence(sequence,p3);
	 flag=find_status(10,14,sat_cnf2,sequence,status,new_status_k);
	 if(flag==0)
	  continue;
	 else
	 {
	  reset(status,new_status_k);
	  array_size=25*sizeof(int);
	  cudaMemcpy(status_device,status,array_size,cudaMemcpyHostToDevice);
	  
	  
	  sat_Kernel2<<<dimGrid,dimBlock>>>(sat_cnf2,result_h1_device,status_device,final_result_device);
	  
	  array_size=count[3]*sizeof(int);
	 cudaMemcpy(final_result,final_result_device,array_size,cudaMemcpyDeviceToHost);
	  printf("\n\n");
	 
	  final_flag=find_one(final_result,count[3]);
	  if(final_flag==1)
	   break;
	 }
       }
      }
    }
    
    
   
    
    
    printf("\n\n");
    
    if(final_flag==1)
    {
      printf(" \nThe CNF is satisfiable with the following assignment \n\n");
      print_details(i,j,k,ind,sat_cnf2);
    }
    
    else
    {
       printf(" \nThe CNF is not satisfiable !! \n\n");
    }
    
    
    
    
   
   /* 
      for(i=0;i<no_of_iteration;i++)
   {
     printf("\nno of 1s :%d\n",count[i]);
      for(j=0;j<243;j++)
      { 	
	   printf("%d ",result_h1[i*243+j]);
	    
	 
      }
      printf("\n");
    }
    
	  printf("\n");
	  
	  
	  
	  
	  
	  
	  
	  
	  
	  
      
      for(i=0;i<NO_OF_CLAUSE;i++)
   {
		 
		 for(j=0;j<6;j=j+2)
	 {
		 printf("x%d",sat_cnf2[i*6+j]);
		 if(sat_cnf2[i*6+j+1]==0)
			 printf("'");
		 printf("+");
		 }
		 printf("\n");
   }
     
   */
   
   
   cudaFree(sat_cnf2_device);
   cudaFree(final_result_device);
   cudaFree(result_h1_device);
   cudaFree(status_device);
   
   free(sat_cnf);
   free(sat_cnf2);
   free(result_h1);
   free(final_result);
   
     return 1;
   
   
   }
   
   
   
   
 void generate_random_cnf( int *sat_cnf,int size)
   {
		 int i,j,flag,k;
		 int a[CLAUSE_SIZE];
		 
		 
		 for(i=0;i<size;i++)
		 {
			 sat_cnf[i]=2;
			 
		 }
		 
		 for(i=0;i<NO_OF_CLAUSE;i++)
		 {
			 for(j=0;j<CLAUSE_SIZE;j++)
			 {
				 flag=1;
				 while(flag)
				 {
						 a[j]=rand()%NO_OF_VARIABLE;
						 flag=0;
					     for(k=j-1;k>=0;k--)
					     {
						 if(a[j]==a[k])
						 {
							 flag=1;
							 break;
						 }
					     }
			    }
					 
				 if(rand()%2==0)
					 sat_cnf[i*NO_OF_VARIABLE+a[j]]=0;
				 else
					 sat_cnf[i*NO_OF_VARIABLE+a[j]]=1;
			 }
		 }
			 
   }
				 
				 
   
   
   
  void  reset (int *status ,int *new_status)
   {
   
    int i;
     for(i=0;i<25;i++)
	 {
		 status[i]=new_status[i];
	 }
	 
   }
		 
  void find_sequence(int *sequence,int temp)
  {
    int i;
    for(i=4;i>=0;i--)
	 {
		 sequence[i]=temp%3;
		 temp=temp/3;
	 }
  }
  
  
  
  
  int find_status(int start,int end,int* sat_cnf2,int *sequence,int *status,int *new_status)
  {
   int i,j,new1,val;
   
   for(i=0;i<25;i++)
    new_status[i]=status[i];
   for(i=start,j=0;i<end;i++,j++)
   {
	new1=sat_cnf2[i*6+sequence[j]*2];
	val=sat_cnf2[i*6+sequence[j]*2+1];
	if(new_status[new1]+val==1)
	{
	   return 0;
	 }
	 else
	 {
	     new_status[new1]=val;
	  }
		 
   }
   return 1;
   
  }
		 
  
  
  int find_one(int *final_result,int size)
  {
    int i,flag=0;
    for(i=0;i<size;i++)
    {
     if(final_result[i]==1)
     {
      flag=1;
      ind=i;
      break;
     }
    }
    return flag;
  }
 
 
 
 void  print_details(int i,int j,int k,int index,int *sat_cnf2)
 {
   int sequence[5];
    int temp,x,new1,y,val;
    int status[25];
    
    for(x=0;x<25;x++)
     status[x]=2;
  
   
    temp=i;
   
    for(x=4;x>=0;x--)
   {
		 sequence[x]=temp%3;
		 temp=temp/3;
    }
    
    for(x=0,y=0;x<4;x++,y++)
    {
	  new1=sat_cnf2[x*6+sequence[y]*2];
	   val=sat_cnf2[x*6+sequence[y]*2+1];
	   status[new1]=val;
		
     }
     
     
     
     temp=j;
   
    for(x=4;x>=0;x--)
   {
		 sequence[x]=temp%3;
		 temp=temp/3;
    }
    
    for(x=5,y=0;x<9;x++,y++)
    {
	  new1=sat_cnf2[x*6+sequence[y]*2];
	   val=sat_cnf2[x*6+sequence[y]*2+1];
	   status[new1]=val;
		
     }
  
  
   temp=k;
   
    for(x=4;x>=0;x--)
   {
		 sequence[x]=temp%3;
		 temp=temp/3;
    }
    
    for(x=10,y=0;x<14;x++,y++)
    {
	  new1=sat_cnf2[x*6+sequence[y]*2];
	   val=sat_cnf2[x*6+sequence[y]*2+1];
	   status[new1]=val;
		
     }
     
     
     
     
     temp=i;
   
    for(x=4;x>=0;x--)
   {
		 sequence[x]=temp%3;
		 temp=temp/3;
    }
    
    for(x=15,y=0;x<19;x++,y++)
    {
	  new1=sat_cnf2[x*6+sequence[y]*2];
	   val=sat_cnf2[x*6+sequence[y]*2+1];
	   status[new1]=val;
		
     }
     
     
       
    for(x=0;x<25;x++)
    {
     if(status[x]==2)
      printf("\nx%d : Dont Care(0 or 1)",x);
     else
     printf("\nx%d : %d",x,status[x]);
    }
    
    printf("\n\n\n");
  
 }
   
   
   
   
   
   
   
   

	.file	"tmpxft_002a94f0_00000000-6_sat.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4192:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4192:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z19generate_random_cnfPii
	.type	_Z19generate_random_cnfPii, @function
_Z19generate_random_cnfPii:
.LFB4184:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
.L3:
	cmpl	%eax, %esi
	jle	.L16
	movl	$2, (%r12,%rax,4)
	incq	%rax
	jmp	.L3
.L16:
	xorl	%ebp, %ebp
	movl	$25, %r13d
.L5:
	orq	$-1, %r14
.L7:
	call	rand@PLT
	cltd
	idivl	%r13d
	movq	%r14, %rax
	movl	%edx, %ebx
	leaq	12(%rsp), %rdx
	movl	%ebx, 16(%rsp,%r14,4)
.L6:
	cmpl	$-1, %eax
	je	.L17
	decq	%rax
	cmpl	4(%rdx,%rax,4), %ebx
	jne	.L6
	jmp	.L7
.L17:
	call	rand@PLT
	addl	%ebp, %ebx
	incq	%r14
	movslq	%ebx, %rbx
	andl	$1, %eax
	movl	%eax, (%r12,%rbx,4)
	cmpq	$2, %r14
	jne	.L7
	addl	$25, %ebp
	cmpl	$500, %ebp
	jne	.L5
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4184:
	.size	_Z19generate_random_cnfPii, .-_Z19generate_random_cnfPii
	.globl	_Z5resetPiS_
	.type	_Z5resetPiS_, @function
_Z5resetPiS_:
.LFB4185:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L19:
	movl	(%rsi,%rax), %edx
	movl	%edx, (%rdi,%rax)
	addq	$4, %rax
	cmpq	$100, %rax
	jne	.L19
	ret
	.cfi_endproc
.LFE4185:
	.size	_Z5resetPiS_, .-_Z5resetPiS_
	.globl	_Z13find_sequencePii
	.type	_Z13find_sequencePii, @function
_Z13find_sequencePii:
.LFB4186:
	.cfi_startproc
	endbr64
	movl	%esi, %eax
	movl	$4, %ecx
	movl	$3, %esi
.L22:
	cltd
	idivl	%esi
	movl	%edx, (%rdi,%rcx,4)
	subq	$1, %rcx
	jnb	.L22
	ret
	.cfi_endproc
.LFE4186:
	.size	_Z13find_sequencePii, .-_Z13find_sequencePii
	.globl	_Z11find_statusiiPiS_S_S_
	.type	_Z11find_statusiiPiS_S_S_, @function
_Z11find_statusiiPiS_S_S_:
.LFB4187:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L25:
	movl	(%r8,%rax), %r10d
	movl	%r10d, (%r9,%rax)
	addq	$4, %rax
	cmpq	$100, %rax
	jne	.L25
.L26:
	cmpl	%esi, %edi
	jge	.L31
	leal	(%rdi,%rdi,2), %eax
	addl	(%rcx), %eax
	addq	$4, %rcx
	addl	%eax, %eax
	cltq
	movl	4(%rdx,%rax,4), %r8d
	movslq	(%rdx,%rax,4), %rax
	leaq	(%r9,%rax,4), %rax
	movl	(%rax), %r10d
	addl	%r8d, %r10d
	decl	%r10d
	je	.L29
	movl	%r8d, (%rax)
	incl	%edi
	jmp	.L26
.L31:
	movl	$1, %eax
	ret
.L29:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE4187:
	.size	_Z11find_statusiiPiS_S_S_, .-_Z11find_statusiiPiS_S_S_
	.globl	_Z8find_onePii
	.type	_Z8find_onePii, @function
_Z8find_onePii:
.LFB4188:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L33:
	cmpl	%eax, %esi
	jle	.L37
	leaq	1(%rax), %rcx
	movl	-4(%rdi,%rcx,4), %edx
	cmpl	$1, %edx
	jne	.L36
	movl	%eax, ind(%rip)
	jmp	.L32
.L36:
	movq	%rcx, %rax
	jmp	.L33
.L37:
	xorl	%edx, %edx
.L32:
	movl	%edx, %eax
	ret
	.cfi_endproc
.LFE4188:
	.size	_Z8find_onePii, .-_Z8find_onePii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\nx%d : Dont Care(0 or 1)"
.LC1:
	.string	"\nx%d : %d"
.LC2:
	.string	"\n\n\n"
	.text
	.globl	_Z13print_detailsiiiiPi
	.type	_Z13print_detailsiiiiPi, @function
_Z13print_detailsiiiiPi:
.LFB4189:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%edi, %ecx
	movl	%esi, %r9d
	movl	%edx, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	addq	$-128, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	20(%rsp), %rbx
.L39:
	movl	$2, (%rbx,%rax,4)
	incq	%rax
	cmpq	$25, %rax
	jne	.L39
	movl	%ecx, %eax
	movl	$4, %r10d
	movq	%rsp, %rsi
	movl	$3, %r11d
.L40:
	cltd
	idivl	%r11d
	movl	%edx, (%rsi,%r10,4)
	subq	$1, %r10
	jnb	.L40
	movq	%rsi, %r10
	movq	%rsi, %r11
	xorl	%edx, %edx
.L41:
	movl	(%r11), %eax
	addq	$4, %r11
	addl	%edx, %eax
	addl	$3, %edx
	addl	%eax, %eax
	cltq
	movslq	(%r8,%rax,4), %rbp
	movl	4(%r8,%rax,4), %eax
	movl	%eax, 20(%rsp,%rbp,4)
	cmpl	$12, %edx
	jne	.L41
	movl	$4, %r11d
	movl	$3, %ebp
.L42:
	movl	%r9d, %eax
	cltd
	idivl	%ebp
	movl	%edx, (%rsi,%r11,4)
	movl	%eax, %r9d
	subq	$1, %r11
	jnb	.L42
	movq	%rsi, %r9
	movl	$15, %edx
.L43:
	movl	(%r9), %eax
	addq	$4, %r9
	addl	%edx, %eax
	addl	$3, %edx
	addl	%eax, %eax
	cltq
	movslq	(%r8,%rax,4), %r11
	movl	4(%r8,%rax,4), %eax
	movl	%eax, 20(%rsp,%r11,4)
	cmpl	$27, %edx
	jne	.L43
	movl	$4, %r9d
	movl	$3, %r11d
.L44:
	movl	%edi, %eax
	cltd
	idivl	%r11d
	movl	%edx, (%rsi,%r9,4)
	movl	%eax, %edi
	subq	$1, %r9
	jnb	.L44
	movq	%rsi, %rdi
	movl	$30, %edx
.L45:
	movl	(%rdi), %eax
	addq	$4, %rdi
	addl	%edx, %eax
	addl	$3, %edx
	addl	%eax, %eax
	cltq
	movslq	(%r8,%rax,4), %r9
	movl	4(%r8,%rax,4), %eax
	movl	%eax, 20(%rsp,%r9,4)
	cmpl	$42, %edx
	jne	.L45
	movl	$4, %edi
	movl	$3, %r9d
.L46:
	movl	%ecx, %eax
	cltd
	idivl	%r9d
	movl	%edx, (%rsi,%rdi,4)
	movl	%eax, %ecx
	subq	$1, %rdi
	jnb	.L46
	movl	$45, %edx
.L47:
	movl	(%r10), %eax
	addq	$4, %r10
	addl	%edx, %eax
	addl	$3, %edx
	addl	%eax, %eax
	cltq
	movslq	(%r8,%rax,4), %rcx
	movl	4(%r8,%rax,4), %eax
	movl	%eax, 20(%rsp,%rcx,4)
	cmpl	$57, %edx
	jne	.L47
	xorl	%ebp, %ebp
	leaq	.LC1(%rip), %r12
.L50:
	movl	(%rbx,%rbp,4), %ecx
	movl	%ebp, %edx
	cmpl	$2, %ecx
	jne	.L48
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L49
.L48:
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L49:
	incq	%rbp
	cmpq	$25, %rbp
	jne	.L50
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	subq	$-128, %rsp
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE4189:
	.size	_Z13print_detailsiiiiPi, .-_Z13print_detailsiiiiPi
	.globl	_Z34__device_stub__Z11sat_Kernel1PiS_iPiS_i
	.type	_Z34__device_stub__Z11sat_Kernel1PiS_iPiS_i, @function
_Z34__device_stub__Z11sat_Kernel1PiS_iPiS_i:
.LFB4214:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11sat_Kernel1PiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L64:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L66
	call	__stack_chk_fail@PLT
.L66:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4214:
	.size	_Z34__device_stub__Z11sat_Kernel1PiS_iPiS_i, .-_Z34__device_stub__Z11sat_Kernel1PiS_iPiS_i
	.globl	_Z11sat_Kernel1PiS_i
	.type	_Z11sat_Kernel1PiS_i, @function
_Z11sat_Kernel1PiS_i:
.LFB4215:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z11sat_Kernel1PiS_iPiS_i
	.cfi_endproc
.LFE4215:
	.size	_Z11sat_Kernel1PiS_i, .-_Z11sat_Kernel1PiS_i
	.globl	_Z37__device_stub__Z11sat_Kernel2PiS_S_S_PiS_S_S_
	.type	_Z37__device_stub__Z11sat_Kernel2PiS_S_S_PiS_S_S_, @function
_Z37__device_stub__Z11sat_Kernel2PiS_S_S_PiS_S_S_:
.LFB4216:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L69
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11sat_Kernel2PiS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L69:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L71
	call	__stack_chk_fail@PLT
.L71:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4216:
	.size	_Z37__device_stub__Z11sat_Kernel2PiS_S_S_PiS_S_S_, .-_Z37__device_stub__Z11sat_Kernel2PiS_S_S_PiS_S_S_
	.globl	_Z11sat_Kernel2PiS_S_S_
	.type	_Z11sat_Kernel2PiS_S_S_, @function
_Z11sat_Kernel2PiS_S_S_:
.LFB4217:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z11sat_Kernel2PiS_S_S_PiS_S_S_
	.cfi_endproc
.LFE4217:
	.size	_Z11sat_Kernel2PiS_S_S_, .-_Z11sat_Kernel2PiS_S_S_
	.section	.rodata.str1.1
.LC3:
	.string	"\nRandom generated boolean expression with 25 variables and 20 clasues(with 3 literals) in Conjunctive normal form\n\n"
.LC4:
	.string	"("
.LC5:
	.string	"x%d"
.LC6:
	.string	"~x%d"
.LC7:
	.string	"+"
.LC8:
	.string	")"
.LC9:
	.string	" * "
.LC10:
	.string	"\n\n"
.LC11:
	.string	" \nThe CNF is satisfiable with the following assignment \n\n"
.LC12:
	.string	" \nThe CNF is not satisfiable !! \n\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4183:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$2000, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$664, %rsp
	.cfi_def_cfa_offset 720
	movq	%fs:40, %rax
	movq	%rax, 648(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$480, %edi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	24(%rsp), %rdi
	movl	$500, %esi
	movq	%rax, %r15
	call	_Z19generate_random_cnfPii
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L81:
	imulq	$100, %rbp, %r12
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	movl	$2, %edi
	leal	0(%rbp,%rbp,2), %r14d
	call	__printf_chk@PLT
	movq	24(%rsp), %rax
	addq	%r12, %rax
	xorl	%r12d, %r12d
	movq	%rax, 8(%rsp)
.L78:
	movq	8(%rsp), %rax
	movl	%r12d, %edx
	movl	(%rax,%r12,4), %r13d
	cmpl	$1, %r13d
	jne	.L75
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leal	(%r14,%rbx), %eax
	addl	%eax, %eax
	cltq
	movl	%r12d, (%r15,%rax,4)
	movl	$1, 4(%r15,%rax,4)
	jmp	.L127
.L75:
	testl	%r13d, %r13d
	jne	.L76
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leal	(%r14,%rbx), %eax
	xorl	%edx, %edx
	addl	%eax, %eax
	cltq
	movl	%r12d, (%r15,%rax,4)
	movl	%edx, 4(%r15,%rax,4)
.L127:
	incl	%ebx
.L76:
	cmpl	$2, %r13d
	je	.L77
	cmpl	$2, %ebx
	jg	.L77
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L77:
	incq	%r12
	cmpq	$25, %r12
	jne	.L78
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	cmpq	$20, %rbp
	jne	.L79
	leaq	72(%rsp), %rdi
	movl	$480, %esi
	leaq	56(%rsp), %rbp
	movabsq	$4294967539, %r14
	call	cudaMalloc@PLT
	movq	72(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rsi
	movl	$480, %edx
	call	cudaMemcpy@PLT
	movl	$3888, %edi
	call	malloc@PLT
	movq	%rbp, %rdi
	movl	$972, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	movq	%rbp, %rdi
	movl	$3888, %esi
	movq	%rbx, %r12
	call	cudaMalloc@PLT
	movq	%rbx, %r13
	xorl	%ebp, %ebp
	jmp	.L80
.L79:
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L81
.L80:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%r14, 100(%rsp)
	movl	$1, 108(%rsp)
	movq	%rdi, 88(%rsp)
	movl	$1, 96(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L82
	movq	56(%rsp), %rsi
	movq	72(%rsp), %rdi
	movl	%ebp, %edx
	call	_Z34__device_stub__Z11sat_Kernel1PiS_iPiS_i
.L82:
	movq	56(%rsp), %rsi
	movq	%r13, %rdi
	movl	$2, %ecx
	incl	%ebp
	movl	$972, %edx
	addq	$972, %r13
	call	cudaMemcpy@PLT
	cmpl	$4, %ebp
	jne	.L80
	xorps	%xmm0, %xmm0
	leaq	112(%rsp), %rcx
	xorl	%edx, %edx
	movups	%xmm0, 112(%rsp)
.L85:
	xorl	%eax, %eax
.L84:
	cmpl	$1, (%r12,%rax,4)
	jne	.L83
	movl	(%rcx), %esi
	leal	(%rdx,%rsi), %edi
	incl	%esi
	movslq	%edi, %rdi
	movl	%esi, (%rcx)
	movl	%eax, (%rbx,%rdi,4)
.L83:
	incq	%rax
	cmpq	$243, %rax
	jne	.L84
	addl	$243, %edx
	addq	$972, %r12
	addq	$4, %rcx
	cmpl	$972, %edx
	jne	.L85
	movslq	124(%rsp), %rax
	movl	%eax, 8(%rsp)
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	leaq	64(%rsp), %rdi
	movl	$100, %esi
	movl	$1, 108(%rsp)
	movq	%rax, 32(%rsp)
	movl	8(%rsp), %eax
	movl	%eax, 88(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 92(%rsp)
	movq	%rax, 100(%rsp)
	call	cudaMalloc@PLT
	movq	16(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	leaq	2916(%rbx), %rsi
	movl	$972, %edx
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
.L86:
	movl	$2, 248(%rsp,%rax,4)
	incq	%rax
	cmpq	$25, %rax
	jne	.L86
	xorl	%r12d, %r12d
	xorl	%ebp, %ebp
	movl	$243, %r14d
.L87:
	movl	%r12d, %r13d
	cmpl	%r12d, 112(%rsp)
	jle	.L89
	cmpl	$1, %ebp
	jne	.L88
	decl	%r13d
	jmp	.L89
.L88:
	leaq	148(%rsp), %r8
	leaq	248(%rsp), %rsi
	xorl	%r13d, %r13d
	movq	%r8, %rdi
	leaq	348(%rsp), %r9
	call	_Z5resetPiS_
	movl	(%rbx,%r12,4), %esi
	leaq	128(%rsp), %rdi
	call	_Z13find_sequencePii
	movq	%rdi, %rcx
	movq	%r15, %rdx
	movl	$4, %esi
	xorl	%edi, %edi
	call	_Z11find_statusiiPiS_S_S_
	testl	%eax, %eax
	je	.L90
.L91:
	movl	%r13d, %r14d
	cmpl	%r13d, 116(%rsp)
	jle	.L90
	cmpl	$1, %ebp
	jne	.L92
	decl	%r14d
	jmp	.L90
.L92:
	leaq	148(%rsp), %r8
	leaq	348(%rsp), %rsi
	xorl	%r14d, %r14d
	movq	%r8, %rdi
	leaq	448(%rsp), %r9
	call	_Z5resetPiS_
	movl	972(%rbx,%r13,4), %esi
	leaq	128(%rsp), %rdi
	call	_Z13find_sequencePii
	movq	%rdi, %rcx
	movq	%r15, %rdx
	movl	$9, %esi
	movl	$5, %edi
	call	_Z11find_statusiiPiS_S_S_
	testl	%eax, %eax
	je	.L93
.L94:
	movl	%r14d, 44(%rsp)
	cmpl	%r14d, 120(%rsp)
	jle	.L93
	leaq	148(%rsp), %r11
	leaq	448(%rsp), %rsi
	movq	%r11, %rdi
	leaq	548(%rsp), %r9
	movq	%r11, %r8
	call	_Z5resetPiS_
	movl	1944(%rbx,%r14,4), %esi
	leaq	128(%rsp), %rdi
	call	_Z13find_sequencePii
	movq	%rdi, %rcx
	movq	%r15, %rdx
	movl	$14, %esi
	movl	$10, %edi
	call	_Z11find_statusiiPiS_S_S_
	testl	%eax, %eax
	je	.L95
	movq	%r9, %rsi
	movq	%r11, %rdi
	movl	$1, %ecx
	call	_Z5resetPiS_
	movq	64(%rsp), %rdi
	movl	$100, %edx
	movq	%r11, %rsi
	call	cudaMemcpy@PLT
	movl	96(%rsp), %ecx
	movl	108(%rsp), %esi
	xorl	%r9d, %r9d
	movq	88(%rsp), %rdx
	movq	100(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L96
	movq	80(%rsp), %rcx
	movq	64(%rsp), %rdx
	movq	%r15, %rdi
	movq	56(%rsp), %rsi
	call	_Z37__device_stub__Z11sat_Kernel2PiS_S_S_PiS_S_S_
.L96:
	movq	16(%rsp), %rdx
	movq	80(%rsp), %rsi
	movl	$2, %ecx
	movq	32(%rsp), %rdi
	call	cudaMemcpy@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	8(%rsp), %esi
	movq	32(%rsp), %rdi
	call	_Z8find_onePii
	movl	%eax, %ebp
	cmpl	$1, %eax
	je	.L93
.L95:
	incq	%r14
	jmp	.L94
.L93:
	incq	%r13
	jmp	.L91
.L90:
	incq	%r12
	jmp	.L87
.L89:
	xorl	%eax, %eax
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	decl	%ebp
	jne	.L100
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	44(%rsp), %edx
	movq	%r15, %r8
	movl	%r14d, %esi
	movl	ind(%rip), %ecx
	movl	%r13d, %edi
	call	_Z13print_detailsiiiiPi
	jmp	.L101
.L100:
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L101:
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	%r15, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	free@PLT
	movq	648(%rsp), %rax
	subq	%fs:40, %rax
	je	.L102
	call	__stack_chk_fail@PLT
.L102:
	addq	$664, %rsp
	.cfi_def_cfa_offset 56
	movl	$1, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4183:
	.size	main, .-main
	.section	.rodata.str1.1
.LC13:
	.string	"_Z11sat_Kernel2PiS_S_S_"
.LC14:
	.string	"_Z11sat_Kernel1PiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4219:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11sat_Kernel2PiS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11sat_Kernel1PiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4219:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	ind
	.bss
	.align 4
	.type	ind, @object
	.size	ind, 4
ind:
	.zero	4
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

 //Complete 3SAT solver using CUDA

// Parallel Processing course assignment

// Author : Gourab Saha
//Contact : 9051110501

// To compile : nvcc sat.cu
 
 #include<stdio.h>
 #include<hip/hip_runtime.h>
 #include<math.h>
 #include <stdlib.h>
 #include <set>
 #include <iostream>
 #include <map>
 #include <time.h>
  
  
  
  
  
  
 #define NO_OF_VARIABLE 25
 #define NO_OF_CLAUSE 20
 #define CLAUSE_SIZE 3
 #define MAX_THREAD_PER_BLOCK 512
  
  int ind;
  
 using namespace std;
 
 
  void generate_random_cnf( int *,int);
  void  reset (int *status,int *new_status);
  void find_sequence(int *sequence,int temp);
  int find_status(int start,int end,int* sat_cnf2,int *sequence,int *status,int *new_status);
  int find_one(int *final_result,int size);
   void  print_details(int i,int j,int k,int index,int *sat_cnf2);
  
  
  
  
  
 __global__ void sat_Kernel1 (int *sat_cnf2_device,int *result_h1_device,int iteration)
 {
 
	 int sequence[5];
	 int temp,i,j,new1,val,start,end;
	 int status[25];
	 
	 unsigned int index = blockIdx.x * blockDim.x + threadIdx.x;
	 result_h1_device[index]=1;
	 
	 temp=index;
	 
	 for(i=4;i>=0;i--)
	 {
		 sequence[i]=temp%3;
		 temp=temp/3;
	 }
	 
	 for(i=0;i<25;i++)
	 {
		 status[i]=2;
	 }
	 
	 start=iteration *5;
	 end=start+4;
	 for(i=start,j=0;i<end;i++,j++)
	 {
		 new1=sat_cnf2_device[i*6+sequence[j]*2];
		 val=sat_cnf2_device[i*6+sequence[j]*2+1];
		 if(status[new1]+val==1)
		 {
			 result_h1_device[index]=0;
			 break;
		 }
		 else
		 {
			 status[new1]=val;
		 }
		 
	 }
	 
	 
	 __syncthreads();
 }
	 
  
  
   
 __global__ void sat_Kernel2 (int * sat_cnf2_device,int *result_h1_device,int *status_device,int *final_result_device)
 {
  
  
  
	 int sequence[5];
	 int temp,i,j,new1,val,start,end;
	 int status[25];
	 int status2[25];
	 int flag;
	 
	 unsigned int index = blockIdx.x * blockDim.x + threadIdx.x;
	 temp= result_h1_device[index];
	 
	 
   
	 
	 for(i=4;i>=0;i--)
	 {
		 sequence[i]=temp%3;
		 temp=temp/3;
	 }
	 
	 for(i=0;i<25;i++)
	 {
		 status[i]=status_device[i];
		 status2[i]=2;
	 }
	 
	 
	 
	 start=15;
	 end=19;
	 for(i=start,j=0;i<end;i++,j++)
	 {
		 new1=sat_cnf2_device[i*6+sequence[j]*2];
		 val=sat_cnf2_device[i*6+sequence[j]*2+1];
		 status2[new1]=val;
		
	  }
	  
	  flag=1;
	  for(i=0;i<25;i++)
	  {
	   if((status[i]+status2[i])==1)
	   {
	      flag=0;
	      break;
	   }
	  
	  }
	  
	  final_result_device[index]=flag;
	 
	 __syncthreads();
  
     
  
 }
 
 
 
 
 
 
 
 int main(void)
 {
   
   
   int *sat_cnf,*sat_cnf2,*result_h1;
   int size,size2,no_of_iteration;
   int i,j,k,z1,*result_h1_device,*status_device;
   
   
   size_t array_size,block_size,num_blocks; 
   int *sat_cnf2_device,*final_result_device;
   int count[4];
   int status[25];
   int *final_result;
   int p1,p2,p3,flag,final_flag;
   int sequence[5],new_status_h[25],new_status_i[25],new_status_j[25],new_status_k[25];
 
  
   
   
   
   
   
   size=NO_OF_CLAUSE *NO_OF_VARIABLE;
   size2=NO_OF_CLAUSE * CLAUSE_SIZE * 2 ;
   sat_cnf=(int*) malloc(size * sizeof(int));
   sat_cnf2=(int*) malloc(size2 * sizeof(int));
   
   
 
   
   
   
   
   
   generate_random_cnf( sat_cnf,size);
   
  printf("\nRandom generated boolean expression with 25 variables and 20 clasues(with 3 literals) in Conjunctive normal form\n\n");
   
    for(i=0;i<NO_OF_CLAUSE;i++)
   {
    
	 printf("(");
	 z1=0;
	 for(j=0;j<NO_OF_VARIABLE;j++)
	 {
		 if(sat_cnf[i*NO_OF_VARIABLE+j]==1)
		 {
				  printf("x%d",j);
				 sat_cnf2[i*CLAUSE_SIZE * 2+2*z1]=j;
				 sat_cnf2[i*CLAUSE_SIZE * 2+2*z1+1]=1;
				 
				 z1++;
			    
		 }
		 if(sat_cnf[i*NO_OF_VARIABLE+j]==0)
		 {
				  printf("~x%d",j);
				 sat_cnf2[i*CLAUSE_SIZE * 2+2*z1]=j;
				 sat_cnf2[i*CLAUSE_SIZE * 2+2*z1+1]=0;
				 
				 z1++;
		 }
		 if(z1<CLAUSE_SIZE && sat_cnf[i*NO_OF_VARIABLE+j]!=2)
			  printf("+");
		 
		 
	 }
    
	 printf(")");
	 if(i<NO_OF_CLAUSE-1)
		  printf(" * ");
   }
		 
   
   
   
   
   array_size=NO_OF_CLAUSE * CLAUSE_SIZE * 2 * sizeof(int) ;
   hipMalloc((void **) &sat_cnf2_device,array_size);
   hipMemcpy(sat_cnf2_device,sat_cnf2,array_size,hipMemcpyHostToDevice);
   
   
    block_size=243;
    num_blocks=1;
    no_of_iteration=4;
    
     size= no_of_iteration*243;
     result_h1=(int*) malloc(size * sizeof(int));
     
     array_size=243*sizeof(int);
     hipMalloc((void **) &result_h1_device,array_size);
     
    array_size=no_of_iteration*243*sizeof(int);
    hipMalloc((void **) &result_h1_device,array_size);
    
     
     
     for(i=0;i<no_of_iteration;i++)
     {
	 sat_Kernel1<<<1,block_size>>>(sat_cnf2_device,result_h1_device,i);
	 
	 array_size=243*sizeof(int);
	 hipMemcpy(&result_h1[i*243],result_h1_device,array_size,hipMemcpyDeviceToHost);
     }
	 
	 
	 
     for(i=0;i<no_of_iteration;i++)
   {
      count[i]=0;
      for(j=0;j<243;j++)
      { 	
	   if(result_h1[i*243+j]==1)
	   {
	     result_h1[i*243+count[i]]=j;
	     count[i]++;
	   }
	 
      }	
    }
    
    
    
 
    
    final_result=(int *)malloc(count[3]*sizeof(int));
    
    block_size=count[3];
    num_blocks=1;
    
     dim3 dimBlock(block_size);
     dim3 dimGrid(num_blocks);
    
    
    array_size=25*sizeof(int);
    hipMalloc((void **) &status_device,array_size);
   
    
     array_size=count[3]*sizeof(int);
     hipMalloc((void **) &final_result_device,array_size);
     
      array_size=243*sizeof(int);
      hipMemcpy(result_h1_device,&result_h1[729],array_size,hipMemcpyHostToDevice);
 
     
 
    final_flag=0;
    
     for(i=0;i<25;i++)
    {
      new_status_h[i]=2;
    }
    for(i=0;i<count[0];i++)
    {
       if(final_flag==1)
       {
	   i--;
	   break;
	  
       }
       reset(status,new_status_h);
       p1=result_h1[i];
       find_sequence(sequence,p1);
       flag=find_status(0,4,sat_cnf2,sequence,status,new_status_i);
       if(flag==0)
	continue;
       
      for(j=0;j<count[1];j++)
      {
	if(final_flag==1)
	{
	  j--;
	   break;
	}
	reset(status,new_status_i);
	p2=result_h1[243+j];
	find_sequence(sequence,p2);
	flag=find_status(5,9,sat_cnf2,sequence,status,new_status_j);
	if(flag==0)
	 continue;
	
       for(k=0;k<count[2];k++)
       {
	  reset(status,new_status_j);
	  p3=result_h1[2*243+k];
	 find_sequence(sequence,p3);
	 flag=find_status(10,14,sat_cnf2,sequence,status,new_status_k);
	 if(flag==0)
	  continue;
	 else
	 {
	  reset(status,new_status_k);
	  array_size=25*sizeof(int);
	  hipMemcpy(status_device,status,array_size,hipMemcpyHostToDevice);
	  
	  
	  sat_Kernel2<<<dimGrid,dimBlock>>>(sat_cnf2,result_h1_device,status_device,final_result_device);
	  
	  array_size=count[3]*sizeof(int);
	 hipMemcpy(final_result,final_result_device,array_size,hipMemcpyDeviceToHost);
	  printf("\n\n");
	 
	  final_flag=find_one(final_result,count[3]);
	  if(final_flag==1)
	   break;
	 }
       }
      }
    }
    
    
   
    
    
    printf("\n\n");
    
    if(final_flag==1)
    {
      printf(" \nThe CNF is satisfiable with the following assignment \n\n");
      print_details(i,j,k,ind,sat_cnf2);
    }
    
    else
    {
       printf(" \nThe CNF is not satisfiable !! \n\n");
    }
    
    
    
    
   
   /* 
      for(i=0;i<no_of_iteration;i++)
   {
     printf("\nno of 1s :%d\n",count[i]);
      for(j=0;j<243;j++)
      { 	
	   printf("%d ",result_h1[i*243+j]);
	    
	 
      }
      printf("\n");
    }
    
	  printf("\n");
	  
	  
	  
	  
	  
	  
	  
	  
	  
	  
      
      for(i=0;i<NO_OF_CLAUSE;i++)
   {
		 
		 for(j=0;j<6;j=j+2)
	 {
		 printf("x%d",sat_cnf2[i*6+j]);
		 if(sat_cnf2[i*6+j+1]==0)
			 printf("'");
		 printf("+");
		 }
		 printf("\n");
   }
     
   */
   
   
   hipFree(sat_cnf2_device);
   hipFree(final_result_device);
   hipFree(result_h1_device);
   hipFree(status_device);
   
   free(sat_cnf);
   free(sat_cnf2);
   free(result_h1);
   free(final_result);
   
     return 1;
   
   
   }
   
   
   
   
 void generate_random_cnf( int *sat_cnf,int size)
   {
		 int i,j,flag,k;
		 int a[CLAUSE_SIZE];
		 
		 
		 for(i=0;i<size;i++)
		 {
			 sat_cnf[i]=2;
			 
		 }
		 
		 for(i=0;i<NO_OF_CLAUSE;i++)
		 {
			 for(j=0;j<CLAUSE_SIZE;j++)
			 {
				 flag=1;
				 while(flag)
				 {
						 a[j]=rand()%NO_OF_VARIABLE;
						 flag=0;
					     for(k=j-1;k>=0;k--)
					     {
						 if(a[j]==a[k])
						 {
							 flag=1;
							 break;
						 }
					     }
			    }
					 
				 if(rand()%2==0)
					 sat_cnf[i*NO_OF_VARIABLE+a[j]]=0;
				 else
					 sat_cnf[i*NO_OF_VARIABLE+a[j]]=1;
			 }
		 }
			 
   }
				 
				 
   
   
   
  void  reset (int *status ,int *new_status)
   {
   
    int i;
     for(i=0;i<25;i++)
	 {
		 status[i]=new_status[i];
	 }
	 
   }
		 
  void find_sequence(int *sequence,int temp)
  {
    int i;
    for(i=4;i>=0;i--)
	 {
		 sequence[i]=temp%3;
		 temp=temp/3;
	 }
  }
  
  
  
  
  int find_status(int start,int end,int* sat_cnf2,int *sequence,int *status,int *new_status)
  {
   int i,j,new1,val;
   
   for(i=0;i<25;i++)
    new_status[i]=status[i];
   for(i=start,j=0;i<end;i++,j++)
   {
	new1=sat_cnf2[i*6+sequence[j]*2];
	val=sat_cnf2[i*6+sequence[j]*2+1];
	if(new_status[new1]+val==1)
	{
	   return 0;
	 }
	 else
	 {
	     new_status[new1]=val;
	  }
		 
   }
   return 1;
   
  }
		 
  
  
  int find_one(int *final_result,int size)
  {
    int i,flag=0;
    for(i=0;i<size;i++)
    {
     if(final_result[i]==1)
     {
      flag=1;
      ind=i;
      break;
     }
    }
    return flag;
  }
 
 
 
 void  print_details(int i,int j,int k,int index,int *sat_cnf2)
 {
   int sequence[5];
    int temp,x,new1,y,val;
    int status[25];
    
    for(x=0;x<25;x++)
     status[x]=2;
  
   
    temp=i;
   
    for(x=4;x>=0;x--)
   {
		 sequence[x]=temp%3;
		 temp=temp/3;
    }
    
    for(x=0,y=0;x<4;x++,y++)
    {
	  new1=sat_cnf2[x*6+sequence[y]*2];
	   val=sat_cnf2[x*6+sequence[y]*2+1];
	   status[new1]=val;
		
     }
     
     
     
     temp=j;
   
    for(x=4;x>=0;x--)
   {
		 sequence[x]=temp%3;
		 temp=temp/3;
    }
    
    for(x=5,y=0;x<9;x++,y++)
    {
	  new1=sat_cnf2[x*6+sequence[y]*2];
	   val=sat_cnf2[x*6+sequence[y]*2+1];
	   status[new1]=val;
		
     }
  
  
   temp=k;
   
    for(x=4;x>=0;x--)
   {
		 sequence[x]=temp%3;
		 temp=temp/3;
    }
    
    for(x=10,y=0;x<14;x++,y++)
    {
	  new1=sat_cnf2[x*6+sequence[y]*2];
	   val=sat_cnf2[x*6+sequence[y]*2+1];
	   status[new1]=val;
		
     }
     
     
     
     
     temp=i;
   
    for(x=4;x>=0;x--)
   {
		 sequence[x]=temp%3;
		 temp=temp/3;
    }
    
    for(x=15,y=0;x<19;x++,y++)
    {
	  new1=sat_cnf2[x*6+sequence[y]*2];
	   val=sat_cnf2[x*6+sequence[y]*2+1];
	   status[new1]=val;
		
     }
     
     
       
    for(x=0;x<25;x++)
    {
     if(status[x]==2)
      printf("\nx%d : Dont Care(0 or 1)",x);
     else
     printf("\nx%d : %d",x,status[x]);
    }
    
    printf("\n\n\n");
  
 }
   
   
   
   
   
   
   
   

	.text
	.file	"sat.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z26__device_stub__sat_Kernel1PiS_i # -- Begin function _Z26__device_stub__sat_Kernel1PiS_i
	.type	_Z26__device_stub__sat_Kernel1PiS_i,@function
_Z26__device_stub__sat_Kernel1PiS_i:    # @_Z26__device_stub__sat_Kernel1PiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11sat_Kernel1PiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__sat_Kernel1PiS_i, .Lfunc_end0-_Z26__device_stub__sat_Kernel1PiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__sat_Kernel2PiS_S_S_ # -- Begin function _Z26__device_stub__sat_Kernel2PiS_S_S_
	.type	_Z26__device_stub__sat_Kernel2PiS_S_S_,@function
_Z26__device_stub__sat_Kernel2PiS_S_S_: # @_Z26__device_stub__sat_Kernel2PiS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11sat_Kernel2PiS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z26__device_stub__sat_Kernel2PiS_S_S_, .Lfunc_end1-_Z26__device_stub__sat_Kernel2PiS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$680, %rsp                      # imm = 0x2A8
	.cfi_def_cfa_offset 736
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$2000, %edi                     # imm = 0x7D0
	callq	malloc
	movq	%rax, %r15
	movl	$480, %edi                      # imm = 0x1E0
	callq	malloc
	movq	%rax, %r14
	movq	%r15, %rdi
	movl	$500, %esi                      # imm = 0x1F4
	callq	_Z19generate_random_cnfPii
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	%r15, 104(%rsp)                 # 8-byte Spill
	xorl	%ebx, %ebx
.LBB2_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	movl	$40, %edi
	callq	putchar@PLT
	movq	%rbx, (%rsp)                    # 8-byte Spill
	leal	(%rbx,%rbx), %eax
	leal	(%rax,%rax,2), %r13d
	xorl	%ebx, %ebx
	xorl	%ebp, %ebp
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r15,%rbx,4), %r12d
	testl	%r12d, %r12d
	je	.LBB2_5
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=2
	cmpl	$1, %r12d
	jne	.LBB2_7
# %bb.4:                                # %.thread
                                        #   in Loop: Header=BB2_2 Depth=2
	movl	$.L.str.2, %edi
	jmp	.LBB2_6
.LBB2_5:                                #   in Loop: Header=BB2_2 Depth=2
	movl	$.L.str.3, %edi
.LBB2_6:                                # %.sink.split
                                        #   in Loop: Header=BB2_2 Depth=2
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	leal	(%r13,%rbp,2), %eax
	cltq
	movl	%ebx, (%r14,%rax,4)
	leal	1(%r13,%rbp,2), %eax
	cltq
	movl	%r12d, (%r14,%rax,4)
	incl	%ebp
.LBB2_7:                                #   in Loop: Header=BB2_2 Depth=2
	cmpl	$2, %r12d
	je	.LBB2_10
# %bb.8:                                #   in Loop: Header=BB2_2 Depth=2
	cmpl	$2, %ebp
	jg	.LBB2_10
# %bb.9:                                #   in Loop: Header=BB2_2 Depth=2
	movl	$43, %edi
	callq	putchar@PLT
.LBB2_10:                               #   in Loop: Header=BB2_2 Depth=2
	incq	%rbx
	cmpq	$25, %rbx
	jne	.LBB2_2
# %bb.11:                               #   in Loop: Header=BB2_1 Depth=1
	movl	$41, %edi
	callq	putchar@PLT
	movq	(%rsp), %rbx                    # 8-byte Reload
	cmpq	$19, %rbx
	je	.LBB2_13
# %bb.12:                               #   in Loop: Header=BB2_1 Depth=1
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	addq	$100, %r15
	jmp	.LBB2_1
.LBB2_13:
	movabsq	$4294967297, %r12               # imm = 0x100000001
	leaq	72(%rsp), %rbx
	movl	$480, %esi                      # imm = 0x1E0
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movl	$480, %edx                      # imm = 0x1E0
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$3888, %edi                     # imm = 0xF30
	callq	malloc
	movq	%rax, %r15
	leaq	8(%rsp), %rbx
	movl	$972, %esi                      # imm = 0x3CC
	movq	%rbx, %rdi
	callq	hipMalloc
	movl	$3888, %esi                     # imm = 0xF30
	movq	%rbx, %rdi
	callq	hipMalloc
	xorl	%ebx, %ebx
	addq	$242, %r12
	movq	%r15, %r13
.LBB2_14:                               # =>This Inner Loop Header: Depth=1
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_16
# %bb.15:                               #   in Loop: Header=BB2_14 Depth=1
	movq	72(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	%ebx, %edx
	callq	_Z26__device_stub__sat_Kernel1PiS_i
.LBB2_16:                               #   in Loop: Header=BB2_14 Depth=1
	movq	8(%rsp), %rsi
	movl	$972, %edx                      # imm = 0x3CC
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	incq	%rbx
	addq	$972, %r13                      # imm = 0x3CC
	cmpq	$4, %rbx
	jne	.LBB2_14
# %bb.17:                               # %.preheader204.preheader
	xorl	%eax, %eax
	movq	%r15, %rcx
.LBB2_18:                               # %.preheader204
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_19 Depth 2
	movl	$0, 48(%rsp,%rax,4)
	imull	$243, %eax, %edx
	xorl	%esi, %esi
	xorl	%edi, %edi
.LBB2_19:                               #   Parent Loop BB2_18 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpl	$1, (%rcx,%rdi,4)
	jne	.LBB2_21
# %bb.20:                               #   in Loop: Header=BB2_19 Depth=2
	leal	(%rsi,%rdx), %r8d
	movslq	%r8d, %r8
	movl	%edi, (%r15,%r8,4)
	incl	%esi
	movl	%esi, 48(%rsp,%rax,4)
.LBB2_21:                               #   in Loop: Header=BB2_19 Depth=2
	incq	%rdi
	cmpq	$243, %rdi
	jne	.LBB2_19
# %bb.22:                               #   in Loop: Header=BB2_18 Depth=1
	incq	%rax
	addq	$972, %rcx                      # imm = 0x3CC
	cmpq	$4, %rax
	jne	.LBB2_18
# %bb.23:
	movl	60(%rsp), %ebp
	movslq	%ebp, %rbx
	shlq	$2, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r13
	leaq	40(%rsp), %rdi
	movl	$100, %esi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%rbx, 120(%rsp)                 # 8-byte Spill
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	8(%rsp), %rdi
	movq	%r15, %rsi
	addq	$2916, %rsi                     # imm = 0xB64
	movl	$972, %edx                      # imm = 0x3CC
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
.LBB2_24:                               # =>This Inner Loop Header: Depth=1
	movl	$2, 576(%rsp,%rax,4)
	incq	%rax
	cmpq	$25, %rax
	jne	.LBB2_24
# %bb.25:                               # %.preheader203
	movl	48(%rsp), %eax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	testl	%eax, %eax
	jle	.LBB2_26
# %bb.28:                               # %.lr.ph236
	movabsq	$4294967297, %rax               # imm = 0x100000001
	addq	%rbp, %rax
	decq	%rax
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	movl	52(%rsp), %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	56(%rsp), %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$243, %ebx
                                        # implicit-def: $r12d
	xorl	%edx, %edx
.LBB2_29:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_31 Depth 2
                                        #     Child Loop BB2_36 Depth 2
                                        #       Child Loop BB2_38 Depth 3
                                        #       Child Loop BB2_42 Depth 3
                                        #         Child Loop BB2_43 Depth 4
                                        #         Child Loop BB2_49 Depth 4
	cmpl	$1, %edx
	je	.LBB2_59
# %bb.30:                               # %.preheader202.preheader
                                        #   in Loop: Header=BB2_29 Depth=1
	movl	$12, %ecx
	leaq	128(%rsp), %rdi
	leaq	576(%rsp), %rsi
	rep;movsq (%rsi), %es:(%rdi)
	movl	672(%rsp), %eax
	movl	%eax, 224(%rsp)
	movq	16(%rsp), %rax                  # 8-byte Reload
	movl	(%r15,%rax,4), %eax
	movl	$4, %ecx
.LBB2_31:                               #   Parent Loop BB2_29 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	%eax, %rdx
	imulq	$1431655766, %rdx, %rax         # imm = 0x55555556
	movq	%rax, %rsi
	shrq	$63, %rsi
	shrq	$32, %rax
	addl	%esi, %eax
	leal	(%rax,%rax,2), %esi
	subl	%esi, %edx
	movl	%edx, 80(%rsp,%rcx,4)
	addq	$-1, %rcx
	jb	.LBB2_31
# %bb.32:                               # %_Z13find_sequencePii.exit
                                        #   in Loop: Header=BB2_29 Depth=1
	xorl	%edi, %edi
	movl	$4, %esi
	movq	%r14, %rdx
	leaq	80(%rsp), %rcx
	leaq	128(%rsp), %r8
	leaq	464(%rsp), %r9
	callq	_Z11find_statusiiPiS_S_S_
	testl	%eax, %eax
	movl	$0, %eax
	cmovnel	%eax, %ebx
	je	.LBB2_33
# %bb.34:                               # %_Z13find_sequencePii.exit
                                        #   in Loop: Header=BB2_29 Depth=1
	cmpl	$0, 24(%rsp)                    # 4-byte Folded Reload
	jle	.LBB2_33
# %bb.35:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_29 Depth=1
	xorl	%ebx, %ebx
	xorl	%eax, %eax
.LBB2_36:                               # %.lr.ph
                                        #   Parent Loop BB2_29 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_38 Depth 3
                                        #       Child Loop BB2_42 Depth 3
                                        #         Child Loop BB2_43 Depth 4
                                        #         Child Loop BB2_49 Depth 4
	cmpl	$1, %eax
	je	.LBB2_60
# %bb.37:                               # %.preheader199.preheader
                                        #   in Loop: Header=BB2_36 Depth=2
	movl	$12, %ecx
	leaq	128(%rsp), %rdi
	leaq	464(%rsp), %rsi
	rep;movsq (%rsi), %es:(%rdi)
	movl	560(%rsp), %eax
	movl	%eax, 224(%rsp)
	movl	972(%r15,%rbx,4), %eax
	movl	$4, %ecx
.LBB2_38:                               #   Parent Loop BB2_29 Depth=1
                                        #     Parent Loop BB2_36 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movslq	%eax, %rdx
	imulq	$1431655766, %rdx, %rax         # imm = 0x55555556
	movq	%rax, %rsi
	shrq	$63, %rsi
	shrq	$32, %rax
	addl	%esi, %eax
	leal	(%rax,%rax,2), %esi
	subl	%esi, %edx
	movl	%edx, 80(%rsp,%rcx,4)
	addq	$-1, %rcx
	jb	.LBB2_38
# %bb.39:                               # %_Z13find_sequencePii.exit167
                                        #   in Loop: Header=BB2_36 Depth=2
	movl	$5, %edi
	movl	$9, %esi
	movq	%r14, %rdx
	leaq	80(%rsp), %rcx
	leaq	128(%rsp), %r8
	leaq	352(%rsp), %r9
	callq	_Z11find_statusiiPiS_S_S_
	testl	%eax, %eax
	movl	$0, %eax
	cmovnel	%eax, %r12d
	je	.LBB2_53
# %bb.40:                               # %_Z13find_sequencePii.exit167
                                        #   in Loop: Header=BB2_36 Depth=2
	cmpl	$0, (%rsp)                      # 4-byte Folded Reload
	jle	.LBB2_53
# %bb.41:                               # %.preheader197.preheader
                                        #   in Loop: Header=BB2_36 Depth=2
	xorl	%r12d, %r12d
.LBB2_42:                               # %.preheader197
                                        #   Parent Loop BB2_29 Depth=1
                                        #     Parent Loop BB2_36 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB2_43 Depth 4
                                        #         Child Loop BB2_49 Depth 4
	movl	$12, %ecx
	leaq	128(%rsp), %rdi
	leaq	352(%rsp), %rsi
	rep;movsq (%rsi), %es:(%rdi)
	movl	448(%rsp), %eax
	movl	%eax, 224(%rsp)
	movl	1944(%r15,%r12,4), %eax
	movl	$4, %ecx
.LBB2_43:                               #   Parent Loop BB2_29 Depth=1
                                        #     Parent Loop BB2_36 Depth=2
                                        #       Parent Loop BB2_42 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movslq	%eax, %rdx
	imulq	$1431655766, %rdx, %rax         # imm = 0x55555556
	movq	%rax, %rsi
	shrq	$63, %rsi
	shrq	$32, %rax
	addl	%esi, %eax
	leal	(%rax,%rax,2), %esi
	subl	%esi, %edx
	movl	%edx, 80(%rsp,%rcx,4)
	addq	$-1, %rcx
	jb	.LBB2_43
# %bb.44:                               # %_Z13find_sequencePii.exit176
                                        #   in Loop: Header=BB2_42 Depth=3
	movl	$10, %edi
	movl	$14, %esi
	movq	%r14, %rdx
	leaq	80(%rsp), %rcx
	leaq	128(%rsp), %r8
	leaq	240(%rsp), %r9
	callq	_Z11find_statusiiPiS_S_S_
	testl	%eax, %eax
	je	.LBB2_51
# %bb.45:                               # %.preheader.preheader
                                        #   in Loop: Header=BB2_42 Depth=3
	movl	$12, %ecx
	leaq	128(%rsp), %r8
	movq	%r8, %rdi
	leaq	240(%rsp), %rsi
	rep;movsq (%rsi), %es:(%rdi)
	movl	336(%rsp), %eax
	movl	%eax, 224(%rsp)
	movq	40(%rsp), %rdi
	movl	$100, %edx
	movq	%r8, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	112(%rsp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_47
# %bb.46:                               #   in Loop: Header=BB2_42 Depth=3
	movq	8(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rcx
	movq	%r14, %rdi
	callq	_Z26__device_stub__sat_Kernel2PiS_S_S_
.LBB2_47:                               #   in Loop: Header=BB2_42 Depth=3
	movq	32(%rsp), %rsi
	movq	%r13, %rdi
	movq	120(%rsp), %rdx                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	testl	%ebp, %ebp
	jle	.LBB2_51
# %bb.48:                               # %.lr.ph.i.preheader
                                        #   in Loop: Header=BB2_42 Depth=3
	xorl	%eax, %eax
.LBB2_49:                               # %.lr.ph.i
                                        #   Parent Loop BB2_29 Depth=1
                                        #     Parent Loop BB2_36 Depth=2
                                        #       Parent Loop BB2_42 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	cmpl	$1, (%r13,%rax,4)
	je	.LBB2_61
# %bb.50:                               #   in Loop: Header=BB2_49 Depth=4
	incq	%rax
	cmpq	%rax, %rbp
	jne	.LBB2_49
.LBB2_51:                               # %_Z8find_onePii.exit.thread
                                        #   in Loop: Header=BB2_42 Depth=3
	incq	%r12
	cmpq	(%rsp), %r12                    # 8-byte Folded Reload
	jne	.LBB2_42
# %bb.52:                               #   in Loop: Header=BB2_36 Depth=2
	movq	(%rsp), %r12                    # 8-byte Reload
                                        # kill: def $r12d killed $r12d killed $r12 def $r12
	xorl	%eax, %eax
	jmp	.LBB2_53
.LBB2_61:                               # %_Z8find_onePii.exit
                                        #   in Loop: Header=BB2_36 Depth=2
	movl	%eax, ind(%rip)
	movl	$1, %eax
.LBB2_53:                               # %.loopexit
                                        #   in Loop: Header=BB2_36 Depth=2
	incq	%rbx
	cmpq	24(%rsp), %rbx                  # 8-byte Folded Reload
	jne	.LBB2_36
# %bb.54:                               #   in Loop: Header=BB2_29 Depth=1
	movl	%eax, %edx
	movq	24(%rsp), %rbx                  # 8-byte Reload
                                        # kill: def $ebx killed $ebx killed $rbx def $rbx
	jmp	.LBB2_55
.LBB2_33:                               #   in Loop: Header=BB2_29 Depth=1
	xorl	%edx, %edx
	jmp	.LBB2_55
.LBB2_60:                               #   in Loop: Header=BB2_29 Depth=1
	decl	%ebx
	movl	$1, %edx
.LBB2_55:                               # %.loopexit201
                                        #   in Loop: Header=BB2_29 Depth=1
	movq	16(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	movq	%rcx, %rax
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	cmpq	64(%rsp), %rcx                  # 8-byte Folded Reload
	jne	.LBB2_29
# %bb.56:                               # %._crit_edge
	movl	$.Lstr.2, %edi
	movl	%edx, %ebp
	callq	puts@PLT
	testl	%ebp, %ebp
	movq	64(%rsp), %rbp                  # 8-byte Reload
	je	.LBB2_27
	jmp	.LBB2_57
.LBB2_26:                               # %._crit_edge.thread
	movl	$.Lstr.2, %edi
	callq	puts@PLT
.LBB2_27:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	jmp	.LBB2_58
.LBB2_59:                               # %.thread193
	movq	16(%rsp), %rbp                  # 8-byte Reload
	decl	%ebp
	movl	$.Lstr.2, %edi
	callq	puts@PLT
                                        # kill: def $ebp killed $ebp killed $rbp def $rbp
.LBB2_57:
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movl	%ebp, %edi
	movl	%ebx, %esi
	movl	%r12d, %edx
	movq	%r14, %r8
	callq	_Z13print_detailsiiiiPi
.LBB2_58:
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	104(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movl	$1, %eax
	addq	$680, %rsp                      # imm = 0x2A8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z19generate_random_cnfPii      # -- Begin function _Z19generate_random_cnfPii
	.type	_Z19generate_random_cnfPii,@function
_Z19generate_random_cnfPii:             # @_Z19generate_random_cnfPii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	testl	%esi, %esi
	jle	.LBB3_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorl	%ecx, %ecx
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$2, (%rbx,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB3_2
.LBB3_3:                                # %.preheader25.preheader
	xorl	%r14d, %r14d
.LBB3_4:                                # %.preheader25
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_5 Depth 2
                                        #       Child Loop BB3_6 Depth 3
	leal	(%r14,%r14,4), %eax
	leal	(%rax,%rax,4), %ebp
	xorl	%r15d, %r15d
.LBB3_5:                                #   Parent Loop BB3_4 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_6 Depth 3
	callq	rand
	movslq	%eax, %r12
	imulq	$1374389535, %r12, %rax         # imm = 0x51EB851F
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$35, %rax
	addl	%ecx, %eax
	leal	(%rax,%rax,4), %eax
	leal	(%rax,%rax,4), %eax
	subl	%eax, %r12d
	movl	%r12d, 4(%rsp,%r15,4)
	movq	%r15, %rax
.LBB3_6:                                #   Parent Loop BB3_4 Depth=1
                                        #     Parent Loop BB3_5 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	testq	%rax, %rax
	jle	.LBB3_8
# %bb.7:                                #   in Loop: Header=BB3_6 Depth=3
	leaq	-1(%rax), %rcx
	cmpl	(%rsp,%rax,4), %r12d
	movq	%rcx, %rax
	jne	.LBB3_6
	jmp	.LBB3_5
.LBB3_8:                                #   in Loop: Header=BB3_5 Depth=2
	callq	rand
	andl	$1, %eax
	addl	%ebp, %r12d
	movslq	%r12d, %rcx
	movl	%eax, (%rbx,%rcx,4)
	incq	%r15
	cmpq	$3, %r15
	jne	.LBB3_5
# %bb.9:                                #   in Loop: Header=BB3_4 Depth=1
	incl	%r14d
	cmpl	$20, %r14d
	jne	.LBB3_4
# %bb.10:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z19generate_random_cnfPii, .Lfunc_end3-_Z19generate_random_cnfPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z5resetPiS_                    # -- Begin function _Z5resetPiS_
	.type	_Z5resetPiS_,@function
_Z5resetPiS_:                           # @_Z5resetPiS_
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	movl	(%rsi,%rax,4), %ecx
	movl	%ecx, (%rdi,%rax,4)
	incq	%rax
	cmpq	$25, %rax
	jne	.LBB4_1
# %bb.2:
	retq
.Lfunc_end4:
	.size	_Z5resetPiS_, .Lfunc_end4-_Z5resetPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z13find_sequencePii            # -- Begin function _Z13find_sequencePii
	.type	_Z13find_sequencePii,@function
_Z13find_sequencePii:                   # @_Z13find_sequencePii
	.cfi_startproc
# %bb.0:
                                        # kill: def $esi killed $esi def $rsi
	movl	$4, %eax
.LBB5_1:                                # =>This Inner Loop Header: Depth=1
	movslq	%esi, %rcx
	imulq	$1431655766, %rcx, %rsi         # imm = 0x55555556
	movq	%rsi, %rdx
	shrq	$63, %rdx
	shrq	$32, %rsi
	addl	%edx, %esi
	leal	(%rsi,%rsi,2), %edx
	subl	%edx, %ecx
	movl	%ecx, (%rdi,%rax,4)
	addq	$-1, %rax
	jb	.LBB5_1
# %bb.2:
	retq
.Lfunc_end5:
	.size	_Z13find_sequencePii, .Lfunc_end5-_Z13find_sequencePii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11find_statusiiPiS_S_S_       # -- Begin function _Z11find_statusiiPiS_S_S_
	.type	_Z11find_statusiiPiS_S_S_,@function
_Z11find_statusiiPiS_S_S_:              # @_Z11find_statusiiPiS_S_S_
	.cfi_startproc
# %bb.0:
                                        # kill: def $esi killed $esi def $rsi
                                        # kill: def $edi killed $edi def $rdi
	xorl	%eax, %eax
.LBB6_1:                                # =>This Inner Loop Header: Depth=1
	movl	(%r8,%rax,4), %r10d
	movl	%r10d, (%r9,%rax,4)
	incq	%rax
	cmpq	$25, %rax
	jne	.LBB6_1
# %bb.2:                                # %.preheader
	movl	$1, %eax
	subl	%edi, %esi
	jle	.LBB6_8
# %bb.3:                                # %.lr.ph.preheader
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	addl	%edi, %edi
	leal	(%rdi,%rdi,2), %edi
	xorl	%r8d, %r8d
.LBB6_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rcx,%r8,4), %r11d
	leal	(%rdi,%r11,2), %r10d
	movslq	%r10d, %r10
	movslq	(%rdx,%r10,4), %r10
	leal	(%rdi,%r11,2), %r11d
	incl	%r11d
	movslq	%r11d, %r11
	movl	(%rdx,%r11,4), %r11d
	movl	(%r9,%r10,4), %ebx
	addl	%r11d, %ebx
	cmpl	$1, %ebx
	je	.LBB6_5
# %bb.6:                                #   in Loop: Header=BB6_4 Depth=1
	movl	%r11d, (%r9,%r10,4)
	incq	%r8
	addl	$6, %edi
	cmpq	%r8, %rsi
	jne	.LBB6_4
	jmp	.LBB6_7
.LBB6_5:
	xorl	%eax, %eax
.LBB6_7:
	popq	%rbx
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
.LBB6_8:                                # %._crit_edge
	retq
.Lfunc_end6:
	.size	_Z11find_statusiiPiS_S_S_, .Lfunc_end6-_Z11find_statusiiPiS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z8find_onePii                  # -- Begin function _Z8find_onePii
	.type	_Z8find_onePii,@function
_Z8find_onePii:                         # @_Z8find_onePii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB7_5
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %ecx
	xorl	%eax, %eax
.LBB7_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	cmpl	$1, (%rdi,%rax,4)
	je	.LBB7_3
# %bb.4:                                #   in Loop: Header=BB7_2 Depth=1
	incq	%rax
	cmpq	%rax, %rcx
	jne	.LBB7_2
.LBB7_5:
	xorl	%eax, %eax
	retq
.LBB7_3:
	movl	%eax, ind(%rip)
	movl	$1, %eax
	retq
.Lfunc_end7:
	.size	_Z8find_onePii, .Lfunc_end7-_Z8find_onePii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13print_detailsiiiiPi         # -- Begin function _Z13print_detailsiiiiPi
	.type	_Z13print_detailsiiiiPi,@function
_Z13print_detailsiiiiPi:                # @_Z13print_detailsiiiiPi
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$144, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -16
                                        # kill: def $edx killed $edx def $rdx
                                        # kill: def $esi killed $esi def $rsi
                                        # kill: def $edi killed $edi def $rdi
	xorl	%eax, %eax
.LBB8_1:                                # =>This Inner Loop Header: Depth=1
	movl	$2, 32(%rsp,%rax,4)
	incq	%rax
	cmpq	$25, %rax
	jne	.LBB8_1
# %bb.2:                                # %.preheader92.preheader
	movl	$4, %eax
	movl	%edi, %ecx
.LBB8_3:                                # %.preheader92
                                        # =>This Inner Loop Header: Depth=1
	movslq	%ecx, %r9
	imulq	$1431655766, %r9, %rcx          # imm = 0x55555556
	movq	%rcx, %r10
	shrq	$63, %r10
	shrq	$32, %rcx
	addl	%r10d, %ecx
	leal	(%rcx,%rcx,2), %r10d
	subl	%r10d, %r9d
	movl	%r9d, (%rsp,%rax,4)
	addq	$-1, %rax
	jb	.LBB8_3
# %bb.4:                                # %.preheader91.preheader
	movq	%rsp, %rax
	xorl	%ecx, %ecx
.LBB8_5:                                # %.preheader91
                                        # =>This Inner Loop Header: Depth=1
	movslq	(%rax), %r9
	leaq	(%rcx,%r9,2), %r10
	addq	%r9, %r9
	movslq	(%r8,%r10,4), %r10
	addl	%ecx, %r9d
	incl	%r9d
	movslq	%r9d, %r9
	movl	(%r8,%r9,4), %r9d
	movl	%r9d, 32(%rsp,%r10,4)
	addq	$6, %rcx
	addq	$4, %rax
	cmpq	$24, %rcx
	jne	.LBB8_5
# %bb.6:                                # %.preheader90.preheader
	movl	$4, %eax
.LBB8_7:                                # %.preheader90
                                        # =>This Inner Loop Header: Depth=1
	movslq	%esi, %rcx
	imulq	$1431655766, %rcx, %rsi         # imm = 0x55555556
	movq	%rsi, %r9
	shrq	$63, %r9
	shrq	$32, %rsi
	addl	%r9d, %esi
	leal	(%rsi,%rsi,2), %r9d
	subl	%r9d, %ecx
	movl	%ecx, (%rsp,%rax,4)
	addq	$-1, %rax
	jb	.LBB8_7
# %bb.8:                                # %.preheader89.preheader
	movq	%rsp, %rax
	movl	$30, %ecx
.LBB8_9:                                # %.preheader89
                                        # =>This Inner Loop Header: Depth=1
	movslq	(%rax), %rsi
	leaq	(%rcx,%rsi,2), %r9
	addq	%rsi, %rsi
	movslq	(%r8,%r9,4), %r9
	addl	%ecx, %esi
	incl	%esi
	movslq	%esi, %rsi
	movl	(%r8,%rsi,4), %esi
	movl	%esi, 32(%rsp,%r9,4)
	addq	$4, %rax
	addq	$6, %rcx
	cmpq	$54, %rcx
	jne	.LBB8_9
# %bb.10:                               # %.preheader88.preheader
	movl	$4, %eax
.LBB8_11:                               # %.preheader88
                                        # =>This Inner Loop Header: Depth=1
	movslq	%edx, %rcx
	imulq	$1431655766, %rcx, %rdx         # imm = 0x55555556
	movq	%rdx, %rsi
	shrq	$63, %rsi
	shrq	$32, %rdx
	addl	%esi, %edx
	leal	(%rdx,%rdx,2), %esi
	subl	%esi, %ecx
	movl	%ecx, (%rsp,%rax,4)
	addq	$-1, %rax
	jb	.LBB8_11
# %bb.12:                               # %.preheader87.preheader
	movq	%rsp, %rax
	movl	$60, %ecx
.LBB8_13:                               # %.preheader87
                                        # =>This Inner Loop Header: Depth=1
	movslq	(%rax), %rdx
	leaq	(%rcx,%rdx,2), %rsi
	addq	%rdx, %rdx
	movslq	(%r8,%rsi,4), %rsi
	addl	%ecx, %edx
	incl	%edx
	movslq	%edx, %rdx
	movl	(%r8,%rdx,4), %edx
	movl	%edx, 32(%rsp,%rsi,4)
	addq	$4, %rax
	addq	$6, %rcx
	cmpq	$84, %rcx
	jne	.LBB8_13
# %bb.14:                               # %.preheader86.preheader
	movl	$4, %eax
.LBB8_15:                               # %.preheader86
                                        # =>This Inner Loop Header: Depth=1
	movslq	%edi, %rcx
	imulq	$1431655766, %rcx, %rdi         # imm = 0x55555556
	movq	%rdi, %rdx
	shrq	$63, %rdx
	shrq	$32, %rdi
	addl	%edx, %edi
	leal	(%rdi,%rdi,2), %edx
	subl	%edx, %ecx
	movl	%ecx, (%rsp,%rax,4)
	addq	$-1, %rax
	jb	.LBB8_15
# %bb.16:                               # %.preheader85.preheader
	movq	%rsp, %rax
	movl	$90, %ecx
.LBB8_17:                               # %.preheader85
                                        # =>This Inner Loop Header: Depth=1
	movslq	(%rax), %rdx
	leaq	(%rcx,%rdx,2), %rsi
	addq	%rdx, %rdx
	movslq	(%r8,%rsi,4), %rsi
	addl	%ecx, %edx
	incl	%edx
	movslq	%edx, %rdx
	movl	(%r8,%rdx,4), %edx
	movl	%edx, 32(%rsp,%rsi,4)
	addq	$4, %rax
	addq	$6, %rcx
	cmpq	$114, %rcx
	jne	.LBB8_17
# %bb.18:                               # %.preheader.preheader
	xorl	%ebx, %ebx
.LBB8_19:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	32(%rsp,%rbx,4), %edx
	cmpl	$2, %edx
	jne	.LBB8_21
# %bb.20:                               #   in Loop: Header=BB8_19 Depth=1
	movl	$.L.str.10, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB8_22
.LBB8_21:                               #   in Loop: Header=BB8_19 Depth=1
	movl	$.L.str.11, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
.LBB8_22:                               #   in Loop: Header=BB8_19 Depth=1
	incq	%rbx
	cmpq	$25, %rbx
	jne	.LBB8_19
# %bb.23:
	movl	$.Lstr.5, %edi
	addq	$144, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end8:
	.size	_Z13print_detailsiiiiPi, .Lfunc_end8-_Z13print_detailsiiiiPi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11sat_Kernel1PiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11sat_Kernel2PiS_S_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	ind,@object                     # @ind
	.bss
	.globl	ind
	.p2align	2, 0x0
ind:
	.long	0                               # 0x0
	.size	ind, 4

	.type	_Z11sat_Kernel1PiS_i,@object    # @_Z11sat_Kernel1PiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z11sat_Kernel1PiS_i
	.p2align	3, 0x0
_Z11sat_Kernel1PiS_i:
	.quad	_Z26__device_stub__sat_Kernel1PiS_i
	.size	_Z11sat_Kernel1PiS_i, 8

	.type	_Z11sat_Kernel2PiS_S_S_,@object # @_Z11sat_Kernel2PiS_S_S_
	.globl	_Z11sat_Kernel2PiS_S_S_
	.p2align	3, 0x0
_Z11sat_Kernel2PiS_S_S_:
	.quad	_Z26__device_stub__sat_Kernel2PiS_S_S_
	.size	_Z11sat_Kernel2PiS_S_S_, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"x%d"
	.size	.L.str.2, 4

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"~x%d"
	.size	.L.str.3, 5

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	" * "
	.size	.L.str.6, 4

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"\nx%d : Dont Care(0 or 1)"
	.size	.L.str.10, 25

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"\nx%d : %d"
	.size	.L.str.11, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11sat_Kernel1PiS_i"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11sat_Kernel2PiS_S_S_"
	.size	.L__unnamed_2, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\nRandom generated boolean expression with 25 variables and 20 clasues(with 3 literals) in Conjunctive normal form\n"
	.size	.Lstr, 115

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\n"
	.size	.Lstr.2, 2

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	" \nThe CNF is not satisfiable !! \n"
	.size	.Lstr.3, 34

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	" \nThe CNF is satisfiable with the following assignment \n"
	.size	.Lstr.4, 57

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"\n\n"
	.size	.Lstr.5, 3

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__sat_Kernel1PiS_i
	.addrsig_sym _Z26__device_stub__sat_Kernel2PiS_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11sat_Kernel1PiS_i
	.addrsig_sym _Z11sat_Kernel2PiS_S_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11sat_Kernel1PiS_i    ; -- Begin function _Z11sat_Kernel1PiS_i
	.globl	_Z11sat_Kernel1PiS_i
	.p2align	8
	.type	_Z11sat_Kernel1PiS_i,@function
_Z11sat_Kernel1PiS_i:                   ; @_Z11sat_Kernel1PiS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr8
	v_mov_b32_e32 v4, 1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	v_mov_b32_e32 v3, 0
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_mov_b32_e32 v3, -5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_mov_b64 s[6:7], 4
	global_store_b32 v[0:1], v4, off
                                        ; implicit-def: $vgpr4
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	v_mul_hi_i32 v9, 0x55555556, v2
	s_cmp_eq_u32 s6, 4
	v_add_co_u32 v3, s8, v3, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 3
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v10, 31, v9
	s_cmp_eq_u32 s6, 2
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s6, 1
	v_add_nc_u32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v10, v9, 1, v9
	v_sub_nc_u32_e32 v10, v2, v10
	v_mov_b32_e32 v2, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v8, v8, v10, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 0
	v_cndmask_b32_e32 v5, v5, v10, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v7, v7, v10, s2
	v_cndmask_b32_e64 v6, v6, v10, s3
	v_cndmask_b32_e32 v4, v4, v10, vcc_lo
	s_add_u32 s6, s6, -1
	s_addc_u32 s7, s7, -1
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB0_1
; %bb.2:                                ; %.preheader.preheader
	v_mov_b32_e32 v2, 2
	s_mov_b32 s2, 0
.LBB0_3:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s2, 16
	s_add_i32 s2, s2, 4
	scratch_store_b32 off, v2, s3
	s_cmpk_lg_i32 s2, 0x64
	s_cbranch_scc1 .LBB0_3
; %bb.4:
	s_load_b32 s0, s[0:1], 0x10
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr8
                                        ; implicit-def: $sgpr10
                                        ; implicit-def: $sgpr9
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s0, 5
	s_mul_i32 s3, s0, 30
	s_add_i32 s6, s1, 3
	s_add_i32 s7, s1, -1
	s_mov_b64 s[0:1], 0
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 1
	s_mov_b32 s11, exec_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 2
	v_cndmask_b32_e32 v2, v4, v5, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v6, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 4
	v_cndmask_b32_e32 v2, v2, v7, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_or_b32 s9, s9, exec_lo
	s_or_b32 s10, s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	v_lshl_add_u32 v2, v2, 1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v2, v2, 2, 16
	scratch_load_b32 v9, v2, off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v9, v9, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 1, v9
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_add_i32 s12, s7, s0
	s_add_i32 s3, s3, 6
	s_cmp_ge_i32 s12, s6
	scratch_store_b32 v2, v3, off
	s_cselect_b32 s12, -1, 0
	s_and_not1_b32 s10, s10, exec_lo
	s_and_b32 s12, s12, exec_lo
	s_and_not1_b32 s9, s9, exec_lo
	s_or_b32 s10, s10, s12
.LBB0_7:                                ; %Flow
                                        ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s11, exec_lo, s10
	s_or_b32 s2, s11, s2
	s_and_not1_b32 s8, s8, exec_lo
	s_and_b32 s11, s9, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s8, s8, s11
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_5
; %bb.8:                                ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s0, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_10
; %bb.9:
	v_mov_b32_e32 v2, 0
	global_store_b32 v[0:1], v2, off
.LBB0_10:                               ; %.loopexit
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11sat_Kernel1PiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 128
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11sat_Kernel1PiS_i, .Lfunc_end0-_Z11sat_Kernel1PiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 608
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 128
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11sat_Kernel2PiS_S_S_ ; -- Begin function _Z11sat_Kernel2PiS_S_S_
	.globl	_Z11sat_Kernel2PiS_S_S_
	.p2align	8
	.type	_Z11sat_Kernel2PiS_S_S_,@function
_Z11sat_Kernel2PiS_S_S_:                ; @_Z11sat_Kernel2PiS_S_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b256 s[4:11], s[0:1], 0x0
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr6
	v_mov_b32_e32 v7, -5
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s2, 0xffff
	s_mov_b64 s[2:3], 4
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v8, v[2:3], off
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr3
.LBB1_1:                                ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_mul_hi_i32 v9, 0x55555556, v8
	s_cmp_eq_u32 s2, 4
	v_add_co_u32 v7, s6, v7, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 3
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v10, 31, v9
	s_cmp_eq_u32 s2, 2
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s2, 1
	v_add_nc_u32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v10, v9, 1, v9
	v_sub_nc_u32_e32 v10, v8, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v6, v6, v10, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 0
	v_dual_mov_b32 v8, v9 :: v_dual_cndmask_b32 v3, v3, v10
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v5, v5, v10, s0
	v_cndmask_b32_e64 v4, v4, v10, s1
	v_cndmask_b32_e32 v2, v2, v10, vcc_lo
	s_add_u32 s2, s2, -1
	s_addc_u32 s3, s3, -1
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_1
; %bb.2:                                ; %.preheader40.preheader
	v_mov_b32_e32 v7, 2
	s_mov_b32 s0, 0
.LBB1_3:                                ; %.preheader40
                                        ; =>This Inner Loop Header: Depth=1
	s_load_b32 s1, s[8:9], 0x0
	s_add_i32 s2, s0, 16
	s_add_i32 s3, s0, 0x80
	s_add_i32 s0, s0, 4
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	s_cmpk_lg_i32 s0, 0x64
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v8, s1
	scratch_store_b32 off, v7, s3
	scratch_store_b32 off, v8, s2
	s_cbranch_scc1 .LBB1_3
; %bb.4:                                ; %.preheader39.preheader
	s_mov_b64 s[0:1], 0x5a
	s_mov_b64 s[2:3], 0
.LBB1_5:                                ; %.preheader39
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 2
	v_cndmask_b32_e32 v7, v2, v3, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v4, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 4
	v_cndmask_b32_e32 v7, v7, v5, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v7, v6, vcc_lo
	v_lshlrev_b32_e32 v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_add_co_u32 v7, vcc_lo, s0, v7
	s_add_u32 s0, s0, 6
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_addc_u32 s1, s1, 0
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_cmpk_lg_i32 s0, 0x72
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v7, v7, 2, 0x80
	scratch_store_b32 v7, v8, off
	s_cbranch_scc1 .LBB1_5
; %bb.6:                                ; %.preheader.preheader
	s_mov_b32 s0, 0
	s_mov_b32 s1, 0
                                        ; implicit-def: $sgpr2
.LBB1_7:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s1, 16
	s_add_i32 s4, s1, 0x80
	scratch_load_b32 v2, off, s3
	scratch_load_b32 v3, off, s4
	s_or_b32 s2, s2, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	v_mov_b32_e32 v2, 0
	s_and_saveexec_b32 s3, vcc_lo
; %bb.8:                                ;   in Loop: Header=BB1_7 Depth=1
	s_add_i32 s1, s1, 4
	v_mov_b32_e32 v2, 1
	s_cmpk_eq_i32 s1, 0x64
	s_cselect_b32 s4, -1, 0
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s4
; %bb.9:                                ; %Flow
                                        ;   in Loop: Header=BB1_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, exec_lo, s2
	s_or_b32 s0, s3, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_7
; %bb.10:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11sat_Kernel2PiS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 240
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11sat_Kernel2PiS_S_S_, .Lfunc_end1-_Z11sat_Kernel2PiS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 656
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 240
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11sat_Kernel1PiS_i
    .private_segment_fixed_size: 128
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11sat_Kernel1PiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11sat_Kernel2PiS_S_S_
    .private_segment_fixed_size: 240
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11sat_Kernel2PiS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
