#include <cstdio>

#define EMPTY 0
#define WHITE 1
#define BLACK 2
#define QUEENW 11
#define QUEENB 22

struct checkers_point{
    int board[64];
    int how_much_children;
    checkers_point * children = NULL;
    checkers_point * next = NULL;
    checkers_point * prev = NULL;
    checkers_point * parent = NULL;
    checkers_point * tempnext = NULL;
    bool min_max;
    int value;
    int alpha = -1000000000;
    int beta = 1000000000;
    int player;
};

struct next_kill{
    int t[4];
    next_kill * next = NULL;
    int * parent_tab;
};

class Queue{
    private:
        checkers_point * first = NULL;
        checkers_point * last = NULL;
        int size = 0;
    public:
		__device__
			void add_one(checkers_point * point) {
				if(point == NULL)
					return;
				if(first == NULL) {
					this->first = point;
					this->last = point;
				}
				else {
					this->last->tempnext = this->last->next;
					this->last->next = point;
					this->last = point;
				}
				this->size = this->size + 1;
			}
        __device__
            void add(checkers_point * layer) {
				if(layer == NULL)
					return;
				int counter = 0;
                if(this->first == NULL) {
                    this->first = layer;
                }
                else {
                    this->last->next=layer;
                }
				checkers_point * temp = layer;
				counter+=1;
				while(temp->next != NULL) {
					temp = temp->next;
					counter+=1;
				}
				this->last = temp;
				this->size = this->size + counter;
            }
		
		__device__
			checkers_point * pop() {
				checkers_point * firs,* seco;
				firs = this->first;

				if(firs == NULL)
					return NULL;
				else
					seco = firs->next;
				if(seco==NULL || firs->parent != seco->parent) {
					firs->next = NULL;
					 first->next=first->tempnext;
				}
				this->first = seco;
				this->size = this->size - 1;
				return firs;
			}
		
		__device__
			bool empty() {
				return this->size == 0;
			}

		__device__
			int get_size() {
			return this->size;
		}

		__device__
		    checkers_point * front() {
                return this->first;
            }

		__device__
			void clean() {
				while(this->size > 0)
					this->pop();
			}
};

extern "C" {


__device__
int pawn_owner(int * tab, int x, int y){
    if (tab[x*8+y] == BLACK || tab[x*8+y] == QUEENB)
        return BLACK;
    if (tab[x*8+y] == WHITE || tab[x*8+y] == QUEENW)
        return WHITE;
    return EMPTY;
}

__device__
bool create_queen(int * tab, int x, int y){
    int n = 8;
    if ((x != 0 && x != n-1) ||
        (tab[x*n+y] != WHITE && tab[x*n+y] != BLACK) ||
        (x == 0 && tab[x*n+y] == BLACK) ||
        (x == n-1 && tab[x*n+y] == WHITE))
        return false;
    if (tab[x*n+y] == WHITE)
        tab[x*n+y] = QUEENW;
    else
        tab[x*n+y] = QUEENB;
    return true;
}

__device__
bool is_queen(int * tab, int x, int y){
	int n = 8;
    return (tab[x*n+y] == QUEENB || tab[x*n+y] == QUEENW);
}

__device__
bool is_a_pawn(int * tab, int x, int y){
    return !(tab[x*8+y] == EMPTY);
}

__device__
bool correct_kill(int * tab, int x, int y, int x1, int y1){
    if (!is_a_pawn(tab, x1, y1))
	return false;
    if (pawn_owner(tab, x, y) != pawn_owner(tab, x1, y1))
        return true;
    return false;
}

__device__
bool queen_way(int * tab, int x, int y, int x1, int y1){
    int own = pawn_owner(tab, x, y);
    int x_r = x > x1 ? -1 : 1, y_r = y > y1 ? -1 : 1;
    bool next_empty = false;
    x += x_r; y += y_r;
    while (x != x1){
        if (!(tab[x*8+y] == EMPTY)){
            if (next_empty)
                return false;
            next_empty = true;
            if (pawn_owner(tab, x, y) == own)
                return false;
        } else {
            next_empty = false;
        }
        x += x_r; y += y_r;
    }
    return true;
}

__device__
bool is_move_correct(int * tab, int x, int y, int who, int x1, int y1){
    int n = 8;
    if (x < 0 || x >= n || x1 < 0 || x1 >= n || y < 0 || y >= n || y1 < 0 || y1 >= n ){
//	printf("WRONG VALUE");
        return false;
    }
    if (std::abs(x-x1) != std::abs(y-y1)){
//	printf("ABS PROBLEM");
        return false;
    }
    int pwn_wnr = pawn_owner(tab, x, y);
    if (pwn_wnr == EMPTY){
//	printf("PAWN OWNER EMPTY");
        return false;
    }
    if (pwn_wnr != who){
//	printf("pwn_wnr != who");
        return false;
    }
    if (is_a_pawn(tab, x1, y1)){
//	printf("pawn in _");
        return false;
    }
    if (x < x1 && who == WHITE && tab[x*n+y] != QUEENW){
//	printf("WHITE WRONG WAY");
        return false;
    }
    if (x > x1 && who == BLACK && tab[x*n+y] != QUEENB){
//	printf("BLACK WRONG WAY");
        return false;
    }
    if ((tab[x*n+y] == QUEENW || tab[x*n+y] == QUEENB) && (!queen_way(tab, x, y, x1, y1))){
//        printf("queen problem");
	return false;
    }
    if (!is_queen(tab, x, y) && std::abs((x-x1)) > 1 && !correct_kill(tab, x, y, (x1+x)/2, (y1+y)/2)){
//      printf("Correct kill problem");
	return false;
    }
    return true;
}

__device__
	next_kill * create_next_move(int x, int y, int * par_tb, int x1, int y1){
	next_kill * res = new next_kill;
        res->t[0] = x; res->t[1] = y;
        res->t[2] = x1; res->t[3] = y1;
	res->parent_tab = par_tb;
	return res;
}

__device__
	void copy_board(int * ch, checkers_point * ch2){
		for (int i = 0; i < 64; i++){
			ch2->board[i] = ch[i];
		}
	}


__device__
	void kill(int x, int y, int * tab){
    	    tab[x*8+y] = EMPTY;
	}

__device__
	bool has_next_move(int x, int y, int x1, int y1, int * tab, bool kiiil){
        int kll = 0;
        int x_r = x > x1 ? -1 : 1, y_r = y > y1 ? -1 : 1;
            while (x != x1){
                if (is_a_pawn(tab, x, y)){
		    if (kiiil)
                        kill(x, y, tab);
                    kll++;
                }
            x += x_r; y += y_r;
            }
        return (kll > 0);
	}

__device__
	checkers_point * again_queen(checkers_point * ch, next_kill * first, next_kill * last){
	return ch;
	}

__device__
	next_kill * queen_move_again_again(int * tab, int x1, int y1, int x, int y, next_kill * last){
		if (is_move_correct(tab, x1, y1, pawn_owner(tab, x1, y1), x, y)
                         && has_next_move(x1, y1, x, y, tab, false)) {
                     last->next = create_next_move(x1, y1, tab, x, y);
                     last = last->next;
                }
		return last;
	}

__device__
	checkers_point * again(checkers_point * ch, next_kill * first, next_kill * last, int pm){
	int x = first->t[0], y = first->t[1], x1 = first->t[2], y1 = first->t[3], * tab = first->parent_tab;
	if(is_move_correct(tab, x, y, pawn_owner(tab, x, y), x1, y1)){
		checkers_point * chld;
		ch->next = new checkers_point;
                ch->next->parent = ch->parent;
                ch->next->prev = ch;
		ch->next->tempnext = NULL;
                chld = ch->next;
		chld->min_max = !chld->parent->min_max;
		chld->alpha = -1000000000;
		chld->beta = 1000000000;
		copy_board(tab, chld);
		chld->parent->how_much_children++;
		chld->board[x1*8+y1] = chld->board[x*8+y];
                chld->board[x*8+y] = EMPTY;
                chld->board[(x+x1)/2*8+(y+y1)/2] = EMPTY;
                ch = chld;
		create_queen(ch->board, x1, y1);
		last->next = create_next_move(x1, y1, ch->board, x1+pm, y1+2);
		last = last->next;
		last->next = create_next_move(x1, y1, ch->board, x1+pm, y1-2);
		last = last->next;
	}
	return ch;
}

__device__
	checkers_point * pawn(checkers_point * ch, int x, int y, int x1, int y1, bool &nxt, bool iskillsomethingnow, bool queen){
		int * tab = ch->board;
		if (ch->parent != NULL)
			tab = ch->parent->board;
		if (is_move_correct(tab, x, y, pawn_owner(tab, x, y), x1, y1) == true){
//			printf("correct ");
			checkers_point * chld;
                        if (!nxt){
//				printf("chld ");
                                ch->children = new checkers_point;
				ch->children->parent = ch;
				ch->children->prev = NULL;
				ch->children->tempnext = NULL;
				chld = ch->children;
                        } else {
//				printf("next ");
				ch->next = new checkers_point;
				ch->next->parent = ch->parent;
				ch->next->prev = ch;
				ch->next->tempnext = NULL;
				chld = ch->next;
			}
			chld->min_max = !chld->parent->min_max;
			chld->alpha = -1000000000;
			chld->beta = 1000000000;
			chld->how_much_children = 0;
			chld->next = chld->children = NULL;
			copy_board(chld->parent->board, chld);
			chld->parent->how_much_children++;
                        chld->board[x1*8+y1] = chld->board[x*8+y];
                        chld->board[x*8+y] = EMPTY;
			if (iskillsomethingnow && queen == false)
                            chld->board[(x+x1)/2*8+(y+y1)/2] = EMPTY;
			ch = chld;
			nxt = true;
			if (!iskillsomethingnow)
			    create_queen(ch->board, x1, y1);
//			printf("%d, %d -> %d, %d\n", x, y, x1, y1);
			if (iskillsomethingnow && queen == false && (create_queen(ch->board, x1, y1) == false)){
				int pm;
				if (ch->board[x1*8+y1] == WHITE){
					pm = -2;
				} else {
					pm = 2;
				}
				next_kill * first, * last, * temp;
				first = create_next_move(x1, y1, ch->board, x1+pm, y1+2);
				first->next = last = create_next_move(x1, y1, ch->board, x1+pm, y1-2);
				while (first != NULL){
					ch = again(ch, first, last, pm);
					while (last->next != NULL)
						last = last->next;
					temp = first;
					first = first->next;
					delete temp;
				}
			}
		        
			if (queen && has_next_move(x1, y1, x, y, tab, true)){
				/*next_kill * first, * last, * temp;
                                first = create_next_move(x1, y1, ch->board, x1+1, y1+1);
				first->next = last = create_next_move(x1, y1, ch->board, x1-1, y1+1);
                                last->next = create_next_move(x1, y1, ch->board, x1+1, y1-1);
				last = last->next;
				last->next = create_next_move(x1, y1, ch->board, x1-1, y1-1);
				last = last->next;
				for (int i = 2; i < 8; i++){
					last = queen_move_again_again(tab, x1, y1, x1+i, y1+i, last);
					last = queen_move_again_again(tab, x1, y1, x1+i, y1-i, last);
					last = queen_move_again_again(tab, x1, y1, x1-i, y1+i, last);
					last = queen_move_again_again(tab, x1, y1, x1-i, y1-i, last);
				}
                                while (first != NULL){
                                        ch = again_queen(ch, first, last);
                                        while (last->next != NULL)
                                                last = last->next;
                                        temp = first;
                                        first = first->next;
                                        delete temp;
                                }*/
			}

		}
		return ch;
	}

__device__
    checkers_point * dismember_child(checkers_point * ch, int x, int y, int turn_no, bool &nxt, int player){
	checkers_point * chb = ch->parent;
	if (!nxt){
//		printf(" NO PARENT ");
		chb = ch;
	}
	/*
	printf("NR %d\n", chb->value);
	for (int i = 0; i < 64; i++)
		printf("%d ", chb->board[i]);
	printf("\n");
	*/
        int ww = 1, bb = 0;
        if (player == BLACK){
	    ww = 0;
	    bb = 1;
	}
	switch(chb->board[x*8+y]){
	    case WHITE:
		if (turn_no % 2 == ww){
//		printf("WHITE ");
		ch = pawn(ch, x, y, x-1, y-1, nxt, false, false);
                ch = pawn(ch, x, y, x-1, y+1, nxt, false, false);
		ch = pawn(ch, x, y, x-2, y-2, nxt, true, false);
		ch = pawn(ch, x, y, x-2, y+2, nxt, true, false);
		}
		break;
	    case BLACK:
		if (turn_no % 2 == bb){
//		printf("BLACK %d %d", x, y);
		ch = pawn(ch, x, y, x+1, y-1, nxt, false, false);
                ch = pawn(ch, x, y, x+1, y+1, nxt, false, false);
		ch = pawn(ch, x, y, x+2, y-2, nxt, true, false);
                ch = pawn(ch, x, y, x+2, y+2, nxt, true, false);
		}
		break;
	    case QUEENB:
		if (turn_no % 2 == bb){
		    /*for (int i = 0; i < 8; i++){
			ch = pawn(ch, x, y, x+i, y-i, nxt, false, true);
			ch = pawn(ch, x, y, x+i, y+i, nxt, false, true);
			ch = pawn(ch, x, y, x-i, y-i, nxt, false, true);
			ch = pawn(ch, x, y, x-i, y+i, nxt, false, true);
		    }*/
                        ch = pawn(ch, x, y, x+1, y-1, nxt, false, true);
                        ch = pawn(ch, x, y, x+1, y+1, nxt, false, true);
                        ch = pawn(ch, x, y, x-1, y-1, nxt, false, true);
                        ch = pawn(ch, x, y, x-1, y+1, nxt, false, true);
                        ch = pawn(ch, x, y, x+2, y-2, nxt, false, true);
                        ch = pawn(ch, x, y, x+2, y+2, nxt, false, true);
                        ch = pawn(ch, x, y, x-2, y-2, nxt, false, true);
                        ch = pawn(ch, x, y, x-2, y+2, nxt, false, true);
		}
		break;
	    case QUEENW:
                if (turn_no % 2 == ww){/*
                    for (int i = 0; i < 8; i++){
			ch = pawn(ch, x, y, x+i, y-i, nxt, false, true);
                        ch = pawn(ch, x, y, x+i, y+i, nxt, false, true);
                        ch = pawn(ch, x, y, x-i, y-i, nxt, false, true);
                        ch = pawn(ch, x, y, x-i, y+i, nxt, false, true);
                    }*/
                        ch = pawn(ch, x, y, x+1, y-1, nxt, false, true);
                        ch = pawn(ch, x, y, x+1, y+1, nxt, false, true);
                        ch = pawn(ch, x, y, x-1, y-1, nxt, false, true);
                        ch = pawn(ch, x, y, x-1, y+1, nxt, false, true);
                        ch = pawn(ch, x, y, x+2, y-2, nxt, false, true);
                        ch = pawn(ch, x, y, x+2, y+2, nxt, false, true);
                        ch = pawn(ch, x, y, x-2, y-2, nxt, false, true);
                        ch = pawn(ch, x, y, x-2, y+2, nxt, false, true);
                }
		break;
	    default:
		break;
	}
	return ch;
    }

__device__
//add global size
    void ramification(checkers_point * ch2, int thid, int how_deep, int player){
	bool nxt = false;
	//printf("!%d!\n", how_deep);
	for (int i = 0; i < 8*8; i++){
	    if (ch2->board[i] != EMPTY){
		ch2 = dismember_child(ch2, i/8, i % 8, how_deep, nxt, player);
	    }
	}
    }

__global__
    void create_tree(int n, checkers_point * ch, int how_deep, int player){
        int thid = (blockIdx.x * blockDim.x) + threadIdx.x;
        int find_me = thid;
        int count_group = n;
            __syncthreads();
        if (thid < n){
            checkers_point * ch2 = ch;
            for (int i = 0; i < how_deep; i++){
                if (find_me == 0 && i + 1 == how_deep){
                    ramification(ch2, thid, how_deep, player);
                }
                __syncthreads();
                if (i + 1 == how_deep)
                    break;
                count_group = count_group/ch2->how_much_children;
                int group = find_me/count_group;
                if (group >= ch2->how_much_children)
                    break;
                find_me = find_me % count_group;
                ch2 = ch2->children;
		if (ch2 == NULL)
			break;
                for (int k = 0; k < group; k++){
                    ch2 = ch2->next;
		    if (ch2 == NULL)
			break;
		}
		if (ch2 == NULL)
			break;
                __syncthreads();
            }
        }
    }

__global__
    void delete_tree(checkers_point * ch, int thread_num, checkers_point ** V) {
        int thid = (blockIdx.x * blockDim.x) + threadIdx.x;
		__shared__ int count;
		count = 0;
		if(thid == 0){
	//	printf("delete_tree");
            checkers_point * child = ch->children;
            checkers_point * temp;
            Queue Q;

            Q.add(child);
            while(!Q.empty() && Q.get_size()+Q.front()->how_much_children < thread_num) {
                temp = Q.pop();
                if(temp->children !=NULL)
                    Q.add(temp->children);
				delete temp;
            }

            while(!Q.empty()) {
				temp = Q.pop();
				V[count]=temp;
				count++;
			}
        }
        __syncthreads();
        if(thid < count) {
            checkers_point * my_child = V[thid];
            Queue Q;
        	checkers_point * temp, * child;
        	Q.add_one(my_child);

        	while(!Q.empty()) {
            	temp = Q.pop();

            	child = temp->children;
				if(child != NULL)
            		Q.add(child);
            	delete temp;
			}
		}
    }

__device__
	int calculate_pawns_value(int * tab){
    	int count = 0;
		int n=8;
    	for(int i=0;i<n*n;i++){
        	if(tab[i] == WHITE)
            	count+=3;
        	else if(tab[i] == QUEENW)
            	count+=5;
        	else if(tab[i] == BLACK)
            	count-=3;
        	else if(tab[i] == QUEENB)
        	    count-=5;
    	}
    	return (int)(((49.5*count)/57.0) + 49.5);
	}

__device__
	int calculate_dist_to_be_queen(int * tab){
		int n=8;
    	int black_count=0,white_count=0,black_dist=0,white_dist=0;
    	for(int row=0;row<n;row++){
        	for(int col=0;col<n;col++){
            	if(tab[row*n+col] == WHITE){
                	white_count++;
                	white_dist+=(n-1-row);
            	}
            	else if(tab[row*n+col] == BLACK){
                	black_count++;
                	black_dist+=row;
            	}
        	}
    	}
    	double black_val, white_val;
    	if(white_count == 0)
        	white_val = 0;
    	else
        	white_val = (double)white_dist/(double)white_count;
    	if(black_count == 0)
        	black_val = 0;
    	else
        	black_val = (double)black_dist/(double)black_count;
    	double value = black_val - white_val;
    	return (int)(0.495*value + 49.5);
	}

__device__
	int calculate_future_queen_kills(int * tab){
	int n=8;
    int * kill_tab = new int [n*n];
    int temp_row,temp_col,white_count=0,black_count=0,white_dead=0,black_dead=0;
    for(int row=0;row<n;row++){
        for(int col=0;col<n;col++){
            kill_tab[row*n+col] = EMPTY;
            if(tab[row*n+col] == QUEENB || tab[row*n+col] == QUEENW){
                temp_row = row-1;
                temp_col = col-1;
                while(temp_row >= 1 && temp_col >= 1){
                    if(is_a_pawn(tab,temp_row,temp_col)){
                        if(pawn_owner(tab,row,col) == pawn_owner(tab,temp_row,temp_col))
                            break;
                        else if(is_a_pawn(tab,temp_row-1,temp_col-1))
                            break;
                        else{
                            kill_tab[temp_row*n+temp_col] = pawn_owner(tab,temp_row,temp_col);
                            temp_row--;
                            temp_col--;
                        }
                    }
                    temp_row--;
                    temp_col--;
                }
                temp_row = row-1;
                temp_col = col+1;
                while(temp_row >= 1 && temp_col <= n-2){
                    if(is_a_pawn(tab,temp_row,temp_col)){
                        if(pawn_owner(tab,row,col) == pawn_owner(tab,temp_row,temp_col))
                            break;
                        else if(is_a_pawn(tab,temp_row-1,temp_col+1))
                            break;
                        else{
                            kill_tab[temp_row*n+temp_col] = pawn_owner(tab,temp_row,temp_col);
                            temp_row--;
                            temp_col++;
                        }
                    }
                    temp_row--;
                    temp_col++;
                }
                temp_row = row+1;
                temp_col = col-1;
                while(temp_row <= n-2 && temp_col >= 1){
                    if(is_a_pawn(tab,temp_row,temp_col)){
                        if(pawn_owner(tab,row,col) == pawn_owner(tab,temp_row,temp_col))
                            break;
                        else if(is_a_pawn(tab,temp_row+1,temp_col-1))
                            break;
                        else{
                            kill_tab[temp_row*n+temp_col] = pawn_owner(tab,temp_row,temp_col);
                            temp_row++;
                            temp_col--;
                        }
                    }
                    temp_row++;
                    temp_col--;
                }
                temp_row = row+1;
                temp_col = col+1;
                while(temp_row <= n-2 && temp_col <= n-2){
                    if(is_a_pawn(tab,temp_row,temp_col)){
                        if(pawn_owner(tab,row,col) == pawn_owner(tab,temp_row,temp_col))
                            break;
                        else if(is_a_pawn(tab,temp_row+1,temp_col+1))
                            break;
                        else{
                            kill_tab[temp_row*n+temp_col] = pawn_owner(tab,temp_row,temp_col);
                            temp_row++;
                            temp_col++;
                        }
                    }
                    temp_row++;
                    temp_col++;
                }
            }
        }
    }
    for(int row=0;row<n;row++){
        for(int col=0;col<n;col++){
            if(kill_tab[row*n+col] == WHITE)
                white_dead++;
            else if(kill_tab[row*n+col] == BLACK)
                black_dead++;
            if(is_a_pawn(tab,row,col)){
                if(pawn_owner(tab,row,col) == WHITE)
                    white_count++;
                else
                    black_count++;
            }
        }
    }
    double black_percent,white_percent;
    if(black_count == 0)
        black_percent = 1.0;
    else
        black_percent = (double)black_dead/(double)black_count;
    if(white_count == 0)
        white_percent = 1.0;
    else
        white_percent = (double)white_dead/(double)white_count;
    int value = white_percent - black_percent;
	delete kill_tab;
    return 49.5*value+49.5;
}

__device__
    int calculate_board_value(int * Board){
	    int value;
	    value=calculate_pawns_value(Board);
    	value=100*value+calculate_dist_to_be_queen(Board);
    	value=100*value+calculate_future_queen_kills(Board);
    	//value=10*value+(rand()%10);
    	return value;
}

__device__
	void minmax(checkers_point * ch) {
		//zjedz do lisci i wrzuc je na kolejke
		Queue tempQueue;
		Queue Q;
		checkers_point * temp;
		tempQueue.add_one(ch);
		while(!tempQueue.empty()) {
			temp = tempQueue.pop();
			if(temp->alpha!=-1000000000 || temp->beta!=1000000000)
				Q.add_one(temp);
            else if(temp->children==NULL) {
                int wynik = calculate_board_value(temp->board);//policz stan planszy
                temp->alpha = wynik;
                temp->beta = wynik;
                Q.add_one(temp);
            }
            else if(temp->children!=NULL)
				tempQueue.add(temp->children);
	    }
		//pamietaj parenta pierwszego z kolejki
	    checkers_point * parent = Q.front()->parent;
            Q.add_one(parent);
            //lecac po kolejce modyfikuj parenta danego liscia
            //jak parent nowego goscia jest inny niz poprzedni dorzuc poprzedni na kolejke i zastap go w zmiennej nowym
            while(!Q.empty()) {
                temp = Q.pop();
                if(temp==ch) break;
                if(temp->parent!=NULL) {
                    if(temp->min_max)
                    	temp->parent->beta = min(temp->alpha,temp->parent->beta);
                    else
               		temp->parent->alpha = max(temp->beta,temp->parent->alpha);
                }    
                if(parent!=temp->parent) {
                    if(temp->parent!=NULL)
                        Q.add_one(temp->parent);
                    parent = temp->parent;
                }
	    }
	    Q.clean();
		//tadam!

	}

__global__
    void alpha_beta(checkers_point * ch, int thread_num, checkers_point ** V) {
        //rozdziel i wrzuc do V
		int thid = (blockIdx.x * blockDim.x) + threadIdx.x;
		__shared__ int count;
		count = 0;
		if(thid == 0){
		    checkers_point * temp;
            Queue Q;
            Q.add(ch);
            while(!Q.empty() && Q.get_size()+Q.front()->how_much_children < thread_num) {
                temp = Q.pop();
                if(temp->children !=NULL)
                    Q.add(temp->children);
				temp->alpha=-1000000000;
				temp->beta=1000000000;
            }
            
            while(!Q.empty()) {
				temp = Q.pop();
				temp->alpha=-1000000000;
				temp->beta=1000000000;
				V[count]=temp;
				count++;
			}	
		}
		__syncthreads();
        //policz dla tych w V
		if(thid<count)
			minmax(V[thid]);
		__syncthreads();
        //policz w gore
		if(thid == 0) {
		    minmax(ch);
		}
		//zwroc wynik (?)
	}

__device__
    void print_tr(checkers_point * ch){
        if (ch == NULL)
            return;
	if (ch->children != NULL){
	printf("(c) %d ", ch->value);
        print_tr(ch->children);
	}
	if (ch->next != NULL){
	printf("(n) %d ", ch->value);
        print_tr(ch->next);
	}
	if (ch->next == NULL && ch->children == NULL){
        printf("%d\n", ch->value);
	for (int i = 0; i < 64; i++){
		printf("%d", ch->board[i]);
		if (i % 8 == 7)
			printf("\n");
	}
	printf("\n");
	}
    }

__global__
    void print_tree(int n, checkers_point * ch, int i, int player){
        int thid = (blockIdx.x * blockDim.x) + threadIdx.x;
        if (thid == 0){
            printf("\n\n");
//            print_tr(ch);
//            printf("____\n");
        }
    }

__global__
    void set_root(checkers_point * ch, int * tab, int size, int player){
        int thid = (blockIdx.x * blockDim.x) + threadIdx.x;
        if (thid == 0){
	    ch->value = 1;
	    ch->children = NULL;
	    ch->next = NULL;
	    ch->prev = NULL;
	    ch->parent = NULL;
	    ch->tempnext = NULL;
		ch->alpha = -1000000000;
		ch->beta = 1000000000;
	    if(player == WHITE)
	        ch->min_max = true;
        else
            ch->min_max = false;
	    ch->how_much_children = 0;
	    for (int i = 0; i < size*size; ++i)
		ch->board[i] = tab[i]; 
        }
    }

__global__
    void copy_best_result(checkers_point * ch, int * tab, int size, int player){
        int thid = (blockIdx.x * blockDim.x) + threadIdx.x;
        if (thid == 0){
	    checkers_point * ch2 = ch->children;
	    if (ch2 == NULL){
		printf("No result -> root->chidlren = NULL\n");
		return;
            }
	    if (player == WHITE){
	    while (ch->alpha != ch2->beta){
		if (ch2->next == NULL)
			break;
		ch2 = ch2->next;
	    }
	    } else {
	    while (ch->beta != ch2->alpha){
		if (ch2->next == NULL)
			break;
                ch2 = ch2->next;
	    }
	    }
            for (int i = 0; i < 64; ++i)
                tab[i] = ch2->board[i];
        }
    }

}

	.file	"tmpxft_002070f7_00000000-6_checkers.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2059:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	pawn_owner
	.type	pawn_owner, @function
pawn_owner:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2034:
	.size	pawn_owner, .-pawn_owner
	.globl	create_queen
	.type	create_queen, @function
create_queen:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2035:
	.size	create_queen, .-create_queen
	.globl	is_queen
	.type	is_queen, @function
is_queen:
.LFB2211:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2211:
	.size	is_queen, .-is_queen
	.globl	is_a_pawn
	.type	is_a_pawn, @function
is_a_pawn:
.LFB2213:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2213:
	.size	is_a_pawn, .-is_a_pawn
	.globl	correct_kill
	.type	correct_kill, @function
correct_kill:
.LFB2038:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2038:
	.size	correct_kill, .-correct_kill
	.globl	queen_way
	.type	queen_way, @function
queen_way:
.LFB2215:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2215:
	.size	queen_way, .-queen_way
	.globl	is_move_correct
	.type	is_move_correct, @function
is_move_correct:
.LFB2040:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2040:
	.size	is_move_correct, .-is_move_correct
	.globl	create_next_move
	.type	create_next_move, @function
create_next_move:
.LFB2041:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2041:
	.size	create_next_move, .-create_next_move
	.globl	copy_board
	.type	copy_board, @function
copy_board:
.LFB2042:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2042:
	.size	copy_board, .-copy_board
	.globl	kill
	.type	kill, @function
kill:
.LFB2043:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2043:
	.size	kill, .-kill
	.globl	has_next_move
	.type	has_next_move, @function
has_next_move:
.LFB2044:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2044:
	.size	has_next_move, .-has_next_move
	.globl	again_queen
	.type	again_queen, @function
again_queen:
.LFB2045:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2045:
	.size	again_queen, .-again_queen
	.globl	queen_move_again_again
	.type	queen_move_again_again, @function
queen_move_again_again:
.LFB2046:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2046:
	.size	queen_move_again_again, .-queen_move_again_again
	.globl	again
	.type	again, @function
again:
.LFB2047:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2047:
	.size	again, .-again
	.globl	pawn
	.type	pawn, @function
pawn:
.LFB2048:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2048:
	.size	pawn, .-pawn
	.globl	dismember_child
	.type	dismember_child, @function
dismember_child:
.LFB2049:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2049:
	.size	dismember_child, .-dismember_child
	.globl	ramification
	.type	ramification, @function
ramification:
.LFB2050:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2050:
	.size	ramification, .-ramification
	.globl	calculate_pawns_value
	.type	calculate_pawns_value, @function
calculate_pawns_value:
.LFB2051:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2051:
	.size	calculate_pawns_value, .-calculate_pawns_value
	.globl	calculate_dist_to_be_queen
	.type	calculate_dist_to_be_queen, @function
calculate_dist_to_be_queen:
.LFB2217:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	calculate_pawns_value
	.cfi_endproc
.LFE2217:
	.size	calculate_dist_to_be_queen, .-calculate_dist_to_be_queen
	.globl	calculate_future_queen_kills
	.type	calculate_future_queen_kills, @function
calculate_future_queen_kills:
.LFB2219:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	calculate_pawns_value
	.cfi_endproc
.LFE2219:
	.size	calculate_future_queen_kills, .-calculate_future_queen_kills
	.globl	calculate_board_value
	.type	calculate_board_value, @function
calculate_board_value:
.LFB2221:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	calculate_pawns_value
	.cfi_endproc
.LFE2221:
	.size	calculate_board_value, .-calculate_board_value
	.globl	minmax
	.type	minmax, @function
minmax:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2055:
	.size	minmax, .-minmax
	.globl	print_tr
	.type	print_tr, @function
print_tr:
.LFB2223:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	minmax
	.cfi_endproc
.LFE2223:
	.size	print_tr, .-print_tr
	.globl	_Z49__device_stub__Z11create_treeiP14checkers_pointiiiP14checkers_pointii
	.type	_Z49__device_stub__Z11create_treeiP14checkers_pointiiiP14checkers_pointii, @function
_Z49__device_stub__Z11create_treeiP14checkers_pointiiiP14checkers_pointii:
.LFB2081:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 24(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	create_tree(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L48:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2081:
	.size	_Z49__device_stub__Z11create_treeiP14checkers_pointiiiP14checkers_pointii, .-_Z49__device_stub__Z11create_treeiP14checkers_pointiiiP14checkers_pointii
	.globl	create_tree
	.type	create_tree, @function
create_tree:
.LFB2082:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z11create_treeiP14checkers_pointiiiP14checkers_pointii
	.cfi_endproc
.LFE2082:
	.size	create_tree, .-create_tree
	.globl	_Z51__device_stub__Z11delete_treeP14checkers_pointiPS0_P14checkers_pointiPS0_
	.type	_Z51__device_stub__Z11delete_treeP14checkers_pointiPS0_P14checkers_pointiPS0_, @function
_Z51__device_stub__Z11delete_treeP14checkers_pointiPS0_P14checkers_pointiPS0_:
.LFB2083:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	delete_tree(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L54:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L56
	call	__stack_chk_fail@PLT
.L56:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2083:
	.size	_Z51__device_stub__Z11delete_treeP14checkers_pointiPS0_P14checkers_pointiPS0_, .-_Z51__device_stub__Z11delete_treeP14checkers_pointiPS0_P14checkers_pointiPS0_
	.globl	delete_tree
	.type	delete_tree, @function
delete_tree:
.LFB2084:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z11delete_treeP14checkers_pointiPS0_P14checkers_pointiPS0_
	.cfi_endproc
.LFE2084:
	.size	delete_tree, .-delete_tree
	.globl	_Z50__device_stub__Z10alpha_betaP14checkers_pointiPS0_P14checkers_pointiPS0_
	.type	_Z50__device_stub__Z10alpha_betaP14checkers_pointiPS0_P14checkers_pointiPS0_, @function
_Z50__device_stub__Z10alpha_betaP14checkers_pointiPS0_P14checkers_pointiPS0_:
.LFB2085:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	alpha_beta(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L59:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L61
	call	__stack_chk_fail@PLT
.L61:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2085:
	.size	_Z50__device_stub__Z10alpha_betaP14checkers_pointiPS0_P14checkers_pointiPS0_, .-_Z50__device_stub__Z10alpha_betaP14checkers_pointiPS0_P14checkers_pointiPS0_
	.globl	alpha_beta
	.type	alpha_beta, @function
alpha_beta:
.LFB2086:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z10alpha_betaP14checkers_pointiPS0_P14checkers_pointiPS0_
	.cfi_endproc
.LFE2086:
	.size	alpha_beta, .-alpha_beta
	.globl	_Z48__device_stub__Z10print_treeiP14checkers_pointiiiP14checkers_pointii
	.type	_Z48__device_stub__Z10print_treeiP14checkers_pointiiiP14checkers_pointii, @function
_Z48__device_stub__Z10print_treeiP14checkers_pointiiiP14checkers_pointii:
.LFB2087:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 24(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	print_tree(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L64:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L66
	call	__stack_chk_fail@PLT
.L66:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2087:
	.size	_Z48__device_stub__Z10print_treeiP14checkers_pointiiiP14checkers_pointii, .-_Z48__device_stub__Z10print_treeiP14checkers_pointiiiP14checkers_pointii
	.globl	print_tree
	.type	print_tree, @function
print_tree:
.LFB2088:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z10print_treeiP14checkers_pointiiiP14checkers_pointii
	.cfi_endproc
.LFE2088:
	.size	print_tree, .-print_tree
	.globl	_Z46__device_stub__Z8set_rootP14checkers_pointPiiiP14checkers_pointPiii
	.type	_Z46__device_stub__Z8set_rootP14checkers_pointPiiiP14checkers_pointPiii, @function
_Z46__device_stub__Z8set_rootP14checkers_pointPiiiP14checkers_pointPiii:
.LFB2089:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L69
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	set_root(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L69:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L71
	call	__stack_chk_fail@PLT
.L71:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2089:
	.size	_Z46__device_stub__Z8set_rootP14checkers_pointPiiiP14checkers_pointPiii, .-_Z46__device_stub__Z8set_rootP14checkers_pointPiiiP14checkers_pointPiii
	.globl	set_root
	.type	set_root, @function
set_root:
.LFB2090:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z8set_rootP14checkers_pointPiiiP14checkers_pointPiii
	.cfi_endproc
.LFE2090:
	.size	set_root, .-set_root
	.globl	_Z55__device_stub__Z16copy_best_resultP14checkers_pointPiiiP14checkers_pointPiii
	.type	_Z55__device_stub__Z16copy_best_resultP14checkers_pointPiiiP14checkers_pointPiii, @function
_Z55__device_stub__Z16copy_best_resultP14checkers_pointPiiiP14checkers_pointPiii:
.LFB2091:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L74
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	copy_best_result(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L74:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L76
	call	__stack_chk_fail@PLT
.L76:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2091:
	.size	_Z55__device_stub__Z16copy_best_resultP14checkers_pointPiiiP14checkers_pointPiii, .-_Z55__device_stub__Z16copy_best_resultP14checkers_pointPiiiP14checkers_pointPiii
	.globl	copy_best_result
	.type	copy_best_result, @function
copy_best_result:
.LFB2092:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z16copy_best_resultP14checkers_pointPiiiP14checkers_pointPiii
	.cfi_endproc
.LFE2092:
	.size	copy_best_result, .-copy_best_result
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"copy_best_result"
.LC1:
	.string	"set_root"
.LC2:
	.string	"print_tree"
.LC3:
	.string	"alpha_beta"
.LC4:
	.string	"delete_tree"
.LC5:
	.string	"create_tree"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2094:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	copy_best_result(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	set_root(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	print_tree(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	alpha_beta(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	delete_tree(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	create_tree(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2094:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdio>

#define EMPTY 0
#define WHITE 1
#define BLACK 2
#define QUEENW 11
#define QUEENB 22

struct checkers_point{
    int board[64];
    int how_much_children;
    checkers_point * children = NULL;
    checkers_point * next = NULL;
    checkers_point * prev = NULL;
    checkers_point * parent = NULL;
    checkers_point * tempnext = NULL;
    bool min_max;
    int value;
    int alpha = -1000000000;
    int beta = 1000000000;
    int player;
};

struct next_kill{
    int t[4];
    next_kill * next = NULL;
    int * parent_tab;
};

class Queue{
    private:
        checkers_point * first = NULL;
        checkers_point * last = NULL;
        int size = 0;
    public:
		__device__
			void add_one(checkers_point * point) {
				if(point == NULL)
					return;
				if(first == NULL) {
					this->first = point;
					this->last = point;
				}
				else {
					this->last->tempnext = this->last->next;
					this->last->next = point;
					this->last = point;
				}
				this->size = this->size + 1;
			}
        __device__
            void add(checkers_point * layer) {
				if(layer == NULL)
					return;
				int counter = 0;
                if(this->first == NULL) {
                    this->first = layer;
                }
                else {
                    this->last->next=layer;
                }
				checkers_point * temp = layer;
				counter+=1;
				while(temp->next != NULL) {
					temp = temp->next;
					counter+=1;
				}
				this->last = temp;
				this->size = this->size + counter;
            }
		
		__device__
			checkers_point * pop() {
				checkers_point * firs,* seco;
				firs = this->first;

				if(firs == NULL)
					return NULL;
				else
					seco = firs->next;
				if(seco==NULL || firs->parent != seco->parent) {
					firs->next = NULL;
					 first->next=first->tempnext;
				}
				this->first = seco;
				this->size = this->size - 1;
				return firs;
			}
		
		__device__
			bool empty() {
				return this->size == 0;
			}

		__device__
			int get_size() {
			return this->size;
		}

		__device__
		    checkers_point * front() {
                return this->first;
            }

		__device__
			void clean() {
				while(this->size > 0)
					this->pop();
			}
};

extern "C" {


__device__
int pawn_owner(int * tab, int x, int y){
    if (tab[x*8+y] == BLACK || tab[x*8+y] == QUEENB)
        return BLACK;
    if (tab[x*8+y] == WHITE || tab[x*8+y] == QUEENW)
        return WHITE;
    return EMPTY;
}

__device__
bool create_queen(int * tab, int x, int y){
    int n = 8;
    if ((x != 0 && x != n-1) ||
        (tab[x*n+y] != WHITE && tab[x*n+y] != BLACK) ||
        (x == 0 && tab[x*n+y] == BLACK) ||
        (x == n-1 && tab[x*n+y] == WHITE))
        return false;
    if (tab[x*n+y] == WHITE)
        tab[x*n+y] = QUEENW;
    else
        tab[x*n+y] = QUEENB;
    return true;
}

__device__
bool is_queen(int * tab, int x, int y){
	int n = 8;
    return (tab[x*n+y] == QUEENB || tab[x*n+y] == QUEENW);
}

__device__
bool is_a_pawn(int * tab, int x, int y){
    return !(tab[x*8+y] == EMPTY);
}

__device__
bool correct_kill(int * tab, int x, int y, int x1, int y1){
    if (!is_a_pawn(tab, x1, y1))
	return false;
    if (pawn_owner(tab, x, y) != pawn_owner(tab, x1, y1))
        return true;
    return false;
}

__device__
bool queen_way(int * tab, int x, int y, int x1, int y1){
    int own = pawn_owner(tab, x, y);
    int x_r = x > x1 ? -1 : 1, y_r = y > y1 ? -1 : 1;
    bool next_empty = false;
    x += x_r; y += y_r;
    while (x != x1){
        if (!(tab[x*8+y] == EMPTY)){
            if (next_empty)
                return false;
            next_empty = true;
            if (pawn_owner(tab, x, y) == own)
                return false;
        } else {
            next_empty = false;
        }
        x += x_r; y += y_r;
    }
    return true;
}

__device__
bool is_move_correct(int * tab, int x, int y, int who, int x1, int y1){
    int n = 8;
    if (x < 0 || x >= n || x1 < 0 || x1 >= n || y < 0 || y >= n || y1 < 0 || y1 >= n ){
//	printf("WRONG VALUE");
        return false;
    }
    if (std::abs(x-x1) != std::abs(y-y1)){
//	printf("ABS PROBLEM");
        return false;
    }
    int pwn_wnr = pawn_owner(tab, x, y);
    if (pwn_wnr == EMPTY){
//	printf("PAWN OWNER EMPTY");
        return false;
    }
    if (pwn_wnr != who){
//	printf("pwn_wnr != who");
        return false;
    }
    if (is_a_pawn(tab, x1, y1)){
//	printf("pawn in _");
        return false;
    }
    if (x < x1 && who == WHITE && tab[x*n+y] != QUEENW){
//	printf("WHITE WRONG WAY");
        return false;
    }
    if (x > x1 && who == BLACK && tab[x*n+y] != QUEENB){
//	printf("BLACK WRONG WAY");
        return false;
    }
    if ((tab[x*n+y] == QUEENW || tab[x*n+y] == QUEENB) && (!queen_way(tab, x, y, x1, y1))){
//        printf("queen problem");
	return false;
    }
    if (!is_queen(tab, x, y) && std::abs((x-x1)) > 1 && !correct_kill(tab, x, y, (x1+x)/2, (y1+y)/2)){
//      printf("Correct kill problem");
	return false;
    }
    return true;
}

__device__
	next_kill * create_next_move(int x, int y, int * par_tb, int x1, int y1){
	next_kill * res = new next_kill;
        res->t[0] = x; res->t[1] = y;
        res->t[2] = x1; res->t[3] = y1;
	res->parent_tab = par_tb;
	return res;
}

__device__
	void copy_board(int * ch, checkers_point * ch2){
		for (int i = 0; i < 64; i++){
			ch2->board[i] = ch[i];
		}
	}


__device__
	void kill(int x, int y, int * tab){
    	    tab[x*8+y] = EMPTY;
	}

__device__
	bool has_next_move(int x, int y, int x1, int y1, int * tab, bool kiiil){
        int kll = 0;
        int x_r = x > x1 ? -1 : 1, y_r = y > y1 ? -1 : 1;
            while (x != x1){
                if (is_a_pawn(tab, x, y)){
		    if (kiiil)
                        kill(x, y, tab);
                    kll++;
                }
            x += x_r; y += y_r;
            }
        return (kll > 0);
	}

__device__
	checkers_point * again_queen(checkers_point * ch, next_kill * first, next_kill * last){
	return ch;
	}

__device__
	next_kill * queen_move_again_again(int * tab, int x1, int y1, int x, int y, next_kill * last){
		if (is_move_correct(tab, x1, y1, pawn_owner(tab, x1, y1), x, y)
                         && has_next_move(x1, y1, x, y, tab, false)) {
                     last->next = create_next_move(x1, y1, tab, x, y);
                     last = last->next;
                }
		return last;
	}

__device__
	checkers_point * again(checkers_point * ch, next_kill * first, next_kill * last, int pm){
	int x = first->t[0], y = first->t[1], x1 = first->t[2], y1 = first->t[3], * tab = first->parent_tab;
	if(is_move_correct(tab, x, y, pawn_owner(tab, x, y), x1, y1)){
		checkers_point * chld;
		ch->next = new checkers_point;
                ch->next->parent = ch->parent;
                ch->next->prev = ch;
		ch->next->tempnext = NULL;
                chld = ch->next;
		chld->min_max = !chld->parent->min_max;
		chld->alpha = -1000000000;
		chld->beta = 1000000000;
		copy_board(tab, chld);
		chld->parent->how_much_children++;
		chld->board[x1*8+y1] = chld->board[x*8+y];
                chld->board[x*8+y] = EMPTY;
                chld->board[(x+x1)/2*8+(y+y1)/2] = EMPTY;
                ch = chld;
		create_queen(ch->board, x1, y1);
		last->next = create_next_move(x1, y1, ch->board, x1+pm, y1+2);
		last = last->next;
		last->next = create_next_move(x1, y1, ch->board, x1+pm, y1-2);
		last = last->next;
	}
	return ch;
}

__device__
	checkers_point * pawn(checkers_point * ch, int x, int y, int x1, int y1, bool &nxt, bool iskillsomethingnow, bool queen){
		int * tab = ch->board;
		if (ch->parent != NULL)
			tab = ch->parent->board;
		if (is_move_correct(tab, x, y, pawn_owner(tab, x, y), x1, y1) == true){
//			printf("correct ");
			checkers_point * chld;
                        if (!nxt){
//				printf("chld ");
                                ch->children = new checkers_point;
				ch->children->parent = ch;
				ch->children->prev = NULL;
				ch->children->tempnext = NULL;
				chld = ch->children;
                        } else {
//				printf("next ");
				ch->next = new checkers_point;
				ch->next->parent = ch->parent;
				ch->next->prev = ch;
				ch->next->tempnext = NULL;
				chld = ch->next;
			}
			chld->min_max = !chld->parent->min_max;
			chld->alpha = -1000000000;
			chld->beta = 1000000000;
			chld->how_much_children = 0;
			chld->next = chld->children = NULL;
			copy_board(chld->parent->board, chld);
			chld->parent->how_much_children++;
                        chld->board[x1*8+y1] = chld->board[x*8+y];
                        chld->board[x*8+y] = EMPTY;
			if (iskillsomethingnow && queen == false)
                            chld->board[(x+x1)/2*8+(y+y1)/2] = EMPTY;
			ch = chld;
			nxt = true;
			if (!iskillsomethingnow)
			    create_queen(ch->board, x1, y1);
//			printf("%d, %d -> %d, %d\n", x, y, x1, y1);
			if (iskillsomethingnow && queen == false && (create_queen(ch->board, x1, y1) == false)){
				int pm;
				if (ch->board[x1*8+y1] == WHITE){
					pm = -2;
				} else {
					pm = 2;
				}
				next_kill * first, * last, * temp;
				first = create_next_move(x1, y1, ch->board, x1+pm, y1+2);
				first->next = last = create_next_move(x1, y1, ch->board, x1+pm, y1-2);
				while (first != NULL){
					ch = again(ch, first, last, pm);
					while (last->next != NULL)
						last = last->next;
					temp = first;
					first = first->next;
					delete temp;
				}
			}
		        
			if (queen && has_next_move(x1, y1, x, y, tab, true)){
				/*next_kill * first, * last, * temp;
                                first = create_next_move(x1, y1, ch->board, x1+1, y1+1);
				first->next = last = create_next_move(x1, y1, ch->board, x1-1, y1+1);
                                last->next = create_next_move(x1, y1, ch->board, x1+1, y1-1);
				last = last->next;
				last->next = create_next_move(x1, y1, ch->board, x1-1, y1-1);
				last = last->next;
				for (int i = 2; i < 8; i++){
					last = queen_move_again_again(tab, x1, y1, x1+i, y1+i, last);
					last = queen_move_again_again(tab, x1, y1, x1+i, y1-i, last);
					last = queen_move_again_again(tab, x1, y1, x1-i, y1+i, last);
					last = queen_move_again_again(tab, x1, y1, x1-i, y1-i, last);
				}
                                while (first != NULL){
                                        ch = again_queen(ch, first, last);
                                        while (last->next != NULL)
                                                last = last->next;
                                        temp = first;
                                        first = first->next;
                                        delete temp;
                                }*/
			}

		}
		return ch;
	}

__device__
    checkers_point * dismember_child(checkers_point * ch, int x, int y, int turn_no, bool &nxt, int player){
	checkers_point * chb = ch->parent;
	if (!nxt){
//		printf(" NO PARENT ");
		chb = ch;
	}
	/*
	printf("NR %d\n", chb->value);
	for (int i = 0; i < 64; i++)
		printf("%d ", chb->board[i]);
	printf("\n");
	*/
        int ww = 1, bb = 0;
        if (player == BLACK){
	    ww = 0;
	    bb = 1;
	}
	switch(chb->board[x*8+y]){
	    case WHITE:
		if (turn_no % 2 == ww){
//		printf("WHITE ");
		ch = pawn(ch, x, y, x-1, y-1, nxt, false, false);
                ch = pawn(ch, x, y, x-1, y+1, nxt, false, false);
		ch = pawn(ch, x, y, x-2, y-2, nxt, true, false);
		ch = pawn(ch, x, y, x-2, y+2, nxt, true, false);
		}
		break;
	    case BLACK:
		if (turn_no % 2 == bb){
//		printf("BLACK %d %d", x, y);
		ch = pawn(ch, x, y, x+1, y-1, nxt, false, false);
                ch = pawn(ch, x, y, x+1, y+1, nxt, false, false);
		ch = pawn(ch, x, y, x+2, y-2, nxt, true, false);
                ch = pawn(ch, x, y, x+2, y+2, nxt, true, false);
		}
		break;
	    case QUEENB:
		if (turn_no % 2 == bb){
		    /*for (int i = 0; i < 8; i++){
			ch = pawn(ch, x, y, x+i, y-i, nxt, false, true);
			ch = pawn(ch, x, y, x+i, y+i, nxt, false, true);
			ch = pawn(ch, x, y, x-i, y-i, nxt, false, true);
			ch = pawn(ch, x, y, x-i, y+i, nxt, false, true);
		    }*/
                        ch = pawn(ch, x, y, x+1, y-1, nxt, false, true);
                        ch = pawn(ch, x, y, x+1, y+1, nxt, false, true);
                        ch = pawn(ch, x, y, x-1, y-1, nxt, false, true);
                        ch = pawn(ch, x, y, x-1, y+1, nxt, false, true);
                        ch = pawn(ch, x, y, x+2, y-2, nxt, false, true);
                        ch = pawn(ch, x, y, x+2, y+2, nxt, false, true);
                        ch = pawn(ch, x, y, x-2, y-2, nxt, false, true);
                        ch = pawn(ch, x, y, x-2, y+2, nxt, false, true);
		}
		break;
	    case QUEENW:
                if (turn_no % 2 == ww){/*
                    for (int i = 0; i < 8; i++){
			ch = pawn(ch, x, y, x+i, y-i, nxt, false, true);
                        ch = pawn(ch, x, y, x+i, y+i, nxt, false, true);
                        ch = pawn(ch, x, y, x-i, y-i, nxt, false, true);
                        ch = pawn(ch, x, y, x-i, y+i, nxt, false, true);
                    }*/
                        ch = pawn(ch, x, y, x+1, y-1, nxt, false, true);
                        ch = pawn(ch, x, y, x+1, y+1, nxt, false, true);
                        ch = pawn(ch, x, y, x-1, y-1, nxt, false, true);
                        ch = pawn(ch, x, y, x-1, y+1, nxt, false, true);
                        ch = pawn(ch, x, y, x+2, y-2, nxt, false, true);
                        ch = pawn(ch, x, y, x+2, y+2, nxt, false, true);
                        ch = pawn(ch, x, y, x-2, y-2, nxt, false, true);
                        ch = pawn(ch, x, y, x-2, y+2, nxt, false, true);
                }
		break;
	    default:
		break;
	}
	return ch;
    }

__device__
//add global size
    void ramification(checkers_point * ch2, int thid, int how_deep, int player){
	bool nxt = false;
	//printf("!%d!\n", how_deep);
	for (int i = 0; i < 8*8; i++){
	    if (ch2->board[i] != EMPTY){
		ch2 = dismember_child(ch2, i/8, i % 8, how_deep, nxt, player);
	    }
	}
    }

__global__
    void create_tree(int n, checkers_point * ch, int how_deep, int player){
        int thid = (blockIdx.x * blockDim.x) + threadIdx.x;
        int find_me = thid;
        int count_group = n;
            __syncthreads();
        if (thid < n){
            checkers_point * ch2 = ch;
            for (int i = 0; i < how_deep; i++){
                if (find_me == 0 && i + 1 == how_deep){
                    ramification(ch2, thid, how_deep, player);
                }
                __syncthreads();
                if (i + 1 == how_deep)
                    break;
                count_group = count_group/ch2->how_much_children;
                int group = find_me/count_group;
                if (group >= ch2->how_much_children)
                    break;
                find_me = find_me % count_group;
                ch2 = ch2->children;
		if (ch2 == NULL)
			break;
                for (int k = 0; k < group; k++){
                    ch2 = ch2->next;
		    if (ch2 == NULL)
			break;
		}
		if (ch2 == NULL)
			break;
                __syncthreads();
            }
        }
    }

__global__
    void delete_tree(checkers_point * ch, int thread_num, checkers_point ** V) {
        int thid = (blockIdx.x * blockDim.x) + threadIdx.x;
		__shared__ int count;
		count = 0;
		if(thid == 0){
	//	printf("delete_tree");
            checkers_point * child = ch->children;
            checkers_point * temp;
            Queue Q;

            Q.add(child);
            while(!Q.empty() && Q.get_size()+Q.front()->how_much_children < thread_num) {
                temp = Q.pop();
                if(temp->children !=NULL)
                    Q.add(temp->children);
				delete temp;
            }

            while(!Q.empty()) {
				temp = Q.pop();
				V[count]=temp;
				count++;
			}
        }
        __syncthreads();
        if(thid < count) {
            checkers_point * my_child = V[thid];
            Queue Q;
        	checkers_point * temp, * child;
        	Q.add_one(my_child);

        	while(!Q.empty()) {
            	temp = Q.pop();

            	child = temp->children;
				if(child != NULL)
            		Q.add(child);
            	delete temp;
			}
		}
    }

__device__
	int calculate_pawns_value(int * tab){
    	int count = 0;
		int n=8;
    	for(int i=0;i<n*n;i++){
        	if(tab[i] == WHITE)
            	count+=3;
        	else if(tab[i] == QUEENW)
            	count+=5;
        	else if(tab[i] == BLACK)
            	count-=3;
        	else if(tab[i] == QUEENB)
        	    count-=5;
    	}
    	return (int)(((49.5*count)/57.0) + 49.5);
	}

__device__
	int calculate_dist_to_be_queen(int * tab){
		int n=8;
    	int black_count=0,white_count=0,black_dist=0,white_dist=0;
    	for(int row=0;row<n;row++){
        	for(int col=0;col<n;col++){
            	if(tab[row*n+col] == WHITE){
                	white_count++;
                	white_dist+=(n-1-row);
            	}
            	else if(tab[row*n+col] == BLACK){
                	black_count++;
                	black_dist+=row;
            	}
        	}
    	}
    	double black_val, white_val;
    	if(white_count == 0)
        	white_val = 0;
    	else
        	white_val = (double)white_dist/(double)white_count;
    	if(black_count == 0)
        	black_val = 0;
    	else
        	black_val = (double)black_dist/(double)black_count;
    	double value = black_val - white_val;
    	return (int)(0.495*value + 49.5);
	}

__device__
	int calculate_future_queen_kills(int * tab){
	int n=8;
    int * kill_tab = new int [n*n];
    int temp_row,temp_col,white_count=0,black_count=0,white_dead=0,black_dead=0;
    for(int row=0;row<n;row++){
        for(int col=0;col<n;col++){
            kill_tab[row*n+col] = EMPTY;
            if(tab[row*n+col] == QUEENB || tab[row*n+col] == QUEENW){
                temp_row = row-1;
                temp_col = col-1;
                while(temp_row >= 1 && temp_col >= 1){
                    if(is_a_pawn(tab,temp_row,temp_col)){
                        if(pawn_owner(tab,row,col) == pawn_owner(tab,temp_row,temp_col))
                            break;
                        else if(is_a_pawn(tab,temp_row-1,temp_col-1))
                            break;
                        else{
                            kill_tab[temp_row*n+temp_col] = pawn_owner(tab,temp_row,temp_col);
                            temp_row--;
                            temp_col--;
                        }
                    }
                    temp_row--;
                    temp_col--;
                }
                temp_row = row-1;
                temp_col = col+1;
                while(temp_row >= 1 && temp_col <= n-2){
                    if(is_a_pawn(tab,temp_row,temp_col)){
                        if(pawn_owner(tab,row,col) == pawn_owner(tab,temp_row,temp_col))
                            break;
                        else if(is_a_pawn(tab,temp_row-1,temp_col+1))
                            break;
                        else{
                            kill_tab[temp_row*n+temp_col] = pawn_owner(tab,temp_row,temp_col);
                            temp_row--;
                            temp_col++;
                        }
                    }
                    temp_row--;
                    temp_col++;
                }
                temp_row = row+1;
                temp_col = col-1;
                while(temp_row <= n-2 && temp_col >= 1){
                    if(is_a_pawn(tab,temp_row,temp_col)){
                        if(pawn_owner(tab,row,col) == pawn_owner(tab,temp_row,temp_col))
                            break;
                        else if(is_a_pawn(tab,temp_row+1,temp_col-1))
                            break;
                        else{
                            kill_tab[temp_row*n+temp_col] = pawn_owner(tab,temp_row,temp_col);
                            temp_row++;
                            temp_col--;
                        }
                    }
                    temp_row++;
                    temp_col--;
                }
                temp_row = row+1;
                temp_col = col+1;
                while(temp_row <= n-2 && temp_col <= n-2){
                    if(is_a_pawn(tab,temp_row,temp_col)){
                        if(pawn_owner(tab,row,col) == pawn_owner(tab,temp_row,temp_col))
                            break;
                        else if(is_a_pawn(tab,temp_row+1,temp_col+1))
                            break;
                        else{
                            kill_tab[temp_row*n+temp_col] = pawn_owner(tab,temp_row,temp_col);
                            temp_row++;
                            temp_col++;
                        }
                    }
                    temp_row++;
                    temp_col++;
                }
            }
        }
    }
    for(int row=0;row<n;row++){
        for(int col=0;col<n;col++){
            if(kill_tab[row*n+col] == WHITE)
                white_dead++;
            else if(kill_tab[row*n+col] == BLACK)
                black_dead++;
            if(is_a_pawn(tab,row,col)){
                if(pawn_owner(tab,row,col) == WHITE)
                    white_count++;
                else
                    black_count++;
            }
        }
    }
    double black_percent,white_percent;
    if(black_count == 0)
        black_percent = 1.0;
    else
        black_percent = (double)black_dead/(double)black_count;
    if(white_count == 0)
        white_percent = 1.0;
    else
        white_percent = (double)white_dead/(double)white_count;
    int value = white_percent - black_percent;
	delete kill_tab;
    return 49.5*value+49.5;
}

__device__
    int calculate_board_value(int * Board){
	    int value;
	    value=calculate_pawns_value(Board);
    	value=100*value+calculate_dist_to_be_queen(Board);
    	value=100*value+calculate_future_queen_kills(Board);
    	//value=10*value+(rand()%10);
    	return value;
}

__device__
	void minmax(checkers_point * ch) {
		//zjedz do lisci i wrzuc je na kolejke
		Queue tempQueue;
		Queue Q;
		checkers_point * temp;
		tempQueue.add_one(ch);
		while(!tempQueue.empty()) {
			temp = tempQueue.pop();
			if(temp->alpha!=-1000000000 || temp->beta!=1000000000)
				Q.add_one(temp);
            else if(temp->children==NULL) {
                int wynik = calculate_board_value(temp->board);//policz stan planszy
                temp->alpha = wynik;
                temp->beta = wynik;
                Q.add_one(temp);
            }
            else if(temp->children!=NULL)
				tempQueue.add(temp->children);
	    }
		//pamietaj parenta pierwszego z kolejki
	    checkers_point * parent = Q.front()->parent;
            Q.add_one(parent);
            //lecac po kolejce modyfikuj parenta danego liscia
            //jak parent nowego goscia jest inny niz poprzedni dorzuc poprzedni na kolejke i zastap go w zmiennej nowym
            while(!Q.empty()) {
                temp = Q.pop();
                if(temp==ch) break;
                if(temp->parent!=NULL) {
                    if(temp->min_max)
                    	temp->parent->beta = min(temp->alpha,temp->parent->beta);
                    else
               		temp->parent->alpha = max(temp->beta,temp->parent->alpha);
                }    
                if(parent!=temp->parent) {
                    if(temp->parent!=NULL)
                        Q.add_one(temp->parent);
                    parent = temp->parent;
                }
	    }
	    Q.clean();
		//tadam!

	}

__global__
    void alpha_beta(checkers_point * ch, int thread_num, checkers_point ** V) {
        //rozdziel i wrzuc do V
		int thid = (blockIdx.x * blockDim.x) + threadIdx.x;
		__shared__ int count;
		count = 0;
		if(thid == 0){
		    checkers_point * temp;
            Queue Q;
            Q.add(ch);
            while(!Q.empty() && Q.get_size()+Q.front()->how_much_children < thread_num) {
                temp = Q.pop();
                if(temp->children !=NULL)
                    Q.add(temp->children);
				temp->alpha=-1000000000;
				temp->beta=1000000000;
            }
            
            while(!Q.empty()) {
				temp = Q.pop();
				temp->alpha=-1000000000;
				temp->beta=1000000000;
				V[count]=temp;
				count++;
			}	
		}
		__syncthreads();
        //policz dla tych w V
		if(thid<count)
			minmax(V[thid]);
		__syncthreads();
        //policz w gore
		if(thid == 0) {
		    minmax(ch);
		}
		//zwroc wynik (?)
	}

__device__
    void print_tr(checkers_point * ch){
        if (ch == NULL)
            return;
	if (ch->children != NULL){
	printf("(c) %d ", ch->value);
        print_tr(ch->children);
	}
	if (ch->next != NULL){
	printf("(n) %d ", ch->value);
        print_tr(ch->next);
	}
	if (ch->next == NULL && ch->children == NULL){
        printf("%d\n", ch->value);
	for (int i = 0; i < 64; i++){
		printf("%d", ch->board[i]);
		if (i % 8 == 7)
			printf("\n");
	}
	printf("\n");
	}
    }

__global__
    void print_tree(int n, checkers_point * ch, int i, int player){
        int thid = (blockIdx.x * blockDim.x) + threadIdx.x;
        if (thid == 0){
            printf("\n\n");
//            print_tr(ch);
//            printf("____\n");
        }
    }

__global__
    void set_root(checkers_point * ch, int * tab, int size, int player){
        int thid = (blockIdx.x * blockDim.x) + threadIdx.x;
        if (thid == 0){
	    ch->value = 1;
	    ch->children = NULL;
	    ch->next = NULL;
	    ch->prev = NULL;
	    ch->parent = NULL;
	    ch->tempnext = NULL;
		ch->alpha = -1000000000;
		ch->beta = 1000000000;
	    if(player == WHITE)
	        ch->min_max = true;
        else
            ch->min_max = false;
	    ch->how_much_children = 0;
	    for (int i = 0; i < size*size; ++i)
		ch->board[i] = tab[i]; 
        }
    }

__global__
    void copy_best_result(checkers_point * ch, int * tab, int size, int player){
        int thid = (blockIdx.x * blockDim.x) + threadIdx.x;
        if (thid == 0){
	    checkers_point * ch2 = ch->children;
	    if (ch2 == NULL){
		printf("No result -> root->chidlren = NULL\n");
		return;
            }
	    if (player == WHITE){
	    while (ch->alpha != ch2->beta){
		if (ch2->next == NULL)
			break;
		ch2 = ch2->next;
	    }
	    } else {
	    while (ch->beta != ch2->alpha){
		if (ch2->next == NULL)
			break;
                ch2 = ch2->next;
	    }
	    }
            for (int i = 0; i < 64; ++i)
                tab[i] = ch2->board[i];
        }
    }

}

	.text
	.file	"checkers.hip"
	.globl	__device_stub__create_tree      # -- Begin function __device_stub__create_tree
	.type	__device_stub__create_tree,@function
__device_stub__create_tree:             # @__device_stub__create_tree
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$create_tree, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	__device_stub__create_tree, .Lfunc_end0-__device_stub__create_tree
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__delete_tree      # -- Begin function __device_stub__delete_tree
	.type	__device_stub__delete_tree,@function
__device_stub__delete_tree:             # @__device_stub__delete_tree
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$delete_tree, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	__device_stub__delete_tree, .Lfunc_end1-__device_stub__delete_tree
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__alpha_beta       # -- Begin function __device_stub__alpha_beta
	.type	__device_stub__alpha_beta,@function
__device_stub__alpha_beta:              # @__device_stub__alpha_beta
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$alpha_beta, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	__device_stub__alpha_beta, .Lfunc_end2-__device_stub__alpha_beta
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__print_tree       # -- Begin function __device_stub__print_tree
	.type	__device_stub__print_tree,@function
__device_stub__print_tree:              # @__device_stub__print_tree
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$print_tree, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	__device_stub__print_tree, .Lfunc_end3-__device_stub__print_tree
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__set_root         # -- Begin function __device_stub__set_root
	.type	__device_stub__set_root,@function
__device_stub__set_root:                # @__device_stub__set_root
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$set_root, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	__device_stub__set_root, .Lfunc_end4-__device_stub__set_root
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__copy_best_result # -- Begin function __device_stub__copy_best_result
	.type	__device_stub__copy_best_result,@function
__device_stub__copy_best_result:        # @__device_stub__copy_best_result
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$copy_best_result, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	__device_stub__copy_best_result, .Lfunc_end5-__device_stub__copy_best_result
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$create_tree, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$delete_tree, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$alpha_beta, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$print_tree, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$set_root, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$copy_best_result, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	create_tree,@object             # @create_tree
	.section	.rodata,"a",@progbits
	.globl	create_tree
	.p2align	3, 0x0
create_tree:
	.quad	__device_stub__create_tree
	.size	create_tree, 8

	.type	delete_tree,@object             # @delete_tree
	.globl	delete_tree
	.p2align	3, 0x0
delete_tree:
	.quad	__device_stub__delete_tree
	.size	delete_tree, 8

	.type	alpha_beta,@object              # @alpha_beta
	.globl	alpha_beta
	.p2align	3, 0x0
alpha_beta:
	.quad	__device_stub__alpha_beta
	.size	alpha_beta, 8

	.type	print_tree,@object              # @print_tree
	.globl	print_tree
	.p2align	3, 0x0
print_tree:
	.quad	__device_stub__print_tree
	.size	print_tree, 8

	.type	set_root,@object                # @set_root
	.globl	set_root
	.p2align	3, 0x0
set_root:
	.quad	__device_stub__set_root
	.size	set_root, 8

	.type	copy_best_result,@object        # @copy_best_result
	.globl	copy_best_result
	.p2align	3, 0x0
copy_best_result:
	.quad	__device_stub__copy_best_result
	.size	copy_best_result, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"create_tree"
	.size	.L__unnamed_1, 12

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"delete_tree"
	.size	.L__unnamed_2, 12

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"alpha_beta"
	.size	.L__unnamed_3, 11

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"print_tree"
	.size	.L__unnamed_4, 11

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"set_root"
	.size	.L__unnamed_5, 9

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"copy_best_result"
	.size	.L__unnamed_6, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __device_stub__create_tree
	.addrsig_sym __device_stub__delete_tree
	.addrsig_sym __device_stub__alpha_beta
	.addrsig_sym __device_stub__print_tree
	.addrsig_sym __device_stub__set_root
	.addrsig_sym __device_stub__copy_best_result
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym create_tree
	.addrsig_sym delete_tree
	.addrsig_sym alpha_beta
	.addrsig_sym print_tree
	.addrsig_sym set_root
	.addrsig_sym copy_best_result
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.p2align	2                               ; -- Begin function is_move_correct
	.type	is_move_correct,@function
is_move_correct:                        ; @is_move_correct
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s0, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_i32_e32 -1, v2
	s_cbranch_execz .LBB0_112
; %bb.1:
	v_cmp_gt_u32_e32 vcc_lo, 8, v2
	v_cmp_lt_i32_e64 s0, -1, v5
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s1, vcc_lo, s0
	s_mov_b32 s0, 0
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB0_111
; %bb.2:
	v_or3_b32 v7, v6, v3, v5
	v_cmp_lt_i32_e32 vcc_lo, -1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, 8, v7
	s_and_b32 s1, vcc_lo, s0
	s_mov_b32 s0, 0
	s_and_saveexec_b32 s4, s1
	s_cbranch_execz .LBB0_110
; %bb.3:
	v_sub_nc_u32_e32 v7, v2, v5
	v_sub_nc_u32_e32 v8, v3, v6
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v9, 0, v7
	v_sub_nc_u32_e32 v11, 0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_max_i32_e32 v10, v7, v9
	v_max_i32_e32 v7, v8, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e64 v10, v7
	s_cbranch_execz .LBB0_109
; %bb.4:                                ; %NodeBlock112
	v_lshl_add_u32 v7, v2, 3, v3
	v_mov_b32_e32 v8, 0
	s_mov_b32 s7, 0
	s_mov_b32 s6, 0
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $sgpr0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v7, vcc_lo, v0, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, v1, v8, vcc_lo
	flat_load_b32 v9, v[7:8]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v9
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB0_10
; %bb.5:                                ; %NodeBlock110
	s_mov_b32 s9, exec_lo
                                        ; implicit-def: $sgpr0
                                        ; implicit-def: $sgpr1
	v_cmpx_lt_i32_e32 21, v9
	s_xor_b32 s9, exec_lo, s9
; %bb.6:                                ; %LeafBlock108
	v_cmp_ne_u32_e32 vcc_lo, 22, v9
	s_mov_b32 s1, -1
	s_mov_b32 s0, 2
	s_and_b32 s7, vcc_lo, exec_lo
; %bb.7:                                ; %Flow209
	s_and_not1_saveexec_b32 s9, s9
; %bb.8:                                ; %LeafBlock106
	v_cmp_ne_u32_e32 vcc_lo, 11, v9
	s_and_not1_b32 s7, s7, exec_lo
	s_mov_b32 s6, exec_lo
	s_and_b32 s10, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s7, s7, s10
; %bb.9:                                ; %Flow210
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s6, s6, exec_lo
	s_and_b32 s7, s7, exec_lo
.LBB0_10:                               ; %Flow208
	s_or_saveexec_b32 s8, s8
	v_mov_b32_e32 v7, s0
	s_xor_b32 exec_lo, exec_lo, s8
	s_cbranch_execz .LBB0_16
; %bb.11:                               ; %NodeBlock
	s_mov_b32 s10, s7
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr9
                                        ; implicit-def: $sgpr11
	v_cmpx_lt_i32_e32 1, v9
	s_xor_b32 s0, exec_lo, s0
; %bb.12:                               ; %LeafBlock104
	v_cmp_ne_u32_e32 vcc_lo, 2, v9
	s_and_not1_b32 s10, s7, exec_lo
	s_mov_b32 s9, 2
	s_mov_b32 s11, -1
	s_and_b32 s12, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s10, s10, s12
; %bb.13:                               ; %Flow212
	s_or_saveexec_b32 s12, s0
	s_mov_b32 s0, s6
	s_xor_b32 exec_lo, exec_lo, s12
; %bb.14:                               ; %LeafBlock
	v_cmp_eq_u32_e32 vcc_lo, 1, v9
	v_cmp_ne_u32_e64 s0, 1, v9
	s_and_not1_b32 s13, s6, exec_lo
	s_and_not1_b32 s10, s10, exec_lo
	s_and_b32 s14, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s15, s0, exec_lo
	s_or_b32 s0, s13, s14
	s_or_b32 s10, s10, s15
; %bb.15:                               ; %Flow213
	s_or_b32 exec_lo, exec_lo, s12
	v_mov_b32_e32 v7, s9
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s11, s11, exec_lo
	s_and_not1_b32 s6, s6, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s7, s7, exec_lo
	s_and_b32 s9, s10, exec_lo
	s_or_b32 s1, s1, s11
	s_or_b32 s6, s6, s0
	s_or_b32 s7, s7, s9
.LBB0_16:                               ; %Flow211
	s_or_b32 exec_lo, exec_lo, s8
	s_and_saveexec_b32 s0, s7
; %bb.17:
	v_mov_b32_e32 v7, 0
	s_and_not1_b32 s1, s1, exec_lo
	s_and_not1_b32 s6, s6, exec_lo
; %bb.18:                               ; %Flow214
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s6
; %bb.19:
	v_mov_b32_e32 v7, 1
	s_or_b32 s1, s1, exec_lo
; %bb.20:                               ; %pawn_owner.exit
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, v7, v4
	s_mov_b32 s0, 0
	s_and_b32 s1, s1, vcc_lo
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_108
; %bb.21:
	v_lshl_add_u32 v7, v5, 3, v6
	v_mov_b32_e32 v8, 0
	s_mov_b32 s7, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v7, vcc_lo, v0, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, v1, v8, vcc_lo
	flat_load_b32 v7, v[7:8]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 0, v7
	s_cbranch_execz .LBB0_107
; %bb.22:
	v_cmp_ge_u32_e32 vcc_lo, v2, v5
	v_cmp_ne_u32_e64 s0, 1, v4
	v_cmp_eq_u32_e64 s1, 11, v9
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s0, s0, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s0, s1
	s_mov_b32 s0, 0
	s_and_saveexec_b32 s8, s1
	s_cbranch_execz .LBB0_106
; %bb.23:
	v_cmp_ne_u32_e64 s0, 2, v4
	v_cmp_eq_u32_e64 s1, 22, v9
	v_cmp_le_u32_e32 vcc_lo, v2, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
	s_or_b32 s1, s0, vcc_lo
	s_mov_b32 s0, 0
	s_and_saveexec_b32 s9, s1
	s_cbranch_execz .LBB0_105
; %bb.24:                               ; %NodeBlock118
	s_mov_b32 s13, 0
	s_mov_b32 s10, 0
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $sgpr11
	v_cmpx_lt_i32_e32 21, v9
	s_xor_b32 s1, exec_lo, s1
; %bb.25:                               ; %LeafBlock116
	v_cmp_eq_u32_e64 s0, 22, v9
	s_mov_b32 s10, exec_lo
	s_mov_b32 s11, 2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s13, s0, exec_lo
; %bb.26:                               ; %Flow192
	s_or_saveexec_b32 s1, s1
	v_mov_b32_e32 v4, s11
	s_xor_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB0_30
; %bb.27:                               ; %LeafBlock114
	s_mov_b32 s12, -1
	s_mov_b32 s11, s13
	s_mov_b32 s15, exec_lo
                                        ; implicit-def: $sgpr14
	v_cmpx_eq_u32_e32 11, v9
; %bb.28:
	s_mov_b32 s14, 1
	s_xor_b32 s12, exec_lo, -1
	s_or_b32 s11, s13, exec_lo
; %bb.29:                               ; %Flow194
	s_or_b32 exec_lo, exec_lo, s15
	v_mov_b32_e32 v4, s14
	s_and_not1_b32 s0, s10, exec_lo
	s_and_b32 s10, s12, exec_lo
	s_and_not1_b32 s12, s13, exec_lo
	s_and_b32 s11, s11, exec_lo
	s_or_b32 s10, s0, s10
	s_or_b32 s13, s12, s11
.LBB0_30:                               ; %Flow193
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s11, 0
                                        ; implicit-def: $sgpr1
	s_and_saveexec_b32 s12, s13
	s_cbranch_execz .LBB0_64
; %bb.31:                               ; %pawn_owner.exit.i
	v_cndmask_b32_e64 v11, -1, 1, vcc_lo
	s_mov_b32 s14, -1
	s_mov_b32 s11, exec_lo
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v11, v2
	v_cmpx_ne_u32_e64 v5, v8
	s_cbranch_execz .LBB0_57
; %bb.32:                               ; %.lr.ph.preheader.i
	v_cmp_gt_u32_e32 vcc_lo, v3, v6
	v_lshlrev_b32_e32 v7, 3, v8
	v_sub_nc_u32_e32 v13, v5, v8
	s_mov_b32 s1, 0
	s_mov_b32 s13, 0
	v_cndmask_b32_e64 v12, 1, -1, vcc_lo
                                        ; implicit-def: $sgpr14
                                        ; implicit-def: $sgpr15
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v7, v12, v3, v7
	v_lshl_add_u32 v12, v11, 3, v12
.LBB0_33:                               ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr18
                                        ; implicit-def: $sgpr16
	v_lshlrev_b64 v[14:15], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, v0, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, v1, v15, vcc_lo
	flat_load_b32 v8, v[14:15]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v8
	s_and_saveexec_b32 s17, vcc_lo
	s_cbranch_execz .LBB0_53
; %bb.34:                               ;   in Loop: Header=BB0_33 Depth=1
	s_xor_b32 s1, s1, -1
	s_mov_b32 s16, 0
	s_mov_b32 s0, 0
	s_and_saveexec_b32 s18, s1
	s_cbranch_execz .LBB0_52
; %bb.35:                               ; %NodeBlock132
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_mov_b32 s20, 0
	s_mov_b32 s19, 0
	s_mov_b32 s21, exec_lo
                                        ; implicit-def: $sgpr1
	v_cmpx_lt_i32_e32 10, v8
	s_xor_b32 s21, exec_lo, s21
	s_cbranch_execz .LBB0_41
; %bb.36:                               ; %NodeBlock130
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_mov_b32 s22, exec_lo
                                        ; implicit-def: $sgpr1
	v_cmpx_lt_i32_e32 21, v8
	s_xor_b32 s22, exec_lo, s22
; %bb.37:                               ; %LeafBlock128
                                        ;   in Loop: Header=BB0_33 Depth=1
	v_cmp_ne_u32_e64 s0, 22, v8
	s_mov_b32 s1, 2
                                        ; implicit-def: $vgpr8
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s20, s0, exec_lo
; %bb.38:                               ; %Flow182
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_and_not1_saveexec_b32 s22, s22
; %bb.39:                               ; %LeafBlock126
                                        ;   in Loop: Header=BB0_33 Depth=1
	v_cmp_ne_u32_e64 s0, 11, v8
	s_and_not1_b32 s20, s20, exec_lo
	s_mov_b32 s19, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s20, s20, s0
; %bb.40:                               ; %Flow183
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s19, s19, exec_lo
	s_and_b32 s20, s20, exec_lo
                                        ; implicit-def: $vgpr8
.LBB0_41:                               ; %Flow181
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_or_saveexec_b32 s21, s21
	v_mov_b32_e32 v14, s1
	s_xor_b32 exec_lo, exec_lo, s21
	s_cbranch_execz .LBB0_47
; %bb.42:                               ; %NodeBlock124
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_mov_b32 s22, s20
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $sgpr23
	v_cmpx_lt_i32_e32 1, v8
	s_xor_b32 s1, exec_lo, s1
; %bb.43:                               ; %LeafBlock122
                                        ;   in Loop: Header=BB0_33 Depth=1
	v_cmp_ne_u32_e64 s0, 2, v8
	s_and_not1_b32 s22, s20, exec_lo
	s_mov_b32 s23, 2
                                        ; implicit-def: $vgpr8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s22, s22, s0
; %bb.44:                               ; %Flow185
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_or_saveexec_b32 s24, s1
	s_mov_b32 s0, s19
	s_xor_b32 exec_lo, exec_lo, s24
; %bb.45:                               ; %LeafBlock120
                                        ;   in Loop: Header=BB0_33 Depth=1
	v_cmp_eq_u32_e64 s0, 1, v8
	v_cmp_ne_u32_e64 s1, 1, v8
	s_and_not1_b32 s25, s19, exec_lo
	s_and_not1_b32 s22, s22, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 s0, s0, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s0, s25, s0
	s_or_b32 s22, s22, s1
; %bb.46:                               ; %Flow186
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s24
	v_mov_b32_e32 v14, s23
	s_and_not1_b32 s1, s19, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s20, s20, exec_lo
	s_and_b32 s22, s22, exec_lo
	s_or_b32 s19, s1, s0
	s_or_b32 s20, s20, s22
.LBB0_47:                               ; %Flow184
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s21
	s_and_saveexec_b32 s0, s20
; %bb.48:                               ;   in Loop: Header=BB0_33 Depth=1
	v_mov_b32_e32 v14, 0
	s_and_not1_b32 s19, s19, exec_lo
; %bb.49:                               ; %Flow187
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s19
; %bb.50:                               ;   in Loop: Header=BB0_33 Depth=1
	v_mov_b32_e32 v14, 1
; %bb.51:                               ; %pawn_owner.exit29.i
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, v14, v4
	s_and_b32 s0, s0, exec_lo
.LBB0_52:                               ; %Flow189
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	s_mov_b32 s18, -1
	s_or_not1_b32 s19, s0, exec_lo
.LBB0_53:                               ; %Flow188
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
	s_mov_b32 s0, -1
                                        ; implicit-def: $sgpr1
	s_and_saveexec_b32 s17, s19
; %bb.54:                               ;   in Loop: Header=BB0_33 Depth=1
	v_sub_nc_u32_e32 v13, v13, v11
	v_add_nc_u32_e32 v7, v7, v12
	s_and_b32 s1, vcc_lo, exec_lo
	s_and_not1_b32 s18, s18, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, 0, v13
	s_or_not1_b32 s0, s0, exec_lo
; %bb.55:                               ; %Flow190
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
	s_xor_b32 s17, s18, -1
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s13, s0, s13
	s_and_not1_b32 s0, s15, exec_lo
	s_and_b32 s15, s17, exec_lo
	s_and_not1_b32 s14, s14, exec_lo
	s_and_b32 s16, s16, exec_lo
	s_or_b32 s15, s0, s15
	s_or_b32 s14, s14, s16
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_33
; %bb.56:                               ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s14, exec_lo
	s_or_not1_b32 s14, s15, exec_lo
.LBB0_57:                               ; %Flow196
	s_or_b32 exec_lo, exec_lo, s11
	s_mov_b32 s13, 0
	s_mov_b32 s0, 0
	s_and_saveexec_b32 s11, s14
	s_cbranch_execz .LBB0_63
; %bb.58:                               ; %NodeBlock138
	s_mov_b32 s14, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 21, v9
	s_xor_b32 s0, exec_lo, s0
; %bb.59:                               ; %LeafBlock136
	v_cmp_ne_u32_e32 vcc_lo, 22, v9
	s_mov_b32 s14, exec_lo
	s_and_b32 s13, vcc_lo, exec_lo
; %bb.60:                               ; %Flow198
	s_and_not1_saveexec_b32 s15, s0
; %bb.61:                               ; %LeafBlock134
	v_cmp_eq_u32_e32 vcc_lo, 11, v9
	v_cmp_ne_u32_e64 s0, 11, v9
	s_and_not1_b32 s14, s14, exec_lo
	s_and_not1_b32 s13, s13, exec_lo
	s_and_b32 s16, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s14, s14, s16
	s_or_b32 s13, s13, s0
; %bb.62:                               ; %Flow199
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s14, exec_lo
	s_and_b32 s13, s13, exec_lo
.LBB0_63:                               ; %Flow197
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s10, s10, exec_lo
	s_and_b32 s13, s13, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s11, s0, exec_lo
	s_or_b32 s10, s10, s13
.LBB0_64:                               ; %Flow195
	s_or_b32 exec_lo, exec_lo, s12
	s_and_saveexec_b32 s12, s10
	s_cbranch_execz .LBB0_102
; %bb.65:
	v_cmp_gt_u32_e64 s10, 2, v10
	s_mov_b32 s13, exec_lo
                                        ; implicit-def: $sgpr14
	v_cmpx_lt_u32_e32 1, v10
	s_cbranch_execz .LBB0_101
; %bb.66:
	v_add_nc_u32_e32 v3, v6, v3
	v_add_lshl_u32 v2, v5, v2, 2
	s_mov_b32 s14, 0
	s_mov_b32 s0, s10
	s_mov_b32 s15, exec_lo
	v_lshrrev_b32_e32 v4, 1, v3
	v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v2, 0x7ffffff8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v4
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v0
	s_cbranch_execz .LBB0_100
; %bb.67:                               ; %NodeBlock152
	s_mov_b32 s17, 0
	s_mov_b32 s16, 0
	s_mov_b32 s18, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 10, v9
	s_xor_b32 s18, exec_lo, s18
	s_cbranch_execz .LBB0_73
; %bb.68:                               ; %NodeBlock150
	s_mov_b32 s19, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v9
	s_xor_b32 s19, exec_lo, s19
; %bb.69:                               ; %LeafBlock148
	v_cmp_ne_u32_e32 vcc_lo, 22, v9
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr9
	s_and_b32 s17, vcc_lo, exec_lo
; %bb.70:                               ; %Flow175
	s_and_not1_saveexec_b32 s19, s19
; %bb.71:                               ; %LeafBlock146
	v_cmp_ne_u32_e32 vcc_lo, 11, v9
	s_and_not1_b32 s17, s17, exec_lo
	s_mov_b32 s16, exec_lo
	s_and_b32 s20, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s17, s17, s20
; %bb.72:                               ; %Flow176
	s_or_b32 exec_lo, exec_lo, s19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s16, s16, exec_lo
	s_and_b32 s17, s17, exec_lo
                                        ; implicit-def: $vgpr9
.LBB0_73:                               ; %Flow174
	s_or_saveexec_b32 s18, s18
	v_mov_b32_e32 v1, s0
	s_xor_b32 exec_lo, exec_lo, s18
	s_cbranch_execz .LBB0_79
; %bb.74:                               ; %NodeBlock144
	s_mov_b32 s19, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr20
	v_cmpx_lt_i32_e32 1, v9
	s_xor_b32 s0, exec_lo, s0
; %bb.75:                               ; %LeafBlock142
	v_cmp_ne_u32_e32 vcc_lo, 2, v9
	s_and_not1_b32 s19, s17, exec_lo
	s_mov_b32 s20, 2
                                        ; implicit-def: $vgpr9
	s_and_b32 s21, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s19, s19, s21
; %bb.76:                               ; %Flow178
	s_or_saveexec_b32 s21, s0
	s_mov_b32 s0, s16
	s_xor_b32 exec_lo, exec_lo, s21
; %bb.77:                               ; %LeafBlock140
	v_cmp_eq_u32_e32 vcc_lo, 1, v9
	v_cmp_ne_u32_e64 s0, 1, v9
	s_and_not1_b32 s22, s16, exec_lo
	s_and_not1_b32 s19, s19, exec_lo
	s_and_b32 s23, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s24, s0, exec_lo
	s_or_b32 s0, s22, s23
	s_or_b32 s19, s19, s24
; %bb.78:                               ; %Flow179
	s_or_b32 exec_lo, exec_lo, s21
	v_mov_b32_e32 v1, s20
	s_and_not1_b32 s16, s16, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s17, s17, exec_lo
	s_and_b32 s19, s19, exec_lo
	s_or_b32 s16, s16, s0
	s_or_b32 s17, s17, s19
.LBB0_79:                               ; %Flow177
	s_or_b32 exec_lo, exec_lo, s18
	s_and_saveexec_b32 s0, s17
; %bb.80:
	v_mov_b32_e32 v1, 0
	s_and_not1_b32 s16, s16, exec_lo
; %bb.81:                               ; %Flow180
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s16
; %bb.82:
	v_mov_b32_e32 v1, 1
; %bb.83:                               ; %pawn_owner.exit.i85
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s17, 0
	s_mov_b32 s16, 0
	s_mov_b32 s18, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s18, exec_lo, s18
	s_cbranch_execz .LBB0_89
; %bb.84:                               ; %NodeBlock164
	s_mov_b32 s19, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s19, exec_lo, s19
; %bb.85:                               ; %LeafBlock162
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s17, vcc_lo, exec_lo
; %bb.86:                               ; %Flow168
	s_and_not1_saveexec_b32 s19, s19
; %bb.87:                               ; %LeafBlock160
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s17, s17, exec_lo
	s_mov_b32 s16, exec_lo
	s_and_b32 s20, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s17, s17, s20
; %bb.88:                               ; %Flow169
	s_or_b32 exec_lo, exec_lo, s19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s16, s16, exec_lo
	s_and_b32 s17, s17, exec_lo
                                        ; implicit-def: $vgpr0
.LBB0_89:                               ; %Flow
	s_or_saveexec_b32 s18, s18
	v_mov_b32_e32 v2, s0
	s_xor_b32 exec_lo, exec_lo, s18
	s_cbranch_execz .LBB0_95
; %bb.90:                               ; %NodeBlock158
	s_mov_b32 s19, s17
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr20
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.91:                               ; %LeafBlock156
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s19, s17, exec_lo
	s_mov_b32 s20, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s21, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s19, s19, s21
; %bb.92:                               ; %Flow171
	s_or_saveexec_b32 s21, s0
	s_mov_b32 s0, s16
	s_xor_b32 exec_lo, exec_lo, s21
; %bb.93:                               ; %LeafBlock154
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s22, s16, exec_lo
	s_and_not1_b32 s19, s19, exec_lo
	s_and_b32 s23, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s24, s0, exec_lo
	s_or_b32 s0, s22, s23
	s_or_b32 s19, s19, s24
; %bb.94:                               ; %Flow172
	s_or_b32 exec_lo, exec_lo, s21
	v_mov_b32_e32 v2, s20
	s_and_not1_b32 s16, s16, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s17, s17, exec_lo
	s_and_b32 s19, s19, exec_lo
	s_or_b32 s16, s16, s0
	s_or_b32 s17, s17, s19
.LBB0_95:                               ; %Flow170
	s_or_b32 exec_lo, exec_lo, s18
	s_and_saveexec_b32 s0, s17
; %bb.96:
	v_mov_b32_e32 v2, 0
	s_and_not1_b32 s16, s16, exec_lo
; %bb.97:                               ; %Flow173
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s16
; %bb.98:
	v_mov_b32_e32 v2, 1
; %bb.99:                               ; %pawn_owner.exit10.i
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, v1, v2
	s_and_not1_b32 s0, s10, exec_lo
	s_and_b32 s16, vcc_lo, exec_lo
	s_or_b32 s0, s0, s16
.LBB0_100:                              ; %Flow202
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s10, s10, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s10, s10, s0
.LBB0_101:                              ; %Flow201
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s0, s1, exec_lo
	s_and_b32 s1, s14, exec_lo
	s_and_not1_b32 s11, s11, exec_lo
	s_and_b32 s10, s10, exec_lo
	s_or_b32 s1, s0, s1
	s_or_b32 s11, s11, s10
.LBB0_102:                              ; %Flow200
	s_or_b32 exec_lo, exec_lo, s12
	s_and_saveexec_b32 s0, s11
; %bb.103:
	s_or_b32 s1, s1, exec_lo
; %bb.104:                              ; %Flow203
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s1, exec_lo
.LBB0_105:                              ; %Flow204
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB0_106:                              ; %Flow205
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB0_107:                              ; %Flow206
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB0_108:                              ; %Flow207
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB0_109:                              ; %Flow215
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB0_110:                              ; %Flow216
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB0_111:                              ; %Flow217
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB0_112:                              ; %queen_way.exit
	s_or_b32 exec_lo, exec_lo, s2
	v_cndmask_b32_e64 v0, 0, 1, s0
	s_setpc_b64 s[30:31]
.Lfunc_end0:
	.size	is_move_correct, .Lfunc_end0-is_move_correct
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 2380
; NumSgprs: 34
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
	.section	.text.unlikely.,"ax",@progbits
	.p2align	2                               ; -- Begin function __ockl_dm_alloc
	.type	__ockl_dm_alloc,@function
__ockl_dm_alloc:                        ; @__ockl_dm_alloc
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_or_saveexec_b32 s0, -1
	scratch_store_b32 off, v40, s32         ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s0
	v_writelane_b32 v40, s34, 0
	v_writelane_b32 v40, s35, 1
	v_writelane_b32 v40, s36, 2
	v_writelane_b32 v40, s37, 3
	v_writelane_b32 v40, s38, 4
	v_writelane_b32 v40, s39, 5
	v_writelane_b32 v40, s40, 6
	v_writelane_b32 v40, s41, 7
	v_writelane_b32 v40, s42, 8
	v_writelane_b32 v40, s43, 9
	v_writelane_b32 v40, s44, 10
	v_writelane_b32 v40, s30, 11
	v_writelane_b32 v40, s31, 12
	v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_ne_u64_e32 0, v[4:5]
	s_cbranch_execz .LBB1_702
; %bb.1:
	v_mbcnt_lo_u32_b32 v2, -1, 0
                                        ; implicit-def: $vgpr0_vgpr1
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u64_e32 0xc01, v[4:5]
	s_xor_b32 s23, exec_lo, s0
	s_cbranch_execz .LBB1_668
; %bb.2:
	v_max_u32_e32 v0, 16, v4
	v_mov_b32_e32 v5, 0
	s_load_b64 s[10:11], s[8:9], 0x60
	v_dual_mov_b32 v118, 1 :: v_dual_mov_b32 v17, 0x1800
	s_delay_alu instid0(VALU_DEP_3)
	v_clz_i32_u32_e32 v1, v0
	v_mov_b32_e32 v20, 0x200000
	v_mov_b32_e32 v8, v5
	v_mov_b32_e32 v14, 1
	v_mov_b32_e32 v68, 0x100
	v_not_b32_e32 v3, v1
	v_lshlrev_b32_e32 v1, 1, v1
	v_mov_b32_e32 v13, 3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, 15, v3
	v_lshlrev_b32_e64 v3, v3, 1
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s10, 0x1a800
	s_addc_u32 s13, s11, 0
	s_add_u32 s14, s10, 0x1a808
	v_lshrrev_b32_e32 v4, 1, v3
	v_cmp_gt_u32_e32 vcc_lo, v0, v3
	s_addc_u32 s15, s11, 0
	s_add_u32 s4, s10, 0x800
	s_addc_u32 s5, s11, 0
	v_or_b32_e32 v3, v4, v3
	v_cndmask_b32_e64 v6, 0, 1, vcc_lo
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __unnamed_1@rel32@lo+12
	s_addc_u32 s1, s1, __unnamed_1@rel32@hi+20
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+4
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+12
	s_add_u32 s6, s10, 0x1000
	v_cmp_gt_u32_e32 vcc_lo, v0, v3
	v_sub_nc_u32_e32 v1, v6, v1
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, 54, v1, vcc_lo
	v_lshlrev_b64 v[0:1], 7, v[7:8]
	v_lshlrev_b64 v[3:4], 5, v[7:8]
	v_lshrrev_b64 v[8:9], v7, 0xbf
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v32, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v33, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v34, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v35, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v36, vcc_lo, v3, s0
	v_add_co_ci_u32_e32 v37, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v38, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v39, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v48, vcc_lo, s6, v0
	s_add_u32 s0, s10, 0x2000
	v_add_co_ci_u32_e32 v49, vcc_lo, s7, v1, vcc_lo
	s_addc_u32 s1, s11, 0
	v_add_co_u32 v50, vcc_lo, s0, v0
	s_add_u32 s2, s10, 0x1800
	v_add_co_ci_u32_e32 v51, vcc_lo, s1, v1, vcc_lo
	s_addc_u32 s3, s11, 0
	v_add_co_u32 v52, vcc_lo, s2, v0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __unnamed_1@rel32@lo+24
	s_addc_u32 s1, s1, __unnamed_1@rel32@hi+32
	v_add_co_ci_u32_e32 v53, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v54, vcc_lo, v3, s0
	v_and_b32_e32 v0, 1, v8
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+20
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+28
	v_add_co_ci_u32_e32 v55, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v64, vcc_lo, v3, s2
	v_mov_b32_e32 v9, v5
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, __unnamed_1@rel32@lo+28
	s_addc_u32 s5, s5, __unnamed_1@rel32@hi+36
	v_add_co_ci_u32_e32 v65, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v66, vcc_lo, v3, s4
	v_cmp_eq_u32_e64 s0, 1, v0
	v_mov_b32_e32 v0, 0
	v_add_co_ci_u32_e32 v67, vcc_lo, s5, v4, vcc_lo
	v_mov_b32_e32 v8, v5
	v_dual_mov_b32 v10, v5 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v3, v14
	s_add_u32 s24, s10, 0x100
	s_mov_b32 s4, 0
	s_addc_u32 s25, s11, 0
.LBB1_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_6 Depth 2
                                        ;       Child Loop BB1_11 Depth 3
                                        ;         Child Loop BB1_14 Depth 4
                                        ;         Child Loop BB1_43 Depth 4
                                        ;           Child Loop BB1_47 Depth 5
                                        ;           Child Loop BB1_75 Depth 5
                                        ;             Child Loop BB1_93 Depth 6
                                        ;             Child Loop BB1_101 Depth 6
                                        ;             Child Loop BB1_107 Depth 6
                                        ;             Child Loop BB1_116 Depth 6
                                        ;             Child Loop BB1_121 Depth 6
                                        ;             Child Loop BB1_123 Depth 6
                                        ;             Child Loop BB1_144 Depth 6
                                        ;             Child Loop BB1_152 Depth 6
                                        ;             Child Loop BB1_158 Depth 6
                                        ;             Child Loop BB1_167 Depth 6
                                        ;             Child Loop BB1_175 Depth 6
                                        ;             Child Loop BB1_178 Depth 6
                                        ;             Child Loop BB1_180 Depth 6
                                        ;             Child Loop BB1_182 Depth 6
                                        ;             Child Loop BB1_184 Depth 6
                                        ;             Child Loop BB1_186 Depth 6
                                        ;             Child Loop BB1_188 Depth 6
                                        ;             Child Loop BB1_210 Depth 6
                                        ;             Child Loop BB1_218 Depth 6
                                        ;             Child Loop BB1_224 Depth 6
                                        ;             Child Loop BB1_233 Depth 6
                                        ;             Child Loop BB1_240 Depth 6
                                        ;             Child Loop BB1_243 Depth 6
                                        ;             Child Loop BB1_248 Depth 6
                                        ;             Child Loop BB1_255 Depth 6
                                        ;             Child Loop BB1_288 Depth 6
                                        ;             Child Loop BB1_296 Depth 6
                                        ;             Child Loop BB1_302 Depth 6
                                        ;             Child Loop BB1_311 Depth 6
                                        ;           Child Loop BB1_320 Depth 5
                                        ;           Child Loop BB1_323 Depth 5
                                        ;           Child Loop BB1_325 Depth 5
                                        ;           Child Loop BB1_327 Depth 5
                                        ;           Child Loop BB1_329 Depth 5
                                        ;           Child Loop BB1_331 Depth 5
                                        ;           Child Loop BB1_333 Depth 5
                                        ;       Child Loop BB1_347 Depth 3
                                        ;         Child Loop BB1_351 Depth 4
                                        ;         Child Loop BB1_378 Depth 4
                                        ;           Child Loop BB1_396 Depth 5
                                        ;           Child Loop BB1_404 Depth 5
                                        ;           Child Loop BB1_410 Depth 5
                                        ;           Child Loop BB1_419 Depth 5
                                        ;           Child Loop BB1_424 Depth 5
                                        ;           Child Loop BB1_426 Depth 5
                                        ;           Child Loop BB1_447 Depth 5
                                        ;           Child Loop BB1_455 Depth 5
                                        ;           Child Loop BB1_461 Depth 5
                                        ;           Child Loop BB1_470 Depth 5
                                        ;           Child Loop BB1_478 Depth 5
                                        ;           Child Loop BB1_481 Depth 5
                                        ;           Child Loop BB1_483 Depth 5
                                        ;           Child Loop BB1_485 Depth 5
                                        ;           Child Loop BB1_487 Depth 5
                                        ;           Child Loop BB1_489 Depth 5
                                        ;           Child Loop BB1_491 Depth 5
                                        ;           Child Loop BB1_513 Depth 5
                                        ;           Child Loop BB1_521 Depth 5
                                        ;           Child Loop BB1_527 Depth 5
                                        ;           Child Loop BB1_536 Depth 5
                                        ;           Child Loop BB1_543 Depth 5
                                        ;           Child Loop BB1_546 Depth 5
                                        ;           Child Loop BB1_551 Depth 5
                                        ;           Child Loop BB1_558 Depth 5
                                        ;           Child Loop BB1_591 Depth 5
                                        ;           Child Loop BB1_599 Depth 5
                                        ;           Child Loop BB1_605 Depth 5
                                        ;           Child Loop BB1_614 Depth 5
                                        ;         Child Loop BB1_623 Depth 4
                                        ;         Child Loop BB1_626 Depth 4
                                        ;         Child Loop BB1_628 Depth 4
                                        ;         Child Loop BB1_630 Depth 4
                                        ;         Child Loop BB1_632 Depth 4
                                        ;         Child Loop BB1_634 Depth 4
                                        ;         Child Loop BB1_636 Depth 4
                                        ;       Child Loop BB1_649 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v119, v3
	v_mov_b32_e32 v3, v5
	s_mov_b32 s26, exec_lo
	;;#ASMSTART
	;;#ASMEND
	v_cmpx_ne_u32_e32 0, v119
	s_cbranch_execz .LBB1_666
; %bb.4:                                ;   in Loop: Header=BB1_3 Depth=1
	v_readfirstlane_b32 s1, v7
	s_mov_b32 s27, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e64 s1, v7
	s_cbranch_execz .LBB1_665
; %bb.5:                                ; %.preheader196.preheader
                                        ;   in Loop: Header=BB1_3 Depth=1
	v_mov_b32_e32 v3, 1
.LBB1_6:                                ; %.preheader196
                                        ;   Parent Loop BB1_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_11 Depth 3
                                        ;         Child Loop BB1_14 Depth 4
                                        ;         Child Loop BB1_43 Depth 4
                                        ;           Child Loop BB1_47 Depth 5
                                        ;           Child Loop BB1_75 Depth 5
                                        ;             Child Loop BB1_93 Depth 6
                                        ;             Child Loop BB1_101 Depth 6
                                        ;             Child Loop BB1_107 Depth 6
                                        ;             Child Loop BB1_116 Depth 6
                                        ;             Child Loop BB1_121 Depth 6
                                        ;             Child Loop BB1_123 Depth 6
                                        ;             Child Loop BB1_144 Depth 6
                                        ;             Child Loop BB1_152 Depth 6
                                        ;             Child Loop BB1_158 Depth 6
                                        ;             Child Loop BB1_167 Depth 6
                                        ;             Child Loop BB1_175 Depth 6
                                        ;             Child Loop BB1_178 Depth 6
                                        ;             Child Loop BB1_180 Depth 6
                                        ;             Child Loop BB1_182 Depth 6
                                        ;             Child Loop BB1_184 Depth 6
                                        ;             Child Loop BB1_186 Depth 6
                                        ;             Child Loop BB1_188 Depth 6
                                        ;             Child Loop BB1_210 Depth 6
                                        ;             Child Loop BB1_218 Depth 6
                                        ;             Child Loop BB1_224 Depth 6
                                        ;             Child Loop BB1_233 Depth 6
                                        ;             Child Loop BB1_240 Depth 6
                                        ;             Child Loop BB1_243 Depth 6
                                        ;             Child Loop BB1_248 Depth 6
                                        ;             Child Loop BB1_255 Depth 6
                                        ;             Child Loop BB1_288 Depth 6
                                        ;             Child Loop BB1_296 Depth 6
                                        ;             Child Loop BB1_302 Depth 6
                                        ;             Child Loop BB1_311 Depth 6
                                        ;           Child Loop BB1_320 Depth 5
                                        ;           Child Loop BB1_323 Depth 5
                                        ;           Child Loop BB1_325 Depth 5
                                        ;           Child Loop BB1_327 Depth 5
                                        ;           Child Loop BB1_329 Depth 5
                                        ;           Child Loop BB1_331 Depth 5
                                        ;           Child Loop BB1_333 Depth 5
                                        ;       Child Loop BB1_347 Depth 3
                                        ;         Child Loop BB1_351 Depth 4
                                        ;         Child Loop BB1_378 Depth 4
                                        ;           Child Loop BB1_396 Depth 5
                                        ;           Child Loop BB1_404 Depth 5
                                        ;           Child Loop BB1_410 Depth 5
                                        ;           Child Loop BB1_419 Depth 5
                                        ;           Child Loop BB1_424 Depth 5
                                        ;           Child Loop BB1_426 Depth 5
                                        ;           Child Loop BB1_447 Depth 5
                                        ;           Child Loop BB1_455 Depth 5
                                        ;           Child Loop BB1_461 Depth 5
                                        ;           Child Loop BB1_470 Depth 5
                                        ;           Child Loop BB1_478 Depth 5
                                        ;           Child Loop BB1_481 Depth 5
                                        ;           Child Loop BB1_483 Depth 5
                                        ;           Child Loop BB1_485 Depth 5
                                        ;           Child Loop BB1_487 Depth 5
                                        ;           Child Loop BB1_489 Depth 5
                                        ;           Child Loop BB1_491 Depth 5
                                        ;           Child Loop BB1_513 Depth 5
                                        ;           Child Loop BB1_521 Depth 5
                                        ;           Child Loop BB1_527 Depth 5
                                        ;           Child Loop BB1_536 Depth 5
                                        ;           Child Loop BB1_543 Depth 5
                                        ;           Child Loop BB1_546 Depth 5
                                        ;           Child Loop BB1_551 Depth 5
                                        ;           Child Loop BB1_558 Depth 5
                                        ;           Child Loop BB1_591 Depth 5
                                        ;           Child Loop BB1_599 Depth 5
                                        ;           Child Loop BB1_605 Depth 5
                                        ;           Child Loop BB1_614 Depth 5
                                        ;         Child Loop BB1_623 Depth 4
                                        ;         Child Loop BB1_626 Depth 4
                                        ;         Child Loop BB1_628 Depth 4
                                        ;         Child Loop BB1_630 Depth 4
                                        ;         Child Loop BB1_632 Depth 4
                                        ;         Child Loop BB1_634 Depth 4
                                        ;         Child Loop BB1_636 Depth 4
                                        ;       Child Loop BB1_649 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v128, v3 :: v_dual_mov_b32 v3, 0
	s_mov_b32 s28, exec_lo
	;;#ASMSTART
	;;#ASMEND
	v_cmpx_ne_u32_e32 0, v128
	s_cbranch_execz .LBB1_664
; %bb.7:                                ;   in Loop: Header=BB1_6 Depth=2
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB1_9
; %bb.8:                                ;   in Loop: Header=BB1_6 Depth=2
	global_load_b32 v3, v[32:33], off glc
.LBB1_9:                                ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s29, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_gt_u32 s29, 0x100ff
	s_cbranch_scc0 .LBB1_344
; %bb.10:                               ;   in Loop: Header=BB1_6 Depth=2
	v_mbcnt_lo_u32_b32 v129, exec_lo, 0
	v_mov_b32_e32 v4, v7
	s_mov_b32 s30, 0
	s_bcnt1_i32_b32 s31, exec_lo
                                        ; implicit-def: $vgpr11_vgpr12
.LBB1_11:                               ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB1_14 Depth 4
                                        ;         Child Loop BB1_43 Depth 4
                                        ;           Child Loop BB1_47 Depth 5
                                        ;           Child Loop BB1_75 Depth 5
                                        ;             Child Loop BB1_93 Depth 6
                                        ;             Child Loop BB1_101 Depth 6
                                        ;             Child Loop BB1_107 Depth 6
                                        ;             Child Loop BB1_116 Depth 6
                                        ;             Child Loop BB1_121 Depth 6
                                        ;             Child Loop BB1_123 Depth 6
                                        ;             Child Loop BB1_144 Depth 6
                                        ;             Child Loop BB1_152 Depth 6
                                        ;             Child Loop BB1_158 Depth 6
                                        ;             Child Loop BB1_167 Depth 6
                                        ;             Child Loop BB1_175 Depth 6
                                        ;             Child Loop BB1_178 Depth 6
                                        ;             Child Loop BB1_180 Depth 6
                                        ;             Child Loop BB1_182 Depth 6
                                        ;             Child Loop BB1_184 Depth 6
                                        ;             Child Loop BB1_186 Depth 6
                                        ;             Child Loop BB1_188 Depth 6
                                        ;             Child Loop BB1_210 Depth 6
                                        ;             Child Loop BB1_218 Depth 6
                                        ;             Child Loop BB1_224 Depth 6
                                        ;             Child Loop BB1_233 Depth 6
                                        ;             Child Loop BB1_240 Depth 6
                                        ;             Child Loop BB1_243 Depth 6
                                        ;             Child Loop BB1_248 Depth 6
                                        ;             Child Loop BB1_255 Depth 6
                                        ;             Child Loop BB1_288 Depth 6
                                        ;             Child Loop BB1_296 Depth 6
                                        ;             Child Loop BB1_302 Depth 6
                                        ;             Child Loop BB1_311 Depth 6
                                        ;           Child Loop BB1_320 Depth 5
                                        ;           Child Loop BB1_323 Depth 5
                                        ;           Child Loop BB1_325 Depth 5
                                        ;           Child Loop BB1_327 Depth 5
                                        ;           Child Loop BB1_329 Depth 5
                                        ;           Child Loop BB1_331 Depth 5
                                        ;           Child Loop BB1_333 Depth 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[15:16], 7, v[4:5]
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s1, 0, v129
	v_mov_b32_e32 v6, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB1_13
; %bb.12:                               ;   in Loop: Header=BB1_11 Depth=3
	v_add_co_u32 v18, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v16, vcc_lo
	global_load_b32 v6, v[18:19], off glc
.LBB1_13:                               ;   in Loop: Header=BB1_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b64 v[18:19], 5, v[4:5]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+8
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v18, s2
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v19, vcc_lo
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v6
	global_load_b32 v3, v[18:19], off
	v_add_nc_u32_e32 v6, s2, v129
	s_mov_b32 s2, 0x10100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v18, 0xff00ff01, v6
	v_lshrrev_b32_e32 v18, 16, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v18, 0x10100, v18
	v_sub_nc_u32_e32 v6, v6, v18
	v_add_co_u32 v18, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v16, vcc_lo
.LBB1_14:                               ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr15_vgpr16
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_gt_u32_e32 0x100, v6
	s_xor_b32 s3, exec_lo, s3
; %bb.15:                               ;   in Loop: Header=BB1_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, 0x1800, v4, s[6:7]
	v_mad_u64_u32 v[15:16], null, v6, 24, v[21:22]
; %bb.16:                               ; %Flow1135
                                        ;   in Loop: Header=BB1_14 Depth=4
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB1_18
; %bb.17:                               ;   in Loop: Header=BB1_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	v_add_nc_u32_e32 v21, 0xffffff00, v6
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[15:16], null, 0x1800, v4, s[6:7]
	v_lshrrev_b32_e32 v23, 8, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, v23, 24, v[15:16]
	v_and_b32_e32 v23, 0xff, v6
	global_load_b64 v[21:22], v[21:22], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, v23, 24, v[21:22]
.LBB1_18:                               ;   in Loop: Header=BB1_14 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v15, v[15:16], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v15, v3
	s_cbranch_vccz .LBB1_20
; %bb.19:                               ;   in Loop: Header=BB1_14 Depth=4
	s_ctz_i32_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s3, s3, 2
	v_mov_b32_e32 v15, s3
	ds_bpermute_b32 v15, v15, v6
	s_branch .LBB1_21
.LBB1_20:                               ;   in Loop: Header=BB1_14 Depth=4
	v_mov_b32_e32 v15, -1
.LBB1_21:                               ;   in Loop: Header=BB1_14 Depth=4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v15
	s_cmp_eq_u32 s5, -1
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB1_24
; %bb.22:                               ;   in Loop: Header=BB1_14 Depth=4
	s_cmpk_lt_u32 s5, 0x100
	s_cbranch_scc0 .LBB1_25
; %bb.23:                               ;   in Loop: Header=BB1_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, 0x1800, v4, s[6:7]
	s_mov_b32 s6, 0
	v_mad_u64_u32 v[15:16], null, s5, 24, v[21:22]
	s_branch .LBB1_26
.LBB1_24:                               ;   in Loop: Header=BB1_14 Depth=4
	s_mov_b32 s5, -1
                                        ; implicit-def: $vgpr15_vgpr16
	s_branch .LBB1_29
.LBB1_25:                               ;   in Loop: Header=BB1_14 Depth=4
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr15_vgpr16
.LBB1_26:                               ; %Flow1128
                                        ;   in Loop: Header=BB1_14 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_28
; %bb.27:                               ;   in Loop: Header=BB1_14 Depth=4
	s_add_i32 s6, s5, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s16, s6, 8
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_and_b32 s5, s5, 0xff
	v_mad_u64_u32 v[15:16], null, 0x1800, v4, s[6:7]
	v_mad_u64_u32 v[21:22], null, s16, 24, v[15:16]
	global_load_b64 v[21:22], v[21:22], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, s5, 24, v[21:22]
.LBB1_28:                               ; %Flow1129
                                        ;   in Loop: Header=BB1_14 Depth=4
	s_mov_b32 s5, 0
.LBB1_29:                               ; %Flow1131
                                        ;   in Loop: Header=BB1_14 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB1_33
; %bb.30:                               ;   in Loop: Header=BB1_14 Depth=4
	v_add_nc_u32_e32 v6, s31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v15, 0xff00ff01, v6
	v_lshrrev_b32_e32 v15, 16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v15, 0x10100, v15
	v_sub_nc_u32_e32 v6, v6, v15
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB1_32
; %bb.31:                               ;   in Loop: Header=BB1_14 Depth=4
	global_store_b32 v[18:19], v6, off
.LBB1_32:                               ;   in Loop: Header=BB1_14 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	v_dual_mov_b32 v16, v12 :: v_dual_mov_b32 v15, v11
	s_sub_i32 s2, s2, s31
.LBB1_33:                               ;   in Loop: Header=BB1_14 Depth=4
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB1_35
; %bb.34:                               ;   in Loop: Header=BB1_14 Depth=4
	s_mov_b32 s3, 0
	s_mov_b32 s5, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $vgpr6
	s_branch .LBB1_36
.LBB1_35:                               ;   in Loop: Header=BB1_14 Depth=4
	s_cmp_lt_i32 s2, 1
	s_mov_b32 s5, 0
	s_cselect_b32 s6, -1, 0
                                        ; implicit-def: $sgpr3
.LBB1_36:                               ; %Flow1137
                                        ;   in Loop: Header=BB1_14 Depth=4
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_14
; %bb.37:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB1_11 Depth=3
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB1_342
; %bb.38:                               ;   in Loop: Header=BB1_11 Depth=3
	v_and_b32_e32 v3, -2, v4
	v_mov_b32_e32 v11, 0
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e32 vcc_lo, v4, v7
	s_mov_b32 s3, 0
	v_cmp_gt_u32_e64 s2, 14, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s34, s2
	s_cbranch_execz .LBB1_341
; %bb.39:                               ;   in Loop: Header=BB1_11 Depth=3
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB1_41
; %bb.40:                               ;   in Loop: Header=BB1_11 Depth=3
	v_mov_b32_e32 v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 7, v[3:4]
	v_add_co_u32 v11, vcc_lo, s24, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s25, v12, vcc_lo
	global_load_b32 v4, v[11:12], off offset:2048 glc
.LBB1_41:                               ;   in Loop: Header=BB1_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s36, v4
	v_add_nc_u32_e32 v22, 2, v3
	s_mov_b32 s6, -1
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_gt_u32 s36, 0x100ff
	s_cbranch_scc1 .LBB1_340
; %bb.42:                               ;   in Loop: Header=BB1_11 Depth=3
	v_mov_b32_e32 v4, v5
	s_bcnt1_i32_b32 s35, exec_lo
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+76
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+84
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, __unnamed_1@rel32@lo+68
	s_addc_u32 s7, s7, __unnamed_1@rel32@hi+76
	s_add_u32 s1, s24, 0x800
	v_lshlrev_b64 v[11:12], 7, v[3:4]
	v_lshlrev_b64 v[3:4], 5, v[3:4]
	v_lshrrev_b64 v[15:16], v22, 0xbf
	v_mbcnt_lo_u32_b32 v130, exec_lo, 0
	v_mov_b32_e32 v23, v5
	v_mov_b32_e32 v24, v5
	v_add_co_u32 v70, vcc_lo, s24, v11
	v_add_co_ci_u32_e32 v71, vcc_lo, s25, v12, vcc_lo
	v_add_co_u32 v80, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v81, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v82, vcc_lo, v3, s6
	v_add_co_ci_u32_e32 v83, vcc_lo, s7, v4, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v84, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x1000
	v_add_co_ci_u32_e32 v85, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v86, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x2000
	v_add_co_ci_u32_e32 v87, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v96, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x1800
	v_add_co_ci_u32_e32 v97, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s5, s25, 0
	v_add_co_u32 v98, vcc_lo, s1, v11
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+88
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+96
	v_add_co_ci_u32_e32 v99, vcc_lo, s5, v12, vcc_lo
	v_add_co_u32 v100, vcc_lo, v3, s2
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, __unnamed_1@rel32@lo+84
	s_addc_u32 s7, s7, __unnamed_1@rel32@hi+92
	v_add_co_ci_u32_e32 v101, vcc_lo, s3, v4, vcc_lo
	v_and_b32_e32 v6, 1, v15
	v_add_co_u32 v102, vcc_lo, v3, s6
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+92
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+100
	v_add_co_ci_u32_e32 v103, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v112, vcc_lo, v3, s2
	v_cmp_eq_u32_e64 s1, 1, v6
	v_add_co_ci_u32_e32 v113, vcc_lo, s3, v4, vcc_lo
	v_mov_b32_e32 v25, v5
                                        ; implicit-def: $vgpr114_vgpr115
.LBB1_43:                               ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB1_47 Depth 5
                                        ;           Child Loop BB1_75 Depth 5
                                        ;             Child Loop BB1_93 Depth 6
                                        ;             Child Loop BB1_101 Depth 6
                                        ;             Child Loop BB1_107 Depth 6
                                        ;             Child Loop BB1_116 Depth 6
                                        ;             Child Loop BB1_121 Depth 6
                                        ;             Child Loop BB1_123 Depth 6
                                        ;             Child Loop BB1_144 Depth 6
                                        ;             Child Loop BB1_152 Depth 6
                                        ;             Child Loop BB1_158 Depth 6
                                        ;             Child Loop BB1_167 Depth 6
                                        ;             Child Loop BB1_175 Depth 6
                                        ;             Child Loop BB1_178 Depth 6
                                        ;             Child Loop BB1_180 Depth 6
                                        ;             Child Loop BB1_182 Depth 6
                                        ;             Child Loop BB1_184 Depth 6
                                        ;             Child Loop BB1_186 Depth 6
                                        ;             Child Loop BB1_188 Depth 6
                                        ;             Child Loop BB1_210 Depth 6
                                        ;             Child Loop BB1_218 Depth 6
                                        ;             Child Loop BB1_224 Depth 6
                                        ;             Child Loop BB1_233 Depth 6
                                        ;             Child Loop BB1_240 Depth 6
                                        ;             Child Loop BB1_243 Depth 6
                                        ;             Child Loop BB1_248 Depth 6
                                        ;             Child Loop BB1_255 Depth 6
                                        ;             Child Loop BB1_288 Depth 6
                                        ;             Child Loop BB1_296 Depth 6
                                        ;             Child Loop BB1_302 Depth 6
                                        ;             Child Loop BB1_311 Depth 6
                                        ;           Child Loop BB1_320 Depth 5
                                        ;           Child Loop BB1_323 Depth 5
                                        ;           Child Loop BB1_325 Depth 5
                                        ;           Child Loop BB1_327 Depth 5
                                        ;           Child Loop BB1_329 Depth 5
                                        ;           Child Loop BB1_331 Depth 5
                                        ;           Child Loop BB1_333 Depth 5
	s_cmp_eq_u32 s36, 0
	s_mov_b32 s5, -1
	;;#ASMSTART
	;;#ASMEND
	s_cbranch_scc1 .LBB1_72
; %bb.44:                               ;   in Loop: Header=BB1_43 Depth=4
	v_cmp_eq_u32_e64 s2, 0, v130
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_46
; %bb.45:                               ;   in Loop: Header=BB1_43 Depth=4
	global_load_b32 v3, v[70:71], off glc
.LBB1_46:                               ;   in Loop: Header=BB1_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v6, v[80:81], off
	v_cvt_f32_u32_e32 v4, s36
	s_sub_i32 s3, 0, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, s3, v4
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s3, v3
	v_add_nc_u32_e32 v3, s3, v130
	s_mov_b32 s3, s36
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v11, v4, v11
	v_add_nc_u32_e32 v11, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v11
	v_mul_lo_u32 v4, v4, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v3, v4, vcc_lo
.LBB1_47:                               ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x100, v12
	s_xor_b32 s6, exec_lo, s6
; %bb.48:                               ;   in Loop: Header=BB1_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[3:4], null, v12, 24, v[15:16]
; %bb.49:                               ; %Flow952
                                        ;   in Loop: Header=BB1_47 Depth=5
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB1_51
; %bb.50:                               ;   in Loop: Header=BB1_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	v_add_nc_u32_e32 v15, 0xffffff00, v12
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_lshrrev_b32_e32 v18, 8, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v18, 24, v[3:4]
	v_and_b32_e32 v18, 0xff, v12
	global_load_b64 v[15:16], v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v18, 24, v[15:16]
.LBB1_51:                               ;   in Loop: Header=BB1_47 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b32 v3, v[3:4], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v3, v6
	s_cbranch_vccz .LBB1_53
; %bb.52:                               ;   in Loop: Header=BB1_47 Depth=5
	s_ctz_i32_b32 s6, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 2
	v_mov_b32_e32 v3, s6
	ds_bpermute_b32 v3, v3, v12
	s_branch .LBB1_54
.LBB1_53:                               ;   in Loop: Header=BB1_47 Depth=5
	v_mov_b32_e32 v3, -1
.LBB1_54:                               ;   in Loop: Header=BB1_47 Depth=5
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v3
	s_cmp_eq_u32 s7, -1
	s_cselect_b32 s6, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_57
; %bb.55:                               ;   in Loop: Header=BB1_47 Depth=5
	s_cmpk_lt_u32 s7, 0x100
	s_cbranch_scc0 .LBB1_58
; %bb.56:                               ;   in Loop: Header=BB1_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	s_mov_b32 s16, 0
	v_mad_u64_u32 v[15:16], null, s7, 24, v[3:4]
	s_branch .LBB1_59
.LBB1_57:                               ;   in Loop: Header=BB1_47 Depth=5
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr15_vgpr16
	s_branch .LBB1_62
.LBB1_58:                               ;   in Loop: Header=BB1_47 Depth=5
	s_mov_b32 s16, -1
                                        ; implicit-def: $vgpr15_vgpr16
.LBB1_59:                               ; %Flow946
                                        ;   in Loop: Header=BB1_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB1_61
; %bb.60:                               ;   in Loop: Header=BB1_47 Depth=5
	s_add_i32 s16, s7, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s18, s16, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_and_b32 s7, s7, 0xff
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[15:16], null, s18, 24, v[3:4]
	global_load_b64 v[3:4], v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, s7, 24, v[3:4]
.LBB1_61:                               ; %Flow947
                                        ;   in Loop: Header=BB1_47 Depth=5
	s_mov_b32 s7, 0
.LBB1_62:                               ; %Flow948
                                        ;   in Loop: Header=BB1_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB1_66
; %bb.63:                               ;   in Loop: Header=BB1_47 Depth=5
	v_add_nc_u32_e32 v3, s35, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v11
	v_mul_lo_u32 v4, v4, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v3, v4, vcc_lo
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB1_65
; %bb.64:                               ;   in Loop: Header=BB1_47 Depth=5
	global_store_b32 v[70:71], v12, off
.LBB1_65:                               ;   in Loop: Header=BB1_47 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
	v_dual_mov_b32 v15, v114 :: v_dual_mov_b32 v16, v115
	s_sub_i32 s3, s3, s35
.LBB1_66:                               ;   in Loop: Header=BB1_47 Depth=5
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccz .LBB1_68
; %bb.67:                               ;   in Loop: Header=BB1_47 Depth=5
	s_mov_b32 s6, 0
	s_mov_b32 s7, -1
	s_mov_b32 s16, -1
                                        ; implicit-def: $sgpr3
                                        ; implicit-def: $vgpr12
	s_branch .LBB1_69
.LBB1_68:                               ;   in Loop: Header=BB1_47 Depth=5
	s_cmp_lt_i32 s3, 1
	s_mov_b32 s7, 0
	s_cselect_b32 s16, -1, 0
                                        ; implicit-def: $sgpr6
.LBB1_69:                               ; %Flow954
                                        ;   in Loop: Header=BB1_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB1_71
; %bb.70:                               ;   in Loop: Header=BB1_47 Depth=5
	v_dual_mov_b32 v115, v16 :: v_dual_mov_b32 v114, v15
	s_branch .LBB1_47
.LBB1_71:                               ; %loop.exit.guard903
                                        ;   in Loop: Header=BB1_43 Depth=4
	v_dual_mov_b32 v115, v16 :: v_dual_mov_b32 v114, v15
	s_xor_b32 s2, s7, -1
	s_branch .LBB1_73
.LBB1_72:                               ;   in Loop: Header=BB1_43 Depth=4
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr15_vgpr16
                                        ; implicit-def: $sgpr6
.LBB1_73:                               ; %Flow1121
                                        ;   in Loop: Header=BB1_43 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB1_314
; %bb.74:                               ; %.loopexit188
                                        ;   in Loop: Header=BB1_43 Depth=4
	v_mbcnt_lo_u32_b32 v131, exec_lo, 0
                                        ; implicit-def: $vgpr116_vgpr117
.LBB1_75:                               ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ; =>        This Loop Header: Depth=5
                                        ;             Child Loop BB1_93 Depth 6
                                        ;             Child Loop BB1_101 Depth 6
                                        ;             Child Loop BB1_107 Depth 6
                                        ;             Child Loop BB1_116 Depth 6
                                        ;             Child Loop BB1_121 Depth 6
                                        ;             Child Loop BB1_123 Depth 6
                                        ;             Child Loop BB1_144 Depth 6
                                        ;             Child Loop BB1_152 Depth 6
                                        ;             Child Loop BB1_158 Depth 6
                                        ;             Child Loop BB1_167 Depth 6
                                        ;             Child Loop BB1_175 Depth 6
                                        ;             Child Loop BB1_178 Depth 6
                                        ;             Child Loop BB1_180 Depth 6
                                        ;             Child Loop BB1_182 Depth 6
                                        ;             Child Loop BB1_184 Depth 6
                                        ;             Child Loop BB1_186 Depth 6
                                        ;             Child Loop BB1_188 Depth 6
                                        ;             Child Loop BB1_210 Depth 6
                                        ;             Child Loop BB1_218 Depth 6
                                        ;             Child Loop BB1_224 Depth 6
                                        ;             Child Loop BB1_233 Depth 6
                                        ;             Child Loop BB1_240 Depth 6
                                        ;             Child Loop BB1_243 Depth 6
                                        ;             Child Loop BB1_248 Depth 6
                                        ;             Child Loop BB1_255 Depth 6
                                        ;             Child Loop BB1_288 Depth 6
                                        ;             Child Loop BB1_296 Depth 6
                                        ;             Child Loop BB1_302 Depth 6
                                        ;             Child Loop BB1_311 Depth 6
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s2, 0, v131
	v_mov_b32_e32 v3, 0
	s_mov_b32 s18, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_77
; %bb.76:                               ;   in Loop: Header=BB1_75 Depth=5
	global_load_b32 v3, v[84:85], off glc
.LBB1_77:                               ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s37, v3
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3)
	s_cmp_eq_u32 s37, 0x10100
	s_cbranch_scc1 .LBB1_137
; %bb.78:                               ;   in Loop: Header=BB1_75 Depth=5
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_80
; %bb.79:                               ;   in Loop: Header=BB1_75 Depth=5
	v_mov_b32_e32 v69, v5
	global_atomic_cmpswap_b32 v3, v[86:87], v[68:69], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v3, 0x100, v3, vcc_lo
.LBB1_80:                               ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s38, v3
	s_cmp_lg_u32 s37, s38
	s_cbranch_scc1 .LBB1_138
; %bb.81:                               ;   in Loop: Header=BB1_75 Depth=5
	v_mbcnt_lo_u32_b32 v21, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v21
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB1_83
; %bb.82:                               ;   in Loop: Header=BB1_75 Depth=5
	global_load_b32 v3, v[86:87], off glc
.LBB1_83:                               ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_mov_b32 s5, 2
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s20, 0x10100
	s_cbranch_scc1 .LBB1_171
; %bb.84:                               ;   in Loop: Header=BB1_75 Depth=5
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB1_88
; %bb.85:                               ;   in Loop: Header=BB1_75 Depth=5
	global_load_b64 v[28:29], v[96:97], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, s3, s6, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e64 v4, s3, s7, v29, s3
	v_cmp_lt_u64_e64 s3, 0x752f, v[3:4]
	v_mov_b32_e32 v3, 1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s16, s3
	s_cbranch_execz .LBB1_87
; %bb.86:                               ;   in Loop: Header=BB1_75 Depth=5
	v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v27, s7
	global_atomic_cmpswap_b64 v[3:4], v[96:97], v[26:29], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s3, v[3:4], v[28:29]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 1, 2, s3
.LBB1_87:                               ; %Flow1110
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s16
.LBB1_88:                               ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_readfirstlane_b32 s39, v3
	s_mov_b32 s5, 1
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s39, 1
	s_cbranch_scc1 .LBB1_171
; %bb.89:                               ;   in Loop: Header=BB1_75 Depth=5
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s21, vcc_lo
	s_cbranch_execz .LBB1_118
; %bb.90:                               ;   in Loop: Header=BB1_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s3, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s3, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB1_96
; %bb.91:                               ;   in Loop: Header=BB1_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB1_95
; %bb.92:                               ; %.preheader3.i.i.i117.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s7, 0
.LBB1_93:                               ; %.preheader3.i.i.i117
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_93
; %bb.94:                               ; %Flow1104
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB1_95:                               ; %Flow1106
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_96:                               ; %.loopexit4.i.i.i112
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s40, s7, 24
	s_mul_hi_u32 s41, s6, 24
	s_mul_i32 s42, s6, 24
	s_and_saveexec_b32 s43, s3
	s_cbranch_execz .LBB1_98
; %bb.97:                               ;   in Loop: Header=BB1_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s41, s40
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s42
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB1_98:                               ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s43
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_mov_b32_e32 v15, v5
	v_dual_mov_b32 v16, v5 :: v_dual_mov_b32 v31, s7
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v29, s5
	v_mov_b32_e32 v30, s6
	v_mov_b32_e32 v28, s4
	s_clause 0x3
	global_store_b128 v[11:12], v[15:18], off
	global_store_b128 v[11:12], v[28:31], off offset:16
	global_store_b128 v[11:12], v[28:31], off offset:32
	global_store_b128 v[11:12], v[28:31], off offset:48
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB1_106
; %bb.99:                               ;   in Loop: Header=BB1_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s18 :: v_dual_mov_b32 v133, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB1_102
; %bb.100:                              ; %.preheader1.i.i.i115.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s7, 0
.LBB1_101:                              ; %.preheader1.i.i.i115
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s18 :: v_dual_mov_b32 v29, s19
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[30:31]
	v_dual_mov_b32 v31, v16 :: v_dual_mov_b32 v30, v15
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_101
.LBB1_102:                              ; %Flow1102
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[15:16], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_104
; %bb.103:                              ;   in Loop: Header=BB1_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[15:16], v[4:5], off offset:8
.LBB1_104:                              ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[18:19], v[15:16], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	s_cbranch_vccnz .LBB1_106
; %bb.105:                              ;   in Loop: Header=BB1_75 Depth=5
	global_load_b32 v4, v[15:16], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[18:19], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_106:                              ; %Flow1103
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s41, s41, s40
	v_add_co_u32 v3, vcc_lo, v26, s42
	v_add_co_ci_u32_e32 v4, vcc_lo, s41, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB1_107:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB1_109
; %bb.108:                              ;   in Loop: Header=BB1_107 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB1_109:                              ;   in Loop: Header=BB1_107 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB1_111
; %bb.110:                              ;   in Loop: Header=BB1_107 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB1_112
.LBB1_111:                              ;   in Loop: Header=BB1_107 Depth=6
	s_mov_b32 s5, -1
.LBB1_112:                              ; %Flow1097
                                        ;   in Loop: Header=BB1_107 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB1_107
; %bb.113:                              ;   in Loop: Header=BB1_75 Depth=5
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB1_117
; %bb.114:                              ;   in Loop: Header=BB1_75 Depth=5
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17] offset:24 glc
	global_load_b64 v[18:19], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v28, vcc_lo, 0, v12, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v29, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v26, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v27, vcc_lo, s19, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[26:27]
	v_dual_cndmask_b32 v27, v27, v28 :: v_dual_cndmask_b32 v26, v26, v6
	v_mov_b32_e32 v28, v15
	v_and_b32_e32 v6, v27, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v26, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v18, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v6, vcc_lo
	global_store_b64 v[11:12], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[15:16]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_117
; %bb.115:                              ; %.preheader.i.i.i114.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s3, 0
.LBB1_116:                              ; %.preheader.i.i.i114
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[11:12], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[28:29]
	v_dual_mov_b32 v29, v16 :: v_dual_mov_b32 v28, v15
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_116
.LBB1_117:                              ; %Flow1095
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_118:                              ; %Flow1107
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s21
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s18, v3
	v_readfirstlane_b32 s19, v4
	s_cmp_eq_u64 s[18:19], 0
	s_cbranch_scc1 .LBB1_170
; %bb.119:                              ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s3, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v11, s3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x300, v11
	s_cbranch_execz .LBB1_122
; %bb.120:                              ; %.preheader175.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	v_lshlrev_b32_e32 v3, 3, v11
	s_bcnt1_i32_b32 s6, s3
	s_mov_b32 s16, 0
	s_lshl_b32 s7, s6, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s3, s18, v3
	v_add_co_ci_u32_e64 v4, null, s19, 0, s3
.LBB1_121:                              ; %.preheader175
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v11, s6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, 0x2ff, v11
	global_store_b64 v[3:4], v[5:6], off
	v_add_co_u32 v3, s3, v3, s7
	v_add_co_ci_u32_e64 v4, s3, 0, v4, s3
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB1_121
.LBB1_122:                              ; %Flow1089
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $sgpr5
.LBB1_123:                              ; %.loopexit176
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e32 vcc_lo, 0, v21
	v_mov_b32_e32 v3, s20
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB1_125
; %bb.124:                              ;   in Loop: Header=BB1_123 Depth=6
	global_load_b32 v3, v[86:87], off glc
.LBB1_125:                              ;   in Loop: Header=BB1_123 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s3, s5
	s_cmp_lg_u32 s20, 0x10100
	s_cbranch_scc0 .LBB1_132
; %bb.126:                              ;   in Loop: Header=BB1_123 Depth=6
	v_mov_b32_e32 v3, s39
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB1_130
; %bb.127:                              ;   in Loop: Header=BB1_123 Depth=6
	s_add_i32 s3, s20, 0xffffff00
	v_mov_b32_e32 v6, v5
	s_lshr_b32 s3, s3, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[11:12], null, s3, 24, v[3:4]
	v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s3, 0, v[3:4]
	v_mov_b32_e32 v3, s39
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s7, s3
	s_cbranch_execz .LBB1_129
; %bb.128:                              ;   in Loop: Header=BB1_123 Depth=6
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[86:87], v68, off
	v_mov_b32_e32 v3, 0
.LBB1_129:                              ; %Flow1082
                                        ;   in Loop: Header=BB1_123 Depth=6
	s_or_b32 exec_lo, exec_lo, s7
.LBB1_130:                              ;   in Loop: Header=BB1_123 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s3, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB1_133
; %bb.131:                              ;   in Loop: Header=BB1_123 Depth=6
	s_mov_b32 s6, 0
	s_and_not1_b32 vcc_lo, vcc_lo, exec_lo
	s_sleep 2
                                        ; implicit-def: $sgpr39
	s_branch .LBB1_134
.LBB1_132:                              ;   in Loop: Header=BB1_123 Depth=6
	s_mov_b32 s16, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr3
                                        ; implicit-def: $sgpr7
	s_branch .LBB1_135
.LBB1_133:                              ;   in Loop: Header=BB1_123 Depth=6
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr3
.LBB1_134:                              ; %Flow1086
                                        ;   in Loop: Header=BB1_123 Depth=6
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s17, vcc_lo, exec_lo
	s_mov_b32 s7, 0
	s_mov_b32 s16, 0
	s_or_b32 s5, s5, s17
.LBB1_135:                              ; %Flow1085
                                        ;   in Loop: Header=BB1_123 Depth=6
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_139
; %bb.136:                              ;   in Loop: Header=BB1_123 Depth=6
	s_mov_b32 s39, s3
	s_branch .LBB1_123
.LBB1_137:                              ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v117, v4 :: v_dual_mov_b32 v116, v3
	s_branch .LBB1_199
.LBB1_138:                              ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s3, -1
                                        ; implicit-def: $sgpr18
	s_branch .LBB1_191
.LBB1_139:                              ; %loop.exit.guard909
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB1_169
; %bb.140:                              ;   in Loop: Header=BB1_75 Depth=5
	s_and_saveexec_b32 s40, s5
	s_cbranch_execz .LBB1_168
; %bb.141:                              ;   in Loop: Header=BB1_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s3, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s3, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB1_147
; %bb.142:                              ;   in Loop: Header=BB1_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB1_146
; %bb.143:                              ; %.preheader3.i.i.i124.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s7, 0
.LBB1_144:                              ; %.preheader3.i.i.i124
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_144
; %bb.145:                              ; %Flow1077
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB1_146:                              ; %Flow1079
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_147:                              ; %.loopexit4.i.i.i119
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s41, s7, 24
	s_mul_hi_u32 s42, s6, 24
	s_mul_i32 s43, s6, 24
	s_and_saveexec_b32 s44, s3
	s_cbranch_execz .LBB1_149
; %bb.148:                              ;   in Loop: Header=BB1_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s42, s41
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s43
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB1_149:                              ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s44
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, s19
	v_dual_mov_b32 v31, s7 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[28:31], off offset:8
	global_store_b128 v[3:4], v[28:31], off offset:24
	global_store_b128 v[3:4], v[28:31], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB1_157
; %bb.150:                              ;   in Loop: Header=BB1_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s20 :: v_dual_mov_b32 v133, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB1_153
; %bb.151:                              ; %.preheader1.i.i.i122.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s7, 0
.LBB1_152:                              ; %.preheader1.i.i.i122
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s20 :: v_dual_mov_b32 v29, s21
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[30:31]
	v_dual_mov_b32 v31, v12 :: v_dual_mov_b32 v30, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_152
.LBB1_153:                              ; %Flow1075
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_155
; %bb.154:                              ;   in Loop: Header=BB1_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB1_155:                              ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB1_157
; %bb.156:                              ;   in Loop: Header=BB1_75 Depth=5
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_157:                              ; %Flow1076
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s42, s42, s41
	v_add_co_u32 v3, vcc_lo, v26, s43
	v_add_co_ci_u32_e32 v4, vcc_lo, s42, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB1_158:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB1_160
; %bb.159:                              ;   in Loop: Header=BB1_158 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB1_160:                              ;   in Loop: Header=BB1_158 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB1_162
; %bb.161:                              ;   in Loop: Header=BB1_158 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB1_163
.LBB1_162:                              ;   in Loop: Header=BB1_158 Depth=6
	s_mov_b32 s5, -1
.LBB1_163:                              ; %Flow1070
                                        ;   in Loop: Header=BB1_158 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB1_158
; %bb.164:                              ;   in Loop: Header=BB1_75 Depth=5
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB1_168
; %bb.165:                              ;   in Loop: Header=BB1_75 Depth=5
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v28, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v29, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v27, v19, v21 :: v_dual_cndmask_b32 v26, v18, v6
	v_and_b32_e32 v4, v27, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v26, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_168
; %bb.166:                              ; %.preheader.i.i.i121.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s3, 0
.LBB1_167:                              ; %.preheader.i.i.i121
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[3:4], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_167
.LBB1_168:                              ; %Flow1080
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s40
	s_mov_b32 s7, s39
.LBB1_169:                              ; %Flow1081
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s39, s7
.LBB1_170:                              ; %Flow1091
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, s39
.LBB1_171:                              ; %__ockl_devmem_request.exit125
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB1_190
; %bb.172:                              ;   in Loop: Header=BB1_75 Depth=5
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s18, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_189
; %bb.173:                              ;   in Loop: Header=BB1_75 Depth=5
	global_load_b64 v[3:4], v[96:97], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s6, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x7530, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_189
; %bb.174:                              ;   in Loop: Header=BB1_75 Depth=5
	v_sub_nc_u32_e32 v3, 0x7530, v3
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s7, s6, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s6, s16, s6
	s_addc_u32 s7, s17, s7
.LBB1_175:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x659
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB1_178
; %bb.176:                              ; %.preheader11.i138
                                        ;   in Loop: Header=BB1_175 Depth=6
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB1_175
.LBB1_177:                              ; %.preheader9.i137
                                        ;   in Loop: Header=BB1_178 Depth=6
	s_sleep 63
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_178:                              ; %Flow1061
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x326
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB1_177
; %bb.179:                              ; %Flow1058
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_add_u32 s20, s16, 0x18c
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB1_182
.LBB1_180:                              ; %.preheader7.i136
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 31
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x18c
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB1_180
	s_branch .LBB1_182
.LBB1_181:                              ; %.preheader5.i135
                                        ;   in Loop: Header=BB1_182 Depth=6
	s_sleep 15
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_182:                              ; %.loopexit8.i128
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0xc0
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB1_181
	s_branch .LBB1_184
.LBB1_183:                              ; %.preheader3.i134
                                        ;   in Loop: Header=BB1_184 Depth=6
	s_sleep 7
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_184:                              ; %Flow1052
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x59
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB1_183
	s_branch .LBB1_186
.LBB1_185:                              ; %.preheader1.i133
                                        ;   in Loop: Header=BB1_186 Depth=6
	s_sleep 3
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_186:                              ; %Flow1049
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 38
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB1_185
; %bb.187:                              ; %Flow1046
                                        ;   in Loop: Header=BB1_75 Depth=5
	v_cmp_le_u64_e64 s16, s[6:7], s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB1_189
.LBB1_188:                              ; %.preheader.i132
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s16, s[6:7], s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB1_188
.LBB1_189:                              ; %__ockl_rtcwait_u32.exit139
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
	s_cmp_lg_u32 s5, 2
	v_mov_b32_e32 v117, s4
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v116, 0, 1, s5
.LBB1_190:                              ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s18, 0
.LBB1_191:                              ; %Flow1113
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB1_199
; %bb.192:                              ;   in Loop: Header=BB1_75 Depth=5
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_196
; %bb.193:                              ;   in Loop: Header=BB1_75 Depth=5
	global_load_b64 v[28:29], v[98:99], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s6, v28
	v_sub_co_ci_u32_e32 v4, vcc_lo, s7, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_u64_e32 vcc_lo, 0x4e1f, v[3:4]
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB1_195
; %bb.194:                              ;   in Loop: Header=BB1_75 Depth=5
	v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v27, s7
	global_atomic_cmpswap_b64 v[3:4], v[98:99], v[26:29], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[3:4], v[28:29]
	v_mov_b32_e32 v4, s4
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
.LBB1_195:                              ; %Flow1040
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_196:                              ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s6, v3
	v_readfirstlane_b32 s7, v4
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB1_200
; %bb.197:                              ;   in Loop: Header=BB1_75 Depth=5
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
.LBB1_198:                              ; %Flow1039
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v117, v16 :: v_dual_mov_b32 v116, v15
.LBB1_199:                              ; %Flow1116
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_xor_b32 s2, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB1_75
	s_branch .LBB1_315
.LBB1_200:                              ;   in Loop: Header=BB1_75 Depth=5
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v15 :: v_dual_mov_b32 v4, v16
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_236
; %bb.201:                              ;   in Loop: Header=BB1_75 Depth=5
	s_clause 0x1
	global_load_b64 v[3:4], v5, s[12:13] glc
	global_load_b64 v[11:12], v5, s[14:15]
	s_waitcnt vmcnt(0)
	v_cmp_ge_u64_e32 vcc_lo, v[3:4], v[11:12]
	s_cbranch_vccnz .LBB1_205
; %bb.202:                              ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s5, exec_lo
	s_mov_b32 s2, exec_lo
	v_mbcnt_lo_u32_b32 v6, s5, 0
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB1_204
; %bb.203:                              ;   in Loop: Header=BB1_75 Depth=5
	s_bcnt1_i32_b32 s5, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s5, s5, 21
	v_mov_b32_e32 v4, s5
	global_atomic_add_u64 v[3:4], v5, v[4:5], s[12:13] glc
.LBB1_204:                              ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v4
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x200000, v6, s[6:7]
	v_cmp_ge_u64_e64 s2, v[3:4], v[11:12]
	s_branch .LBB1_206
.LBB1_205:                              ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr3_vgpr4
.LBB1_206:                              ; %Flow1037
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s20, s2
	s_cbranch_execz .LBB1_235
; %bb.207:                              ;   in Loop: Header=BB1_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_213
; %bb.208:                              ;   in Loop: Header=BB1_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v18, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB1_212
; %bb.209:                              ; %.preheader3.i.i.i145.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s7, 0
.LBB1_210:                              ; %.preheader3.i.i.i145
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[16:17] offset:40
	global_load_b64 v[26:27], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, v18, v28
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v12 :: v_dual_and_b32 v6, v19, v29
	v_mad_u64_u32 v[18:19], null, v6, 24, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v12, v18
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_210
; %bb.211:                              ; %Flow1033
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB1_212:                              ; %Flow1035
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_213:                              ; %.loopexit4.i.i.i140
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v18
	v_readfirstlane_b32 s7, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s21, s7, 24
	s_mul_hi_u32 s39, s6, 24
	s_mul_i32 s40, s6, 24
	s_and_saveexec_b32 s41, s2
	s_cbranch_execz .LBB1_215
; %bb.214:                              ;   in Loop: Header=BB1_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s39, s21
	s_waitcnt vmcnt(0)
	v_add_co_u32 v18, vcc_lo, v26, s40
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[18:19], v[11:14], off offset:8
.LBB1_215:                              ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s41
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v31, s7
	v_dual_mov_b32 v19, v5 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v21, v5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v29, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[18:21], off
	global_store_b128 v[11:12], v[28:31], off offset:16
	global_store_b128 v[11:12], v[28:31], off offset:32
	global_store_b128 v[11:12], v[28:31], off offset:48
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_223
; %bb.216:                              ;   in Loop: Header=BB1_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s18 :: v_dual_mov_b32 v133, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB1_219
; %bb.217:                              ; %.preheader1.i.i.i143.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s7, 0
.LBB1_218:                              ; %.preheader1.i.i.i143
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s18 :: v_dual_mov_b32 v29, s19
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[30:31]
	v_dual_mov_b32 v31, v19 :: v_dual_mov_b32 v30, v18
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_218
.LBB1_219:                              ; %Flow1031
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[18:19], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_221
; %bb.220:                              ;   in Loop: Header=BB1_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[18:19], v[4:5], off offset:8
.LBB1_221:                              ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[28:29], v[18:19], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[28:29]
	s_cbranch_vccnz .LBB1_223
; %bb.222:                              ;   in Loop: Header=BB1_75 Depth=5
	global_load_b32 v4, v[18:19], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[28:29], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_223:                              ; %Flow1032
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s39, s39, s21
	v_add_co_u32 v3, vcc_lo, v26, s40
	v_add_co_ci_u32_e32 v4, vcc_lo, s39, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB1_224:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_226
; %bb.225:                              ;   in Loop: Header=BB1_224 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB1_226:                              ;   in Loop: Header=BB1_224 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB1_228
; %bb.227:                              ;   in Loop: Header=BB1_224 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB1_229
.LBB1_228:                              ;   in Loop: Header=BB1_224 Depth=6
	s_mov_b32 s5, -1
.LBB1_229:                              ; %Flow1026
                                        ;   in Loop: Header=BB1_224 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB1_224
; %bb.230:                              ;   in Loop: Header=BB1_75 Depth=5
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_234
; %bb.231:                              ;   in Loop: Header=BB1_75 Depth=5
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17] offset:24 glc
	global_load_b64 v[28:29], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v26, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v27, vcc_lo, s19, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[26:27]
	v_dual_cndmask_b32 v27, v27, v21 :: v_dual_cndmask_b32 v26, v26, v6
	v_and_b32_e32 v6, v27, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v26, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, v28, v11
	v_mov_b32_e32 v28, v18
	v_add_co_ci_u32_e32 v12, vcc_lo, v29, v6, vcc_lo
	v_mov_b32_e32 v29, v19
	global_store_b64 v[11:12], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[18:19]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_234
; %bb.232:                              ; %.preheader.i.i.i142.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s2, 0
.LBB1_233:                              ; %.preheader.i.i.i142
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[11:12], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[28:29]
	v_dual_mov_b32 v29, v19 :: v_dual_mov_b32 v28, v18
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB1_233
.LBB1_234:                              ; %Flow1024
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_235:                              ; %Flow1038
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s20
.LBB1_236:                              ; %__ockl_devmem_request.exit146
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v3
	v_readfirstlane_b32 s17, v4
	s_cmp_eq_u64 s[16:17], 0
	s_cbranch_scc1 .LBB1_281
; %bb.237:                              ;   in Loop: Header=BB1_75 Depth=5
	v_mbcnt_lo_u32_b32 v4, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b32 v6, v[82:83], off
	s_bcnt1_i32_b32 s3, exec_lo
	s_add_u32 s6, s16, 16
	s_addc_u32 s7, s17, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshrrev_b32_e32 v3, 5, v3
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s5, exec_lo, s2
	s_cbranch_execz .LBB1_245
; %bb.238:                              ;   in Loop: Header=BB1_75 Depth=5
	global_load_b32 v15, v[100:101], off
	s_mov_b32 s18, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB1_241
; %bb.239:                              ; %.preheader172.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s19, s3, 2
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB1_240:                              ; %.preheader172
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_add_nc_u32_e32 v16, s3, v16
	global_store_b32 v[11:12], v5, off
	v_add_co_u32 v11, s2, v11, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s2, 0, v12, s2
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB1_240
.LBB1_241:                              ; %Flow1013
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
	global_load_b32 v16, v[102:103], off
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v15, v4, v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v11, v6
	s_cbranch_execz .LBB1_244
; %bb.242:                              ; %.preheader170.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	v_mul_lo_u32 v12, v15, s3
	s_mov_b32 s18, 0
.LBB1_243:                              ; %.preheader170
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_lshlrev_b32_e64 v15, v11, 1
	v_lshrrev_b32_e32 v16, 3, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v11, v12
	v_and_b32_e32 v16, 0x1ffffffc, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v11, v6
	global_store_b32 v16, v15, s[6:7]
	s_or_b32 s18, vcc_lo, s18
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB1_243
.LBB1_244:                              ; %Flow1010
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_245:                              ; %Flow1018
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_and_not1_saveexec_b32 s5, s5
	s_cbranch_execz .LBB1_250
; %bb.246:                              ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s18, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB1_249
; %bb.247:                              ; %.preheader.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	global_load_b32 v15, v[112:113], off
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s19, s3, 2
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB1_248:                              ; %.preheader
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_add_nc_u32_e32 v16, s3, v16
	s_waitcnt vmcnt(0)
	global_store_b32 v[11:12], v15, off
	v_add_co_u32 v11, s2, v11, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s2, 0, v12, s2
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB1_248
.LBB1_249:                              ; %Flow1016
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
.LBB1_250:                              ; %.loopexit
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_254
; %bb.251:                              ;   in Loop: Header=BB1_75 Depth=5
	v_and_b32_e32 v6, 31, v6
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v6
	s_cbranch_execz .LBB1_253
; %bb.252:                              ;   in Loop: Header=BB1_75 Depth=5
	v_add_nc_u32_e32 v4, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v11, v[3:4], off
	s_waitcnt vmcnt(0)
	v_lshl_or_b32 v6, -1, v6, v11
	global_store_b32 v[3:4], v6, off
.LBB1_253:                              ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	global_store_b128 v5, v[22:25], s[16:17]
.LBB1_254:                              ; %Flow1007
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $sgpr5
.LBB1_255:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s2, 0, v131
	v_mov_b32_e32 v3, s37
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_257
; %bb.256:                              ;   in Loop: Header=BB1_255 Depth=6
	global_load_b32 v3, v[84:85], off glc
.LBB1_257:                              ;   in Loop: Header=BB1_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s37, v3
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s5, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s3, s5
	s_cmp_eq_u32 s37, 0x10100
	s_cbranch_scc1 .LBB1_264
; %bb.258:                              ;   in Loop: Header=BB1_255 Depth=6
	v_mov_b32_e32 v3, s38
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_260
; %bb.259:                              ;   in Loop: Header=BB1_255 Depth=6
	global_load_b32 v3, v[86:87], off glc
.LBB1_260:                              ;   in Loop: Header=BB1_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s38, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u32 s37, s38
	s_cbranch_scc0 .LBB1_265
; %bb.261:                              ;   in Loop: Header=BB1_255 Depth=6
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_272
; %bb.262:                              ;   in Loop: Header=BB1_255 Depth=6
	s_cmpk_lt_u32 s37, 0x100
	s_cbranch_scc0 .LBB1_266
; %bb.263:                              ;   in Loop: Header=BB1_255 Depth=6
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[6:7]
	s_mov_b32 s6, 0
	v_mad_u64_u32 v[11:12], null, s37, 24, v[3:4]
	s_branch .LBB1_267
.LBB1_264:                              ;   in Loop: Header=BB1_255 Depth=6
	s_mov_b64 s[2:3], 0
	s_mov_b32 s20, -1
	s_mov_b32 s18, 0
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB1_277
.LBB1_265:                              ;   in Loop: Header=BB1_255 Depth=6
	s_mov_b32 s18, -1
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB1_276
.LBB1_266:                              ;   in Loop: Header=BB1_255 Depth=6
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB1_267:                              ; %Flow999
                                        ;   in Loop: Header=BB1_255 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_269
; %bb.268:                              ;   in Loop: Header=BB1_255 Depth=6
	s_add_i32 s6, s37, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s18, s6, 8
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[6:7]
	s_and_b32 s6, s37, 0xff
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s18, 24, v[3:4]
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
.LBB1_269:                              ;   in Loop: Header=BB1_255 Depth=6
	v_dual_mov_b32 v15, s37 :: v_dual_mov_b32 v4, s17
	v_dual_mov_b32 v3, s16 :: v_dual_mov_b32 v6, v5
	global_store_b32 v5, v15, s[16:17] offset:4
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off offset:8 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB1_271
; %bb.270:                              ;   in Loop: Header=BB1_255 Depth=6
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[84:85], v118, off
	v_dual_mov_b32 v3, v11 :: v_dual_mov_b32 v4, v12
.LBB1_271:                              ; %Flow997
                                        ;   in Loop: Header=BB1_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_272:                              ; %Flow1000
                                        ;   in Loop: Header=BB1_255 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v4
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB1_274
; %bb.273:                              ;   in Loop: Header=BB1_255 Depth=6
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
	s_branch .LBB1_275
.LBB1_274:                              ;   in Loop: Header=BB1_255 Depth=6
	s_mov_b32 s19, 0
	s_and_not1_b32 s2, s2, exec_lo
	s_sleep 2
.LBB1_275:                              ; %Flow1005
                                        ;   in Loop: Header=BB1_255 Depth=6
	s_mov_b32 s18, 0
.LBB1_276:                              ; %Flow1004
                                        ;   in Loop: Header=BB1_255 Depth=6
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_mov_b32 s20, 0
	s_or_b32 s5, s3, s2
                                        ; implicit-def: $sgpr2_sgpr3
.LBB1_277:                              ; %Flow1003
                                        ;   in Loop: Header=BB1_255 Depth=6
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB1_255
; %bb.278:                              ; %loop.exit.guard913
                                        ;   in Loop: Header=BB1_75 Depth=5
	v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s2
	s_and_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB1_198
; %bb.279:                              ; %loop.exit.guard914
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_xor_b32 s2, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB1_282
; %bb.280:                              ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s18, 0
	s_branch .LBB1_283
.LBB1_281:                              ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s18, 0
	s_branch .LBB1_198
.LBB1_282:                              ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s18, -1
                                        ; implicit-def: $sgpr6_sgpr7
.LBB1_283:                              ; %Flow994
                                        ;   in Loop: Header=BB1_75 Depth=5
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB1_198
; %bb.284:                              ;   in Loop: Header=BB1_75 Depth=5
	s_and_saveexec_b32 s3, s5
	s_cbranch_execz .LBB1_313
; %bb.285:                              ;   in Loop: Header=BB1_75 Depth=5
	s_load_b64 s[18:19], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_291
; %bb.286:                              ;   in Loop: Header=BB1_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[18:19] offset:40
	global_load_b64 v[15:16], v5, s[18:19]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB1_290
; %bb.287:                              ; %.preheader3.i.i.i152.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s7, 0
.LBB1_288:                              ; %.preheader3.i.i.i152
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[18:19] offset:40
	global_load_b64 v[18:19], v5, s[18:19]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_288
; %bb.289:                              ; %Flow990
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB1_290:                              ; %Flow992
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_291:                              ; %.loopexit4.i.i.i147
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[18:19] offset:40
	global_load_b128 v[26:29], v5, s[18:19]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s37, s7, 24
	s_mul_hi_u32 s38, s6, 24
	s_mul_i32 s39, s6, 24
	s_and_saveexec_b32 s40, s2
	s_cbranch_execz .LBB1_293
; %bb.292:                              ;   in Loop: Header=BB1_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s38, s37
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s39
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB1_293:                              ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s40
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v12, s17
	v_dual_mov_b32 v31, s7 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[28:31], off offset:8
	global_store_b128 v[3:4], v[28:31], off offset:24
	global_store_b128 v[3:4], v[28:31], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_301
; %bb.294:                              ;   in Loop: Header=BB1_75 Depth=5
	s_clause 0x1
	global_load_b64 v[133:134], v5, s[18:19] offset:32 glc
	global_load_b64 v[3:4], v5, s[18:19] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v131, s20 :: v_dual_mov_b32 v132, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[133:134], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[131:134], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[133:134]
	s_cbranch_execz .LBB1_297
; %bb.295:                              ; %.preheader1.i.i.i150.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s7, 0
.LBB1_296:                              ; %.preheader1.i.i.i150
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s20 :: v_dual_mov_b32 v29, s21
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[28:31], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[30:31]
	v_dual_mov_b32 v31, v12 :: v_dual_mov_b32 v30, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_296
.LBB1_297:                              ; %Flow988
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[18:19] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_299
; %bb.298:                              ;   in Loop: Header=BB1_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB1_299:                              ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB1_301
; %bb.300:                              ;   in Loop: Header=BB1_75 Depth=5
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_301:                              ; %Flow989
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s38, s38, s37
	v_add_co_u32 v3, vcc_lo, v26, s39
	v_add_co_ci_u32_e32 v4, vcc_lo, s38, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB1_302:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_304
; %bb.303:                              ;   in Loop: Header=BB1_302 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB1_304:                              ;   in Loop: Header=BB1_302 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB1_306
; %bb.305:                              ;   in Loop: Header=BB1_302 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB1_307
.LBB1_306:                              ;   in Loop: Header=BB1_302 Depth=6
	s_mov_b32 s5, -1
.LBB1_307:                              ; %Flow983
                                        ;   in Loop: Header=BB1_302 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB1_302
; %bb.308:                              ;   in Loop: Header=BB1_75 Depth=5
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_312
; %bb.309:                              ;   in Loop: Header=BB1_75 Depth=5
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[18:19] offset:40
	global_load_b64 v[11:12], v5, s[18:19] offset:24 glc
	global_load_b64 v[15:16], v5, s[18:19]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v28, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v29, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v27, v19, v21 :: v_dual_cndmask_b32 v26, v18, v6
	v_and_b32_e32 v4, v27, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v26, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_312
; %bb.310:                              ; %.preheader.i.i.i149.preheader
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_mov_b32 s2, 0
.LBB1_311:                              ; %.preheader.i.i.i149
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ;           Parent Loop BB1_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[3:4], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB1_311
.LBB1_312:                              ; %Flow981
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v131, 0
.LBB1_313:                              ; %Flow993
                                        ;   in Loop: Header=BB1_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v15, v116 :: v_dual_mov_b32 v16, v117
	s_mov_b32 s18, -1
	s_branch .LBB1_198
.LBB1_314:                              ;   in Loop: Header=BB1_43 Depth=4
                                        ; implicit-def: $vgpr114_vgpr115
                                        ; implicit-def: $sgpr36
                                        ; implicit-def: $vgpr130
	s_branch .LBB1_338
.LBB1_315:                              ;   in Loop: Header=BB1_43 Depth=4
	v_cmp_ne_u64_e64 s5, 1, v[116:117]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB1_317
; %bb.316:                              ;   in Loop: Header=BB1_43 Depth=4
	v_dual_mov_b32 v114, v116 :: v_dual_mov_b32 v115, v117
	s_branch .LBB1_337
.LBB1_317:                              ;   in Loop: Header=BB1_43 Depth=4
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_334
; %bb.318:                              ;   in Loop: Header=BB1_43 Depth=4
	global_load_b64 v[3:4], v[98:99], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x4e20, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_334
; %bb.319:                              ;   in Loop: Header=BB1_43 Depth=4
	v_sub_nc_u32_e32 v3, 0x4e20, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB1_320:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x659
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB1_323
; %bb.321:                              ; %.preheader11.i166
                                        ;   in Loop: Header=BB1_320 Depth=5
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB1_320
.LBB1_322:                              ; %.preheader9.i165
                                        ;   in Loop: Header=BB1_323 Depth=5
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_323:                              ; %Flow975
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x326
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB1_322
; %bb.324:                              ; %Flow972
                                        ;   in Loop: Header=BB1_43 Depth=4
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB1_327
.LBB1_325:                              ; %.preheader7.i164
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB1_325
	s_branch .LBB1_327
.LBB1_326:                              ; %.preheader5.i163
                                        ;   in Loop: Header=BB1_327 Depth=5
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_327:                              ; %.loopexit8.i156
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0xc0
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB1_326
	s_branch .LBB1_329
.LBB1_328:                              ; %.preheader3.i162
                                        ;   in Loop: Header=BB1_329 Depth=5
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_329:                              ; %Flow966
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x59
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB1_328
	s_branch .LBB1_331
.LBB1_330:                              ; %.preheader1.i161
                                        ;   in Loop: Header=BB1_331 Depth=5
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_331:                              ; %Flow963
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 38
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB1_330
; %bb.332:                              ; %Flow960
                                        ;   in Loop: Header=BB1_43 Depth=4
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_334
.LBB1_333:                              ; %.preheader.i160
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_11 Depth=3
                                        ;         Parent Loop BB1_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_333
.LBB1_334:                              ; %__ockl_rtcwait_u32.exit167
                                        ;   in Loop: Header=BB1_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s16
	v_mov_b32_e32 v3, s36
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v130
	s_cbranch_execz .LBB1_336
; %bb.335:                              ;   in Loop: Header=BB1_43 Depth=4
	global_load_b32 v3, v[84:85], off glc
.LBB1_336:                              ;   in Loop: Header=BB1_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s36, v3
.LBB1_337:                              ;   in Loop: Header=BB1_43 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v15, v114 :: v_dual_mov_b32 v16, v115
	s_mov_b32 s6, 0
.LBB1_338:                              ; %Flow1122
                                        ;   in Loop: Header=BB1_43 Depth=4
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB1_43
; %bb.339:                              ; %Flow1123
                                        ;   in Loop: Header=BB1_11 Depth=3
	v_mov_b32_e32 v22, v7
.LBB1_340:                              ; %Flow1124
                                        ;   in Loop: Header=BB1_11 Depth=3
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v4, v22
	s_and_b32 s3, s6, exec_lo
.LBB1_341:                              ; %Flow1126
                                        ;   in Loop: Header=BB1_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s34
.LBB1_342:                              ; %.loopexit187
                                        ;   in Loop: Header=BB1_11 Depth=3
	s_xor_b32 s1, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s1
	s_or_b32 s30, s1, s30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s30
	s_cbranch_execnz .LBB1_11
; %bb.343:                              ; %Flow1139
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s30
	s_mov_b32 s1, 0
	s_branch .LBB1_345
.LBB1_344:                              ;   in Loop: Header=BB1_6 Depth=2
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB1_345:                              ; %Flow1321
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB1_642
; %bb.346:                              ;   in Loop: Header=BB1_6 Depth=2
	v_mbcnt_lo_u32_b32 v70, exec_lo, 0
	s_bcnt1_i32_b32 s30, exec_lo
                                        ; implicit-def: $vgpr28_vgpr29
.LBB1_347:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB1_351 Depth 4
                                        ;         Child Loop BB1_378 Depth 4
                                        ;           Child Loop BB1_396 Depth 5
                                        ;           Child Loop BB1_404 Depth 5
                                        ;           Child Loop BB1_410 Depth 5
                                        ;           Child Loop BB1_419 Depth 5
                                        ;           Child Loop BB1_424 Depth 5
                                        ;           Child Loop BB1_426 Depth 5
                                        ;           Child Loop BB1_447 Depth 5
                                        ;           Child Loop BB1_455 Depth 5
                                        ;           Child Loop BB1_461 Depth 5
                                        ;           Child Loop BB1_470 Depth 5
                                        ;           Child Loop BB1_478 Depth 5
                                        ;           Child Loop BB1_481 Depth 5
                                        ;           Child Loop BB1_483 Depth 5
                                        ;           Child Loop BB1_485 Depth 5
                                        ;           Child Loop BB1_487 Depth 5
                                        ;           Child Loop BB1_489 Depth 5
                                        ;           Child Loop BB1_491 Depth 5
                                        ;           Child Loop BB1_513 Depth 5
                                        ;           Child Loop BB1_521 Depth 5
                                        ;           Child Loop BB1_527 Depth 5
                                        ;           Child Loop BB1_536 Depth 5
                                        ;           Child Loop BB1_543 Depth 5
                                        ;           Child Loop BB1_546 Depth 5
                                        ;           Child Loop BB1_551 Depth 5
                                        ;           Child Loop BB1_558 Depth 5
                                        ;           Child Loop BB1_591 Depth 5
                                        ;           Child Loop BB1_599 Depth 5
                                        ;           Child Loop BB1_605 Depth 5
                                        ;           Child Loop BB1_614 Depth 5
                                        ;         Child Loop BB1_623 Depth 4
                                        ;         Child Loop BB1_626 Depth 4
                                        ;         Child Loop BB1_628 Depth 4
                                        ;         Child Loop BB1_630 Depth 4
                                        ;         Child Loop BB1_632 Depth 4
                                        ;         Child Loop BB1_634 Depth 4
                                        ;         Child Loop BB1_636 Depth 4
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_eq_u32 s29, 0
	s_mov_b32 s5, -1
	;;#ASMSTART
	;;#ASMEND
	s_cbranch_scc1 .LBB1_375
; %bb.348:                              ;   in Loop: Header=BB1_347 Depth=3
	v_cmp_eq_u32_e64 s1, 0, v70
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB1_350
; %bb.349:                              ;   in Loop: Header=BB1_347 Depth=3
	global_load_b32 v3, v[34:35], off glc
.LBB1_350:                              ;   in Loop: Header=BB1_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	global_load_b32 v6, v[36:37], off
	v_cvt_f32_u32_e32 v4, s29
	s_sub_i32 s2, 0, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, s2, v4
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s2, v3
	v_add_nc_u32_e32 v3, s2, v70
	s_mov_b32 s2, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v11, v4, v11
	v_add_nc_u32_e32 v15, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v15
	v_mul_lo_u32 v4, v4, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v16, v3, v4, vcc_lo
.LBB1_351:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x100, v16
	s_xor_b32 s3, exec_lo, s3
; %bb.352:                              ;   in Loop: Header=BB1_351 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, 0x1800, v7, s[6:7]
	v_mad_u64_u32 v[3:4], null, v16, 24, v[11:12]
; %bb.353:                              ; %Flow1148
                                        ;   in Loop: Header=BB1_351 Depth=4
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB1_355
; %bb.354:                              ;   in Loop: Header=BB1_351 Depth=4
	s_add_u32 s6, s10, 0x2800
	v_add_nc_u32_e32 v11, 0xffffff00, v16
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[6:7]
	v_lshrrev_b32_e32 v18, 8, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v18, 24, v[3:4]
	v_and_b32_e32 v18, 0xff, v16
	global_load_b64 v[11:12], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v18, 24, v[11:12]
.LBB1_355:                              ;   in Loop: Header=BB1_351 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v3, v[3:4], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v3, v6
	s_cbranch_vccz .LBB1_357
; %bb.356:                              ;   in Loop: Header=BB1_351 Depth=4
	s_ctz_i32_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s3, s3, 2
	v_mov_b32_e32 v3, s3
	ds_bpermute_b32 v3, v3, v16
	s_branch .LBB1_358
.LBB1_357:                              ;   in Loop: Header=BB1_351 Depth=4
	v_mov_b32_e32 v3, -1
.LBB1_358:                              ;   in Loop: Header=BB1_351 Depth=4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v3
	s_cmp_eq_u32 s6, -1
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB1_361
; %bb.359:                              ;   in Loop: Header=BB1_351 Depth=4
	s_cmpk_lt_u32 s6, 0x100
	s_cbranch_scc0 .LBB1_362
; %bb.360:                              ;   in Loop: Header=BB1_351 Depth=4
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_mov_b32 s7, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
	s_branch .LBB1_363
.LBB1_361:                              ;   in Loop: Header=BB1_351 Depth=4
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr11_vgpr12
	s_branch .LBB1_366
.LBB1_362:                              ;   in Loop: Header=BB1_351 Depth=4
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB1_363:                              ; %Flow1141
                                        ;   in Loop: Header=BB1_351 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB1_365
; %bb.364:                              ;   in Loop: Header=BB1_351 Depth=4
	s_add_i32 s7, s6, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s7, s7, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_and_b32 s6, s6, 0xff
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
.LBB1_365:                              ; %Flow1142
                                        ;   in Loop: Header=BB1_351 Depth=4
	s_mov_b32 s6, 0
.LBB1_366:                              ; %Flow1144
                                        ;   in Loop: Header=BB1_351 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_370
; %bb.367:                              ;   in Loop: Header=BB1_351 Depth=4
	v_add_nc_u32_e32 v3, s30, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v15
	v_mul_lo_u32 v4, v4, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v16, v3, v4, vcc_lo
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB1_369
; %bb.368:                              ;   in Loop: Header=BB1_351 Depth=4
	global_store_b32 v[34:35], v16, off
.LBB1_369:                              ;   in Loop: Header=BB1_351 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v11, v28 :: v_dual_mov_b32 v12, v29
	s_sub_i32 s2, s2, s30
.LBB1_370:                              ;   in Loop: Header=BB1_351 Depth=4
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB1_372
; %bb.371:                              ;   in Loop: Header=BB1_351 Depth=4
	s_mov_b32 s3, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $vgpr16
	s_branch .LBB1_373
.LBB1_372:                              ;   in Loop: Header=BB1_351 Depth=4
	s_cmp_lt_i32 s2, 1
	s_mov_b32 s3, 0
	s_cselect_b32 s6, -1, 0
.LBB1_373:                              ; %Flow1150
                                        ;   in Loop: Header=BB1_351 Depth=4
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_351
; %bb.374:                              ; %loop.exit.guard922
                                        ;   in Loop: Header=BB1_347 Depth=3
	s_xor_b32 s1, s3, -1
	s_branch .LBB1_376
.LBB1_375:                              ;   in Loop: Header=BB1_347 Depth=3
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB1_376:                              ; %Flow1317
                                        ;   in Loop: Header=BB1_347 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB1_617
; %bb.377:                              ; %.loopexit190
                                        ;   in Loop: Header=BB1_347 Depth=3
	v_mbcnt_lo_u32_b32 v71, exec_lo, 0
                                        ; implicit-def: $vgpr30_vgpr31
.LBB1_378:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB1_396 Depth 5
                                        ;           Child Loop BB1_404 Depth 5
                                        ;           Child Loop BB1_410 Depth 5
                                        ;           Child Loop BB1_419 Depth 5
                                        ;           Child Loop BB1_424 Depth 5
                                        ;           Child Loop BB1_426 Depth 5
                                        ;           Child Loop BB1_447 Depth 5
                                        ;           Child Loop BB1_455 Depth 5
                                        ;           Child Loop BB1_461 Depth 5
                                        ;           Child Loop BB1_470 Depth 5
                                        ;           Child Loop BB1_478 Depth 5
                                        ;           Child Loop BB1_481 Depth 5
                                        ;           Child Loop BB1_483 Depth 5
                                        ;           Child Loop BB1_485 Depth 5
                                        ;           Child Loop BB1_487 Depth 5
                                        ;           Child Loop BB1_489 Depth 5
                                        ;           Child Loop BB1_491 Depth 5
                                        ;           Child Loop BB1_513 Depth 5
                                        ;           Child Loop BB1_521 Depth 5
                                        ;           Child Loop BB1_527 Depth 5
                                        ;           Child Loop BB1_536 Depth 5
                                        ;           Child Loop BB1_543 Depth 5
                                        ;           Child Loop BB1_546 Depth 5
                                        ;           Child Loop BB1_551 Depth 5
                                        ;           Child Loop BB1_558 Depth 5
                                        ;           Child Loop BB1_591 Depth 5
                                        ;           Child Loop BB1_599 Depth 5
                                        ;           Child Loop BB1_605 Depth 5
                                        ;           Child Loop BB1_614 Depth 5
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s1, 0, v71
	v_mov_b32_e32 v3, 0
	s_mov_b32 s18, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB1_380
; %bb.379:                              ;   in Loop: Header=BB1_378 Depth=4
	global_load_b32 v3, v[32:33], off glc
.LBB1_380:                              ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s31, v3
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3)
	s_cmp_eq_u32 s31, 0x10100
	s_cbranch_scc1 .LBB1_440
; %bb.381:                              ;   in Loop: Header=BB1_378 Depth=4
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB1_383
; %bb.382:                              ;   in Loop: Header=BB1_378 Depth=4
	v_mov_b32_e32 v69, v5
	global_atomic_cmpswap_b32 v3, v[48:49], v[68:69], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v3, 0x100, v3, vcc_lo
.LBB1_383:                              ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s34, v3
	s_cmp_lg_u32 s31, s34
	s_cbranch_scc1 .LBB1_441
; %bb.384:                              ;   in Loop: Header=BB1_378 Depth=4
	v_mbcnt_lo_u32_b32 v27, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v27
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_386
; %bb.385:                              ;   in Loop: Header=BB1_378 Depth=4
	global_load_b32 v3, v[48:49], off glc
.LBB1_386:                              ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_mov_b32 s16, 2
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s20, 0x10100
	s_cbranch_scc1 .LBB1_474
; %bb.387:                              ;   in Loop: Header=BB1_378 Depth=4
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB1_391
; %bb.388:                              ;   in Loop: Header=BB1_378 Depth=4
	global_load_b64 v[23:24], v[50:51], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, s2, s6, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e64 v4, s2, s7, v24, s2
	v_cmp_lt_u64_e64 s2, 0x752f, v[3:4]
	v_mov_b32_e32 v3, 1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_390
; %bb.389:                              ;   in Loop: Header=BB1_378 Depth=4
	v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v22, s7
	global_atomic_cmpswap_b64 v[3:4], v[50:51], v[21:24], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s2, v[3:4], v[23:24]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 1, 2, s2
.LBB1_390:                              ; %Flow1306
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_391:                              ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s3, v3
	s_mov_b32 s16, 1
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s3, 1
	s_cbranch_scc1 .LBB1_474
; %bb.392:                              ;   in Loop: Header=BB1_378 Depth=4
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s21, vcc_lo
	s_cbranch_execz .LBB1_421
; %bb.393:                              ;   in Loop: Header=BB1_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_399
; %bb.394:                              ;   in Loop: Header=BB1_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB1_398
; %bb.395:                              ; %.preheader3.i.i.i75.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s7, 0
.LBB1_396:                              ; %.preheader3.i.i.i75
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_396
; %bb.397:                              ; %Flow1300
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB1_398:                              ; %Flow1302
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_399:                              ; %.loopexit4.i.i.i70
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s35, s7, 24
	s_mul_hi_u32 s36, s6, 24
	s_mul_i32 s37, s6, 24
	s_and_saveexec_b32 s38, s2
	s_cbranch_execz .LBB1_401
; %bb.400:                              ;   in Loop: Header=BB1_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s36, s35
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s37
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB1_401:                              ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s38
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v15, v5 :: v_dual_mov_b32 v26, s7
	v_dual_mov_b32 v16, v5 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v24, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[15:18], off
	global_store_b128 v[11:12], v[23:26], off offset:16
	global_store_b128 v[11:12], v[23:26], off offset:32
	global_store_b128 v[11:12], v[23:26], off offset:48
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_409
; %bb.402:                              ;   in Loop: Header=BB1_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s18 :: v_dual_mov_b32 v81, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB1_405
; %bb.403:                              ; %.preheader1.i.i.i73.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s7, 0
.LBB1_404:                              ; %.preheader1.i.i.i73
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s19
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[25:26]
	v_dual_mov_b32 v26, v16 :: v_dual_mov_b32 v25, v15
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_404
.LBB1_405:                              ; %Flow1298
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[15:16], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_407
; %bb.406:                              ;   in Loop: Header=BB1_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[15:16], v[4:5], off offset:8
.LBB1_407:                              ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[18:19], v[15:16], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	s_cbranch_vccnz .LBB1_409
; %bb.408:                              ;   in Loop: Header=BB1_378 Depth=4
	global_load_b32 v4, v[15:16], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[18:19], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_409:                              ; %Flow1299
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s36, s36, s35
	v_add_co_u32 v3, vcc_lo, v21, s37
	v_add_co_ci_u32_e32 v4, vcc_lo, s36, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB1_410:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_412
; %bb.411:                              ;   in Loop: Header=BB1_410 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB1_412:                              ;   in Loop: Header=BB1_410 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB1_414
; %bb.413:                              ;   in Loop: Header=BB1_410 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB1_415
.LBB1_414:                              ;   in Loop: Header=BB1_410 Depth=5
	s_mov_b32 s5, -1
.LBB1_415:                              ; %Flow1293
                                        ;   in Loop: Header=BB1_410 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB1_410
; %bb.416:                              ;   in Loop: Header=BB1_378 Depth=4
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_420
; %bb.417:                              ;   in Loop: Header=BB1_378 Depth=4
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17] offset:24 glc
	global_load_b64 v[18:19], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v12, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v24, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v21, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v22, vcc_lo, s19, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_cndmask_b32 v22, v22, v23 :: v_dual_cndmask_b32 v21, v21, v6
	v_dual_mov_b32 v23, v15 :: v_dual_and_b32 v6, v22, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v21, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v18, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v6, vcc_lo
	global_store_b64 v[11:12], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[15:16]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_420
; %bb.418:                              ; %.preheader.i.i.i72.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s2, 0
.LBB1_419:                              ; %.preheader.i.i.i72
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[11:12], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[23:24]
	v_dual_mov_b32 v24, v16 :: v_dual_mov_b32 v23, v15
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB1_419
.LBB1_420:                              ; %Flow1291
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_421:                              ; %Flow1303
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s21
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s18, v3
	v_readfirstlane_b32 s19, v4
	s_cmp_eq_u64 s[18:19], 0
	s_cbranch_scc1 .LBB1_473
; %bb.422:                              ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s2, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v11, s2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x300, v11
	s_cbranch_execz .LBB1_425
; %bb.423:                              ; %.preheader185.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	v_lshlrev_b32_e32 v3, 3, v11
	s_bcnt1_i32_b32 s6, s2
	s_mov_b32 s16, 0
	s_lshl_b32 s7, s6, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s2, s18, v3
	v_add_co_ci_u32_e64 v4, null, s19, 0, s2
.LBB1_424:                              ; %.preheader185
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v11, s6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, 0x2ff, v11
	global_store_b64 v[3:4], v[5:6], off
	v_add_co_u32 v3, s2, v3, s7
	v_add_co_ci_u32_e64 v4, s2, 0, v4, s2
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB1_424
.LBB1_425:                              ; %Flow1285
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $sgpr5
.LBB1_426:                              ; %.loopexit186
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e32 vcc_lo, 0, v27
	v_mov_b32_e32 v3, s20
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_428
; %bb.427:                              ;   in Loop: Header=BB1_426 Depth=5
	global_load_b32 v3, v[48:49], off glc
.LBB1_428:                              ;   in Loop: Header=BB1_426 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_and_not1_b32 s2, s5, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s2, s5
	s_cmp_lg_u32 s20, 0x10100
	s_cbranch_scc0 .LBB1_435
; %bb.429:                              ;   in Loop: Header=BB1_426 Depth=5
	v_mov_b32_e32 v3, s3
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB1_433
; %bb.430:                              ;   in Loop: Header=BB1_426 Depth=5
	s_add_i32 s2, s20, 0xffffff00
	v_mov_b32_e32 v6, v5
	s_lshr_b32 s2, s2, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	v_mad_u64_u32 v[11:12], null, s2, 24, v[3:4]
	v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s2, 0, v[3:4]
	v_mov_b32_e32 v3, s3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB1_432
; %bb.431:                              ;   in Loop: Header=BB1_426 Depth=5
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[48:49], v68, off
	v_mov_b32_e32 v3, 0
.LBB1_432:                              ; %Flow1278
                                        ;   in Loop: Header=BB1_426 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB1_433:                              ;   in Loop: Header=BB1_426 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc1 .LBB1_436
; %bb.434:                              ;   in Loop: Header=BB1_426 Depth=5
	s_mov_b32 s6, 0
	s_and_not1_b32 vcc_lo, vcc_lo, exec_lo
	s_sleep 2
                                        ; implicit-def: $sgpr3
	s_branch .LBB1_437
.LBB1_435:                              ;   in Loop: Header=BB1_426 Depth=5
	s_mov_b32 s16, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $sgpr7
	s_branch .LBB1_438
.LBB1_436:                              ;   in Loop: Header=BB1_426 Depth=5
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr2
.LBB1_437:                              ; %Flow1282
                                        ;   in Loop: Header=BB1_426 Depth=5
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s17, vcc_lo, exec_lo
	s_mov_b32 s7, 0
	s_mov_b32 s16, 0
	s_or_b32 s5, s5, s17
.LBB1_438:                              ; %Flow1281
                                        ;   in Loop: Header=BB1_426 Depth=5
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_442
; %bb.439:                              ;   in Loop: Header=BB1_426 Depth=5
	s_mov_b32 s3, s2
	s_branch .LBB1_426
.LBB1_440:                              ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v31, v4 :: v_dual_mov_b32 v30, v3
	s_branch .LBB1_502
.LBB1_441:                              ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s5, -1
                                        ; implicit-def: $sgpr18
	s_branch .LBB1_494
.LBB1_442:                              ; %loop.exit.guard925
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB1_472
; %bb.443:                              ;   in Loop: Header=BB1_378 Depth=4
	s_and_saveexec_b32 s35, s5
	s_cbranch_execz .LBB1_471
; %bb.444:                              ;   in Loop: Header=BB1_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_450
; %bb.445:                              ;   in Loop: Header=BB1_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB1_449
; %bb.446:                              ; %.preheader3.i.i.i82.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s7, 0
.LBB1_447:                              ; %.preheader3.i.i.i82
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_447
; %bb.448:                              ; %Flow1273
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB1_449:                              ; %Flow1275
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_450:                              ; %.loopexit4.i.i.i77
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s36, s7, 24
	s_mul_hi_u32 s37, s6, 24
	s_mul_i32 s38, s6, 24
	s_and_saveexec_b32 s39, s2
	s_cbranch_execz .LBB1_452
; %bb.451:                              ;   in Loop: Header=BB1_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s37, s36
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s38
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB1_452:                              ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s39
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, s19
	v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[23:26], off offset:8
	global_store_b128 v[3:4], v[23:26], off offset:24
	global_store_b128 v[3:4], v[23:26], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_460
; %bb.453:                              ;   in Loop: Header=BB1_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s20 :: v_dual_mov_b32 v81, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB1_456
; %bb.454:                              ; %.preheader1.i.i.i80.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s7, 0
.LBB1_455:                              ; %.preheader1.i.i.i80
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[25:26]
	v_dual_mov_b32 v26, v12 :: v_dual_mov_b32 v25, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_455
.LBB1_456:                              ; %Flow1271
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_458
; %bb.457:                              ;   in Loop: Header=BB1_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB1_458:                              ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB1_460
; %bb.459:                              ;   in Loop: Header=BB1_378 Depth=4
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_460:                              ; %Flow1272
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s37, s37, s36
	v_add_co_u32 v3, vcc_lo, v21, s38
	v_add_co_ci_u32_e32 v4, vcc_lo, s37, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB1_461:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB1_463
; %bb.462:                              ;   in Loop: Header=BB1_461 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB1_463:                              ;   in Loop: Header=BB1_461 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB1_465
; %bb.464:                              ;   in Loop: Header=BB1_461 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB1_466
.LBB1_465:                              ;   in Loop: Header=BB1_461 Depth=5
	s_mov_b32 s5, -1
.LBB1_466:                              ; %Flow1266
                                        ;   in Loop: Header=BB1_461 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB1_461
; %bb.467:                              ;   in Loop: Header=BB1_378 Depth=4
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB1_471
; %bb.468:                              ;   in Loop: Header=BB1_378 Depth=4
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v23, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v24, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v22, v19, v21 :: v_dual_cndmask_b32 v21, v18, v6
	v_and_b32_e32 v4, v22, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v21, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_471
; %bb.469:                              ; %.preheader.i.i.i79.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s2, 0
.LBB1_470:                              ; %.preheader.i.i.i79
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[3:4], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB1_470
.LBB1_471:                              ; %Flow1276
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s35
	s_mov_b32 s7, s3
.LBB1_472:                              ; %Flow1277
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s3, s7
.LBB1_473:                              ; %Flow1287
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s16, s3
.LBB1_474:                              ; %__ockl_devmem_request.exit83
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s16, 0
	s_cselect_b32 s5, -1, 0
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB1_493
; %bb.475:                              ;   in Loop: Header=BB1_378 Depth=4
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s17, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_492
; %bb.476:                              ;   in Loop: Header=BB1_378 Depth=4
	global_load_b64 v[3:4], v[50:51], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x7530, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_492
; %bb.477:                              ;   in Loop: Header=BB1_378 Depth=4
	v_sub_nc_u32_e32 v3, 0x7530, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB1_478:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x659
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB1_481
; %bb.479:                              ; %.preheader11.i
                                        ;   in Loop: Header=BB1_478 Depth=5
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB1_478
.LBB1_480:                              ; %.preheader9.i
                                        ;   in Loop: Header=BB1_481 Depth=5
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_481:                              ; %Flow1257
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x326
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB1_480
; %bb.482:                              ; %Flow1254
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB1_485
.LBB1_483:                              ; %.preheader7.i
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB1_483
	s_branch .LBB1_485
.LBB1_484:                              ; %.preheader5.i
                                        ;   in Loop: Header=BB1_485 Depth=5
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_485:                              ; %.loopexit8.i
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0xc0
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB1_484
	s_branch .LBB1_487
.LBB1_486:                              ; %.preheader3.i
                                        ;   in Loop: Header=BB1_487 Depth=5
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_487:                              ; %Flow1248
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x59
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB1_486
	s_branch .LBB1_489
.LBB1_488:                              ; %.preheader1.i
                                        ;   in Loop: Header=BB1_489 Depth=5
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_489:                              ; %Flow1245
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 38
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB1_488
; %bb.490:                              ; %Flow1242
                                        ;   in Loop: Header=BB1_378 Depth=4
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_492
.LBB1_491:                              ; %.preheader.i
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_491
.LBB1_492:                              ; %__ockl_rtcwait_u32.exit
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	s_cmp_lg_u32 s16, 2
	v_mov_b32_e32 v31, s4
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v30, 0, 1, s2
.LBB1_493:                              ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s18, 0
.LBB1_494:                              ; %Flow1309
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB1_502
; %bb.495:                              ;   in Loop: Header=BB1_378 Depth=4
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB1_499
; %bb.496:                              ;   in Loop: Header=BB1_378 Depth=4
	global_load_b64 v[23:24], v[52:53], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v23
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_u64_e32 vcc_lo, 0x4e1f, v[3:4]
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB1_498
; %bb.497:                              ;   in Loop: Header=BB1_378 Depth=4
	v_dual_mov_b32 v21, s2 :: v_dual_mov_b32 v22, s3
	global_atomic_cmpswap_b64 v[3:4], v[52:53], v[21:24], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[3:4], v[23:24]
	v_mov_b32_e32 v4, s4
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
.LBB1_498:                              ; %Flow1236
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_499:                              ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_readfirstlane_b32 s2, v3
	v_readfirstlane_b32 s3, v4
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u64 s[2:3], 0
	s_cbranch_scc0 .LBB1_503
; %bb.500:                              ;   in Loop: Header=BB1_378 Depth=4
	v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s2
.LBB1_501:                              ; %Flow1235
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v31, v16 :: v_dual_mov_b32 v30, v15
.LBB1_502:                              ; %Flow1312
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_xor_b32 s1, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_378
	s_branch .LBB1_618
.LBB1_503:                              ;   in Loop: Header=BB1_378 Depth=4
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v15 :: v_dual_mov_b32 v4, v16
	s_and_saveexec_b32 s18, s1
	s_cbranch_execz .LBB1_539
; %bb.504:                              ;   in Loop: Header=BB1_378 Depth=4
	s_clause 0x1
	global_load_b64 v[3:4], v5, s[12:13] glc
	global_load_b64 v[11:12], v5, s[14:15]
	s_waitcnt vmcnt(0)
	v_cmp_ge_u64_e32 vcc_lo, v[3:4], v[11:12]
	s_cbranch_vccnz .LBB1_508
; %bb.505:                              ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s2, exec_lo
	s_mov_b32 s1, exec_lo
	v_mbcnt_lo_u32_b32 v6, s2, 0
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB1_507
; %bb.506:                              ;   in Loop: Header=BB1_378 Depth=4
	s_bcnt1_i32_b32 s2, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s2, s2, 21
	v_mov_b32_e32 v4, s2
	global_atomic_add_u64 v[3:4], v5, v[4:5], s[12:13] glc
.LBB1_507:                              ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s3, v4
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x200000, v6, s[2:3]
	v_cmp_ge_u64_e64 s1, v[3:4], v[11:12]
	s_branch .LBB1_509
.LBB1_508:                              ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr3_vgpr4
.LBB1_509:                              ; %Flow1233
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s19, s1
	s_cbranch_execz .LBB1_538
; %bb.510:                              ;   in Loop: Header=BB1_378 Depth=4
	s_load_b64 s[2:3], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s1, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s1, s1, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB1_516
; %bb.511:                              ;   in Loop: Header=BB1_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[2:3] offset:40
	global_load_b64 v[18:19], v5, s[2:3]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v18, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB1_515
; %bb.512:                              ; %.preheader3.i.i.i89.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s7, 0
.LBB1_513:                              ; %.preheader3.i.i.i89
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[2:3] offset:40
	global_load_b64 v[21:22], v5, s[2:3]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, v18, v23
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v12 :: v_dual_and_b32 v6, v19, v24
	v_mad_u64_u32 v[18:19], null, v6, 24, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v12, v18
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_513
; %bb.514:                              ; %Flow1229
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB1_515:                              ; %Flow1231
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_516:                              ; %.loopexit4.i.i.i84
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[2:3] offset:40
	global_load_b128 v[22:25], v5, s[2:3]
	v_readfirstlane_b32 s16, v11
	v_readfirstlane_b32 s17, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v18
	v_readfirstlane_b32 s7, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[16:17], s[6:7]
	s_mul_i32 s20, s7, 24
	s_mul_hi_u32 s21, s6, 24
	s_mul_i32 s35, s6, 24
	s_and_saveexec_b32 s36, s1
	s_cbranch_execz .LBB1_518
; %bb.517:                              ;   in Loop: Header=BB1_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s21, s20
	s_waitcnt vmcnt(0)
	v_add_co_u32 v18, vcc_lo, v22, s35
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v23, vcc_lo
	global_store_b128 v[18:19], v[11:14], off offset:8
.LBB1_518:                              ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s36
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v24, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v25, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v27, s7
	v_dual_mov_b32 v19, v5 :: v_dual_mov_b32 v26, s6
	v_dual_mov_b32 v21, v5 :: v_dual_mov_b32 v24, s4
	v_mov_b32_e32 v25, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[18:21], off
	global_store_b128 v[11:12], v[24:27], off offset:16
	global_store_b128 v[11:12], v[24:27], off offset:32
	global_store_b128 v[11:12], v[24:27], off offset:48
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB1_526
; %bb.519:                              ;   in Loop: Header=BB1_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[2:3] offset:32 glc
	global_load_b64 v[3:4], v5, s[2:3] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s16 :: v_dual_mov_b32 v81, s17
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s17, v4
	v_and_b32_e32 v3, s16, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v22, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v23, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[26:27], v5, v[80:83], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[26:27], v[82:83]
	s_cbranch_execz .LBB1_522
; %bb.520:                              ; %.preheader1.i.i.i87.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s7, 0
.LBB1_521:                              ; %.preheader1.i.i.i87
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v24, s16 :: v_dual_mov_b32 v25, s17
	s_sleep 1
	global_store_b64 v[3:4], v[26:27], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[24:27], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[26:27]
	v_dual_mov_b32 v27, v19 :: v_dual_mov_b32 v26, v18
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_521
.LBB1_522:                              ; %Flow1227
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[18:19], v5, s[2:3] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_524
; %bb.523:                              ;   in Loop: Header=BB1_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[18:19], v[4:5], off offset:8
.LBB1_524:                              ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[24:25], v[18:19], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[24:25]
	s_cbranch_vccnz .LBB1_526
; %bb.525:                              ;   in Loop: Header=BB1_378 Depth=4
	global_load_b32 v4, v[18:19], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[24:25], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_526:                              ; %Flow1228
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s21, s21, s20
	v_add_co_u32 v3, vcc_lo, v22, s35
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB1_527:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB1_529
; %bb.528:                              ;   in Loop: Header=BB1_527 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB1_529:                              ;   in Loop: Header=BB1_527 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB1_531
; %bb.530:                              ;   in Loop: Header=BB1_527 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB1_532
.LBB1_531:                              ;   in Loop: Header=BB1_527 Depth=5
	s_mov_b32 s5, -1
.LBB1_532:                              ; %Flow1222
                                        ;   in Loop: Header=BB1_527 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB1_527
; %bb.533:                              ;   in Loop: Header=BB1_378 Depth=4
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB1_537
; %bb.534:                              ;   in Loop: Header=BB1_378 Depth=4
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[2:3] offset:40
	global_load_b64 v[18:19], v5, s[2:3] offset:24 glc
	global_load_b64 v[23:24], v5, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v21, vcc_lo, v6, s16
	v_add_co_ci_u32_e32 v22, vcc_lo, s17, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_cndmask_b32 v22, v22, v25 :: v_dual_cndmask_b32 v21, v21, v6
	v_and_b32_e32 v6, v22, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v21, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, v23, v11
	v_mov_b32_e32 v23, v18
	v_add_co_ci_u32_e32 v12, vcc_lo, v24, v6, vcc_lo
	v_mov_b32_e32 v24, v19
	global_store_b64 v[11:12], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[18:19]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_537
; %bb.535:                              ; %.preheader.i.i.i86.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s1, 0
.LBB1_536:                              ; %.preheader.i.i.i86
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[11:12], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[23:24]
	v_dual_mov_b32 v24, v19 :: v_dual_mov_b32 v23, v18
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_536
.LBB1_537:                              ; %Flow1220
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_538:                              ; %Flow1234
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s19
.LBB1_539:                              ; %__ockl_devmem_request.exit90
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s18
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v3
	v_readfirstlane_b32 s3, v4
	s_cmp_eq_u64 s[2:3], 0
	s_cbranch_scc1 .LBB1_584
; %bb.540:                              ;   in Loop: Header=BB1_378 Depth=4
	v_mbcnt_lo_u32_b32 v4, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b32 v6, v[38:39], off
	s_bcnt1_i32_b32 s5, exec_lo
	s_add_u32 s6, s2, 16
	s_addc_u32 s7, s3, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshrrev_b32_e32 v3, 5, v3
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s16, exec_lo, s1
	s_cbranch_execz .LBB1_548
; %bb.541:                              ;   in Loop: Header=BB1_378 Depth=4
	global_load_b32 v15, v[54:55], off
	s_mov_b32 s17, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB1_544
; %bb.542:                              ; %.preheader182.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s18, s5, 2
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB1_543:                              ; %.preheader182
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_add_nc_u32_e32 v16, s5, v16
	global_store_b32 v[11:12], v5, off
	v_add_co_u32 v11, s1, v11, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s1, 0, v12, s1
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s19, vcc_lo, s19
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB1_543
.LBB1_544:                              ; %Flow1209
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	global_load_b32 v16, v[64:65], off
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v15, v4, v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v11, v6
	s_cbranch_execz .LBB1_547
; %bb.545:                              ; %.preheader180.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	v_mul_lo_u32 v12, v15, s5
	s_mov_b32 s17, 0
.LBB1_546:                              ; %.preheader180
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_lshlrev_b32_e64 v15, v11, 1
	v_lshrrev_b32_e32 v16, 3, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v11, v12
	v_and_b32_e32 v16, 0x1ffffffc, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v11, v6
	global_store_b32 v16, v15, s[6:7]
	s_or_b32 s17, vcc_lo, s17
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB1_546
.LBB1_547:                              ; %Flow1206
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
.LBB1_548:                              ; %Flow1214
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_and_not1_saveexec_b32 s16, s16
	s_cbranch_execz .LBB1_553
; %bb.549:                              ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s17, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB1_552
; %bb.550:                              ; %.preheader178.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	global_load_b32 v15, v[66:67], off
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s18, s5, 2
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB1_551:                              ; %.preheader178
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_add_nc_u32_e32 v16, s5, v16
	s_waitcnt vmcnt(0)
	global_store_b32 v[11:12], v15, off
	v_add_co_u32 v11, s1, v11, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s1, 0, v12, s1
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s19, vcc_lo, s19
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB1_551
.LBB1_552:                              ; %Flow1212
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
.LBB1_553:                              ; %.loopexit179
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s16
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_557
; %bb.554:                              ;   in Loop: Header=BB1_378 Depth=4
	v_and_b32_e32 v6, 31, v6
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v6
	s_cbranch_execz .LBB1_556
; %bb.555:                              ;   in Loop: Header=BB1_378 Depth=4
	v_add_nc_u32_e32 v4, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v11, v[3:4], off
	s_waitcnt vmcnt(0)
	v_lshl_or_b32 v6, -1, v6, v11
	global_store_b32 v[3:4], v6, off
.LBB1_556:                              ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	global_store_b128 v5, v[7:10], s[2:3]
.LBB1_557:                              ; %Flow1203
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $sgpr5
.LBB1_558:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s1, 0, v71
	v_mov_b32_e32 v3, s31
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB1_560
; %bb.559:                              ;   in Loop: Header=BB1_558 Depth=5
	global_load_b32 v3, v[32:33], off glc
.LBB1_560:                              ;   in Loop: Header=BB1_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s31, v3
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s6, s1, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s5, s6
	s_cmp_eq_u32 s31, 0x10100
	s_cbranch_scc1 .LBB1_567
; %bb.561:                              ;   in Loop: Header=BB1_558 Depth=5
	v_mov_b32_e32 v3, s34
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB1_563
; %bb.562:                              ;   in Loop: Header=BB1_558 Depth=5
	global_load_b32 v3, v[48:49], off glc
.LBB1_563:                              ;   in Loop: Header=BB1_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s34, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u32 s31, s34
	s_cbranch_scc0 .LBB1_568
; %bb.564:                              ;   in Loop: Header=BB1_558 Depth=5
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB1_575
; %bb.565:                              ;   in Loop: Header=BB1_558 Depth=5
	s_cmpk_lt_u32 s31, 0x100
	s_cbranch_scc0 .LBB1_569
; %bb.566:                              ;   in Loop: Header=BB1_558 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_mov_b32 s7, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s31, 24, v[3:4]
	s_branch .LBB1_570
.LBB1_567:                              ;   in Loop: Header=BB1_558 Depth=5
	s_mov_b64 s[16:17], 0
	s_mov_b32 s1, -1
	s_mov_b32 s18, 0
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB1_580
.LBB1_568:                              ;   in Loop: Header=BB1_558 Depth=5
	s_mov_b32 s18, -1
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB1_579
.LBB1_569:                              ;   in Loop: Header=BB1_558 Depth=5
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB1_570:                              ; %Flow1195
                                        ;   in Loop: Header=BB1_558 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB1_572
; %bb.571:                              ;   in Loop: Header=BB1_558 Depth=5
	s_add_i32 s7, s31, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s7, s7, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
	s_and_b32 s7, s31, 0xff
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
.LBB1_572:                              ;   in Loop: Header=BB1_558 Depth=5
	v_dual_mov_b32 v15, s31 :: v_dual_mov_b32 v4, s3
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v6, v5
	global_store_b32 v5, v15, s[2:3] offset:4
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off offset:8 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB1_574
; %bb.573:                              ;   in Loop: Header=BB1_558 Depth=5
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[32:33], v118, off
	v_dual_mov_b32 v3, v11 :: v_dual_mov_b32 v4, v12
.LBB1_574:                              ; %Flow1193
                                        ;   in Loop: Header=BB1_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB1_575:                              ; %Flow1196
                                        ;   in Loop: Header=BB1_558 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v4
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB1_577
; %bb.576:                              ;   in Loop: Header=BB1_558 Depth=5
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
	s_branch .LBB1_578
.LBB1_577:                              ;   in Loop: Header=BB1_558 Depth=5
	s_mov_b32 s19, 0
	s_and_not1_b32 s1, s1, exec_lo
	s_sleep 2
.LBB1_578:                              ; %Flow1201
                                        ;   in Loop: Header=BB1_558 Depth=5
	s_mov_b32 s18, 0
.LBB1_579:                              ; %Flow1200
                                        ;   in Loop: Header=BB1_558 Depth=5
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s16, s1, exec_lo
	s_mov_b32 s1, 0
	s_or_b32 s5, s5, s16
                                        ; implicit-def: $sgpr16_sgpr17
.LBB1_580:                              ; %Flow1199
                                        ;   in Loop: Header=BB1_558 Depth=5
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB1_558
; %bb.581:                              ; %loop.exit.guard930
                                        ;   in Loop: Header=BB1_378 Depth=4
	v_dual_mov_b32 v15, s16 :: v_dual_mov_b32 v16, s17
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_501
; %bb.582:                              ; %loop.exit.guard931
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_xor_b32 s1, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB1_585
; %bb.583:                              ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s18, 0
	s_branch .LBB1_586
.LBB1_584:                              ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s18, 0
	s_branch .LBB1_501
.LBB1_585:                              ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s18, -1
                                        ; implicit-def: $sgpr6_sgpr7
.LBB1_586:                              ; %Flow1190
                                        ;   in Loop: Header=BB1_378 Depth=4
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB1_501
; %bb.587:                              ;   in Loop: Header=BB1_378 Depth=4
	s_and_saveexec_b32 s20, s5
	s_cbranch_execz .LBB1_616
; %bb.588:                              ;   in Loop: Header=BB1_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s1, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s1, s1, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB1_594
; %bb.589:                              ;   in Loop: Header=BB1_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB1_593
; %bb.590:                              ; %.preheader3.i.i.i96.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s7, 0
.LBB1_591:                              ; %.preheader3.i.i.i96
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_591
; %bb.592:                              ; %Flow1186
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB1_593:                              ; %Flow1188
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_594:                              ; %.loopexit4.i.i.i91
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s21, s7, 24
	s_mul_hi_u32 s31, s6, 24
	s_mul_i32 s34, s6, 24
	s_and_saveexec_b32 s35, s1
	s_cbranch_execz .LBB1_596
; %bb.595:                              ;   in Loop: Header=BB1_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s31, s21
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s34
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB1_596:                              ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s35
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v11, s2
	v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[23:26], off offset:8
	global_store_b128 v[3:4], v[23:26], off offset:24
	global_store_b128 v[3:4], v[23:26], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB1_604
; %bb.597:                              ;   in Loop: Header=BB1_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s3, exec_lo
	v_dual_mov_b32 v80, s18 :: v_dual_mov_b32 v81, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB1_600
; %bb.598:                              ; %.preheader1.i.i.i94.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s5, 0
.LBB1_599:                              ; %.preheader1.i.i.i94
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s19
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[25:26]
	v_dual_mov_b32 v26, v12 :: v_dual_mov_b32 v25, v11
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_599
.LBB1_600:                              ; %Flow1184
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s5, exec_lo
	s_mov_b32 s3, exec_lo
	v_mbcnt_lo_u32_b32 v3, s5, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_602
; %bb.601:                              ;   in Loop: Header=BB1_378 Depth=4
	s_bcnt1_i32_b32 s5, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s5
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB1_602:                              ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB1_604
; %bb.603:                              ;   in Loop: Header=BB1_378 Depth=4
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s3, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s3, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_604:                              ; %Flow1185
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s31, s31, s21
	v_add_co_u32 v3, vcc_lo, v21, s34
	v_add_co_ci_u32_e32 v4, vcc_lo, s31, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB1_605:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB1_607
; %bb.606:                              ;   in Loop: Header=BB1_605 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB1_607:                              ;   in Loop: Header=BB1_605 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s2, v6
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc1 .LBB1_609
; %bb.608:                              ;   in Loop: Header=BB1_605 Depth=5
	s_mov_b32 s2, 0
	s_sleep 1
	s_branch .LBB1_610
.LBB1_609:                              ;   in Loop: Header=BB1_605 Depth=5
	s_mov_b32 s2, -1
.LBB1_610:                              ; %Flow1179
                                        ;   in Loop: Header=BB1_605 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB1_605
; %bb.611:                              ;   in Loop: Header=BB1_378 Depth=4
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB1_615
; %bb.612:                              ;   in Loop: Header=BB1_378 Depth=4
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v23, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v21, vcc_lo
	v_mov_b32_e32 v24, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v22, v19, v21 :: v_dual_cndmask_b32 v21, v18, v6
	v_and_b32_e32 v4, v22, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v21, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_615
; %bb.613:                              ; %.preheader.i.i.i93.preheader
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_mov_b32 s1, 0
.LBB1_614:                              ; %.preheader.i.i.i93
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ;         Parent Loop BB1_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[3:4], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_614
.LBB1_615:                              ; %Flow1177
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v71, 0
.LBB1_616:                              ; %Flow1189
                                        ;   in Loop: Header=BB1_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s20
	v_dual_mov_b32 v15, v30 :: v_dual_mov_b32 v16, v31
	s_mov_b32 s18, -1
	s_branch .LBB1_501
.LBB1_617:                              ;   in Loop: Header=BB1_347 Depth=3
                                        ; implicit-def: $vgpr28_vgpr29
                                        ; implicit-def: $sgpr29
                                        ; implicit-def: $vgpr70
	s_branch .LBB1_641
.LBB1_618:                              ;   in Loop: Header=BB1_347 Depth=3
	v_cmp_ne_u64_e64 s5, 1, v[30:31]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB1_620
; %bb.619:                              ;   in Loop: Header=BB1_347 Depth=3
	v_dual_mov_b32 v28, v30 :: v_dual_mov_b32 v29, v31
	s_branch .LBB1_640
.LBB1_620:                              ;   in Loop: Header=BB1_347 Depth=3
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB1_637
; %bb.621:                              ;   in Loop: Header=BB1_347 Depth=3
	global_load_b64 v[3:4], v[52:53], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x4e20, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_637
; %bb.622:                              ;   in Loop: Header=BB1_347 Depth=3
	v_sub_nc_u32_e32 v3, 0x4e20, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB1_623:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x659
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB1_626
; %bb.624:                              ; %.preheader11.i110
                                        ;   in Loop: Header=BB1_623 Depth=4
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB1_623
.LBB1_625:                              ; %.preheader9.i109
                                        ;   in Loop: Header=BB1_626 Depth=4
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_626:                              ; %Flow1171
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x326
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB1_625
; %bb.627:                              ; %Flow1168
                                        ;   in Loop: Header=BB1_347 Depth=3
	s_add_u32 s16, s6, 0x18c
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB1_630
.LBB1_628:                              ; %.preheader7.i108
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x18c
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB1_628
	s_branch .LBB1_630
.LBB1_629:                              ; %.preheader5.i107
                                        ;   in Loop: Header=BB1_630 Depth=4
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_630:                              ; %.loopexit8.i100
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0xc0
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB1_629
	s_branch .LBB1_632
.LBB1_631:                              ; %.preheader3.i106
                                        ;   in Loop: Header=BB1_632 Depth=4
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_632:                              ; %Flow1162
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x59
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB1_631
	s_branch .LBB1_634
.LBB1_633:                              ; %.preheader1.i105
                                        ;   in Loop: Header=BB1_634 Depth=4
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB1_634:                              ; %Flow1159
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 38
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB1_633
; %bb.635:                              ; %Flow1156
                                        ;   in Loop: Header=BB1_347 Depth=3
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_637
.LBB1_636:                              ; %.preheader.i104
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_636
.LBB1_637:                              ; %__ockl_rtcwait_u32.exit111
                                        ;   in Loop: Header=BB1_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, s29
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v70
	s_cbranch_execz .LBB1_639
; %bb.638:                              ;   in Loop: Header=BB1_347 Depth=3
	global_load_b32 v3, v[32:33], off glc
.LBB1_639:                              ;   in Loop: Header=BB1_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s29, v3
.LBB1_640:                              ; %Flow1173
                                        ;   in Loop: Header=BB1_347 Depth=3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v11, v28 :: v_dual_mov_b32 v12, v29
.LBB1_641:                              ; %Flow1318
                                        ;   in Loop: Header=BB1_347 Depth=3
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB1_347
.LBB1_642:                              ; %.loopexit189
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_eq_u64 s[6:7], 0
	s_cbranch_scc1 .LBB1_663
; %bb.643:                              ;   in Loop: Header=BB1_6 Depth=2
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mbcnt_lo_u32_b32 v3, s5, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b64 v[0:1], v5, s[6:7] offset:8 glc
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_waitcnt vmcnt(0)
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB1_647
; %bb.644:                              ;   in Loop: Header=BB1_6 Depth=2
	s_mov_b32 s17, exec_lo
	s_bcnt1_i32_b32 s5, s5
	v_mbcnt_lo_u32_b32 v4, s17, 0
	s_mov_b32 s16, exec_lo
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_646
; %bb.645:                              ;   in Loop: Header=BB1_6 Depth=2
	s_bcnt1_i32_b32 s1, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s1, s5, s1
	v_mov_b32_e32 v6, s1
	global_atomic_add_u32 v6, v[0:1], v6, off offset:8 glc
.LBB1_646:                              ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s16
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s1, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u32_u24 v4, s5, v4, s1
.LBB1_647:                              ; %Flow944
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_mov_b32 s3, s4
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+4
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+12
	s_lshl_b64 s[16:17], s[2:3], 5
	v_mov_b32_e32 v11, 0
	s_add_u32 s18, s16, s18
	s_addc_u32 s19, s17, s19
	v_readfirstlane_b32 s1, v4
	s_load_b32 s5, s[18:19], 0x0
	v_mov_b32_e32 v12, 0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s3, s5, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s3, 32
	s_cbranch_scc1 .LBB1_657
; %bb.648:                              ;   in Loop: Header=BB1_6 Depth=2
	v_cvt_f32_u32_e32 v4, s5
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+32
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+40
	s_lshr_b32 s3, s3, 5
	s_add_u32 s18, s16, s18
	s_addc_u32 s19, s17, s19
	v_rcp_iflag_f32_e32 v4, v4
	s_load_b32 s18, s[18:19], 0x0
	s_sub_i32 s19, 0, s5
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v4, 0x4f7ffffe, v4 :: v_dual_add_nc_u32 v3, s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v4
	v_mul_lo_u32 v6, s19, v4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_lo_u32 v3, s18, v3
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+16
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+24
	s_add_u32 s16, s16, s18
	s_addc_u32 s17, s17, s19
	s_lshr_b32 s18, s2, 1
	s_add_i32 s19, s3, -1
	s_add_i32 s18, s18, 4
	v_mul_hi_u32 v6, v4, v6
	s_lshl_b32 s18, 1, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v6
	v_cvt_f32_u32_e32 v6, s3
	v_mul_hi_u32 v4, v3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v6, v6
	v_mul_lo_u32 v4, v4, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v3, v3, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v6
	v_subrev_nc_u32_e32 v6, s5, v3
	v_cmp_le_u32_e64 s1, s5, v3
	v_cvt_u32_f32_e32 v15, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v4, v3, v6, s1
	s_sub_i32 s1, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v11, s1, v15
	v_add_co_u32 v3, s1, v0, 16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v6, s1, 0, v1, s1
	v_subrev_nc_u32_e32 v12, s5, v4
	v_cmp_le_u32_e64 s1, s5, v4
	s_mov_b32 s5, 0
	v_mul_hi_u32 v16, v15, v11
	v_cndmask_b32_e64 v4, v4, v12, s1
	v_mov_b32_e32 v11, 0
	s_bfe_i32 s1, s2, 0x10000
	s_lshr_b32 s2, s18, 1
	v_mov_b32_e32 v12, 0
	v_lshrrev_b32_e32 v4, 5, v4
	v_add_nc_u32_e32 v18, v15, v16
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s18, s1, s18
.LBB1_649:                              ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], 2, v[4:5]
	s_mov_b32 s2, -1
	s_mov_b32 s20, exec_lo
                                        ; implicit-def: $vgpr19
	v_add_co_u32 v15, s1, v3, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v16, s1, v6, v16, s1
	global_load_b32 v21, v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v21
	s_cbranch_execz .LBB1_653
; %bb.650:                              ;   in Loop: Header=BB1_649 Depth=3
	v_not_b32_e32 v19, v21
	s_mov_b32 s21, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ctz_i32_b32_e32 v19, v19
	v_min_u32_e32 v21, 32, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e64 v19, v21, 1
	global_atomic_or_b32 v15, v[15:16], v19, off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v15, v15, v19
	v_mov_b32_e32 v19, 0
	v_cmp_ne_u32_e64 s1, 0, v15
	v_cmpx_eq_u32_e32 0, v15
	s_cbranch_execz .LBB1_652
; %bb.651:                              ;   in Loop: Header=BB1_649 Depth=3
	s_load_b32 s2, s[16:17], 0x0
	v_lshl_add_u32 v11, v4, 5, v21
	v_mov_b32_e32 v19, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, v11, s18
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v12, s2, v0, s2
	v_add_co_ci_u32_e64 v15, s2, 0, v1, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v11, s2, v12, v11
	v_add_co_ci_u32_e64 v12, s2, 0, v15, s2
.LBB1_652:                              ;   in Loop: Header=BB1_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s21
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_not1_b32 s2, s1, exec_lo
.LBB1_653:                              ; %Flow941
                                        ;   in Loop: Header=BB1_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s20
	s_and_saveexec_b32 s20, s2
; %bb.654:                              ;   in Loop: Header=BB1_649 Depth=3
	v_dual_mov_b32 v19, 0 :: v_dual_add_nc_u32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v15, v4, v18
	v_mul_lo_u32 v15, v15, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v4, v15
	v_subrev_nc_u32_e32 v15, s3, v4
	v_cmp_le_u32_e64 s1, s3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v15, s1
	v_subrev_nc_u32_e32 v15, s3, v4
	v_cmp_le_u32_e64 s1, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v15, s1
; %bb.655:                              ;   in Loop: Header=BB1_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s20
	v_cmp_ne_u32_e64 s1, 0, v19
	s_cmp_eq_u32 s19, 0
	s_cselect_b32 s2, -1, 0
	s_add_i32 s19, s19, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s1, s2
	s_and_b32 s1, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s1, s5
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_649
; %bb.656:                              ; %Flow942
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_657:                              ; %.loopexit193
                                        ;   in Loop: Header=BB1_6 Depth=2
	v_cmp_ne_u64_e64 s1, 0, v[11:12]
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_660
; %bb.658:                              ;   in Loop: Header=BB1_6 Depth=2
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s3, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s5, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s5
	s_cbranch_execz .LBB1_660
; %bb.659:                              ;   in Loop: Header=BB1_6 Depth=2
	s_bcnt1_i32_b32 s1, s1
	s_bcnt1_i32_b32 s3, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s1, s1, s3
	v_mov_b32_e32 v0, s1
	global_atomic_add_u32 v5, v0, s[6:7] offset:16
.LBB1_660:                              ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u64_e32 0, v[11:12]
; %bb.661:                              ;   in Loop: Header=BB1_6 Depth=2
	v_dual_mov_b32 v0, v11 :: v_dual_mov_b32 v119, 0
	v_dual_mov_b32 v128, 0 :: v_dual_mov_b32 v1, v12
; %bb.662:                              ; %Flow
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v128 :: v_dual_mov_b32 v4, v119
.LBB1_663:                              ; %Flow945
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v119, v4
.LBB1_664:                              ; %Flow1324
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s28
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v3
	;;#ASMSTART
	;;#ASMEND
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	s_cbranch_vccnz .LBB1_6
.LBB1_665:                              ; %Flow1326
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s27
	v_mov_b32_e32 v3, v119
.LBB1_666:                              ; %.loopexit197
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v3
	;;#ASMSTART
	;;#ASMEND
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	s_cbranch_vccnz .LBB1_3
; %bb.667:                              ; %Flow1328
                                        ; implicit-def: $vgpr4_vgpr5
.LBB1_668:                              ; %Flow1347
	s_and_not1_saveexec_b32 s1, s23
	s_cbranch_execz .LBB1_701
; %bb.669:
	s_load_b64 s[2:3], s[8:9], 0x50
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v2
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_675
; %bb.670:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v3, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v3, s[2:3] offset:40
	global_load_b64 v[6:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v0, v0, v8
	v_and_b32_e32 v1, v1, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v0, 24
	v_mul_lo_u32 v1, v1, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v10, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo
	global_load_b64 v[6:7], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v3, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[0:1], v[8:9]
	s_cbranch_execz .LBB1_674
; %bb.671:                              ; %.preheader3.i.i.i.preheader
	s_mov_b32 s6, 0
.LBB1_672:                              ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v3, s[2:3] offset:40
	global_load_b64 v[10:11], v3, s[2:3]
	v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v8
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v6, 24, v[10:11]
	v_and_b32_e32 v10, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v10, 24, v[1:2]
	v_mov_b32_e32 v1, v6
	global_load_b64 v[6:7], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v3, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB1_672
; %bb.673:                              ; %Flow1343
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_674:                              ; %Flow1345
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_675:                              ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v0
	v_readfirstlane_b32 s5, v1
	s_mov_b32 s13, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[2:3] offset:40
	global_load_b128 v[6:9], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v10
	v_readfirstlane_b32 s7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s10, s7, 24
	s_mul_hi_u32 s11, s6, 24
	s_mul_i32 s12, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB1_677
; %bb.676:
	v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v11, v3
	s_add_i32 s13, s11, s10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s12
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v7, vcc_lo
	v_dual_mov_b32 v12, 3 :: v_dual_mov_b32 v13, 1
	global_store_b128 v[0:1], v[10:13], off offset:8
.LBB1_677:
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[0:1], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v8, s6
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v0
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_add_co_ci_u32_e32 v9, vcc_lo, v9, v1, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v13, s19
	v_dual_mov_b32 v11, s17 :: v_dual_mov_b32 v12, s18
	s_clause 0x3
	global_store_b128 v[8:9], v[2:5], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_685
; %bb.678:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v4, vcc_lo, v6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v7, v1, vcc_lo
	global_store_b64 v[4:5], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB1_681
; %bb.679:                              ; %.preheader1.i.i.i.preheader
	s_mov_b32 s13, 0
.LBB1_680:                              ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_680
.LBB1_681:                              ; %Flow1341
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s13, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB1_683
; %bb.682:
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB1_683:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB1_685
; %bb.684:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_685:                              ; %Flow1342
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s11, s11, s10
	v_add_co_u32 v0, vcc_lo, v6, s12
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_686:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_688
; %bb.687:                              ;   in Loop: Header=BB1_686 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_688:                              ;   in Loop: Header=BB1_686 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB1_690
; %bb.689:                              ;   in Loop: Header=BB1_686 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB1_691
.LBB1_690:                              ;   in Loop: Header=BB1_686 Depth=1
	s_mov_b32 s6, -1
.LBB1_691:                              ; %Flow1336
                                        ;   in Loop: Header=BB1_686 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_686
; %bb.692:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_696
; %bb.693:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_696
; %bb.694:                              ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB1_695:                              ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_695
.LBB1_696:                              ; %__ockl_devmem_request.exit
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execz .LBB1_700
; %bb.697:
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v2, s2, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_b32 s3, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s3
	s_cbranch_execz .LBB1_700
; %bb.698:
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v2, s3, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_b32 s4, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s4
	s_cbranch_execz .LBB1_700
; %bb.699:
	s_load_b64 s[4:5], s[8:9], 0x60
	s_bcnt1_i32_b32 s2, s2
	s_bcnt1_i32_b32 s3, s3
	v_mov_b32_e32 v4, 0x1a000
	s_mul_i32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, s2
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u64 v4, v[2:3], s[4:5] offset:2184
.LBB1_700:
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_701:                              ; %Flow1348
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB1_702:                              ; %.loopexit198
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s22
	v_readlane_b32 s30, v40, 11
	v_readlane_b32 s31, v40, 12
	v_readlane_b32 s44, v40, 10
	v_readlane_b32 s43, v40, 9
	v_readlane_b32 s42, v40, 8
	v_readlane_b32 s41, v40, 7
	v_readlane_b32 s40, v40, 6
	v_readlane_b32 s39, v40, 5
	v_readlane_b32 s38, v40, 4
	v_readlane_b32 s37, v40, 3
	v_readlane_b32 s36, v40, 2
	v_readlane_b32 s35, v40, 1
	v_readlane_b32 s34, v40, 0
	s_or_saveexec_b32 s0, -1
	scratch_load_b32 v40, off, s32          ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end1:
	.size	__ockl_dm_alloc, .Lfunc_end1-__ockl_dm_alloc
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 24288
; NumSgprs: 47
; NumVgprs: 136
; ScratchSize: 8
; MemoryBound: 1
	.section	.text.unlikely.,"ax",@progbits
	.p2align	2                               ; -- Begin function __ockl_dm_dealloc
	.type	__ockl_dm_dealloc,@function
__ockl_dm_dealloc:                      ; @__ockl_dm_dealloc
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v2, 0xfff, v0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u64_e32 0, v[2:3]
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB2_12
; %bb.1:
	v_dual_mov_b32 v5, v1 :: v_dual_and_b32 v4, 0xffe00000, v0
	s_load_b64 s[0:1], s[8:9], 0x60
	v_and_b32_e32 v15, 0x1fffff, v0
	global_load_b64 v[6:7], v[4:5], off
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, 0x2800
	s_addc_u32 s1, s1, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+16
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+24
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v1, 1, v6
	v_bfe_i32 v2, v6, 0, 1
	v_and_b32_e32 v16, 0xff, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, 4, v1
	v_lshlrev_b32_e64 v1, v1, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v8, 1, v1
	v_and_b32_e32 v2, v2, v8
	v_add_nc_u32_e32 v8, 0xffffff00, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v14, v2, v1
	v_mov_b32_e32 v2, v6
	v_lshrrev_b32_e32 v18, 8, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cvt_f32_u32_e32 v1, v14
	v_sub_nc_u32_e32 v0, 0, v14
	v_lshlrev_b64 v[12:13], 5, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	v_add_co_u32 v12, vcc_lo, v12, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v9, v0, v17
	v_mad_u64_u32 v[0:1], null, 0x1800, v6, s[0:1]
	v_cmp_gt_u32_e64 s0, 0x100, v7
	v_mul_hi_u32 v2, v17, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[8:9], null, v7, 24, v[0:1]
	v_mad_u64_u32 v[10:11], null, v18, 24, v[0:1]
	v_dual_mov_b32 v17, 1 :: v_dual_add_nc_u32 v2, v17, v2
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v0, v17
	v_cmp_ne_u32_e32 vcc_lo, 0, v17
	v_mov_b32_e32 v17, 0
	;;#ASMSTART
	;;#ASMEND
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB2_11
; %bb.3:                                ;   in Loop: Header=BB2_2 Depth=1
	v_readfirstlane_b32 s1, v6
	v_readfirstlane_b32 s2, v7
	v_mov_b32_e32 v17, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, s1, v6
	v_cmp_eq_u32_e64 s1, s2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB2_10
; %bb.4:                                ;   in Loop: Header=BB2_2 Depth=1
	s_mov_b32 s7, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s7, 0
	v_cmp_ne_u32_e64 s1, 0, v0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v1, v9, 0, s1
	v_cndmask_b32_e64 v0, v8, 0, s1
	s_or_b32 s1, s1, s0
	s_xor_b32 s2, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s2
	s_cbranch_execz .LBB2_6
; %bb.5:                                ;   in Loop: Header=BB2_2 Depth=1
	global_load_b64 v[17:18], v[10:11], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v16, 24, v[17:18]
.LBB2_6:                                ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	global_load_b32 v17, v[12:13], off
	v_readfirstlane_b32 s2, v0
	v_readfirstlane_b32 s3, v1
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v17, v15, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v18, v17, v2
	v_mul_lo_u32 v19, v18, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v17, v17, v19
	v_add_nc_u32_e32 v19, 1, v18
	v_sub_nc_u32_e32 v20, v17, v14
	v_cmp_ge_u32_e64 s1, v17, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v18, v18, v19, s1
	v_cndmask_b32_e64 v17, v17, v20, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v19, 1, v18
	v_cmp_ge_u32_e64 s1, v17, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v17, v18, v19, s1
	v_lshrrev_b32_e32 v18, 3, v17
	v_lshlrev_b32_e64 v17, v17, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v18, 0x1ffffffc, v18
	v_not_b32_e32 v19, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s1, v4, v18
	v_add_co_ci_u32_e64 v18, s1, 0, v5, s1
	global_atomic_and_b32 v[17:18], v19, off offset:16
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB2_9
; %bb.7:                                ;   in Loop: Header=BB2_2 Depth=1
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s10, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s11, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s11
	s_cbranch_execz .LBB2_9
; %bb.8:                                ;   in Loop: Header=BB2_2 Depth=1
	s_bcnt1_i32_b32 s7, s7
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s7, s10
	v_mov_b32_e32 v0, s7
	global_atomic_sub_u32 v3, v0, s[2:3] offset:16
.LBB2_9:                                ; %Flow16
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v17, 0
.LBB2_10:                               ; %Flow18
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_11:                               ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v0, v17
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_cbranch_vccnz .LBB2_2
.LBB2_12:                               ; %Flow40
	s_and_not1_saveexec_b32 s1, s4
	s_cbranch_execz .LBB2_45
; %bb.13:
	s_mov_b32 s10, exec_lo
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execz .LBB2_44
; %bb.14:
	s_load_b64 s[2:3], s[8:9], 0x50
	v_mbcnt_lo_u32_b32 v2, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_20
; %bb.15:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[6:7], v3, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[8:9], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB2_19
; %bb.16:                               ; %.preheader3.i.i.i.preheader
	s_mov_b32 s6, 0
.LBB2_17:                               ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[10:11], v3, s[2:3]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB2_17
; %bb.18:                               ; %Flow34
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_19:                               ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_20:                               ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s14, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v10
	v_readfirstlane_b32 s7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s11, s7, 24
	s_mul_hi_u32 s12, s6, 24
	s_mul_i32 s13, s6, 24
	s_and_saveexec_b32 s15, s0
	s_cbranch_execz .LBB2_22
; %bb.21:
	v_dual_mov_b32 v8, s14 :: v_dual_mov_b32 v9, v3
	s_add_i32 s14, s12, s11
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s13
	v_add_co_ci_u32_e32 v13, vcc_lo, s14, v5, vcc_lo
	v_dual_mov_b32 v10, 3 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB2_22:
	s_or_b32 exec_lo, exec_lo, s15
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v2, v8
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v6, s16 :: v_dual_mov_b32 v9, s19
	v_dual_mov_b32 v7, s17 :: v_dual_mov_b32 v8, s18
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB2_30
; %bb.23:
	v_mov_b32_e32 v8, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v8, s[2:3] offset:40
	v_dual_mov_b32 v9, s4 :: v_dual_mov_b32 v10, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v6, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v1, vcc_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[11:12]
	s_cbranch_execz .LBB2_26
; %bb.24:                               ; %.preheader1.i.i.i.preheader
	s_mov_b32 s14, 0
.LBB2_25:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[6:7], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB2_25
.LBB2_26:                               ; %Flow32
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s14, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s14, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_28
; %bb.27:
	s_bcnt1_i32_b32 s14, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s14
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB2_28:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_30
; %bb.29:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_30:                               ; %Flow33
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s12, s12, s11
	v_add_co_u32 v0, vcc_lo, v4, s13
	v_add_co_ci_u32_e32 v1, vcc_lo, s12, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_31:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB2_33
; %bb.32:                               ;   in Loop: Header=BB2_31 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_33:                               ;   in Loop: Header=BB2_31 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB2_35
; %bb.34:                               ;   in Loop: Header=BB2_31 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB2_36
.LBB2_35:                               ;   in Loop: Header=BB2_31 Depth=1
	s_mov_b32 s6, -1
.LBB2_36:                               ; %Flow27
                                        ;   in Loop: Header=BB2_31 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_31
; %bb.37:
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB2_41
; %bb.38:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[2:3] offset:40
	global_load_b64 v[7:8], v6, s[2:3] offset:24 glc
	global_load_b64 v[4:5], v6, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_41
; %bb.39:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB2_40:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_40
.LBB2_41:                               ; %__ockl_devmem_request.exit
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_mbcnt_lo_u32_b32 v0, s0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s2, exec_lo, vcc_lo
	s_mov_b32 exec_lo, s2
	s_cbranch_execz .LBB2_44
; %bb.42:
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s2, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s3, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s3
	s_cbranch_execz .LBB2_44
; %bb.43:
	s_load_b64 s[4:5], s[8:9], 0x60
	s_bcnt1_i32_b32 s0, s0
	s_bcnt1_i32_b32 s2, s2
	v_mov_b32_e32 v2, 0x1a000
	s_mul_i32 s0, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s0
	s_waitcnt lgkmcnt(0)
	global_atomic_sub_u64 v2, v[0:1], s[4:5] offset:2184
.LBB2_44:                               ; %Flow38
	s_or_b32 exec_lo, exec_lo, s10
.LBB2_45:                               ; %.loopexit
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end2:
	.size	__ockl_dm_dealloc, .Lfunc_end2-__ockl_dm_dealloc
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 2296
; NumSgprs: 34
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function ramification
	.type	ramification,@function
ramification:                           ; @ramification
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s0, s33
	s_mov_b32 s33, s32
	s_or_saveexec_b32 s1, -1
	s_clause 0x1
	scratch_store_b32 off, v46, s33 offset:24
	; meta instruction
	scratch_store_b32 off, v47, s33 offset:28
	s_mov_b32 exec_lo, s1
	v_writelane_b32 v47, s0, 11
	s_add_i32 s32, s32, 48
	s_clause 0x5
	scratch_store_b32 off, v40, s33 offset:20
	; meta instruction
	scratch_store_b32 off, v41, s33 offset:16
	; meta instruction
	scratch_store_b32 off, v42, s33 offset:12
	; meta instruction
	scratch_store_b32 off, v43, s33 offset:8
	; meta instruction
	scratch_store_b32 off, v44, s33 offset:4
	; meta instruction
	scratch_store_b32 off, v45, s33
	v_writelane_b32 v46, s34, 0
	v_writelane_b32 v46, s35, 1
	v_writelane_b32 v46, s36, 2
	v_writelane_b32 v46, s37, 3
	v_writelane_b32 v46, s38, 4
	v_writelane_b32 v46, s39, 5
	v_writelane_b32 v46, s40, 6
	v_writelane_b32 v46, s41, 7
	v_writelane_b32 v46, s42, 8
	v_writelane_b32 v46, s43, 9
	v_writelane_b32 v46, s44, 10
	v_writelane_b32 v46, s45, 11
	v_writelane_b32 v46, s46, 12
	v_writelane_b32 v46, s47, 13
	v_writelane_b32 v46, s48, 14
	v_writelane_b32 v46, s49, 15
	v_writelane_b32 v46, s50, 16
	v_writelane_b32 v46, s51, 17
	v_writelane_b32 v46, s52, 18
	v_writelane_b32 v46, s53, 19
	v_writelane_b32 v46, s54, 20
	v_writelane_b32 v46, s55, 21
	v_writelane_b32 v46, s56, 22
	v_writelane_b32 v46, s57, 23
	v_writelane_b32 v46, s58, 24
	v_writelane_b32 v46, s59, 25
	v_writelane_b32 v46, s60, 26
	v_writelane_b32 v46, s61, 27
	v_writelane_b32 v46, s62, 28
	v_writelane_b32 v46, s63, 29
	v_writelane_b32 v46, s64, 30
	v_writelane_b32 v46, s65, 31
	v_writelane_b32 v47, s66, 0
	v_writelane_b32 v47, s67, 1
	v_writelane_b32 v47, s68, 2
	v_writelane_b32 v47, s69, 3
	v_writelane_b32 v47, s70, 4
	v_writelane_b32 v47, s71, 5
	v_writelane_b32 v47, s72, 6
	v_writelane_b32 v47, s73, 7
	v_writelane_b32 v47, s74, 8
	v_writelane_b32 v47, s30, 9
	v_writelane_b32 v47, s31, 10
	v_dual_mov_b32 v145, v1 :: v_dual_mov_b32 v144, v0
	v_lshrrev_b32_e32 v0, 31, v2
	v_cmp_ne_u32_e32 vcc_lo, 2, v3
	v_dual_mov_b32 v176, 0 :: v_dual_mov_b32 v41, 22
	v_mov_b32_e32 v180, 0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v0, v2, v0
	v_cndmask_b32_e64 v1, 0, 1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 2, v3
	v_mov_b32_e32 v167, 0x3b9aca00
	v_mov_b32_e32 v166, 0xc4653600
	v_and_b32_e32 v0, -2, v0
	v_mov_b32_e32 v18, 0
	s_mov_b64 s[46:47], s[8:9]
	s_mov_b32 s52, 0
	s_mov_b32 s64, 0
	v_sub_nc_u32_e32 v0, v2, v0
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	s_mov_b32 s50, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s45, v0, v1
	v_cmp_eq_u32_e64 s48, v0, v2
.LBB3_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_26 Depth 2
                                        ;     Child Loop BB3_54 Depth 2
                                        ;     Child Loop BB3_82 Depth 2
                                        ;     Child Loop BB3_122 Depth 2
                                        ;     Child Loop BB3_162 Depth 2
                                        ;     Child Loop BB3_168 Depth 2
                                        ;     Child Loop BB3_192 Depth 2
                                        ;     Child Loop BB3_198 Depth 2
                                        ;     Child Loop BB3_222 Depth 2
                                        ;     Child Loop BB3_240 Depth 2
                                        ;     Child Loop BB3_264 Depth 2
                                        ;     Child Loop BB3_282 Depth 2
                                        ;     Child Loop BB3_312 Depth 2
                                        ;     Child Loop BB3_340 Depth 2
                                        ;     Child Loop BB3_368 Depth 2
                                        ;     Child Loop BB3_408 Depth 2
                                        ;     Child Loop BB3_448 Depth 2
                                        ;     Child Loop BB3_454 Depth 2
                                        ;     Child Loop BB3_478 Depth 2
                                        ;     Child Loop BB3_484 Depth 2
                                        ;     Child Loop BB3_508 Depth 2
                                        ;     Child Loop BB3_526 Depth 2
                                        ;     Child Loop BB3_550 Depth 2
                                        ;     Child Loop BB3_568 Depth 2
                                        ;     Child Loop BB3_600 Depth 2
                                        ;     Child Loop BB3_626 Depth 2
                                        ;     Child Loop BB3_652 Depth 2
                                        ;     Child Loop BB3_910 Depth 2
                                        ;       Child Loop BB3_928 Depth 3
                                        ;       Child Loop BB3_945 Depth 3
                                        ;     Child Loop BB3_679 Depth 2
                                        ;     Child Loop BB3_953 Depth 2
                                        ;       Child Loop BB3_971 Depth 3
                                        ;       Child Loop BB3_988 Depth 3
                                        ;     Child Loop BB3_712 Depth 2
                                        ;     Child Loop BB3_754 Depth 2
                                        ;     Child Loop BB3_796 Depth 2
                                        ;     Child Loop BB3_1000 Depth 2
                                        ;       Child Loop BB3_1018 Depth 3
                                        ;       Child Loop BB3_1035 Depth 3
                                        ;     Child Loop BB3_840 Depth 2
                                        ;     Child Loop BB3_1043 Depth 2
                                        ;       Child Loop BB3_1061 Depth 3
                                        ;       Child Loop BB3_1078 Depth 3
	s_mov_b32 s51, s52
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[56:57], s[50:51], 2
	s_mov_b32 s51, exec_lo
	v_add_co_u32 v0, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v145, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v0
	s_cbranch_execz .LBB3_869
; %bb.2:                                ; %NodeBlock257
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b64 v[16:17], v[144:145] offset:288
	v_and_b32_e32 v2, 0xff, v18
	s_and_b32 s65, s50, 7
	s_lshr_b32 s66, s50, 3
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cmp_eq_u16_e32 vcc_lo, 0, v2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_cndmask_b32 v1, v17, v145 :: v_dual_cndmask_b32 v0, v16, v144
	v_cmp_ne_u16_e64 s49, 0, v2
	v_add_co_u32 v0, vcc_lo, v0, s56
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v1, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s53, exec_lo, s0
	s_cbranch_execz .LBB3_576
; %bb.3:                                ; %NodeBlock255
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_lshl_b32 s0, s66, 3
	s_and_b32 s1, s64, 7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s0, s1
	s_add_i32 s0, s4, -14
	s_sub_i32 s2, s4, 18
	s_ashr_i32 s1, s0, 31
	s_ashr_i32 s3, s2, 31
	s_lshl_b64 s[54:55], s[0:1], 2
	s_lshl_b64 s[58:59], s[2:3], 2
	s_add_i32 s0, s4, 18
	s_mov_b32 s1, s52
	s_add_i32 s2, s4, 14
	s_mov_b32 s3, s52
	s_lshl_b64 s[60:61], s[0:1], 2
	s_lshl_b64 s[62:63], s[2:3], 2
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s67, exec_lo, s0
	s_cbranch_execz .LBB3_289
; %bb.4:                                ; %LeafBlock253
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s68, exec_lo
	v_cmpx_eq_u32_e32 22, v0
	s_cbranch_execz .LBB3_288
; %bb.5:                                ;   in Loop: Header=BB3_1 Depth=1
	s_and_saveexec_b32 s69, s48
	s_cbranch_execz .LBB3_287
; %bb.6:                                ; %NodeBlock519
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_12
; %bb.7:                                ; %NodeBlock517
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.8:                                ; %LeafBlock515
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.9:                                ; %Flow920
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.10:                               ; %LeafBlock513
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.11:                               ; %Flow921
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_12:                               ; %Flow919
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_18
; %bb.13:                               ; %NodeBlock511
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.14:                               ; %LeafBlock509
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.15:                               ; %Flow923
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.16:                               ; %LeafBlock507
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.17:                               ; %Flow924
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_18:                               ; %Flow922
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.19:                               ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.20:                               ; %Flow925
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.21:                               ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.22:                               ; %pawn_owner.exit.i335
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s72, s66, 1
	s_add_i32 s70, s65, -1
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s72 :: v_dual_mov_b32 v6, s70
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s71, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_34
; %bb.23:                               ;   in Loop: Header=BB3_1 Depth=1
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, s49
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s73, exec_lo, s0
	s_cbranch_execnz .LBB3_870
.LBB3_24:                               ; %Flow917
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s73, s73
	s_cbranch_execnz .LBB3_871
.LBB3_25:                               ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s73
	v_mov_b32_e32 v181, v180
	v_mov_b32_e32 v182, v180
	v_mov_b32_e32 v183, v180
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[180:181], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v180 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[180:183] offset:264
.LBB3_26:                               ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_26
; %bb.27:                               ; %copy_board.exit.i345
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s72, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s70
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lg_u32 s66, 6
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_31
; %bb.28:                               ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 2, v2
	s_cbranch_execz .LBB3_30
; %bb.29:                               ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v41
.LBB3_30:                               ; %Flow916
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_31:                               ; %create_queen.exit.i348
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v148, vcc_lo
	s_mov_b32 s0, exec_lo
	flat_load_b32 v2, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB3_33
; %bb.32:                               ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v180
.LBB3_33:                               ; %Flow915
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v18, 1
.LBB3_34:                               ; %Flow918
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s71
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_40
; %bb.35:                               ; %NodeBlock531
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.36:                               ; %LeafBlock529
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.37:                               ; %Flow909
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.38:                               ; %LeafBlock527
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.39:                               ; %Flow910
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_40:                               ; %Flow908
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_46
; %bb.41:                               ; %NodeBlock525
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.42:                               ; %LeafBlock523
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.43:                               ; %Flow912
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.44:                               ; %LeafBlock521
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.45:                               ; %Flow913
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_46:                               ; %Flow911
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.47:                               ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.48:                               ; %Flow914
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.49:                               ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.50:                               ; %pawn_owner.exit.i312
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s71, s65, 1
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s72 :: v_dual_mov_b32 v6, s71
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s73, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_62
; %bb.51:                               ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s74, exec_lo, s0
	s_cbranch_execnz .LBB3_872
.LBB3_52:                               ; %Flow906
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s74, s74
	s_cbranch_execnz .LBB3_873
.LBB3_53:                               ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s74
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_54:                               ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_54
; %bb.55:                               ; %copy_board.exit.i322
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s72, 3
	s_mov_b32 s1, s52
	s_or_b32 s0, s0, s65
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lg_u32 s66, 6
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4 offset:4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_59
; %bb.56:                               ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:4
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 2, v2
	s_cbranch_execz .LBB3_58
; %bb.57:                               ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v41 offset:4
.LBB3_58:                               ; %Flow905
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_59:                               ; %create_queen.exit.i325
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v148, vcc_lo
	s_mov_b32 s0, exec_lo
	flat_load_b32 v2, v[0:1] offset:4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB3_61
; %bb.60:                               ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v180 offset:4
.LBB3_61:                               ; %Flow904
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v18, 1
.LBB3_62:                               ; %Flow907
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s73
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_68
; %bb.63:                               ; %NodeBlock545
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.64:                               ; %LeafBlock543
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.65:                               ; %Flow898
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.66:                               ; %LeafBlock541
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.67:                               ; %Flow899
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_68:                               ; %Flow897
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_74
; %bb.69:                               ; %NodeBlock539
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.70:                               ; %LeafBlock537
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.71:                               ; %Flow901
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.72:                               ; %LeafBlock535
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.73:                               ; %Flow902
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_74:                               ; %Flow900
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.75:                               ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.76:                               ; %Flow903
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.77:                               ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.78:                               ; %pawn_owner.exit.i289
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s72, s66, -1
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s72 :: v_dual_mov_b32 v6, s70
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s73, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_102
; %bb.79:                               ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s74, exec_lo, s0
	s_cbranch_execnz .LBB3_874
.LBB3_80:                               ; %Flow895
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s74, s74
	s_cbranch_execnz .LBB3_875
.LBB3_81:                               ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s74
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_82:                               ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_82
; %bb.83:                               ; %copy_board.exit.i299
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s72, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s70
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lt_i32 s66, 8
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_85
; %bb.84:                               ; %LeafBlock551
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 8
	s_mov_b32 s3, 0
	s_cselect_b32 s2, -1, 0
	s_branch .LBB3_86
.LBB3_85:                               ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s3, -1
	s_mov_b32 s2, 0
.LBB3_86:                               ; %Flow893
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB3_88
; %bb.87:                               ; %LeafBlock549
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 1
	s_cselect_b32 s2, -1, 0
.LBB3_88:                               ; %Flow894
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB3_99
; %bb.89:                               ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 2, v3
	s_cbranch_execz .LBB3_98
; %bb.90:                               ; %NodeBlock557
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_gt_i32 s66, 7
	s_cbranch_scc0 .LBB3_92
; %bb.91:                               ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s4, 0
	s_and_b32 s3, vcc_lo, exec_lo
	s_branch .LBB3_93
.LBB3_92:                               ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, -1
	s_mov_b32 s3, 0
.LBB3_93:                               ; %Flow888
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB3_96
; %bb.94:                               ; %LeafBlock555
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 1
	s_mov_b32 s3, -1
	s_cbranch_scc0 .LBB3_96
; %bb.95:                               ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_or_not1_b32 s3, vcc_lo, exec_lo
.LBB3_96:                               ; %Flow889
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_98
; %bb.97:                               ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	flat_store_b32 v[0:1], v2
.LBB3_98:                               ; %Flow892
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_99:                               ; %create_queen.exit.i302
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v148, vcc_lo
	s_mov_b32 s0, exec_lo
	flat_load_b32 v2, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB3_101
; %bb.100:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v180
.LBB3_101:                              ; %Flow886
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v18, 1
.LBB3_102:                              ; %Flow896
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s73
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_108
; %bb.103:                              ; %NodeBlock569
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.104:                              ; %LeafBlock567
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.105:                              ; %Flow880
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.106:                              ; %LeafBlock565
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.107:                              ; %Flow881
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_108:                              ; %Flow879
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_114
; %bb.109:                              ; %NodeBlock563
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.110:                              ; %LeafBlock561
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.111:                              ; %Flow883
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.112:                              ; %LeafBlock559
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.113:                              ; %Flow884
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_114:                              ; %Flow882
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.115:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.116:                              ; %Flow885
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.117:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.118:                              ; %pawn_owner.exit.i266
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s72 :: v_dual_mov_b32 v6, s71
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s70, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_142
; %bb.119:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s71, exec_lo, s0
	s_cbranch_execnz .LBB3_876
.LBB3_120:                              ; %Flow877
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s71, s71
	s_cbranch_execnz .LBB3_877
.LBB3_121:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s71
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_122:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_122
; %bb.123:                              ; %copy_board.exit.i276
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s72, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s1, s0, 31
	s_or_b32 s0, s0, s65
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lt_i32 s66, 8
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4 offset:4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_125
; %bb.124:                              ; %LeafBlock575
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 8
	s_mov_b32 s3, 0
	s_cselect_b32 s2, -1, 0
	s_branch .LBB3_126
.LBB3_125:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s3, -1
	s_mov_b32 s2, 0
.LBB3_126:                              ; %Flow875
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB3_128
; %bb.127:                              ; %LeafBlock573
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 1
	s_cselect_b32 s2, -1, 0
.LBB3_128:                              ; %Flow876
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB3_139
; %bb.129:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:4
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 2, v3
	s_cbranch_execz .LBB3_138
; %bb.130:                              ; %NodeBlock581
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_gt_i32 s66, 7
	s_cbranch_scc0 .LBB3_132
; %bb.131:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s4, 0
	s_and_b32 s3, vcc_lo, exec_lo
	s_branch .LBB3_133
.LBB3_132:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, -1
	s_mov_b32 s3, 0
.LBB3_133:                              ; %Flow870
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB3_136
; %bb.134:                              ; %LeafBlock579
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 1
	s_mov_b32 s3, -1
	s_cbranch_scc0 .LBB3_136
; %bb.135:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_or_not1_b32 s3, vcc_lo, exec_lo
.LBB3_136:                              ; %Flow871
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_138
; %bb.137:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	flat_store_b32 v[0:1], v2 offset:4
.LBB3_138:                              ; %Flow874
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_139:                              ; %create_queen.exit.i279
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v148, vcc_lo
	s_mov_b32 s0, exec_lo
	flat_load_b32 v2, v[0:1] offset:4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB3_141
; %bb.140:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v180 offset:4
.LBB3_141:                              ; %Flow868
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v18, 1
.LBB3_142:                              ; %Flow878
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s70
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_148
; %bb.143:                              ; %NodeBlock593
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.144:                              ; %LeafBlock591
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.145:                              ; %Flow862
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.146:                              ; %LeafBlock589
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.147:                              ; %Flow863
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_148:                              ; %Flow861
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_154
; %bb.149:                              ; %NodeBlock587
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.150:                              ; %LeafBlock585
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.151:                              ; %Flow865
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.152:                              ; %LeafBlock583
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.153:                              ; %Flow866
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_154:                              ; %Flow864
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.155:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.156:                              ; %Flow867
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.157:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.158:                              ; %pawn_owner.exit.i243
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s72, s66, 2
	s_add_i32 s70, s65, -2
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s72 :: v_dual_mov_b32 v6, s70
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s71, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_172
; %bb.159:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s73, exec_lo, s0
	s_cbranch_execnz .LBB3_878
.LBB3_160:                              ; %Flow859
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s73, s73
	s_cbranch_execnz .LBB3_879
.LBB3_161:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s73
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_162:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_162
; %bb.163:                              ; %copy_board.exit.i253
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s72, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s70
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lg_u32 s66, 5
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_167
; %bb.164:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 2, v2
	s_cbranch_execz .LBB3_166
; %bb.165:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v41
.LBB3_166:                              ; %Flow858
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_167:                              ; %.lr.ph.i.i257.preheader
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s62
	v_add_co_ci_u32_e32 v1, vcc_lo, s63, v148, vcc_lo
	v_mov_b32_e32 v2, -2
.LBB3_168:                              ; %.lr.ph.i.i257
                                        ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_b32 v3, v[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v3
	s_cbranch_execz .LBB3_170
; %bb.169:                              ;   in Loop: Header=BB3_168 Depth=2
	flat_store_b32 v[0:1], v180
.LBB3_170:                              ;   in Loop: Header=BB3_168 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v0, vcc_lo, 0xffffffe4, v0
	v_add_co_u32 v2, s0, v2, 1
	v_add_co_ci_u32_e32 v1, vcc_lo, -1, v1, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_168
; %bb.171:                              ; %Flow857
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, 1
.LBB3_172:                              ; %Flow860
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s71
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_178
; %bb.173:                              ; %NodeBlock607
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.174:                              ; %LeafBlock605
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.175:                              ; %Flow851
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.176:                              ; %LeafBlock603
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.177:                              ; %Flow852
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_178:                              ; %Flow850
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_184
; %bb.179:                              ; %NodeBlock601
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.180:                              ; %LeafBlock599
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.181:                              ; %Flow854
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.182:                              ; %LeafBlock597
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.183:                              ; %Flow855
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_184:                              ; %Flow853
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.185:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.186:                              ; %Flow856
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.187:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.188:                              ; %pawn_owner.exit.i220
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s71, s65, 2
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s72 :: v_dual_mov_b32 v6, s71
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s73, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_202
; %bb.189:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s74, exec_lo, s0
	s_cbranch_execnz .LBB3_880
.LBB3_190:                              ; %Flow848
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s74, s74
	s_cbranch_execnz .LBB3_881
.LBB3_191:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s74
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_192:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_192
; %bb.193:                              ; %copy_board.exit.i230
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s72, 3
	s_mov_b32 s1, s52
	s_or_b32 s0, s0, s65
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lg_u32 s66, 5
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4 offset:8
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_197
; %bb.194:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:8
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 2, v2
	s_cbranch_execz .LBB3_196
; %bb.195:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v41 offset:8
.LBB3_196:                              ; %Flow847
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_197:                              ; %.lr.ph.i.i234.preheader
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s60
	v_add_co_ci_u32_e32 v1, vcc_lo, s61, v148, vcc_lo
	s_mov_b32 s0, 2
.LBB3_198:                              ; %.lr.ph.i.i234
                                        ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB3_200
; %bb.199:                              ;   in Loop: Header=BB3_198 Depth=2
	flat_store_b32 v[0:1], v180
.LBB3_200:                              ;   in Loop: Header=BB3_198 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v0, vcc_lo, 0xffffffdc, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, -1, v1, vcc_lo
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s0, 0
	s_cbranch_scc1 .LBB3_198
; %bb.201:                              ; %Flow846
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, 1
.LBB3_202:                              ; %Flow849
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s73
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_208
; %bb.203:                              ; %NodeBlock621
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.204:                              ; %LeafBlock619
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.205:                              ; %Flow840
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.206:                              ; %LeafBlock617
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.207:                              ; %Flow841
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_208:                              ; %Flow839
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_214
; %bb.209:                              ; %NodeBlock615
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.210:                              ; %LeafBlock613
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.211:                              ; %Flow843
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.212:                              ; %LeafBlock611
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.213:                              ; %Flow844
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_214:                              ; %Flow842
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.215:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.216:                              ; %Flow845
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.217:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.218:                              ; %pawn_owner.exit.i197
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s72, s66, -2
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s72 :: v_dual_mov_b32 v6, s70
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s73, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_244
; %bb.219:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s74, exec_lo, s0
	s_cbranch_execnz .LBB3_882
.LBB3_220:                              ; %Flow837
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s74, s74
	s_cbranch_execnz .LBB3_883
.LBB3_221:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s74
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_222:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_222
; %bb.223:                              ; %copy_board.exit.i207
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s72, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s70
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lt_i32 s66, 9
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_225
; %bb.224:                              ; %LeafBlock627
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 9
	s_mov_b32 s1, 0
	s_cselect_b32 s0, -1, 0
	s_branch .LBB3_226
.LBB3_225:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s1, -1
	s_mov_b32 s0, 0
.LBB3_226:                              ; %Flow835
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_228
; %bb.227:                              ; %LeafBlock625
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 2
	s_cselect_b32 s0, -1, 0
.LBB3_228:                              ; %Flow836
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_239
; %bb.229:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 2, v3
	s_cbranch_execz .LBB3_238
; %bb.230:                              ; %NodeBlock633
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_gt_i32 s66, 8
	s_cbranch_scc0 .LBB3_232
; %bb.231:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s2, 0
	s_and_b32 s1, vcc_lo, exec_lo
	s_branch .LBB3_233
.LBB3_232:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s2, -1
	s_mov_b32 s1, 0
.LBB3_233:                              ; %Flow830
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB3_236
; %bb.234:                              ; %LeafBlock631
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 2
	s_mov_b32 s1, -1
	s_cbranch_scc0 .LBB3_236
; %bb.235:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_or_not1_b32 s1, vcc_lo, exec_lo
.LBB3_236:                              ; %Flow831
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB3_238
; %bb.237:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	flat_store_b32 v[0:1], v2
.LBB3_238:                              ; %Flow834
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_239:                              ; %.lr.ph.i.i211.preheader
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s58
	v_add_co_ci_u32_e32 v1, vcc_lo, s59, v148, vcc_lo
	v_mov_b32_e32 v2, -2
.LBB3_240:                              ; %.lr.ph.i.i211
                                        ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_b32 v3, v[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v3
	s_cbranch_execz .LBB3_242
; %bb.241:                              ;   in Loop: Header=BB3_240 Depth=2
	flat_store_b32 v[0:1], v180
.LBB3_242:                              ;   in Loop: Header=BB3_240 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v0, vcc_lo, v0, 36
	v_add_co_u32 v2, s0, v2, 1
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_240
; %bb.243:                              ; %Flow828
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, 1
.LBB3_244:                              ; %Flow838
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s73
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_250
; %bb.245:                              ; %NodeBlock645
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.246:                              ; %LeafBlock643
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.247:                              ; %Flow822
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.248:                              ; %LeafBlock641
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.249:                              ; %Flow823
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_250:                              ; %Flow821
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_256
; %bb.251:                              ; %NodeBlock639
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.252:                              ; %LeafBlock637
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.253:                              ; %Flow825
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.254:                              ; %LeafBlock635
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.255:                              ; %Flow826
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_256:                              ; %Flow824
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.257:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.258:                              ; %Flow827
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.259:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.260:                              ; %pawn_owner.exit.i174
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s72 :: v_dual_mov_b32 v6, s71
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s70, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_286
; %bb.261:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s71, exec_lo, s0
	s_cbranch_execnz .LBB3_884
.LBB3_262:                              ; %Flow819
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s71, s71
	s_cbranch_execnz .LBB3_885
.LBB3_263:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s71
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[0:1], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v2, v[0:1] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v2, 1, v2
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v2 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_264:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v2, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v2, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[2:3], v4
	s_cbranch_scc1 .LBB3_264
; %bb.265:                              ; %copy_board.exit.i184
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:256
	s_lshl_b32 s0, s72, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s1, s0, 31
	s_or_b32 s0, s0, s65
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lt_i32 s66, 9
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v4, 1, v2
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	flat_store_b32 v[0:1], v4 offset:256
	v_add_co_u32 v0, vcc_lo, v144, s0
	flat_load_b32 v4, v[2:3]
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4 offset:8
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_267
; %bb.266:                              ; %LeafBlock651
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 9
	s_mov_b32 s1, 0
	s_cselect_b32 s0, -1, 0
	s_branch .LBB3_268
.LBB3_267:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s1, -1
	s_mov_b32 s0, 0
.LBB3_268:                              ; %Flow817
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_270
; %bb.269:                              ; %LeafBlock649
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 2
	s_cselect_b32 s0, -1, 0
.LBB3_270:                              ; %Flow818
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_281
; %bb.271:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:8
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 2, v3
	s_cbranch_execz .LBB3_280
; %bb.272:                              ; %NodeBlock657
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_gt_i32 s66, 8
	s_cbranch_scc0 .LBB3_274
; %bb.273:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s2, 0
	s_and_b32 s1, vcc_lo, exec_lo
	s_branch .LBB3_275
.LBB3_274:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s2, -1
	s_mov_b32 s1, 0
.LBB3_275:                              ; %Flow812
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB3_278
; %bb.276:                              ; %LeafBlock655
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 2
	s_mov_b32 s1, -1
	s_cbranch_scc0 .LBB3_278
; %bb.277:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_or_not1_b32 s1, vcc_lo, exec_lo
.LBB3_278:                              ; %Flow813
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB3_280
; %bb.279:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	flat_store_b32 v[0:1], v2 offset:8
.LBB3_280:                              ; %Flow816
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_281:                              ; %.lr.ph.i.i188.preheader
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s54
	v_add_co_ci_u32_e32 v1, vcc_lo, s55, v148, vcc_lo
	s_mov_b32 s0, 2
.LBB3_282:                              ; %.lr.ph.i.i188
                                        ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB3_284
; %bb.283:                              ;   in Loop: Header=BB3_282 Depth=2
	flat_store_b32 v[0:1], v180
.LBB3_284:                              ;   in Loop: Header=BB3_282 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v0, vcc_lo, v0, 28
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 0
	s_cbranch_scc0 .LBB3_282
; %bb.285:                              ; %Flow
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, 1
.LBB3_286:                              ; %Flow820
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s70
.LBB3_287:                              ; %Flow926
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s69
.LBB3_288:                              ; %Flow927
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s68
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr16_vgpr17
.LBB3_289:                              ; %Flow1046
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s67, s67
	s_cbranch_execz .LBB3_575
; %bb.290:                              ; %LeafBlock251
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s68, exec_lo
	v_cmpx_eq_u32_e32 11, v0
	s_cbranch_execz .LBB3_574
; %bb.291:                              ;   in Loop: Header=BB3_1 Depth=1
	s_and_saveexec_b32 s69, s45
	s_cbranch_execz .LBB3_573
; %bb.292:                              ; %NodeBlock671
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_298
; %bb.293:                              ; %NodeBlock669
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.294:                              ; %LeafBlock667
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.295:                              ; %Flow1038
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.296:                              ; %LeafBlock665
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.297:                              ; %Flow1039
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_298:                              ; %Flow1037
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_304
; %bb.299:                              ; %NodeBlock663
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.300:                              ; %LeafBlock661
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.301:                              ; %Flow1041
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.302:                              ; %LeafBlock659
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.303:                              ; %Flow1042
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_304:                              ; %Flow1040
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.305:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.306:                              ; %Flow1043
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.307:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.308:                              ; %pawn_owner.exit.i151
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s72, s66, 1
	s_add_i32 s70, s65, -1
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s72 :: v_dual_mov_b32 v6, s70
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s71, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_320
; %bb.309:                              ;   in Loop: Header=BB3_1 Depth=1
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, s49
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s73, exec_lo, s0
	s_cbranch_execnz .LBB3_886
.LBB3_310:                              ; %Flow1035
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s73, s73
	s_cbranch_execnz .LBB3_887
.LBB3_311:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s73
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_312:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_312
; %bb.313:                              ; %copy_board.exit.i161
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s72, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s70
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lg_u32 s66, 6
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_317
; %bb.314:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 2, v2
	s_cbranch_execz .LBB3_316
; %bb.315:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v41
.LBB3_316:                              ; %Flow1034
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_317:                              ; %create_queen.exit.i164
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v148, vcc_lo
	s_mov_b32 s0, exec_lo
	flat_load_b32 v2, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB3_319
; %bb.318:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v180
.LBB3_319:                              ; %Flow1033
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v18, 1
.LBB3_320:                              ; %Flow1036
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s71
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_326
; %bb.321:                              ; %NodeBlock683
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.322:                              ; %LeafBlock681
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.323:                              ; %Flow1027
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.324:                              ; %LeafBlock679
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.325:                              ; %Flow1028
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_326:                              ; %Flow1026
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_332
; %bb.327:                              ; %NodeBlock677
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.328:                              ; %LeafBlock675
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.329:                              ; %Flow1030
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.330:                              ; %LeafBlock673
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.331:                              ; %Flow1031
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_332:                              ; %Flow1029
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.333:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.334:                              ; %Flow1032
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.335:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.336:                              ; %pawn_owner.exit.i128
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s71, s65, 1
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s72 :: v_dual_mov_b32 v6, s71
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s73, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_348
; %bb.337:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s74, exec_lo, s0
	s_cbranch_execnz .LBB3_888
.LBB3_338:                              ; %Flow1024
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s74, s74
	s_cbranch_execnz .LBB3_889
.LBB3_339:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s74
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_340:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_340
; %bb.341:                              ; %copy_board.exit.i138
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s72, 3
	s_mov_b32 s1, s52
	s_or_b32 s0, s0, s65
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lg_u32 s66, 6
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4 offset:4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_345
; %bb.342:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:4
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 2, v2
	s_cbranch_execz .LBB3_344
; %bb.343:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v41 offset:4
.LBB3_344:                              ; %Flow1023
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_345:                              ; %create_queen.exit.i141
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v148, vcc_lo
	s_mov_b32 s0, exec_lo
	flat_load_b32 v2, v[0:1] offset:4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB3_347
; %bb.346:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v180 offset:4
.LBB3_347:                              ; %Flow1022
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v18, 1
.LBB3_348:                              ; %Flow1025
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s73
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_354
; %bb.349:                              ; %NodeBlock697
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.350:                              ; %LeafBlock695
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.351:                              ; %Flow1016
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.352:                              ; %LeafBlock693
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.353:                              ; %Flow1017
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_354:                              ; %Flow1015
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_360
; %bb.355:                              ; %NodeBlock691
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.356:                              ; %LeafBlock689
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.357:                              ; %Flow1019
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.358:                              ; %LeafBlock687
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.359:                              ; %Flow1020
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_360:                              ; %Flow1018
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.361:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.362:                              ; %Flow1021
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.363:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.364:                              ; %pawn_owner.exit.i105
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s72, s66, -1
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s72 :: v_dual_mov_b32 v6, s70
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s73, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_388
; %bb.365:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s74, exec_lo, s0
	s_cbranch_execnz .LBB3_890
.LBB3_366:                              ; %Flow1013
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s74, s74
	s_cbranch_execnz .LBB3_891
.LBB3_367:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s74
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_368:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_368
; %bb.369:                              ; %copy_board.exit.i115
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s72, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s70
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lt_i32 s66, 8
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_371
; %bb.370:                              ; %LeafBlock703
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 8
	s_mov_b32 s3, 0
	s_cselect_b32 s2, -1, 0
	s_branch .LBB3_372
.LBB3_371:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s3, -1
	s_mov_b32 s2, 0
.LBB3_372:                              ; %Flow1011
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB3_374
; %bb.373:                              ; %LeafBlock701
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 1
	s_cselect_b32 s2, -1, 0
.LBB3_374:                              ; %Flow1012
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB3_385
; %bb.375:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 2, v3
	s_cbranch_execz .LBB3_384
; %bb.376:                              ; %NodeBlock709
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_gt_i32 s66, 7
	s_cbranch_scc0 .LBB3_378
; %bb.377:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s4, 0
	s_and_b32 s3, vcc_lo, exec_lo
	s_branch .LBB3_379
.LBB3_378:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, -1
	s_mov_b32 s3, 0
.LBB3_379:                              ; %Flow1006
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB3_382
; %bb.380:                              ; %LeafBlock707
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 1
	s_mov_b32 s3, -1
	s_cbranch_scc0 .LBB3_382
; %bb.381:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_or_not1_b32 s3, vcc_lo, exec_lo
.LBB3_382:                              ; %Flow1007
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_384
; %bb.383:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	flat_store_b32 v[0:1], v2
.LBB3_384:                              ; %Flow1010
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_385:                              ; %create_queen.exit.i118
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v148, vcc_lo
	s_mov_b32 s0, exec_lo
	flat_load_b32 v2, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB3_387
; %bb.386:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v180
.LBB3_387:                              ; %Flow1004
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v18, 1
.LBB3_388:                              ; %Flow1014
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s73
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_394
; %bb.389:                              ; %NodeBlock721
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.390:                              ; %LeafBlock719
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.391:                              ; %Flow998
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.392:                              ; %LeafBlock717
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.393:                              ; %Flow999
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_394:                              ; %Flow997
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_400
; %bb.395:                              ; %NodeBlock715
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.396:                              ; %LeafBlock713
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.397:                              ; %Flow1001
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.398:                              ; %LeafBlock711
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.399:                              ; %Flow1002
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_400:                              ; %Flow1000
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.401:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.402:                              ; %Flow1003
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.403:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.404:                              ; %pawn_owner.exit.i82
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s72 :: v_dual_mov_b32 v6, s71
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s70, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_428
; %bb.405:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s71, exec_lo, s0
	s_cbranch_execnz .LBB3_892
.LBB3_406:                              ; %Flow995
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s71, s71
	s_cbranch_execnz .LBB3_893
.LBB3_407:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s71
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_408:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_408
; %bb.409:                              ; %copy_board.exit.i92
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s72, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s1, s0, 31
	s_or_b32 s0, s0, s65
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lt_i32 s66, 8
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4 offset:4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_411
; %bb.410:                              ; %LeafBlock727
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 8
	s_mov_b32 s3, 0
	s_cselect_b32 s2, -1, 0
	s_branch .LBB3_412
.LBB3_411:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s3, -1
	s_mov_b32 s2, 0
.LBB3_412:                              ; %Flow993
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB3_414
; %bb.413:                              ; %LeafBlock725
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 1
	s_cselect_b32 s2, -1, 0
.LBB3_414:                              ; %Flow994
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB3_425
; %bb.415:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:4
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 2, v3
	s_cbranch_execz .LBB3_424
; %bb.416:                              ; %NodeBlock733
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_gt_i32 s66, 7
	s_cbranch_scc0 .LBB3_418
; %bb.417:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s4, 0
	s_and_b32 s3, vcc_lo, exec_lo
	s_branch .LBB3_419
.LBB3_418:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, -1
	s_mov_b32 s3, 0
.LBB3_419:                              ; %Flow988
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB3_422
; %bb.420:                              ; %LeafBlock731
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 1
	s_mov_b32 s3, -1
	s_cbranch_scc0 .LBB3_422
; %bb.421:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_or_not1_b32 s3, vcc_lo, exec_lo
.LBB3_422:                              ; %Flow989
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_424
; %bb.423:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	flat_store_b32 v[0:1], v2 offset:4
.LBB3_424:                              ; %Flow992
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_425:                              ; %create_queen.exit.i95
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v148, vcc_lo
	s_mov_b32 s0, exec_lo
	flat_load_b32 v2, v[0:1] offset:4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB3_427
; %bb.426:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v180 offset:4
.LBB3_427:                              ; %Flow986
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v18, 1
.LBB3_428:                              ; %Flow996
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s70
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_434
; %bb.429:                              ; %NodeBlock745
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.430:                              ; %LeafBlock743
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.431:                              ; %Flow980
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.432:                              ; %LeafBlock741
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.433:                              ; %Flow981
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_434:                              ; %Flow979
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_440
; %bb.435:                              ; %NodeBlock739
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.436:                              ; %LeafBlock737
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.437:                              ; %Flow983
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.438:                              ; %LeafBlock735
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.439:                              ; %Flow984
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_440:                              ; %Flow982
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.441:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.442:                              ; %Flow985
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.443:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.444:                              ; %pawn_owner.exit.i59
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s71, s66, 2
	s_add_i32 s70, s65, -2
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s71 :: v_dual_mov_b32 v6, s70
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s72, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_458
; %bb.445:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s73, exec_lo, s0
	s_cbranch_execnz .LBB3_894
.LBB3_446:                              ; %Flow977
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s73, s73
	s_cbranch_execnz .LBB3_895
.LBB3_447:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s73
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_448:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_448
; %bb.449:                              ; %copy_board.exit.i69
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s71, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s70
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lg_u32 s66, 5
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_453
; %bb.450:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 2, v2
	s_cbranch_execz .LBB3_452
; %bb.451:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v41
.LBB3_452:                              ; %Flow976
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_453:                              ; %.lr.ph.i.i73.preheader
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s62
	v_add_co_ci_u32_e32 v1, vcc_lo, s63, v148, vcc_lo
	v_mov_b32_e32 v2, -2
.LBB3_454:                              ; %.lr.ph.i.i73
                                        ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_b32 v3, v[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v3
	s_cbranch_execz .LBB3_456
; %bb.455:                              ;   in Loop: Header=BB3_454 Depth=2
	flat_store_b32 v[0:1], v180
.LBB3_456:                              ;   in Loop: Header=BB3_454 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v0, vcc_lo, 0xffffffe4, v0
	v_add_co_u32 v2, s0, v2, 1
	v_add_co_ci_u32_e32 v1, vcc_lo, -1, v1, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_454
; %bb.457:                              ; %Flow975
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, 1
.LBB3_458:                              ; %Flow978
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s72
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_464
; %bb.459:                              ; %NodeBlock759
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.460:                              ; %LeafBlock757
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.461:                              ; %Flow969
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.462:                              ; %LeafBlock755
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.463:                              ; %Flow970
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_464:                              ; %Flow968
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_470
; %bb.465:                              ; %NodeBlock753
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.466:                              ; %LeafBlock751
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.467:                              ; %Flow972
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.468:                              ; %LeafBlock749
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.469:                              ; %Flow973
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_470:                              ; %Flow971
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.471:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.472:                              ; %Flow974
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.473:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.474:                              ; %pawn_owner.exit.i36
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s62, s65, 2
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s71 :: v_dual_mov_b32 v6, s62
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s63, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_488
; %bb.475:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s72, exec_lo, s0
	s_cbranch_execnz .LBB3_896
.LBB3_476:                              ; %Flow966
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s72, s72
	s_cbranch_execnz .LBB3_897
.LBB3_477:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s72
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_478:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_478
; %bb.479:                              ; %copy_board.exit.i46
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s71, 3
	s_mov_b32 s1, s52
	s_or_b32 s0, s0, s65
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lg_u32 s66, 5
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4 offset:8
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_483
; %bb.480:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:8
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 2, v2
	s_cbranch_execz .LBB3_482
; %bb.481:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v41 offset:8
.LBB3_482:                              ; %Flow965
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_483:                              ; %.lr.ph.i.i50.preheader
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s60
	v_add_co_ci_u32_e32 v1, vcc_lo, s61, v148, vcc_lo
	s_mov_b32 s0, 2
.LBB3_484:                              ; %.lr.ph.i.i50
                                        ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB3_486
; %bb.485:                              ;   in Loop: Header=BB3_484 Depth=2
	flat_store_b32 v[0:1], v180
.LBB3_486:                              ;   in Loop: Header=BB3_484 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v0, vcc_lo, 0xffffffdc, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, -1, v1, vcc_lo
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s0, 0
	s_cbranch_scc1 .LBB3_484
; %bb.487:                              ; %Flow964
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, 1
.LBB3_488:                              ; %Flow967
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s63
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_494
; %bb.489:                              ; %NodeBlock773
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.490:                              ; %LeafBlock771
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.491:                              ; %Flow958
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.492:                              ; %LeafBlock769
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.493:                              ; %Flow959
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_494:                              ; %Flow957
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_500
; %bb.495:                              ; %NodeBlock767
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.496:                              ; %LeafBlock765
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.497:                              ; %Flow961
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.498:                              ; %LeafBlock763
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.499:                              ; %Flow962
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_500:                              ; %Flow960
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.501:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.502:                              ; %Flow963
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.503:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.504:                              ; %pawn_owner.exit.i13
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s60, s66, -2
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s60 :: v_dual_mov_b32 v6, s70
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s61, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_530
; %bb.505:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s63, exec_lo, s0
	s_cbranch_execnz .LBB3_898
.LBB3_506:                              ; %Flow955
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s63, s63
	s_cbranch_execnz .LBB3_899
.LBB3_507:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s63
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_508:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_508
; %bb.509:                              ; %copy_board.exit.i23
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s60, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s70
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lt_i32 s66, 9
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_511
; %bb.510:                              ; %LeafBlock779
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 9
	s_mov_b32 s1, 0
	s_cselect_b32 s0, -1, 0
	s_branch .LBB3_512
.LBB3_511:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s1, -1
	s_mov_b32 s0, 0
.LBB3_512:                              ; %Flow953
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_514
; %bb.513:                              ; %LeafBlock777
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 2
	s_cselect_b32 s0, -1, 0
.LBB3_514:                              ; %Flow954
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_525
; %bb.515:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 2, v3
	s_cbranch_execz .LBB3_524
; %bb.516:                              ; %NodeBlock785
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_gt_i32 s66, 8
	s_cbranch_scc0 .LBB3_518
; %bb.517:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s2, 0
	s_and_b32 s1, vcc_lo, exec_lo
	s_branch .LBB3_519
.LBB3_518:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s2, -1
	s_mov_b32 s1, 0
.LBB3_519:                              ; %Flow948
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB3_522
; %bb.520:                              ; %LeafBlock783
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 2
	s_mov_b32 s1, -1
	s_cbranch_scc0 .LBB3_522
; %bb.521:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_or_not1_b32 s1, vcc_lo, exec_lo
.LBB3_522:                              ; %Flow949
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB3_524
; %bb.523:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	flat_store_b32 v[0:1], v2
.LBB3_524:                              ; %Flow952
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_525:                              ; %.lr.ph.i.i27.preheader
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s58
	v_add_co_ci_u32_e32 v1, vcc_lo, s59, v148, vcc_lo
	v_mov_b32_e32 v2, -2
.LBB3_526:                              ; %.lr.ph.i.i27
                                        ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_b32 v3, v[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v3
	s_cbranch_execz .LBB3_528
; %bb.527:                              ;   in Loop: Header=BB3_526 Depth=2
	flat_store_b32 v[0:1], v180
.LBB3_528:                              ;   in Loop: Header=BB3_526 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v0, vcc_lo, v0, 36
	v_add_co_u32 v2, s0, v2, 1
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_526
; %bb.529:                              ; %Flow946
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, 1
.LBB3_530:                              ; %Flow956
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s61
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v148, v17, v145 :: v_dual_cndmask_b32 v149, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v149, s56
	v_add_co_ci_u32_e32 v1, vcc_lo, s57, v148, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_536
; %bb.531:                              ; %NodeBlock797
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.532:                              ; %LeafBlock795
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.533:                              ; %Flow940
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.534:                              ; %LeafBlock793
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.535:                              ; %Flow941
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_536:                              ; %Flow939
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_542
; %bb.537:                              ; %NodeBlock791
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.538:                              ; %LeafBlock789
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.539:                              ; %Flow943
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.540:                              ; %LeafBlock787
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.541:                              ; %Flow944
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_542:                              ; %Flow942
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.543:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.544:                              ; %Flow945
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.545:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.546:                              ; %pawn_owner.exit.i
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v0, v149 :: v_dual_mov_b32 v1, v148
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s60 :: v_dual_mov_b32 v6, s62
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s58, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_572
; %bb.547:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s59, exec_lo, s0
	s_cbranch_execnz .LBB3_900
.LBB3_548:                              ; %Flow937
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s59, s59
	s_cbranch_execnz .LBB3_901
.LBB3_549:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s59
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[0:1], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v2, v[0:1] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v2, 1, v2
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v2 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_550:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v2, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v2, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[2:3], v4
	s_cbranch_scc1 .LBB3_550
; %bb.551:                              ; %copy_board.exit.i
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:256
	s_lshl_b32 s0, s60, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s1, s0, 31
	s_or_b32 s0, s0, s65
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lt_i32 s66, 9
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v4, 1, v2
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	flat_store_b32 v[0:1], v4 offset:256
	v_add_co_u32 v0, vcc_lo, v144, s0
	flat_load_b32 v4, v[2:3]
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4 offset:8
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_553
; %bb.552:                              ; %LeafBlock803
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 9
	s_mov_b32 s1, 0
	s_cselect_b32 s0, -1, 0
	s_branch .LBB3_554
.LBB3_553:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s1, -1
	s_mov_b32 s0, 0
.LBB3_554:                              ; %Flow935
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_556
; %bb.555:                              ; %LeafBlock801
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 2
	s_cselect_b32 s0, -1, 0
.LBB3_556:                              ; %Flow936
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_567
; %bb.557:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:8
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 2, v3
	s_cbranch_execz .LBB3_566
; %bb.558:                              ; %NodeBlock809
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_gt_i32 s66, 8
	s_cbranch_scc0 .LBB3_560
; %bb.559:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s2, 0
	s_and_b32 s1, vcc_lo, exec_lo
	s_branch .LBB3_561
.LBB3_560:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s2, -1
	s_mov_b32 s1, 0
.LBB3_561:                              ; %Flow930
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB3_564
; %bb.562:                              ; %LeafBlock807
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 2
	s_mov_b32 s1, -1
	s_cbranch_scc0 .LBB3_564
; %bb.563:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_or_not1_b32 s1, vcc_lo, exec_lo
.LBB3_564:                              ; %Flow931
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB3_566
; %bb.565:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	flat_store_b32 v[0:1], v2 offset:8
.LBB3_566:                              ; %Flow934
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_567:                              ; %.lr.ph.i.i.preheader
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_add_co_u32 v0, vcc_lo, v149, s54
	v_add_co_ci_u32_e32 v1, vcc_lo, s55, v148, vcc_lo
	s_mov_b32 s0, 2
.LBB3_568:                              ; %.lr.ph.i.i
                                        ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB3_570
; %bb.569:                              ;   in Loop: Header=BB3_568 Depth=2
	flat_store_b32 v[0:1], v180
.LBB3_570:                              ;   in Loop: Header=BB3_568 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v0, vcc_lo, v0, 28
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 0
	s_cbranch_scc0 .LBB3_568
; %bb.571:                              ; %Flow928
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, 1
.LBB3_572:                              ; %Flow938
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s58
.LBB3_573:                              ; %Flow1044
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s69
.LBB3_574:                              ; %Flow1045
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s68
.LBB3_575:                              ; %Flow1047
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s67
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr16_vgpr17
.LBB3_576:                              ; %Flow1258
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s58, s53
	s_cbranch_execz .LBB3_868
; %bb.577:                              ; %NodeBlock
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s59, exec_lo, s0
	s_cbranch_execz .LBB3_689
; %bb.578:                              ; %LeafBlock249
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s60, exec_lo
	v_cmpx_eq_u32_e32 2, v0
	s_cbranch_execz .LBB3_688
; %bb.579:                              ;   in Loop: Header=BB3_1 Depth=1
	s_and_saveexec_b32 s61, s48
	s_cbranch_execz .LBB3_687
; %bb.580:                              ; %NodeBlock415
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v1, v17, v145 :: v_dual_cndmask_b32 v0, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v1, vcc_lo
	flat_load_b32 v2, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v2
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_586
; %bb.581:                              ; %NodeBlock413
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v2
	s_xor_b32 s4, exec_lo, s4
; %bb.582:                              ; %LeafBlock411
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v2
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.583:                              ; %Flow1126
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.584:                              ; %LeafBlock409
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v2
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.585:                              ; %Flow1127
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr2
.LBB3_586:                              ; %Flow1125
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_592
; %bb.587:                              ; %NodeBlock407
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v2
	s_xor_b32 s0, exec_lo, s0
; %bb.588:                              ; %LeafBlock405
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.589:                              ; %Flow1129
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.590:                              ; %LeafBlock403
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cmp_ne_u32_e64 s0, 1, v2
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.591:                              ; %Flow1130
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_592:                              ; %Flow1128
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.593:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.594:                              ; %Flow1131
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.595:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.596:                              ; %pawn_owner.exit.i182.i
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s53, s66, 1
	s_add_i32 s55, s65, -1
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s53 :: v_dual_mov_b32 v6, s55
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s54, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_606
; %bb.597:                              ;   in Loop: Header=BB3_1 Depth=1
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, s49
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s62, exec_lo, s0
	s_cbranch_execnz .LBB3_902
.LBB3_598:                              ; %Flow1123
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s62, s62
	s_cbranch_execnz .LBB3_903
.LBB3_599:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s62
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_600:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_600
; %bb.601:                              ; %copy_board.exit.i192.i
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s53, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s55
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lg_u32 s66, 6
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_605
; %bb.602:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 2, v2
	s_cbranch_execz .LBB3_604
; %bb.603:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v41
.LBB3_604:                              ; %Flow1121
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_605:                              ; %Flow1122
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, 1
.LBB3_606:                              ; %Flow1124
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s54
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v1, v17, v145 :: v_dual_cndmask_b32 v0, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v1, vcc_lo
	flat_load_b32 v2, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v2
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_612
; %bb.607:                              ; %NodeBlock427
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v2
	s_xor_b32 s4, exec_lo, s4
; %bb.608:                              ; %LeafBlock425
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v2
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.609:                              ; %Flow1115
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.610:                              ; %LeafBlock423
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v2
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.611:                              ; %Flow1116
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr2
.LBB3_612:                              ; %Flow1114
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_618
; %bb.613:                              ; %NodeBlock421
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v2
	s_xor_b32 s0, exec_lo, s0
; %bb.614:                              ; %LeafBlock419
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.615:                              ; %Flow1118
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.616:                              ; %LeafBlock417
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cmp_ne_u32_e64 s0, 1, v2
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.617:                              ; %Flow1119
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_618:                              ; %Flow1117
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.619:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.620:                              ; %Flow1120
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.621:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.622:                              ; %pawn_owner.exit.i200.i
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s2, s65, 1
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s53 :: v_dual_mov_b32 v6, s2
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s54, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_632
; %bb.623:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s55, exec_lo, s0
	s_cbranch_execnz .LBB3_904
.LBB3_624:                              ; %Flow1112
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s55, s55
	s_cbranch_execnz .LBB3_905
.LBB3_625:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s55
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_626:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_626
; %bb.627:                              ; %copy_board.exit.i210.i
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s53, 3
	s_mov_b32 s1, s52
	s_or_b32 s0, s0, s65
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lg_u32 s66, 6
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4 offset:4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_631
; %bb.628:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:4
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 2, v2
	s_cbranch_execz .LBB3_630
; %bb.629:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_store_b32 v[0:1], v41 offset:4
.LBB3_630:                              ; %Flow1110
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_631:                              ; %Flow1111
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, 1
.LBB3_632:                              ; %Flow1113
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s54
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v1, v17, v145 :: v_dual_cndmask_b32 v0, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v1, vcc_lo
	flat_load_b32 v2, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v2
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_638
; %bb.633:                              ; %NodeBlock441
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v2
	s_xor_b32 s4, exec_lo, s4
; %bb.634:                              ; %LeafBlock439
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v2
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.635:                              ; %Flow1104
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.636:                              ; %LeafBlock437
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v2
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.637:                              ; %Flow1105
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr2
.LBB3_638:                              ; %Flow1103
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_644
; %bb.639:                              ; %NodeBlock435
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v2
	s_xor_b32 s0, exec_lo, s0
; %bb.640:                              ; %LeafBlock433
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.641:                              ; %Flow1107
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.642:                              ; %LeafBlock431
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cmp_ne_u32_e64 s0, 1, v2
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.643:                              ; %Flow1108
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_644:                              ; %Flow1106
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.645:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.646:                              ; %Flow1109
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.647:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.648:                              ; %pawn_owner.exit.i380
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s62, s66, 2
	s_add_i32 s53, s65, -2
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s62 :: v_dual_mov_b32 v6, s53
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s63, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_659
; %bb.649:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s54, exec_lo, s0
	s_cbranch_execnz .LBB3_906
.LBB3_650:                              ; %Flow1101
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s54, s54
	s_cbranch_execnz .LBB3_907
.LBB3_651:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s54
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[0:1], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v2, v[0:1] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v2, 1, v2
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v2 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_652:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v2, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v2, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[2:3], v4
	s_cbranch_scc1 .LBB3_652
; %bb.653:                              ; %copy_board.exit.i390
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:256
	s_add_i32 s2, s53, s65
	s_lshl_b32 s0, s62, 3
	s_add_i32 s1, s62, s66
	s_lshr_b32 s3, s2, 31
	s_add_i32 s0, s0, s53
	s_lshl_b32 s1, s1, 2
	s_add_i32 s2, s2, s3
	s_and_b32 s3, s1, 0x78
	s_ashr_i32 s2, s2, 1
	s_ashr_i32 s1, s0, 31
	s_add_i32 s2, s3, s2
	s_lshl_b64 s[0:1], s[0:1], 2
	s_ashr_i32 s3, s2, 31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v4, 1, v2
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	flat_store_b32 v[0:1], v4 offset:256
	v_add_co_u32 v0, vcc_lo, v144, s0
	flat_load_b32 v6, v[2:3]
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_lshl_b64 s[0:1], s[2:3], 2
	s_cmp_eq_u32 s66, 5
	v_add_co_u32 v4, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v145, vcc_lo
	s_cselect_b32 s0, -1, 0
                                        ; implicit-def: $sgpr1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x2
	flat_store_b32 v[0:1], v6
	flat_store_b32 v[2:3], v180
	flat_store_b32 v[4:5], v180
	flat_load_b32 v2, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 2, v3
	s_and_b32 s3, s0, vcc_lo
	s_mov_b32 s0, -1
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB3_657
; %bb.654:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr1
	v_cmpx_ne_u32_e32 1, v2
	s_cbranch_execz .LBB3_656
; %bb.655:                              ; %.critedge117.i417
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s1, 1
	flat_store_b32 v[0:1], v41
.LBB3_656:                              ; %Flow1099
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v2, 1
	s_or_not1_b32 s0, vcc_lo, exec_lo
.LBB3_657:                              ; %Flow1098
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v18, s1
	s_and_saveexec_b32 s67, s0
	s_cbranch_execnz .LBB3_908
.LBB3_658:                              ; %Flow1100
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s67
.LBB3_659:                              ; %Flow1102
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s63
	flat_load_b64 v[0:1], v[144:145] offset:288
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v145 :: v_dual_cndmask_b32 v0, v0, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v1, vcc_lo
	flat_load_b32 v2, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v2
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_665
; %bb.660:                              ; %NodeBlock479
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v2
	s_xor_b32 s4, exec_lo, s4
; %bb.661:                              ; %LeafBlock477
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v2
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.662:                              ; %Flow1072
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.663:                              ; %LeafBlock475
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v2
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.664:                              ; %Flow1073
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr2
.LBB3_665:                              ; %Flow1071
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_671
; %bb.666:                              ; %NodeBlock473
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v2
	s_xor_b32 s0, exec_lo, s0
; %bb.667:                              ; %LeafBlock471
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.668:                              ; %Flow1075
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.669:                              ; %LeafBlock469
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cmp_ne_u32_e64 s0, 1, v2
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.670:                              ; %Flow1076
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_671:                              ; %Flow1074
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.672:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.673:                              ; %Flow1077
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.674:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.675:                              ; %pawn_owner.exit.i358
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s53, s65, 2
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s62 :: v_dual_mov_b32 v6, s53
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s63, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_686
; %bb.676:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s54, exec_lo, s0
	s_cbranch_execnz .LBB3_949
.LBB3_677:                              ; %Flow1069
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s54, s54
	s_cbranch_execnz .LBB3_950
.LBB3_678:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s54
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[0:1], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v2, v[0:1] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v2, 1, v2
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v2 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_679:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v2, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v2, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[2:3], v4
	s_cbranch_scc1 .LBB3_679
; %bb.680:                              ; %copy_board.exit.i368
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:256
	s_add_i32 s2, s62, s66
	s_lshl_b32 s0, s62, 3
	s_add_i32 s3, s53, s65
	s_lshl_b32 s2, s2, 2
	s_mov_b32 s1, s52
	s_or_b32 s0, s0, s65
	s_lshr_b32 s3, s3, 1
	s_and_b32 s2, s2, 0x78
	s_lshl_b64 s[0:1], s[0:1], 2
	s_add_i32 s2, s2, s3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v4, 1, v2
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	flat_store_b32 v[0:1], v4 offset:256
	v_add_co_u32 v0, vcc_lo, v144, s0
	flat_load_b32 v6, v[2:3]
	s_lshl_b32 s0, s2, 2
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	v_add_co_u32 v4, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v145, vcc_lo
	s_cmp_eq_u32 s66, 5
                                        ; implicit-def: $sgpr1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x2
	flat_store_b32 v[0:1], v6 offset:8
	flat_store_b32 v[2:3], v180
	flat_store_b32 v[4:5], v180
	flat_load_b32 v2, v[0:1] offset:8
	s_cselect_b32 s0, -1, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 2, v3
	s_and_b32 s3, s0, vcc_lo
	s_mov_b32 s0, -1
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB3_684
; %bb.681:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr1
	v_cmpx_ne_u32_e32 1, v2
	s_cbranch_execz .LBB3_683
; %bb.682:                              ; %.critedge117.i
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s1, 1
	flat_store_b32 v[0:1], v41 offset:8
.LBB3_683:                              ; %Flow1067
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v2, 1
	s_or_not1_b32 s0, vcc_lo, exec_lo
.LBB3_684:                              ; %Flow1066
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v18, s1
	s_and_saveexec_b32 s67, s0
	s_cbranch_execnz .LBB3_951
.LBB3_685:                              ; %Flow1068
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s67
.LBB3_686:                              ; %Flow1070
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s63
.LBB3_687:                              ; %Flow1132
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s61
.LBB3_688:                              ; %Flow1133
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s60
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr16_vgpr17
.LBB3_689:                              ; %Flow1256
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s59, s59
	s_cbranch_execz .LBB3_867
; %bb.690:                              ; %LeafBlock
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s60, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_866
; %bb.691:                              ;   in Loop: Header=BB3_1 Depth=1
	s_and_saveexec_b32 s61, s45
	s_cbranch_execz .LBB3_865
; %bb.692:                              ; %NodeBlock271
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v1, v17, v145 :: v_dual_cndmask_b32 v0, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v1, vcc_lo
	flat_load_b32 v2, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v2
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_698
; %bb.693:                              ; %NodeBlock269
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v2
	s_xor_b32 s4, exec_lo, s4
; %bb.694:                              ; %LeafBlock267
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v2
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.695:                              ; %Flow1248
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.696:                              ; %LeafBlock265
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v2
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.697:                              ; %Flow1249
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr2
.LBB3_698:                              ; %Flow1247
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_704
; %bb.699:                              ; %NodeBlock263
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v2
	s_xor_b32 s0, exec_lo, s0
; %bb.700:                              ; %LeafBlock261
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.701:                              ; %Flow1251
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.702:                              ; %LeafBlock259
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cmp_ne_u32_e64 s0, 1, v2
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.703:                              ; %Flow1252
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_704:                              ; %Flow1250
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.705:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.706:                              ; %Flow1253
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.707:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.708:                              ; %pawn_owner.exit.i.i
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s53, s66, -1
	s_add_i32 s55, s65, -1
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s53 :: v_dual_mov_b32 v6, s55
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s54, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_734
; %bb.709:                              ;   in Loop: Header=BB3_1 Depth=1
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, s49
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s49, exec_lo, s0
	s_cbranch_execnz .LBB3_992
.LBB3_710:                              ; %Flow1245
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s49, s49
	s_cbranch_execnz .LBB3_993
.LBB3_711:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s49
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_712:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_712
; %bb.713:                              ; %copy_board.exit.i.i
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s53, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s55
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lt_i32 s66, 8
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_715
; %bb.714:                              ; %LeafBlock275
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_lg_u32 s66, 8
	s_mov_b32 s2, 0
	s_mov_b32 s0, -1
	s_cselect_b32 s1, -1, 0
	s_branch .LBB3_716
.LBB3_715:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s2, -1
	s_mov_b32 s0, 0
	s_mov_b32 s1, 0
.LBB3_716:                              ; %Flow1241
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB3_718
; %bb.717:                              ; %LeafBlock273
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 1
	s_cselect_b32 s0, -1, 0
	s_cmp_lg_u32 s66, 1
	s_cselect_b32 s1, -1, 0
.LBB3_718:                              ; %Flow1242
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_720
; %bb.719:                              ; %copy_board.exit.i.i.pawn.exit.i_crit_edge
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s0, 0
	s_mov_b32 s1, 1
	s_branch .LBB3_721
.LBB3_720:                              ;   in Loop: Header=BB3_1 Depth=1
                                        ; implicit-def: $sgpr1
.LBB3_721:                              ; %Flow1243
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, s1
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_734
; %bb.722:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v18, 1 :: v_dual_add_nc_u32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 2, v3
	s_cbranch_execz .LBB3_733
; %bb.723:                              ; %NodeBlock281
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_gt_i32 s66, 7
	s_cbranch_scc0 .LBB3_725
; %bb.724:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s3, 0
	s_mov_b32 s2, 1
	s_and_b32 s1, vcc_lo, exec_lo
	s_branch .LBB3_726
.LBB3_725:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s3, -1
	s_mov_b32 s1, 0
                                        ; implicit-def: $sgpr2
.LBB3_726:                              ; %Flow1236
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB3_730
; %bb.727:                              ; %LeafBlock279
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 1
	s_cbranch_scc0 .LBB3_729
; %bb.728:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_mov_b32 s2, 1
	s_or_not1_b32 s1, vcc_lo, exec_lo
	s_branch .LBB3_730
.LBB3_729:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s1, -1
                                        ; implicit-def: $sgpr2
.LBB3_730:                              ; %Flow1237
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, s2
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB3_732
; %bb.731:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_mov_b32_e32 v18, 1
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	flat_store_b32 v[0:1], v2
.LBB3_732:                              ; %Flow1239
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_733:                              ; %Flow1240
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_734:                              ; %Flow1246
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s54
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v1, v17, v145 :: v_dual_cndmask_b32 v0, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v1, vcc_lo
	flat_load_b32 v2, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v2
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_740
; %bb.735:                              ; %NodeBlock293
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v2
	s_xor_b32 s4, exec_lo, s4
; %bb.736:                              ; %LeafBlock291
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v2
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.737:                              ; %Flow1228
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.738:                              ; %LeafBlock289
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v2
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.739:                              ; %Flow1229
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr2
.LBB3_740:                              ; %Flow1227
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_746
; %bb.741:                              ; %NodeBlock287
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v2
	s_xor_b32 s0, exec_lo, s0
; %bb.742:                              ; %LeafBlock285
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.743:                              ; %Flow1231
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.744:                              ; %LeafBlock283
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cmp_ne_u32_e64 s0, 1, v2
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.745:                              ; %Flow1232
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_746:                              ; %Flow1230
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.747:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.748:                              ; %Flow1233
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.749:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.750:                              ; %pawn_owner.exit.i164.i
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s2, s65, 1
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s53 :: v_dual_mov_b32 v6, s2
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s49, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_776
; %bb.751:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s54, exec_lo, s0
	s_cbranch_execnz .LBB3_994
.LBB3_752:                              ; %Flow1225
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s54, s54
	s_cbranch_execnz .LBB3_995
.LBB3_753:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s54
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[16:17], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[16:17] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v0 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_754:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v0, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v17, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[0:1], v2
	s_cbranch_scc1 .LBB3_754
; %bb.755:                              ; %copy_board.exit.i174.i
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v0, v[16:17] offset:256
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	s_lshl_b32 s0, s53, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s1, s0, 31
	s_or_b32 s0, s0, s65
	s_lshl_b64 s[0:1], s[0:1], 2
	s_cmp_lt_i32 s66, 8
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[16:17], v0 offset:256
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v0, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b32 v[0:1], v4 offset:4
	flat_store_b32 v[2:3], v180
	s_cbranch_scc1 .LBB3_757
; %bb.756:                              ; %LeafBlock299
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_lg_u32 s66, 8
	s_mov_b32 s2, 0
	s_mov_b32 s0, -1
	s_cselect_b32 s1, -1, 0
	s_branch .LBB3_758
.LBB3_757:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s2, -1
	s_mov_b32 s0, 0
	s_mov_b32 s1, 0
.LBB3_758:                              ; %Flow1221
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB3_760
; %bb.759:                              ; %LeafBlock297
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 1
	s_cselect_b32 s0, -1, 0
	s_cmp_lg_u32 s66, 1
	s_cselect_b32 s1, -1, 0
.LBB3_760:                              ; %Flow1222
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_762
; %bb.761:                              ; %copy_board.exit.i174.i.pawn.exit179.i_crit_edge
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s0, 0
	s_mov_b32 s1, 1
	s_branch .LBB3_763
.LBB3_762:                              ;   in Loop: Header=BB3_1 Depth=1
                                        ; implicit-def: $sgpr1
.LBB3_763:                              ; %Flow1223
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, s1
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_776
; %bb.764:                              ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:4
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v18, 1 :: v_dual_add_nc_u32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 2, v3
	s_cbranch_execz .LBB3_775
; %bb.765:                              ; %NodeBlock305
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_gt_i32 s66, 7
	s_cbranch_scc0 .LBB3_767
; %bb.766:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s3, 0
	s_mov_b32 s2, 1
	s_and_b32 s1, vcc_lo, exec_lo
	s_branch .LBB3_768
.LBB3_767:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s3, -1
	s_mov_b32 s1, 0
                                        ; implicit-def: $sgpr2
.LBB3_768:                              ; %Flow1216
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB3_772
; %bb.769:                              ; %LeafBlock303
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 1
	s_cbranch_scc0 .LBB3_771
; %bb.770:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_mov_b32 s2, 1
	s_or_not1_b32 s1, vcc_lo, exec_lo
	s_branch .LBB3_772
.LBB3_771:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s1, -1
                                        ; implicit-def: $sgpr2
.LBB3_772:                              ; %Flow1217
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, s2
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB3_774
; %bb.773:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_mov_b32_e32 v18, 1
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	flat_store_b32 v[0:1], v2 offset:4
.LBB3_774:                              ; %Flow1219
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_775:                              ; %Flow1220
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_776:                              ; %Flow1226
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s49
	v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17]
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	v_dual_cndmask_b32 v1, v17, v145 :: v_dual_cndmask_b32 v0, v16, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v1, vcc_lo
	flat_load_b32 v2, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v2
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_782
; %bb.777:                              ; %NodeBlock317
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v2
	s_xor_b32 s4, exec_lo, s4
; %bb.778:                              ; %LeafBlock315
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v2
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.779:                              ; %Flow1208
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.780:                              ; %LeafBlock313
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v2
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.781:                              ; %Flow1209
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr2
.LBB3_782:                              ; %Flow1207
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_788
; %bb.783:                              ; %NodeBlock311
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v2
	s_xor_b32 s0, exec_lo, s0
; %bb.784:                              ; %LeafBlock309
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.785:                              ; %Flow1211
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.786:                              ; %LeafBlock307
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cmp_ne_u32_e64 s0, 1, v2
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.787:                              ; %Flow1212
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_788:                              ; %Flow1210
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.789:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.790:                              ; %Flow1213
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.791:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.792:                              ; %pawn_owner.exit.i468
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s49, s66, -2
	s_add_i32 s53, s65, -2
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s49 :: v_dual_mov_b32 v6, s53
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s62, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_820
; %bb.793:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s54, exec_lo, s0
	s_cbranch_execnz .LBB3_996
.LBB3_794:                              ; %Flow1205
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s54, s54
	s_cbranch_execnz .LBB3_997
.LBB3_795:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s54
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[0:1], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v2, v[0:1] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v2, 1, v2
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v2 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_796:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v2, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v2, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[2:3], v4
	s_cbranch_scc1 .LBB3_796
; %bb.797:                              ; %copy_board.exit.i478
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:256
	s_add_i32 s1, s49, s66
	s_add_i32 s2, s53, s65
	s_lshr_b32 s3, s1, 31
	s_lshl_b32 s0, s49, 3
	s_lshr_b32 s4, s2, 31
	s_add_i32 s1, s1, s3
	s_add_i32 s0, s0, s53
	s_add_i32 s2, s2, s4
	s_lshl_b32 s1, s1, 2
	s_ashr_i32 s2, s2, 1
	s_and_b32 s3, s1, -8
	s_ashr_i32 s1, s0, 31
	s_add_i32 s2, s3, s2
	s_lshl_b64 s[0:1], s[0:1], 2
	s_ashr_i32 s3, s2, 31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v4, 1, v2
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	flat_store_b32 v[0:1], v4 offset:256
	v_add_co_u32 v0, vcc_lo, v144, s0
	flat_load_b32 v6, v[2:3]
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_lshl_b64 s[0:1], s[2:3], 2
	s_cmp_lt_i32 s66, 9
	v_add_co_u32 v4, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x2
	flat_store_b32 v[0:1], v6
	flat_store_b32 v[2:3], v180
	flat_store_b32 v[4:5], v180
	s_cbranch_scc1 .LBB3_799
; %bb.798:                              ; %LeafBlock323
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_lg_u32 s66, 9
	s_mov_b32 s2, 0
	s_mov_b32 s1, -1
	s_cselect_b32 s0, -1, 0
	s_branch .LBB3_800
.LBB3_799:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s2, -1
	s_mov_b32 s1, 0
	s_mov_b32 s0, 0
.LBB3_800:                              ; %Flow1195
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB3_802
; %bb.801:                              ; %LeafBlock321
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 2
	s_cselect_b32 s1, -1, 0
	s_cmp_lg_u32 s66, 2
	s_cselect_b32 s0, -1, 0
.LBB3_802:                              ; %Flow1196
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_804
; %bb.803:                              ; %.create_queen.exit114_crit_edge.i507
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s1, 0
	s_mov_b32 s0, -1
	s_branch .LBB3_805
.LBB3_804:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s0, 0
                                        ; implicit-def: $vgpr2
.LBB3_805:                              ; %Flow1197
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s1
                                        ; implicit-def: $sgpr4
	s_cbranch_vccnz .LBB3_818
; %bb.806:                              ;   in Loop: Header=BB3_1 Depth=1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b32 v2, v[0:1]
	s_mov_b32 s0, -1
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $sgpr4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 2, v3
	s_cbranch_execz .LBB3_817
; %bb.807:                              ; %NodeBlock329
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_gt_i32 s66, 8
	s_cbranch_scc0 .LBB3_809
; %bb.808:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s3, 1
	s_mov_b32 s4, 0
	s_mov_b32 s2, -1
	s_and_b32 s0, vcc_lo, exec_lo
	s_branch .LBB3_810
.LBB3_809:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, -1
	s_mov_b32 s0, 0
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr3
.LBB3_810:                              ; %Flow1200
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB3_814
; %bb.811:                              ; %LeafBlock327
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 2
	s_mov_b32 s0, -1
	s_cbranch_scc0 .LBB3_813
; %bb.812:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 2, v2
	v_cmp_ne_u32_e64 s0, 2, v2
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s3, 2
	s_and_b32 s4, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_or_not1_b32 s0, s0, exec_lo
	s_or_b32 s2, s2, s4
	s_branch .LBB3_814
.LBB3_813:                              ;   in Loop: Header=BB3_1 Depth=1
                                        ; implicit-def: $sgpr3
.LBB3_814:                              ; %Flow1201
                                        ;   in Loop: Header=BB3_1 Depth=1
                                        ; implicit-def: $sgpr4
	s_and_saveexec_b32 s5, s0
	s_cbranch_execz .LBB3_816
; %bb.815:                              ; %.critedge117.i505
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s4, 1
	s_and_not1_b32 s2, s2, exec_lo
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	flat_store_b32 v[0:1], v2
.LBB3_816:                              ; %Flow1203
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v2, s3
	s_or_not1_b32 s0, s2, exec_lo
.LBB3_817:                              ; %Flow1199
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
.LBB3_818:                              ; %Flow1198
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, s4
	s_and_saveexec_b32 s63, s0
	s_cbranch_execnz .LBB3_998
.LBB3_819:                              ; %Flow1204
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s63
.LBB3_820:                              ; %Flow1206
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s62
	flat_load_b64 v[0:1], v[144:145] offset:288
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v145 :: v_dual_cndmask_b32 v0, v0, v144
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v0, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v1, vcc_lo
	flat_load_b32 v2, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v2
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_826
; %bb.821:                              ; %NodeBlock365
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v2
	s_xor_b32 s4, exec_lo, s4
; %bb.822:                              ; %LeafBlock363
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 22, v2
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.823:                              ; %Flow1168
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
; %bb.824:                              ; %LeafBlock361
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 11, v2
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.825:                              ; %Flow1169
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr2
.LBB3_826:                              ; %Flow1167
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_832
; %bb.827:                              ; %NodeBlock359
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v2
	s_xor_b32 s0, exec_lo, s0
; %bb.828:                              ; %LeafBlock357
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr2
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.829:                              ; %Flow1171
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.830:                              ; %LeafBlock355
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cmp_ne_u32_e64 s0, 1, v2
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.831:                              ; %Flow1172
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_832:                              ; %Flow1170
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.833:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.834:                              ; %Flow1173
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.835:                              ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v4, 1
; %bb.836:                              ; %pawn_owner.exit.i424
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s53, s65, 2
	v_dual_mov_b32 v2, s66 :: v_dual_mov_b32 v3, s65
	v_dual_mov_b32 v5, s49 :: v_dual_mov_b32 v6, s53
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s62, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_864
; %bb.837:                              ;   in Loop: Header=BB3_1 Depth=1
	v_and_b32_e32 v0, 0xff, v18
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s54, exec_lo, s0
	s_cbranch_execnz .LBB3_1039
.LBB3_838:                              ; %Flow1165
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_saveexec_b32 s54, s54
	s_cbranch_execnz .LBB3_1040
.LBB3_839:                              ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s54
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	s_mov_b64 s[0:1], 0
	global_store_b64 v[0:1], v[176:177], off offset:296
	flat_load_b64 v[144:145], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[0:1], v[144:145] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v2, v[0:1] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v2, 1, v2
	s_clause 0x3
	flat_store_b32 v[144:145], v176 offset:256
	flat_store_b64 v[144:145], v[166:167] offset:312
	flat_store_b8 v[144:145], v2 offset:304
	flat_store_b128 v[144:145], v[176:179] offset:264
.LBB3_840:                              ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v2, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	flat_load_b32 v4, v[2:3]
	v_add_co_u32 v2, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v145, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[2:3], v4
	s_cbranch_scc1 .LBB3_840
; %bb.841:                              ; %copy_board.exit.i434
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:256
	s_add_i32 s0, s49, s66
	s_lshl_b32 s2, s49, 3
	s_lshr_b32 s1, s0, 31
	s_add_i32 s3, s53, s65
	s_add_i32 s0, s0, s1
	s_ashr_i32 s1, s2, 31
	s_lshl_b32 s0, s0, 2
	s_lshr_b32 s3, s3, 1
	s_and_b32 s4, s0, -8
	s_or_b32 s0, s2, s65
	s_add_i32 s2, s4, s3
	s_lshl_b64 s[0:1], s[0:1], 2
	s_ashr_i32 s3, s2, 31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v4, 1, v2
	v_add_co_u32 v2, vcc_lo, v144, s56
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v145, vcc_lo
	flat_store_b32 v[0:1], v4 offset:256
	v_add_co_u32 v0, vcc_lo, v144, s0
	flat_load_b32 v6, v[2:3]
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v145, vcc_lo
	s_lshl_b64 s[0:1], s[2:3], 2
	s_cmp_lt_i32 s66, 9
	v_add_co_u32 v4, vcc_lo, v144, s0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v145, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x2
	flat_store_b32 v[0:1], v6 offset:8
	flat_store_b32 v[2:3], v180
	flat_store_b32 v[4:5], v180
	s_cbranch_scc1 .LBB3_843
; %bb.842:                              ; %LeafBlock371
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_lg_u32 s66, 9
	s_mov_b32 s2, 0
	s_mov_b32 s1, -1
	s_cselect_b32 s0, -1, 0
	s_branch .LBB3_844
.LBB3_843:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s2, -1
	s_mov_b32 s1, 0
	s_mov_b32 s0, 0
.LBB3_844:                              ; %Flow1155
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB3_846
; %bb.845:                              ; %LeafBlock369
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 2
	s_cselect_b32 s1, -1, 0
	s_cmp_lg_u32 s66, 2
	s_cselect_b32 s0, -1, 0
.LBB3_846:                              ; %Flow1156
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_848
; %bb.847:                              ; %.create_queen.exit114_crit_edge.i463
                                        ;   in Loop: Header=BB3_1 Depth=1
	flat_load_b32 v2, v[0:1] offset:8
	s_mov_b32 s1, 0
	s_mov_b32 s0, -1
	s_branch .LBB3_849
.LBB3_848:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s0, 0
                                        ; implicit-def: $vgpr2
.LBB3_849:                              ; %Flow1157
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s1
                                        ; implicit-def: $sgpr4
	s_cbranch_vccnz .LBB3_862
; %bb.850:                              ;   in Loop: Header=BB3_1 Depth=1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b32 v2, v[0:1] offset:8
	s_mov_b32 s0, -1
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $sgpr4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 2, v3
	s_cbranch_execz .LBB3_861
; %bb.851:                              ; %NodeBlock377
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_gt_i32 s66, 8
	s_cbranch_scc0 .LBB3_853
; %bb.852:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s3, 1
	s_mov_b32 s4, 0
	s_mov_b32 s2, -1
	s_and_b32 s0, vcc_lo, exec_lo
	s_branch .LBB3_854
.LBB3_853:                              ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s4, -1
	s_mov_b32 s0, 0
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr3
.LBB3_854:                              ; %Flow1160
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB3_858
; %bb.855:                              ; %LeafBlock375
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_cmp_eq_u32 s66, 2
	s_mov_b32 s0, -1
	s_cbranch_scc0 .LBB3_857
; %bb.856:                              ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 2, v2
	v_cmp_ne_u32_e64 s0, 2, v2
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s3, 2
	s_and_b32 s4, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_or_not1_b32 s0, s0, exec_lo
	s_or_b32 s2, s2, s4
	s_branch .LBB3_858
.LBB3_857:                              ;   in Loop: Header=BB3_1 Depth=1
                                        ; implicit-def: $sgpr3
.LBB3_858:                              ; %Flow1161
                                        ;   in Loop: Header=BB3_1 Depth=1
                                        ; implicit-def: $sgpr4
	s_and_saveexec_b32 s5, s0
	s_cbranch_execz .LBB3_860
; %bb.859:                              ; %.critedge117.i461
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	s_mov_b32 s4, 1
	s_and_not1_b32 s2, s2, exec_lo
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	flat_store_b32 v[0:1], v2 offset:8
.LBB3_860:                              ; %Flow1163
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v2, s3
	s_or_not1_b32 s0, s2, exec_lo
.LBB3_861:                              ; %Flow1159
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
.LBB3_862:                              ; %Flow1158
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_mov_b32_e32 v18, s4
	s_and_saveexec_b32 s56, s0
	s_cbranch_execnz .LBB3_1041
.LBB3_863:                              ; %Flow1164
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s56
.LBB3_864:                              ; %Flow1166
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s62
.LBB3_865:                              ; %Flow1254
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s61
.LBB3_866:                              ; %Flow1255
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s60
.LBB3_867:                              ; %Flow1257
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s59
.LBB3_868:                              ; %Flow1259
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s58
.LBB3_869:                              ; %Flow1260
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s51
	v_add_nc_u16 v0, s64, 1
	s_add_i32 s50, s50, 1
	s_cmp_eq_u32 s50, 64
	s_delay_alu instid0(VALU_DEP_1)
	v_readfirstlane_b32 s64, v0
	s_cbranch_scc0 .LBB3_1
	s_branch .LBB3_1082
.LBB3_870:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v181, v180
	v_mov_b32_e32 v182, v180
	v_mov_b32_e32 v183, v180
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[180:183], off offset:264
	global_store_b64 v[0:1], v[180:181], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_24
.LBB3_871:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v181, v180
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v182, v180
	v_mov_b32_e32 v183, v180
	global_store_b64 v[0:1], v[180:181], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[180:183], off offset:272
	s_branch .LBB3_25
.LBB3_872:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_52
.LBB3_873:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_53
.LBB3_874:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_80
.LBB3_875:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_81
.LBB3_876:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_120
.LBB3_877:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_121
.LBB3_878:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_160
.LBB3_879:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_161
.LBB3_880:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_190
.LBB3_881:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_191
.LBB3_882:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_220
.LBB3_883:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_221
.LBB3_884:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_262
.LBB3_885:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_263
.LBB3_886:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_310
.LBB3_887:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_311
.LBB3_888:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_338
.LBB3_889:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_339
.LBB3_890:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_366
.LBB3_891:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_367
.LBB3_892:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_406
.LBB3_893:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_407
.LBB3_894:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_446
.LBB3_895:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_447
.LBB3_896:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_476
.LBB3_897:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_477
.LBB3_898:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_506
.LBB3_899:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_507
.LBB3_900:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_548
.LBB3_901:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_549
.LBB3_902:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_598
.LBB3_903:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_599
.LBB3_904:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_624
.LBB3_905:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_625
.LBB3_906:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_650
.LBB3_907:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_651
.LBB3_908:                              ; %create_queen.exit114.i393
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_mov_b32_e32 v0, 32
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[54:55]
	s_add_u32 s54, s54, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s55, s55, __ockl_dm_alloc@rel32@hi+12
	v_mov_b32_e32 v1, 0
	v_cndmask_b32_e64 v183, 2, -2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v148, s62, v183
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v160, v0 :: v_dual_mov_b32 v161, v1
	v_dual_mov_b32 v146, s62 :: v_dual_mov_b32 v147, s53
	v_dual_mov_b32 v149, s65 :: v_dual_mov_b32 v178, v144
	v_dual_mov_b32 v177, v176 :: v_dual_mov_b32 v0, 32
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v179, v145
	s_clause 0x1
	global_store_b128 v[160:161], v[146:149], off
	global_store_b128 v[160:161], v[176:179], off offset:16
	s_add_i32 s53, s65, -4
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v162, v0 :: v_dual_mov_b32 v163, v1
	v_mov_b32_e32 v149, s53
	s_mov_b32 s68, exec_lo
	s_clause 0x1
	global_store_b128 v[162:163], v[146:149], off
	global_store_b128 v[162:163], v[176:179], off offset:16
	global_store_b64 v[160:161], v[162:163], off offset:16
	v_cmpx_ne_u64_e32 0, v[160:161]
	s_cbranch_execz .LBB3_948
; %bb.909:                              ; %.lr.ph.i396.preheader
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s69, 0
.LBB3_910:                              ; %NodeBlock457
                                        ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_928 Depth 3
                                        ;       Child Loop BB3_945 Depth 3
	s_clause 0x1
	flat_load_b128 v[148:151], v[160:161]
	flat_load_b64 v[164:165], v[160:161] offset:24
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshl_add_u32 v0, v148, 3, v149
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[181:182], 2, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v164, v181
	v_add_co_ci_u32_e32 v1, vcc_lo, v165, v182, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_916
; %bb.911:                              ; %NodeBlock455
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.912:                              ; %LeafBlock453
                                        ;   in Loop: Header=BB3_910 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.913:                              ; %Flow1089
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_and_not1_saveexec_b32 s4, s4
; %bb.914:                              ; %LeafBlock451
                                        ;   in Loop: Header=BB3_910 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.915:                              ; %Flow1090
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_916:                              ; %Flow1088
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_922
; %bb.917:                              ; %NodeBlock449
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.918:                              ; %LeafBlock447
                                        ;   in Loop: Header=BB3_910 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.919:                              ; %Flow1092
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.920:                              ; %LeafBlock445
                                        ;   in Loop: Header=BB3_910 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.921:                              ; %Flow1093
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_922:                              ; %Flow1091
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.923:                              ;   in Loop: Header=BB3_910 Depth=2
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.924:                              ; %Flow1094
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.925:                              ;   in Loop: Header=BB3_910 Depth=2
	v_mov_b32_e32 v4, 1
; %bb.926:                              ; %pawn_owner.exit.i.i400
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v0, v164 :: v_dual_mov_b32 v1, v165
	v_dual_mov_b32 v2, v148 :: v_dual_mov_b32 v3, v149
	v_dual_mov_b32 v5, v150 :: v_dual_mov_b32 v6, v151
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s70, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_944
; %bb.927:                              ;   in Loop: Header=BB3_910 Depth=2
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_mov_b32 s53, s52
	s_mov_b32 s54, s52
	s_mov_b32 s55, s52
	v_dual_mov_b32 v178, v0 :: v_dual_mov_b32 v179, v1
	v_dual_mov_b32 v0, s52 :: v_dual_mov_b32 v1, s53
	v_dual_mov_b32 v2, s54 :: v_dual_mov_b32 v3, s55
	s_clause 0x1
	global_store_b128 v[178:179], v[0:3], off offset:264
	global_store_b128 v[178:179], v[0:3], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	s_mov_b64 s[0:1], 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[146:147] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	flat_store_b64 v[144:145], v[178:179] offset:272
	s_clause 0x2
	global_store_b128 v[178:179], v[144:147], off offset:280
	global_store_b8 v[178:179], v0, off offset:304
	global_store_b64 v[178:179], v[166:167], off offset:312
.LBB3_928:                              ;   Parent Loop BB3_1 Depth=1
                                        ;     Parent Loop BB3_910 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_add_co_u32 v0, vcc_lo, v164, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v165, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v178, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v179, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
	s_cbranch_scc1 .LBB3_928
; %bb.929:                              ; %copy_board.exit.i.i412
                                        ;   in Loop: Header=BB3_910 Depth=2
	flat_load_b32 v0, v[146:147] offset:256
	v_add_co_u32 v2, vcc_lo, v178, v181
	v_add_co_ci_u32_e32 v3, vcc_lo, v179, v182, vcc_lo
	v_add_nc_u32_e32 v1, v151, v149
	s_mov_b32 s1, 0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v5, 31, v1
	v_add_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 1, v1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[146:147], v0 offset:256
	global_load_b32 v6, v[2:3], off
	v_add_nc_u32_e32 v0, v150, v148
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 31, v0
	v_add_lshl_u32 v0, v0, v4, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, -8, v0
	v_lshl_add_u32 v0, v150, 3, v151
	v_add_nc_u32_e32 v4, v4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v178, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v179, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, v178, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, v179, v5, vcc_lo
	s_waitcnt vmcnt(0)
	s_clause 0x2
	global_store_b32 v[0:1], v6, off
	global_store_b32 v[2:3], v180, off
	global_store_b32 v[4:5], v180, off
	v_cmpx_lt_i32_e32 6, v150
	s_xor_b32 s0, exec_lo, s0
; %bb.930:                              ; %LeafBlock461
                                        ;   in Loop: Header=BB3_910 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 7, v150
	s_and_b32 s1, vcc_lo, exec_lo
; %bb.931:                              ; %Flow1085
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_and_not1_saveexec_b32 s0, s0
; %bb.932:                              ; %LeafBlock459
                                        ;   in Loop: Header=BB3_910 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 0, v150
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s2, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s1, s1, s2
; %bb.933:                              ; %Flow1086
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_943
; %bb.934:                              ;   in Loop: Header=BB3_910 Depth=2
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 2, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_943
; %bb.935:                              ; %NodeBlock467
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_mov_b32 s1, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_i32_e32 6, v150
	s_xor_b32 s2, exec_lo, s2
; %bb.936:                              ;   in Loop: Header=BB3_910 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_and_b32 s1, vcc_lo, exec_lo
; %bb.937:                              ; %Flow1080
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB3_941
; %bb.938:                              ; %LeafBlock465
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_mov_b32 s3, -1
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v150
; %bb.939:                              ;   in Loop: Header=BB3_910 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_or_not1_b32 s3, vcc_lo, exec_lo
; %bb.940:                              ; %Flow1082
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s3, s3, exec_lo
	s_or_b32 s1, s1, s3
.LBB3_941:                              ; %Flow1081
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB3_943
; %bb.942:                              ;   in Loop: Header=BB3_910 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB3_943:                              ; %create_queen.exit.i.i415
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v44, v150, v183
	v_dual_mov_b32 v0, 32 :: v_dual_add_nc_u32 v45, 2, v151
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[54:55]
	s_add_u32 s54, s54, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s55, s55, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v146, v0 :: v_dual_mov_b32 v147, v1
	v_dual_mov_b32 v42, v150 :: v_dual_mov_b32 v43, v151
	v_dual_mov_b32 v177, v176 :: v_dual_mov_b32 v0, 32
	v_mov_b32_e32 v1, 0
	s_clause 0x1
	global_store_b128 v[146:147], v[42:45], off
	global_store_b128 v[146:147], v[176:179], off offset:16
	flat_store_b64 v[162:163], v[146:147] offset:16
	v_add_nc_u32_e32 v45, -2, v151
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v144, v178 :: v_dual_mov_b32 v145, v179
	s_clause 0x1
	global_store_b128 v[0:1], v[42:45], off
	global_store_b128 v[0:1], v[176:179], off offset:16
	global_store_b64 v[146:147], v[0:1], off offset:16
.LBB3_944:                              ; %Flow1087
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_or_b32 exec_lo, exec_lo, s70
	v_dual_mov_b32 v0, v162 :: v_dual_mov_b32 v1, v163
	s_mov_b32 s0, 0
.LBB3_945:                              ;   Parent Loop BB3_1 Depth=1
                                        ;     Parent Loop BB3_910 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v163, v1 :: v_dual_mov_b32 v162, v0
	flat_load_b64 v[0:1], v[0:1] offset:16
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	s_or_b32 s0, vcc_lo, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_945
; %bb.946:                              ; %_ZdlPv.exit.i406
                                        ;   in Loop: Header=BB3_910 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	flat_load_b64 v[21:22], v[160:161] offset:16
	v_dual_mov_b32 v0, v160 :: v_dual_mov_b32 v1, v161
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_mov_b32 v161, v22 :: v_dual_mov_b32 v160, v21
	s_or_b32 s69, vcc_lo, s69
	s_and_not1_b32 exec_lo, exec_lo, s69
	s_cbranch_execnz .LBB3_910
; %bb.947:                              ; %Flow1095
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s69
.LBB3_948:                              ; %Flow1096
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s68
	v_mov_b32_e32 v18, 1
	s_branch .LBB3_658
.LBB3_949:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_677
.LBB3_950:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_678
.LBB3_951:                              ; %create_queen.exit114.i
                                        ;   in Loop: Header=BB3_1 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_mov_b32_e32 v0, 32
	s_mov_b64 s[8:9], s[46:47]
	s_add_i32 s68, s65, 4
	s_getpc_b64 s[54:55]
	s_add_u32 s54, s54, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s55, s55, __ockl_dm_alloc@rel32@hi+12
	v_cndmask_b32_e64 v183, 2, -2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v148, s62, v183
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v160, v0 :: v_dual_mov_b32 v161, v1
	v_dual_mov_b32 v146, s62 :: v_dual_mov_b32 v147, s53
	v_dual_mov_b32 v149, s68 :: v_dual_mov_b32 v178, v144
	v_dual_mov_b32 v177, v176 :: v_dual_mov_b32 v0, 32
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v179, v145
	s_clause 0x1
	global_store_b128 v[160:161], v[146:149], off
	global_store_b128 v[160:161], v[176:179], off offset:16
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v162, v0 :: v_dual_mov_b32 v163, v1
	v_mov_b32_e32 v149, s65
	s_mov_b32 s62, exec_lo
	s_clause 0x1
	global_store_b128 v[162:163], v[146:149], off
	global_store_b128 v[162:163], v[176:179], off offset:16
	global_store_b64 v[160:161], v[162:163], off offset:16
	v_cmpx_ne_u64_e32 0, v[160:161]
	s_cbranch_execz .LBB3_991
; %bb.952:                              ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s68, 0
.LBB3_953:                              ; %NodeBlock495
                                        ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_971 Depth 3
                                        ;       Child Loop BB3_988 Depth 3
	s_clause 0x1
	flat_load_b128 v[148:151], v[160:161]
	flat_load_b64 v[164:165], v[160:161] offset:24
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshl_add_u32 v0, v148, 3, v149
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[181:182], 2, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v164, v181
	v_add_co_ci_u32_e32 v1, vcc_lo, v165, v182, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_959
; %bb.954:                              ; %NodeBlock493
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.955:                              ; %LeafBlock491
                                        ;   in Loop: Header=BB3_953 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.956:                              ; %Flow1058
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_and_not1_saveexec_b32 s4, s4
; %bb.957:                              ; %LeafBlock489
                                        ;   in Loop: Header=BB3_953 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.958:                              ; %Flow1059
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_959:                              ; %Flow1057
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_965
; %bb.960:                              ; %NodeBlock487
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.961:                              ; %LeafBlock485
                                        ;   in Loop: Header=BB3_953 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.962:                              ; %Flow1061
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.963:                              ; %LeafBlock483
                                        ;   in Loop: Header=BB3_953 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.964:                              ; %Flow1062
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_965:                              ; %Flow1060
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.966:                              ;   in Loop: Header=BB3_953 Depth=2
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.967:                              ; %Flow1063
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.968:                              ;   in Loop: Header=BB3_953 Depth=2
	v_mov_b32_e32 v4, 1
; %bb.969:                              ; %pawn_owner.exit.i.i369
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v0, v164 :: v_dual_mov_b32 v1, v165
	v_dual_mov_b32 v2, v148 :: v_dual_mov_b32 v3, v149
	v_dual_mov_b32 v5, v150 :: v_dual_mov_b32 v6, v151
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s69, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_987
; %bb.970:                              ;   in Loop: Header=BB3_953 Depth=2
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_mov_b32 s53, s52
	s_mov_b32 s54, s52
	s_mov_b32 s55, s52
	v_dual_mov_b32 v178, v0 :: v_dual_mov_b32 v179, v1
	v_dual_mov_b32 v0, s52 :: v_dual_mov_b32 v1, s53
	v_dual_mov_b32 v2, s54 :: v_dual_mov_b32 v3, s55
	s_clause 0x1
	global_store_b128 v[178:179], v[0:3], off offset:264
	global_store_b128 v[178:179], v[0:3], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	s_mov_b64 s[0:1], 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[146:147] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	flat_store_b64 v[144:145], v[178:179] offset:272
	s_clause 0x2
	global_store_b128 v[178:179], v[144:147], off offset:280
	global_store_b8 v[178:179], v0, off offset:304
	global_store_b64 v[178:179], v[166:167], off offset:312
.LBB3_971:                              ;   Parent Loop BB3_1 Depth=1
                                        ;     Parent Loop BB3_953 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_add_co_u32 v0, vcc_lo, v164, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v165, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v178, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v179, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
	s_cbranch_scc1 .LBB3_971
; %bb.972:                              ; %copy_board.exit.i.i373
                                        ;   in Loop: Header=BB3_953 Depth=2
	flat_load_b32 v0, v[146:147] offset:256
	v_add_co_u32 v2, vcc_lo, v178, v181
	v_add_co_ci_u32_e32 v3, vcc_lo, v179, v182, vcc_lo
	v_add_nc_u32_e32 v1, v151, v149
	s_mov_b32 s1, 0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v5, 31, v1
	v_add_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 1, v1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[146:147], v0 offset:256
	global_load_b32 v6, v[2:3], off
	v_add_nc_u32_e32 v0, v150, v148
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 31, v0
	v_add_lshl_u32 v0, v0, v4, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, -8, v0
	v_lshl_add_u32 v0, v150, 3, v151
	v_add_nc_u32_e32 v4, v4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v178, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v179, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, v178, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, v179, v5, vcc_lo
	s_waitcnt vmcnt(0)
	s_clause 0x2
	global_store_b32 v[0:1], v6, off
	global_store_b32 v[2:3], v180, off
	global_store_b32 v[4:5], v180, off
	v_cmpx_lt_i32_e32 6, v150
	s_xor_b32 s0, exec_lo, s0
; %bb.973:                              ; %LeafBlock499
                                        ;   in Loop: Header=BB3_953 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 7, v150
	s_and_b32 s1, vcc_lo, exec_lo
; %bb.974:                              ; %Flow1054
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_and_not1_saveexec_b32 s0, s0
; %bb.975:                              ; %LeafBlock497
                                        ;   in Loop: Header=BB3_953 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 0, v150
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s2, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s1, s1, s2
; %bb.976:                              ; %Flow1055
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_986
; %bb.977:                              ;   in Loop: Header=BB3_953 Depth=2
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 2, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_986
; %bb.978:                              ; %NodeBlock505
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_mov_b32 s1, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_i32_e32 6, v150
	s_xor_b32 s2, exec_lo, s2
; %bb.979:                              ;   in Loop: Header=BB3_953 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_and_b32 s1, vcc_lo, exec_lo
; %bb.980:                              ; %Flow1049
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB3_984
; %bb.981:                              ; %LeafBlock503
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_mov_b32 s3, -1
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v150
; %bb.982:                              ;   in Loop: Header=BB3_953 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_or_not1_b32 s3, vcc_lo, exec_lo
; %bb.983:                              ; %Flow1051
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s3, s3, exec_lo
	s_or_b32 s1, s1, s3
.LBB3_984:                              ; %Flow1050
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB3_986
; %bb.985:                              ;   in Loop: Header=BB3_953 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB3_986:                              ; %create_queen.exit.i.i
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v44, v150, v183
	v_dual_mov_b32 v0, 32 :: v_dual_add_nc_u32 v45, 2, v151
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[54:55]
	s_add_u32 s54, s54, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s55, s55, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v146, v0 :: v_dual_mov_b32 v147, v1
	v_dual_mov_b32 v42, v150 :: v_dual_mov_b32 v43, v151
	v_dual_mov_b32 v177, v176 :: v_dual_mov_b32 v0, 32
	v_mov_b32_e32 v1, 0
	s_clause 0x1
	global_store_b128 v[146:147], v[42:45], off
	global_store_b128 v[146:147], v[176:179], off offset:16
	flat_store_b64 v[162:163], v[146:147] offset:16
	v_add_nc_u32_e32 v45, -2, v151
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v144, v178 :: v_dual_mov_b32 v145, v179
	s_clause 0x1
	global_store_b128 v[0:1], v[42:45], off
	global_store_b128 v[0:1], v[176:179], off offset:16
	global_store_b64 v[146:147], v[0:1], off offset:16
.LBB3_987:                              ; %Flow1056
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_or_b32 exec_lo, exec_lo, s69
	v_dual_mov_b32 v0, v162 :: v_dual_mov_b32 v1, v163
	s_mov_b32 s0, 0
.LBB3_988:                              ;   Parent Loop BB3_1 Depth=1
                                        ;     Parent Loop BB3_953 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v163, v1 :: v_dual_mov_b32 v162, v0
	flat_load_b64 v[0:1], v[0:1] offset:16
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	s_or_b32 s0, vcc_lo, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_988
; %bb.989:                              ; %_ZdlPv.exit.i
                                        ;   in Loop: Header=BB3_953 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	flat_load_b64 v[21:22], v[160:161] offset:16
	v_dual_mov_b32 v0, v160 :: v_dual_mov_b32 v1, v161
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_mov_b32 v161, v22 :: v_dual_mov_b32 v160, v21
	s_or_b32 s68, vcc_lo, s68
	s_and_not1_b32 exec_lo, exec_lo, s68
	s_cbranch_execnz .LBB3_953
; %bb.990:                              ; %Flow1064
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s68
.LBB3_991:                              ; %Flow1065
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s62
	v_mov_b32_e32 v18, 1
	s_branch .LBB3_685
.LBB3_992:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_710
.LBB3_993:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_711
.LBB3_994:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_752
.LBB3_995:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_753
.LBB3_996:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_794
.LBB3_997:                              ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_795
.LBB3_998:                              ; %create_queen.exit114.i481
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_mov_b32_e32 v0, 32
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[54:55]
	s_add_u32 s54, s54, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s55, s55, __ockl_dm_alloc@rel32@hi+12
	v_mov_b32_e32 v1, 0
	v_cndmask_b32_e64 v183, 2, -2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v148, s49, v183
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v160, v0 :: v_dual_mov_b32 v161, v1
	v_dual_mov_b32 v146, s49 :: v_dual_mov_b32 v147, s53
	v_dual_mov_b32 v149, s65 :: v_dual_mov_b32 v178, v144
	v_dual_mov_b32 v177, v176 :: v_dual_mov_b32 v0, 32
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v179, v145
	s_clause 0x1
	global_store_b128 v[160:161], v[146:149], off
	global_store_b128 v[160:161], v[176:179], off offset:16
	s_add_i32 s53, s65, -4
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v162, v0 :: v_dual_mov_b32 v163, v1
	v_mov_b32_e32 v149, s53
	s_mov_b32 s67, exec_lo
	s_clause 0x1
	global_store_b128 v[162:163], v[146:149], off
	global_store_b128 v[162:163], v[176:179], off offset:16
	global_store_b64 v[160:161], v[162:163], off offset:16
	v_cmpx_ne_u64_e32 0, v[160:161]
	s_cbranch_execz .LBB3_1038
; %bb.999:                              ; %.lr.ph.i484.preheader
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s68, 0
.LBB3_1000:                             ; %NodeBlock343
                                        ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_1018 Depth 3
                                        ;       Child Loop BB3_1035 Depth 3
	s_clause 0x1
	flat_load_b128 v[148:151], v[160:161]
	flat_load_b64 v[164:165], v[160:161] offset:24
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshl_add_u32 v0, v148, 3, v149
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[181:182], 2, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v164, v181
	v_add_co_ci_u32_e32 v1, vcc_lo, v165, v182, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_1006
; %bb.1001:                             ; %NodeBlock341
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.1002:                             ; %LeafBlock339
                                        ;   in Loop: Header=BB3_1000 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.1003:                             ; %Flow1185
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_and_not1_saveexec_b32 s4, s4
; %bb.1004:                             ; %LeafBlock337
                                        ;   in Loop: Header=BB3_1000 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.1005:                             ; %Flow1186
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_1006:                             ; %Flow1184
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_1012
; %bb.1007:                             ; %NodeBlock335
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.1008:                             ; %LeafBlock333
                                        ;   in Loop: Header=BB3_1000 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.1009:                             ; %Flow1188
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.1010:                             ; %LeafBlock331
                                        ;   in Loop: Header=BB3_1000 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.1011:                             ; %Flow1189
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_1012:                             ; %Flow1187
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.1013:                             ;   in Loop: Header=BB3_1000 Depth=2
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.1014:                             ; %Flow1190
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.1015:                             ;   in Loop: Header=BB3_1000 Depth=2
	v_mov_b32_e32 v4, 1
; %bb.1016:                             ; %pawn_owner.exit.i.i488
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v0, v164 :: v_dual_mov_b32 v1, v165
	v_dual_mov_b32 v2, v148 :: v_dual_mov_b32 v3, v149
	v_dual_mov_b32 v5, v150 :: v_dual_mov_b32 v6, v151
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s69, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_1034
; %bb.1017:                             ;   in Loop: Header=BB3_1000 Depth=2
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_mov_b32 s53, s52
	s_mov_b32 s54, s52
	s_mov_b32 s55, s52
	v_dual_mov_b32 v178, v0 :: v_dual_mov_b32 v179, v1
	v_dual_mov_b32 v0, s52 :: v_dual_mov_b32 v1, s53
	v_dual_mov_b32 v2, s54 :: v_dual_mov_b32 v3, s55
	s_clause 0x1
	global_store_b128 v[178:179], v[0:3], off offset:264
	global_store_b128 v[178:179], v[0:3], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	s_mov_b64 s[0:1], 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[146:147] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	flat_store_b64 v[144:145], v[178:179] offset:272
	s_clause 0x2
	global_store_b128 v[178:179], v[144:147], off offset:280
	global_store_b8 v[178:179], v0, off offset:304
	global_store_b64 v[178:179], v[166:167], off offset:312
.LBB3_1018:                             ;   Parent Loop BB3_1 Depth=1
                                        ;     Parent Loop BB3_1000 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_add_co_u32 v0, vcc_lo, v164, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v165, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v178, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v179, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
	s_cbranch_scc1 .LBB3_1018
; %bb.1019:                             ; %copy_board.exit.i.i500
                                        ;   in Loop: Header=BB3_1000 Depth=2
	flat_load_b32 v0, v[146:147] offset:256
	v_add_co_u32 v2, vcc_lo, v178, v181
	v_add_co_ci_u32_e32 v3, vcc_lo, v179, v182, vcc_lo
	v_add_nc_u32_e32 v1, v151, v149
	s_mov_b32 s1, 0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v5, 31, v1
	v_add_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 1, v1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[146:147], v0 offset:256
	global_load_b32 v6, v[2:3], off
	v_add_nc_u32_e32 v0, v150, v148
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 31, v0
	v_add_lshl_u32 v0, v0, v4, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, -8, v0
	v_lshl_add_u32 v0, v150, 3, v151
	v_add_nc_u32_e32 v4, v4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v178, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v179, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, v178, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, v179, v5, vcc_lo
	s_waitcnt vmcnt(0)
	s_clause 0x2
	global_store_b32 v[0:1], v6, off
	global_store_b32 v[2:3], v180, off
	global_store_b32 v[4:5], v180, off
	v_cmpx_lt_i32_e32 6, v150
	s_xor_b32 s0, exec_lo, s0
; %bb.1020:                             ; %LeafBlock347
                                        ;   in Loop: Header=BB3_1000 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 7, v150
	s_and_b32 s1, vcc_lo, exec_lo
; %bb.1021:                             ; %Flow1181
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_and_not1_saveexec_b32 s0, s0
; %bb.1022:                             ; %LeafBlock345
                                        ;   in Loop: Header=BB3_1000 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 0, v150
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s2, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s1, s1, s2
; %bb.1023:                             ; %Flow1182
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_1033
; %bb.1024:                             ;   in Loop: Header=BB3_1000 Depth=2
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 2, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_1033
; %bb.1025:                             ; %NodeBlock353
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_mov_b32 s1, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_i32_e32 6, v150
	s_xor_b32 s2, exec_lo, s2
; %bb.1026:                             ;   in Loop: Header=BB3_1000 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_and_b32 s1, vcc_lo, exec_lo
; %bb.1027:                             ; %Flow1176
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB3_1031
; %bb.1028:                             ; %LeafBlock351
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_mov_b32 s3, -1
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v150
; %bb.1029:                             ;   in Loop: Header=BB3_1000 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_or_not1_b32 s3, vcc_lo, exec_lo
; %bb.1030:                             ; %Flow1178
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s3, s3, exec_lo
	s_or_b32 s1, s1, s3
.LBB3_1031:                             ; %Flow1177
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB3_1033
; %bb.1032:                             ;   in Loop: Header=BB3_1000 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB3_1033:                             ; %create_queen.exit.i.i503
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v44, v150, v183
	v_dual_mov_b32 v0, 32 :: v_dual_add_nc_u32 v45, 2, v151
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[54:55]
	s_add_u32 s54, s54, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s55, s55, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v146, v0 :: v_dual_mov_b32 v147, v1
	v_dual_mov_b32 v42, v150 :: v_dual_mov_b32 v43, v151
	v_dual_mov_b32 v177, v176 :: v_dual_mov_b32 v0, 32
	v_mov_b32_e32 v1, 0
	s_clause 0x1
	global_store_b128 v[146:147], v[42:45], off
	global_store_b128 v[146:147], v[176:179], off offset:16
	flat_store_b64 v[162:163], v[146:147] offset:16
	v_add_nc_u32_e32 v45, -2, v151
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v144, v178 :: v_dual_mov_b32 v145, v179
	s_clause 0x1
	global_store_b128 v[0:1], v[42:45], off
	global_store_b128 v[0:1], v[176:179], off offset:16
	global_store_b64 v[146:147], v[0:1], off offset:16
.LBB3_1034:                             ; %Flow1183
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_or_b32 exec_lo, exec_lo, s69
	v_dual_mov_b32 v0, v162 :: v_dual_mov_b32 v1, v163
	s_mov_b32 s0, 0
.LBB3_1035:                             ;   Parent Loop BB3_1 Depth=1
                                        ;     Parent Loop BB3_1000 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v163, v1 :: v_dual_mov_b32 v162, v0
	flat_load_b64 v[0:1], v[0:1] offset:16
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	s_or_b32 s0, vcc_lo, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_1035
; %bb.1036:                             ; %_ZdlPv.exit.i494
                                        ;   in Loop: Header=BB3_1000 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	flat_load_b64 v[21:22], v[160:161] offset:16
	v_dual_mov_b32 v0, v160 :: v_dual_mov_b32 v1, v161
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_mov_b32 v161, v22 :: v_dual_mov_b32 v160, v21
	s_or_b32 s68, vcc_lo, s68
	s_and_not1_b32 exec_lo, exec_lo, s68
	s_cbranch_execnz .LBB3_1000
; %bb.1037:                             ; %Flow1191
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s68
.LBB3_1038:                             ; %Flow1192
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s67
	v_mov_b32_e32 v18, 1
	s_branch .LBB3_819
.LBB3_1039:                             ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v177, v176
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	v_add_co_u32 v2, vcc_lo, 0x110, v144
	s_clause 0x1
	global_store_b128 v[0:1], v[176:179], off offset:264
	global_store_b64 v[0:1], v[176:177], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	global_store_b64 v[0:1], v[166:167], off offset:312
	flat_store_b64 v[144:145], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(1)
	global_store_b128 v[0:1], v[144:147], off offset:280
                                        ; implicit-def: $vgpr144_vgpr145
	s_branch .LBB3_838
.LBB3_1040:                             ;   in Loop: Header=BB3_1 Depth=1
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v2, vcc_lo, 0x108, v144
	v_mov_b32_e32 v177, v176
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v145, vcc_lo
	v_mov_b32_e32 v178, v176
	v_mov_b32_e32 v179, v176
	global_store_b64 v[0:1], v[176:177], off offset:264
	flat_store_b64 v[144:145], v[0:1] offset:264
	s_clause 0x2
	global_store_b64 v[0:1], v[144:145], off offset:288
	global_store_b64 v[0:1], v[166:167], off offset:312
	global_store_b128 v[0:1], v[176:179], off offset:272
	s_branch .LBB3_839
.LBB3_1041:                             ; %create_queen.exit114.i437
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_mov_b32_e32 v0, 32
	s_mov_b64 s[8:9], s[46:47]
	s_add_i32 s57, s65, 4
	s_getpc_b64 s[54:55]
	s_add_u32 s54, s54, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s55, s55, __ockl_dm_alloc@rel32@hi+12
	v_cndmask_b32_e64 v183, 2, -2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v148, s49, v183
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v160, v0 :: v_dual_mov_b32 v161, v1
	v_dual_mov_b32 v146, s49 :: v_dual_mov_b32 v147, s53
	v_dual_mov_b32 v149, s57 :: v_dual_mov_b32 v178, v144
	v_dual_mov_b32 v177, v176 :: v_dual_mov_b32 v0, 32
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v179, v145
	s_clause 0x1
	global_store_b128 v[160:161], v[146:149], off
	global_store_b128 v[160:161], v[176:179], off offset:16
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v162, v0 :: v_dual_mov_b32 v163, v1
	v_mov_b32_e32 v149, s65
	s_mov_b32 s49, exec_lo
	s_clause 0x1
	global_store_b128 v[162:163], v[146:149], off
	global_store_b128 v[162:163], v[176:179], off offset:16
	global_store_b64 v[160:161], v[162:163], off offset:16
	v_cmpx_ne_u64_e32 0, v[160:161]
	s_cbranch_execz .LBB3_1081
; %bb.1042:                             ; %.lr.ph.i440.preheader
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_mov_b32 s57, 0
.LBB3_1043:                             ; %NodeBlock391
                                        ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_1061 Depth 3
                                        ;       Child Loop BB3_1078 Depth 3
	s_clause 0x1
	flat_load_b128 v[148:151], v[160:161]
	flat_load_b64 v[164:165], v[160:161] offset:24
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $sgpr0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshl_add_u32 v0, v148, 3, v149
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[181:182], 2, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v164, v181
	v_add_co_ci_u32_e32 v1, vcc_lo, v165, v182, vcc_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB3_1049
; %bb.1044:                             ; %NodeBlock389
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s4, exec_lo, s4
; %bb.1045:                             ; %LeafBlock387
                                        ;   in Loop: Header=BB3_1043 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 22, v0
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.1046:                             ; %Flow1145
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_and_not1_saveexec_b32 s4, s4
; %bb.1047:                             ; %LeafBlock385
                                        ;   in Loop: Header=BB3_1043 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 11, v0
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.1048:                             ; %Flow1146
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr0
.LBB3_1049:                             ; %Flow1144
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_or_saveexec_b32 s3, s3
	v_mov_b32_e32 v4, s0
	s_xor_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB3_1055
; %bb.1050:                             ; %NodeBlock383
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_mov_b32 s4, s2
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr5
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s0, exec_lo, s0
; %bb.1051:                             ; %LeafBlock381
                                        ;   in Loop: Header=BB3_1043 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 2, v0
	s_and_not1_b32 s4, s2, exec_lo
	s_mov_b32 s5, 2
                                        ; implicit-def: $vgpr0
	s_and_b32 s6, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s6
; %bb.1052:                             ; %Flow1148
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_or_saveexec_b32 s6, s0
	s_mov_b32 s0, s1
	s_xor_b32 exec_lo, exec_lo, s6
; %bb.1053:                             ; %LeafBlock379
                                        ;   in Loop: Header=BB3_1043 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	v_cmp_ne_u32_e64 s0, 1, v0
	s_and_not1_b32 s7, s1, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s9, s0, exec_lo
	s_or_b32 s0, s7, s8
	s_or_b32 s4, s4, s9
; %bb.1054:                             ; %Flow1149
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v4, s5
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_or_b32 s1, s1, s0
	s_or_b32 s2, s2, s4
.LBB3_1055:                             ; %Flow1147
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s0, s2
; %bb.1056:                             ;   in Loop: Header=BB3_1043 Depth=2
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 s1, s1, exec_lo
; %bb.1057:                             ; %Flow1150
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.1058:                             ;   in Loop: Header=BB3_1043 Depth=2
	v_mov_b32_e32 v4, 1
; %bb.1059:                             ; %pawn_owner.exit.i.i444
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v0, v164 :: v_dual_mov_b32 v1, v165
	v_dual_mov_b32 v2, v148 :: v_dual_mov_b32 v3, v149
	v_dual_mov_b32 v5, v150 :: v_dual_mov_b32 v6, v151
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, is_move_correct@rel32@lo+4
	s_addc_u32 s1, s1, is_move_correct@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_and_b32_e32 v0, 1, v0
	s_mov_b32 s63, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB3_1077
; %bb.1060:                             ;   in Loop: Header=BB3_1043 Depth=2
	v_dual_mov_b32 v0, 0x148 :: v_dual_mov_b32 v1, 0
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_mov_b32 s53, s52
	s_mov_b32 s54, s52
	s_mov_b32 s55, s52
	v_dual_mov_b32 v178, v0 :: v_dual_mov_b32 v179, v1
	v_dual_mov_b32 v0, s52 :: v_dual_mov_b32 v1, s53
	v_dual_mov_b32 v2, s54 :: v_dual_mov_b32 v3, s55
	s_clause 0x1
	global_store_b128 v[178:179], v[0:3], off offset:264
	global_store_b128 v[178:179], v[0:3], off offset:288
	flat_load_b64 v[146:147], v[144:145] offset:288
	s_mov_b64 s[0:1], 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_u8 v0, v[146:147] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_xor_b32_e32 v0, 1, v0
	flat_store_b64 v[144:145], v[178:179] offset:272
	s_clause 0x2
	global_store_b128 v[178:179], v[144:147], off offset:280
	global_store_b8 v[178:179], v0, off offset:304
	global_store_b64 v[178:179], v[166:167], off offset:312
.LBB3_1061:                             ;   Parent Loop BB3_1 Depth=1
                                        ;     Parent Loop BB3_1043 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_add_co_u32 v0, vcc_lo, v164, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v165, vcc_lo
	flat_load_b32 v2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v178, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v179, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
	s_cbranch_scc1 .LBB3_1061
; %bb.1062:                             ; %copy_board.exit.i.i456
                                        ;   in Loop: Header=BB3_1043 Depth=2
	flat_load_b32 v0, v[146:147] offset:256
	v_add_co_u32 v2, vcc_lo, v178, v181
	v_add_co_ci_u32_e32 v3, vcc_lo, v179, v182, vcc_lo
	v_add_nc_u32_e32 v1, v151, v149
	s_mov_b32 s1, 0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v5, 31, v1
	v_add_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 1, v1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	flat_store_b32 v[146:147], v0 offset:256
	global_load_b32 v6, v[2:3], off
	v_add_nc_u32_e32 v0, v150, v148
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 31, v0
	v_add_lshl_u32 v0, v0, v4, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, -8, v0
	v_lshl_add_u32 v0, v150, 3, v151
	v_add_nc_u32_e32 v4, v4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v178, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v179, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, v178, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, v179, v5, vcc_lo
	s_waitcnt vmcnt(0)
	s_clause 0x2
	global_store_b32 v[0:1], v6, off
	global_store_b32 v[2:3], v180, off
	global_store_b32 v[4:5], v180, off
	v_cmpx_lt_i32_e32 6, v150
	s_xor_b32 s0, exec_lo, s0
; %bb.1063:                             ; %LeafBlock395
                                        ;   in Loop: Header=BB3_1043 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 7, v150
	s_and_b32 s1, vcc_lo, exec_lo
; %bb.1064:                             ; %Flow1141
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_and_not1_saveexec_b32 s0, s0
; %bb.1065:                             ; %LeafBlock393
                                        ;   in Loop: Header=BB3_1043 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 0, v150
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s2, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s1, s1, s2
; %bb.1066:                             ; %Flow1142
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_1076
; %bb.1067:                             ;   in Loop: Header=BB3_1043 Depth=2
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 2, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_1076
; %bb.1068:                             ; %NodeBlock401
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_mov_b32 s1, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_i32_e32 6, v150
	s_xor_b32 s2, exec_lo, s2
; %bb.1069:                             ;   in Loop: Header=BB3_1043 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 1, v2
	s_and_b32 s1, vcc_lo, exec_lo
; %bb.1070:                             ; %Flow1136
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB3_1074
; %bb.1071:                             ; %LeafBlock399
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_mov_b32 s3, -1
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v150
; %bb.1072:                             ;   in Loop: Header=BB3_1043 Depth=2
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_or_not1_b32 s3, vcc_lo, exec_lo
; %bb.1073:                             ; %Flow1138
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s1, exec_lo
	s_and_b32 s3, s3, exec_lo
	s_or_b32 s1, s1, s3
.LBB3_1074:                             ; %Flow1137
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB3_1076
; %bb.1075:                             ;   in Loop: Header=BB3_1043 Depth=2
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cndmask_b32_e64 v2, 22, 11, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB3_1076:                             ; %create_queen.exit.i.i459
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v44, v150, v183
	v_dual_mov_b32 v0, 32 :: v_dual_add_nc_u32 v45, 2, v151
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[54:55]
	s_add_u32 s54, s54, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s55, s55, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v146, v0 :: v_dual_mov_b32 v147, v1
	v_dual_mov_b32 v42, v150 :: v_dual_mov_b32 v43, v151
	v_dual_mov_b32 v177, v176 :: v_dual_mov_b32 v0, 32
	v_mov_b32_e32 v1, 0
	s_clause 0x1
	global_store_b128 v[146:147], v[42:45], off
	global_store_b128 v[146:147], v[176:179], off offset:16
	flat_store_b64 v[162:163], v[146:147] offset:16
	v_add_nc_u32_e32 v45, -2, v151
	s_swappc_b64 s[30:31], s[54:55]
	v_dual_mov_b32 v144, v178 :: v_dual_mov_b32 v145, v179
	s_clause 0x1
	global_store_b128 v[0:1], v[42:45], off
	global_store_b128 v[0:1], v[176:179], off offset:16
	global_store_b64 v[146:147], v[0:1], off offset:16
.LBB3_1077:                             ; %Flow1143
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_or_b32 exec_lo, exec_lo, s63
	v_dual_mov_b32 v0, v162 :: v_dual_mov_b32 v1, v163
	s_mov_b32 s0, 0
.LBB3_1078:                             ;   Parent Loop BB3_1 Depth=1
                                        ;     Parent Loop BB3_1043 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v163, v1 :: v_dual_mov_b32 v162, v0
	flat_load_b64 v[0:1], v[0:1] offset:16
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	s_or_b32 s0, vcc_lo, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_1078
; %bb.1079:                             ; %_ZdlPv.exit.i450
                                        ;   in Loop: Header=BB3_1043 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	flat_load_b64 v[21:22], v[160:161] offset:16
	v_dual_mov_b32 v0, v160 :: v_dual_mov_b32 v1, v161
	s_mov_b64 s[8:9], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_mov_b32 v161, v22 :: v_dual_mov_b32 v160, v21
	s_or_b32 s57, vcc_lo, s57
	s_and_not1_b32 exec_lo, exec_lo, s57
	s_cbranch_execnz .LBB3_1043
; %bb.1080:                             ; %Flow1151
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s57
.LBB3_1081:                             ; %Flow1152
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s49
	v_mov_b32_e32 v18, 1
	s_branch .LBB3_863
.LBB3_1082:
	s_clause 0x5
	scratch_load_b32 v45, off, s33
	scratch_load_b32 v44, off, s33 offset:4
	scratch_load_b32 v43, off, s33 offset:8
	scratch_load_b32 v42, off, s33 offset:12
	scratch_load_b32 v41, off, s33 offset:16
	scratch_load_b32 v40, off, s33 offset:20
	v_readlane_b32 s30, v47, 9
	v_readlane_b32 s31, v47, 10
	v_readlane_b32 s74, v47, 8
	v_readlane_b32 s73, v47, 7
	v_readlane_b32 s72, v47, 6
	v_readlane_b32 s71, v47, 5
	v_readlane_b32 s70, v47, 4
	v_readlane_b32 s69, v47, 3
	v_readlane_b32 s68, v47, 2
	v_readlane_b32 s67, v47, 1
	v_readlane_b32 s66, v47, 0
	v_readlane_b32 s65, v46, 31
	v_readlane_b32 s64, v46, 30
	v_readlane_b32 s63, v46, 29
	v_readlane_b32 s62, v46, 28
	v_readlane_b32 s61, v46, 27
	v_readlane_b32 s60, v46, 26
	v_readlane_b32 s59, v46, 25
	v_readlane_b32 s58, v46, 24
	v_readlane_b32 s57, v46, 23
	v_readlane_b32 s56, v46, 22
	v_readlane_b32 s55, v46, 21
	v_readlane_b32 s54, v46, 20
	v_readlane_b32 s53, v46, 19
	v_readlane_b32 s52, v46, 18
	v_readlane_b32 s51, v46, 17
	v_readlane_b32 s50, v46, 16
	v_readlane_b32 s49, v46, 15
	v_readlane_b32 s48, v46, 14
	v_readlane_b32 s47, v46, 13
	v_readlane_b32 s46, v46, 12
	v_readlane_b32 s45, v46, 11
	v_readlane_b32 s44, v46, 10
	v_readlane_b32 s43, v46, 9
	v_readlane_b32 s42, v46, 8
	v_readlane_b32 s41, v46, 7
	v_readlane_b32 s40, v46, 6
	v_readlane_b32 s39, v46, 5
	v_readlane_b32 s38, v46, 4
	v_readlane_b32 s37, v46, 3
	v_readlane_b32 s36, v46, 2
	v_readlane_b32 s35, v46, 1
	v_readlane_b32 s34, v46, 0
	v_readlane_b32 s0, v47, 11
	s_or_saveexec_b32 s1, -1
	s_clause 0x1
	scratch_load_b32 v46, off, s33 offset:24
	scratch_load_b32 v47, off, s33 offset:28
	s_mov_b32 exec_lo, s1
	s_addk_i32 s32, 0xffd0
	s_mov_b32 s33, s0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end3:
	.size	ramification, .Lfunc_end3-ramification
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 34620
; NumSgprs: 77
; NumVgprs: 184
; ScratchSize: 56
; MemoryBound: 0
	.text
	.protected	create_tree             ; -- Begin function create_tree
	.globl	create_tree
	.p2align	8
	.type	create_tree,@function
create_tree:                            ; @create_tree
; %bb.0:
	s_mov_b64 s[76:77], s[0:1]
	s_load_b32 s1, s[0:1], 0x24
	s_load_b32 s0, s[76:77], 0x0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 s1, s1, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[43:44], null, s15, s1, v[0:1]
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_i32_e64 s0, v43
	s_cbranch_execz .LBB4_20
; %bb.1:
	s_load_b128 s[80:83], s[76:77], 0x8
	v_mov_b32_e32 v40, s0
	s_mov_b32 s75, 0
	s_mov_b32 s79, 0
                                        ; implicit-def: $sgpr0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v41, s80 :: v_dual_mov_b32 v42, s81
	s_max_i32 s78, s82, 0
.LBB4_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB4_10 Depth 2
	s_or_b32 s0, s0, exec_lo
	s_cmp_eq_u32 s79, s78
	s_cbranch_scc1 .LBB4_18
; %bb.3:                                ;   in Loop: Header=BB4_2 Depth=1
	s_add_i32 s79, s79, 1
	v_cmp_eq_u32_e32 vcc_lo, 0, v43
	s_cmp_eq_u32 s79, s82
	s_cselect_b32 s0, -1, 0
	s_cmp_lg_u32 s79, s82
	s_cselect_b32 s80, -1, 0
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s81, s0
	s_cbranch_execz .LBB4_5
; %bb.4:                                ;   in Loop: Header=BB4_2 Depth=1
	v_dual_mov_b32 v0, v41 :: v_dual_mov_b32 v1, v42
	v_dual_mov_b32 v2, s82 :: v_dual_mov_b32 v3, s83
	s_add_u32 s8, s76, 24
	s_addc_u32 s9, s77, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, ramification@rel32@lo+4
	s_addc_u32 s1, s1, ramification@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
.LBB4_5:                                ;   in Loop: Header=BB4_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s81
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s80
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB4_17
; %bb.6:                                ;   in Loop: Header=BB4_2 Depth=1
	flat_load_b32 v0, v[41:42] offset:256
	v_ashrrev_i32_e32 v5, 31, v40
	s_mov_b32 s0, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v40, v5
	v_xor_b32_e32 v6, v6, v5
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v0, v1
	v_xor_b32_e32 v2, v2, v1
	v_xor_b32_e32 v1, v5, v1
	v_ashrrev_i32_e32 v5, 31, v43
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v3, v2
	v_sub_nc_u32_e32 v4, 0, v2
	v_rcp_iflag_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x4f7ffffe, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v3, v3
	v_mul_lo_u32 v4, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v4
	v_add_nc_u32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v6, v3
	v_mul_lo_u32 v4, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v4, v6, v4
	v_add_nc_u32_e32 v6, 1, v3
	v_sub_nc_u32_e32 v7, v4, v2
	v_cmp_ge_u32_e32 vcc_lo, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v4, v7 :: v_dual_cndmask_b32 v3, v3, v6
	v_cmp_ge_u32_e32 vcc_lo, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, 1, v3
	v_cndmask_b32_e32 v2, v3, v6, vcc_lo
	v_add_nc_u32_e32 v6, v43, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v2, v2, v1
	v_xor_b32_e32 v6, v6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v40, v2, v1
	v_ashrrev_i32_e32 v1, 31, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v40, v1
	v_xor_b32_e32 v2, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v3, v2
	v_sub_nc_u32_e32 v4, 0, v2
	v_rcp_iflag_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x4f7ffffe, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v3, v3
	v_mul_lo_u32 v4, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v4
	v_add_nc_u32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v6, v3
	v_mul_lo_u32 v4, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v4, v6, v4
	v_add_nc_u32_e32 v6, 1, v3
	v_sub_nc_u32_e32 v7, v4, v2
	v_cmp_ge_u32_e32 vcc_lo, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v4, v4, v7, vcc_lo
	v_cndmask_b32_e32 v6, v3, v6, vcc_lo
	v_xor_b32_e32 v3, v5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_ge_u32_e32 vcc_lo, v4, v2
	v_add_nc_u32_e32 v7, 1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, v6, v7, vcc_lo
	v_xor_b32_e32 v4, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v4, v3
	v_cmpx_lt_i32_e64 v2, v0
	s_cbranch_execz .LBB4_16
; %bb.7:                                ;   in Loop: Header=BB4_2 Depth=1
	flat_load_b64 v[0:1], v[41:42] offset:264
	v_mov_b32_e32 v41, 0
	v_mov_b32_e32 v42, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execz .LBB4_15
; %bb.8:                                ; %.preheader
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_lt_i32_e32 0, v2
	s_cbranch_execz .LBB4_12
; %bb.9:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB4_2 Depth=1
	v_xad_u32 v3, v3, -1, v4
	s_mov_b32 s4, 0
.LBB4_10:                               ; %.lr.ph
                                        ;   Parent Loop BB4_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_b64 v[0:1], v[0:1] offset:272
	v_cmp_eq_u32_e64 s0, 0, v3
	v_add_nc_u32_e32 v3, -1, v3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s0, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB4_10
; %bb.11:                               ; %Flow65
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
.LBB4_12:                               ; %Flow66
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v41, 0
	v_mov_b32_e32 v42, 0
	s_mov_b32 s0, 0
	s_mov_b32 s3, exec_lo
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execz .LBB4_14
; %bb.13:                               ;   in Loop: Header=BB4_2 Depth=1
	v_dual_mov_b32 v42, v1 :: v_dual_mov_b32 v41, v0
	s_mov_b32 s0, exec_lo
	s_barrier
	buffer_gl0_inv
.LBB4_14:                               ; %Flow
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB4_15:                               ; %Flow67
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_mul_lo_u32 v0, v2, v40
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v43, v43, v0
.LBB4_16:                               ;   in Loop: Header=BB4_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_xor_b32 s0, s0, -1
	s_branch .LBB4_19
.LBB4_17:                               ;   in Loop: Header=BB4_2 Depth=1
	s_mov_b32 s0, -1
.LBB4_18:                               ;   in Loop: Header=BB4_2 Depth=1
                                        ; implicit-def: $vgpr43
                                        ; implicit-def: $sgpr79
                                        ; implicit-def: $vgpr41_vgpr42
                                        ; implicit-def: $vgpr40
.LBB4_19:                               ; %Flow68
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s0
	s_or_b32 s75, s1, s75
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s75
	s_cbranch_execnz .LBB4_2
.LBB4_20:                               ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel create_tree
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 56
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 184
		.amdhsa_next_free_sgpr 84
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	create_tree, .Lfunc_end4-create_tree
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 888
; NumSgprs: 86
; NumVgprs: 184
; ScratchSize: 56
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 10
; VGPRBlocks: 22
; NumSGPRsForWavesPerEU: 86
; NumVGPRsForWavesPerEU: 184
; Occupancy: 8
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	delete_tree             ; -- Begin function delete_tree
	.globl	delete_tree
	.p2align	8
	.type	delete_tree,@function
delete_tree:                            ; @delete_tree
; %bb.0:
	s_mov_b64 s[20:21], s[0:1]
	s_load_b32 s0, s[0:1], 0x24
	s_load_b64 s[22:23], s[20:21], 0x10
	v_mov_b32_e32 v4, 0
	s_mov_b32 s24, exec_lo
	s_mov_b32 s32, 0
	ds_store_b32 v4, v4
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, s15, s0, v[0:1]
	v_cmpx_eq_u32_e32 0, v21
	s_cbranch_execz .LBB5_31
; %bb.1:
	s_load_b64 s[0:1], s[20:21], 0x0
	v_mov_b32_e32 v22, 0
	v_mov_b32_e32 v23, 0
	s_mov_b64 s[2:3], 0
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[0:1], s[0:1], 0x108
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u64 s[0:1], 0
	s_cbranch_scc1 .LBB5_5
; %bb.2:                                ; %.cont64.preheader
	v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
	s_mov_b32 s2, 0
	s_mov_b32 s3, 0
.LBB5_3:                                ; %.cont64
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v23, v1 :: v_dual_mov_b32 v22, v0
	flat_load_b64 v[0:1], v[0:1] offset:272
	s_add_i32 s3, s3, 1
	v_mov_b32_e32 v4, s3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB5_3
; %bb.4:                                ; %Flow116
	s_or_b32 exec_lo, exec_lo, s2
	s_mov_b64 s[2:3], s[0:1]
.LBB5_5:                                ; %_ZN5Queue3addEP14checkers_point.exit
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v0, 0
	s_mov_b32 s26, 0
	s_mov_b32 s25, exec_lo
	v_cmpx_ne_u32_e32 0, v4
	s_cbranch_execz .LBB5_21
; %bb.6:                                ; %.lr.ph.preheader
	s_load_b32 s27, s[20:21], 0x8
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
                                        ; implicit-def: $sgpr28
.LBB5_7:                                ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB5_17 Depth 2
	flat_load_b32 v2, v[0:1] offset:256
	s_or_b32 s28, s28, exec_lo
	s_mov_b32 s29, exec_lo
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $vgpr24_vgpr25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s27, v2
	s_cbranch_execnz .LBB5_9
.LBB5_8:                                ; %Flow113
                                        ;   in Loop: Header=BB5_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s29
	v_dual_mov_b32 v8, v4 :: v_dual_mov_b32 v3, v1
	v_mov_b32_e32 v2, v0
	v_dual_mov_b32 v0, v24 :: v_dual_mov_b32 v1, v25
	v_mov_b32_e32 v4, v26
	s_and_b32 s0, exec_lo, s28
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s26, s0, s26
	s_and_not1_b32 exec_lo, exec_lo, s26
	s_cbranch_execnz .LBB5_7
	s_branch .LBB5_20
.LBB5_9:                                ;   in Loop: Header=BB5_7 Depth=1
	flat_load_b64 v[24:25], v[0:1] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e64 s1, 0, v[24:25]
	v_cmp_ne_u64_e32 vcc_lo, 0, v[24:25]
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB5_11
; %bb.10:                               ;   in Loop: Header=BB5_7 Depth=1
	flat_load_b64 v[2:3], v[0:1] offset:288
	flat_load_b64 v[5:6], v[24:25] offset:288
	s_and_not1_b32 s1, s1, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u64_e64 s0, v[2:3], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s1, s1, s0
.LBB5_11:                               ; %Flow112
                                        ;   in Loop: Header=BB5_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB5_13
; %bb.12:                               ;   in Loop: Header=BB5_7 Depth=1
	flat_load_b64 v[2:3], v[0:1] offset:296
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b64 v[0:1], v[2:3] offset:272
.LBB5_13:                               ; %_ZN5Queue3popEv.exit
                                        ;   in Loop: Header=BB5_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	flat_load_b64 v[2:3], v[0:1] offset:264
	v_add_nc_u32_e32 v26, -1, v4
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u64_e32 0, v[2:3]
	s_cbranch_execz .LBB5_19
; %bb.14:                               ;   in Loop: Header=BB5_7 Depth=1
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB5_16
; %bb.15:                               ; %.else63
                                        ;   in Loop: Header=BB5_7 Depth=1
	v_dual_mov_b32 v4, v24 :: v_dual_mov_b32 v5, v25
	flat_store_b64 v[22:23], v[2:3] offset:272
.LBB5_16:                               ; %.cont61
                                        ;   in Loop: Header=BB5_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s0, 0
	s_mov_b32 s2, 0
.LBB5_17:                               ;   Parent Loop BB5_7 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v23, v3 :: v_dual_mov_b32 v22, v2
	flat_load_b64 v[2:3], v[2:3] offset:272
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v6, s2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_or_b32 s0, vcc_lo, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB5_17
; %bb.18:                               ; %_ZN5Queue3addEP14checkers_point.exit28
                                        ;   in Loop: Header=BB5_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v25, v5 :: v_dual_add_nc_u32 v26, v6, v26
	v_mov_b32_e32 v24, v4
.LBB5_19:                               ; %Flow111
                                        ;   in Loop: Header=BB5_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_u32 s8, s20, 24
	s_addc_u32 s9, s21, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_cmp_eq_u32_e32 vcc_lo, 0, v26
	v_mov_b32_e32 v0, v24
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v1, v25
	s_and_not1_b32 s0, s28, exec_lo
	s_and_b32 s1, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s28, s0, s1
	s_branch .LBB5_8
.LBB5_20:                               ; %.critedge.loopexit
	s_or_b32 exec_lo, exec_lo, s26
	v_mov_b32_e32 v0, 0
	ds_load_b32 v0, v0
.LBB5_21:                               ; %Flow115
	s_or_b32 exec_lo, exec_lo, s25
	v_cmp_ne_u32_e32 vcc_lo, 0, v8
	s_mov_b32 s1, 0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB5_31
; %bb.22:                               ; %.lr.ph78.preheader
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[0:1]
	v_add_co_u32 v4, vcc_lo, s22, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s23, v5, vcc_lo
.LBB5_23:                               ; %.lr.ph78
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u64_e32 0, v[2:3]
	s_cbranch_execz .LBB5_29
; %bb.24:                               ;   in Loop: Header=BB5_23 Depth=1
	flat_load_b64 v[6:7], v[2:3] offset:272
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e64 s2, 0, v[6:7]
	v_cmpx_ne_u64_e32 0, v[6:7]
	s_cbranch_execz .LBB5_26
; %bb.25:                               ;   in Loop: Header=BB5_23 Depth=1
	flat_load_b64 v[9:10], v[2:3] offset:288
	flat_load_b64 v[11:12], v[6:7] offset:288
	s_and_not1_b32 s2, s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[9:10], v[11:12]
	s_and_b32 s4, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s4
.LBB5_26:                               ; %Flow105
                                        ;   in Loop: Header=BB5_23 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB5_28
; %bb.27:                               ;   in Loop: Header=BB5_23 Depth=1
	flat_load_b64 v[9:10], v[2:3] offset:296
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b64 v[2:3], v[9:10] offset:272
.LBB5_28:                               ;   in Loop: Header=BB5_23 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v8, -1, v8
.LBB5_29:                               ; %Flow107
                                        ;   in Loop: Header=BB5_23 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	global_store_b64 v[4:5], v[2:3], off
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	v_add_co_u32 v4, s0, v4, 8
	v_mov_b32_e32 v2, v6
	v_dual_mov_b32 v3, v7 :: v_dual_add_nc_u32 v0, 1, v0
	v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB5_23
; %bb.30:                               ; %..loopexit67_crit_edge
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v1, 0
	ds_store_b32 v1, v0
.LBB5_31:                               ; %Flow119
	s_or_b32 exec_lo, exec_lo, s24
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v0, 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s0, exec_lo
	ds_load_b32 v0, v0
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_i32_e64 v21, v0
	s_cbranch_execz .LBB5_49
; %bb.32:                               ; %_ZN5Queue7add_oneEP14checkers_point.exit
	v_ashrrev_i32_e32 v22, 31, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[21:22]
	v_add_co_u32 v0, vcc_lo, s22, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s23, v1, vcc_lo
	global_load_b64 v[21:22], v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, 0, v[21:22]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB5_49
; %bb.33:                               ; %.lr.ph83.preheader
	v_dual_mov_b32 v25, 1 :: v_dual_mov_b32 v0, v21
	v_mov_b32_e32 v1, v22
	s_mov_b32 s22, 0
.LBB5_34:                               ; %.lr.ph83
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB5_44 Depth 2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB5_40
; %bb.35:                               ;   in Loop: Header=BB5_34 Depth=1
	flat_load_b64 v[23:24], v[0:1] offset:272
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e64 s2, 0, v[23:24]
	v_cmpx_ne_u64_e32 0, v[23:24]
	s_cbranch_execz .LBB5_37
; %bb.36:                               ;   in Loop: Header=BB5_34 Depth=1
	flat_load_b64 v[2:3], v[0:1] offset:288
	flat_load_b64 v[4:5], v[23:24] offset:288
	s_and_not1_b32 s2, s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u64_e64 s0, v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s2, s2, s0
.LBB5_37:                               ; %Flow101
                                        ;   in Loop: Header=BB5_34 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB5_39
; %bb.38:                               ;   in Loop: Header=BB5_34 Depth=1
	flat_load_b64 v[2:3], v[0:1] offset:296
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b64 v[0:1], v[2:3] offset:272
.LBB5_39:                               ;   in Loop: Header=BB5_34 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v25, -1, v25
.LBB5_40:                               ; %Flow102
                                        ;   in Loop: Header=BB5_34 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	flat_load_b64 v[2:3], v[0:1] offset:264
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u64_e32 0, v[2:3]
	s_cbranch_execz .LBB5_46
; %bb.41:                               ;   in Loop: Header=BB5_34 Depth=1
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_mov_b32 s2, exec_lo
	v_cmpx_ne_u64_e32 0, v[23:24]
	s_cbranch_execz .LBB5_43
; %bb.42:                               ; %.else
                                        ;   in Loop: Header=BB5_34 Depth=1
	v_dual_mov_b32 v4, v23 :: v_dual_mov_b32 v5, v24
	flat_store_b64 v[21:22], v[2:3] offset:272
.LBB5_43:                               ; %.cont
                                        ;   in Loop: Header=BB5_34 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_mov_b32 s2, 0
	s_mov_b32 s3, 0
.LBB5_44:                               ;   Parent Loop BB5_34 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v22, v3 :: v_dual_mov_b32 v21, v2
	flat_load_b64 v[2:3], v[2:3] offset:272
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v6, s3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e64 s0, 0, v[2:3]
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB5_44
; %bb.45:                               ; %_ZN5Queue3addEP14checkers_point.exit39
                                        ;   in Loop: Header=BB5_34 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_dual_mov_b32 v24, v5 :: v_dual_add_nc_u32 v25, v6, v25
	v_mov_b32_e32 v23, v4
.LBB5_46:                               ; %Flow
                                        ;   in Loop: Header=BB5_34 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s23, vcc_lo
	s_cbranch_execnz .LBB5_48
.LBB5_47:                               ;   in Loop: Header=BB5_34 Depth=1
	s_or_b32 exec_lo, exec_lo, s23
	v_cmp_eq_u32_e32 vcc_lo, 0, v25
	v_dual_mov_b32 v0, v23 :: v_dual_mov_b32 v1, v24
	s_or_b32 s22, vcc_lo, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s22
	s_cbranch_execnz .LBB5_34
	s_branch .LBB5_49
.LBB5_48:                               ; %_ZdlPv.exit41
                                        ;   in Loop: Header=BB5_34 Depth=1
	s_add_u32 s8, s20, 24
	s_addc_u32 s9, s21, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_branch .LBB5_47
.LBB5_49:                               ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel delete_tree
		.amdhsa_group_segment_fixed_size 4
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 27
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	delete_tree, .Lfunc_end5-delete_tree
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1460
; NumSgprs: 35
; NumVgprs: 27
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 27
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2align	2                               ; -- Begin function minmax
	.type	minmax,@function
minmax:                                 ; @minmax
; %bb.0:                                ; %_ZN5Queue7add_oneEP14checkers_point.exit
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s0, s33
	s_mov_b32 s33, s32
	s_or_saveexec_b32 s1, -1
	scratch_store_b32 off, v41, s33 offset:4 ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s1
	v_writelane_b32 v41, s0, 21
	s_add_i32 s32, s32, 16
	scratch_store_b32 off, v40, s33         ; 4-byte Folded Spill
	v_writelane_b32 v41, s34, 0
	v_writelane_b32 v41, s35, 1
	v_writelane_b32 v41, s36, 2
	v_writelane_b32 v41, s37, 3
	v_writelane_b32 v41, s38, 4
	v_writelane_b32 v41, s39, 5
	v_writelane_b32 v41, s40, 6
	v_writelane_b32 v41, s41, 7
	v_writelane_b32 v41, s42, 8
	v_writelane_b32 v41, s43, 9
	v_writelane_b32 v41, s44, 10
	v_writelane_b32 v41, s45, 11
	v_writelane_b32 v41, s46, 12
	v_writelane_b32 v41, s47, 13
	v_writelane_b32 v41, s48, 14
	v_writelane_b32 v41, s49, 15
	v_writelane_b32 v41, s50, 16
	v_writelane_b32 v41, s51, 17
	v_writelane_b32 v41, s52, 18
	v_writelane_b32 v41, s30, 19
	v_writelane_b32 v41, s31, 20
	v_dual_mov_b32 v145, v1 :: v_dual_mov_b32 v144, v0
	v_mov_b32_e32 v0, 0
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v10, 0
	s_mov_b32 s48, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	v_cmpx_ne_u64_e32 0, v[144:145]
	s_cbranch_execz .LBB6_350
; %bb.1:                                ; %.lr.ph.preheader
	v_dual_mov_b32 v146, 0 :: v_dual_mov_b32 v181, 0
	v_dual_mov_b32 v147, 0 :: v_dual_mov_b32 v180, 1
	v_mov_b32_e32 v167, v145
	v_mov_b32_e32 v151, v145
	v_mov_b32_e32 v149, 0
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mov_b32 v161, v147 :: v_dual_mov_b32 v166, v144
	v_dual_mov_b32 v163, v147 :: v_dual_mov_b32 v150, v144
	v_mov_b32_e32 v160, v146
	v_mov_b32_e32 v162, v146
	s_mov_b32 s46, 0x7ae147ae
	s_mov_b32 s47, 0x3fdfae14
	s_mov_b32 s49, 0
.LBB6_2:                                ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB6_21 Depth 2
                                        ;     Child Loop BB6_27 Depth 2
                                        ;     Child Loop BB6_49 Depth 2
                                        ;       Child Loop BB6_50 Depth 3
                                        ;     Child Loop BB6_65 Depth 2
                                        ;       Child Loop BB6_66 Depth 3
                                        ;         Child Loop BB6_75 Depth 4
                                        ;         Child Loop BB6_134 Depth 4
                                        ;         Child Loop BB6_193 Depth 4
                                        ;         Child Loop BB6_252 Depth 4
                                        ;     Child Loop BB6_314 Depth 2
                                        ;       Child Loop BB6_315 Depth 3
	v_cmp_ne_u64_e64 s45, 0, v[166:167]
	v_dual_mov_b32 v165, v147 :: v_dual_mov_b32 v164, v146
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s0, s45
	s_cbranch_execz .LBB6_8
; %bb.3:                                ;   in Loop: Header=BB6_2 Depth=1
	flat_load_b64 v[164:165], v[166:167] offset:272
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e64 s1, 0, v[164:165]
	v_cmpx_ne_u64_e32 0, v[164:165]
	s_cbranch_execz .LBB6_5
; %bb.4:                                ;   in Loop: Header=BB6_2 Depth=1
	flat_load_b64 v[0:1], v[166:167] offset:288
	flat_load_b64 v[2:3], v[164:165] offset:288
	s_and_not1_b32 s1, s1, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[0:1], v[2:3]
	s_and_b32 s3, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s1, s1, s3
.LBB6_5:                                ; %Flow494
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB6_7
; %bb.6:                                ;   in Loop: Header=BB6_2 Depth=1
	flat_load_b64 v[0:1], v[166:167] offset:296
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b64 v[166:167], v[0:1] offset:272
.LBB6_7:                                ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v180, -1, v180
.LBB6_8:                                ; %Flow495
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	flat_load_b32 v0, v[166:167] offset:312
	s_mov_b32 s0, 0
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e64 s2, 0xc4653600, v0
	v_cmpx_eq_u32_e32 0xc4653600, v0
	s_cbranch_execz .LBB6_10
; %bb.9:                                ;   in Loop: Header=BB6_2 Depth=1
	flat_load_b32 v0, v[166:167] offset:316
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0x3b9aca00, v0
	s_and_b32 s3, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s3
.LBB6_10:                               ; %Flow491
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr0_vgpr1
                                        ; implicit-def: $vgpr10
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s1, s2
	s_cbranch_execz .LBB6_16
; %bb.11:                               ;   in Loop: Header=BB6_2 Depth=1
	v_mov_b32_e32 v2, v162
	v_dual_mov_b32 v0, v160 :: v_dual_mov_b32 v1, v161
	v_dual_mov_b32 v10, v181 :: v_dual_mov_b32 v3, v163
	s_and_saveexec_b32 s2, s45
	s_cbranch_execz .LBB6_15
; %bb.12:                               ;   in Loop: Header=BB6_2 Depth=1
	v_dual_mov_b32 v0, v166 :: v_dual_mov_b32 v1, v167
	s_mov_b32 s3, exec_lo
	v_cmpx_ne_u64_e32 0, v[160:161]
	s_cbranch_execz .LBB6_14
; %bb.13:                               ;   in Loop: Header=BB6_2 Depth=1
	flat_load_b64 v[2:3], v[162:163] offset:272
	v_dual_mov_b32 v0, v160 :: v_dual_mov_b32 v1, v161
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b64 v[162:163], v[2:3] offset:296
	flat_store_b64 v[162:163], v[166:167] offset:272
.LBB6_14:                               ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v2, v166
	v_dual_mov_b32 v3, v167 :: v_dual_add_nc_u32 v10, 1, v181
.LBB6_15:                               ; %Flow340
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s0, s0, exec_lo
.LBB6_16:                               ; %Flow492
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s50, s0
	s_cbranch_execz .LBB6_25
; %bb.17:                               ;   in Loop: Header=BB6_2 Depth=1
	flat_load_b64 v[2:3], v[166:167] offset:264
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr0_vgpr1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u64_e32 0, v[2:3]
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB6_23
; %bb.18:                               ;   in Loop: Header=BB6_2 Depth=1
	v_dual_mov_b32 v0, v2 :: v_dual_mov_b32 v1, v3
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u64_e32 0, v[164:165]
	s_cbranch_execz .LBB6_20
; %bb.19:                               ; %.else
                                        ;   in Loop: Header=BB6_2 Depth=1
	v_dual_mov_b32 v0, v164 :: v_dual_mov_b32 v1, v165
	flat_store_b64 v[150:151], v[2:3] offset:272
.LBB6_20:                               ; %.cont
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s1, 0
	s_mov_b32 s2, 0
.LBB6_21:                               ;   Parent Loop BB6_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v151, v3 :: v_dual_mov_b32 v150, v2
	flat_load_b64 v[2:3], v[2:3] offset:272
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB6_21
; %bb.22:                               ; %_ZN5Queue3addEP14checkers_point.exit
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v180, v4, v180
                                        ; implicit-def: $vgpr166_vgpr167
                                        ; implicit-def: $vgpr164_vgpr165
.LBB6_23:                               ; %Flow489
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_and_not1_saveexec_b32 s51, s0
	s_cbranch_execnz .LBB6_26
.LBB6_24:                               ; %Flow490
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s51
	v_dual_mov_b32 v2, v162 :: v_dual_mov_b32 v3, v163
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v165, v1 :: v_dual_mov_b32 v164, v0
	v_mov_b32_e32 v10, v181
	v_dual_mov_b32 v0, v160 :: v_dual_mov_b32 v1, v161
.LBB6_25:                               ; %_ZN5Queue7add_oneEP14checkers_point.exit38
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s50
	v_cmp_eq_u32_e32 vcc_lo, 0, v180
	v_mov_b32_e32 v167, v165
	v_dual_mov_b32 v163, v3 :: v_dual_mov_b32 v162, v2
	v_dual_mov_b32 v161, v1 :: v_dual_mov_b32 v160, v0
	v_dual_mov_b32 v181, v10 :: v_dual_mov_b32 v166, v164
	s_or_b32 s49, vcc_lo, s49
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s49
	s_cbranch_execnz .LBB6_2
	s_branch .LBB6_349
.LBB6_26:                               ; %.preheader.preheader
                                        ;   in Loop: Header=BB6_2 Depth=1
	v_mov_b32_e32 v182, 0
	s_mov_b64 s[0:1], 0
.LBB6_27:                               ; %NodeBlock122
                                        ;   Parent Loop BB6_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v0, vcc_lo, v166, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v167, vcc_lo
	s_mov_b32 s2, exec_lo
	flat_load_b32 v0, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v0
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB6_37
; %bb.28:                               ; %NodeBlock120
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_mov_b32 s3, exec_lo
	v_cmpx_lt_i32_e32 21, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB6_32
; %bb.29:                               ; %LeafBlock118
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 22, v0
; %bb.30:                               ;   in Loop: Header=BB6_27 Depth=2
	v_add_nc_u32_e32 v182, -5, v182
; %bb.31:                               ; %Flow479
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
                                        ; implicit-def: $vgpr0
.LBB6_32:                               ; %Flow481
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB6_36
; %bb.33:                               ; %LeafBlock116
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 11, v0
; %bb.34:                               ;   in Loop: Header=BB6_27 Depth=2
	v_add_nc_u32_e32 v182, 5, v182
; %bb.35:                               ; %Flow480
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
.LBB6_36:                               ; %Flow482
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
                                        ; implicit-def: $vgpr0
.LBB6_37:                               ; %Flow487
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB6_47
; %bb.38:                               ; %NodeBlock
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_mov_b32 s3, exec_lo
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB6_42
; %bb.39:                               ; %LeafBlock114
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 2, v0
; %bb.40:                               ;   in Loop: Header=BB6_27 Depth=2
	v_add_nc_u32_e32 v182, -3, v182
; %bb.41:                               ; %Flow483
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
                                        ; implicit-def: $vgpr0
.LBB6_42:                               ; %Flow485
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB6_46
; %bb.43:                               ; %LeafBlock
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 1, v0
; %bb.44:                               ;   in Loop: Header=BB6_27 Depth=2
	v_add_nc_u32_e32 v182, 3, v182
; %bb.45:                               ; %Flow484
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
.LBB6_46:                               ; %Flow486
                                        ;   in Loop: Header=BB6_27 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
.LBB6_47:                               ;   in Loop: Header=BB6_27 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x100
	s_cbranch_scc1 .LBB6_27
; %bb.48:                               ; %.preheader.i.i.preheader
                                        ;   in Loop: Header=BB6_2 Depth=1
	v_dual_mov_b32 v0, v166 :: v_dual_mov_b32 v3, 0
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, v167
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, 0
	s_mov_b32 s2, 0
.LBB6_49:                               ; %.preheader.i.i
                                        ;   Parent Loop BB6_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB6_50 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, s2, 7
	s_mov_b64 s[0:1], 0
.LBB6_50:                               ; %NodeBlock128
                                        ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_49 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v6, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v1, vcc_lo
	s_mov_b32 s4, exec_lo
	flat_load_b32 v6, v[6:7]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 1, v6
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB6_54
; %bb.51:                               ; %LeafBlock126
                                        ;   in Loop: Header=BB6_50 Depth=3
	s_mov_b32 s5, exec_lo
	v_cmpx_eq_u32_e32 2, v6
; %bb.52:                               ;   in Loop: Header=BB6_50 Depth=3
	v_add_nc_u32_e32 v2, 1, v2
	v_add_nc_u32_e32 v3, s2, v3
; %bb.53:                               ; %Flow476
                                        ;   in Loop: Header=BB6_50 Depth=3
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr6
.LBB6_54:                               ; %Flow478
                                        ;   in Loop: Header=BB6_50 Depth=3
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB6_58
; %bb.55:                               ; %LeafBlock124
                                        ;   in Loop: Header=BB6_50 Depth=3
	s_mov_b32 s5, exec_lo
	v_cmpx_eq_u32_e32 1, v6
; %bb.56:                               ;   in Loop: Header=BB6_50 Depth=3
	v_add_nc_u32_e32 v5, 1, v5
	v_add_nc_u32_e32 v4, s3, v4
; %bb.57:                               ; %Flow477
                                        ;   in Loop: Header=BB6_50 Depth=3
	s_or_b32 exec_lo, exec_lo, s5
.LBB6_58:                               ;   in Loop: Header=BB6_50 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 32
	s_cbranch_scc0 .LBB6_50
; %bb.59:                               ;   in Loop: Header=BB6_49 Depth=2
	v_add_co_u32 v0, vcc_lo, v0, 32
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, 8
	s_cbranch_scc0 .LBB6_49
; %bb.60:                               ;   in Loop: Header=BB6_2 Depth=1
	v_mov_b32_e32 v176, 0
	v_mov_b32_e32 v177, 0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v179, v177 :: v_dual_mov_b32 v178, v176
	v_cmpx_ne_u32_e32 0, v5
	s_cbranch_execz .LBB6_62
; %bb.61:                               ;   in Loop: Header=BB6_2 Depth=1
	v_cvt_f64_i32_e32 v[0:1], v4
	v_cvt_f64_i32_e32 v[4:5], v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], v[0:1]
	v_rcp_f64_e32 v[8:9], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_div_scale_f64 v[10:11], vcc_lo, v[0:1], v[4:5], v[0:1]
	v_mul_f64 v[12:13], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[6:7], v[12:13], v[10:11]
	v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[178:179], v[6:7], v[4:5], v[0:1]
.LBB6_62:                               ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB6_64
; %bb.63:                               ;   in Loop: Header=BB6_2 Depth=1
	v_cvt_f64_i32_e32 v[0:1], v3
	v_cvt_f64_i32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[4:5], null, v[2:3], v[2:3], v[0:1]
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_div_scale_f64 v[8:9], vcc_lo, v[0:1], v[2:3], v[0:1]
	v_mul_f64 v[10:11], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[4:5], v[10:11], v[8:9]
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[176:177], v[4:5], v[2:3], v[0:1]
.LBB6_64:                               ; %calculate_dist_to_be_queen.exit.i
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v0, 0x100 :: v_dual_mov_b32 v1, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_mov_b32 s52, 0
	s_swappc_b64 s[30:31], s[0:1]
	v_add_co_u32 v6, vcc_lo, v166, 4
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v167, vcc_lo
.LBB6_65:                               ; %.preheader225.i.i
                                        ;   Parent Loop BB6_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB6_66 Depth 3
                                        ;         Child Loop BB6_75 Depth 4
                                        ;         Child Loop BB6_134 Depth 4
                                        ;         Child Loop BB6_193 Depth 4
                                        ;         Child Loop BB6_252 Depth 4
	s_lshl_b32 s3, s52, 3
	s_add_i32 s4, s52, -1
	s_cmp_gt_u32 s52, 1
	s_mov_b32 s0, s52
	s_cselect_b32 s5, -1, 0
	s_add_i32 s52, s52, 1
	v_mov_b32_e32 v10, 0
	s_cmp_lt_u32 s0, 6
	s_mov_b32 s6, 0
	s_cselect_b32 s7, -1, 0
.LBB6_66:                               ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_65 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB6_75 Depth 4
                                        ;         Child Loop BB6_134 Depth 4
                                        ;         Child Loop BB6_193 Depth 4
                                        ;         Child Loop BB6_252 Depth 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v148, s3, v10
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_mov_b32 s0, exec_lo
	v_lshlrev_b64 v[2:3], 2, v[148:149]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v0, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, v1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v166, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, v167, v3, vcc_lo
	global_store_b32 v[4:5], v149, off
	flat_load_b32 v4, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 21, v4
	s_xor_b32 s0, exec_lo, s0
; %bb.67:                               ; %LeafBlock132
                                        ;   in Loop: Header=BB6_66 Depth=3
	v_cmp_ne_u32_e32 vcc_lo, 22, v4
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr4
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.68:                               ; %Flow470
                                        ;   in Loop: Header=BB6_66 Depth=3
	s_and_not1_saveexec_b32 s10, s0
; %bb.69:                               ; %LeafBlock130
                                        ;   in Loop: Header=BB6_66 Depth=3
	v_cmp_eq_u32_e32 vcc_lo, 11, v4
	v_cmp_ne_u32_e64 s0, 11, v4
	s_and_not1_b32 s1, s1, exec_lo
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s11, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s1, s1, s11
	s_or_b32 s2, s2, s0
; %bb.70:                               ; %Flow471
                                        ;   in Loop: Header=BB6_66 Depth=3
	s_or_b32 exec_lo, exec_lo, s10
	v_add_nc_u32_e32 v8, 1, v10
                                        ; implicit-def: $vgpr4
	s_and_saveexec_b32 s0, s2
; %bb.71:                               ; %..loopexit_crit_edge.i.i
                                        ;   in Loop: Header=BB6_66 Depth=3
	v_add_nc_u32_e32 v4, 1, v10
	s_and_not1_b32 s1, s1, exec_lo
; %bb.72:                               ; %Flow472
                                        ;   in Loop: Header=BB6_66 Depth=3
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s10, s1
	s_cbranch_execz .LBB6_311
; %bb.73:                               ;   in Loop: Header=BB6_66 Depth=3
	v_cmp_lt_u32_e32 vcc_lo, 1, v10
	v_add_nc_u32_e32 v9, -1, v10
	s_and_b32 s0, s5, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB6_132
; %bb.74:                               ; %.lr.ph.i.i.preheader
                                        ;   in Loop: Header=BB6_66 Depth=3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, v9
	s_mov_b32 s11, 0
.LBB6_75:                               ; %.lr.ph.i.i
                                        ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_65 Depth=2
                                        ;       Parent Loop BB6_66 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v4, v11, 3, v12
	s_mov_b32 s12, -1
	s_mov_b32 s1, -1
	s_mov_b32 s13, exec_lo
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v13, s0, v166, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s0, v167, v5, s0
	flat_load_b32 v13, v[13:14]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v13
	s_cbranch_execz .LBB6_129
; %bb.76:                               ; %NodeBlock148
                                        ;   in Loop: Header=BB6_75 Depth=4
	flat_load_b32 v15, v[2:3]
	s_mov_b32 s15, 0
	s_mov_b32 s14, 0
	s_mov_b32 s16, exec_lo
                                        ; implicit-def: $sgpr1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v15
	s_xor_b32 s16, exec_lo, s16
	s_cbranch_execz .LBB6_82
; %bb.77:                               ; %NodeBlock146
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_mov_b32 s17, exec_lo
                                        ; implicit-def: $sgpr1
	v_cmpx_lt_i32_e32 21, v15
	s_xor_b32 s17, exec_lo, s17
; %bb.78:                               ; %LeafBlock144
                                        ;   in Loop: Header=BB6_75 Depth=4
	v_cmp_ne_u32_e64 s0, 22, v15
	s_mov_b32 s1, 2
                                        ; implicit-def: $vgpr15
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s15, s0, exec_lo
; %bb.79:                               ; %Flow456
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_and_not1_saveexec_b32 s17, s17
; %bb.80:                               ; %LeafBlock142
                                        ;   in Loop: Header=BB6_75 Depth=4
	v_cmp_ne_u32_e64 s0, 11, v15
	s_and_not1_b32 s15, s15, exec_lo
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s15, s15, s0
; %bb.81:                               ; %Flow457
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s14, s14, exec_lo
	s_and_b32 s15, s15, exec_lo
                                        ; implicit-def: $vgpr15
.LBB6_82:                               ; %Flow455
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_saveexec_b32 s16, s16
	v_mov_b32_e32 v14, s1
	s_xor_b32 exec_lo, exec_lo, s16
	s_cbranch_execz .LBB6_88
; %bb.83:                               ; %NodeBlock140
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_mov_b32 s17, s15
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $sgpr18
	v_cmpx_lt_i32_e32 1, v15
	s_xor_b32 s1, exec_lo, s1
; %bb.84:                               ; %LeafBlock138
                                        ;   in Loop: Header=BB6_75 Depth=4
	v_cmp_ne_u32_e64 s0, 2, v15
	s_and_not1_b32 s17, s15, exec_lo
	s_mov_b32 s18, 2
                                        ; implicit-def: $vgpr15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s17, s17, s0
; %bb.85:                               ; %Flow459
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_saveexec_b32 s19, s1
	s_mov_b32 s0, s14
	s_xor_b32 exec_lo, exec_lo, s19
; %bb.86:                               ; %LeafBlock136
                                        ;   in Loop: Header=BB6_75 Depth=4
	v_cmp_eq_u32_e64 s0, 1, v15
	v_cmp_ne_u32_e64 s1, 1, v15
	s_and_not1_b32 s20, s14, exec_lo
	s_and_not1_b32 s17, s17, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 s0, s0, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s0, s20, s0
	s_or_b32 s17, s17, s1
; %bb.87:                               ; %Flow460
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s19
	v_mov_b32_e32 v14, s18
	s_and_not1_b32 s1, s14, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s15, s15, exec_lo
	s_and_b32 s17, s17, exec_lo
	s_or_b32 s14, s1, s0
	s_or_b32 s15, s15, s17
.LBB6_88:                               ; %Flow458
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s16
	s_and_saveexec_b32 s0, s15
; %bb.89:                               ;   in Loop: Header=BB6_75 Depth=4
	v_mov_b32_e32 v14, 0
	s_and_not1_b32 s14, s14, exec_lo
; %bb.90:                               ; %Flow461
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s14
; %bb.91:                               ;   in Loop: Header=BB6_75 Depth=4
	v_mov_b32_e32 v14, 1
; %bb.92:                               ; %pawn_owner.exit.i.i
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s15, 0
	s_mov_b32 s14, 0
	s_mov_b32 s16, exec_lo
                                        ; implicit-def: $sgpr1
	v_cmpx_lt_i32_e32 10, v13
	s_xor_b32 s16, exec_lo, s16
	s_cbranch_execz .LBB6_98
; %bb.93:                               ; %NodeBlock160
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_mov_b32 s17, exec_lo
                                        ; implicit-def: $sgpr1
	v_cmpx_lt_i32_e32 21, v13
	s_xor_b32 s17, exec_lo, s17
; %bb.94:                               ; %LeafBlock158
                                        ;   in Loop: Header=BB6_75 Depth=4
	v_cmp_ne_u32_e64 s0, 22, v13
	s_mov_b32 s1, 2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s15, s0, exec_lo
; %bb.95:                               ; %Flow449
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_and_not1_saveexec_b32 s17, s17
; %bb.96:                               ; %LeafBlock156
                                        ;   in Loop: Header=BB6_75 Depth=4
	v_cmp_ne_u32_e64 s0, 11, v13
	s_and_not1_b32 s15, s15, exec_lo
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s15, s15, s0
; %bb.97:                               ; %Flow450
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s14, s14, exec_lo
	s_and_b32 s15, s15, exec_lo
.LBB6_98:                               ; %Flow448
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_saveexec_b32 s16, s16
	v_mov_b32_e32 v15, s1
	s_xor_b32 exec_lo, exec_lo, s16
	s_cbranch_execz .LBB6_104
; %bb.99:                               ; %NodeBlock154
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_mov_b32 s17, s15
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $sgpr18
	v_cmpx_lt_i32_e32 1, v13
	s_xor_b32 s1, exec_lo, s1
; %bb.100:                              ; %LeafBlock152
                                        ;   in Loop: Header=BB6_75 Depth=4
	v_cmp_ne_u32_e64 s0, 2, v13
	s_and_not1_b32 s17, s15, exec_lo
	s_mov_b32 s18, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s17, s17, s0
; %bb.101:                              ; %Flow452
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_saveexec_b32 s19, s1
	s_mov_b32 s0, s14
	s_xor_b32 exec_lo, exec_lo, s19
; %bb.102:                              ; %LeafBlock150
                                        ;   in Loop: Header=BB6_75 Depth=4
	v_cmp_eq_u32_e64 s0, 1, v13
	v_cmp_ne_u32_e64 s1, 1, v13
	s_and_not1_b32 s20, s14, exec_lo
	s_and_not1_b32 s17, s17, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 s0, s0, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s0, s20, s0
	s_or_b32 s17, s17, s1
; %bb.103:                              ; %Flow453
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s19
	v_mov_b32_e32 v15, s18
	s_and_not1_b32 s1, s14, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s15, s15, exec_lo
	s_and_b32 s17, s17, exec_lo
	s_or_b32 s14, s1, s0
	s_or_b32 s15, s15, s17
.LBB6_104:                              ; %Flow451
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s16
	s_and_saveexec_b32 s0, s15
; %bb.105:                              ;   in Loop: Header=BB6_75 Depth=4
	v_mov_b32_e32 v15, 0
	s_and_not1_b32 s14, s14, exec_lo
; %bb.106:                              ; %Flow454
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s14
; %bb.107:                              ;   in Loop: Header=BB6_75 Depth=4
	v_mov_b32_e32 v15, 1
; %bb.108:                              ; %pawn_owner.exit194.i.i
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s1, 0
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v14, v15
	s_cbranch_execz .LBB6_128
; %bb.109:                              ;   in Loop: Header=BB6_75 Depth=4
	v_add_nc_u32_e32 v11, -1, v11
	v_add_nc_u32_e32 v12, -1, v12
	s_mov_b32 s15, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v14, v11, 3, v12
	v_ashrrev_i32_e32 v15, 31, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	v_add_co_u32 v14, s0, v166, v14
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v15, s0, v167, v15, s0
	flat_load_b32 v14, v[14:15]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 0, v14
	s_cbranch_execz .LBB6_127
; %bb.110:                              ; %NodeBlock176
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_mov_b32 s17, 0
	s_mov_b32 s16, 0
	s_mov_b32 s18, exec_lo
                                        ; implicit-def: $sgpr1
	v_cmpx_lt_i32_e32 10, v13
	s_xor_b32 s18, exec_lo, s18
	s_cbranch_execz .LBB6_116
; %bb.111:                              ; %NodeBlock174
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_mov_b32 s19, exec_lo
                                        ; implicit-def: $sgpr1
	v_cmpx_lt_i32_e32 21, v13
	s_xor_b32 s19, exec_lo, s19
; %bb.112:                              ; %LeafBlock172
                                        ;   in Loop: Header=BB6_75 Depth=4
	v_cmp_ne_u32_e64 s0, 22, v13
	s_mov_b32 s1, 2
                                        ; implicit-def: $vgpr13
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s17, s0, exec_lo
; %bb.113:                              ; %Flow442
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_and_not1_saveexec_b32 s19, s19
; %bb.114:                              ; %LeafBlock170
                                        ;   in Loop: Header=BB6_75 Depth=4
	v_cmp_ne_u32_e64 s0, 11, v13
	s_and_not1_b32 s17, s17, exec_lo
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s17, s17, s0
; %bb.115:                              ; %Flow443
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s16, s16, exec_lo
	s_and_b32 s17, s17, exec_lo
                                        ; implicit-def: $vgpr13
.LBB6_116:                              ; %Flow441
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_saveexec_b32 s18, s18
	v_mov_b32_e32 v14, s1
	s_xor_b32 exec_lo, exec_lo, s18
	s_cbranch_execz .LBB6_122
; %bb.117:                              ; %NodeBlock168
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_mov_b32 s19, s17
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $sgpr20
	v_cmpx_lt_i32_e32 1, v13
	s_xor_b32 s1, exec_lo, s1
; %bb.118:                              ; %LeafBlock166
                                        ;   in Loop: Header=BB6_75 Depth=4
	v_cmp_ne_u32_e64 s0, 2, v13
	s_and_not1_b32 s19, s17, exec_lo
	s_mov_b32 s20, 2
                                        ; implicit-def: $vgpr13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s19, s19, s0
; %bb.119:                              ; %Flow445
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_saveexec_b32 s21, s1
	s_mov_b32 s0, s16
	s_xor_b32 exec_lo, exec_lo, s21
; %bb.120:                              ; %LeafBlock164
                                        ;   in Loop: Header=BB6_75 Depth=4
	v_cmp_eq_u32_e64 s0, 1, v13
	v_cmp_ne_u32_e64 s1, 1, v13
	s_and_not1_b32 s22, s16, exec_lo
	s_and_not1_b32 s19, s19, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 s0, s0, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s0, s22, s0
	s_or_b32 s19, s19, s1
; %bb.121:                              ; %Flow446
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s21
	v_mov_b32_e32 v14, s20
	s_and_not1_b32 s1, s16, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s17, s17, exec_lo
	s_and_b32 s19, s19, exec_lo
	s_or_b32 s16, s1, s0
	s_or_b32 s17, s17, s19
.LBB6_122:                              ; %Flow444
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s18
	s_and_saveexec_b32 s0, s17
; %bb.123:                              ;   in Loop: Header=BB6_75 Depth=4
	v_mov_b32_e32 v14, 0
	s_and_not1_b32 s16, s16, exec_lo
; %bb.124:                              ; %Flow447
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s16
; %bb.125:                              ;   in Loop: Header=BB6_75 Depth=4
	v_mov_b32_e32 v14, 1
; %bb.126:                              ; %pawn_owner.exit196.i.i
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v4, s0, v0, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, v1, v5, s0
	s_mov_b32 s1, exec_lo
	global_store_b32 v[4:5], v14, off
.LBB6_127:                              ; %Flow466
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
.LBB6_128:                              ; %Flow465
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s1, s1, exec_lo
.LBB6_129:                              ; %Flow464
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s13
	s_and_saveexec_b32 s13, s1
; %bb.130:                              ;   in Loop: Header=BB6_75 Depth=4
	v_min_i32_e32 v4, v12, v11
	v_add_nc_u32_e32 v12, -1, v12
	v_add_nc_u32_e32 v11, -1, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s0, 2, v4
	s_or_not1_b32 s12, s0, exec_lo
; %bb.131:                              ; %Flow467
                                        ;   in Loop: Header=BB6_75 Depth=4
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s12
	s_or_b32 s11, s0, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB6_75
.LBB6_132:                              ; %Flow469
                                        ;   in Loop: Header=BB6_66 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_u32_e64 s0, 6, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s5, s0
	s_and_saveexec_b32 s11, s1
	s_cbranch_execz .LBB6_191
; %bb.133:                              ; %.lr.ph232.i.i.preheader
                                        ;   in Loop: Header=BB6_66 Depth=3
	v_dual_mov_b32 v10, s4 :: v_dual_mov_b32 v11, v8
	s_mov_b32 s12, 0
.LBB6_134:                              ; %.lr.ph232.i.i
                                        ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_65 Depth=2
                                        ;       Parent Loop BB6_66 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v4, v10, 3, v11
	s_mov_b32 s13, -1
	s_mov_b32 s2, -1
	s_mov_b32 s14, exec_lo
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v12, s1, v166, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s1, v167, v5, s1
	flat_load_b32 v12, v[12:13]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v12
	s_cbranch_execz .LBB6_188
; %bb.135:                              ; %NodeBlock190
                                        ;   in Loop: Header=BB6_134 Depth=4
	flat_load_b32 v14, v[2:3]
	s_mov_b32 s16, 0
	s_mov_b32 s15, 0
	s_mov_b32 s17, exec_lo
                                        ; implicit-def: $sgpr2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v14
	s_xor_b32 s17, exec_lo, s17
	s_cbranch_execz .LBB6_141
; %bb.136:                              ; %NodeBlock188
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_mov_b32 s18, exec_lo
                                        ; implicit-def: $sgpr2
	v_cmpx_lt_i32_e32 21, v14
	s_xor_b32 s18, exec_lo, s18
; %bb.137:                              ; %LeafBlock186
                                        ;   in Loop: Header=BB6_134 Depth=4
	v_cmp_ne_u32_e64 s1, 22, v14
	s_mov_b32 s2, 2
                                        ; implicit-def: $vgpr14
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s16, s1, exec_lo
; %bb.138:                              ; %Flow427
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_and_not1_saveexec_b32 s18, s18
; %bb.139:                              ; %LeafBlock184
                                        ;   in Loop: Header=BB6_134 Depth=4
	v_cmp_ne_u32_e64 s1, 11, v14
	s_and_not1_b32 s16, s16, exec_lo
	s_mov_b32 s15, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s16, s16, s1
; %bb.140:                              ; %Flow428
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s15, s15, exec_lo
	s_and_b32 s16, s16, exec_lo
                                        ; implicit-def: $vgpr14
.LBB6_141:                              ; %Flow426
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_saveexec_b32 s17, s17
	v_mov_b32_e32 v13, s2
	s_xor_b32 exec_lo, exec_lo, s17
	s_cbranch_execz .LBB6_147
; %bb.142:                              ; %NodeBlock182
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_mov_b32 s18, s16
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $sgpr19
	v_cmpx_lt_i32_e32 1, v14
	s_xor_b32 s2, exec_lo, s2
; %bb.143:                              ; %LeafBlock180
                                        ;   in Loop: Header=BB6_134 Depth=4
	v_cmp_ne_u32_e64 s1, 2, v14
	s_and_not1_b32 s18, s16, exec_lo
	s_mov_b32 s19, 2
                                        ; implicit-def: $vgpr14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s18, s18, s1
; %bb.144:                              ; %Flow430
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_saveexec_b32 s20, s2
	s_mov_b32 s1, s15
	s_xor_b32 exec_lo, exec_lo, s20
; %bb.145:                              ; %LeafBlock178
                                        ;   in Loop: Header=BB6_134 Depth=4
	v_cmp_eq_u32_e64 s1, 1, v14
	v_cmp_ne_u32_e64 s2, 1, v14
	s_and_not1_b32 s21, s15, exec_lo
	s_and_not1_b32 s18, s18, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_or_b32 s1, s21, s1
	s_or_b32 s18, s18, s2
; %bb.146:                              ; %Flow431
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s20
	v_mov_b32_e32 v13, s19
	s_and_not1_b32 s2, s15, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_and_not1_b32 s16, s16, exec_lo
	s_and_b32 s18, s18, exec_lo
	s_or_b32 s15, s2, s1
	s_or_b32 s16, s16, s18
.LBB6_147:                              ; %Flow429
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	s_and_saveexec_b32 s1, s16
; %bb.148:                              ;   in Loop: Header=BB6_134 Depth=4
	v_mov_b32_e32 v13, 0
	s_and_not1_b32 s15, s15, exec_lo
; %bb.149:                              ; %Flow432
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s1, s15
; %bb.150:                              ;   in Loop: Header=BB6_134 Depth=4
	v_mov_b32_e32 v13, 1
; %bb.151:                              ; %pawn_owner.exit198.i.i
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s16, 0
	s_mov_b32 s15, 0
	s_mov_b32 s17, exec_lo
                                        ; implicit-def: $sgpr2
	v_cmpx_lt_i32_e32 10, v12
	s_xor_b32 s17, exec_lo, s17
	s_cbranch_execz .LBB6_157
; %bb.152:                              ; %NodeBlock202
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_mov_b32 s18, exec_lo
                                        ; implicit-def: $sgpr2
	v_cmpx_lt_i32_e32 21, v12
	s_xor_b32 s18, exec_lo, s18
; %bb.153:                              ; %LeafBlock200
                                        ;   in Loop: Header=BB6_134 Depth=4
	v_cmp_ne_u32_e64 s1, 22, v12
	s_mov_b32 s2, 2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s16, s1, exec_lo
; %bb.154:                              ; %Flow420
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_and_not1_saveexec_b32 s18, s18
; %bb.155:                              ; %LeafBlock198
                                        ;   in Loop: Header=BB6_134 Depth=4
	v_cmp_ne_u32_e64 s1, 11, v12
	s_and_not1_b32 s16, s16, exec_lo
	s_mov_b32 s15, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s16, s16, s1
; %bb.156:                              ; %Flow421
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s15, s15, exec_lo
	s_and_b32 s16, s16, exec_lo
.LBB6_157:                              ; %Flow419
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_saveexec_b32 s17, s17
	v_mov_b32_e32 v14, s2
	s_xor_b32 exec_lo, exec_lo, s17
	s_cbranch_execz .LBB6_163
; %bb.158:                              ; %NodeBlock196
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_mov_b32 s18, s16
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $sgpr19
	v_cmpx_lt_i32_e32 1, v12
	s_xor_b32 s2, exec_lo, s2
; %bb.159:                              ; %LeafBlock194
                                        ;   in Loop: Header=BB6_134 Depth=4
	v_cmp_ne_u32_e64 s1, 2, v12
	s_and_not1_b32 s18, s16, exec_lo
	s_mov_b32 s19, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s18, s18, s1
; %bb.160:                              ; %Flow423
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_saveexec_b32 s20, s2
	s_mov_b32 s1, s15
	s_xor_b32 exec_lo, exec_lo, s20
; %bb.161:                              ; %LeafBlock192
                                        ;   in Loop: Header=BB6_134 Depth=4
	v_cmp_eq_u32_e64 s1, 1, v12
	v_cmp_ne_u32_e64 s2, 1, v12
	s_and_not1_b32 s21, s15, exec_lo
	s_and_not1_b32 s18, s18, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_or_b32 s1, s21, s1
	s_or_b32 s18, s18, s2
; %bb.162:                              ; %Flow424
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s20
	v_mov_b32_e32 v14, s19
	s_and_not1_b32 s2, s15, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_and_not1_b32 s16, s16, exec_lo
	s_and_b32 s18, s18, exec_lo
	s_or_b32 s15, s2, s1
	s_or_b32 s16, s16, s18
.LBB6_163:                              ; %Flow422
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	s_and_saveexec_b32 s1, s16
; %bb.164:                              ;   in Loop: Header=BB6_134 Depth=4
	v_mov_b32_e32 v14, 0
	s_and_not1_b32 s15, s15, exec_lo
; %bb.165:                              ; %Flow425
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s1, s15
; %bb.166:                              ;   in Loop: Header=BB6_134 Depth=4
	v_mov_b32_e32 v14, 1
; %bb.167:                              ; %pawn_owner.exit200.i.i
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s2, 0
	s_mov_b32 s15, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v13, v14
	s_cbranch_execz .LBB6_187
; %bb.168:                              ;   in Loop: Header=BB6_134 Depth=4
	v_add_nc_u32_e32 v10, -1, v10
	v_ashrrev_i32_e32 v14, 31, v11
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v13, 3, v10
	v_ashrrev_i32_e32 v15, 31, v13
	v_add_co_u32 v13, s1, v13, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s1, v15, v14, s1
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s1, v6, v13
	v_add_co_ci_u32_e64 v14, s1, v7, v14, s1
	flat_load_b32 v13, v[13:14]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 0, v13
	s_cbranch_execz .LBB6_186
; %bb.169:                              ; %NodeBlock218
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_mov_b32 s18, 0
	s_mov_b32 s17, 0
	s_mov_b32 s19, exec_lo
                                        ; implicit-def: $sgpr2
	v_cmpx_lt_i32_e32 10, v12
	s_xor_b32 s19, exec_lo, s19
	s_cbranch_execz .LBB6_175
; %bb.170:                              ; %NodeBlock216
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_mov_b32 s20, exec_lo
                                        ; implicit-def: $sgpr2
	v_cmpx_lt_i32_e32 21, v12
	s_xor_b32 s20, exec_lo, s20
; %bb.171:                              ; %LeafBlock214
                                        ;   in Loop: Header=BB6_134 Depth=4
	v_cmp_ne_u32_e64 s1, 22, v12
	s_mov_b32 s2, 2
                                        ; implicit-def: $vgpr12
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s18, s1, exec_lo
; %bb.172:                              ; %Flow413
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_and_not1_saveexec_b32 s20, s20
; %bb.173:                              ; %LeafBlock212
                                        ;   in Loop: Header=BB6_134 Depth=4
	v_cmp_ne_u32_e64 s1, 11, v12
	s_and_not1_b32 s18, s18, exec_lo
	s_mov_b32 s17, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s18, s18, s1
; %bb.174:                              ; %Flow414
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s17, s17, exec_lo
	s_and_b32 s18, s18, exec_lo
                                        ; implicit-def: $vgpr12
.LBB6_175:                              ; %Flow412
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_saveexec_b32 s19, s19
	v_mov_b32_e32 v13, s2
	s_xor_b32 exec_lo, exec_lo, s19
	s_cbranch_execz .LBB6_181
; %bb.176:                              ; %NodeBlock210
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_mov_b32 s20, s18
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $sgpr21
	v_cmpx_lt_i32_e32 1, v12
	s_xor_b32 s2, exec_lo, s2
; %bb.177:                              ; %LeafBlock208
                                        ;   in Loop: Header=BB6_134 Depth=4
	v_cmp_ne_u32_e64 s1, 2, v12
	s_and_not1_b32 s20, s18, exec_lo
	s_mov_b32 s21, 2
                                        ; implicit-def: $vgpr12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s20, s20, s1
; %bb.178:                              ; %Flow416
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_saveexec_b32 s22, s2
	s_mov_b32 s1, s17
	s_xor_b32 exec_lo, exec_lo, s22
; %bb.179:                              ; %LeafBlock206
                                        ;   in Loop: Header=BB6_134 Depth=4
	v_cmp_eq_u32_e64 s1, 1, v12
	v_cmp_ne_u32_e64 s2, 1, v12
	s_and_not1_b32 s23, s17, exec_lo
	s_and_not1_b32 s20, s20, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 s1, s1, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_or_b32 s1, s23, s1
	s_or_b32 s20, s20, s2
; %bb.180:                              ; %Flow417
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s22
	v_mov_b32_e32 v13, s21
	s_and_not1_b32 s2, s17, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_and_not1_b32 s18, s18, exec_lo
	s_and_b32 s20, s20, exec_lo
	s_or_b32 s17, s2, s1
	s_or_b32 s18, s18, s20
.LBB6_181:                              ; %Flow415
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s19
	s_and_saveexec_b32 s1, s18
; %bb.182:                              ;   in Loop: Header=BB6_134 Depth=4
	v_mov_b32_e32 v13, 0
	s_and_not1_b32 s17, s17, exec_lo
; %bb.183:                              ; %Flow418
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s1, s17
; %bb.184:                              ;   in Loop: Header=BB6_134 Depth=4
	v_mov_b32_e32 v13, 1
; %bb.185:                              ; %pawn_owner.exit202.i.i
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v4, s1, v0, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s1, v1, v5, s1
	s_mov_b32 s2, exec_lo
	v_add_nc_u32_e32 v11, 1, v11
	global_store_b32 v[4:5], v13, off
.LBB6_186:                              ; %Flow437
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s2, s2, exec_lo
.LBB6_187:                              ; %Flow436
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s2, s2, exec_lo
.LBB6_188:                              ; %Flow435
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s14
	s_and_saveexec_b32 s14, s2
; %bb.189:                              ;   in Loop: Header=BB6_134 Depth=4
	v_add_nc_u32_e32 v5, 1, v11
	v_add_nc_u32_e32 v4, -1, v10
	v_cmp_gt_i32_e64 s1, 2, v10
	v_cmp_lt_i32_e64 s2, 5, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v11, v5 :: v_dual_mov_b32 v10, v4
	s_or_b32 s1, s2, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s13, s1, exec_lo
; %bb.190:                              ; %Flow438
                                        ;   in Loop: Header=BB6_134 Depth=4
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s13
	s_or_b32 s12, s1, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB6_134
.LBB6_191:                              ; %Flow440
                                        ;   in Loop: Header=BB6_66 Depth=3
	s_or_b32 exec_lo, exec_lo, s11
	s_and_b32 s1, s7, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB6_250
; %bb.192:                              ; %.lr.ph238.i.i.preheader
                                        ;   in Loop: Header=BB6_66 Depth=3
	v_mov_b32_e32 v10, s52
	s_mov_b32 s11, 0
.LBB6_193:                              ; %.lr.ph238.i.i
                                        ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_65 Depth=2
                                        ;       Parent Loop BB6_66 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v4, v10, 3, v9
	s_mov_b32 s12, -1
	s_mov_b32 s1, -1
	s_mov_b32 s13, exec_lo
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v11, vcc_lo, v166, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v167, v5, vcc_lo
	flat_load_b32 v11, v[11:12]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v11
	s_cbranch_execz .LBB6_247
; %bb.194:                              ; %NodeBlock232
                                        ;   in Loop: Header=BB6_193 Depth=4
	flat_load_b32 v13, v[2:3]
	s_mov_b32 s15, 0
	s_mov_b32 s14, 0
	s_mov_b32 s16, exec_lo
                                        ; implicit-def: $sgpr1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v13
	s_xor_b32 s16, exec_lo, s16
	s_cbranch_execz .LBB6_200
; %bb.195:                              ; %NodeBlock230
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_mov_b32 s17, exec_lo
                                        ; implicit-def: $sgpr1
	v_cmpx_lt_i32_e32 21, v13
	s_xor_b32 s17, exec_lo, s17
; %bb.196:                              ; %LeafBlock228
                                        ;   in Loop: Header=BB6_193 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 22, v13
	s_mov_b32 s1, 2
                                        ; implicit-def: $vgpr13
	s_and_b32 s15, vcc_lo, exec_lo
; %bb.197:                              ; %Flow398
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_and_not1_saveexec_b32 s17, s17
; %bb.198:                              ; %LeafBlock226
                                        ;   in Loop: Header=BB6_193 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 11, v13
	s_and_not1_b32 s15, s15, exec_lo
	s_mov_b32 s14, exec_lo
	s_and_b32 s18, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s15, s15, s18
; %bb.199:                              ; %Flow399
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s14, s14, exec_lo
	s_and_b32 s15, s15, exec_lo
                                        ; implicit-def: $vgpr13
.LBB6_200:                              ; %Flow397
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_saveexec_b32 s16, s16
	v_mov_b32_e32 v12, s1
	s_xor_b32 exec_lo, exec_lo, s16
	s_cbranch_execz .LBB6_206
; %bb.201:                              ; %NodeBlock224
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_mov_b32 s17, s15
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $sgpr18
	v_cmpx_lt_i32_e32 1, v13
	s_xor_b32 s1, exec_lo, s1
; %bb.202:                              ; %LeafBlock222
                                        ;   in Loop: Header=BB6_193 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 2, v13
	s_and_not1_b32 s17, s15, exec_lo
	s_mov_b32 s18, 2
                                        ; implicit-def: $vgpr13
	s_and_b32 s19, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s17, s17, s19
; %bb.203:                              ; %Flow401
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_saveexec_b32 s19, s1
	s_mov_b32 s1, s14
	s_xor_b32 exec_lo, exec_lo, s19
; %bb.204:                              ; %LeafBlock220
                                        ;   in Loop: Header=BB6_193 Depth=4
	v_cmp_eq_u32_e32 vcc_lo, 1, v13
	v_cmp_ne_u32_e64 s1, 1, v13
	s_and_not1_b32 s20, s14, exec_lo
	s_and_not1_b32 s17, s17, exec_lo
	s_and_b32 s21, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s22, s1, exec_lo
	s_or_b32 s1, s20, s21
	s_or_b32 s17, s17, s22
; %bb.205:                              ; %Flow402
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s19
	v_mov_b32_e32 v12, s18
	s_and_not1_b32 s14, s14, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_and_not1_b32 s15, s15, exec_lo
	s_and_b32 s17, s17, exec_lo
	s_or_b32 s14, s14, s1
	s_or_b32 s15, s15, s17
.LBB6_206:                              ; %Flow400
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s16
	s_and_saveexec_b32 s1, s15
; %bb.207:                              ;   in Loop: Header=BB6_193 Depth=4
	v_mov_b32_e32 v12, 0
	s_and_not1_b32 s14, s14, exec_lo
; %bb.208:                              ; %Flow403
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s1, s14
; %bb.209:                              ;   in Loop: Header=BB6_193 Depth=4
	v_mov_b32_e32 v12, 1
; %bb.210:                              ; %pawn_owner.exit204.i.i
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s15, 0
	s_mov_b32 s14, 0
	s_mov_b32 s16, exec_lo
                                        ; implicit-def: $sgpr1
	v_cmpx_lt_i32_e32 10, v11
	s_xor_b32 s16, exec_lo, s16
	s_cbranch_execz .LBB6_216
; %bb.211:                              ; %NodeBlock244
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_mov_b32 s17, exec_lo
                                        ; implicit-def: $sgpr1
	v_cmpx_lt_i32_e32 21, v11
	s_xor_b32 s17, exec_lo, s17
; %bb.212:                              ; %LeafBlock242
                                        ;   in Loop: Header=BB6_193 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 22, v11
	s_mov_b32 s1, 2
	s_and_b32 s15, vcc_lo, exec_lo
; %bb.213:                              ; %Flow391
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_and_not1_saveexec_b32 s17, s17
; %bb.214:                              ; %LeafBlock240
                                        ;   in Loop: Header=BB6_193 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 11, v11
	s_and_not1_b32 s15, s15, exec_lo
	s_mov_b32 s14, exec_lo
	s_and_b32 s18, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s15, s15, s18
; %bb.215:                              ; %Flow392
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s14, s14, exec_lo
	s_and_b32 s15, s15, exec_lo
.LBB6_216:                              ; %Flow390
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_saveexec_b32 s16, s16
	v_mov_b32_e32 v13, s1
	s_xor_b32 exec_lo, exec_lo, s16
	s_cbranch_execz .LBB6_222
; %bb.217:                              ; %NodeBlock238
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_mov_b32 s17, s15
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $sgpr18
	v_cmpx_lt_i32_e32 1, v11
	s_xor_b32 s1, exec_lo, s1
; %bb.218:                              ; %LeafBlock236
                                        ;   in Loop: Header=BB6_193 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 2, v11
	s_and_not1_b32 s17, s15, exec_lo
	s_mov_b32 s18, 2
	s_and_b32 s19, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s17, s17, s19
; %bb.219:                              ; %Flow394
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_saveexec_b32 s19, s1
	s_mov_b32 s1, s14
	s_xor_b32 exec_lo, exec_lo, s19
; %bb.220:                              ; %LeafBlock234
                                        ;   in Loop: Header=BB6_193 Depth=4
	v_cmp_eq_u32_e32 vcc_lo, 1, v11
	v_cmp_ne_u32_e64 s1, 1, v11
	s_and_not1_b32 s20, s14, exec_lo
	s_and_not1_b32 s17, s17, exec_lo
	s_and_b32 s21, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s22, s1, exec_lo
	s_or_b32 s1, s20, s21
	s_or_b32 s17, s17, s22
; %bb.221:                              ; %Flow395
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s19
	v_mov_b32_e32 v13, s18
	s_and_not1_b32 s14, s14, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_and_not1_b32 s15, s15, exec_lo
	s_and_b32 s17, s17, exec_lo
	s_or_b32 s14, s14, s1
	s_or_b32 s15, s15, s17
.LBB6_222:                              ; %Flow393
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s16
	s_and_saveexec_b32 s1, s15
; %bb.223:                              ;   in Loop: Header=BB6_193 Depth=4
	v_mov_b32_e32 v13, 0
	s_and_not1_b32 s14, s14, exec_lo
; %bb.224:                              ; %Flow396
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s1, s14
; %bb.225:                              ;   in Loop: Header=BB6_193 Depth=4
	v_mov_b32_e32 v13, 1
; %bb.226:                              ; %pawn_owner.exit206.i.i
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s1, 0
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v12, v13
	s_cbranch_execz .LBB6_246
; %bb.227:                              ;   in Loop: Header=BB6_193 Depth=4
	v_add_nc_u32_e32 v10, 1, v10
	v_add_nc_u32_e32 v9, -1, v9
	s_mov_b32 s15, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v12, v10, 3, v9
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_u32 v12, vcc_lo, v166, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, v167, v13, vcc_lo
	flat_load_b32 v12, v[12:13]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 0, v12
	s_cbranch_execz .LBB6_245
; %bb.228:                              ; %NodeBlock260
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_mov_b32 s17, 0
	s_mov_b32 s16, 0
	s_mov_b32 s18, exec_lo
                                        ; implicit-def: $sgpr1
	v_cmpx_lt_i32_e32 10, v11
	s_xor_b32 s18, exec_lo, s18
	s_cbranch_execz .LBB6_234
; %bb.229:                              ; %NodeBlock258
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_mov_b32 s19, exec_lo
                                        ; implicit-def: $sgpr1
	v_cmpx_lt_i32_e32 21, v11
	s_xor_b32 s19, exec_lo, s19
; %bb.230:                              ; %LeafBlock256
                                        ;   in Loop: Header=BB6_193 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 22, v11
	s_mov_b32 s1, 2
                                        ; implicit-def: $vgpr11
	s_and_b32 s17, vcc_lo, exec_lo
; %bb.231:                              ; %Flow384
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_and_not1_saveexec_b32 s19, s19
; %bb.232:                              ; %LeafBlock254
                                        ;   in Loop: Header=BB6_193 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 11, v11
	s_and_not1_b32 s17, s17, exec_lo
	s_mov_b32 s16, exec_lo
	s_and_b32 s20, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s17, s17, s20
; %bb.233:                              ; %Flow385
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s16, s16, exec_lo
	s_and_b32 s17, s17, exec_lo
                                        ; implicit-def: $vgpr11
.LBB6_234:                              ; %Flow383
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_saveexec_b32 s18, s18
	v_mov_b32_e32 v12, s1
	s_xor_b32 exec_lo, exec_lo, s18
	s_cbranch_execz .LBB6_240
; %bb.235:                              ; %NodeBlock252
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_mov_b32 s19, s17
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $sgpr20
	v_cmpx_lt_i32_e32 1, v11
	s_xor_b32 s1, exec_lo, s1
; %bb.236:                              ; %LeafBlock250
                                        ;   in Loop: Header=BB6_193 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 2, v11
	s_and_not1_b32 s19, s17, exec_lo
	s_mov_b32 s20, 2
                                        ; implicit-def: $vgpr11
	s_and_b32 s21, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s19, s19, s21
; %bb.237:                              ; %Flow387
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_saveexec_b32 s21, s1
	s_mov_b32 s1, s16
	s_xor_b32 exec_lo, exec_lo, s21
; %bb.238:                              ; %LeafBlock248
                                        ;   in Loop: Header=BB6_193 Depth=4
	v_cmp_eq_u32_e32 vcc_lo, 1, v11
	v_cmp_ne_u32_e64 s1, 1, v11
	s_and_not1_b32 s22, s16, exec_lo
	s_and_not1_b32 s19, s19, exec_lo
	s_and_b32 s23, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s24, s1, exec_lo
	s_or_b32 s1, s22, s23
	s_or_b32 s19, s19, s24
; %bb.239:                              ; %Flow388
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s21
	v_mov_b32_e32 v12, s20
	s_and_not1_b32 s16, s16, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_and_not1_b32 s17, s17, exec_lo
	s_and_b32 s19, s19, exec_lo
	s_or_b32 s16, s16, s1
	s_or_b32 s17, s17, s19
.LBB6_240:                              ; %Flow386
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s18
	s_and_saveexec_b32 s1, s17
; %bb.241:                              ;   in Loop: Header=BB6_193 Depth=4
	v_mov_b32_e32 v12, 0
	s_and_not1_b32 s16, s16, exec_lo
; %bb.242:                              ; %Flow389
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s1, s16
; %bb.243:                              ;   in Loop: Header=BB6_193 Depth=4
	v_mov_b32_e32 v12, 1
; %bb.244:                              ; %pawn_owner.exit208.i.i
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v4, vcc_lo, v0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, v1, v5, vcc_lo
	s_mov_b32 s1, exec_lo
	global_store_b32 v[4:5], v12, off
.LBB6_245:                              ; %Flow408
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
.LBB6_246:                              ; %Flow407
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s1, s1, exec_lo
.LBB6_247:                              ; %Flow406
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s13
	s_and_saveexec_b32 s13, s1
; %bb.248:                              ;   in Loop: Header=BB6_193 Depth=4
	v_add_nc_u32_e32 v5, -1, v9
	v_add_nc_u32_e32 v4, 1, v10
	v_cmp_lt_i32_e32 vcc_lo, 5, v10
	v_cmp_gt_i32_e64 s1, 2, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v9, v5 :: v_dual_mov_b32 v10, v4
	s_or_b32 s1, s1, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s12, s1, exec_lo
; %bb.249:                              ; %Flow409
                                        ;   in Loop: Header=BB6_193 Depth=4
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s12
	s_or_b32 s11, s1, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB6_193
.LBB6_250:                              ; %Flow411
                                        ;   in Loop: Header=BB6_66 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_and_b32 s0, s7, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_310
; %bb.251:                              ; %.lr.ph244.i.i.preheader
                                        ;   in Loop: Header=BB6_66 Depth=3
	v_dual_mov_b32 v9, s52 :: v_dual_mov_b32 v10, v8
	s_mov_b32 s2, 0
.LBB6_252:                              ; %.lr.ph244.i.i
                                        ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_65 Depth=2
                                        ;       Parent Loop BB6_66 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v4, v9, 3, v10
	s_mov_b32 s11, -1
	s_mov_b32 s0, -1
	s_mov_b32 s12, exec_lo
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v11, vcc_lo, v166, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v167, v5, vcc_lo
	flat_load_b32 v11, v[11:12]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e32 0, v11
	s_cbranch_execz .LBB6_306
; %bb.253:                              ; %NodeBlock274
                                        ;   in Loop: Header=BB6_252 Depth=4
	flat_load_b32 v13, v[2:3]
	s_mov_b32 s14, 0
	s_mov_b32 s13, 0
	s_mov_b32 s15, exec_lo
                                        ; implicit-def: $sgpr0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 10, v13
	s_xor_b32 s15, exec_lo, s15
	s_cbranch_execz .LBB6_259
; %bb.254:                              ; %NodeBlock272
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_mov_b32 s16, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v13
	s_xor_b32 s16, exec_lo, s16
; %bb.255:                              ; %LeafBlock270
                                        ;   in Loop: Header=BB6_252 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 22, v13
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr13
	s_and_b32 s14, vcc_lo, exec_lo
; %bb.256:                              ; %Flow369
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_and_not1_saveexec_b32 s16, s16
; %bb.257:                              ; %LeafBlock268
                                        ;   in Loop: Header=BB6_252 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 11, v13
	s_and_not1_b32 s14, s14, exec_lo
	s_mov_b32 s13, exec_lo
	s_and_b32 s17, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s14, s14, s17
; %bb.258:                              ; %Flow370
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s13, s13, exec_lo
	s_and_b32 s14, s14, exec_lo
                                        ; implicit-def: $vgpr13
.LBB6_259:                              ; %Flow368
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_saveexec_b32 s15, s15
	v_mov_b32_e32 v12, s0
	s_xor_b32 exec_lo, exec_lo, s15
	s_cbranch_execz .LBB6_265
; %bb.260:                              ; %NodeBlock266
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_mov_b32 s16, s14
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr17
	v_cmpx_lt_i32_e32 1, v13
	s_xor_b32 s0, exec_lo, s0
; %bb.261:                              ; %LeafBlock264
                                        ;   in Loop: Header=BB6_252 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 2, v13
	s_and_not1_b32 s16, s14, exec_lo
	s_mov_b32 s17, 2
                                        ; implicit-def: $vgpr13
	s_and_b32 s18, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s16, s16, s18
; %bb.262:                              ; %Flow372
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_saveexec_b32 s18, s0
	s_mov_b32 s0, s13
	s_xor_b32 exec_lo, exec_lo, s18
; %bb.263:                              ; %LeafBlock262
                                        ;   in Loop: Header=BB6_252 Depth=4
	v_cmp_eq_u32_e32 vcc_lo, 1, v13
	v_cmp_ne_u32_e64 s0, 1, v13
	s_and_not1_b32 s19, s13, exec_lo
	s_and_not1_b32 s16, s16, exec_lo
	s_and_b32 s20, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s21, s0, exec_lo
	s_or_b32 s0, s19, s20
	s_or_b32 s16, s16, s21
; %bb.264:                              ; %Flow373
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s18
	v_mov_b32_e32 v12, s17
	s_and_not1_b32 s13, s13, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s14, s14, exec_lo
	s_and_b32 s16, s16, exec_lo
	s_or_b32 s13, s13, s0
	s_or_b32 s14, s14, s16
.LBB6_265:                              ; %Flow371
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s15
	s_and_saveexec_b32 s0, s14
; %bb.266:                              ;   in Loop: Header=BB6_252 Depth=4
	v_mov_b32_e32 v12, 0
	s_and_not1_b32 s13, s13, exec_lo
; %bb.267:                              ; %Flow374
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s13
; %bb.268:                              ;   in Loop: Header=BB6_252 Depth=4
	v_mov_b32_e32 v12, 1
; %bb.269:                              ; %pawn_owner.exit210.i.i
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s14, 0
	s_mov_b32 s13, 0
	s_mov_b32 s15, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 10, v11
	s_xor_b32 s15, exec_lo, s15
	s_cbranch_execz .LBB6_275
; %bb.270:                              ; %NodeBlock286
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_mov_b32 s16, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v11
	s_xor_b32 s16, exec_lo, s16
; %bb.271:                              ; %LeafBlock284
                                        ;   in Loop: Header=BB6_252 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 22, v11
	s_mov_b32 s0, 2
	s_and_b32 s14, vcc_lo, exec_lo
; %bb.272:                              ; %Flow362
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_and_not1_saveexec_b32 s16, s16
; %bb.273:                              ; %LeafBlock282
                                        ;   in Loop: Header=BB6_252 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 11, v11
	s_and_not1_b32 s14, s14, exec_lo
	s_mov_b32 s13, exec_lo
	s_and_b32 s17, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s14, s14, s17
; %bb.274:                              ; %Flow363
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s13, s13, exec_lo
	s_and_b32 s14, s14, exec_lo
.LBB6_275:                              ; %Flow361
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_saveexec_b32 s15, s15
	v_mov_b32_e32 v13, s0
	s_xor_b32 exec_lo, exec_lo, s15
	s_cbranch_execz .LBB6_281
; %bb.276:                              ; %NodeBlock280
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_mov_b32 s16, s14
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr17
	v_cmpx_lt_i32_e32 1, v11
	s_xor_b32 s0, exec_lo, s0
; %bb.277:                              ; %LeafBlock278
                                        ;   in Loop: Header=BB6_252 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 2, v11
	s_and_not1_b32 s16, s14, exec_lo
	s_mov_b32 s17, 2
	s_and_b32 s18, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s16, s16, s18
; %bb.278:                              ; %Flow365
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_saveexec_b32 s18, s0
	s_mov_b32 s0, s13
	s_xor_b32 exec_lo, exec_lo, s18
; %bb.279:                              ; %LeafBlock276
                                        ;   in Loop: Header=BB6_252 Depth=4
	v_cmp_eq_u32_e32 vcc_lo, 1, v11
	v_cmp_ne_u32_e64 s0, 1, v11
	s_and_not1_b32 s19, s13, exec_lo
	s_and_not1_b32 s16, s16, exec_lo
	s_and_b32 s20, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s21, s0, exec_lo
	s_or_b32 s0, s19, s20
	s_or_b32 s16, s16, s21
; %bb.280:                              ; %Flow366
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s18
	v_mov_b32_e32 v13, s17
	s_and_not1_b32 s13, s13, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s14, s14, exec_lo
	s_and_b32 s16, s16, exec_lo
	s_or_b32 s13, s13, s0
	s_or_b32 s14, s14, s16
.LBB6_281:                              ; %Flow364
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s15
	s_and_saveexec_b32 s0, s14
; %bb.282:                              ;   in Loop: Header=BB6_252 Depth=4
	v_mov_b32_e32 v13, 0
	s_and_not1_b32 s13, s13, exec_lo
; %bb.283:                              ; %Flow367
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s13
; %bb.284:                              ;   in Loop: Header=BB6_252 Depth=4
	v_mov_b32_e32 v13, 1
; %bb.285:                              ; %pawn_owner.exit212.i.i
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s0, 0
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v12, v13
	s_cbranch_execz .LBB6_305
; %bb.286:                              ;   in Loop: Header=BB6_252 Depth=4
	v_add_nc_u32_e32 v9, 1, v9
	v_ashrrev_i32_e32 v13, 31, v10
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v12, 3, v9
	v_ashrrev_i32_e32 v14, 31, v12
	v_add_co_u32 v12, vcc_lo, v12, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v13, vcc_lo, v14, v13, vcc_lo
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, v6, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, v7, v13, vcc_lo
	flat_load_b32 v12, v[12:13]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e32 0, v12
	s_cbranch_execz .LBB6_304
; %bb.287:                              ; %NodeBlock302
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_mov_b32 s16, 0
	s_mov_b32 s15, 0
	s_mov_b32 s17, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 10, v11
	s_xor_b32 s17, exec_lo, s17
	s_cbranch_execz .LBB6_293
; %bb.288:                              ; %NodeBlock300
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_mov_b32 s18, exec_lo
                                        ; implicit-def: $sgpr0
	v_cmpx_lt_i32_e32 21, v11
	s_xor_b32 s18, exec_lo, s18
; %bb.289:                              ; %LeafBlock298
                                        ;   in Loop: Header=BB6_252 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 22, v11
	s_mov_b32 s0, 2
                                        ; implicit-def: $vgpr11
	s_and_b32 s16, vcc_lo, exec_lo
; %bb.290:                              ; %Flow355
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_and_not1_saveexec_b32 s18, s18
; %bb.291:                              ; %LeafBlock296
                                        ;   in Loop: Header=BB6_252 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 11, v11
	s_and_not1_b32 s16, s16, exec_lo
	s_mov_b32 s15, exec_lo
	s_and_b32 s19, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s16, s16, s19
; %bb.292:                              ; %Flow356
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s15, s15, exec_lo
	s_and_b32 s16, s16, exec_lo
                                        ; implicit-def: $vgpr11
.LBB6_293:                              ; %Flow354
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_saveexec_b32 s17, s17
	v_mov_b32_e32 v12, s0
	s_xor_b32 exec_lo, exec_lo, s17
	s_cbranch_execz .LBB6_299
; %bb.294:                              ; %NodeBlock294
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_mov_b32 s18, s16
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $sgpr19
	v_cmpx_lt_i32_e32 1, v11
	s_xor_b32 s0, exec_lo, s0
; %bb.295:                              ; %LeafBlock292
                                        ;   in Loop: Header=BB6_252 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, 2, v11
	s_and_not1_b32 s18, s16, exec_lo
	s_mov_b32 s19, 2
                                        ; implicit-def: $vgpr11
	s_and_b32 s20, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s18, s18, s20
; %bb.296:                              ; %Flow358
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_saveexec_b32 s20, s0
	s_mov_b32 s0, s15
	s_xor_b32 exec_lo, exec_lo, s20
; %bb.297:                              ; %LeafBlock290
                                        ;   in Loop: Header=BB6_252 Depth=4
	v_cmp_eq_u32_e32 vcc_lo, 1, v11
	v_cmp_ne_u32_e64 s0, 1, v11
	s_and_not1_b32 s21, s15, exec_lo
	s_and_not1_b32 s18, s18, exec_lo
	s_and_b32 s22, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s23, s0, exec_lo
	s_or_b32 s0, s21, s22
	s_or_b32 s18, s18, s23
; %bb.298:                              ; %Flow359
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s20
	v_mov_b32_e32 v12, s19
	s_and_not1_b32 s15, s15, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s16, s16, exec_lo
	s_and_b32 s18, s18, exec_lo
	s_or_b32 s15, s15, s0
	s_or_b32 s16, s16, s18
.LBB6_299:                              ; %Flow357
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	s_and_saveexec_b32 s0, s16
; %bb.300:                              ;   in Loop: Header=BB6_252 Depth=4
	v_mov_b32_e32 v12, 0
	s_and_not1_b32 s15, s15, exec_lo
; %bb.301:                              ; %Flow360
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s15
; %bb.302:                              ;   in Loop: Header=BB6_252 Depth=4
	v_mov_b32_e32 v12, 1
; %bb.303:                              ; %pawn_owner.exit214.i.i
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v4, vcc_lo, v0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, v1, v5, vcc_lo
	s_mov_b32 s0, exec_lo
	v_add_nc_u32_e32 v10, 1, v10
	global_store_b32 v[4:5], v12, off
.LBB6_304:                              ; %Flow379
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB6_305:                              ; %Flow378
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s0, s0, exec_lo
.LBB6_306:                              ; %Flow377
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s12
	s_and_saveexec_b32 s12, s0
; %bb.307:                              ;   in Loop: Header=BB6_252 Depth=4
	v_max_i32_e32 v4, v10, v9
	v_add_nc_u32_e32 v10, 1, v10
	v_add_nc_u32_e32 v9, 1, v9
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_lt_i32_e32 vcc_lo, 5, v4
	s_or_not1_b32 s11, vcc_lo, exec_lo
; %bb.308:                              ; %Flow380
                                        ;   in Loop: Header=BB6_252 Depth=4
	s_or_b32 exec_lo, exec_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s11
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB6_252
; %bb.309:                              ; %Flow381
                                        ;   in Loop: Header=BB6_66 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
.LBB6_310:                              ; %Flow382
                                        ;   in Loop: Header=BB6_66 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v4, v8
.LBB6_311:                              ; %Flow473
                                        ;   in Loop: Header=BB6_66 Depth=3
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 8, v4
	v_mov_b32_e32 v10, v4
	s_or_b32 s6, vcc_lo, s6
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB6_66
; %bb.312:                              ;   in Loop: Header=BB6_65 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	s_cmp_lg_u32 s52, 8
	s_cbranch_scc1 .LBB6_65
; %bb.313:                              ; %.preheader.i7.i.preheader
                                        ;   in Loop: Header=BB6_2 Depth=1
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, 0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v10, 0
	s_mov_b32 s1, 0
	s_mov_b64 s[2:3], 0
.LBB6_314:                              ; %.preheader.i7.i
                                        ;   Parent Loop BB6_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB6_315 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v5, vcc_lo, v166, s2
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v167, vcc_lo
	v_add_co_u32 v7, vcc_lo, v0, s2
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v1, vcc_lo
	v_mov_b32_e32 v9, v10
	s_mov_b64 s[4:5], 0
.LBB6_315:                              ; %NodeBlock308
                                        ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_314 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_add_co_u32 v10, vcc_lo, v7, s4
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v8, vcc_lo
	s_mov_b32 s0, exec_lo
	global_load_b32 v10, v[10:11], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 1, v10
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB6_319
; %bb.316:                              ; %LeafBlock306
                                        ;   in Loop: Header=BB6_315 Depth=3
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 2, v10
; %bb.317:                              ;   in Loop: Header=BB6_315 Depth=3
	v_add_nc_u32_e32 v3, 1, v3
; %bb.318:                              ; %Flow351
                                        ;   in Loop: Header=BB6_315 Depth=3
	s_or_b32 exec_lo, exec_lo, s6
                                        ; implicit-def: $vgpr10
.LBB6_319:                              ; %Flow353
                                        ;   in Loop: Header=BB6_315 Depth=3
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB6_323
; %bb.320:                              ; %LeafBlock304
                                        ;   in Loop: Header=BB6_315 Depth=3
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 1, v10
; %bb.321:                              ;   in Loop: Header=BB6_315 Depth=3
	v_add_nc_u32_e32 v2, 1, v2
; %bb.322:                              ; %Flow352
                                        ;   in Loop: Header=BB6_315 Depth=3
	s_or_b32 exec_lo, exec_lo, s6
.LBB6_323:                              ;   in Loop: Header=BB6_315 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v10, vcc_lo, v5, s4
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v6, vcc_lo
	s_mov_b32 s0, 0
	s_mov_b32 s6, exec_lo
	flat_load_b32 v11, v[10:11]
                                        ; implicit-def: $vgpr10
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_i32_e32 0, v11
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB6_331
; %bb.324:                              ; %NodeBlock316
                                        ;   in Loop: Header=BB6_315 Depth=3
	s_mov_b32 s10, 0
	s_mov_b32 s7, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 10, v11
	s_xor_b32 s0, exec_lo, s0
; %bb.325:                              ; %LeafBlock314
                                        ;   in Loop: Header=BB6_315 Depth=3
	v_cmp_eq_u32_e32 vcc_lo, 11, v11
	s_mov_b32 s7, exec_lo
                                        ; implicit-def: $vgpr11
	s_and_b32 s10, vcc_lo, exec_lo
; %bb.326:                              ; %Flow347
                                        ;   in Loop: Header=BB6_315 Depth=3
	s_and_not1_saveexec_b32 s11, s0
; %bb.327:                              ; %LeafBlock312
                                        ;   in Loop: Header=BB6_315 Depth=3
	v_cmp_ne_u32_e32 vcc_lo, 1, v11
	v_cmp_eq_u32_e64 s0, 1, v11
	s_and_not1_b32 s7, s7, exec_lo
	s_and_not1_b32 s10, s10, exec_lo
	s_and_b32 s12, vcc_lo, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s7, s7, s12
	s_or_b32 s10, s10, s0
; %bb.328:                              ; %Flow348
                                        ;   in Loop: Header=BB6_315 Depth=3
	s_or_b32 exec_lo, exec_lo, s11
                                        ; implicit-def: $vgpr10
	s_and_saveexec_b32 s0, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
; %bb.329:                              ; %.critedge.i.i
                                        ;   in Loop: Header=BB6_315 Depth=3
	v_add_nc_u32_e32 v10, 1, v9
	s_and_not1_b32 s7, s7, exec_lo
; %bb.330:                              ; %Flow349
                                        ;   in Loop: Header=BB6_315 Depth=3
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s7, exec_lo
                                        ; implicit-def: $vgpr11
.LBB6_331:                              ; %Flow346
                                        ;   in Loop: Header=BB6_315 Depth=3
	s_and_not1_saveexec_b32 s6, s6
; %bb.332:                              ; %LeafBlock310
                                        ;   in Loop: Header=BB6_315 Depth=3
	v_cmp_ne_u32_e32 vcc_lo, 0, v11
	v_mov_b32_e32 v10, v9
	s_and_not1_b32 s0, s0, exec_lo
	s_and_b32 s7, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s0, s0, s7
; %bb.333:                              ; %Flow350
                                        ;   in Loop: Header=BB6_315 Depth=3
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s6, s0
; %bb.334:                              ; %pawn_owner.exit216.i.i
                                        ;   in Loop: Header=BB6_315 Depth=3
	v_add_nc_u32_e32 v4, 1, v4
	v_mov_b32_e32 v10, v9
; %bb.335:                              ;   in Loop: Header=BB6_315 Depth=3
	s_or_b32 exec_lo, exec_lo, s6
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmp_eq_u32 s4, 32
	s_cbranch_scc1 .LBB6_337
; %bb.336:                              ;   in Loop: Header=BB6_315 Depth=3
	v_mov_b32_e32 v9, v10
	s_branch .LBB6_315
.LBB6_337:                              ;   in Loop: Header=BB6_314 Depth=2
	s_add_i32 s1, s1, 1
	s_add_u32 s2, s2, 32
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s1, 8
	s_cbranch_scc0 .LBB6_314
; %bb.338:                              ;   in Loop: Header=BB6_2 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0x3ff00000
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v24, v22 :: v_dual_mov_b32 v23, v21
	v_cmpx_ne_u32_e32 0, v4
	s_cbranch_execz .LBB6_340
; %bb.339:                              ;   in Loop: Header=BB6_2 Depth=1
	v_cvt_f64_i32_e32 v[5:6], v3
	v_cvt_f64_i32_e32 v[3:4], v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[7:8], null, v[3:4], v[3:4], v[5:6]
	v_rcp_f64_e32 v[11:12], v[7:8]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[13:14], -v[7:8], v[11:12], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[11:12]
	v_fma_f64 v[13:14], -v[7:8], v[11:12], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[11:12]
	v_div_scale_f64 v[13:14], vcc_lo, v[5:6], v[3:4], v[5:6]
	v_mul_f64 v[15:16], v[13:14], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], -v[7:8], v[15:16], v[13:14]
	v_div_fmas_f64 v[7:8], v[7:8], v[11:12], v[15:16]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[23:24], v[7:8], v[3:4], v[5:6]
.LBB6_340:                              ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e32 0, v10
	s_cbranch_execz .LBB6_342
; %bb.341:                              ;   in Loop: Header=BB6_2 Depth=1
	v_cvt_f64_i32_e32 v[2:3], v2
	v_cvt_f64_i32_e32 v[4:5], v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], v[2:3]
	v_rcp_f64_e32 v[8:9], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_div_scale_f64 v[10:11], vcc_lo, v[2:3], v[4:5], v[2:3]
	v_mul_f64 v[12:13], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[6:7], v[12:13], v[10:11]
	v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[21:22], v[6:7], v[4:5], v[2:3]
.LBB6_342:                              ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s20, exec_lo
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execnz .LBB6_348
.LBB6_343:                              ; %calculate_board_value.exit
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s20
	v_cvt_f64_i32_e32 v[0:1], v182
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], 0x4048c000, v[0:1]
	v_div_scale_f64 v[2:3], null, 0x404c8000, 0x404c8000, v[0:1]
	v_div_scale_f64 v[8:9], vcc_lo, v[0:1], 0x404c8000, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[4:5], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[8:9], v[4:5]
	v_fma_f64 v[2:3], -v[2:3], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[21:22], -v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[6:7]
	v_cvt_i32_f64_e32 v4, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[0:1], v[2:3], 0x404c8000, v[0:1]
	v_add_f64 v[2:3], v[176:177], -v[178:179]
	v_cvt_f64_i32_e32 v[4:5], v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[0:1], 0x4048c000, v[0:1]
	v_fma_f64 v[2:3], v[2:3], s[46:47], 0x4048c000
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], 0x4048c000, v[4:5], 0x4048c000
	v_cvt_i32_f64_e32 v6, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_i32_f64_e32 v0, v[2:3]
	v_cvt_i32_f64_e32 v1, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, 0x64, v6, v[0:1]
	v_mad_u64_u32 v[3:4], null, 0x64, v2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v4, v3
	flat_store_b64 v[166:167], v[3:4] offset:312
	s_and_saveexec_b32 s0, s45
	s_cbranch_execz .LBB6_347
; %bb.344:                              ;   in Loop: Header=BB6_2 Depth=1
	v_dual_mov_b32 v0, v166 :: v_dual_mov_b32 v1, v167
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u64_e32 0, v[160:161]
	s_cbranch_execz .LBB6_346
; %bb.345:                              ;   in Loop: Header=BB6_2 Depth=1
	flat_load_b64 v[2:3], v[162:163] offset:272
	v_dual_mov_b32 v0, v160 :: v_dual_mov_b32 v1, v161
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b64 v[162:163], v[2:3] offset:296
	flat_store_b64 v[162:163], v[166:167] offset:272
.LBB6_346:                              ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v161, v1 :: v_dual_mov_b32 v162, v166
	v_dual_mov_b32 v160, v0 :: v_dual_add_nc_u32 v181, 1, v181
	v_mov_b32_e32 v163, v167
.LBB6_347:                              ; %Flow343
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mov_b32 v0, v164 :: v_dual_mov_b32 v1, v165
	s_branch .LBB6_24
.LBB6_348:                              ;   in Loop: Header=BB6_2 Depth=1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_branch .LBB6_343
.LBB6_349:                              ; %Flow496
	s_or_b32 exec_lo, exec_lo, s49
.LBB6_350:                              ; %Flow497
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s48
	flat_load_b64 v[4:5], v[0:1] offset:288
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u64_e32 0, v[4:5]
	s_cbranch_execz .LBB6_352
; %bb.351:
	flat_load_b64 v[6:7], v[2:3] offset:272
	v_add_nc_u32_e32 v10, 1, v10
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b64 v[2:3], v[6:7] offset:296
	flat_store_b64 v[2:3], v[4:5] offset:272
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
.LBB6_352:                              ; %_ZN5Queue7add_oneEP14checkers_point.exit44
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v8, 0
	s_mov_b32 s2, 0
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u32_e32 0, v10
	s_cbranch_execz .LBB6_374
.LBB6_353:                              ; %.lr.ph84
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execz .LBB6_359
; %bb.354:                              ;   in Loop: Header=BB6_353 Depth=1
	flat_load_b64 v[6:7], v[0:1] offset:272
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e64 s3, 0, v[6:7]
	v_cmpx_ne_u64_e32 0, v[6:7]
	s_cbranch_execz .LBB6_356
; %bb.355:                              ;   in Loop: Header=BB6_353 Depth=1
	flat_load_b64 v[8:9], v[0:1] offset:288
	flat_load_b64 v[11:12], v[6:7] offset:288
	s_and_not1_b32 s3, s3, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[8:9], v[11:12]
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s3, s3, s5
.LBB6_356:                              ; %Flow329
                                        ;   in Loop: Header=BB6_353 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB6_358
; %bb.357:                              ;   in Loop: Header=BB6_353 Depth=1
	flat_load_b64 v[8:9], v[0:1] offset:296
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b64 v[0:1], v[8:9] offset:272
.LBB6_358:                              ;   in Loop: Header=BB6_353 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v10, -1, v10
.LBB6_359:                              ; %Flow331
                                        ;   in Loop: Header=BB6_353 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v8, v10
	s_mov_b32 s0, -1
	s_mov_b32 s3, exec_lo
	v_cmpx_ne_u64_e64 v[0:1], v[144:145]
	s_cbranch_execz .LBB6_372
; %bb.360:                              ;   in Loop: Header=BB6_353 Depth=1
	flat_load_b64 v[8:9], v[0:1] offset:288
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, 0, v[8:9]
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB6_365
; %bb.361:                              ;   in Loop: Header=BB6_353 Depth=1
	flat_load_u8 v11, v[0:1] offset:304
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u16_e64 s0, 0, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s5, s0
	s_xor_b32 s0, exec_lo, s5
	s_cbranch_execz .LBB6_363
; %bb.362:                              ;   in Loop: Header=BB6_353 Depth=1
	flat_load_b32 v0, v[0:1] offset:312
	flat_load_b32 v1, v[8:9] offset:316
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_min_i32_e32 v0, v0, v1
	flat_store_b32 v[8:9], v0 offset:316
                                        ; implicit-def: $vgpr0_vgpr1
.LBB6_363:                              ; %Flow326
                                        ;   in Loop: Header=BB6_353 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB6_365
; %bb.364:                              ;   in Loop: Header=BB6_353 Depth=1
	flat_load_b32 v0, v[0:1] offset:316
	flat_load_b32 v1, v[8:9] offset:312
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_max_i32_e32 v0, v0, v1
	flat_store_b32 v[8:9], v0 offset:312
.LBB6_365:                              ;   in Loop: Header=BB6_353 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s4, exec_lo
	v_cmpx_ne_u64_e64 v[4:5], v[8:9]
	s_cbranch_execz .LBB6_371
; %bb.366:                              ;   in Loop: Header=BB6_353 Depth=1
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB6_370
; %bb.367:                              ;   in Loop: Header=BB6_353 Depth=1
	v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9
	s_mov_b32 s5, exec_lo
	v_cmpx_ne_u64_e32 0, v[6:7]
	s_cbranch_execz .LBB6_369
; %bb.368:                              ;   in Loop: Header=BB6_353 Depth=1
	flat_load_b64 v[4:5], v[2:3] offset:272
	v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_clause 0x1
	flat_store_b64 v[2:3], v[4:5] offset:296
	flat_store_b64 v[2:3], v[8:9] offset:272
.LBB6_369:                              ; %_ZN5Queue7add_oneEP14checkers_point.exit48
                                        ;   in Loop: Header=BB6_353 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v7, v1
	v_mov_b32_e32 v2, v8
	v_dual_mov_b32 v5, v9 :: v_dual_add_nc_u32 v10, 1, v10
	v_dual_mov_b32 v6, v0 :: v_dual_mov_b32 v3, v9
.LBB6_370:                              ; %Flow325
                                        ;   in Loop: Header=BB6_353 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB6_371:                              ;   in Loop: Header=BB6_353 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s4
	v_cmp_eq_u32_e32 vcc_lo, 0, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v0, v6
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v1, v7
	s_or_not1_b32 s0, vcc_lo, exec_lo
.LBB6_372:                              ; %Flow333
                                        ;   in Loop: Header=BB6_353 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s0
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB6_353
; %bb.373:                              ; %Flow334
	s_or_b32 exec_lo, exec_lo, s2
	v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7
.LBB6_374:                              ; %Flow336
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s1, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 0, v8
	s_cbranch_execz .LBB6_382
.LBB6_375:                              ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execz .LBB6_381
; %bb.376:                              ;   in Loop: Header=BB6_375 Depth=1
	flat_load_b64 v[2:3], v[0:1] offset:272
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e64 s3, 0, v[2:3]
	v_cmpx_ne_u64_e32 0, v[2:3]
	s_cbranch_execz .LBB6_378
; %bb.377:                              ;   in Loop: Header=BB6_375 Depth=1
	flat_load_b64 v[4:5], v[0:1] offset:288
	flat_load_b64 v[6:7], v[2:3] offset:288
	s_and_not1_b32 s3, s3, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[6:7]
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s3, s3, s5
.LBB6_378:                              ; %Flow
                                        ;   in Loop: Header=BB6_375 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB6_380
; %bb.379:                              ;   in Loop: Header=BB6_375 Depth=1
	flat_load_b64 v[4:5], v[0:1] offset:296
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b64 v[0:1], v[4:5] offset:272
.LBB6_380:                              ;   in Loop: Header=BB6_375 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v8, -1, v8
.LBB6_381:                              ; %Flow321
                                        ;   in Loop: Header=BB6_375 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	v_dual_mov_b32 v0, v2 :: v_dual_mov_b32 v1, v3
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB6_375
.LBB6_382:                              ; %Flow323
	s_or_b32 exec_lo, exec_lo, s0
	scratch_load_b32 v40, off, s33          ; 4-byte Folded Reload
	v_readlane_b32 s30, v41, 19
	v_readlane_b32 s31, v41, 20
	v_readlane_b32 s52, v41, 18
	v_readlane_b32 s51, v41, 17
	v_readlane_b32 s50, v41, 16
	v_readlane_b32 s49, v41, 15
	v_readlane_b32 s48, v41, 14
	v_readlane_b32 s47, v41, 13
	v_readlane_b32 s46, v41, 12
	v_readlane_b32 s45, v41, 11
	v_readlane_b32 s44, v41, 10
	v_readlane_b32 s43, v41, 9
	v_readlane_b32 s42, v41, 8
	v_readlane_b32 s41, v41, 7
	v_readlane_b32 s40, v41, 6
	v_readlane_b32 s39, v41, 5
	v_readlane_b32 s38, v41, 4
	v_readlane_b32 s37, v41, 3
	v_readlane_b32 s36, v41, 2
	v_readlane_b32 s35, v41, 1
	v_readlane_b32 s34, v41, 0
	v_readlane_b32 s0, v41, 21
	s_or_saveexec_b32 s1, -1
	scratch_load_b32 v41, off, s33 offset:4 ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s1
	s_add_i32 s32, s32, -16
	s_mov_b32 s33, s0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end6:
	.size	minmax, .Lfunc_end6-minmax
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 8812
; NumSgprs: 55
; NumVgprs: 183
; ScratchSize: 24
; MemoryBound: 0
	.text
	.protected	alpha_beta              ; -- Begin function alpha_beta
	.globl	alpha_beta
	.p2align	8
	.type	alpha_beta,@function
alpha_beta:                             ; @alpha_beta
; %bb.0:
	s_mov_b64 s[54:55], s[0:1]
	s_load_b32 s0, s[0:1], 0x24
	s_clause 0x1
	s_load_b64 s[56:57], s[54:55], 0x0
	s_load_b64 s[2:3], s[54:55], 0x10
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	v_mov_b32_e32 v0, 0
	ds_store_b32 v0, v0
	v_cmp_eq_u32_e64 s53, 0, v1
	s_and_saveexec_b32 s4, s53
	s_cbranch_execz .LBB7_31
; %bb.1:
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v2, v4
	s_cmp_eq_u64 s[56:57], 0
	v_mov_b32_e32 v3, v5
	s_cbranch_scc1 .LBB7_5
; %bb.2:                                ; %.cont38.preheader
	v_dual_mov_b32 v6, s56 :: v_dual_mov_b32 v7, s57
	s_mov_b32 s0, 0
	s_mov_b32 s1, 0
.LBB7_3:                                ; %.cont38
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v4, v6 :: v_dual_mov_b32 v5, v7
	flat_load_b64 v[6:7], v[6:7] offset:272
	s_add_i32 s1, s1, 1
	v_dual_mov_b32 v2, s56 :: v_dual_mov_b32 v3, s57
	v_mov_b32_e32 v0, s1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB7_3
; %bb.4:                                ; %Flow72
	s_or_b32 exec_lo, exec_lo, s0
.LBB7_5:                                ; %_ZN5Queue3addEP14checkers_point.exit
	v_mov_b32_e32 v12, 0
	s_mov_b32 s5, 0
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u32_e32 0, v0
	s_cbranch_execz .LBB7_21
; %bb.6:                                ; %.lr.ph.preheader
	s_load_b32 s6, s[54:55], 0x8
	v_mov_b32_e32 v6, 0xc4653600
	v_mov_b32_e32 v7, 0x3b9aca00
                                        ; implicit-def: $sgpr7
.LBB7_7:                                ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB7_16 Depth 2
	flat_load_b32 v8, v[2:3] offset:256
	s_or_b32 s7, s7, exec_lo
                                        ; implicit-def: $vgpr14
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v8, v8, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s6, v8
                                        ; implicit-def: $vgpr8_vgpr9
	s_and_saveexec_b32 s8, vcc_lo
	s_cbranch_execz .LBB7_19
; %bb.8:                                ;   in Loop: Header=BB7_7 Depth=1
	flat_load_b64 v[8:9], v[2:3] offset:272
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e64 s9, 0, v[8:9]
	v_cmp_ne_u64_e32 vcc_lo, 0, v[8:9]
	s_and_saveexec_b32 s10, vcc_lo
	s_cbranch_execz .LBB7_10
; %bb.9:                                ;   in Loop: Header=BB7_7 Depth=1
	flat_load_b64 v[10:11], v[2:3] offset:288
	flat_load_b64 v[12:13], v[8:9] offset:288
	s_and_not1_b32 s9, s9, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u64_e64 s0, v[10:11], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s9, s9, s0
.LBB7_10:                               ; %Flow67
                                        ;   in Loop: Header=BB7_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s0, s9
	s_cbranch_execz .LBB7_12
; %bb.11:                               ;   in Loop: Header=BB7_7 Depth=1
	flat_load_b64 v[10:11], v[2:3] offset:296
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b64 v[2:3], v[10:11] offset:272
.LBB7_12:                               ; %_ZN5Queue3popEv.exit
                                        ;   in Loop: Header=BB7_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	flat_load_b64 v[10:11], v[2:3] offset:264
	v_add_nc_u32_e32 v14, -1, v0
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u64_e32 0, v[10:11]
	s_cbranch_execz .LBB7_18
; %bb.13:                               ;   in Loop: Header=BB7_7 Depth=1
	v_dual_mov_b32 v13, v11 :: v_dual_mov_b32 v12, v10
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB7_15
; %bb.14:                               ; %.else
                                        ;   in Loop: Header=BB7_7 Depth=1
	v_dual_mov_b32 v13, v9 :: v_dual_mov_b32 v12, v8
	flat_store_b64 v[4:5], v[10:11] offset:272
.LBB7_15:                               ; %.cont
                                        ;   in Loop: Header=BB7_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s0, 0
	s_mov_b32 s10, 0
.LBB7_16:                               ;   Parent Loop BB7_7 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v4, v10 :: v_dual_mov_b32 v5, v11
	flat_load_b64 v[10:11], v[10:11] offset:272
	s_add_i32 s10, s10, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v0, s10
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11]
	s_or_b32 s0, vcc_lo, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB7_16
; %bb.17:                               ; %_ZN5Queue3addEP14checkers_point.exit23
                                        ;   in Loop: Header=BB7_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v8, v12
	v_dual_mov_b32 v9, v13 :: v_dual_add_nc_u32 v14, v0, v14
.LBB7_18:                               ; %Flow66
                                        ;   in Loop: Header=BB7_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v14
	flat_store_b64 v[2:3], v[6:7] offset:312
	v_mov_b32_e32 v2, v8
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v3, v9
	s_and_not1_b32 s0, s7, exec_lo
	s_and_b32 s7, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s7, s0, s7
.LBB7_19:                               ; %Flow68
                                        ;   in Loop: Header=BB7_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	v_dual_mov_b32 v11, v3 :: v_dual_mov_b32 v10, v2
	v_mov_b32_e32 v2, v8
	v_dual_mov_b32 v12, v0 :: v_dual_mov_b32 v3, v9
	v_mov_b32_e32 v0, v14
	s_and_b32 s0, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s0, s5
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB7_7
; %bb.20:                               ; %Flow69
	s_or_b32 exec_lo, exec_lo, s5
	v_dual_mov_b32 v2, v10 :: v_dual_mov_b32 v3, v11
.LBB7_21:                               ; %Flow71
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_ne_u32_e32 vcc_lo, 0, v12
	s_mov_b32 s5, 0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB7_31
; %bb.22:                               ; %.lr.ph51.preheader
	v_mov_b32_e32 v4, 0xc4653600
	v_dual_mov_b32 v5, 0x3b9aca00 :: v_dual_mov_b32 v0, 0
	s_mov_b64 s[0:1], s[2:3]
	s_mov_b32 s6, 0
.LBB7_23:                               ; %.lr.ph51
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u64_e32 0, v[2:3]
	s_cbranch_execz .LBB7_29
; %bb.24:                               ;   in Loop: Header=BB7_23 Depth=1
	flat_load_b64 v[6:7], v[2:3] offset:272
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e64 s8, 0, v[6:7]
	v_cmpx_ne_u64_e32 0, v[6:7]
	s_cbranch_execz .LBB7_26
; %bb.25:                               ;   in Loop: Header=BB7_23 Depth=1
	flat_load_b64 v[8:9], v[2:3] offset:288
	flat_load_b64 v[10:11], v[6:7] offset:288
	s_and_not1_b32 s8, s8, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[8:9], v[10:11]
	s_and_b32 s10, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s8, s8, s10
.LBB7_26:                               ; %Flow
                                        ;   in Loop: Header=BB7_23 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s9, s8
	s_cbranch_execz .LBB7_28
; %bb.27:                               ;   in Loop: Header=BB7_23 Depth=1
	flat_load_b64 v[8:9], v[2:3] offset:296
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b64 v[2:3], v[8:9] offset:272
.LBB7_28:                               ;   in Loop: Header=BB7_23 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v12, -1, v12
.LBB7_29:                               ; %Flow62
                                        ;   in Loop: Header=BB7_23 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v12
	flat_store_b64 v[2:3], v[4:5] offset:312
	global_store_b64 v0, v[2:3], s[0:1]
	v_mov_b32_e32 v2, v6
	v_dual_mov_b32 v8, s6 :: v_dual_mov_b32 v3, v7
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB7_23
; %bb.30:                               ; %..loopexit_crit_edge
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v0, 0
	ds_store_b32 v0, v8
.LBB7_31:                               ; %Flow75
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s58, exec_lo
	ds_load_b32 v0, v0
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_i32_e64 v1, v0
	s_cbranch_execz .LBB7_33
; %bb.32:
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_u32 s8, s54, 24
	s_addc_u32 s9, s55, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, minmax@rel32@lo+4
	s_addc_u32 s1, s1, minmax@rel32@hi+12
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_swappc_b64 s[30:31], s[0:1]
.LBB7_33:
	s_or_b32 exec_lo, exec_lo, s58
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s53
	s_cbranch_execz .LBB7_35
; %bb.34:
	v_dual_mov_b32 v0, s56 :: v_dual_mov_b32 v1, s57
	s_add_u32 s8, s54, 24
	s_addc_u32 s9, s55, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, minmax@rel32@lo+4
	s_addc_u32 s1, s1, minmax@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
.LBB7_35:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel alpha_beta
		.amdhsa_group_segment_fixed_size 4
		.amdhsa_private_segment_fixed_size 24
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 183
		.amdhsa_next_free_sgpr 59
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	alpha_beta, .Lfunc_end7-alpha_beta
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1104
; NumSgprs: 61
; NumVgprs: 183
; ScratchSize: 24
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4 bytes/workgroup (compile time only)
; SGPRBlocks: 7
; VGPRBlocks: 22
; NumSGPRsForWavesPerEU: 61
; NumVGPRsForWavesPerEU: 183
; Occupancy: 8
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2align	2                               ; -- Begin function __ockl_printf_append_string_n
	.type	__ockl_printf_append_string_n,@function
__ockl_printf_append_string_n:          ; @__ockl_printf_append_string_n
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_load_b64 s[2:3], s[8:9], 0x50
	v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2
	v_mbcnt_lo_u32_b32 v2, -1, 0
	s_mov_b32 s9, 0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_ne_u64_e32 0, v[6:7]
	s_xor_b32 s8, exec_lo, s0
	s_cbranch_execz .LBB8_87
; %bb.1:
	v_dual_mov_b32 v33, 0 :: v_dual_and_b32 v0, -3, v0
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v13, v1 :: v_dual_mov_b32 v12, v0
	s_mov_b32 s10, 0
.LBB8_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB8_5 Depth 2
                                        ;     Child Loop BB8_13 Depth 2
                                        ;     Child Loop BB8_21 Depth 2
                                        ;     Child Loop BB8_29 Depth 2
                                        ;     Child Loop BB8_37 Depth 2
                                        ;     Child Loop BB8_45 Depth 2
                                        ;     Child Loop BB8_53 Depth 2
                                        ;     Child Loop BB8_61 Depth 2
                                        ;     Child Loop BB8_69 Depth 2
                                        ;     Child Loop BB8_75 Depth 2
                                        ;     Child Loop BB8_84 Depth 2
	v_cmp_gt_u64_e32 vcc_lo, 56, v[4:5]
                                        ; implicit-def: $sgpr4
	s_mov_b32 s0, exec_lo
	v_dual_cndmask_b32 v1, 0, v5 :: v_dual_cndmask_b32 v0, 56, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 8, v0
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB8_8
; %bb.3:                                ;   in Loop: Header=BB8_2 Depth=1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v14, 0
	v_mov_b32_e32 v15, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_ne_u32_e32 0, v0
	s_cbranch_execz .LBB8_7
; %bb.4:                                ; %.preheader31.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	v_lshlrev_b64 v[8:9], 3, v[0:1]
	v_dual_mov_b32 v14, 0 :: v_dual_mov_b32 v17, v7
	v_dual_mov_b32 v15, 0 :: v_dual_mov_b32 v16, v6
	s_mov_b64 s[4:5], 0
	s_mov_b32 s7, 0
.LBB8_5:                                ; %.preheader31
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v3, v[16:17]
	v_mov_b32_e32 v19, s9
	v_add_co_u32 v16, vcc_lo, v16, 1
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v17, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v18, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[18:19], s4, v[18:19]
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e64 s0, s4, v8
	v_or_b32_e32 v15, v19, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v14, v18, v14
	s_or_b32 s7, s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB8_5
; %bb.6:                                ; %Flow163
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
.LBB8_7:                                ; %Flow165
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_mov_b32 s4, 0
.LBB8_8:                                ; %Flow167
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_saveexec_b32 s0, s1
	v_mov_b32_e32 v9, v7
	v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v8, v6
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB8_10
; %bb.9:                                ;   in Loop: Header=BB8_2 Depth=1
	s_clause 0x2
	flat_load_u8 v3, v[6:7]
	flat_load_u8 v8, v[6:7] offset:1
	flat_load_u8 v9, v[6:7] offset:2
	s_waitcnt vmcnt(3)
	s_clause 0x2
	flat_load_u8 v14, v[6:7] offset:3
	flat_load_u8 v15, v[6:7] offset:5
	flat_load_u8 v16, v[6:7] offset:4
	v_mov_b32_e32 v17, v33
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_and_b32_e32 v3, 0xffff, v3
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v8, 8, v8
	s_clause 0x1
	flat_load_u8 v18, v[6:7] offset:7
	flat_load_d16_hi_u8 v17, v[6:7] offset:6
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v9, 16, v9
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v14, 24, v14
	v_or_b32_e32 v3, v8, v3
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v8, 8, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_or3_b32 v3, v3, v9, v14
	s_waitcnt vmcnt(2)
	v_or3_b32 v8, 0, v16, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_or3_b32 v14, v3, 0, 0
	v_add_nc_u32_e32 v3, -8, v0
	v_or3_b32 v14, v14, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v9, 24, v18
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v15, v8, v17, v9
	v_add_co_u32 v8, vcc_lo, v6, 8
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo
.LBB8_10:                               ; %.loopexit32
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr16_vgpr17
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v3
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB8_16
; %bb.11:                               ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v16, 0
	v_mov_b32_e32 v17, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v3
	s_cbranch_execz .LBB8_15
; %bb.12:                               ; %.preheader29.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v16, 0
	v_mov_b32_e32 v17, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s11, 0
	s_mov_b64 s[4:5], 0
.LBB8_13:                               ; %.preheader29
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v18, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v3
	flat_load_u8 v18, v[18:19]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v19, s9 :: v_dual_and_b32 v18, 0xffff, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[18:19], s0, v[18:19]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s11, vcc_lo, s11
	v_or_b32_e32 v17, v19, v17
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v16, v18, v16
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB8_13
; %bb.14:                               ; %Flow158
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB8_15:                               ; %Flow160
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr3
.LBB8_16:                               ; %Flow162
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v20, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB8_18
; %bb.17:                               ;   in Loop: Header=BB8_2 Depth=1
	s_clause 0x5
	flat_load_u8 v16, v[8:9]
	flat_load_u8 v17, v[8:9] offset:1
	flat_load_u8 v18, v[8:9] offset:2
	flat_load_u8 v19, v[8:9] offset:3
	flat_load_u8 v20, v[8:9] offset:5
	flat_load_u8 v21, v[8:9] offset:4
	v_mov_b32_e32 v22, v33
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_and_b32_e32 v16, 0xffff, v16
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v17, 8, v17
	s_clause 0x1
	flat_load_u8 v23, v[8:9] offset:7
	flat_load_d16_hi_u8 v22, v[8:9] offset:6
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v18, 16, v18
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v19, 24, v19
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v16, v17, v16
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v17, 8, v20
	v_add_nc_u32_e32 v20, -8, v3
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	v_or3_b32 v16, v16, v18, v19
	s_waitcnt vmcnt(2)
	v_or3_b32 v17, 0, v21, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v16, v16, 0, 0
	v_or3_b32 v16, v16, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v18, 24, v23
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v17, v17, v22, v18
.LBB8_18:                               ; %.loopexit30
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v20
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB8_24
; %bb.19:                               ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v18, 0
	v_mov_b32_e32 v19, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v20
	s_cbranch_execz .LBB8_23
; %bb.20:                               ; %.preheader27.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v18, 0
	v_mov_b32_e32 v19, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s11, 0
	s_mov_b64 s[4:5], 0
.LBB8_21:                               ; %.preheader27
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v21, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v22, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v20
	flat_load_u8 v3, v[21:22]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v22, s9 :: v_dual_and_b32 v21, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[21:22], s0, v[21:22]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s11, vcc_lo, s11
	v_or_b32_e32 v19, v22, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v18, v21, v18
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB8_21
; %bb.22:                               ; %Flow153
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB8_23:                               ; %Flow155
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr20
.LBB8_24:                               ; %Flow157
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v3, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB8_26
; %bb.25:                               ;   in Loop: Header=BB8_2 Depth=1
	s_clause 0x5
	flat_load_u8 v3, v[8:9]
	flat_load_u8 v18, v[8:9] offset:1
	flat_load_u8 v19, v[8:9] offset:2
	flat_load_u8 v21, v[8:9] offset:3
	flat_load_u8 v22, v[8:9] offset:5
	flat_load_u8 v23, v[8:9] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v24, v33 :: v_dual_and_b32 v3, 0xffff, v3
	s_clause 0x1
	flat_load_u8 v25, v[8:9] offset:7
	flat_load_d16_hi_u8 v24, v[8:9] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v18, 8, v18
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v19, 16, v19
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v21, 24, v21
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v3, v18, v3
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v18, 8, v22
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v3, v3, v19, v21
	s_waitcnt vmcnt(2)
	v_or3_b32 v18, 0, v23, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or3_b32 v21, v3, 0, 0
	v_add_nc_u32_e32 v3, -8, v20
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v19, 24, v25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_or3_b32 v19, v18, v24, v19
	v_or3_b32 v18, v21, 0, 0
.LBB8_26:                               ; %.loopexit28
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr20_vgpr21
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v3
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB8_32
; %bb.27:                               ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v20, 0
	v_mov_b32_e32 v21, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v3
	s_cbranch_execz .LBB8_31
; %bb.28:                               ; %.preheader25.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v20, 0
	v_mov_b32_e32 v21, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s11, 0
	s_mov_b64 s[4:5], 0
.LBB8_29:                               ; %.preheader25
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v22, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v23, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v3
	flat_load_u8 v22, v[22:23]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v23, s9 :: v_dual_and_b32 v22, 0xffff, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], s0, v[22:23]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s11, vcc_lo, s11
	v_or_b32_e32 v21, v23, v21
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v20, v22, v20
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB8_29
; %bb.30:                               ; %Flow148
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB8_31:                               ; %Flow150
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr3
.LBB8_32:                               ; %Flow152
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v24, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB8_34
; %bb.33:                               ;   in Loop: Header=BB8_2 Depth=1
	s_clause 0x5
	flat_load_u8 v20, v[8:9]
	flat_load_u8 v21, v[8:9] offset:1
	flat_load_u8 v22, v[8:9] offset:2
	flat_load_u8 v23, v[8:9] offset:3
	flat_load_u8 v24, v[8:9] offset:5
	flat_load_u8 v25, v[8:9] offset:4
	v_mov_b32_e32 v26, v33
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_and_b32_e32 v20, 0xffff, v20
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v21, 8, v21
	s_clause 0x1
	flat_load_u8 v27, v[8:9] offset:7
	flat_load_d16_hi_u8 v26, v[8:9] offset:6
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v22, 16, v22
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v23, 24, v23
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v20, v21, v20
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v21, 8, v24
	v_add_nc_u32_e32 v24, -8, v3
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	v_or3_b32 v20, v20, v22, v23
	s_waitcnt vmcnt(2)
	v_or3_b32 v21, 0, v25, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v20, v20, 0, 0
	v_or3_b32 v20, v20, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v22, 24, v27
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v21, v21, v26, v22
.LBB8_34:                               ; %.loopexit26
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v24
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB8_40
; %bb.35:                               ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v22, 0
	v_mov_b32_e32 v23, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v24
	s_cbranch_execz .LBB8_39
; %bb.36:                               ; %.preheader23.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v22, 0
	v_mov_b32_e32 v23, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s11, 0
	s_mov_b64 s[4:5], 0
.LBB8_37:                               ; %.preheader23
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v25, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v26, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v24
	flat_load_u8 v3, v[25:26]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v26, s9 :: v_dual_and_b32 v25, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[25:26], s0, v[25:26]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s11, vcc_lo, s11
	v_or_b32_e32 v23, v26, v23
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v22, v25, v22
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB8_37
; %bb.38:                               ; %Flow143
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB8_39:                               ; %Flow145
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr24
.LBB8_40:                               ; %Flow147
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v3, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB8_42
; %bb.41:                               ;   in Loop: Header=BB8_2 Depth=1
	s_clause 0x5
	flat_load_u8 v3, v[8:9]
	flat_load_u8 v22, v[8:9] offset:1
	flat_load_u8 v23, v[8:9] offset:2
	flat_load_u8 v25, v[8:9] offset:3
	flat_load_u8 v26, v[8:9] offset:5
	flat_load_u8 v27, v[8:9] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v28, v33 :: v_dual_and_b32 v3, 0xffff, v3
	s_clause 0x1
	flat_load_u8 v29, v[8:9] offset:7
	flat_load_d16_hi_u8 v28, v[8:9] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v22, 8, v22
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v23, 16, v23
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v25, 24, v25
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v3, v22, v3
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v22, 8, v26
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v3, v3, v23, v25
	s_waitcnt vmcnt(2)
	v_or3_b32 v22, 0, v27, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_or3_b32 v25, v3, 0, 0
	v_add_nc_u32_e32 v3, -8, v24
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v23, 24, v29
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_or3_b32 v23, v22, v28, v23
	v_or3_b32 v22, v25, 0, 0
.LBB8_42:                               ; %.loopexit24
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr24_vgpr25
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v3
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB8_48
; %bb.43:                               ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v24, 0
	v_mov_b32_e32 v25, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v3
	s_cbranch_execz .LBB8_47
; %bb.44:                               ; %.preheader21.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v24, 0
	v_mov_b32_e32 v25, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s11, 0
	s_mov_b64 s[4:5], 0
.LBB8_45:                               ; %.preheader21
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v26, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v27, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v3
	flat_load_u8 v26, v[26:27]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v27, s9 :: v_dual_and_b32 v26, 0xffff, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[26:27], s0, v[26:27]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s11, vcc_lo, s11
	v_or_b32_e32 v25, v27, v25
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v24, v26, v24
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB8_45
; %bb.46:                               ; %Flow138
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB8_47:                               ; %Flow140
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr3
.LBB8_48:                               ; %Flow142
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v28, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB8_50
; %bb.49:                               ;   in Loop: Header=BB8_2 Depth=1
	s_clause 0x5
	flat_load_u8 v24, v[8:9]
	flat_load_u8 v25, v[8:9] offset:1
	flat_load_u8 v26, v[8:9] offset:2
	flat_load_u8 v27, v[8:9] offset:3
	flat_load_u8 v28, v[8:9] offset:5
	flat_load_u8 v29, v[8:9] offset:4
	v_mov_b32_e32 v30, v33
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_and_b32_e32 v24, 0xffff, v24
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v25, 8, v25
	s_clause 0x1
	flat_load_u8 v31, v[8:9] offset:7
	flat_load_d16_hi_u8 v30, v[8:9] offset:6
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v26, 16, v26
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v27, 24, v27
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v24, v25, v24
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v25, 8, v28
	v_add_nc_u32_e32 v28, -8, v3
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	v_or3_b32 v24, v24, v26, v27
	s_waitcnt vmcnt(2)
	v_or3_b32 v25, 0, v29, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v24, v24, 0, 0
	v_or3_b32 v24, v24, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v26, 24, v31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v25, v25, v30, v26
.LBB8_50:                               ; %.loopexit22
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v28
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB8_56
; %bb.51:                               ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v26, 0
	v_mov_b32_e32 v27, 0
	s_mov_b32 s5, exec_lo
	v_cmpx_ne_u32_e32 0, v28
	s_cbranch_execz .LBB8_55
; %bb.52:                               ; %.preheader.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v26, 0
	v_mov_b32_e32 v27, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s6, 0
.LBB8_53:                               ; %.preheader
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v3, v[8:9]
	v_mov_b32_e32 v30, s9
	v_add_nc_u32_e32 v28, -1, v28
	v_add_co_u32 v8, vcc_lo, v8, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v28
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v29, 0xffff, v3
	v_lshlrev_b64 v[29:30], s0, v[29:30]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v27, v30, v27
	v_or_b32_e32 v26, v29, v26
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB8_53
; %bb.54:                               ; %Flow133
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB8_55:                               ; %Flow135
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr8_vgpr9
.LBB8_56:                               ; %Flow137
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB8_58
; %bb.57:                               ;   in Loop: Header=BB8_2 Depth=1
	s_clause 0x5
	flat_load_u8 v3, v[8:9]
	flat_load_u8 v26, v[8:9] offset:1
	flat_load_u8 v27, v[8:9] offset:2
	flat_load_u8 v28, v[8:9] offset:3
	flat_load_u8 v29, v[8:9] offset:5
	flat_load_u8 v30, v[8:9] offset:4
	v_mov_b32_e32 v31, v33
	s_clause 0x1
	flat_load_u8 v32, v[8:9] offset:7
	flat_load_d16_hi_u8 v31, v[8:9] offset:6
	s_waitcnt vmcnt(7) lgkmcnt(0)
	v_and_b32_e32 v3, 0xffff, v3
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v8, 8, v26
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v9, 16, v27
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v26, 8, v29
	v_or_b32_e32 v3, v8, v3
	v_lshlrev_b32_e32 v8, 24, v28
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v3, v3, v9, v8
	s_waitcnt vmcnt(2)
	v_or3_b32 v8, 0, v30, v26
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v9, 24, v32
	v_or3_b32 v3, v3, 0, 0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or3_b32 v27, v8, v31, v9
	v_or3_b32 v26, v3, 0, 0
.LBB8_58:                               ; %.loopexit
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v32, v2
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v32
	v_cmp_eq_u32_e64 s0, s0, v32
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB8_64
; %bb.59:                               ;   in Loop: Header=BB8_2 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[30:31], v33, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[8:9], v33, s[2:3] offset:40
	global_load_b64 v[28:29], v33, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v9, v31
	v_and_b32_e32 v8, v8, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v9, v8, 24
	v_mul_lo_u32 v8, v8, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v28, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v29, v3, vcc_lo
	global_load_b64 v[28:29], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v33, v[28:31], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[30:31]
	s_cbranch_execz .LBB8_63
; %bb.60:                               ; %.preheader3.i.i19.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_mov_b32 s5, 0
.LBB8_61:                               ; %.preheader3.i.i19
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[28:29], v33, s[2:3] offset:40
	global_load_b64 v[34:35], v33, s[2:3]
	v_dual_mov_b32 v31, v9 :: v_dual_mov_b32 v30, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, v28, v30
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[8:9], null, v3, 24, v[34:35]
	v_and_b32_e32 v34, v29, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v3, v9
	v_mad_u64_u32 v[28:29], null, v34, 24, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v9, v28
	global_load_b64 v[28:29], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v33, v[28:31], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[30:31]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB8_61
; %bb.62:                               ; %Flow130
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB8_63:                               ; %Flow132
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB8_64:                               ; %.loopexit4.i.i14
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[34:35], v33, s[2:3] offset:40
	global_load_b128 v[28:31], v33, s[2:3]
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v34
	v_readfirstlane_b32 s7, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s11, s6, 24
	s_mul_i32 s12, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB8_66
; %bb.65:                               ;   in Loop: Header=BB8_2 Depth=1
	s_add_i32 s15, s11, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v34, vcc_lo, v28, s12
	v_add_co_ci_u32_e32 v35, vcc_lo, s15, v29, vcc_lo
	v_dual_mov_b32 v8, s13 :: v_dual_mov_b32 v9, v33
	global_store_b128 v[34:35], v[8:11], off offset:8
.LBB8_66:                               ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_cmp_lt_u64_e32 vcc_lo, 56, v[4:5]
	v_or_b32_e32 v3, 2, v12
	v_lshl_add_u32 v8, v0, 2, 28
	s_lshl_b64 s[6:7], s[6:7], 12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v3, v12, vcc_lo
	v_and_b32_e32 v12, 0x1e0, v8
	v_lshlrev_b64 v[8:9], 6, v[32:33]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v30, vcc_lo, v30, s6
	v_add_co_ci_u32_e32 v31, vcc_lo, s7, v31, vcc_lo
	v_and_or_b32 v12, 0xffffff1f, v3, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, v30, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, v31, v9, vcc_lo
	s_clause 0x3
	global_store_b128 v[8:9], v[12:15], off
	global_store_b128 v[8:9], v[16:19], off offset:16
	global_store_b128 v[8:9], v[20:23], off offset:32
	global_store_b128 v[8:9], v[24:27], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB8_74
; %bb.67:                               ;   in Loop: Header=BB8_2 Depth=1
	s_clause 0x1
	global_load_b64 v[20:21], v33, s[2:3] offset:32 glc
	global_load_b64 v[12:13], v33, s[2:3] offset:40
	v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s14, v12
	v_readfirstlane_b32 s15, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[14:15], s[14:15], s[4:5]
	s_mul_i32 s7, s15, 24
	s_mul_hi_u32 s13, s14, 24
	s_mul_i32 s14, s14, 24
	s_add_i32 s13, s13, s7
	v_add_co_u32 v16, vcc_lo, v28, s14
	v_add_co_ci_u32_e32 v17, vcc_lo, s13, v29, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[16:17], v[20:21], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[14:15], v33, v[18:21], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[14:15], v[20:21]
	s_cbranch_execz .LBB8_70
; %bb.68:                               ; %.preheader1.i.i17.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_mov_b32 s13, 0
.LBB8_69:                               ; %.preheader1.i.i17
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v12, s4 :: v_dual_mov_b32 v13, s5
	s_sleep 1
	global_store_b64 v[16:17], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[12:13], v33, v[12:15], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[14:15]
	v_dual_mov_b32 v15, v13 :: v_dual_mov_b32 v14, v12
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB8_69
.LBB8_70:                               ; %Flow128
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[12:13], v33, s[2:3] offset:16
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v3, s13, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB8_72
; %bb.71:                               ;   in Loop: Header=BB8_2 Depth=1
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v32, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[12:13], v[32:33], off offset:8
.LBB8_72:                               ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[14:15], v[12:13], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[14:15]
	s_cbranch_vccnz .LBB8_74
; %bb.73:                               ;   in Loop: Header=BB8_2 Depth=1
	global_load_b32 v32, v[12:13], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v32
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[14:15], v[32:33], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB8_74:                               ; %Flow129
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s11, s11, s1
	v_add_co_u32 v3, vcc_lo, v28, s12
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
.LBB8_75:                               ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB8_77
; %bb.76:                               ;   in Loop: Header=BB8_75 Depth=2
	global_load_b32 v3, v[12:13], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v3, 1, v3
.LBB8_77:                               ;   in Loop: Header=BB8_75 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v3
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB8_79
; %bb.78:                               ;   in Loop: Header=BB8_75 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB8_80
.LBB8_79:                               ;   in Loop: Header=BB8_75 Depth=2
	s_mov_b32 s1, -1
.LBB8_80:                               ; %Flow123
                                        ;   in Loop: Header=BB8_75 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB8_75
; %bb.81:                               ;   in Loop: Header=BB8_2 Depth=1
	global_load_b128 v[12:15], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB8_85
; %bb.82:                               ;   in Loop: Header=BB8_2 Depth=1
	s_clause 0x2
	global_load_b64 v[8:9], v33, s[2:3] offset:40
	global_load_b64 v[18:19], v33, s[2:3] offset:24 glc
	global_load_b64 v[16:17], v33, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v3, vcc_lo, v8, 1
	v_add_co_ci_u32_e32 v20, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v15, vcc_lo, s5, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[14:15]
	v_dual_cndmask_b32 v15, v15, v20 :: v_dual_cndmask_b32 v14, v14, v3
	v_and_b32_e32 v3, v15, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v8, v14, v8
	v_mul_hi_u32 v9, v8, 24
	v_mul_lo_u32 v8, v8, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, vcc_lo, v16, v8
	v_mov_b32_e32 v16, v18
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v9, vcc_lo, v17, v3, vcc_lo
	v_mov_b32_e32 v17, v19
	global_store_b64 v[8:9], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[16:17], v33, v[14:17], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[16:17], v[18:19]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB8_85
; %bb.83:                               ; %.preheader.i.i16.preheader
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_mov_b32 s0, 0
.LBB8_84:                               ; %.preheader.i.i16
                                        ;   Parent Loop BB8_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[8:9], v[16:17], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v33, v[14:17], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[16:17]
	v_dual_mov_b32 v16, v18 :: v_dual_mov_b32 v17, v19
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB8_84
.LBB8_85:                               ; %__ockl_hostcall_preview.exit20
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_sub_co_u32 v4, vcc_lo, v4, v0
	v_sub_co_ci_u32_e32 v5, vcc_lo, v5, v1, vcc_lo
	v_add_co_u32 v6, s0, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v7, s0, v7, v1, s0
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB8_2
; %bb.86:                               ; %Flow168
	s_or_b32 exec_lo, exec_lo, s10
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr1
.LBB8_87:                               ; %Flow185
	s_and_not1_saveexec_b32 s1, s8
	s_cbranch_execz .LBB8_116
; %bb.88:
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v2
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB8_94
; %bb.89:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[6:7], v3, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[8:9], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB8_93
; %bb.90:                               ; %.preheader3.i.i.preheader
	s_mov_b32 s6, 0
.LBB8_91:                               ; %.preheader3.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[10:11], v3, s[2:3]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB8_91
; %bb.92:                               ; %Flow181
	s_or_b32 exec_lo, exec_lo, s6
.LBB8_93:                               ; %Flow183
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB8_94:                               ; %.loopexit4.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s11, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v10
	v_readfirstlane_b32 s7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s8, s7, 24
	s_mul_hi_u32 s9, s6, 24
	s_mul_i32 s10, s6, 24
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB8_96
; %bb.95:
	s_add_i32 s13, s9, s8
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v5, vcc_lo
	v_dual_mov_b32 v8, s11 :: v_dual_mov_b32 v9, v3
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB8_96:
	s_or_b32 exec_lo, exec_lo, s12
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v2, v8
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_and_or_b32 v0, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v6, s12 :: v_dual_mov_b32 v9, s15
	v_dual_mov_b32 v7, s13 :: v_dual_mov_b32 v8, s14
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB8_104
; %bb.97:
	v_mov_b32_e32 v8, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v8, s[2:3] offset:40
	v_dual_mov_b32 v9, s4 :: v_dual_mov_b32 v10, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v6, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v1, vcc_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[11:12]
	s_cbranch_execz .LBB8_100
; %bb.98:                               ; %.preheader1.i.i.preheader
	s_mov_b32 s11, 0
.LBB8_99:                               ; %.preheader1.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[6:7], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB8_99
.LBB8_100:                              ; %Flow179
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s11, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s11, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB8_102
; %bb.101:
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s11
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB8_102:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB8_104
; %bb.103:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB8_104:                              ; %Flow180
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s9, s9, s8
	v_add_co_u32 v0, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB8_105:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB8_107
; %bb.106:                              ;   in Loop: Header=BB8_105 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB8_107:                              ;   in Loop: Header=BB8_105 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB8_109
; %bb.108:                              ;   in Loop: Header=BB8_105 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB8_110
.LBB8_109:                              ;   in Loop: Header=BB8_105 Depth=1
	s_mov_b32 s6, -1
.LBB8_110:                              ; %Flow174
                                        ;   in Loop: Header=BB8_105 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB8_105
; %bb.111:
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB8_115
; %bb.112:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[2:3] offset:40
	global_load_b64 v[7:8], v6, s[2:3] offset:24 glc
	global_load_b64 v[4:5], v6, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB8_115
; %bb.113:                              ; %.preheader.i.i.preheader
	s_mov_b32 s0, 0
.LBB8_114:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB8_114
.LBB8_115:                              ; %Flow172
	s_or_b32 exec_lo, exec_lo, s6
.LBB8_116:                              ; %Flow186
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end8:
	.size	__ockl_printf_append_string_n, .Lfunc_end8-__ockl_printf_append_string_n
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 5644
; NumSgprs: 34
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	print_tree              ; -- Begin function print_tree
	.globl	print_tree
	.p2align	8
	.type	print_tree,@function
print_tree:                             ; @print_tree
; %bb.0:
	s_load_b32 s4, s[0:1], 0x24
	s_add_u32 s2, s0, 24
	v_sub_nc_u32_e32 v0, 0, v0
	s_addc_u32 s3, s1, 0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s4
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e64 s15, v0
	s_cbranch_execz .LBB9_28
; %bb.1:
	s_load_b64 s[4:5], s[2:3], 0x50
	v_mbcnt_lo_u32_b32 v4, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB9_7
; %bb.2:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[4:5] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[4:5] offset:40
	global_load_b64 v[5:6], v0, s[4:5]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[4:5] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB9_6
; %bb.3:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s7, 0
.LBB9_4:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[4:5] offset:40
	global_load_b64 v[10:11], v0, s[4:5]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[4:5] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB9_4
; %bb.5:                                ; %Flow25
	s_or_b32 exec_lo, exec_lo, s7
.LBB9_6:                                ; %Flow27
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB9_7:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s6, v6
	v_readfirstlane_b32 s7, v7
	s_mov_b32 s12, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[4:5] offset:40
	global_load_b128 v[0:3], v5, s[4:5]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s8, v8
	v_readfirstlane_b32 s9, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[6:7], s[8:9]
	s_mul_i32 s3, s9, 24
	s_mul_hi_u32 s10, s8, 24
	s_mul_i32 s11, s8, 24
	s_and_saveexec_b32 s13, s2
	s_cbranch_execz .LBB9_9
; %bb.8:
	v_dual_mov_b32 v6, s12 :: v_dual_mov_b32 v7, v5
	s_add_i32 s12, s10, s3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s11
	v_add_co_ci_u32_e32 v11, vcc_lo, s12, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB9_9:
	s_or_b32 exec_lo, exec_lo, s13
	s_lshl_b64 s[8:9], s[8:9], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s8
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_mov_b32_e32 v6, v5
	v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v13, s15
	v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v12, s14
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s8, s2
	s_cbranch_execz .LBB9_16
; %bb.10:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s9, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[4:5] offset:32 glc
	global_load_b64 v[2:3], v10, s[4:5] offset:40
	v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v12, s7
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s7, v3
	v_and_b32_e32 v2, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[4:5] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB9_12
.LBB9_11:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s7
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[4:5] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s12, vcc_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB9_11
.LBB9_12:                               ; %Flow23
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v5, 0
	s_mov_b32 s12, exec_lo
	s_mov_b32 s9, exec_lo
	v_mbcnt_lo_u32_b32 v4, s12, 0
	global_load_b64 v[2:3], v5, s[4:5] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB9_14
; %bb.13:
	s_bcnt1_i32_b32 s12, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s12
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB9_14:
	s_or_b32 exec_lo, exec_lo, s9
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB9_16
; %bb.15:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s9, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s9, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB9_16:                               ; %Flow24
	s_or_b32 exec_lo, exec_lo, s8
	s_add_i32 s10, s10, s3
	v_add_co_u32 v0, vcc_lo, v0, s11
	v_add_co_ci_u32_e32 v1, vcc_lo, s10, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB9_17:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB9_19
; %bb.18:                               ;   in Loop: Header=BB9_17 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB9_19:                               ;   in Loop: Header=BB9_17 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s3, v2
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB9_21
; %bb.20:                               ;   in Loop: Header=BB9_17 Depth=1
	s_mov_b32 s3, 0
	s_sleep 1
	s_branch .LBB9_22
.LBB9_21:                               ;   in Loop: Header=BB9_17 Depth=1
	s_mov_b32 s3, -1
.LBB9_22:                               ; %Flow18
                                        ;   in Loop: Header=BB9_17 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB9_17
; %bb.23:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB9_27
; %bb.24:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[4:5] offset:40
	global_load_b64 v[9:10], v8, s[4:5] offset:24 glc
	global_load_b64 v[6:7], v8, s[4:5]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[4:5] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB9_27
; %bb.25:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s2, 0
.LBB9_26:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[4:5] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB9_26
.LBB9_27:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s3
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, .str.5@rel32@lo+4
	s_addc_u32 s3, s3, .str.5@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_cmp_lg_u64 s[2:3], 0
	v_mov_b32_e32 v5, 0
	s_cselect_b32 s4, 3, 0
	s_add_u32 s8, s0, 24
	v_mov_b32_e32 v4, s4
	s_addc_u32 s9, s1, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
.LBB9_28:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel print_tree
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 36
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end9:
	.size	print_tree, .Lfunc_end9-print_tree
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1540
; NumSgprs: 35
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 36
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	set_root                ; -- Begin function set_root
	.globl	set_root
	.p2align	8
	.type	set_root,@function
set_root:                               ; @set_root
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_sub_nc_u32_e32 v0, 0, v0
	s_mov_b32 s4, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e64 s15, v0
	s_cbranch_execz .LBB10_4
; %bb.1:
	s_clause 0x1
	s_load_b64 s[8:9], s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v7, 0xc4653600
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	s_mov_b32 s7, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v5, s7
	v_dual_mov_b32 v6, 1 :: v_dual_mov_b32 v3, s5
	v_dual_mov_b32 v4, s6 :: v_dual_mov_b32 v1, v0
	v_mov_b32_e32 v8, 0x3b9aca00
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b128 v0, v[2:5], s[0:1] offset:280
	global_store_b64 v0, v[0:1], s[0:1] offset:296
	s_cmp_eq_u32 s9, 1
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 0
	v_cndmask_b32_e64 v9, 0, 1, s4
	s_clause 0x3
	global_store_b96 v0, v[6:8], s[0:1] offset:308
	global_store_b8 v0, v9, s[0:1] offset:304
	global_store_b128 v0, v[2:5], s[0:1] offset:264
	global_store_b32 v0, v0, s[0:1] offset:256
	s_cbranch_scc1 .LBB10_4
; %bb.2:                                ; %.lr.ph.preheader
	s_mul_i32 s4, s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_max_u32 s4, s4, 1
.LBB10_3:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v1, v0, s[2:3]
	s_add_i32 s4, s4, -1
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s4, 0
	s_cbranch_scc1 .LBB10_3
.LBB10_4:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel set_root
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end10:
	.size	set_root, .Lfunc_end10-set_root
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 288
; NumSgprs: 16
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	copy_best_result        ; -- Begin function copy_best_result
	.globl	copy_best_result
	.p2align	8
	.type	copy_best_result,@function
copy_best_result:                       ; @copy_best_result
; %bb.0:
	s_load_b32 s4, s[0:1], 0x24
	s_add_u32 s2, s0, 24
	v_sub_nc_u32_e32 v0, 0, v0
	s_addc_u32 s3, s1, 0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s4
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e64 s15, v0
	s_cbranch_execz .LBB11_47
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[8:9], s[4:5], 0x108
	s_waitcnt lgkmcnt(0)
	s_cmp_lg_u64 s[8:9], 0
	s_cbranch_scc0 .LBB11_8
; %bb.2:
	s_load_b32 s10, s[0:1], 0x14
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s10, 1
	s_cbranch_scc1 .LBB11_9
; %bb.3:                                ; %.preheader29
	s_load_b32 s10, s[4:5], 0x13c
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v3, s9
	s_mov_b32 s11, 0
                                        ; implicit-def: $sgpr12
.LBB11_4:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v0, v2 :: v_dual_mov_b32 v1, v3
	flat_load_b32 v2, v[2:3] offset:312
	s_or_b32 s12, s12, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, s10, v2
                                        ; implicit-def: $vgpr2_vgpr3
	s_and_saveexec_b32 s13, vcc_lo
	s_cbranch_execz .LBB11_6
; %bb.5:                                ;   in Loop: Header=BB11_4 Depth=1
	flat_load_b64 v[2:3], v[0:1] offset:272
	s_and_not1_b32 s12, s12, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_and_b32 s14, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s12, s12, s14
.LBB11_6:                               ; %Flow59
                                        ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s13, exec_lo, s12
	s_or_b32 s11, s13, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB11_4
; %bb.7:                                ; %Flow60
	s_or_b32 exec_lo, exec_lo, s11
	s_mov_b32 s10, 0
	s_branch .LBB11_10
.LBB11_8:
	s_mov_b32 s4, -1
	s_branch .LBB11_19
.LBB11_9:
	s_mov_b32 s10, -1
                                        ; implicit-def: $vgpr0_vgpr1
.LBB11_10:                              ; %Flow63
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccz .LBB11_16
; %bb.11:                               ; %.preheader27
	s_load_b32 s4, s[4:5], 0x138
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v3, s9
	s_mov_b32 s5, 0
                                        ; implicit-def: $sgpr8
.LBB11_12:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v0, v2 :: v_dual_mov_b32 v1, v3
	flat_load_b32 v2, v[2:3] offset:316
	s_or_b32 s8, s8, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, s4, v2
                                        ; implicit-def: $vgpr2_vgpr3
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB11_14
; %bb.13:                               ;   in Loop: Header=BB11_12 Depth=1
	flat_load_b64 v[2:3], v[0:1] offset:272
	s_and_not1_b32 s8, s8, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_and_b32 s10, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s8, s8, s10
.LBB11_14:                              ; %Flow61
                                        ;   in Loop: Header=BB11_12 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s9, exec_lo, s8
	s_or_b32 s5, s9, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB11_12
; %bb.15:                               ; %Flow62
	s_or_b32 exec_lo, exec_lo, s5
.LBB11_16:                              ; %.loopexit28
	v_mov_b32_e32 v2, 0
	s_mov_b64 s[4:5], 0
.LBB11_17:                              ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v3, vcc_lo, v0, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v1, vcc_lo
	s_add_u32 s8, s6, s4
	s_addc_u32 s9, s7, s5
	s_add_u32 s4, s4, 4
	flat_load_b32 v3, v[3:4]
	s_addc_u32 s5, s5, 0
	s_cmpk_lg_i32 s4, 0x100
	s_waitcnt vmcnt(0) lgkmcnt(0)
	global_store_b32 v2, v3, s[8:9]
	s_cbranch_scc1 .LBB11_17
; %bb.18:                               ; %Flow
	s_mov_b32 s4, 0
.LBB11_19:                              ; %Flow78
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccz .LBB11_47
; %bb.20:
	s_load_b64 s[4:5], s[2:3], 0x50
	v_mbcnt_lo_u32_b32 v4, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB11_26
; %bb.21:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[4:5] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[4:5] offset:40
	global_load_b64 v[5:6], v0, s[4:5]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[4:5] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB11_25
; %bb.22:                               ; %.preheader3.i.i.i.preheader
	s_mov_b32 s7, 0
.LBB11_23:                              ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[4:5] offset:40
	global_load_b64 v[10:11], v0, s[4:5]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[4:5] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB11_23
; %bb.24:                               ; %Flow75
	s_or_b32 exec_lo, exec_lo, s7
.LBB11_25:                              ; %Flow77
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB11_26:                              ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s6, v6
	v_readfirstlane_b32 s7, v7
	s_mov_b32 s12, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[4:5] offset:40
	global_load_b128 v[0:3], v5, s[4:5]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s8, v8
	v_readfirstlane_b32 s9, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[6:7], s[8:9]
	s_mul_i32 s3, s9, 24
	s_mul_hi_u32 s10, s8, 24
	s_mul_i32 s11, s8, 24
	s_and_saveexec_b32 s13, s2
	s_cbranch_execz .LBB11_28
; %bb.27:
	v_dual_mov_b32 v6, s12 :: v_dual_mov_b32 v7, v5
	s_add_i32 s12, s10, s3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s11
	v_add_co_ci_u32_e32 v11, vcc_lo, s12, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB11_28:
	s_or_b32 exec_lo, exec_lo, s13
	s_lshl_b64 s[8:9], s[8:9], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s8
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_mov_b32_e32 v6, v5
	v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v13, s15
	v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v12, s14
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s8, s2
	s_cbranch_execz .LBB11_35
; %bb.29:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s9, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[4:5] offset:32 glc
	global_load_b64 v[2:3], v10, s[4:5] offset:40
	v_dual_mov_b32 v11, s6 :: v_dual_mov_b32 v12, s7
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s7, v3
	v_and_b32_e32 v2, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[4:5] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB11_31
.LBB11_30:                              ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s7
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[4:5] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s12, vcc_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB11_30
.LBB11_31:                              ; %Flow73
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v5, 0
	s_mov_b32 s12, exec_lo
	s_mov_b32 s9, exec_lo
	v_mbcnt_lo_u32_b32 v4, s12, 0
	global_load_b64 v[2:3], v5, s[4:5] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB11_33
; %bb.32:
	s_bcnt1_i32_b32 s12, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s12
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB11_33:
	s_or_b32 exec_lo, exec_lo, s9
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB11_35
; %bb.34:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s9, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s9, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB11_35:                              ; %Flow74
	s_or_b32 exec_lo, exec_lo, s8
	s_add_i32 s10, s10, s3
	v_add_co_u32 v0, vcc_lo, v0, s11
	v_add_co_ci_u32_e32 v1, vcc_lo, s10, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB11_36:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB11_38
; %bb.37:                               ;   in Loop: Header=BB11_36 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB11_38:                              ;   in Loop: Header=BB11_36 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s3, v2
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB11_40
; %bb.39:                               ;   in Loop: Header=BB11_36 Depth=1
	s_mov_b32 s3, 0
	s_sleep 1
	s_branch .LBB11_41
.LBB11_40:                              ;   in Loop: Header=BB11_36 Depth=1
	s_mov_b32 s3, -1
.LBB11_41:                              ; %Flow68
                                        ;   in Loop: Header=BB11_36 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB11_36
; %bb.42:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB11_46
; %bb.43:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[4:5] offset:40
	global_load_b64 v[9:10], v8, s[4:5] offset:24 glc
	global_load_b64 v[6:7], v8, s[4:5]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[4:5] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB11_46
; %bb.44:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s2, 0
.LBB11_45:                              ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[4:5] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB11_45
.LBB11_46:                              ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s3
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, .str.6@rel32@lo+4
	s_addc_u32 s3, s3, .str.6@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_cmp_lg_u64 s[2:3], 0
	v_mov_b32_e32 v5, 0
	s_cselect_b32 s4, 36, 0
	s_add_u32 s8, s0, 24
	v_mov_b32_e32 v4, s4
	s_addc_u32 s9, s1, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
.LBB11_47:                              ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel copy_best_result
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 36
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end11:
	.size	copy_best_result, .Lfunc_end11-copy_best_result
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1956
; NumSgprs: 35
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 36
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	.str.5,@object                  ; @.str.5
	.section	.rodata.str1.1,"aMS",@progbits,1
.str.5:
	.asciz	"\n\n"
	.size	.str.5, 3

	.type	.str.6,@object                  ; @.str.6
.str.6:
	.asciz	"No result -> root->chidlren = NULL\n"
	.size	.str.6, 36

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.type	__unnamed_1,@object             ; @0
	.section	.rodata,"a",@progbits
	.p2align	2, 0x0
__unnamed_1:
	.long	130054                          ; 0x1fc06
	.long	129546                          ; 0x1fa0a
	.long	110114                          ; 0x1ae22
	.long	16288                           ; 0x3fa0
	.long	6                               ; 0x6
	.long	256                             ; 0x100
	.long	0                               ; 0x0
	.long	4195                            ; 0x1063
	.long	86927                           ; 0x1538f
	.long	86758                           ; 0x152e6
	.long	73744                           ; 0x12010
	.long	10904                           ; 0x2a98
	.long	399                             ; 0x18f
	.long	512                             ; 0x200
	.long	0                               ; 0x0
	.long	2804                            ; 0xaf4
	.long	65280                           ; 0xff00
	.long	64770                           ; 0xfd02
	.long	55054                           ; 0xd70e
	.long	8192                            ; 0x2000
	.long	0                               ; 0x0
	.long	128                             ; 0x80
	.long	0                               ; 0x0
	.long	2107                            ; 0x83b
	.long	43576                           ; 0xaa38
	.long	43406                           ; 0xa98e
	.long	36895                           ; 0x901f
	.long	5504                            ; 0x1580
	.long	56                              ; 0x38
	.long	256                             ; 0x100
	.long	0                               ; 0x0
	.long	1405                            ; 0x57d
	.long	32703                           ; 0x7fbf
	.long	32193                           ; 0x7dc1
	.long	27364                           ; 0x6ae4
	.long	4160                            ; 0x1040
	.long	63                              ; 0x3f
	.long	64                              ; 0x40
	.long	0                               ; 0x0
	.long	1054                            ; 0x41e
	.long	21816                           ; 0x5538
	.long	21646                           ; 0x548e
	.long	18399                           ; 0x47df
	.long	2816                            ; 0xb00
	.long	56                              ; 0x38
	.long	128                             ; 0x80
	.long	0                               ; 0x0
	.long	703                             ; 0x2bf
	.long	16367                           ; 0x3fef
	.long	15856                           ; 0x3df0
	.long	13477                           ; 0x34a5
	.long	2176                            ; 0x880
	.long	15                              ; 0xf
	.long	32                              ; 0x20
	.long	32768                           ; 0x8000
	.long	527                             ; 0x20f
	.long	10915                           ; 0x2aa3
	.long	10745                           ; 0x29f9
	.long	9133                            ; 0x23ad
	.long	1472                            ; 0x5c0
	.long	35                              ; 0x23
	.long	64                              ; 0x40
	.long	0                               ; 0x0
	.long	352                             ; 0x160
	.long	8187                            ; 0x1ffb
	.long	7676                            ; 0x1dfc
	.long	6524                            ; 0x197c
	.long	1280                            ; 0x500
	.long	11                              ; 0xb
	.long	16                              ; 0x10
	.long	134219776                       ; 0x8000800
	.long	265                             ; 0x109
	.long	5459                            ; 0x1553
	.long	5289                            ; 0x14a9
	.long	4495                            ; 0x118f
	.long	896                             ; 0x380
	.long	19                              ; 0x13
	.long	32                              ; 0x20
	.long	524288                          ; 0x80000
	.long	176                             ; 0xb0
	.long	4094                            ; 0xffe
	.long	3583                            ; 0xdff
	.long	3045                            ; 0xbe5
	.long	1024                            ; 0x400
	.long	6                               ; 0x6
	.long	8                               ; 0x8
	.long	1077952576                      ; 0x40404040
	.long	133                             ; 0x85
	.long	2730                            ; 0xaaa
	.long	2560                            ; 0xa00
	.long	2176                            ; 0x880
	.long	512                             ; 0x200
	.long	10                              ; 0xa
	.long	16                              ; 0x10
	.long	67109888                        ; 0x4000400
	.long	89                              ; 0x59
	.long	2047                            ; 0x7ff
	.long	1536                            ; 0x600
	.long	1305                            ; 0x519
	.long	1024                            ; 0x400
	.long	3                               ; 0x3
	.long	4                               ; 0x4
	.long	2290649224                      ; 0x88888888
	.long	66                              ; 0x42
	.long	1365                            ; 0x555
	.long	1195                            ; 0x4ab
	.long	1015                            ; 0x3f7
	.long	512                             ; 0x200
	.long	5                               ; 0x5
	.long	8                               ; 0x8
	.long	538976288                       ; 0x20202020
	.long	44                              ; 0x2c
	.long	1023                            ; 0x3ff
	.long	512                             ; 0x200
	.long	435                             ; 0x1b3
	.long	2048                            ; 0x800
	.long	1                               ; 0x1
	.long	2                               ; 0x2
	.long	2863311530                      ; 0xaaaaaaaa
	.long	34                              ; 0x22
	.long	682                             ; 0x2aa
	.long	512                             ; 0x200
	.long	435                             ; 0x1b3
	.long	2048                            ; 0x800
	.long	2                               ; 0x2
	.long	4                               ; 0x4
	.long	1145324612                      ; 0x44444444
	.long	35                              ; 0x23
	.size	__unnamed_1, 512

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         104
        .size:           8
        .value_kind:     hidden_hostcall_buffer
      - .offset:         120
        .size:           8
        .value_kind:     hidden_heap_v1
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           create_tree
    .private_segment_fixed_size: 56
    .sgpr_count:     86
    .sgpr_spill_count: 0
    .symbol:         create_tree.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     184
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         104
        .size:           8
        .value_kind:     hidden_hostcall_buffer
      - .offset:         120
        .size:           8
        .value_kind:     hidden_heap_v1
    .group_segment_fixed_size: 4
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           delete_tree
    .private_segment_fixed_size: 0
    .sgpr_count:     35
    .sgpr_spill_count: 0
    .symbol:         delete_tree.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     27
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         104
        .size:           8
        .value_kind:     hidden_hostcall_buffer
      - .offset:         120
        .size:           8
        .value_kind:     hidden_heap_v1
    .group_segment_fixed_size: 4
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           alpha_beta
    .private_segment_fixed_size: 24
    .sgpr_count:     61
    .sgpr_spill_count: 0
    .symbol:         alpha_beta.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     183
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         104
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           print_tree
    .private_segment_fixed_size: 0
    .sgpr_count:     35
    .sgpr_spill_count: 0
    .symbol:         print_tree.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     36
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           set_root
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         set_root.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         104
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           copy_best_result
    .private_segment_fixed_size: 0
    .sgpr_count:     35
    .sgpr_spill_count: 0
    .symbol:         copy_best_result.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     36
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
