#include <stdio.h>
#include <stdlib.h>
#include <inttypes.h>

// Define constants and data types
#define MAX_FILE_SIZE       1048576
#define STORAGE_SIZE        1085440
#define DATAFILE            "./data.bin"
#define OUTPUTFILE          "./snapshot.bin"
#define FILE_ENTRIES		1024
#define META_SIZE			31
#define DATA_SIZE			1024
#define LS_S_OFFSET			1024
#define LS_D_OFFSET			3072
#define META_OFFSET			5120
#define SIZE_OFFSET			21
#define CREATET_OFFSET		SIZE_OFFSET+2
#define MODIFYT_OFFSET		CREATET_OFFSET+4
#define DATA_OFFSET			36864
#define DNE					0xffffffff
typedef unsigned char uchar;
typedef uint32_t u32;
const int G_WRITE   = 1;
const int G_READ    = 2;
const int LS_S      = 3;
const int LS_D      = 4;
const int RM        = 5;
const int RM_RF     = 6;

// Declare variables
__device__ __managed__ u32 currentTime = 0;
__device__ __managed__ u32 fileCt = 0;
__device__ __managed__ uchar *volume;
// ==================================================================
// How I use volume:
// V--0          V--3072           V--36864
// ------------------------------------------------------------------
// | Temp | LS_S | LS_D | Metadata |              Data              |
// ------------------------------------------------------------------
//        ^--1024       ^--5120
// Temp => For pending
// LS_S => Array for sorting by LS_S
// LS_D => Array for sorting by LS_D
// Metadata =>
//      Entry structure:
//      V--0   V--21  V--23     V--27
//      -----------------------------------
//      | Name | Size | CreateT | ModifyT |
//      -----------------------------------
//      Name    := 21 bytes, for 20 char and '\0'
//      Size    :=  2 bytes
//      CreateT :=  4 bytes
//      ModifyT :=  4 bytes
//      Total size = 31 bytes
// ==================================================================

// Function
// ******************************************************************
// Initialize
void init_volume() {
	for (int i = 0; i < STORAGE_SIZE; i++) {
		volume[i] = 0;
	}
}
// ******************************************************************

// ******************************************************************
// File I/O
int loadBinaryFile(const char *fileName, uchar *input, int fileSize) {
    FILE *fptr = fopen(fileName, "rb");
    // Get size
    fseek(fptr, 0, SEEK_END);
    int size = ftell(fptr);
    rewind(fptr);
    // Read data from input file
    fread(input, sizeof(unsigned char), size, fptr);
    if (fileSize < size) {
        printf("ERROR: Input size is too small to store input data!\n");
    }
	fclose(fptr);
    return size;
}

void writeBinaryFile(const char *fileName, uchar *input, int fileSize) {
    FILE *fptr = fopen(fileName, "wb");
    // Read data from input file
    fwrite(input, sizeof(unsigned char), fileSize, fptr);
	fclose(fptr);
}
// ******************************************************************

// ******************************************************************
// FS Helper function
__device__ inline int dstrlen(const char *str) {
	int len = 0;
	for (; str[len] != '\0'; len++);
	return len;
}
__device__ bool isNameMatched(int fid, const char *name) {
	bool isMatched = true;
	int len = dstrlen(name);
	for (int j = 0; j < len; j++) {
		if (volume[META_OFFSET+fid*META_SIZE+j] != name[j]) {
			isMatched = false;
			break;
		}
	}
	if (volume[META_OFFSET+fid*META_SIZE+len] != '\0')
		isMatched = false;
	return isMatched;
}
__device__ u32 createNewFile(const char *name) {
	u32 fid = fileCt++;
	int len = 0;
	for (; name[len] != '\0'; len++) {
		volume[META_OFFSET+fid*META_SIZE+len] = name[len];
	}
	volume[META_OFFSET+fid*META_SIZE+len] = '\0';
	volume[META_OFFSET+fid*META_SIZE+SIZE_OFFSET]   = 0;
	volume[META_OFFSET+fid*META_SIZE+SIZE_OFFSET+1] = 0;
	volume[META_OFFSET+fid*META_SIZE+CREATET_OFFSET]   = (currentTime & 0xFF000000) >> 24;
	volume[META_OFFSET+fid*META_SIZE+CREATET_OFFSET+1] = (currentTime & 0x00FF0000) >> 16;
	volume[META_OFFSET+fid*META_SIZE+CREATET_OFFSET+2] = (currentTime & 0x0000FF00) >> 8;
	volume[META_OFFSET+fid*META_SIZE+CREATET_OFFSET+3] = (currentTime & 0x000000FF);
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET]   = (currentTime & 0xFF000000) >> 24;
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET+1] = (currentTime & 0x00FF0000) >> 16;
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET+2] = (currentTime & 0x0000FF00) >> 8;
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET+3] = (currentTime & 0x000000FF);
	currentTime++;
	return fid;
}
__device__ inline void updateFileSize(int fid, int len) {
	volume[META_OFFSET+fid*META_SIZE+SIZE_OFFSET]   = (len & 0x0000FF00) >> 8;
	volume[META_OFFSET+fid*META_SIZE+SIZE_OFFSET+1] = (len & 0x000000FF);
}
__device__ inline void updateFileModifyTime(int fid) {
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET]   = (currentTime & 0xFF000000) >> 24;
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET+1] = (currentTime & 0x00FF0000) >> 16;
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET+2] = (currentTime & 0x0000FF00) >> 8;
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET+3] = (currentTime & 0x000000FF);
	currentTime++;
}
__device__ inline void updateData(int addr, uchar data) {
	volume[addr] = data;
}
__device__ inline u32 getData(int addr) {
	return volume[addr];
}
__device__ inline u32 getFileDataAddress(int fid) {
	return DATA_OFFSET+fid*DATA_SIZE;
}
__device__ u32 getFid(const char *name) {
	u32 fid = DNE;
	for (u32 i = 0; i < fileCt; i++) {
		if (isNameMatched(i, name)) {
			fid = i;
			break;
		}
	}
	if (fid == DNE) {
		fid = createNewFile(name);
	}
	return fid;
}
__device__ void sortD() {
	for (int i = 0; i < fileCt; i++) {
		volume[LS_D_OFFSET+i*2] 	= (i & 0x0000FF00) >> 8;
		volume[LS_D_OFFSET+i*2+1] 	= i & 0x000000FF;
	}
	for (int i = 0; i < fileCt; i++) {
		u32 swap = i;
		u32 currentFid = (((u32)(volume[LS_D_OFFSET+i*2])) << 8)
							| ((u32)(volume[LS_D_OFFSET+i*2+1]));
		u32 max = ((u32)volume[META_OFFSET+currentFid*META_SIZE+MODIFYT_OFFSET] << 24)
				| ((u32)volume[META_OFFSET+currentFid*META_SIZE+MODIFYT_OFFSET+1] << 16)
				| ((u32)volume[META_OFFSET+currentFid*META_SIZE+MODIFYT_OFFSET+2] << 8)
				| ((u32)volume[META_OFFSET+currentFid*META_SIZE+MODIFYT_OFFSET+3]);
		for (int j = i+1; j < fileCt; j++) {
			u32 tmpFid = (((u32)(volume[LS_D_OFFSET+j*2])) << 8)
						| ((u32)(volume[LS_D_OFFSET+j*2+1]));
			u32 tmp = ((u32)volume[META_OFFSET+tmpFid*META_SIZE+MODIFYT_OFFSET] << 24)
					| ((u32)volume[META_OFFSET+tmpFid*META_SIZE+MODIFYT_OFFSET+1] << 16)
					| ((u32)volume[META_OFFSET+tmpFid*META_SIZE+MODIFYT_OFFSET+2] << 8)
					| ((u32)volume[META_OFFSET+tmpFid*META_SIZE+MODIFYT_OFFSET+3]);
			if (tmp > max) {
				currentFid = tmpFid;
				max = tmp;
				swap = j;
			}
		}
		volume[LS_D_OFFSET+swap*2]    = volume[LS_D_OFFSET+i*2];
		volume[LS_D_OFFSET+swap*2+1]  = volume[LS_D_OFFSET+i*2+1];
		volume[LS_D_OFFSET+i*2] 	  = (currentFid & 0x0000FF00) >> 8;
		volume[LS_D_OFFSET+i*2+1] 	  = currentFid & 0x000000FF;
	}
}
__device__ void printD() {
	printf("===sort by modified time===\n");
	for (int i = 0; i < fileCt; i++) {
		int fid = ((int)(volume[LS_D_OFFSET+i*2]) << 8) | ((int)(volume[LS_D_OFFSET+i*2+1]));
		for (int j = 0; volume[META_OFFSET+fid*META_SIZE+j] != '\0'; j++)
			printf("%c", volume[META_OFFSET+fid*META_SIZE+j]);
		printf("\n");
	}
}
__device__ void sortS() {
	for (int i = 0; i < fileCt; i++) {
		volume[LS_S_OFFSET+i*2] 	= (i & 0x0000FF00) >> 8;
		volume[LS_S_OFFSET+i*2+1] 	= i & 0x000000FF;
	}
	for (int i = 0; i < fileCt; i++) {
		u32 swap = i;
		u32 currentFid = (((u32)(volume[LS_S_OFFSET+i*2])) << 8)
							| ((u32)(volume[LS_S_OFFSET+i*2+1]));
		u32 max = ((u32)volume[META_OFFSET+currentFid*META_SIZE+SIZE_OFFSET] << 8)
				| ((u32)volume[META_OFFSET+currentFid*META_SIZE+SIZE_OFFSET+1]);
		for (int j = i+1; j < fileCt; j++) {
			u32 tmpFid = (((u32)(volume[LS_S_OFFSET+j*2])) << 8)
						| ((u32)(volume[LS_S_OFFSET+j*2+1]));
			u32 tmp = ((u32)volume[META_OFFSET+tmpFid*META_SIZE+SIZE_OFFSET] << 8)
					| ((u32)volume[META_OFFSET+tmpFid*META_SIZE+SIZE_OFFSET+1]);
			if (tmp > max) {
				currentFid = tmpFid;
				max = tmp;
				swap = j;
			} else if (tmp == max) {
				u32 tct = ((u32)volume[META_OFFSET+tmpFid*META_SIZE+CREATET_OFFSET] << 24)
						| ((u32)volume[META_OFFSET+tmpFid*META_SIZE+CREATET_OFFSET+1] << 16)
						| ((u32)volume[META_OFFSET+tmpFid*META_SIZE+CREATET_OFFSET+2] << 8)
						| ((u32)volume[META_OFFSET+tmpFid*META_SIZE+CREATET_OFFSET+3]);
				u32 cct = ((u32)volume[META_OFFSET+currentFid*META_SIZE+CREATET_OFFSET] << 24)
						| ((u32)volume[META_OFFSET+currentFid*META_SIZE+CREATET_OFFSET+1] << 16)
						| ((u32)volume[META_OFFSET+currentFid*META_SIZE+CREATET_OFFSET+2] << 8)
						| ((u32)volume[META_OFFSET+currentFid*META_SIZE+CREATET_OFFSET+3]);
				if (cct > tct) {
					currentFid = tmpFid;
					max = tmp;
					swap = j;
				}
			}
		}
		volume[LS_S_OFFSET+swap*2]    = volume[LS_S_OFFSET+i*2];
		volume[LS_S_OFFSET+swap*2+1]  = volume[LS_S_OFFSET+i*2+1];
		volume[LS_S_OFFSET+i*2] 	  = (currentFid & 0x0000FF00) >> 8;
		volume[LS_S_OFFSET+i*2+1] 	  = currentFid & 0x000000FF;
	}
}
__device__ void printS() {
	printf("===sort by file size===\n");
	for (int i = 0; i < fileCt; i++) {
		int fid = ((int)(volume[LS_S_OFFSET+i*2]) << 8) | ((int)(volume[LS_S_OFFSET+i*2+1]));
		u32 tmp = (((u32)(volume[META_OFFSET+fid*META_SIZE+SIZE_OFFSET])) << 8)
				| ((u32)volume[META_OFFSET+fid*META_SIZE+SIZE_OFFSET+1]);
		for (int j = 0; volume[META_OFFSET+fid*META_SIZE+j] != '\0'; j++)
			printf("%c", volume[META_OFFSET+fid*META_SIZE+j]);
		printf(" %d\n", tmp);
	}
}
__device__ void deleteFileByName(const char *name) {
	int target = DNE;
	for (int i = 0; i < fileCt; i++) {
		if(isNameMatched(i, name)) {
			target = i;
			break;
		}
	}
	fileCt--;
	if (target != fileCt) {
		for (int i = 0; i < META_SIZE; i++) {
			volume[META_OFFSET+target*META_SIZE+i] = volume[META_OFFSET+fileCt*META_SIZE+i];
		}
		for (int i = 0; i < volume[META_OFFSET+fileCt*META_OFFSET+SIZE_OFFSET]; i++) {
			volume[DATA_OFFSET+target*DATA_SIZE+i] = volume[DATA_OFFSET+fileCt*DATA_SIZE+i];
		}
	}
}
// ******************************************************************

// ******************************************************************
// FS Operation
__device__ u32 open(const char *name, int type) {
	u32 fid = getFid(name);
    return fid;
}

__device__ void write(uchar *src, int len, u32 fid) {
	updateFileSize(fid, len);
	updateFileModifyTime(fid);
	u32 entry = getFileDataAddress(fid);
	for (u32 i = 0; i < len; i++) {
		updateData(entry+i,src[i]);
	}
}

__device__ void read(uchar *dst, int len, u32 fid) {
	u32 entry = getFileDataAddress(fid);
	for (u32 i = 0; i < len; i++) {
		dst[i] = getData(entry+i);
	}
}

__device__ void gsys(int type) {
	switch (type) {
		case LS_D:
			sortD();
			printD();
			break;
		case LS_S:
			sortS();
			printS();
			break;
		default:
			sortS();
			printS();
			break;
	}
}

__device__ void gsys(int type, const char *name) {
	switch (type) {
		case RM:
			deleteFileByName(name);
			break;
		default:
			deleteFileByName(name);
			break;
	}
}

// ******************************************************************

// ******************************************************************
// Kernel function
__global__ void mykernel(uchar *input, uchar *output) {
    //####kernel start####
    u32 fp = open("t.txt\0", G_WRITE);
    write(input, 64, fp);
    fp = open("b.txt\0", G_WRITE);
    write(input+32, 32, fp);
    fp = open("t.txt\0", G_WRITE);
    write(input+32, 32, fp);
    fp = open("t.txt\0", G_READ);
    read(output, 32, fp);
    gsys(LS_D);
    gsys(LS_S);
    fp = open("b.txt\0", G_WRITE);
    write(input+64, 12, fp);
    gsys(LS_S);
    gsys(LS_D);
    gsys(RM, "t.txt\0");
    gsys(LS_S);
    //####kernel end####
}
// ******************************************************************

int main() {
    cudaMallocManaged(&volume, STORAGE_SIZE);
    init_volume();

    uchar *input, *output;
    cudaMallocManaged(&input, MAX_FILE_SIZE);
    cudaMallocManaged(&output, MAX_FILE_SIZE);
    for (int i = 0; i < MAX_FILE_SIZE; i++) {
        output[i] = 0;
    }
    loadBinaryFile(DATAFILE, input, MAX_FILE_SIZE);

    cudaSetDevice(5);
    mykernel<<<1, 1>>>(input, output);
    cudaDeviceSynchronize();
    writeBinaryFile(OUTPUTFILE, output, MAX_FILE_SIZE);
    cudaDeviceReset();

    return 0;
}

	.file	"tmpxft_002f7042_00000000-6_main.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL20__nv_init_managed_rtv, @function
_ZL20__nv_init_managed_rtv:
.LFB1:
	.cfi_startproc
	movb	_ZL22__nv_inited_managed_rt(%rip), %al
	testb	%al, %al
	jne	.L4
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	_ZL32__nv_fatbinhandle_for_managed_rt(%rip), %rdi
	call	__cudaInitModule@PLT
	movb	%al, _ZL22__nv_inited_managed_rt(%rip)
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
.L4:
	movb	%al, _ZL22__nv_inited_managed_rt(%rip)
	ret
	.cfi_endproc
.LFE1:
	.size	_ZL20__nv_init_managed_rtv, .-_ZL20__nv_init_managed_rtv
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2052:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2052:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11init_volumev
	.type	_Z11init_volumev, @function
_Z11init_volumev:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	xorl	%ebx, %ebx
.L11:
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L10
	call	_ZL20__nv_init_managed_rtv
.L10:
	movq	_ZL6volume(%rip), %rax
	movq	(%rax), %rax
	movb	$0, (%rax,%rbx)
	incq	%rbx
	cmpq	$1085440, %rbx
	jne	.L11
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z11init_volumev, .-_Z11init_volumev
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"rb"
.LC1:
	.string	"ERROR: Input size is too small to store input data!\n"
	.text
	.globl	_Z14loadBinaryFilePKcPhi
	.type	_Z14loadBinaryFilePKcPhi, @function
_Z14loadBinaryFilePKcPhi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	leaq	.LC0(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	fopen@PLT
	xorl	%esi, %esi
	movl	$2, %edx
	movq	%rax, %rbx
	movq	%rax, %rdi
	call	fseek@PLT
	movq	%rbx, %rdi
	call	ftell@PLT
	movq	%rbx, %rdi
	movq	%rax, %rbp
	movl	%eax, %r14d
	call	rewind@PLT
	orq	$-1, %rsi
	movslq	%ebp, %rcx
	movq	%rbx, %r8
	movl	$1, %edx
	movq	%r13, %rdi
	call	__fread_chk@PLT
	cmpl	%r12d, %ebp
	jle	.L15
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L15:
	movq	%rbx, %rdi
	call	fclose@PLT
	popq	%rbx
	.cfi_def_cfa_offset 40
	movl	%r14d, %eax
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z14loadBinaryFilePKcPhi, .-_Z14loadBinaryFilePKcPhi
	.section	.rodata.str1.1
.LC2:
	.string	"wb"
	.text
	.globl	_Z15writeBinaryFilePKcPhi
	.type	_Z15writeBinaryFilePKcPhi, @function
_Z15writeBinaryFilePKcPhi:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r12
	leaq	.LC2(%rip), %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%edx, %ebx
	call	fopen@PLT
	movq	%r12, %rdi
	movslq	%ebx, %rdx
	movl	$1, %esi
	movq	%rax, %rbp
	movq	%rax, %rcx
	call	fwrite@PLT
	popq	%rbx
	.cfi_def_cfa_offset 24
	movq	%rbp, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z15writeBinaryFilePKcPhi, .-_Z15writeBinaryFilePKcPhi
	.globl	_Z13isNameMatchediPKc
	.type	_Z13isNameMatchediPKc, @function
_Z13isNameMatchediPKc:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z13isNameMatchediPKc, .-_Z13isNameMatchediPKc
	.globl	_Z13createNewFilePKc
	.type	_Z13createNewFilePKc, @function
_Z13createNewFilePKc:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2032:
	.size	_Z13createNewFilePKc, .-_Z13createNewFilePKc
	.globl	_Z6getFidPKc
	.type	_Z6getFidPKc, @function
_Z6getFidPKc:
.LFB2195:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z13createNewFilePKc
	.cfi_endproc
.LFE2195:
	.size	_Z6getFidPKc, .-_Z6getFidPKc
	.globl	_Z5sortDv
	.type	_Z5sortDv, @function
_Z5sortDv:
.LFB2039:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2039:
	.size	_Z5sortDv, .-_Z5sortDv
	.globl	_Z6printDv
	.type	_Z6printDv, @function
_Z6printDv:
.LFB2197:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z5sortDv
	.cfi_endproc
.LFE2197:
	.size	_Z6printDv, .-_Z6printDv
	.globl	_Z5sortSv
	.type	_Z5sortSv, @function
_Z5sortSv:
.LFB2199:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z5sortDv
	.cfi_endproc
.LFE2199:
	.size	_Z5sortSv, .-_Z5sortSv
	.globl	_Z6printSv
	.type	_Z6printSv, @function
_Z6printSv:
.LFB2201:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z5sortDv
	.cfi_endproc
.LFE2201:
	.size	_Z6printSv, .-_Z6printSv
	.globl	_Z16deleteFileByNamePKc
	.type	_Z16deleteFileByNamePKc, @function
_Z16deleteFileByNamePKc:
.LFB2043:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2043:
	.size	_Z16deleteFileByNamePKc, .-_Z16deleteFileByNamePKc
	.globl	_Z4openPKci
	.type	_Z4openPKci, @function
_Z4openPKci:
.LFB2044:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2044:
	.size	_Z4openPKci, .-_Z4openPKci
	.globl	_Z5writePhij
	.type	_Z5writePhij, @function
_Z5writePhij:
.LFB2045:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2045:
	.size	_Z5writePhij, .-_Z5writePhij
	.globl	_Z4readPhij
	.type	_Z4readPhij, @function
_Z4readPhij:
.LFB2203:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2203:
	.size	_Z4readPhij, .-_Z4readPhij
	.globl	_Z4gsysi
	.type	_Z4gsysi, @function
_Z4gsysi:
.LFB2047:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2047:
	.size	_Z4gsysi, .-_Z4gsysi
	.globl	_Z4gsysiPKc
	.type	_Z4gsysiPKc, @function
_Z4gsysiPKc:
.LFB2048:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2048:
	.size	_Z4gsysiPKc, .-_Z4gsysiPKc
	.globl	_Z29__device_stub__Z8mykernelPhS_PhS_
	.type	_Z29__device_stub__Z8mykernelPhS_PhS_, @function
_Z29__device_stub__Z8mykernelPhS_PhS_:
.LFB2074:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z8mykernelPhS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L45:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L47
	call	__stack_chk_fail@PLT
.L47:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2074:
	.size	_Z29__device_stub__Z8mykernelPhS_PhS_, .-_Z29__device_stub__Z8mykernelPhS_PhS_
	.globl	_Z8mykernelPhS_
	.type	_Z8mykernelPhS_, @function
_Z8mykernelPhS_:
.LFB2075:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z8mykernelPhS_PhS_
	.cfi_endproc
.LFE2075:
	.size	_Z8mykernelPhS_, .-_Z8mykernelPhS_
	.section	.rodata.str1.1
.LC3:
	.string	"./data.bin"
.LC4:
	.string	"./snapshot.bin"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2049:
	.cfi_startproc
	endbr64
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L51
	call	_ZL20__nv_init_managed_rtv
.L51:
	movq	_ZL6volume(%rip), %rdi
	movl	$1, %edx
	movl	$1085440, %esi
	call	cudaMallocManaged@PLT
	call	_Z11init_volumev
	movq	%rsp, %rdi
	movl	$1, %edx
	movl	$1048576, %esi
	call	cudaMallocManaged@PLT
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	movl	$1048576, %esi
	call	cudaMallocManaged@PLT
	xorl	%eax, %eax
.L52:
	movq	8(%rsp), %rdx
	movb	$0, (%rdx,%rax)
	incq	%rax
	cmpq	$1048576, %rax
	jne	.L52
	movq	(%rsp), %rsi
	movl	$1048576, %edx
	leaq	.LC3(%rip), %rdi
	call	_Z14loadBinaryFilePKcPhi
	movl	$5, %edi
	call	cudaSetDevice@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L53
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z29__device_stub__Z8mykernelPhS_PhS_
.L53:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rsi
	movl	$1048576, %edx
	leaq	.LC4(%rip), %rdi
	call	_Z15writeBinaryFilePKcPhi
	call	cudaDeviceReset@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L54
	call	__stack_chk_fail@PLT
.L54:
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2049:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z8mykernelPhS_"
.LC6:
	.string	"currentTime"
.LC7:
	.string	"fileCt"
.LC8:
	.string	"volume"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2077:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8mykernelPhS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	movq	%rax, _ZL32__nv_fatbinhandle_for_managed_rt(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movl	$4, %r9d
	leaq	_ZL11currentTime(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterManagedVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL6fileCt(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$8, %r9d
	movq	%rdx, %rcx
	leaq	_ZL6volume(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2077:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	__nv_managed_data__,"aw"
	.align 8
	.type	_ZL6volume, @object
	.size	_ZL6volume, 8
_ZL6volume:
	.zero	8
	.align 8
	.type	_ZL6fileCt, @object
	.size	_ZL6fileCt, 8
_ZL6fileCt:
	.zero	8
	.align 8
	.type	_ZL11currentTime, @object
	.size	_ZL11currentTime, 8
_ZL11currentTime:
	.zero	8
	.local	_ZL32__nv_fatbinhandle_for_managed_rt
	.comm	_ZL32__nv_fatbinhandle_for_managed_rt,8,8
	.local	_ZL22__nv_inited_managed_rt
	.comm	_ZL22__nv_inited_managed_rt,1,1
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <inttypes.h>

// Define constants and data types
#define MAX_FILE_SIZE       1048576
#define STORAGE_SIZE        1085440
#define DATAFILE            "./data.bin"
#define OUTPUTFILE          "./snapshot.bin"
#define FILE_ENTRIES		1024
#define META_SIZE			31
#define DATA_SIZE			1024
#define LS_S_OFFSET			1024
#define LS_D_OFFSET			3072
#define META_OFFSET			5120
#define SIZE_OFFSET			21
#define CREATET_OFFSET		SIZE_OFFSET+2
#define MODIFYT_OFFSET		CREATET_OFFSET+4
#define DATA_OFFSET			36864
#define DNE					0xffffffff
typedef unsigned char uchar;
typedef uint32_t u32;
const int G_WRITE   = 1;
const int G_READ    = 2;
const int LS_S      = 3;
const int LS_D      = 4;
const int RM        = 5;
const int RM_RF     = 6;

// Declare variables
__device__ __managed__ u32 currentTime = 0;
__device__ __managed__ u32 fileCt = 0;
__device__ __managed__ uchar *volume;
// ==================================================================
// How I use volume:
// V--0          V--3072           V--36864
// ------------------------------------------------------------------
// | Temp | LS_S | LS_D | Metadata |              Data              |
// ------------------------------------------------------------------
//        ^--1024       ^--5120
// Temp => For pending
// LS_S => Array for sorting by LS_S
// LS_D => Array for sorting by LS_D
// Metadata =>
//      Entry structure:
//      V--0   V--21  V--23     V--27
//      -----------------------------------
//      | Name | Size | CreateT | ModifyT |
//      -----------------------------------
//      Name    := 21 bytes, for 20 char and '\0'
//      Size    :=  2 bytes
//      CreateT :=  4 bytes
//      ModifyT :=  4 bytes
//      Total size = 31 bytes
// ==================================================================

// Function
// ******************************************************************
// Initialize
void init_volume() {
	for (int i = 0; i < STORAGE_SIZE; i++) {
		volume[i] = 0;
	}
}
// ******************************************************************

// ******************************************************************
// File I/O
int loadBinaryFile(const char *fileName, uchar *input, int fileSize) {
    FILE *fptr = fopen(fileName, "rb");
    // Get size
    fseek(fptr, 0, SEEK_END);
    int size = ftell(fptr);
    rewind(fptr);
    // Read data from input file
    fread(input, sizeof(unsigned char), size, fptr);
    if (fileSize < size) {
        printf("ERROR: Input size is too small to store input data!\n");
    }
	fclose(fptr);
    return size;
}

void writeBinaryFile(const char *fileName, uchar *input, int fileSize) {
    FILE *fptr = fopen(fileName, "wb");
    // Read data from input file
    fwrite(input, sizeof(unsigned char), fileSize, fptr);
	fclose(fptr);
}
// ******************************************************************

// ******************************************************************
// FS Helper function
__device__ inline int dstrlen(const char *str) {
	int len = 0;
	for (; str[len] != '\0'; len++);
	return len;
}
__device__ bool isNameMatched(int fid, const char *name) {
	bool isMatched = true;
	int len = dstrlen(name);
	for (int j = 0; j < len; j++) {
		if (volume[META_OFFSET+fid*META_SIZE+j] != name[j]) {
			isMatched = false;
			break;
		}
	}
	if (volume[META_OFFSET+fid*META_SIZE+len] != '\0')
		isMatched = false;
	return isMatched;
}
__device__ u32 createNewFile(const char *name) {
	u32 fid = fileCt++;
	int len = 0;
	for (; name[len] != '\0'; len++) {
		volume[META_OFFSET+fid*META_SIZE+len] = name[len];
	}
	volume[META_OFFSET+fid*META_SIZE+len] = '\0';
	volume[META_OFFSET+fid*META_SIZE+SIZE_OFFSET]   = 0;
	volume[META_OFFSET+fid*META_SIZE+SIZE_OFFSET+1] = 0;
	volume[META_OFFSET+fid*META_SIZE+CREATET_OFFSET]   = (currentTime & 0xFF000000) >> 24;
	volume[META_OFFSET+fid*META_SIZE+CREATET_OFFSET+1] = (currentTime & 0x00FF0000) >> 16;
	volume[META_OFFSET+fid*META_SIZE+CREATET_OFFSET+2] = (currentTime & 0x0000FF00) >> 8;
	volume[META_OFFSET+fid*META_SIZE+CREATET_OFFSET+3] = (currentTime & 0x000000FF);
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET]   = (currentTime & 0xFF000000) >> 24;
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET+1] = (currentTime & 0x00FF0000) >> 16;
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET+2] = (currentTime & 0x0000FF00) >> 8;
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET+3] = (currentTime & 0x000000FF);
	currentTime++;
	return fid;
}
__device__ inline void updateFileSize(int fid, int len) {
	volume[META_OFFSET+fid*META_SIZE+SIZE_OFFSET]   = (len & 0x0000FF00) >> 8;
	volume[META_OFFSET+fid*META_SIZE+SIZE_OFFSET+1] = (len & 0x000000FF);
}
__device__ inline void updateFileModifyTime(int fid) {
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET]   = (currentTime & 0xFF000000) >> 24;
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET+1] = (currentTime & 0x00FF0000) >> 16;
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET+2] = (currentTime & 0x0000FF00) >> 8;
	volume[META_OFFSET+fid*META_SIZE+MODIFYT_OFFSET+3] = (currentTime & 0x000000FF);
	currentTime++;
}
__device__ inline void updateData(int addr, uchar data) {
	volume[addr] = data;
}
__device__ inline u32 getData(int addr) {
	return volume[addr];
}
__device__ inline u32 getFileDataAddress(int fid) {
	return DATA_OFFSET+fid*DATA_SIZE;
}
__device__ u32 getFid(const char *name) {
	u32 fid = DNE;
	for (u32 i = 0; i < fileCt; i++) {
		if (isNameMatched(i, name)) {
			fid = i;
			break;
		}
	}
	if (fid == DNE) {
		fid = createNewFile(name);
	}
	return fid;
}
__device__ void sortD() {
	for (int i = 0; i < fileCt; i++) {
		volume[LS_D_OFFSET+i*2] 	= (i & 0x0000FF00) >> 8;
		volume[LS_D_OFFSET+i*2+1] 	= i & 0x000000FF;
	}
	for (int i = 0; i < fileCt; i++) {
		u32 swap = i;
		u32 currentFid = (((u32)(volume[LS_D_OFFSET+i*2])) << 8)
							| ((u32)(volume[LS_D_OFFSET+i*2+1]));
		u32 max = ((u32)volume[META_OFFSET+currentFid*META_SIZE+MODIFYT_OFFSET] << 24)
				| ((u32)volume[META_OFFSET+currentFid*META_SIZE+MODIFYT_OFFSET+1] << 16)
				| ((u32)volume[META_OFFSET+currentFid*META_SIZE+MODIFYT_OFFSET+2] << 8)
				| ((u32)volume[META_OFFSET+currentFid*META_SIZE+MODIFYT_OFFSET+3]);
		for (int j = i+1; j < fileCt; j++) {
			u32 tmpFid = (((u32)(volume[LS_D_OFFSET+j*2])) << 8)
						| ((u32)(volume[LS_D_OFFSET+j*2+1]));
			u32 tmp = ((u32)volume[META_OFFSET+tmpFid*META_SIZE+MODIFYT_OFFSET] << 24)
					| ((u32)volume[META_OFFSET+tmpFid*META_SIZE+MODIFYT_OFFSET+1] << 16)
					| ((u32)volume[META_OFFSET+tmpFid*META_SIZE+MODIFYT_OFFSET+2] << 8)
					| ((u32)volume[META_OFFSET+tmpFid*META_SIZE+MODIFYT_OFFSET+3]);
			if (tmp > max) {
				currentFid = tmpFid;
				max = tmp;
				swap = j;
			}
		}
		volume[LS_D_OFFSET+swap*2]    = volume[LS_D_OFFSET+i*2];
		volume[LS_D_OFFSET+swap*2+1]  = volume[LS_D_OFFSET+i*2+1];
		volume[LS_D_OFFSET+i*2] 	  = (currentFid & 0x0000FF00) >> 8;
		volume[LS_D_OFFSET+i*2+1] 	  = currentFid & 0x000000FF;
	}
}
__device__ void printD() {
	printf("===sort by modified time===\n");
	for (int i = 0; i < fileCt; i++) {
		int fid = ((int)(volume[LS_D_OFFSET+i*2]) << 8) | ((int)(volume[LS_D_OFFSET+i*2+1]));
		for (int j = 0; volume[META_OFFSET+fid*META_SIZE+j] != '\0'; j++)
			printf("%c", volume[META_OFFSET+fid*META_SIZE+j]);
		printf("\n");
	}
}
__device__ void sortS() {
	for (int i = 0; i < fileCt; i++) {
		volume[LS_S_OFFSET+i*2] 	= (i & 0x0000FF00) >> 8;
		volume[LS_S_OFFSET+i*2+1] 	= i & 0x000000FF;
	}
	for (int i = 0; i < fileCt; i++) {
		u32 swap = i;
		u32 currentFid = (((u32)(volume[LS_S_OFFSET+i*2])) << 8)
							| ((u32)(volume[LS_S_OFFSET+i*2+1]));
		u32 max = ((u32)volume[META_OFFSET+currentFid*META_SIZE+SIZE_OFFSET] << 8)
				| ((u32)volume[META_OFFSET+currentFid*META_SIZE+SIZE_OFFSET+1]);
		for (int j = i+1; j < fileCt; j++) {
			u32 tmpFid = (((u32)(volume[LS_S_OFFSET+j*2])) << 8)
						| ((u32)(volume[LS_S_OFFSET+j*2+1]));
			u32 tmp = ((u32)volume[META_OFFSET+tmpFid*META_SIZE+SIZE_OFFSET] << 8)
					| ((u32)volume[META_OFFSET+tmpFid*META_SIZE+SIZE_OFFSET+1]);
			if (tmp > max) {
				currentFid = tmpFid;
				max = tmp;
				swap = j;
			} else if (tmp == max) {
				u32 tct = ((u32)volume[META_OFFSET+tmpFid*META_SIZE+CREATET_OFFSET] << 24)
						| ((u32)volume[META_OFFSET+tmpFid*META_SIZE+CREATET_OFFSET+1] << 16)
						| ((u32)volume[META_OFFSET+tmpFid*META_SIZE+CREATET_OFFSET+2] << 8)
						| ((u32)volume[META_OFFSET+tmpFid*META_SIZE+CREATET_OFFSET+3]);
				u32 cct = ((u32)volume[META_OFFSET+currentFid*META_SIZE+CREATET_OFFSET] << 24)
						| ((u32)volume[META_OFFSET+currentFid*META_SIZE+CREATET_OFFSET+1] << 16)
						| ((u32)volume[META_OFFSET+currentFid*META_SIZE+CREATET_OFFSET+2] << 8)
						| ((u32)volume[META_OFFSET+currentFid*META_SIZE+CREATET_OFFSET+3]);
				if (cct > tct) {
					currentFid = tmpFid;
					max = tmp;
					swap = j;
				}
			}
		}
		volume[LS_S_OFFSET+swap*2]    = volume[LS_S_OFFSET+i*2];
		volume[LS_S_OFFSET+swap*2+1]  = volume[LS_S_OFFSET+i*2+1];
		volume[LS_S_OFFSET+i*2] 	  = (currentFid & 0x0000FF00) >> 8;
		volume[LS_S_OFFSET+i*2+1] 	  = currentFid & 0x000000FF;
	}
}
__device__ void printS() {
	printf("===sort by file size===\n");
	for (int i = 0; i < fileCt; i++) {
		int fid = ((int)(volume[LS_S_OFFSET+i*2]) << 8) | ((int)(volume[LS_S_OFFSET+i*2+1]));
		u32 tmp = (((u32)(volume[META_OFFSET+fid*META_SIZE+SIZE_OFFSET])) << 8)
				| ((u32)volume[META_OFFSET+fid*META_SIZE+SIZE_OFFSET+1]);
		for (int j = 0; volume[META_OFFSET+fid*META_SIZE+j] != '\0'; j++)
			printf("%c", volume[META_OFFSET+fid*META_SIZE+j]);
		printf(" %d\n", tmp);
	}
}
__device__ void deleteFileByName(const char *name) {
	int target = DNE;
	for (int i = 0; i < fileCt; i++) {
		if(isNameMatched(i, name)) {
			target = i;
			break;
		}
	}
	fileCt--;
	if (target != fileCt) {
		for (int i = 0; i < META_SIZE; i++) {
			volume[META_OFFSET+target*META_SIZE+i] = volume[META_OFFSET+fileCt*META_SIZE+i];
		}
		for (int i = 0; i < volume[META_OFFSET+fileCt*META_OFFSET+SIZE_OFFSET]; i++) {
			volume[DATA_OFFSET+target*DATA_SIZE+i] = volume[DATA_OFFSET+fileCt*DATA_SIZE+i];
		}
	}
}
// ******************************************************************

// ******************************************************************
// FS Operation
__device__ u32 open(const char *name, int type) {
	u32 fid = getFid(name);
    return fid;
}

__device__ void write(uchar *src, int len, u32 fid) {
	updateFileSize(fid, len);
	updateFileModifyTime(fid);
	u32 entry = getFileDataAddress(fid);
	for (u32 i = 0; i < len; i++) {
		updateData(entry+i,src[i]);
	}
}

__device__ void read(uchar *dst, int len, u32 fid) {
	u32 entry = getFileDataAddress(fid);
	for (u32 i = 0; i < len; i++) {
		dst[i] = getData(entry+i);
	}
}

__device__ void gsys(int type) {
	switch (type) {
		case LS_D:
			sortD();
			printD();
			break;
		case LS_S:
			sortS();
			printS();
			break;
		default:
			sortS();
			printS();
			break;
	}
}

__device__ void gsys(int type, const char *name) {
	switch (type) {
		case RM:
			deleteFileByName(name);
			break;
		default:
			deleteFileByName(name);
			break;
	}
}

// ******************************************************************

// ******************************************************************
// Kernel function
__global__ void mykernel(uchar *input, uchar *output) {
    //####kernel start####
    u32 fp = open("t.txt\0", G_WRITE);
    write(input, 64, fp);
    fp = open("b.txt\0", G_WRITE);
    write(input+32, 32, fp);
    fp = open("t.txt\0", G_WRITE);
    write(input+32, 32, fp);
    fp = open("t.txt\0", G_READ);
    read(output, 32, fp);
    gsys(LS_D);
    gsys(LS_S);
    fp = open("b.txt\0", G_WRITE);
    write(input+64, 12, fp);
    gsys(LS_S);
    gsys(LS_D);
    gsys(RM, "t.txt\0");
    gsys(LS_S);
    //####kernel end####
}
// ******************************************************************

int main() {
    hipMallocManaged(&volume, STORAGE_SIZE);
    init_volume();

    uchar *input, *output;
    hipMallocManaged(&input, MAX_FILE_SIZE);
    hipMallocManaged(&output, MAX_FILE_SIZE);
    for (int i = 0; i < MAX_FILE_SIZE; i++) {
        output[i] = 0;
    }
    loadBinaryFile(DATAFILE, input, MAX_FILE_SIZE);

    hipSetDevice(5);
    mykernel<<<1, 1>>>(input, output);
    hipDeviceSynchronize();
    writeBinaryFile(OUTPUTFILE, output, MAX_FILE_SIZE);
    hipDeviceReset();

    return 0;
}

	.text
	.file	"main.hip"
	.globl	_Z11init_volumev                # -- Begin function _Z11init_volumev
	.type	_Z11init_volumev,@function
_Z11init_volumev:                       # @_Z11init_volumev
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movq	volume(%rip), %rcx
	movq	(%rcx), %rcx
	movb	$0, (%rcx,%rax)
	incq	%rax
	cmpq	$1085440, %rax                  # imm = 0x109000
	jne	.LBB0_1
# %bb.2:
	retq
.Lfunc_end0:
	.size	_Z11init_volumev, .Lfunc_end0-_Z11init_volumev
	.cfi_endproc
                                        # -- End function
	.globl	_Z14loadBinaryFilePKcPhi        # -- Begin function _Z14loadBinaryFilePKcPhi
	.type	_Z14loadBinaryFilePKcPhi,@function
_Z14loadBinaryFilePKcPhi:               # @_Z14loadBinaryFilePKcPhi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rsi, %r14
	movl	$.L.str, %esi
	callq	fopen
	movq	%rax, %rbx
	movq	%rax, %rdi
	xorl	%esi, %esi
	movl	$2, %edx
	callq	fseek
	movq	%rbx, %rdi
	callq	ftell
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	rewind
	movslq	%r15d, %r12
	movl	$1, %esi
	movq	%r14, %rdi
	movq	%r12, %rdx
	movq	%rbx, %rcx
	callq	fread
	cmpl	%ebp, %r12d
	jle	.LBB1_2
# %bb.1:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB1_2:
	movq	%rbx, %rdi
	callq	fclose
	movl	%r15d, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z14loadBinaryFilePKcPhi, .Lfunc_end1-_Z14loadBinaryFilePKcPhi
	.cfi_endproc
                                        # -- End function
	.globl	_Z15writeBinaryFilePKcPhi       # -- Begin function _Z15writeBinaryFilePKcPhi
	.type	_Z15writeBinaryFilePKcPhi,@function
_Z15writeBinaryFilePKcPhi:              # @_Z15writeBinaryFilePKcPhi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%edx, %ebx
	movq	%rsi, %r14
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %r15
	movslq	%ebx, %rdx
	movl	$1, %esi
	movq	%r14, %rdi
	movq	%rax, %rcx
	callq	fwrite
	movq	%r15, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.Lfunc_end2:
	.size	_Z15writeBinaryFilePKcPhi, .Lfunc_end2-_Z15writeBinaryFilePKcPhi
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__mykernelPhS_ # -- Begin function _Z23__device_stub__mykernelPhS_
	.type	_Z23__device_stub__mykernelPhS_,@function
_Z23__device_stub__mykernelPhS_:        # @_Z23__device_stub__mykernelPhS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8mykernelPhS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z23__device_stub__mykernelPhS_, .Lfunc_end3-_Z23__device_stub__mykernelPhS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	volume(%rip), %rdi
	movl	$1085440, %esi                  # imm = 0x109000
	movl	$1, %edx
	callq	hipMallocManaged
	xorl	%eax, %eax
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	movq	volume(%rip), %rcx
	movq	(%rcx), %rcx
	movb	$0, (%rcx,%rax)
	incq	%rax
	cmpq	$1085440, %rax                  # imm = 0x109000
	jne	.LBB4_1
# %bb.2:                                # %_Z11init_volumev.exit
	leaq	16(%rsp), %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	movl	$1, %edx
	callq	hipMallocManaged
	xorl	%eax, %eax
.LBB4_3:                                # =>This Inner Loop Header: Depth=1
	movq	8(%rsp), %rcx
	movb	$0, (%rcx,%rax)
	incq	%rax
	cmpq	$1048576, %rax                  # imm = 0x100000
	jne	.LBB4_3
# %bb.4:
	movq	16(%rsp), %rsi
	movl	$.L.str.3, %edi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	_Z14loadBinaryFilePKcPhi
	movl	$5, %edi
	callq	hipSetDevice
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_6
# %bb.5:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z23__device_stub__mykernelPhS_
.LBB4_6:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movl	$.L.str.4, %edi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	_Z15writeBinaryFilePKcPhi
	callq	hipDeviceReset
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8mykernelPhS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$currentTime, %esi
	movl	$currentTime.managed, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$4, %r8d
	movq	%rbx, %rdi
	movl	$4, %r9d
	callq	__hipRegisterManagedVar
	movl	$fileCt, %esi
	movl	$fileCt.managed, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$4, %r8d
	movq	%rbx, %rdi
	movl	$4, %r9d
	callq	__hipRegisterManagedVar
	movl	$volume, %esi
	movl	$volume.managed, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$8, %r8d
	movq	%rbx, %rdi
	movl	$8, %r9d
	callq	__hipRegisterManagedVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	currentTime.managed,@object     # @currentTime.managed
	.local	currentTime.managed
	.comm	currentTime.managed,4,4
	.type	fileCt.managed,@object          # @fileCt.managed
	.local	fileCt.managed
	.comm	fileCt.managed,4,4
	.type	volume.managed,@object          # @volume.managed
	.local	volume.managed
	.comm	volume.managed,8,8
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"rb"
	.size	.L.str, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"wb"
	.size	.L.str.2, 3

	.type	_Z8mykernelPhS_,@object         # @_Z8mykernelPhS_
	.section	.rodata,"a",@progbits
	.globl	_Z8mykernelPhS_
	.p2align	3, 0x0
_Z8mykernelPhS_:
	.quad	_Z23__device_stub__mykernelPhS_
	.size	_Z8mykernelPhS_, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"./data.bin"
	.size	.L.str.3, 11

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"./snapshot.bin"
	.size	.L.str.4, 15

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8mykernelPhS_"
	.size	.L__unnamed_1, 16

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"currentTime"
	.size	.L__unnamed_2, 12

	.type	currentTime,@object             # @currentTime
	.local	currentTime
	.comm	currentTime,8,8
	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"fileCt"
	.size	.L__unnamed_3, 7

	.type	fileCt,@object                  # @fileCt
	.local	fileCt
	.comm	fileCt,8,8
	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"volume"
	.size	.L__unnamed_4, 7

	.type	volume,@object                  # @volume
	.local	volume
	.comm	volume,8,8
	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"ERROR: Input size is too small to store input data!"
	.size	.Lstr, 52

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__mykernelPhS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym currentTime.managed
	.addrsig_sym fileCt.managed
	.addrsig_sym volume.managed
	.addrsig_sym _Z8mykernelPhS_
	.addrsig_sym currentTime
	.addrsig_sym fileCt
	.addrsig_sym volume
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.p2align	2                               ; -- Begin function _Z4openPKci
	.type	_Z4openPKci,@function
_Z4openPKci:                            ; @_Z4openPKci
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_mov_b32_e32 v2, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, fileCt@rel32@lo+4
	s_addc_u32 s1, s1, fileCt@rel32@hi+12
	s_mov_b32 s4, 0
	global_load_b64 v[3:4], v2, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b32 v9, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v9
	s_cbranch_vccnz .LBB0_12
; %bb.1:                                ; %.preheader.lr.ph.i
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, volume@rel32@lo+4
	s_addc_u32 s1, s1, volume@rel32@hi+12
	s_movk_i32 s5, 0x1400
	global_load_b64 v[5:6], v2, s[0:1]
	s_mov_b32 s6, 0
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[5:6], off
.LBB0_2:                                ; %.preheader.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;     Child Loop BB0_6 Depth 2
	s_mov_b64 s[0:1], 0
	s_mov_b32 s2, 0
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v7, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v1, vcc_lo
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	flat_load_u8 v2, v[7:8]
	v_dual_mov_b32 v8, s1 :: v_dual_mov_b32 v7, s0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v2
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_3
; %bb.4:                                ; %_Z7dstrlenPKc.exit.preheader.i.i
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v2, -1, v7
	s_mov_b32 s0, -1
	s_mov_b32 s7, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v2
	s_cbranch_execz .LBB0_8
; %bb.5:                                ; %.lr.ph.i.i.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_ashr_i32 s0, s5, 31
	v_add_co_u32 v7, vcc_lo, v5, s5
	v_add_co_ci_u32_e32 v8, vcc_lo, s0, v6, vcc_lo
	s_mov_b64 s[2:3], 0
	s_mov_b32 s8, 0
                                        ; implicit-def: $sgpr9
.LBB0_6:                                ; %.lr.ph.i.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v7, s2
	v_add_co_ci_u32_e32 v11, vcc_lo, s3, v8, vcc_lo
	v_add_co_u32 v12, vcc_lo, v0, s2
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v1, vcc_lo
	s_add_u32 s2, s2, 1
	flat_load_u8 v10, v[10:11]
	flat_load_i8 v11, v[12:13]
	v_cmp_ge_u32_e32 vcc_lo, s2, v2
	s_addc_u32 s3, s3, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e64 s0, v10, v11
	v_cmp_eq_u32_e64 s1, v10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, vcc_lo
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s8, s0, s8
	s_and_not1_b32 s0, s9, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s9, s0, s1
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_6
; %bb.7:                                ; %Flow22
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s0, s9, exec_lo
.LBB0_8:                                ; %Flow23
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_mul_i32 s1, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add3_u32 v2, 0x1400, s1, v2
	s_xor_b32 s1, s0, -1
	s_mov_b32 s0, -1
	v_ashrrev_i32_e32 v8, 31, v2
	v_add_co_u32 v7, vcc_lo, v5, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, v6, v8, vcc_lo
	flat_load_u8 v2, v[7:8]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 0, v2
	v_mov_b32_e32 v2, s6
	s_or_b32 s2, s1, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s2
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s6, s6, 1
	v_mov_b32_e32 v2, -1
	v_cmp_eq_u32_e32 vcc_lo, s6, v9
	s_add_i32 s5, s5, 31
	s_or_not1_b32 s0, vcc_lo, exec_lo
; %bb.10:                               ; %Flow24
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s0
	s_or_b32 s4, s0, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_2
; %bb.11:                               ; %Flow25
	s_or_b32 exec_lo, exec_lo, s4
	s_branch .LBB0_13
.LBB0_12:
	v_mov_b32_e32 v2, -1
.LBB0_13:                               ; %_Z13isNameMatchediPKc.exit._crit_edge.i
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 -1, v2
	s_cbranch_execz .LBB0_19
; %bb.14:
	v_add_nc_u32_e32 v2, 1, v9
	s_mov_b32 s5, 0
	s_mov_b32 s1, exec_lo
	v_mov_b32_e32 v6, 0
	global_store_b32 v[3:4], v2, off
	flat_load_u8 v4, v[0:1]
	v_mul_lo_u32 v2, v9, 31
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0x1400, v2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u16_e32 0, v4
	s_cbranch_execz .LBB0_18
; %bb.15:                               ; %.lr.ph.i9.i.preheader
	v_add_co_u32 v0, vcc_lo, v0, 1
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_mov_b32_e32 v5, 0
	s_mov_b64 s[2:3], 0
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, volume@rel32@lo+4
	s_addc_u32 s7, s7, volume@rel32@hi+12
.LBB0_16:                               ; %.lr.ph.i9.i
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[6:7], v5, s[6:7]
	v_add_nc_u32_e32 v8, s2, v3
	v_add_co_u32 v10, vcc_lo, v0, s2
	v_add_co_ci_u32_e32 v11, vcc_lo, s3, v1, vcc_lo
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	s_waitcnt vmcnt(0)
	global_load_b64 v[6:7], v[6:7], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, s0, v6, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, 0, v7, s0
	flat_store_b8 v[6:7], v4
	flat_load_u8 v4, v[10:11]
	v_mov_b32_e32 v6, s2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v4
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_16
; %bb.17:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_18:                               ; %Flow20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, volume@rel32@lo+4
	s_addc_u32 s1, s1, volume@rel32@hi+12
	v_add_nc_u32_e32 v3, v6, v3
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, currentTime@rel32@lo+4
	s_addc_u32 s3, s3, currentTime@rel32@hi+12
	global_load_b64 v[0:1], v5, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v0, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_nc_u32_e32 v3, 0x1415, v2
	flat_store_b8 v[0:1], v5
	global_load_b64 v[0:1], v5, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v0, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_nc_u32_e32 v3, 0x1416, v2
	flat_store_b8 v[0:1], v5
	global_load_b64 v[0:1], v5, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v0, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_store_b8 v[0:1], v5
	s_clause 0x1
	global_load_b64 v[0:1], v5, s[2:3]
	global_load_b64 v[3:4], v5, s[0:1]
	s_waitcnt vmcnt(1)
	global_load_b32 v6, v[0:1], off
	s_waitcnt vmcnt(1)
	global_load_b64 v[0:1], v[3:4], off
	v_add_nc_u32_e32 v3, 0x1417, v2
	s_waitcnt vmcnt(1)
	v_lshrrev_b32_e32 v4, 24, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_store_b8 v[0:1], v4
	s_clause 0x1
	global_load_b64 v[0:1], v5, s[0:1]
	global_load_b64 v[3:4], v5, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(1)
	global_load_b32 v3, v[3:4], off
	v_add_nc_u32_e32 v4, 0x1418, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v0, vcc_lo, v0, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_d16_hi_b8 v[0:1], v3
	s_clause 0x1
	global_load_b64 v[0:1], v5, s[2:3]
	global_load_b64 v[3:4], v5, s[0:1]
	s_waitcnt vmcnt(1)
	global_load_b32 v6, v[0:1], off
	s_waitcnt vmcnt(1)
	global_load_b64 v[0:1], v[3:4], off
	v_add_nc_u32_e32 v3, 0x1419, v2
	s_waitcnt vmcnt(1)
	v_lshrrev_b32_e32 v4, 8, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_store_b8 v[0:1], v4
	s_clause 0x1
	global_load_b64 v[0:1], v5, s[0:1]
	global_load_b64 v[3:4], v5, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(1)
	global_load_b32 v3, v[3:4], off
	v_add_nc_u32_e32 v4, 0x141a, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v0, vcc_lo, v0, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_b8 v[0:1], v3
	s_clause 0x1
	global_load_b64 v[0:1], v5, s[2:3]
	global_load_b64 v[3:4], v5, s[0:1]
	s_waitcnt vmcnt(1)
	global_load_b32 v6, v[0:1], off
	s_waitcnt vmcnt(1)
	global_load_b64 v[0:1], v[3:4], off
	v_add_nc_u32_e32 v3, 0x141b, v2
	s_waitcnt vmcnt(1)
	v_lshrrev_b32_e32 v4, 24, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_store_b8 v[0:1], v4
	s_clause 0x1
	global_load_b64 v[0:1], v5, s[0:1]
	global_load_b64 v[3:4], v5, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(1)
	global_load_b32 v3, v[3:4], off
	v_add_nc_u32_e32 v4, 0x141c, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v0, vcc_lo, v0, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_d16_hi_b8 v[0:1], v3
	s_clause 0x1
	global_load_b64 v[0:1], v5, s[2:3]
	global_load_b64 v[3:4], v5, s[0:1]
	s_waitcnt vmcnt(1)
	global_load_b32 v6, v[0:1], off
	s_waitcnt vmcnt(1)
	global_load_b64 v[0:1], v[3:4], off
	v_add_nc_u32_e32 v3, 0x141d, v2
	v_add_nc_u32_e32 v2, 0x141e, v2
	s_waitcnt vmcnt(1)
	v_lshrrev_b32_e32 v4, 8, v6
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v0, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_store_b8 v[0:1], v4
	s_clause 0x1
	global_load_b64 v[0:1], v5, s[0:1]
	global_load_b64 v[3:4], v5, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(1)
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v0, vcc_lo, v0, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_b8 v[0:1], v3
	global_load_b64 v[0:1], v5, s[2:3]
	s_waitcnt vmcnt(0)
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v2, v9 :: v_dual_add_nc_u32 v3, 1, v2
	global_store_b32 v[0:1], v3, off
.LBB0_19:                               ; %Flow21
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v0, v2
	s_waitcnt lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end0:
	.size	_Z4openPKci, .Lfunc_end0-_Z4openPKci
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 1680
; NumSgprs: 34
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function __ockl_printf_append_string_n
	.type	__ockl_printf_append_string_n,@function
__ockl_printf_append_string_n:          ; @__ockl_printf_append_string_n
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v7, v2
	v_or_b32_e32 v2, 2, v0
	v_cmp_eq_u32_e64 s0, 0, v6
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v10, v2, v0, s0
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u64_e32 0, v[7:8]
	s_xor_b32 s10, exec_lo, s0
	s_cbranch_execz .LBB1_87
; %bb.1:
	s_load_b64 s[2:3], s[8:9], 0x50
	v_dual_mov_b32 v11, 2 :: v_dual_and_b32 v6, 2, v10
	v_mov_b32_e32 v30, 0
	v_and_b32_e32 v0, -3, v10
	v_mbcnt_lo_u32_b32 v33, -1, 0
	v_mov_b32_e32 v12, 1
	s_mov_b32 s12, 0
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_5 Depth 2
                                        ;     Child Loop BB1_13 Depth 2
                                        ;     Child Loop BB1_21 Depth 2
                                        ;     Child Loop BB1_29 Depth 2
                                        ;     Child Loop BB1_37 Depth 2
                                        ;     Child Loop BB1_45 Depth 2
                                        ;     Child Loop BB1_53 Depth 2
                                        ;     Child Loop BB1_61 Depth 2
                                        ;     Child Loop BB1_69 Depth 2
                                        ;     Child Loop BB1_75 Depth 2
                                        ;     Child Loop BB1_84 Depth 2
	v_cmp_gt_u64_e32 vcc_lo, 56, v[4:5]
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $sgpr4
	s_mov_b32 s0, exec_lo
	v_dual_cndmask_b32 v32, 0, v5 :: v_dual_cndmask_b32 v31, 56, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 8, v31
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB1_8
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_ne_u32_e32 0, v31
	s_cbranch_execz .LBB1_7
; %bb.4:                                ; %.preheader31.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[9:10], 3, v[31:32]
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v14, v8
	v_mov_b32_e32 v13, v7
	s_mov_b64 s[4:5], 0
	s_mov_b32 s7, 0
.LBB1_5:                                ; %.preheader31
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v10, v[13:14]
	v_mov_b32_e32 v16, s11
	v_add_co_u32 v13, vcc_lo, v13, 1
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v15, 0xffff, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[15:16], s4, v[15:16]
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e64 s0, s4, v9
	v_or_b32_e32 v3, v16, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v2, v15, v2
	s_or_b32 s7, s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_5
; %bb.6:                                ; %Flow232
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
.LBB1_7:                                ; %Flow234
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_mov_b32 s4, 0
.LBB1_8:                                ; %Flow236
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_saveexec_b32 s0, s1
	v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v10, v8
	v_mov_b32_e32 v9, v7
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_10
; %bb.9:                                ;   in Loop: Header=BB1_2 Depth=1
	s_waitcnt vmcnt(0)
	s_clause 0x5
	flat_load_u8 v2, v[7:8]
	flat_load_u8 v3, v[7:8] offset:1
	flat_load_u8 v9, v[7:8] offset:2
	flat_load_u8 v10, v[7:8] offset:3
	flat_load_u8 v13, v[7:8] offset:5
	flat_load_u8 v14, v[7:8] offset:4
	v_mov_b32_e32 v16, v30
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_and_b32_e32 v2, 0xffff, v2
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v3, 8, v3
	s_clause 0x1
	flat_load_u8 v15, v[7:8] offset:7
	flat_load_d16_hi_u8 v16, v[7:8] offset:6
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v9, 16, v9
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v10, 24, v10
	v_or_b32_e32 v2, v3, v2
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v3, 8, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_or3_b32 v2, v2, v9, v10
	s_waitcnt vmcnt(2)
	v_or3_b32 v3, 0, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v2, v2, 0, 0
	v_or3_b32 v2, v2, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v9, 24, v15
	v_add_nc_u32_e32 v15, -8, v31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_or3_b32 v3, v3, v16, v9
	v_add_co_u32 v9, vcc_lo, v7, 8
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v8, vcc_lo
.LBB1_10:                               ; %.loopexit32
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr13_vgpr14
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v15
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB1_16
; %bb.11:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v14, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v15
	s_cbranch_execz .LBB1_15
; %bb.12:                               ; %.preheader29.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v14, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB1_13:                               ; %.preheader29
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v16, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v15
	flat_load_u8 v16, v[16:17]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v17, s11 :: v_dual_and_b32 v16, 0xffff, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], s0, v[16:17]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v14, v17, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v13, v16, v13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_13
; %bb.14:                               ; %Flow227
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB1_15:                               ; %Flow229
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr15
.LBB1_16:                               ; %Flow231
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v17, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_18
; %bb.17:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x5
	flat_load_u8 v13, v[9:10]
	flat_load_u8 v14, v[9:10] offset:1
	flat_load_u8 v16, v[9:10] offset:2
	flat_load_u8 v17, v[9:10] offset:3
	flat_load_u8 v18, v[9:10] offset:5
	flat_load_u8 v19, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v20, v30 :: v_dual_and_b32 v13, 0xffff, v13
	s_clause 0x1
	flat_load_u8 v21, v[9:10] offset:7
	flat_load_d16_hi_u8 v20, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v14, 8, v14
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v16, 16, v16
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v17, 24, v17
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v13, v14, v13
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v14, 8, v18
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v13, v13, v16, v17
	s_waitcnt vmcnt(2)
	v_or3_b32 v14, 0, v19, v14
	v_add_nc_u32_e32 v17, -8, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v13, v13, 0, 0
	v_or3_b32 v13, v13, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v16, 24, v21
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v14, v14, v20, v16
.LBB1_18:                               ; %.loopexit30
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v17
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB1_24
; %bb.19:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v17
	s_cbranch_execz .LBB1_23
; %bb.20:                               ; %.preheader27.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB1_21:                               ; %.preheader27
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v18, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v17
	flat_load_u8 v18, v[18:19]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v19, s11 :: v_dual_and_b32 v18, 0xffff, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[18:19], s0, v[18:19]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v16, v19, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v15, v18, v15
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_21
; %bb.22:                               ; %Flow222
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB1_23:                               ; %Flow224
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr17
.LBB1_24:                               ; %Flow226
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v19, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_26
; %bb.25:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x5
	flat_load_u8 v15, v[9:10]
	flat_load_u8 v16, v[9:10] offset:1
	flat_load_u8 v18, v[9:10] offset:2
	flat_load_u8 v19, v[9:10] offset:3
	flat_load_u8 v20, v[9:10] offset:5
	flat_load_u8 v21, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v22, v30 :: v_dual_and_b32 v15, 0xffff, v15
	s_clause 0x1
	flat_load_u8 v23, v[9:10] offset:7
	flat_load_d16_hi_u8 v22, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v16, 8, v16
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v18, 16, v18
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v19, 24, v19
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v15, v16, v15
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v16, 8, v20
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v15, v15, v18, v19
	s_waitcnt vmcnt(2)
	v_or3_b32 v16, 0, v21, v16
	v_add_nc_u32_e32 v19, -8, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v15, v15, 0, 0
	v_or3_b32 v15, v15, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v18, 24, v23
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v16, v16, v22, v18
.LBB1_26:                               ; %.loopexit28
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr17_vgpr18
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v19
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB1_32
; %bb.27:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v18, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v19
	s_cbranch_execz .LBB1_31
; %bb.28:                               ; %.preheader25.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v18, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB1_29:                               ; %.preheader25
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v20, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v19
	flat_load_u8 v20, v[20:21]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v21, s11 :: v_dual_and_b32 v20, 0xffff, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], s0, v[20:21]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v18, v21, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v17, v20, v17
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_29
; %bb.30:                               ; %Flow217
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB1_31:                               ; %Flow219
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr19
.LBB1_32:                               ; %Flow221
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v21, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_34
; %bb.33:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x5
	flat_load_u8 v17, v[9:10]
	flat_load_u8 v18, v[9:10] offset:1
	flat_load_u8 v20, v[9:10] offset:2
	flat_load_u8 v21, v[9:10] offset:3
	flat_load_u8 v22, v[9:10] offset:5
	flat_load_u8 v23, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v24, v30 :: v_dual_and_b32 v17, 0xffff, v17
	s_clause 0x1
	flat_load_u8 v25, v[9:10] offset:7
	flat_load_d16_hi_u8 v24, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v18, 8, v18
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v20, 16, v20
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v21, 24, v21
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v17, v18, v17
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v18, 8, v22
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v17, v17, v20, v21
	s_waitcnt vmcnt(2)
	v_or3_b32 v18, 0, v23, v18
	v_add_nc_u32_e32 v21, -8, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v17, v17, 0, 0
	v_or3_b32 v17, v17, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v20, 24, v25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v18, v18, v24, v20
.LBB1_34:                               ; %.loopexit26
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v21
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB1_40
; %bb.35:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v19, 0
	v_mov_b32_e32 v20, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v21
	s_cbranch_execz .LBB1_39
; %bb.36:                               ; %.preheader23.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v19, 0
	v_mov_b32_e32 v20, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB1_37:                               ; %.preheader23
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v22, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v23, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v21
	flat_load_u8 v22, v[22:23]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v23, s11 :: v_dual_and_b32 v22, 0xffff, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], s0, v[22:23]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v20, v23, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v19, v22, v19
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_37
; %bb.38:                               ; %Flow212
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB1_39:                               ; %Flow214
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr21
.LBB1_40:                               ; %Flow216
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v23, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_42
; %bb.41:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x5
	flat_load_u8 v19, v[9:10]
	flat_load_u8 v20, v[9:10] offset:1
	flat_load_u8 v22, v[9:10] offset:2
	flat_load_u8 v23, v[9:10] offset:3
	flat_load_u8 v24, v[9:10] offset:5
	flat_load_u8 v25, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v26, v30 :: v_dual_and_b32 v19, 0xffff, v19
	s_clause 0x1
	flat_load_u8 v27, v[9:10] offset:7
	flat_load_d16_hi_u8 v26, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v20, 8, v20
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v22, 16, v22
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v23, 24, v23
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v19, v20, v19
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v20, 8, v24
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v19, v19, v22, v23
	s_waitcnt vmcnt(2)
	v_or3_b32 v20, 0, v25, v20
	v_add_nc_u32_e32 v23, -8, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v19, v19, 0, 0
	v_or3_b32 v19, v19, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v22, 24, v27
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v20, v20, v26, v22
.LBB1_42:                               ; %.loopexit24
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr21_vgpr22
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v23
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB1_48
; %bb.43:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v23
	s_cbranch_execz .LBB1_47
; %bb.44:                               ; %.preheader21.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB1_45:                               ; %.preheader21
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v24, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v25, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v23
	flat_load_u8 v24, v[24:25]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v25, s11 :: v_dual_and_b32 v24, 0xffff, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[24:25], s0, v[24:25]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v22, v25, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v21, v24, v21
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_45
; %bb.46:                               ; %Flow207
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB1_47:                               ; %Flow209
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr23
.LBB1_48:                               ; %Flow211
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v25, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_50
; %bb.49:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x5
	flat_load_u8 v21, v[9:10]
	flat_load_u8 v22, v[9:10] offset:1
	flat_load_u8 v24, v[9:10] offset:2
	flat_load_u8 v25, v[9:10] offset:3
	flat_load_u8 v26, v[9:10] offset:5
	flat_load_u8 v27, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v28, v30 :: v_dual_and_b32 v21, 0xffff, v21
	s_clause 0x1
	flat_load_u8 v29, v[9:10] offset:7
	flat_load_d16_hi_u8 v28, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v22, 8, v22
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v24, 16, v24
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v25, 24, v25
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v21, v22, v21
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v22, 8, v26
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v21, v21, v24, v25
	s_waitcnt vmcnt(2)
	v_or3_b32 v22, 0, v27, v22
	v_add_nc_u32_e32 v25, -8, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v21, v21, 0, 0
	v_or3_b32 v21, v21, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v24, 24, v29
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v22, v22, v28, v24
.LBB1_50:                               ; %.loopexit22
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v25
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB1_56
; %bb.51:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_mov_b32 s5, exec_lo
	v_cmpx_ne_u32_e32 0, v25
	s_cbranch_execz .LBB1_55
; %bb.52:                               ; %.preheader.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s6, 0
.LBB1_53:                               ; %.preheader
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v26, v[9:10]
	v_mov_b32_e32 v27, s11
	v_add_nc_u32_e32 v25, -1, v25
	v_add_co_u32 v9, vcc_lo, v9, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v26, 0xffff, v26
	v_lshlrev_b64 v[26:27], s0, v[26:27]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v24, v27, v24
	v_or_b32_e32 v23, v26, v23
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB1_53
; %bb.54:                               ; %Flow202
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_55:                               ; %Flow204
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr9_vgpr10
.LBB1_56:                               ; %Flow206
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB1_58
; %bb.57:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x5
	flat_load_u8 v23, v[9:10]
	flat_load_u8 v24, v[9:10] offset:1
	flat_load_u8 v25, v[9:10] offset:2
	flat_load_u8 v26, v[9:10] offset:3
	flat_load_u8 v27, v[9:10] offset:5
	flat_load_u8 v28, v[9:10] offset:4
	v_mov_b32_e32 v29, v30
	s_clause 0x1
	flat_load_u8 v34, v[9:10] offset:7
	flat_load_d16_hi_u8 v29, v[9:10] offset:6
	s_waitcnt vmcnt(7) lgkmcnt(0)
	v_and_b32_e32 v9, 0xffff, v23
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v10, 8, v24
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v23, 16, v25
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v24, 8, v27
	v_or_b32_e32 v9, v10, v9
	v_lshlrev_b32_e32 v10, 24, v26
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v9, v9, v23, v10
	s_waitcnt vmcnt(2)
	v_or3_b32 v10, 0, v28, v24
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v23, 24, v34
	v_or3_b32 v9, v9, 0, 0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or3_b32 v24, v10, v29, v23
	v_or3_b32 v23, v9, 0, 0
.LBB1_58:                               ; %.loopexit
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v29, v33
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v29
	v_cmp_eq_u32_e64 s0, s0, v29
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_64
; %bb.59:                               ;   in Loop: Header=BB1_2 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[27:28], v30, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[9:10], v30, s[2:3] offset:40
	global_load_b64 v[25:26], v30, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v10, v10, v28
	v_and_b32_e32 v9, v9, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v10, 24
	v_mul_hi_u32 v34, v9, 24
	v_mul_lo_u32 v9, v9, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v34, v10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v25, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, v26, v10, vcc_lo
	global_load_b64 v[25:26], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v30, v[25:28], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[9:10], v[27:28]
	s_cbranch_execz .LBB1_63
; %bb.60:                               ; %.preheader3.i.i19.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s5, 0
.LBB1_61:                               ; %.preheader3.i.i19
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[25:26], v30, s[2:3] offset:40
	global_load_b64 v[34:35], v30, s[2:3]
	v_dual_mov_b32 v28, v10 :: v_dual_mov_b32 v27, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v25, v25, v27
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, v25, 24, v[34:35]
	v_and_b32_e32 v34, v26, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[25:26], null, v34, 24, v[10:11]
	v_mov_b32_e32 v10, v25
	global_load_b64 v[25:26], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v30, v[25:28], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[27:28]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_61
; %bb.62:                               ; %Flow199
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_63:                               ; %Flow201
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB1_64:                               ; %.loopexit4.i.i14
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[34:35], v30, s[2:3] offset:40
	global_load_b128 v[25:28], v30, s[2:3]
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_mov_b32 s15, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v34
	v_readfirstlane_b32 s7, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s13, s6, 24
	s_mul_i32 s14, s6, 24
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB1_66
; %bb.65:                               ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s17, s13, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v34, vcc_lo, v25, s14
	v_add_co_ci_u32_e32 v35, vcc_lo, s17, v26, vcc_lo
	v_dual_mov_b32 v9, s15 :: v_dual_mov_b32 v10, v30
	global_store_b128 v[34:35], v[9:12], off offset:8
.LBB1_66:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_cmp_lt_u64_e32 vcc_lo, 56, v[4:5]
	v_or_b32_e32 v9, 0, v1
	v_or_b32_e32 v10, v0, v6
	v_lshl_add_u32 v34, v31, 2, 28
	s_lshl_b64 s[6:7], s[6:7], 12
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v1, v9, v1 :: v_dual_cndmask_b32 v0, v10, v0
	v_lshlrev_b64 v[9:10], 6, v[29:30]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v27, vcc_lo, v27, s6
	v_and_b32_e32 v34, 0x1e0, v34
	v_add_co_ci_u32_e32 v28, vcc_lo, s7, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, v27, v9
	v_and_or_b32 v0, 0xffffff1f, v0, v34
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, v28, v10, vcc_lo
	s_clause 0x3
	global_store_b128 v[9:10], v[0:3], off
	global_store_b128 v[9:10], v[13:16], off offset:16
	global_store_b128 v[9:10], v[17:20], off offset:32
	global_store_b128 v[9:10], v[21:24], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_74
; %bb.67:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x1
	global_load_b64 v[17:18], v30, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v30, s[2:3] offset:40
	v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v16, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v0
	v_readfirstlane_b32 s17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[16:17], s[16:17], s[4:5]
	s_mul_i32 s7, s17, 24
	s_mul_hi_u32 s15, s16, 24
	s_mul_i32 s16, s16, 24
	s_add_i32 s15, s15, s7
	v_add_co_u32 v13, vcc_lo, v25, s16
	v_add_co_ci_u32_e32 v14, vcc_lo, s15, v26, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[13:14], v[17:18], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v30, v[15:18], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[17:18]
	s_cbranch_execz .LBB1_70
; %bb.68:                               ; %.preheader1.i.i17.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s15, 0
.LBB1_69:                               ; %.preheader1.i.i17
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[13:14], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v30, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s15, vcc_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB1_69
.LBB1_70:                               ; %Flow197
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[0:1], v30, s[2:3] offset:16
	s_mov_b32 s15, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s15, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB1_72
; %bb.71:                               ;   in Loop: Header=BB1_2 Depth=1
	s_bcnt1_i32_b32 s15, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v29, s15
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[29:30], off offset:8
.LBB1_72:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB1_74
; %bb.73:                               ;   in Loop: Header=BB1_2 Depth=1
	global_load_b32 v29, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v29
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[29:30], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_74:                               ; %Flow198
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s13, s13, s1
	v_add_co_u32 v0, vcc_lo, v25, s14
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v26, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_75:                               ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_77
; %bb.76:                               ;   in Loop: Header=BB1_75 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_77:                               ;   in Loop: Header=BB1_75 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_79
; %bb.78:                               ;   in Loop: Header=BB1_75 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_80
.LBB1_79:                               ;   in Loop: Header=BB1_75 Depth=2
	s_mov_b32 s1, -1
.LBB1_80:                               ; %Flow192
                                        ;   in Loop: Header=BB1_75 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_75
; %bb.81:                               ;   in Loop: Header=BB1_2 Depth=1
	global_load_b128 v[0:3], v[9:10], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_85
; %bb.82:                               ;   in Loop: Header=BB1_2 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v30, s[2:3] offset:40
	global_load_b64 v[9:10], v30, s[2:3] offset:24 glc
	global_load_b64 v[15:16], v30, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v17, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, v17, s4
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[13:14]
	v_dual_cndmask_b32 v14, v14, v18 :: v_dual_cndmask_b32 v13, v13, v17
	v_and_b32_e32 v3, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v13, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v17, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v17, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v15, v2
	v_mov_b32_e32 v15, v9
	v_add_co_ci_u32_e32 v3, vcc_lo, v16, v3, vcc_lo
	v_mov_b32_e32 v16, v10
	global_store_b64 v[2:3], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v30, v[13:16], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[15:16], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_85
; %bb.83:                               ; %.preheader.i.i16.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s0, 0
.LBB1_84:                               ; %.preheader.i.i16
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[2:3], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v30, v[13:16], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[15:16]
	v_dual_mov_b32 v16, v10 :: v_dual_mov_b32 v15, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_84
.LBB1_85:                               ; %__ockl_hostcall_preview.exit20
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_sub_co_u32 v4, vcc_lo, v4, v31
	v_sub_co_ci_u32_e32 v5, vcc_lo, v5, v32, vcc_lo
	v_add_co_u32 v7, s0, v7, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s0, v8, v32, s0
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_or_b32 s12, vcc_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB1_2
; %bb.86:                               ; %Flow237
	s_or_b32 exec_lo, exec_lo, s12
                                        ; implicit-def: $vgpr10
.LBB1_87:                               ; %Flow253
	s_and_not1_saveexec_b32 s1, s10
	s_cbranch_execz .LBB1_116
; %bb.88:
	s_load_b64 s[2:3], s[8:9], 0x50
	s_waitcnt vmcnt(0)
	v_mbcnt_lo_u32_b32 v2, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_94
; %bb.89:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[5:6], v0, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[7:8], v0, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v3, 24
	v_mul_lo_u32 v4, v4, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v9, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v7, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[5:6]
	s_cbranch_execz .LBB1_93
; %bb.90:                               ; %.preheader3.i.i.preheader
	s_mov_b32 s6, 0
.LBB1_91:                               ; %.preheader3.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[11:12], v0, s[2:3]
	v_dual_mov_b32 v5, v8 :: v_dual_mov_b32 v6, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v3, 24, v[11:12]
	v_mov_b32_e32 v3, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[3:4]
	global_load_b64 v[3:4], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[5:6]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB1_91
; %bb.92:                               ; %Flow249
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_93:                               ; %Flow251
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_94:                               ; %.loopexit4.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s11, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[11:12], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s8, s7, 24
	s_mul_hi_u32 s9, s6, 24
	s_mul_i32 s10, s6, 24
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB1_96
; %bb.95:
	s_add_i32 s13, s9, s8
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v5, vcc_lo
	v_dual_mov_b32 v11, s11 :: v_dual_mov_b32 v12, v3
	v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1
	global_store_b128 v[8:9], v[11:14], off offset:8
.LBB1_96:
	s_or_b32 exec_lo, exec_lo, s12
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_and_or_b32 v0, 0xffffff1f, v10, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v11, s15
	v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_104
; %bb.97:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v8, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v5, v1, vcc_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB1_100
; %bb.98:                               ; %.preheader1.i.i.preheader
	s_mov_b32 s11, 0
.LBB1_99:                               ; %.preheader1.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB1_99
.LBB1_100:                              ; %Flow247
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s11, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s11, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB1_102
; %bb.101:
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s11
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB1_102:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB1_104
; %bb.103:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_104:                              ; %Flow248
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s9, s9, s8
	v_add_co_u32 v0, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_105:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_107
; %bb.106:                              ;   in Loop: Header=BB1_105 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_107:                              ;   in Loop: Header=BB1_105 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB1_109
; %bb.108:                              ;   in Loop: Header=BB1_105 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB1_110
.LBB1_109:                              ;   in Loop: Header=BB1_105 Depth=1
	s_mov_b32 s6, -1
.LBB1_110:                              ; %Flow242
                                        ;   in Loop: Header=BB1_105 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_105
; %bb.111:
	global_load_b128 v[0:3], v[6:7], off
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_115
; %bb.112:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_115
; %bb.113:                              ; %.preheader.i.i.preheader
	s_mov_b32 s0, 0
.LBB1_114:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_114
.LBB1_115:                              ; %__ockl_hostcall_preview.exit
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_116:                              ; %Flow254
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end1:
	.size	__ockl_printf_append_string_n, .Lfunc_end1-__ockl_printf_append_string_n
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 5708
; NumSgprs: 34
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
	.text
	.p2align	2                               ; -- Begin function _Z4gsysi
	.type	_Z4gsysi,@function
_Z4gsysi:                               ; @_Z4gsysi
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s0, s33
	s_mov_b32 s33, s32
	s_or_saveexec_b32 s1, -1
	scratch_store_b32 off, v40, s33         ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s1
	v_writelane_b32 v40, s0, 6
	s_add_i32 s32, s32, 16
	v_writelane_b32 v40, s34, 0
	v_writelane_b32 v40, s35, 1
	v_writelane_b32 v40, s36, 2
	v_writelane_b32 v40, s37, 3
	v_writelane_b32 v40, s30, 4
	v_writelane_b32 v40, s31, 5
	v_mov_b32_e32 v8, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, fileCt@rel32@lo+4
	s_addc_u32 s1, s1, fileCt@rel32@hi+12
	s_mov_b64 s[18:19], s[8:9]
	global_load_b64 v[1:2], v8, s[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s20, 0, v1
	v_cmpx_ne_u32_e32 4, v0
	s_xor_b32 s21, exec_lo, s0
	s_cbranch_execz .LBB2_158
; %bb.1:
	s_delay_alu instid0(VALU_DEP_2)
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB2_4
; %bb.2:                                ; %.lr.ph.i5.preheader
	v_mov_b32_e32 v0, 0
	s_mov_b64 s[0:1], 0x401
	s_mov_b32 s2, 0
.LBB2_3:                                ; %.lr.ph.i5
                                        ; =>This Inner Loop Header: Depth=1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, volume@rel32@lo+4
	s_addc_u32 s5, s5, volume@rel32@hi+12
	s_lshr_b32 s3, s2, 8
	global_load_b64 v[1:2], v0, s[4:5]
	v_mov_b32_e32 v3, s3
	s_waitcnt vmcnt(0)
	global_load_b64 v[1:2], v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v1, s0
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, -1, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, -1, v2, vcc_lo
	flat_store_b8 v[1:2], v3
	global_load_b64 v[1:2], v0, s[4:5]
	v_mov_b32_e32 v3, s2
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, fileCt@rel32@lo+4
	s_addc_u32 s5, s5, fileCt@rel32@hi+12
	s_add_i32 s2, s2, 1
	s_waitcnt vmcnt(0)
	global_load_b64 v[1:2], v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v1, s0
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_add_u32 s0, s0, 2
	s_addc_u32 s1, s1, 0
	flat_store_b8 v[1:2], v3
	global_load_b64 v[1:2], v0, s[4:5]
	s_waitcnt vmcnt(0)
	global_load_b32 v8, v[1:2], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_u32_e32 vcc_lo, s2, v8
	s_cbranch_vccz .LBB2_3
.LBB2_4:                                ; %.preheader.i6
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	s_mov_b32 s3, 0
	s_cbranch_vccnz .LBB2_17
; %bb.5:                                ; %.lr.ph75.i.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b64 s[4:5], 0x403
	s_mov_b32 s0, 0
.LBB2_6:                                ; %.lr.ph75.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_8 Depth 2
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, volume@rel32@lo+4
	s_addc_u32 s7, s7, volume@rel32@hi+12
	s_lshl_b32 s1, s0, 1
	global_load_b64 v[2:3], v1, s[6:7]
	s_add_i32 s2, s1, 0x400
	s_add_i32 s6, s1, 0x401
	s_add_i32 s1, s0, 1
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v2, s2
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v3, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, s1, v8
	s_clause 0x1
	flat_load_u8 v9, v[4:5]
	flat_load_u8 v0, v[6:7]
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_and_b32_e32 v4, 0xff, v9
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_or_b32 v14, v4, 8, v0
	s_cbranch_vccnz .LBB2_14
; %bb.7:                                ; %.lr.ph72.preheader.i
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_u32_u24_e32 v0, 31, v14
	v_mov_b32_e32 v16, s0
	s_mov_b32 s7, s1
	v_add_co_u32 v0, vcc_lo, v2, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, 0x1000, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	v_add_co_u32 v0, vcc_lo, 0x1415, v2
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v3, vcc_lo
	s_clause 0x1
	flat_load_u8 v6, v[4:5] offset:1045
	flat_load_u8 v7, v[4:5] offset:1046
	v_add_co_u32 v12, vcc_lo, 0x1417, v2
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_lshl_or_b32 v15, v6, 8, v7
.LBB2_8:                                ; %.lr.ph72.i
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, -1, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, -1, v5, vcc_lo
	s_mov_b32 s0, exec_lo
	s_clause 0x1
	flat_load_u8 v6, v[6:7]
	flat_load_u8 v7, v[4:5]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_lshl_or_b32 v10, v6, 8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v17, 31, v10
	v_add_co_u32 v6, vcc_lo, v2, v17
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v18, vcc_lo, v0, v17
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, 0x1000, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_clause 0x1
	flat_load_u8 v18, v[18:19]
	flat_load_u8 v19, v[6:7] offset:1046
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_lshl_or_b32 v18, v18, 8, v19
	v_mov_b32_e32 v19, s7
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_le_u32_e64 v18, v15
	s_cbranch_execz .LBB2_12
; %bb.9:                                ;   in Loop: Header=BB2_8 Depth=2
	s_mov_b32 s8, exec_lo
	v_cmpx_eq_u32_e64 v18, v15
	s_cbranch_execz .LBB2_11
; %bb.10:                               ;   in Loop: Header=BB2_8 Depth=2
	v_mul_lo_u32 v19, v14, 31
	v_add_co_u32 v17, vcc_lo, v12, v17
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v13, vcc_lo
	flat_load_u8 v20, v[17:18]
	v_add_co_u32 v17, vcc_lo, v12, v19
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v13, vcc_lo
	v_add_co_u32 v19, vcc_lo, v2, v19
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v3, vcc_lo
	flat_load_u8 v22, v[17:18]
	v_add_co_u32 v17, vcc_lo, 0x1000, v19
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v21, vcc_lo
	s_clause 0x5
	flat_load_u8 v19, v[6:7] offset:1049
	flat_load_u8 v21, v[6:7] offset:1048
	flat_load_u8 v23, v[17:18] offset:1048
	flat_load_u8 v24, v[17:18] offset:1049
	flat_load_u8 v6, v[6:7] offset:1050
	flat_load_u8 v7, v[17:18] offset:1050
	s_waitcnt vmcnt(7) lgkmcnt(7)
	v_lshlrev_b32_e32 v17, 24, v20
	s_waitcnt vmcnt(6) lgkmcnt(6)
	v_lshlrev_b32_e32 v18, 24, v22
	s_waitcnt vmcnt(5) lgkmcnt(5)
	v_lshlrev_b32_e32 v19, 8, v19
	s_waitcnt vmcnt(4) lgkmcnt(4)
	v_lshl_or_b32 v17, v21, 16, v17
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_lshlrev_b32_e32 v20, 8, v24
	v_lshl_or_b32 v18, v23, 16, v18
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_or3_b32 v6, v17, v19, v6
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v7, v18, v20, v7
	v_cmp_gt_u32_e32 vcc_lo, v7, v6
	v_cndmask_b32_e32 v14, v14, v10, vcc_lo
	v_cndmask_b32_e64 v16, v16, s7, vcc_lo
.LBB2_11:                               ; %Flow416
                                        ;   in Loop: Header=BB2_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v10, v14 :: v_dual_mov_b32 v19, v16
	v_mov_b32_e32 v18, v15
.LBB2_12:                               ;   in Loop: Header=BB2_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s7, s7, 1
	v_add_co_u32 v4, s0, v4, 2
	v_cmp_ge_u32_e32 vcc_lo, s7, v8
	v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
	s_cbranch_vccnz .LBB2_15
; %bb.13:                               ;   in Loop: Header=BB2_8 Depth=2
	v_dual_mov_b32 v16, v19 :: v_dual_mov_b32 v15, v18
	v_mov_b32_e32 v14, v10
	s_branch .LBB2_8
.LBB2_14:                               ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b32 s7, s3
	v_dual_mov_b32 v7, s3 :: v_dual_mov_b32 v6, s2
	v_dual_mov_b32 v4, s6 :: v_dual_mov_b32 v5, s7
	v_mov_b32_e32 v10, v14
	s_branch .LBB2_16
.LBB2_15:                               ; %._crit_edge.loopexit.i10
                                        ;   in Loop: Header=BB2_6 Depth=1
	v_dual_mov_b32 v5, v1 :: v_dual_lshlrev_b32 v4, 1, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, 0x400, v4
	v_dual_mov_b32 v7, v1 :: v_dual_add_nc_u32 v4, 0x401, v4
	v_mov_b32_e32 v6, v0
.LBB2_16:                               ; %Flow419
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, volume@rel32@lo+4
	s_addc_u32 s9, s9, volume@rel32@hi+12
	s_mov_b32 s0, s1
	flat_store_b8 v[2:3], v9
	global_load_b64 v[2:3], v1, s[8:9]
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v5, vcc_lo
	flat_load_u8 v0, v[6:7]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b8 v[2:3], v0
	global_load_b64 v[2:3], v1, s[8:9]
	v_lshrrev_b32_e32 v0, 8, v10
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v0
	global_load_b64 v[2:3], v1, s[8:9]
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, fileCt@rel32@lo+4
	s_addc_u32 s7, s7, fileCt@rel32@hi+12
	s_add_u32 s4, s4, 2
	s_addc_u32 s5, s5, 0
	flat_store_b8 v[2:3], v10
	global_load_b64 v[2:3], v1, s[6:7]
	s_waitcnt vmcnt(0)
	global_load_b32 v8, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_u32_e32 vcc_lo, s1, v8
	s_cbranch_vccz .LBB2_6
.LBB2_17:                               ; %_Z5sortSv.exit
	s_load_b64 s[22:23], s[18:19], 0x50
	v_mbcnt_lo_u32_b32 v52, -1, 0
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v52
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_23
; %bb.18:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[22:23] offset:40
	global_load_b64 v[5:6], v0, s[22:23]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB2_22
; %bb.19:                               ; %.preheader3.i.i.i.i25.preheader
	s_mov_b32 s3, 0
.LBB2_20:                               ; %.preheader3.i.i.i.i25
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[22:23] offset:40
	global_load_b64 v[10:11], v0, s[22:23]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_20
; %bb.21:                               ; %Flow413
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_22:                               ; %Flow415
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_23:                               ; %.loopexit4.i.i.i.i13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[22:23] offset:40
	global_load_b128 v[0:3], v5, s[22:23]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_25
; %bb.24:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB2_25:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_32
; %bb.26:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[22:23] offset:32 glc
	global_load_b64 v[2:3], v10, s[22:23] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB2_28
.LBB2_27:                               ; %.preheader1.i.i.i.i23
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_27
.LBB2_28:                               ; %Flow411
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[22:23] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_30
; %bb.29:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB2_30:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_32
; %bb.31:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_32:                               ; %Flow412
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_33:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_35
; %bb.34:                               ;   in Loop: Header=BB2_33 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_35:                               ;   in Loop: Header=BB2_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_37
; %bb.36:                               ;   in Loop: Header=BB2_33 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_38
.LBB2_37:                               ;   in Loop: Header=BB2_33 Depth=1
	s_mov_b32 s1, -1
.LBB2_38:                               ; %Flow406
                                        ;   in Loop: Header=BB2_33 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_33
; %bb.39:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_43
; %bb.40:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[22:23] offset:40
	global_load_b64 v[9:10], v8, s[22:23] offset:24 glc
	global_load_b64 v[6:7], v8, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_43
; %bb.41:                               ; %.preheader.i.i.i.i22.preheader
	s_mov_b32 s0, 0
.LBB2_42:                               ; %.preheader.i.i.i.i22
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_42
.LBB2_43:                               ; %__ockl_printf_begin.exit.i15
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.3@rel32@lo+4
	s_addc_u32 s1, s1, .str.3@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 25, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[18:19]
	s_mov_b32 s24, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v38, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, fileCt@rel32@lo+4
	s_addc_u32 s1, s1, fileCt@rel32@hi+12
	global_load_b64 v[0:1], v38, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_cbranch_vccnz .LBB2_158
; %bb.44:                               ; %.lr.ph54.i17
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.1@rel32@lo+4
	s_addc_u32 s1, s1, .str.1@rel32@hi+12
	v_dual_mov_b32 v50, 2 :: v_dual_mov_b32 v51, 1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v36, 33
	s_cselect_b32 s28, 3, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.4@rel32@lo+4
	s_addc_u32 s1, s1, .str.4@rel32@hi+12
	s_mov_b32 s34, 0
	s_cmp_lg_u64 s[0:1], 0
	s_cselect_b32 s29, 5, 0
.LBB2_45:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_47 Depth 2
                                        ;       Child Loop BB2_50 Depth 3
                                        ;       Child Loop BB2_58 Depth 3
                                        ;       Child Loop BB2_64 Depth 3
                                        ;       Child Loop BB2_73 Depth 3
                                        ;       Child Loop BB2_77 Depth 3
                                        ;       Child Loop BB2_85 Depth 3
                                        ;       Child Loop BB2_91 Depth 3
                                        ;       Child Loop BB2_100 Depth 3
                                        ;     Child Loop BB2_106 Depth 2
                                        ;     Child Loop BB2_114 Depth 2
                                        ;     Child Loop BB2_120 Depth 2
                                        ;     Child Loop BB2_129 Depth 2
                                        ;     Child Loop BB2_133 Depth 2
                                        ;     Child Loop BB2_141 Depth 2
                                        ;     Child Loop BB2_147 Depth 2
                                        ;     Child Loop BB2_156 Depth 2
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, volume@rel32@lo+4
	s_addc_u32 s1, s1, volume@rel32@hi+12
	s_mov_b32 s35, exec_lo
	global_load_b64 v[0:1], v38, s[0:1]
	s_lshl_b32 s0, s34, 1
	s_waitcnt vmcnt(0)
	global_load_b64 v[1:2], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v1, s0
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v2, vcc_lo
	s_clause 0x1
	flat_load_u8 v0, v[3:4] offset:1024
	flat_load_u8 v3, v[3:4] offset:1025
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_lshl_or_b32 v0, v0, 8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v0, 31, v0
	v_add_co_u32 v1, vcc_lo, v1, v0
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, 0x1000, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_clause 0x2
	flat_load_u8 v53, v[1:2] offset:1046
	flat_load_u8 v64, v[1:2] offset:1024
	flat_load_u8 v54, v[1:2] offset:1045
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_cmpx_ne_u16_e32 0, v64
	s_cbranch_execz .LBB2_102
; %bb.46:                               ; %.lr.ph.i18.preheader
                                        ;   in Loop: Header=BB2_45 Depth=1
	v_add_nc_u32_e32 v55, 0x1400, v0
	s_mov_b32 s36, 0
	s_mov_b32 s37, 0
.LBB2_47:                               ; %.lr.ph.i18
                                        ;   Parent Loop BB2_45 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_50 Depth 3
                                        ;       Child Loop BB2_58 Depth 3
                                        ;       Child Loop BB2_64 Depth 3
                                        ;       Child Loop BB2_73 Depth 3
                                        ;       Child Loop BB2_77 Depth 3
                                        ;       Child Loop BB2_85 Depth 3
                                        ;       Child Loop BB2_91 Depth 3
                                        ;       Child Loop BB2_100 Depth 3
	v_dual_mov_b32 v37, v52 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_53
; %bb.48:                               ;   in Loop: Header=BB2_47 Depth=2
	global_load_b64 v[2:3], v38, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[22:23] offset:40
	global_load_b64 v[4:5], v38, s[22:23]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB2_52
; %bb.49:                               ; %.preheader3.i.i.i26.i.preheader
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_mov_b32 s3, 0
.LBB2_50:                               ; %.preheader3.i.i.i26.i
                                        ;   Parent Loop BB2_45 Depth=1
                                        ;     Parent Loop BB2_47 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[22:23] offset:40
	global_load_b64 v[6:7], v38, s[22:23]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_50
; %bb.51:                               ; %Flow394
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_52:                               ; %Flow396
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_53:                               ; %.loopexit4.i.i.i21.i
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[22:23] offset:40
	global_load_b128 v[0:3], v38, s[22:23]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_55
; %bb.54:                               ;   in Loop: Header=BB2_47 Depth=2
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v48, s8 :: v_dual_mov_b32 v49, v38
	global_store_b128 v[4:5], v[48:51], off offset:8
.LBB2_55:                               ;   in Loop: Header=BB2_47 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s25, s24
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s26, s24
	s_mov_b32 s27, s24
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v37, v38 :: v_dual_mov_b32 v2, s24
	v_dual_mov_b32 v39, v38 :: v_dual_mov_b32 v4, s26
	v_mov_b32_e32 v3, s25
	v_mov_b32_e32 v5, s27
	s_clause 0x3
	global_store_b128 v[6:7], v[36:39], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_63
; %bb.56:                               ;   in Loop: Header=BB2_47 Depth=2
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[22:23] offset:32 glc
	global_load_b64 v[2:3], v38, s[22:23] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB2_59
; %bb.57:                               ; %.preheader1.i.i.i24.i.preheader
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_mov_b32 s8, 0
.LBB2_58:                               ; %.preheader1.i.i.i24.i
                                        ;   Parent Loop BB2_45 Depth=1
                                        ;     Parent Loop BB2_47 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_58
.LBB2_59:                               ; %Flow392
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[22:23] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_61
; %bb.60:                               ;   in Loop: Header=BB2_47 Depth=2
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB2_61:                               ;   in Loop: Header=BB2_47 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_63
; %bb.62:                               ;   in Loop: Header=BB2_47 Depth=2
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_63:                               ; %Flow393
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_64:                               ;   Parent Loop BB2_45 Depth=1
                                        ;     Parent Loop BB2_47 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_66
; %bb.65:                               ;   in Loop: Header=BB2_64 Depth=3
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_66:                               ;   in Loop: Header=BB2_64 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_68
; %bb.67:                               ;   in Loop: Header=BB2_64 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_69
.LBB2_68:                               ;   in Loop: Header=BB2_64 Depth=3
	s_mov_b32 s1, -1
.LBB2_69:                               ; %Flow387
                                        ;   in Loop: Header=BB2_64 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_64
; %bb.70:                               ;   in Loop: Header=BB2_47 Depth=2
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_74
; %bb.71:                               ;   in Loop: Header=BB2_47 Depth=2
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[22:23] offset:40
	global_load_b64 v[8:9], v38, s[22:23] offset:24 glc
	global_load_b64 v[6:7], v38, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_74
; %bb.72:                               ; %.preheader.i.i.i23.i.preheader
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_mov_b32 s0, 0
.LBB2_73:                               ; %.preheader.i.i.i23.i
                                        ;   Parent Loop BB2_45 Depth=1
                                        ;     Parent Loop BB2_47 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_73
.LBB2_74:                               ; %__ockl_printf_begin.exit27.i
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.1@rel32@lo+4
	s_addc_u32 s1, s1, .str.1@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s28 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v6, 0
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v52 :: v_dual_mov_b32 v2, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_80
; %bb.75:                               ;   in Loop: Header=BB2_47 Depth=2
	global_load_b64 v[4:5], v38, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v38, s[22:23] offset:40
	global_load_b64 v[6:7], v38, s[22:23]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v8, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[2:3], v[4:5]
	s_cbranch_execz .LBB2_79
; %bb.76:                               ; %.preheader3.i.i.i33.i.preheader
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_mov_b32 s3, 0
.LBB2_77:                               ; %.preheader3.i.i.i33.i
                                        ;   Parent Loop BB2_45 Depth=1
                                        ;     Parent Loop BB2_47 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[22:23] offset:40
	global_load_b64 v[8:9], v38, s[22:23]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v6, 24, v[8:9]
	v_and_b32_e32 v8, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v8, 24, v[3:4]
	v_mov_b32_e32 v3, v6
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_77
; %bb.78:                               ; %Flow380
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_79:                               ; %Flow382
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_80:                               ; %.loopexit4.i.i.i28.i
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v38, s[22:23] offset:40
	global_load_b128 v[4:7], v38, s[22:23]
	v_readfirstlane_b32 s2, v2
	v_readfirstlane_b32 s3, v3
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_82
; %bb.81:                               ;   in Loop: Header=BB2_47 Depth=2
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v3, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v48, s8 :: v_dual_mov_b32 v49, v38
	global_store_b128 v[2:3], v[48:51], off offset:8
.LBB2_82:                               ;   in Loop: Header=BB2_47 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s25, s24
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v3, v8
	s_mov_b32 s26, s24
	s_mov_b32 s27, s24
	v_dual_mov_b32 v3, v38 :: v_dual_and_b32 v2, 0xff, v64
	v_and_or_b32 v0, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo
	v_dual_mov_b32 v6, s24 :: v_dual_mov_b32 v7, s25
	v_dual_mov_b32 v8, s26 :: v_dual_mov_b32 v9, s27
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_90
; %bb.83:                               ;   in Loop: Header=BB2_47 Depth=2
	s_clause 0x1
	global_load_b64 v[10:11], v38, s[22:23] offset:32 glc
	global_load_b64 v[0:1], v38, s[22:23] offset:40
	v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[8:11], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[10:11]
	s_cbranch_execz .LBB2_86
; %bb.84:                               ; %.preheader1.i.i.i31.i.preheader
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_mov_b32 s8, 0
.LBB2_85:                               ; %.preheader1.i.i.i31.i
                                        ;   Parent Loop BB2_45 Depth=1
                                        ;     Parent Loop BB2_47 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[6:7], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v38, v[0:3], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_85
.LBB2_86:                               ; %Flow378
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[0:1], v38, s[22:23] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_88
; %bb.87:                               ;   in Loop: Header=BB2_47 Depth=2
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[37:38], off offset:8
.LBB2_88:                               ;   in Loop: Header=BB2_47 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_90
; %bb.89:                               ;   in Loop: Header=BB2_47 Depth=2
	global_load_b32 v37, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_90:                               ; %Flow379
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_91:                               ;   Parent Loop BB2_45 Depth=1
                                        ;     Parent Loop BB2_47 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_93
; %bb.92:                               ;   in Loop: Header=BB2_91 Depth=3
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_93:                               ;   in Loop: Header=BB2_91 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_95
; %bb.94:                               ;   in Loop: Header=BB2_91 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_96
.LBB2_95:                               ;   in Loop: Header=BB2_91 Depth=3
	s_mov_b32 s1, -1
.LBB2_96:                               ; %Flow373
                                        ;   in Loop: Header=BB2_91 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_91
; %bb.97:                               ;   in Loop: Header=BB2_47 Depth=2
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_101
; %bb.98:                               ;   in Loop: Header=BB2_47 Depth=2
	s_clause 0x2
	global_load_b64 v[2:3], v38, s[22:23] offset:40
	global_load_b64 v[6:7], v38, s[22:23] offset:24 glc
	global_load_b64 v[4:5], v38, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_101
; %bb.99:                               ; %.preheader.i.i.i30.i.preheader
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_mov_b32 s0, 0
.LBB2_100:                              ; %.preheader.i.i.i30.i
                                        ;   Parent Loop BB2_45 Depth=1
                                        ;     Parent Loop BB2_47 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_100
.LBB2_101:                              ; %__ockl_printf_append_args.exit.i19
                                        ;   in Loop: Header=BB2_47 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, volume@rel32@lo+4
	s_addc_u32 s1, s1, volume@rel32@hi+12
	global_load_b64 v[0:1], v38, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v0, s37
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s37, s37, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v55
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_load_u8 v64, v[0:1] offset:1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v64
	s_or_b32 s36, vcc_lo, s36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s36
	s_cbranch_execnz .LBB2_47
.LBB2_102:                              ; %Flow398
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s35
; %bb.103:                              ; %._crit_edge.i21
                                        ;   in Loop: Header=BB2_45 Depth=1
	v_dual_mov_b32 v37, v52 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_109
; %bb.104:                              ;   in Loop: Header=BB2_45 Depth=1
	global_load_b64 v[2:3], v38, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[22:23] offset:40
	global_load_b64 v[4:5], v38, s[22:23]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB2_108
; %bb.105:                              ; %.preheader3.i.i.i19.i.preheader
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_mov_b32 s3, 0
.LBB2_106:                              ; %.preheader3.i.i.i19.i
                                        ;   Parent Loop BB2_45 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[22:23] offset:40
	global_load_b64 v[6:7], v38, s[22:23]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_106
; %bb.107:                              ; %Flow366
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_108:                              ; %Flow368
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_109:                              ; %.loopexit4.i.i.i14.i
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[22:23] offset:40
	global_load_b128 v[0:3], v38, s[22:23]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_111
; %bb.110:                              ;   in Loop: Header=BB2_45 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v48, s8 :: v_dual_mov_b32 v49, v38
	global_store_b128 v[4:5], v[48:51], off offset:8
.LBB2_111:                              ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s25, s24
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s26, s24
	s_mov_b32 s27, s24
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v37, v38 :: v_dual_mov_b32 v2, s24
	v_dual_mov_b32 v39, v38 :: v_dual_mov_b32 v4, s26
	v_mov_b32_e32 v3, s25
	v_mov_b32_e32 v5, s27
	s_clause 0x3
	global_store_b128 v[6:7], v[36:39], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_119
; %bb.112:                              ;   in Loop: Header=BB2_45 Depth=1
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[22:23] offset:32 glc
	global_load_b64 v[2:3], v38, s[22:23] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB2_115
; %bb.113:                              ; %.preheader1.i.i.i17.i.preheader
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_mov_b32 s8, 0
.LBB2_114:                              ; %.preheader1.i.i.i17.i
                                        ;   Parent Loop BB2_45 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_114
.LBB2_115:                              ; %Flow364
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[22:23] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_117
; %bb.116:                              ;   in Loop: Header=BB2_45 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB2_117:                              ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_119
; %bb.118:                              ;   in Loop: Header=BB2_45 Depth=1
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_119:                              ; %Flow365
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_120:                              ;   Parent Loop BB2_45 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_122
; %bb.121:                              ;   in Loop: Header=BB2_120 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_122:                              ;   in Loop: Header=BB2_120 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_124
; %bb.123:                              ;   in Loop: Header=BB2_120 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_125
.LBB2_124:                              ;   in Loop: Header=BB2_120 Depth=2
	s_mov_b32 s1, -1
.LBB2_125:                              ; %Flow359
                                        ;   in Loop: Header=BB2_120 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_120
; %bb.126:                              ;   in Loop: Header=BB2_45 Depth=1
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_130
; %bb.127:                              ;   in Loop: Header=BB2_45 Depth=1
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[22:23] offset:40
	global_load_b64 v[8:9], v38, s[22:23] offset:24 glc
	global_load_b64 v[6:7], v38, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_130
; %bb.128:                              ; %.preheader.i.i.i16.i.preheader
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_mov_b32 s0, 0
.LBB2_129:                              ; %.preheader.i.i.i16.i
                                        ;   Parent Loop BB2_45 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_129
.LBB2_130:                              ; %__ockl_printf_begin.exit20.i
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.4@rel32@lo+4
	s_addc_u32 s1, s1, .str.4@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s29 :: v_dual_mov_b32 v5, v38
	v_mov_b32_e32 v6, v38
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v52 :: v_dual_mov_b32 v2, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_136
; %bb.131:                              ;   in Loop: Header=BB2_45 Depth=1
	global_load_b64 v[4:5], v38, s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v38, s[22:23] offset:40
	global_load_b64 v[6:7], v38, s[22:23]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v8, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[2:3], v[4:5]
	s_cbranch_execz .LBB2_135
; %bb.132:                              ; %.preheader3.i.i.i39.i.preheader
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_mov_b32 s3, 0
.LBB2_133:                              ; %.preheader3.i.i.i39.i
                                        ;   Parent Loop BB2_45 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[22:23] offset:40
	global_load_b64 v[8:9], v38, s[22:23]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v6, 24, v[8:9]
	v_and_b32_e32 v8, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v8, 24, v[3:4]
	v_mov_b32_e32 v3, v6
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_133
; %bb.134:                              ; %Flow352
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_135:                              ; %Flow354
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_136:                              ; %.loopexit4.i.i.i34.i
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v38, s[22:23] offset:40
	global_load_b128 v[4:7], v38, s[22:23]
	v_readfirstlane_b32 s2, v2
	v_readfirstlane_b32 s3, v3
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_138
; %bb.137:                              ;   in Loop: Header=BB2_45 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v3, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v48, s8 :: v_dual_mov_b32 v49, v38
	global_store_b128 v[2:3], v[48:51], off offset:8
.LBB2_138:                              ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v6, s4
	v_and_b32_e32 v2, 0xff, v54
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v10, vcc_lo, v3, v8
	v_mov_b32_e32 v3, v38
	s_mov_b32 s25, s24
	s_mov_b32 s26, s24
	s_mov_b32 s27, s24
	v_and_or_b32 v0, 0xffffff1d, v0, 34
	v_perm_b32 v2, v2, v53, 0x6050400
	v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo
	v_dual_mov_b32 v6, s24 :: v_dual_mov_b32 v7, s25
	v_dual_mov_b32 v8, s26 :: v_dual_mov_b32 v9, s27
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_146
; %bb.139:                              ;   in Loop: Header=BB2_45 Depth=1
	s_clause 0x1
	global_load_b64 v[10:11], v38, s[22:23] offset:32 glc
	global_load_b64 v[0:1], v38, s[22:23] offset:40
	v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[8:11], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[10:11]
	s_cbranch_execz .LBB2_142
; %bb.140:                              ; %.preheader1.i.i.i37.i.preheader
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_mov_b32 s8, 0
.LBB2_141:                              ; %.preheader1.i.i.i37.i
                                        ;   Parent Loop BB2_45 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[6:7], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v38, v[0:3], s[22:23] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_141
.LBB2_142:                              ; %Flow350
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[0:1], v38, s[22:23] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_144
; %bb.143:                              ;   in Loop: Header=BB2_45 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[37:38], off offset:8
.LBB2_144:                              ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_146
; %bb.145:                              ;   in Loop: Header=BB2_45 Depth=1
	global_load_b32 v37, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_146:                              ; %Flow351
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_147:                              ;   Parent Loop BB2_45 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_149
; %bb.148:                              ;   in Loop: Header=BB2_147 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_149:                              ;   in Loop: Header=BB2_147 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_151
; %bb.150:                              ;   in Loop: Header=BB2_147 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_152
.LBB2_151:                              ;   in Loop: Header=BB2_147 Depth=2
	s_mov_b32 s1, -1
.LBB2_152:                              ; %Flow345
                                        ;   in Loop: Header=BB2_147 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_147
; %bb.153:                              ;   in Loop: Header=BB2_45 Depth=1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_157
; %bb.154:                              ;   in Loop: Header=BB2_45 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v38, s[22:23] offset:40
	global_load_b64 v[6:7], v38, s[22:23] offset:24 glc
	global_load_b64 v[4:5], v38, s[22:23]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_157
; %bb.155:                              ; %.preheader.i.i.i36.i.preheader
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_mov_b32 s0, 0
.LBB2_156:                              ; %.preheader.i.i.i36.i
                                        ;   Parent Loop BB2_45 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[0:3], s[22:23] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_156
.LBB2_157:                              ; %__ockl_printf_append_args.exit40.i
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, fileCt@rel32@lo+4
	s_addc_u32 s1, s1, fileCt@rel32@hi+12
	s_add_i32 s34, s34, 1
	global_load_b64 v[0:1], v38, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, s34, v0
	s_cbranch_vccnz .LBB2_45
.LBB2_158:                              ; %Flow495
	s_and_not1_saveexec_b32 s26, s21
	s_cbranch_execz .LBB2_285
; %bb.159:
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB2_162
; %bb.160:                              ; %.lr.ph.i.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b64 s[0:1], 0xc01
	s_mov_b32 s2, 0
.LBB2_161:                              ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, volume@rel32@lo+4
	s_addc_u32 s5, s5, volume@rel32@hi+12
	s_lshr_b32 s3, s2, 8
	global_load_b64 v[2:3], v1, s[4:5]
	v_mov_b32_e32 v0, s3
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, -1, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, -1, v3, vcc_lo
	flat_store_b8 v[2:3], v0
	global_load_b64 v[2:3], v1, s[4:5]
	v_mov_b32_e32 v0, s2
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, fileCt@rel32@lo+4
	s_addc_u32 s5, s5, fileCt@rel32@hi+12
	s_add_i32 s2, s2, 1
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_add_u32 s0, s0, 2
	s_addc_u32 s1, s1, 0
	flat_store_b8 v[2:3], v0
	global_load_b64 v[2:3], v1, s[4:5]
	s_waitcnt vmcnt(0)
	global_load_b32 v0, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_u32_e32 vcc_lo, s2, v0
	s_cbranch_vccz .LBB2_161
	s_branch .LBB2_163
.LBB2_162:
	v_mov_b32_e32 v0, 0
.LBB2_163:                              ; %.preheader.i
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_mov_b32 s3, 0
	s_cbranch_vccnz .LBB2_171
; %bb.164:                              ; %.lr.ph57.i.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b64 s[4:5], 0xc03
	s_mov_b32 s0, 0
.LBB2_165:                              ; %.lr.ph57.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_167 Depth 2
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, volume@rel32@lo+4
	s_addc_u32 s7, s7, volume@rel32@hi+12
	s_lshl_b32 s1, s0, 1
	global_load_b64 v[2:3], v1, s[6:7]
	s_add_i32 s2, s1, 0xc00
	s_add_i32 s6, s1, 0xc01
	s_add_i32 s8, s0, 1
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v2, s2
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v3, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, s8, v0
	s_clause 0x1
	flat_load_u8 v9, v[4:5]
	flat_load_u8 v4, v[6:7]
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_and_b32_e32 v5, 0xff, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_or_b32 v8, v5, 8, v4
	s_cbranch_vccnz .LBB2_169
; %bb.166:                              ; %.lr.ph54.preheader.i
                                        ;   in Loop: Header=BB2_165 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v4, 31, v8
	s_mov_b32 s7, s8
	v_add_co_u32 v4, vcc_lo, v2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, 0x1000, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_clause 0x3
	flat_load_u8 v6, v[4:5] offset:1052
	flat_load_u8 v10, v[4:5] offset:1053
	flat_load_u8 v11, v[4:5] offset:1054
	flat_load_u8 v4, v[4:5] offset:1051
	s_waitcnt vmcnt(3) lgkmcnt(3)
	v_lshlrev_b32_e32 v5, 16, v6
	v_add_co_u32 v6, vcc_lo, 0x141b, v2
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_lshlrev_b32_e32 v10, 8, v10
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_lshl_or_b32 v12, v4, 24, v5
	v_add_co_u32 v4, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_or3_b32 v10, v12, v10, v11
	v_mov_b32_e32 v11, s0
.LBB2_167:                              ; %.lr.ph54.i
                                        ;   Parent Loop BB2_165 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, -1, v4
	v_add_co_ci_u32_e32 v13, vcc_lo, -1, v5, vcc_lo
	s_clause 0x1
	flat_load_u8 v12, v[12:13]
	flat_load_u8 v13, v[4:5]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_lshl_or_b32 v16, v12, 8, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v12, 31, v16
	v_add_co_u32 v14, vcc_lo, v2, v12
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v12, vcc_lo, v6, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v14, vcc_lo, 0x1000, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v15, vcc_lo
	s_clause 0x3
	flat_load_u8 v12, v[12:13]
	flat_load_u8 v13, v[14:15] offset:1052
	flat_load_u8 v17, v[14:15] offset:1053
	flat_load_u8 v14, v[14:15] offset:1054
	v_add_co_u32 v4, vcc_lo, v4, 2
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_waitcnt vmcnt(3) lgkmcnt(3)
	v_lshlrev_b32_e32 v12, 24, v12
	s_waitcnt vmcnt(2) lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_or_b32 v12, v13, 16, v12
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v13, 8, v17
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_or3_b32 v12, v12, v13, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e64 s0, v12, v10
	v_max_u32_e32 v10, v12, v10
	v_cndmask_b32_e64 v11, v11, s7, s0
	s_add_i32 s7, s7, 1
	v_cndmask_b32_e64 v8, v8, v16, s0
	v_cmp_ge_u32_e64 s1, s7, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB2_167
; %bb.168:                              ; %._crit_edge.loopexit.i
                                        ;   in Loop: Header=BB2_165 Depth=1
	v_dual_mov_b32 v5, v1 :: v_dual_lshlrev_b32 v4, 1, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, 0xc00, v4
	v_dual_mov_b32 v7, v1 :: v_dual_add_nc_u32 v4, 0xc01, v4
	v_mov_b32_e32 v6, v0
	s_branch .LBB2_170
.LBB2_169:                              ;   in Loop: Header=BB2_165 Depth=1
	s_mov_b32 s7, s3
	v_dual_mov_b32 v7, s3 :: v_dual_mov_b32 v6, s2
	v_dual_mov_b32 v4, s6 :: v_dual_mov_b32 v5, s7
.LBB2_170:                              ; %Flow488
                                        ;   in Loop: Header=BB2_165 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, volume@rel32@lo+4
	s_addc_u32 s1, s1, volume@rel32@hi+12
	flat_store_b8 v[2:3], v9
	global_load_b64 v[2:3], v1, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v5, vcc_lo
	flat_load_u8 v0, v[6:7]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b8 v[2:3], v0
	global_load_b64 v[2:3], v1, s[0:1]
	v_lshrrev_b32_e32 v0, 8, v8
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v0
	global_load_b64 v[2:3], v1, s[0:1]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, fileCt@rel32@lo+4
	s_addc_u32 s1, s1, fileCt@rel32@hi+12
	s_add_u32 s4, s4, 2
	s_addc_u32 s5, s5, 0
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v8
	global_load_b64 v[2:3], v1, s[0:1]
	s_mov_b32 s0, s8
	s_waitcnt vmcnt(0)
	global_load_b32 v0, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_u32_e32 vcc_lo, s8, v0
	s_cbranch_vccz .LBB2_165
.LBB2_171:                              ; %_Z5sortDv.exit
	s_load_b64 s[24:25], s[18:19], 0x50
	v_mbcnt_lo_u32_b32 v53, -1, 0
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v53
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_177
; %bb.172:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[24:25] offset:40
	global_load_b64 v[5:6], v0, s[24:25]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB2_176
; %bb.173:                              ; %.preheader3.i.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB2_174:                              ; %.preheader3.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[24:25] offset:40
	global_load_b64 v[10:11], v0, s[24:25]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_174
; %bb.175:                              ; %Flow484
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_176:                              ; %Flow486
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_177:                              ; %.loopexit4.i.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[24:25] offset:40
	global_load_b128 v[0:3], v5, s[24:25]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_179
; %bb.178:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB2_179:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_186
; %bb.180:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[24:25] offset:32 glc
	global_load_b64 v[2:3], v10, s[24:25] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB2_182
.LBB2_181:                              ; %.preheader1.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_181
.LBB2_182:                              ; %Flow482
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[24:25] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_184
; %bb.183:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB2_184:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_186
; %bb.185:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_186:                              ; %Flow483
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_187:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_189
; %bb.188:                              ;   in Loop: Header=BB2_187 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_189:                              ;   in Loop: Header=BB2_187 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_191
; %bb.190:                              ;   in Loop: Header=BB2_187 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_192
.LBB2_191:                              ;   in Loop: Header=BB2_187 Depth=1
	s_mov_b32 s1, -1
.LBB2_192:                              ; %Flow477
                                        ;   in Loop: Header=BB2_187 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_187
; %bb.193:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_197
; %bb.194:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[24:25] offset:40
	global_load_b64 v[9:10], v8, s[24:25] offset:24 glc
	global_load_b64 v[6:7], v8, s[24:25]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_197
; %bb.195:                              ; %.preheader.i.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB2_196:                              ; %.preheader.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_196
.LBB2_197:                              ; %__ockl_printf_begin.exit.i
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str@rel32@lo+4
	s_addc_u32 s1, s1, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 29, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_mov_b64 s[8:9], s[18:19]
	s_mov_b32 s20, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v38, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, fileCt@rel32@lo+4
	s_addc_u32 s1, s1, fileCt@rel32@hi+12
	global_load_b64 v[0:1], v38, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_cbranch_vccnz .LBB2_285
; %bb.198:                              ; %.lr.ph43.i
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.1@rel32@lo+4
	s_addc_u32 s1, s1, .str.1@rel32@hi+12
	v_dual_mov_b32 v51, 2 :: v_dual_mov_b32 v52, 1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v36, 33
	s_cselect_b32 s27, 3, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.2@rel32@lo+4
	s_addc_u32 s1, s1, .str.2@rel32@hi+12
	s_mov_b32 s28, 0
	s_cmp_lg_u64 s[0:1], 0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, 0, 1, s0
	v_lshlrev_b32_e32 v48, 1, v0
.LBB2_199:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_201 Depth 2
                                        ;       Child Loop BB2_204 Depth 3
                                        ;       Child Loop BB2_212 Depth 3
                                        ;       Child Loop BB2_218 Depth 3
                                        ;       Child Loop BB2_227 Depth 3
                                        ;       Child Loop BB2_231 Depth 3
                                        ;       Child Loop BB2_239 Depth 3
                                        ;       Child Loop BB2_245 Depth 3
                                        ;       Child Loop BB2_254 Depth 3
                                        ;     Child Loop BB2_260 Depth 2
                                        ;     Child Loop BB2_268 Depth 2
                                        ;     Child Loop BB2_274 Depth 2
                                        ;     Child Loop BB2_283 Depth 2
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, volume@rel32@lo+4
	s_addc_u32 s1, s1, volume@rel32@hi+12
	s_mov_b32 s29, exec_lo
	global_load_b64 v[0:1], v38, s[0:1]
	s_lshl_b32 s0, s28, 1
	s_waitcnt vmcnt(0)
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo
	s_clause 0x1
	flat_load_u8 v4, v[2:3] offset:3072
	flat_load_u8 v2, v[2:3] offset:3073
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_lshl_or_b32 v2, v4, 8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u32_u24 v54, v2, 31, 0x1400
	v_add_co_u32 v0, vcc_lo, v0, v54
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_load_u8 v55, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u16_e32 0, v55
	s_cbranch_execz .LBB2_256
; %bb.200:                              ; %.lr.ph.i1.preheader
                                        ;   in Loop: Header=BB2_199 Depth=1
	s_mov_b32 s34, 0
	s_mov_b32 s35, 0
.LBB2_201:                              ; %.lr.ph.i1
                                        ;   Parent Loop BB2_199 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_204 Depth 3
                                        ;       Child Loop BB2_212 Depth 3
                                        ;       Child Loop BB2_218 Depth 3
                                        ;       Child Loop BB2_227 Depth 3
                                        ;       Child Loop BB2_231 Depth 3
                                        ;       Child Loop BB2_239 Depth 3
                                        ;       Child Loop BB2_245 Depth 3
                                        ;       Child Loop BB2_254 Depth 3
	v_dual_mov_b32 v37, v53 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_207
; %bb.202:                              ;   in Loop: Header=BB2_201 Depth=2
	global_load_b64 v[2:3], v38, s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[24:25] offset:40
	global_load_b64 v[4:5], v38, s[24:25]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB2_206
; %bb.203:                              ; %.preheader3.i.i.i23.i.preheader
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_mov_b32 s3, 0
.LBB2_204:                              ; %.preheader3.i.i.i23.i
                                        ;   Parent Loop BB2_199 Depth=1
                                        ;     Parent Loop BB2_201 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[24:25] offset:40
	global_load_b64 v[6:7], v38, s[24:25]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_204
; %bb.205:                              ; %Flow465
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_206:                              ; %Flow467
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_207:                              ; %.loopexit4.i.i.i18.i
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[24:25] offset:40
	global_load_b128 v[0:3], v38, s[24:25]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_209
; %bb.208:                              ;   in Loop: Header=BB2_201 Depth=2
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v49, s8 :: v_dual_mov_b32 v50, v38
	global_store_b128 v[4:5], v[49:52], off offset:8
.LBB2_209:                              ;   in Loop: Header=BB2_201 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s21, s20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v37, v38 :: v_dual_mov_b32 v2, s20
	v_dual_mov_b32 v39, v38 :: v_dual_mov_b32 v4, s22
	v_mov_b32_e32 v3, s21
	v_mov_b32_e32 v5, s23
	s_clause 0x3
	global_store_b128 v[6:7], v[36:39], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_217
; %bb.210:                              ;   in Loop: Header=BB2_201 Depth=2
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[24:25] offset:32 glc
	global_load_b64 v[2:3], v38, s[24:25] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB2_213
; %bb.211:                              ; %.preheader1.i.i.i21.i.preheader
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_mov_b32 s8, 0
.LBB2_212:                              ; %.preheader1.i.i.i21.i
                                        ;   Parent Loop BB2_199 Depth=1
                                        ;     Parent Loop BB2_201 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_212
.LBB2_213:                              ; %Flow463
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[24:25] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_215
; %bb.214:                              ;   in Loop: Header=BB2_201 Depth=2
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB2_215:                              ;   in Loop: Header=BB2_201 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_217
; %bb.216:                              ;   in Loop: Header=BB2_201 Depth=2
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_217:                              ; %Flow464
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_218:                              ;   Parent Loop BB2_199 Depth=1
                                        ;     Parent Loop BB2_201 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_220
; %bb.219:                              ;   in Loop: Header=BB2_218 Depth=3
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_220:                              ;   in Loop: Header=BB2_218 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_222
; %bb.221:                              ;   in Loop: Header=BB2_218 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_223
.LBB2_222:                              ;   in Loop: Header=BB2_218 Depth=3
	s_mov_b32 s1, -1
.LBB2_223:                              ; %Flow458
                                        ;   in Loop: Header=BB2_218 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_218
; %bb.224:                              ;   in Loop: Header=BB2_201 Depth=2
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_228
; %bb.225:                              ;   in Loop: Header=BB2_201 Depth=2
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[24:25] offset:40
	global_load_b64 v[8:9], v38, s[24:25] offset:24 glc
	global_load_b64 v[6:7], v38, s[24:25]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_228
; %bb.226:                              ; %.preheader.i.i.i20.i.preheader
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_mov_b32 s0, 0
.LBB2_227:                              ; %.preheader.i.i.i20.i
                                        ;   Parent Loop BB2_199 Depth=1
                                        ;     Parent Loop BB2_201 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_227
.LBB2_228:                              ; %__ockl_printf_begin.exit24.i
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.1@rel32@lo+4
	s_addc_u32 s1, s1, .str.1@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s27 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v6, 0
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v53 :: v_dual_mov_b32 v2, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v37
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_234
; %bb.229:                              ;   in Loop: Header=BB2_201 Depth=2
	global_load_b64 v[4:5], v38, s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v38, s[24:25] offset:40
	global_load_b64 v[6:7], v38, s[24:25]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v8, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[2:3], v[4:5]
	s_cbranch_execz .LBB2_233
; %bb.230:                              ; %.preheader3.i.i.i30.i.preheader
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_mov_b32 s3, 0
.LBB2_231:                              ; %.preheader3.i.i.i30.i
                                        ;   Parent Loop BB2_199 Depth=1
                                        ;     Parent Loop BB2_201 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[24:25] offset:40
	global_load_b64 v[8:9], v38, s[24:25]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v6, 24, v[8:9]
	v_and_b32_e32 v8, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v8, 24, v[3:4]
	v_mov_b32_e32 v3, v6
	global_load_b64 v[2:3], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_231
; %bb.232:                              ; %Flow451
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_233:                              ; %Flow453
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_234:                              ; %.loopexit4.i.i.i25.i
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[8:9], v38, s[24:25] offset:40
	global_load_b128 v[4:7], v38, s[24:25]
	v_readfirstlane_b32 s2, v2
	v_readfirstlane_b32 s3, v3
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_236
; %bb.235:                              ;   in Loop: Header=BB2_201 Depth=2
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v3, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v49, s8 :: v_dual_mov_b32 v50, v38
	global_store_b128 v[2:3], v[49:52], off offset:8
.LBB2_236:                              ;   in Loop: Header=BB2_201 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s21, s20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v3, v8
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_dual_mov_b32 v3, v38 :: v_dual_and_b32 v2, 0xff, v55
	v_and_or_b32 v0, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo
	v_dual_mov_b32 v6, s20 :: v_dual_mov_b32 v7, s21
	v_dual_mov_b32 v8, s22 :: v_dual_mov_b32 v9, s23
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_244
; %bb.237:                              ;   in Loop: Header=BB2_201 Depth=2
	s_clause 0x1
	global_load_b64 v[10:11], v38, s[24:25] offset:32 glc
	global_load_b64 v[0:1], v38, s[24:25] offset:40
	v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[8:11], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[10:11]
	s_cbranch_execz .LBB2_240
; %bb.238:                              ; %.preheader1.i.i.i28.i.preheader
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_mov_b32 s8, 0
.LBB2_239:                              ; %.preheader1.i.i.i28.i
                                        ;   Parent Loop BB2_199 Depth=1
                                        ;     Parent Loop BB2_201 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[6:7], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v38, v[0:3], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_239
.LBB2_240:                              ; %Flow449
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[0:1], v38, s[24:25] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_242
; %bb.241:                              ;   in Loop: Header=BB2_201 Depth=2
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[37:38], off offset:8
.LBB2_242:                              ;   in Loop: Header=BB2_201 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_244
; %bb.243:                              ;   in Loop: Header=BB2_201 Depth=2
	global_load_b32 v37, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_244:                              ; %Flow450
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_245:                              ;   Parent Loop BB2_199 Depth=1
                                        ;     Parent Loop BB2_201 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_247
; %bb.246:                              ;   in Loop: Header=BB2_245 Depth=3
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_247:                              ;   in Loop: Header=BB2_245 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_249
; %bb.248:                              ;   in Loop: Header=BB2_245 Depth=3
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_250
.LBB2_249:                              ;   in Loop: Header=BB2_245 Depth=3
	s_mov_b32 s1, -1
.LBB2_250:                              ; %Flow444
                                        ;   in Loop: Header=BB2_245 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_245
; %bb.251:                              ;   in Loop: Header=BB2_201 Depth=2
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_255
; %bb.252:                              ;   in Loop: Header=BB2_201 Depth=2
	s_clause 0x2
	global_load_b64 v[2:3], v38, s[24:25] offset:40
	global_load_b64 v[6:7], v38, s[24:25] offset:24 glc
	global_load_b64 v[4:5], v38, s[24:25]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_255
; %bb.253:                              ; %.preheader.i.i.i27.i.preheader
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_mov_b32 s0, 0
.LBB2_254:                              ; %.preheader.i.i.i27.i
                                        ;   Parent Loop BB2_199 Depth=1
                                        ;     Parent Loop BB2_201 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v38, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_254
.LBB2_255:                              ; %__ockl_printf_append_args.exit.i
                                        ;   in Loop: Header=BB2_201 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, volume@rel32@lo+4
	s_addc_u32 s1, s1, volume@rel32@hi+12
	global_load_b64 v[0:1], v38, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v0, s35
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s35, s35, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, v54
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	flat_load_u8 v55, v[0:1] offset:1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v55
	s_or_b32 s34, vcc_lo, s34
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s34
	s_cbranch_execnz .LBB2_201
.LBB2_256:                              ; %Flow469
                                        ;   in Loop: Header=BB2_199 Depth=1
	s_or_b32 exec_lo, exec_lo, s29
; %bb.257:                              ; %._crit_edge.i3
                                        ;   in Loop: Header=BB2_199 Depth=1
	v_dual_mov_b32 v37, v53 :: v_dual_mov_b32 v4, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v37
	v_mov_b32_e32 v5, 0
	v_cmp_eq_u32_e64 s0, s0, v37
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_263
; %bb.258:                              ;   in Loop: Header=BB2_199 Depth=1
	global_load_b64 v[2:3], v38, s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[24:25] offset:40
	global_load_b64 v[4:5], v38, s[24:25]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB2_262
; %bb.259:                              ; %.preheader3.i.i.i16.i.preheader
                                        ;   in Loop: Header=BB2_199 Depth=1
	s_mov_b32 s3, 0
.LBB2_260:                              ; %.preheader3.i.i.i16.i
                                        ;   Parent Loop BB2_199 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v38, s[24:25] offset:40
	global_load_b64 v[6:7], v38, s[24:25]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v38, v[0:3], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_260
; %bb.261:                              ; %Flow437
                                        ;   in Loop: Header=BB2_199 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_262:                              ; %Flow439
                                        ;   in Loop: Header=BB2_199 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_263:                              ; %.loopexit4.i.i.i11.i
                                        ;   in Loop: Header=BB2_199 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[6:7], v38, s[24:25] offset:40
	global_load_b128 v[0:3], v38, s[24:25]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_265
; %bb.264:                              ;   in Loop: Header=BB2_199 Depth=1
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v49, s8 :: v_dual_mov_b32 v50, v38
	global_store_b128 v[4:5], v[49:52], off offset:8
.LBB2_265:                              ;   in Loop: Header=BB2_199 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[37:38]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s21, s20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s22, s20
	s_mov_b32 s23, s20
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v37, v38 :: v_dual_mov_b32 v2, s20
	v_dual_mov_b32 v39, v38 :: v_dual_mov_b32 v4, s22
	v_mov_b32_e32 v3, s21
	v_mov_b32_e32 v5, s23
	s_clause 0x3
	global_store_b128 v[6:7], v[36:39], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_273
; %bb.266:                              ;   in Loop: Header=BB2_199 Depth=1
	s_clause 0x1
	global_load_b64 v[12:13], v38, s[24:25] offset:32 glc
	global_load_b64 v[2:3], v38, s[24:25] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[10:13], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB2_269
; %bb.267:                              ; %.preheader1.i.i.i14.i.preheader
                                        ;   in Loop: Header=BB2_199 Depth=1
	s_mov_b32 s8, 0
.LBB2_268:                              ; %.preheader1.i.i.i14.i
                                        ;   Parent Loop BB2_199 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v38, v[2:5], s[24:25] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_268
.LBB2_269:                              ; %Flow435
                                        ;   in Loop: Header=BB2_199 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v38, s[24:25] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_271
; %bb.270:                              ;   in Loop: Header=BB2_199 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v37, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[37:38], off offset:8
.LBB2_271:                              ;   in Loop: Header=BB2_199 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_273
; %bb.272:                              ;   in Loop: Header=BB2_199 Depth=1
	global_load_b32 v37, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v37
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[37:38], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_273:                              ; %Flow436
                                        ;   in Loop: Header=BB2_199 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_274:                              ;   Parent Loop BB2_199 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_276
; %bb.275:                              ;   in Loop: Header=BB2_274 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_276:                              ;   in Loop: Header=BB2_274 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_278
; %bb.277:                              ;   in Loop: Header=BB2_274 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_279
.LBB2_278:                              ;   in Loop: Header=BB2_274 Depth=2
	s_mov_b32 s1, -1
.LBB2_279:                              ; %Flow430
                                        ;   in Loop: Header=BB2_274 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_274
; %bb.280:                              ;   in Loop: Header=BB2_199 Depth=1
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_284
; %bb.281:                              ;   in Loop: Header=BB2_199 Depth=1
	s_clause 0x2
	global_load_b64 v[4:5], v38, s[24:25] offset:40
	global_load_b64 v[8:9], v38, s[24:25] offset:24 glc
	global_load_b64 v[6:7], v38, s[24:25]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v38, v[2:5], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_284
; %bb.282:                              ; %.preheader.i.i.i13.i.preheader
                                        ;   in Loop: Header=BB2_199 Depth=1
	s_mov_b32 s0, 0
.LBB2_283:                              ; %.preheader.i.i.i13.i
                                        ;   Parent Loop BB2_199 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v38, v[2:5], s[24:25] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_283
.LBB2_284:                              ; %__ockl_printf_begin.exit17.i
                                        ;   in Loop: Header=BB2_199 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.2@rel32@lo+4
	s_addc_u32 s1, s1, .str.2@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, v48 :: v_dual_mov_b32 v5, v38
	v_mov_b32_e32 v6, 1
	s_mov_b64 s[8:9], s[18:19]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, fileCt@rel32@lo+4
	s_addc_u32 s1, s1, fileCt@rel32@hi+12
	s_add_i32 s28, s28, 1
	global_load_b64 v[0:1], v38, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_u32_e32 vcc_lo, s28, v0
	s_cbranch_vccz .LBB2_199
.LBB2_285:                              ; %Flow496
	s_or_b32 exec_lo, exec_lo, s26
	v_readlane_b32 s30, v40, 4
	v_readlane_b32 s31, v40, 5
	v_readlane_b32 s37, v40, 3
	v_readlane_b32 s36, v40, 2
	v_readlane_b32 s35, v40, 1
	v_readlane_b32 s34, v40, 0
	v_readlane_b32 s0, v40, 6
	s_or_saveexec_b32 s1, -1
	scratch_load_b32 v40, off, s33          ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s1
	s_add_i32 s32, s32, -16
	s_mov_b32 s33, s0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end2:
	.size	_Z4gsysi, .Lfunc_end2-_Z4gsysi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 16212
; NumSgprs: 40
; NumVgprs: 65
; ScratchSize: 16
; MemoryBound: 0
	.text
	.protected	_Z8mykernelPhS_         ; -- Begin function _Z8mykernelPhS_
	.globl	_Z8mykernelPhS_
	.p2align	8
	.type	_Z8mykernelPhS_,@function
_Z8mykernelPhS_:                        ; @_Z8mykernelPhS_
; %bb.0:
	s_load_b128 s[44:47], s[0:1], 0x0
	s_mov_b64 s[38:39], s[0:1]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.5@rel32@lo+4
	s_addc_u32 s1, s1, .str.5@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
	s_mov_b32 s32, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, _Z4openPKci@rel32@lo+4
	s_addc_u32 s3, s3, _Z4openPKci@rel32@hi+12
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, 64
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, volume@rel32@lo+4
	s_addc_u32 s1, s1, volume@rel32@hi+12
	v_mul_lo_u32 v6, v0, 31
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, currentTime@rel32@lo+4
	s_addc_u32 s3, s3, currentTime@rel32@hi+12
	global_load_b64 v[2:3], v1, s[0:1]
	v_lshl_add_u32 v0, v0, 10, 0x9000
	v_ashrrev_i32_e32 v7, 31, v6
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v1 offset:1045
	global_load_b64 v[2:3], v1, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v4 offset:1046
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[0:1]
	global_load_b64 v[4:5], v1, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v4, 24, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v4 offset:1051
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[0:1]
	global_load_b64 v[4:5], v1, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_d16_hi_b8 v[2:3], v4 offset:1052
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[0:1]
	global_load_b64 v[4:5], v1, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v4, 8, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v4 offset:1053
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[0:1]
	global_load_b64 v[4:5], v1, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_b8 v[2:3], v4 offset:1054
	global_load_b64 v[3:4], v1, s[2:3]
	s_mov_b64 s[2:3], 0
	s_waitcnt vmcnt(0)
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, 1, v2
	v_ashrrev_i32_e32 v2, 31, v0
	global_store_b32 v[3:4], v5, off
.LBB3_1:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	s_add_u32 s4, s44, s2
	s_addc_u32 s5, s45, s3
	s_clause 0x1
	global_load_b64 v[3:4], v1, s[0:1]
	global_load_u8 v5, v1, s[4:5]
	s_waitcnt vmcnt(1)
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_add_u32 s2, s2, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v2, vcc_lo
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 64
	flat_store_b8 v[3:4], v5
	s_cbranch_scc1 .LBB3_1
; %bb.2:                                ; %_Z5writePhij.exit
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.6@rel32@lo+4
	s_addc_u32 s1, s1, .str.6@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, _Z4openPKci@rel32@lo+4
	s_addc_u32 s3, s3, _Z4openPKci@rel32@hi+12
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, 32
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, volume@rel32@lo+4
	s_addc_u32 s1, s1, volume@rel32@hi+12
	v_mul_lo_u32 v6, v0, 31
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, currentTime@rel32@lo+4
	s_addc_u32 s3, s3, currentTime@rel32@hi+12
	global_load_b64 v[2:3], v1, s[0:1]
	v_lshl_add_u32 v0, v0, 10, 0x9000
	s_add_u32 s10, s44, 32
	s_addc_u32 s11, s45, 0
	v_ashrrev_i32_e32 v7, 31, v6
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v1 offset:1045
	global_load_b64 v[2:3], v1, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v4 offset:1046
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[0:1]
	global_load_b64 v[4:5], v1, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v4, 24, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v4 offset:1051
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[0:1]
	global_load_b64 v[4:5], v1, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_d16_hi_b8 v[2:3], v4 offset:1052
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[0:1]
	global_load_b64 v[4:5], v1, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v4, 8, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v4 offset:1053
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[0:1]
	global_load_b64 v[4:5], v1, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_b8 v[2:3], v4 offset:1054
	global_load_b64 v[3:4], v1, s[2:3]
	s_mov_b64 s[2:3], 0
	s_waitcnt vmcnt(0)
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, 1, v2
	v_ashrrev_i32_e32 v2, 31, v0
	global_store_b32 v[3:4], v5, off
.LBB3_3:                                ; %.lr.ph.i11
                                        ; =>This Inner Loop Header: Depth=1
	s_add_u32 s4, s10, s2
	s_addc_u32 s5, s11, s3
	s_clause 0x1
	global_load_b64 v[3:4], v1, s[0:1]
	global_load_u8 v5, v1, s[4:5]
	s_waitcnt vmcnt(1)
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_add_u32 s2, s2, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v2, vcc_lo
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 32
	flat_store_b8 v[3:4], v5
	s_cbranch_scc1 .LBB3_3
; %bb.4:                                ; %_Z5writePhij.exit14
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.5@rel32@lo+4
	s_addc_u32 s1, s1, .str.5@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, _Z4openPKci@rel32@lo+4
	s_addc_u32 s3, s3, _Z4openPKci@rel32@hi+12
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, 32
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, volume@rel32@lo+4
	s_addc_u32 s1, s1, volume@rel32@hi+12
	v_mul_lo_u32 v6, v0, 31
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, currentTime@rel32@lo+4
	s_addc_u32 s3, s3, currentTime@rel32@hi+12
	global_load_b64 v[2:3], v1, s[0:1]
	v_lshl_add_u32 v0, v0, 10, 0x9000
	v_ashrrev_i32_e32 v7, 31, v6
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v1 offset:1045
	global_load_b64 v[2:3], v1, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v4 offset:1046
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[0:1]
	global_load_b64 v[4:5], v1, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v4, 24, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v4 offset:1051
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[0:1]
	global_load_b64 v[4:5], v1, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_d16_hi_b8 v[2:3], v4 offset:1052
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[0:1]
	global_load_b64 v[4:5], v1, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v4, 8, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v4 offset:1053
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[0:1]
	global_load_b64 v[4:5], v1, s[2:3]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_b8 v[2:3], v4 offset:1054
	global_load_b64 v[3:4], v1, s[2:3]
	s_mov_b64 s[2:3], 0
	s_waitcnt vmcnt(0)
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, 1, v2
	v_ashrrev_i32_e32 v2, 31, v0
	global_store_b32 v[3:4], v5, off
.LBB3_5:                                ; %.lr.ph.i15
                                        ; =>This Inner Loop Header: Depth=1
	s_add_u32 s4, s10, s2
	s_addc_u32 s5, s11, s3
	s_clause 0x1
	global_load_b64 v[3:4], v1, s[0:1]
	global_load_u8 v5, v1, s[4:5]
	s_waitcnt vmcnt(1)
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_add_u32 s2, s2, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v2, vcc_lo
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 32
	flat_store_b8 v[3:4], v5
	s_cbranch_scc1 .LBB3_5
; %bb.6:                                ; %_Z5writePhij.exit18
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.5@rel32@lo+4
	s_addc_u32 s1, s1, .str.5@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, _Z4openPKci@rel32@lo+4
	s_addc_u32 s3, s3, _Z4openPKci@rel32@hi+12
	s_swappc_b64 s[30:31], s[2:3]
	v_lshl_add_u32 v0, v0, 10, 0x9000
	v_mov_b32_e32 v2, 0
	s_mov_b64 s[0:1], 0
	s_getpc_b64 s[42:43]
	s_add_u32 s42, s42, volume@rel32@lo+4
	s_addc_u32 s43, s43, volume@rel32@hi+12
	v_ashrrev_i32_e32 v1, 31, v0
.LBB3_7:                                ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[3:4], v2, s[42:43]
	s_add_u32 s2, s46, s0
	s_addc_u32 s3, s47, s1
	s_waitcnt vmcnt(0)
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_add_u32 s0, s0, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v1, vcc_lo
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 32
	flat_load_u8 v3, v[3:4]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	global_store_b8 v2, v3, s[2:3]
	s_cbranch_scc1 .LBB3_7
; %bb.8:                                ; %_Z4readPhij.exit
	s_add_u32 s40, s38, 16
	v_mov_b32_e32 v0, 4
	s_addc_u32 s41, s39, 0
	s_getpc_b64 s[46:47]
	s_add_u32 s46, s46, _Z4gsysi@rel32@lo+4
	s_addc_u32 s47, s47, _Z4gsysi@rel32@hi+12
	s_mov_b64 s[8:9], s[40:41]
	s_swappc_b64 s[30:31], s[46:47]
	v_mov_b32_e32 v0, 3
	s_mov_b64 s[8:9], s[40:41]
	s_swappc_b64 s[30:31], s[46:47]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.6@rel32@lo+4
	s_addc_u32 s1, s1, .str.6@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, _Z4openPKci@rel32@lo+4
	s_addc_u32 s3, s3, _Z4openPKci@rel32@hi+12
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, 12
	v_mul_lo_u32 v6, v0, 31
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, currentTime@rel32@lo+4
	s_addc_u32 s1, s1, currentTime@rel32@hi+12
	v_lshl_add_u32 v0, v0, 10, 0x9000
	global_load_b64 v[2:3], v1, s[42:43]
	s_add_u32 s2, s44, 64
	s_addc_u32 s3, s45, 0
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, volume@rel32@lo+4
	s_addc_u32 s7, s7, volume@rel32@hi+12
	v_ashrrev_i32_e32 v7, 31, v6
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v1 offset:1045
	global_load_b64 v[2:3], v1, s[42:43]
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v4 offset:1046
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[42:43]
	global_load_b64 v[4:5], v1, s[0:1]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v4, 24, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v4 offset:1051
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[42:43]
	global_load_b64 v[4:5], v1, s[0:1]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_d16_hi_b8 v[2:3], v4 offset:1052
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[42:43]
	global_load_b64 v[4:5], v1, s[0:1]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v4, 8, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	flat_store_b8 v[2:3], v4 offset:1053
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[42:43]
	global_load_b64 v[4:5], v1, s[0:1]
	s_waitcnt vmcnt(1)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, 0x1000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_b8 v[2:3], v4 offset:1054
	global_load_b64 v[3:4], v1, s[0:1]
	s_mov_b64 s[0:1], 0
	s_waitcnt vmcnt(0)
	global_load_b32 v2, v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, 1, v2
	v_ashrrev_i32_e32 v2, 31, v0
	global_store_b32 v[3:4], v5, off
.LBB3_9:                                ; %.lr.ph.i20
                                        ; =>This Inner Loop Header: Depth=1
	s_add_u32 s4, s2, s0
	s_addc_u32 s5, s3, s1
	s_clause 0x1
	global_load_u8 v5, v1, s[4:5]
	global_load_b64 v[3:4], v1, s[6:7]
	s_waitcnt vmcnt(0)
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_add_u32 s0, s0, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v2, vcc_lo
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 12
	flat_store_b8 v[3:4], v5
	s_cbranch_scc1 .LBB3_9
; %bb.10:                               ; %_Z5writePhij.exit23
	s_add_u32 s40, s38, 16
	v_mov_b32_e32 v0, 3
	s_addc_u32 s41, s39, 0
	s_getpc_b64 s[42:43]
	s_add_u32 s42, s42, _Z4gsysi@rel32@lo+4
	s_addc_u32 s43, s43, _Z4gsysi@rel32@hi+12
	s_mov_b64 s[8:9], s[40:41]
	s_swappc_b64 s[30:31], s[42:43]
	v_mov_b32_e32 v0, 4
	s_mov_b64 s[8:9], s[40:41]
	s_swappc_b64 s[30:31], s[42:43]
	v_mov_b32_e32 v5, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, fileCt@rel32@lo+4
	s_addc_u32 s1, s1, fileCt@rel32@hi+12
	global_load_b64 v[0:1], v5, s[0:1]
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(0)
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v4
	s_cbranch_vccnz .LBB3_18
; %bb.11:                               ; %.preheader19.lr.ph.i.i
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, volume@rel32@lo+4
	s_addc_u32 s3, s3, volume@rel32@hi+12
	s_movk_i32 s4, 0x1400
	global_load_b64 v[2:3], v5, s[2:3]
	s_mov_b32 s5, 0
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v7, vcc_lo, 0x1405, v2
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v3, vcc_lo
.LBB3_12:                               ; %.preheader19.i.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_13 Depth 2
	v_add_co_u32 v6, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_mov_b64 s[2:3], 0
	s_mov_b32 s7, 0
                                        ; implicit-def: $sgpr6
.LBB3_13:                               ; %.lr.ph.i.i.i
                                        ;   Parent Loop BB3_12 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v6, s2
	v_add_co_ci_u32_e32 v11, vcc_lo, s3, v9, vcc_lo
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, .str.5@rel32@lo+4
	s_addc_u32 s9, s9, .str.5@rel32@hi+12
	s_add_u32 s8, s2, s8
	s_addc_u32 s9, s3, s9
	flat_load_u8 v10, v[10:11]
	global_load_i8 v11, v5, s[8:9]
	s_cmp_gt_u32 s2, 3
	s_cselect_b32 s8, -1, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v10, v11
	v_cmp_eq_u32_e64 s0, v10, v11
	s_or_b32 s8, s8, vcc_lo
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	s_and_b32 s8, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s7, s8, s7
	s_and_not1_b32 s6, s6, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s6, s6, s0
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB3_13
; %bb.14:                               ; %_Z13isNameMatchediPKc.exit.i.i
                                        ;   in Loop: Header=BB3_12 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_mul_i32 s0, s5, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s2, s0, 31
	v_add_co_u32 v9, vcc_lo, v7, s0
	v_add_co_ci_u32_e32 v10, vcc_lo, s2, v8, vcc_lo
	s_xor_b32 s2, s6, -1
	s_mov_b32 s0, -1
	flat_load_u8 v6, v[9:10]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 0, v6
	v_mov_b32_e32 v6, s5
	s_or_b32 s3, s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s3
; %bb.15:                               ;   in Loop: Header=BB3_12 Depth=1
	s_add_i32 s5, s5, 1
	v_mov_b32_e32 v6, -1
	v_cmp_eq_u32_e32 vcc_lo, s5, v4
	s_add_i32 s4, s4, 31
	s_or_not1_b32 s0, vcc_lo, exec_lo
; %bb.16:                               ; %Flow97
                                        ;   in Loop: Header=BB3_12 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s0
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB3_12
; %bb.17:                               ; %Flow98
	s_or_b32 exec_lo, exec_lo, s1
	s_branch .LBB3_19
.LBB3_18:
	v_mov_b32_e32 v6, -1
.LBB3_19:                               ; %_Z13isNameMatchediPKc.exit._crit_edge.i.i
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, -1, v4
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, fileCt@rel32@lo+4
	s_addc_u32 s1, s1, fileCt@rel32@hi+12
	s_mov_b32 s4, exec_lo
	global_store_b32 v[0:1], v3, off
	global_load_b64 v[0:1], v2, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v6, v0
	s_cbranch_execz .LBB3_25
; %bb.20:                               ; %.preheader18.i.i
	v_mul_lo_u32 v0, v6, 31
	s_movk_i32 s5, 0x1400
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, fileCt@rel32@lo+4
	s_addc_u32 s3, s3, fileCt@rel32@hi+12
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, volume@rel32@lo+4
	s_addc_u32 s1, s1, volume@rel32@hi+12
.LBB3_21:                               ; =>This Inner Loop Header: Depth=1
	s_clause 0x1
	global_load_b64 v[3:4], v2, s[2:3]
	global_load_b64 v[7:8], v2, s[0:1]
	v_add_nc_u32_e32 v5, s5, v0
	s_waitcnt vmcnt(1)
	global_load_b32 v1, v[3:4], off
	s_waitcnt vmcnt(1)
	global_load_b64 v[3:4], v[7:8], off
	s_waitcnt vmcnt(1)
	v_mul_lo_u32 v1, v1, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v1, s5, v1
	s_add_i32 s5, s5, 1
	s_cmpk_eq_i32 s5, 0x141f
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, vcc_lo, v3, v1
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, v3, v5
	flat_load_u8 v1, v[7:8]
	v_ashrrev_i32_e32 v7, 31, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v7, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b8 v[3:4], v1
	s_cbranch_scc0 .LBB3_21
; %bb.22:                               ; %.preheader.i.i
	v_mov_b32_e32 v2, 0
	s_clause 0x1
	global_load_b64 v[0:1], v2, s[2:3]
	global_load_b64 v[3:4], v2, s[0:1]
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(1)
	global_load_b32 v5, v[0:1], off
	s_waitcnt vmcnt(1)
	global_load_b64 v[0:1], v[3:4], off
	s_waitcnt vmcnt(1)
	v_mul_lo_u32 v3, 0x1400, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, 0x1415, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v1, vcc_lo
	flat_load_u8 v3, v[3:4]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 0, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_25
; %bb.23:                               ; %.lr.ph.i.i
	v_lshl_add_u32 v3, v6, 10, 0x9000
	s_mov_b64 s[0:1], 0
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, fileCt@rel32@lo+4
	s_addc_u32 s7, s7, fileCt@rel32@hi+12
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, volume@rel32@lo+4
	s_addc_u32 s9, s9, volume@rel32@hi+12
	v_ashrrev_i32_e32 v4, 31, v3
.LBB3_24:                               ; =>This Inner Loop Header: Depth=1
	v_lshlrev_b32_e32 v5, 10, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, s0, v5
	v_add_nc_u32_e32 v5, 0x9000, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v5, vcc_lo, v0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	flat_load_u8 v5, v[5:6]
	v_add_co_u32 v0, vcc_lo, v0, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v4, vcc_lo
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b8 v[0:1], v5
	s_clause 0x1
	global_load_b64 v[0:1], v2, s[6:7]
	global_load_b64 v[6:7], v2, s[8:9]
	s_waitcnt vmcnt(1)
	global_load_b32 v5, v[0:1], off
	s_waitcnt vmcnt(1)
	global_load_b64 v[0:1], v[6:7], off
	s_waitcnt vmcnt(1)
	v_mul_lo_u32 v6, 0x1400, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, 0x1415, v6
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v1, vcc_lo
	flat_load_u8 v6, v[6:7]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ge_u32_e32 vcc_lo, s0, v6
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB3_24
.LBB3_25:                               ; %Flow96
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v0, 3
	s_add_u32 s8, s38, 16
	s_addc_u32 s9, s39, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _Z4gsysi@rel32@lo+4
	s_addc_u32 s1, s1, _Z4gsysi@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8mykernelPhS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 16
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 65
		.amdhsa_next_free_sgpr 48
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z8mykernelPhS_, .Lfunc_end3-_Z8mykernelPhS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4524
; NumSgprs: 50
; NumVgprs: 65
; ScratchSize: 16
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 6
; VGPRBlocks: 8
; NumSGPRsForWavesPerEU: 50
; NumVGPRsForWavesPerEU: 65
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	currentTime.managed     ; @currentTime.managed
	.type	currentTime.managed,@object
	.section	.bss,"aw",@nobits
	.globl	currentTime.managed
	.p2align	2, 0x0
currentTime.managed:
	.long	0                               ; 0x0
	.size	currentTime.managed, 4

	.protected	fileCt.managed          ; @fileCt.managed
	.type	fileCt.managed,@object
	.globl	fileCt.managed
	.p2align	2, 0x0
fileCt.managed:
	.long	0                               ; 0x0
	.size	fileCt.managed, 4

	.protected	volume.managed          ; @volume.managed
	.type	volume.managed,@object
	.globl	volume.managed
	.p2align	3, 0x0
volume.managed:
	.quad	0
	.size	volume.managed, 8

	.type	.str,@object                    ; @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.str:
	.asciz	"===sort by modified time===\n"
	.size	.str, 29

	.type	.str.1,@object                  ; @.str.1
.str.1:
	.asciz	"%c"
	.size	.str.1, 3

	.type	.str.2,@object                  ; @.str.2
.str.2:
	.asciz	"\n"
	.size	.str.2, 2

	.type	.str.3,@object                  ; @.str.3
.str.3:
	.asciz	"===sort by file size===\n"
	.size	.str.3, 25

	.type	.str.4,@object                  ; @.str.4
.str.4:
	.asciz	" %d\n"
	.size	.str.4, 5

	.type	.str.5,@object                  ; @.str.5
	.section	.rodata,"a",@progbits
.str.5:
	.asciz	"t.txt\000"
	.size	.str.5, 7

	.type	.str.6,@object                  ; @.str.6
.str.6:
	.asciz	"b.txt\000"
	.size	.str.6, 7

	.protected	currentTime             ; @currentTime
	.type	currentTime,@object
	.section	.bss,"aw",@nobits
	.globl	currentTime
	.p2align	3, 0x0
currentTime:
	.quad	0
	.size	currentTime, 8

	.protected	fileCt                  ; @fileCt
	.type	fileCt,@object
	.globl	fileCt
	.p2align	3, 0x0
fileCt:
	.quad	0
	.size	fileCt, 8

	.protected	volume                  ; @volume
	.type	volume,@object
	.globl	volume
	.p2align	3, 0x0
volume:
	.quad	0
	.size	volume, 8

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym currentTime.managed
	.addrsig_sym fileCt.managed
	.addrsig_sym volume.managed
	.addrsig_sym currentTime
	.addrsig_sym fileCt
	.addrsig_sym volume
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         96
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8mykernelPhS_
    .private_segment_fixed_size: 16
    .sgpr_count:     50
    .sgpr_spill_count: 0
    .symbol:         _Z8mykernelPhS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     65
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
