#include<stdio.h>
#include<math.h>
#include<cuda.h>

__global__ void matMul(int *d_a,int *d_b,int *d_c, int M, int N, int K){
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col= blockIdx.x * blockDim.x + threadIdx.x;

	if(row<M && col<K){
		int sum=d_a[row*N]*d_b[col];
		for(int k=1;k<N;k++){
			sum+=d_a[row*N+k]*d_b[k*K+col];
		}
		d_c[row*K + col]=sum;
	}
}

int main(int argc, char const *argv[]) {
	int N=8,M=10,K=9,TW=4;
	int h_a[M][N],h_b[N][K],h_c[M][K];
	int *d_a,*d_b,*d_c;

	for(int i=0;i<M;i++){
		for(int j=0;j<N;j++){
			h_a[i][j]=rand()%100;
		}
	}
	for(int i=0;i<N;i++){
		for(int j=0;j<K;j++){
			h_b[i][j]=rand()%100;
		}
	}

	printf("\n A Matrix\n" );
	for(int i=0;i<M;i++){
		for(int j=0;j<N;j++){
			printf("%d ",h_a[i][j] );
		}
		printf("\n" );
	}
	printf("\n B Matrix\n" );
	for(int i=0;i<N;i++){
		for(int j=0;j<K;j++){
			printf("%d ",h_b[i][j] );
		}
		printf("\n" );
	}

	// taking block diamension as M X M
	dim3 dimBlock(TW,TW);
	dim3 dimGrid((int)((M-1)/TW)+1,(int)((K-1)/TW)+1,1 );

	// allocating device memory
	cudaMalloc(&d_a, M*N*sizeof(int));
	cudaMalloc(&d_b, N*K*sizeof(int));
	cudaMalloc(&d_c, M*K*sizeof(int));


	// copying data in device memory
	cudaMemcpy( d_a, h_a, M*N*sizeof(int), cudaMemcpyHostToDevice   );
	cudaMemcpy( d_b, h_b, N*K*sizeof(int), cudaMemcpyHostToDevice   );

	//calling kernel function

	matMul<<<dimGrid,dimBlock>>>(d_a,d_b,d_c,M,N,K);

	cudaMemcpy(h_c, d_c, M*K*sizeof(int), cudaMemcpyDeviceToHost  );

	printf("\n Multiplication of A and B Matrix:\n" );
	for(int i=0;i<M;i++){
		for(int j=0;j<K;j++){
			printf("%d ",h_c[i][j] );
		}
		printf("\n" );
	}
	cudaFree(d_a);
	cudaFree(d_b);
	cudaFree(d_c);

	return 0;
}

	.file	"tmpxft_002a4242_00000000-6_Matrix_Multiplication_Cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z32__device_stub__Z6matMulPiS_S_iiiPiS_S_iii
	.type	_Z32__device_stub__Z6matMulPiS_S_iiiPiS_S_iii, @function
_Z32__device_stub__Z6matMulPiS_S_iiiPiS_S_iii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z6matMulPiS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z32__device_stub__Z6matMulPiS_S_iiiPiS_S_iii, .-_Z32__device_stub__Z6matMulPiS_S_iiiPiS_S_iii
	.globl	_Z6matMulPiS_S_iii
	.type	_Z6matMulPiS_S_iii, @function
_Z6matMulPiS_S_iii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z6matMulPiS_S_iiiPiS_S_iii
	.cfi_endproc
.LFE2053:
	.size	_Z6matMulPiS_S_iii, .-_Z6matMulPiS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\n A Matrix\n"
.LC1:
	.string	"%d "
.LC2:
	.string	"\n"
.LC3:
	.string	"\n B Matrix\n"
.LC4:
	.string	"\n Multiplication of A and B Matrix:\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$104, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	movq	%rsp, %rax
.L9:
	cmpq	%rax, %rsp
	je	.L10
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L9
.L10:
	subq	$320, %rsp
	orq	$0, 312(%rsp)
	movq	%rsp, %rbx
	movq	%rsp, %rax
.L12:
	cmpq	%rax, %rsp
	je	.L13
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L12
.L13:
	subq	$288, %rsp
	orq	$0, 280(%rsp)
	movq	%rsp, -120(%rbp)
	movq	%rsp, %rax
.L15:
	cmpq	%rax, %rsp
	je	.L16
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L15
.L16:
	subq	$368, %rsp
	orq	$0, 360(%rsp)
	movq	%rsp, -128(%rbp)
	movq	%rbx, %r13
	leaq	320(%rbx), %r15
	movq	%rbx, %r12
.L18:
	xorl	%r14d, %r14d
.L19:
	call	rand@PLT
	movl	$100, %ecx
	cltd
	idivl	%ecx
	movl	%edx, (%r12,%r14,4)
	incq	%r14
	cmpq	$8, %r14
	jne	.L19
	addq	$32, %r12
	cmpq	%r15, %r12
	jne	.L18
	movq	-120(%rbp), %r12
	leaq	288(%r12), %r14
	movq	%r12, %rsi
.L20:
	xorl	%ecx, %ecx
.L21:
	movq	%rsi, -144(%rbp)
	movq	%rcx, -136(%rbp)
	call	rand@PLT
	movl	$100, %ecx
	movq	-144(%rbp), %rsi
	cltd
	idivl	%ecx
	movq	-136(%rbp), %rcx
	movl	%edx, (%rsi,%rcx,4)
	incq	%rcx
	cmpq	$9, %rcx
	jne	.L21
	addq	$36, %rsi
	cmpq	%r14, %rsi
	jne	.L20
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L23:
	xorl	%ecx, %ecx
.L24:
	movl	0(%r13,%rcx,4), %edx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%rcx, -136(%rbp)
	call	__printf_chk@PLT
	movq	-136(%rbp), %rcx
	incq	%rcx
	cmpq	$8, %rcx
	jne	.L24
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$32, %r13
	call	__printf_chk@PLT
	cmpq	%r15, %r13
	jne	.L23
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L26:
	xorl	%r13d, %r13d
.L27:
	movl	(%r12,%r13,4), %edx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r13
	call	__printf_chk@PLT
	cmpq	$9, %r13
	jne	.L27
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$36, %r12
	call	__printf_chk@PLT
	cmpq	%r14, %r12
	jne	.L26
	leaq	-104(%rbp), %rdi
	movl	$320, %esi
	movabsq	$17179869188, %rax
	movl	$1, -72(%rbp)
	movq	%rax, -80(%rbp)
	movabsq	$12884901891, %rax
	movq	%rax, -68(%rbp)
	movl	$1, -60(%rbp)
	call	cudaMalloc@PLT
	leaq	-96(%rbp), %rdi
	movl	$288, %esi
	call	cudaMalloc@PLT
	leaq	-88(%rbp), %rdi
	movl	$360, %esi
	call	cudaMalloc@PLT
	movq	-104(%rbp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$320, %edx
	call	cudaMemcpy@PLT
	movq	-120(%rbp), %rsi
	movq	-96(%rbp), %rdi
	movl	$1, %ecx
	movl	$288, %edx
	call	cudaMemcpy@PLT
	movl	-72(%rbp), %ecx
	movq	-80(%rbp), %rdx
	xorl	%r9d, %r9d
	movq	-68(%rbp), %rdi
	movl	-60(%rbp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	-88(%rbp), %rdx
	movq	-96(%rbp), %rsi
	movl	$9, %r9d
	movl	$8, %r8d
	movq	-104(%rbp), %rdi
	movl	$10, %ecx
	call	_Z32__device_stub__Z6matMulPiS_S_iiiPiS_S_iii
.L29:
	movq	-88(%rbp), %rsi
	movq	-128(%rbp), %rdi
	movl	$2, %ecx
	movl	$360, %edx
	call	cudaMemcpy@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	-128(%rbp), %rbx
	leaq	360(%rbx), %r13
.L30:
	xorl	%r12d, %r12d
.L31:
	movl	(%rbx,%r12,4), %edx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r12
	call	__printf_chk@PLT
	cmpq	$9, %r12
	jne	.L31
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$36, %rbx
	call	__printf_chk@PLT
	cmpq	%r13, %rbx
	jne	.L30
	movq	-104(%rbp), %rdi
	call	cudaFree@PLT
	movq	-96(%rbp), %rdi
	call	cudaFree@PLT
	movq	-88(%rbp), %rdi
	call	cudaFree@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z6matMulPiS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6matMulPiS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<stdio.h>
#include<math.h>
#include<hip/hip_runtime.h>

__global__ void matMul(int *d_a,int *d_b,int *d_c, int M, int N, int K){
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col= blockIdx.x * blockDim.x + threadIdx.x;

	if(row<M && col<K){
		int sum=d_a[row*N]*d_b[col];
		for(int k=1;k<N;k++){
			sum+=d_a[row*N+k]*d_b[k*K+col];
		}
		d_c[row*K + col]=sum;
	}
}

int main(int argc, char const *argv[]) {
	int N=8,M=10,K=9,TW=4;
	int h_a[M][N],h_b[N][K],h_c[M][K];
	int *d_a,*d_b,*d_c;

	for(int i=0;i<M;i++){
		for(int j=0;j<N;j++){
			h_a[i][j]=rand()%100;
		}
	}
	for(int i=0;i<N;i++){
		for(int j=0;j<K;j++){
			h_b[i][j]=rand()%100;
		}
	}

	printf("\n A Matrix\n" );
	for(int i=0;i<M;i++){
		for(int j=0;j<N;j++){
			printf("%d ",h_a[i][j] );
		}
		printf("\n" );
	}
	printf("\n B Matrix\n" );
	for(int i=0;i<N;i++){
		for(int j=0;j<K;j++){
			printf("%d ",h_b[i][j] );
		}
		printf("\n" );
	}

	// taking block diamension as M X M
	dim3 dimBlock(TW,TW);
	dim3 dimGrid((int)((M-1)/TW)+1,(int)((K-1)/TW)+1,1 );

	// allocating device memory
	hipMalloc(&d_a, M*N*sizeof(int));
	hipMalloc(&d_b, N*K*sizeof(int));
	hipMalloc(&d_c, M*K*sizeof(int));


	// copying data in device memory
	hipMemcpy( d_a, h_a, M*N*sizeof(int), hipMemcpyHostToDevice   );
	hipMemcpy( d_b, h_b, N*K*sizeof(int), hipMemcpyHostToDevice   );

	//calling kernel function

	matMul<<<dimGrid,dimBlock>>>(d_a,d_b,d_c,M,N,K);

	hipMemcpy(h_c, d_c, M*K*sizeof(int), hipMemcpyDeviceToHost  );

	printf("\n Multiplication of A and B Matrix:\n" );
	for(int i=0;i<M;i++){
		for(int j=0;j<K;j++){
			printf("%d ",h_c[i][j] );
		}
		printf("\n" );
	}
	hipFree(d_a);
	hipFree(d_b);
	hipFree(d_c);

	return 0;
}

	.text
	.file	"Matrix_Multiplication_Cuda.hip"
	.globl	_Z21__device_stub__matMulPiS_S_iii # -- Begin function _Z21__device_stub__matMulPiS_S_iii
	.type	_Z21__device_stub__matMulPiS_S_iii,@function
_Z21__device_stub__matMulPiS_S_iii:     # @_Z21__device_stub__matMulPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6matMulPiS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__matMulPiS_S_iii, .Lfunc_end0-_Z21__device_stub__matMulPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$1008, %rsp                     # imm = 0x3F0
	.cfi_def_cfa_offset 1040
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	320(%rsp), %rbx
	xorl	%r14d, %r14d
.LBB1_1:                                # %.preheader95
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorl	%r15d, %r15d
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	$8, %r15
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%r14
	addq	$32, %rbx
	cmpq	$10, %r14
	jne	.LBB1_1
# %bb.4:                                # %.preheader93.preheader
	leaq	32(%rsp), %rbx
	xorl	%r14d, %r14d
.LBB1_5:                                # %.preheader93
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_6 Depth 2
	xorl	%r15d, %r15d
.LBB1_6:                                #   Parent Loop BB1_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	$9, %r15
	jne	.LBB1_6
# %bb.7:                                #   in Loop: Header=BB1_5 Depth=1
	incq	%r14
	addq	$36, %rbx
	cmpq	$8, %r14
	jne	.LBB1_5
# %bb.8:
	movl	$.Lstr, %edi
	callq	puts@PLT
	leaq	320(%rsp), %rbx
	xorl	%r14d, %r14d
.LBB1_9:                                # %.preheader92
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_10 Depth 2
	xorl	%r15d, %r15d
.LBB1_10:                               #   Parent Loop BB1_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	$8, %r15
	jne	.LBB1_10
# %bb.11:                               #   in Loop: Header=BB1_9 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$32, %rbx
	cmpq	$10, %r14
	jne	.LBB1_9
# %bb.12:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	leaq	32(%rsp), %rbx
	xorl	%r14d, %r14d
.LBB1_13:                               # %.preheader91
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_14 Depth 2
	xorl	%r15d, %r15d
.LBB1_14:                               #   Parent Loop BB1_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	$9, %r15
	jne	.LBB1_14
# %bb.15:                               #   in Loop: Header=BB1_13 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$36, %rbx
	cmpq	$8, %r14
	jne	.LBB1_13
# %bb.16:
	leaq	24(%rsp), %rbx
	movl	$320, %esi                      # imm = 0x140
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r14
	movl	$288, %esi                      # imm = 0x120
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$360, %esi                      # imm = 0x168
	callq	hipMalloc
	movq	(%rbx), %rdi
	leaq	320(%rsp), %rsi
	movl	$320, %edx                      # imm = 0x140
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	leaq	32(%rsp), %rsi
	movl	$288, %edx                      # imm = 0x120
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$12884901891, %rdi              # imm = 0x300000003
	movabsq	$17179869188, %rdx              # imm = 0x400000004
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_18
# %bb.17:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$10, %ecx
	movl	$8, %r8d
	movl	$9, %r9d
	callq	_Z21__device_stub__matMulPiS_S_iii
.LBB1_18:
	movq	8(%rsp), %rsi
	leaq	640(%rsp), %rbx
	movl	$360, %edx                      # imm = 0x168
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	xorl	%r14d, %r14d
.LBB1_19:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_20 Depth 2
	xorl	%r15d, %r15d
.LBB1_20:                               #   Parent Loop BB1_19 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	$9, %r15
	jne	.LBB1_20
# %bb.21:                               #   in Loop: Header=BB1_19 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$36, %rbx
	cmpq	$10, %r14
	jne	.LBB1_19
# %bb.22:
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$1008, %rsp                     # imm = 0x3F0
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6matMulPiS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6matMulPiS_S_iii,@object      # @_Z6matMulPiS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z6matMulPiS_S_iii
	.p2align	3, 0x0
_Z6matMulPiS_S_iii:
	.quad	_Z21__device_stub__matMulPiS_S_iii
	.size	_Z6matMulPiS_S_iii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%d "
	.size	.L.str.1, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6matMulPiS_S_iii"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n A Matrix"
	.size	.Lstr, 11

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\n B Matrix"
	.size	.Lstr.1, 11

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\n Multiplication of A and B Matrix:"
	.size	.Lstr.2, 36

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__matMulPiS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6matMulPiS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6matMulPiS_S_iii      ; -- Begin function _Z6matMulPiS_S_iii
	.globl	_Z6matMulPiS_S_iii
	.p2align	8
	.type	_Z6matMulPiS_S_iii,@function
_Z6matMulPiS_S_iii:                     ; @_Z6matMulPiS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s6, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_5
; %bb.1:
	s_load_b128 s[8:11], s[0:1], 0x0
	v_mul_lo_u32 v3, v0, s5
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s5, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s8, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v4, vcc_lo
	v_add_co_u32 v9, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v6, vcc_lo
	global_load_b32 v2, v[7:8], off
	global_load_b32 v7, v[9:10], off
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v7, v2
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	v_add_co_u32 v3, vcc_lo, v3, s8
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 4
	s_lshl_b64 s[2:3], s[6:7], 2
	s_add_i32 s4, s5, -1
	s_add_u32 s5, s10, s2
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_addc_u32 s7, s11, s3
	v_add_co_u32 v5, vcc_lo, s5, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v9, v[3:4], off
	global_load_b32 v10, v[5:6], off
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, v5, s2
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	s_add_i32 s4, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s4, 0
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v10, v9, v[2:3]
	v_mov_b32_e32 v2, v7
	s_cbranch_scc0 .LBB0_3
.LBB0_4:                                ; %Flow59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v0, s6, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6matMulPiS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6matMulPiS_S_iii, .Lfunc_end0-_Z6matMulPiS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 424
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6matMulPiS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6matMulPiS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
