#include <iostream>
#include <cuda_runtime.h>
#include <cuda_fp16.h>

// Define constants for the convolutional neural network
#define BATCH_SIZE 64
#define INPUT_CHANNELS 3
#define OUTPUT_CHANNELS 64
#define FILTER_SIZE 3
#define IMAGE_SIZE 224
#define NUM_LAYERS 5

// CUDA kernel for backpropagation in a convolutional layer
__global__ void convBackpropKernel(float* d_outputGrad, float* d_inputGrad, float* d_filtersGrad, float* d_input, float* d_filters, int batchSize, int inputChannels, int outputChannels, int filterSize, int imageSize) {
    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int tz = threadIdx.z;
    int bx = blockIdx.x;
    int by = blockIdx.y;
    int bz = blockIdx.z;

    int n = bz;
    int oc = ty;
    int h = by * blockDim.y + ty;
    int w = bx * blockDim.x + tx;

    if (n >= batchSize || h >= imageSize || w >= imageSize) return;

    float sum = 0.0f;
    for (int ic = 0; ic < inputChannels; ++ic) {
        for (int fh = 0; fh < filterSize; ++fh) {
            for (int fw = 0; fw < filterSize; ++fw) {
                int ih = h + fh - filterSize / 2;
                int iw = w + fw - filterSize / 2;
                if (ih >= 0 && ih < imageSize && iw >= 0 && iw < imageSize) {
                    int inputIndex = n * inputChannels * imageSize * imageSize + ic * imageSize * imageSize + ih * imageSize + iw;
                    int filterIndex = oc * inputChannels * filterSize * filterSize + ic * filterSize * filterSize + fh * filterSize + fw;
                    int outputIndex = n * outputChannels * imageSize * imageSize + oc * imageSize * imageSize + h * imageSize + w;
                    sum += d_filters[filterIndex] * d_outputGrad[outputIndex];
                    atomicAdd(&d_filtersGrad[filterIndex], d_input[inputIndex] * d_outputGrad[outputIndex]);
                }
            }
        }
    }
    int inputGradIndex = n * inputChannels * imageSize * imageSize + tz * imageSize * imageSize + h * imageSize + w;
    d_inputGrad[inputGradIndex] = sum;
}

// Function to initialize data
void initData(float* data, int size) {
    for (int i = 0; i < size; ++i) {
        data[i] = static_cast<float>(rand()) / RAND_MAX;
    }
}

int main() {
    // Allocate memory on host
    int inputSize = BATCH_SIZE * INPUT_CHANNELS * IMAGE_SIZE * IMAGE_SIZE;
    int outputSize = BATCH_SIZE * OUTPUT_CHANNELS * IMAGE_SIZE * IMAGE_SIZE;
    int filterSize = OUTPUT_CHANNELS * INPUT_CHANNELS * FILTER_SIZE * FILTER_SIZE;

    float* h_input = new float[inputSize];
    float* h_outputGrad = new float[outputSize];
    float* h_filters = new float[filterSize];
    float* h_inputGrad = new float[inputSize];
    float* h_filtersGrad = new float[filterSize];

    // Initialize data on host
    initData(h_input, inputSize);
    initData(h_outputGrad, outputSize);
    initData(h_filters, filterSize);

    // Allocate memory on device
    float* d_input, *d_outputGrad, *d_filters, *d_inputGrad, *d_filtersGrad;
    cudaMalloc(&d_input, inputSize * sizeof(float));
    cudaMalloc(&d_outputGrad, outputSize * sizeof(float));
    cudaMalloc(&d_filters, filterSize * sizeof(float));
    cudaMalloc(&d_inputGrad, inputSize * sizeof(float));
    cudaMalloc(&d_filtersGrad, filterSize * sizeof(float));

    // Copy data from host to device
    cudaMemcpy(d_input, h_input, inputSize * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_outputGrad, h_outputGrad, outputSize * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_filters, h_filters, filterSize * sizeof(float), cudaMemcpyHostToDevice);

    // Define grid and block dimensions
    dim3 blockSize(16, 16, 1);
    dim3 gridSize((IMAGE_SIZE + blockSize.x - 1) / blockSize.x, (IMAGE_SIZE + blockSize.y - 1) / blockSize.y, BATCH_SIZE);

    // Launch kernel for each layer
    for (int layer = 0; layer < NUM_LAYERS; ++layer) {
        convBackpropKernel<<<gridSize, blockSize>>>(d_outputGrad, d_inputGrad, d_filtersGrad, d_input, d_filters, BATCH_SIZE, INPUT_CHANNELS, OUTPUT_CHANNELS, FILTER_SIZE, IMAGE_SIZE);
        cudaDeviceSynchronize();

        // Check for errors
        cudaError_t err = cudaGetLastError();
        if (err != cudaSuccess) {
            std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
            return -1;
        }

        // Swap input and output for the next layer
        std::swap(d_input, d_inputGrad);
        std::swap(h_input, h_inputGrad);
    }

    // Copy results back to host
    cudaMemcpy(h_inputGrad, d_inputGrad, inputSize * sizeof(float), cudaMemcpyDeviceToHost);
    cudaMemcpy(h_filtersGrad, d_filtersGrad, filterSize * sizeof(float), cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_input);
    cudaFree(d_outputGrad);
    cudaFree(d_filters);
    cudaFree(d_inputGrad);
    cudaFree(d_filtersGrad);

    // Free host memory
    delete[] h_input;
    delete[] h_outputGrad;
    delete[] h_filters;
    delete[] h_inputGrad;
    delete[] h_filtersGrad;

    return 0;
}
	.file	"tmpxft_0002646a_00000000-6_cuda_code_085761.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4014:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4014:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8initDataPfi
	.type	_Z8initDataPfi, @function
_Z8initDataPfi:
.LFB4009:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L3:
	cmpl	%ebx, %ebp
	jle	.L7
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L3
.L7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4009:
	.size	_Z8initDataPfi, .-_Z8initDataPfi
	.globl	_Z51__device_stub__Z18convBackpropKernelPfS_S_S_S_iiiiiPfS_S_S_S_iiiii
	.type	_Z51__device_stub__Z18convBackpropKernelPfS_S_S_S_iiiiiPfS_S_S_S_iiiii, @function
_Z51__device_stub__Z18convBackpropKernelPfS_S_S_S_iiiiiPfS_S_S_S_iiiii:
.LFB4036:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	64(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z18convBackpropKernelPfS_S_S_S_iiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 240
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L8:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4036:
	.size	_Z51__device_stub__Z18convBackpropKernelPfS_S_S_S_iiiiiPfS_S_S_S_iiiii, .-_Z51__device_stub__Z18convBackpropKernelPfS_S_S_S_iiiiiPfS_S_S_S_iiiii
	.globl	_Z18convBackpropKernelPfS_S_S_S_iiiii
	.type	_Z18convBackpropKernelPfS_S_S_S_iiiii, @function
_Z18convBackpropKernelPfS_S_S_S_iiiii:
.LFB4037:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z18convBackpropKernelPfS_S_S_S_iiiiiPfS_S_S_S_iiiii
	.cfi_endproc
.LFE4037:
	.size	_Z18convBackpropKernelPfS_S_S_S_iiiii, .-_Z18convBackpropKernelPfS_S_S_S_iiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"CUDA error: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4010:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$38535168, %edi
	movabsq	$68719476752, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	$5, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$822083584, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movl	$6912, %edi
	movq	%rax, %r13
	call	_Znam@PLT
	movl	$38535168, %edi
	movq	%rax, (%rsp)
	call	_Znam@PLT
	movl	$6912, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movl	$9633792, %esi
	movq	%rbx, %rdi
	movq	%rax, 8(%rsp)
	call	_Z8initDataPfi
	movl	$205520896, %esi
	movq	%r13, %rdi
	call	_Z8initDataPfi
	movq	(%rsp), %rdi
	movl	$1728, %esi
	call	_Z8initDataPfi
	leaq	24(%rsp), %rdi
	movl	$38535168, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$822083584, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$6912, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$38535168, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$6912, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$38535168, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$822083584, %edx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movl	$6912, %edx
	call	cudaMemcpy@PLT
	movl	$1, 72(%rsp)
	movabsq	$60129542158, %rax
	movq	%rax, 76(%rsp)
	movl	$64, 84(%rsp)
.L17:
	movl	72(%rsp), %ecx
	movq	76(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	84(%rsp), %esi
	movq	%r15, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	$224
	.cfi_def_cfa_offset 168
	movl	$64, %r9d
	pushq	$3
	.cfi_def_cfa_offset 176
	pushq	$64
	.cfi_def_cfa_offset 184
	pushq	$3
	.cfi_def_cfa_offset 192
	movq	72(%rsp), %r8
	movq	56(%rsp), %rcx
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	64(%rsp), %rdi
	call	_Z51__device_stub__Z18convBackpropKernelPfS_S_S_S_iiiiiPfS_S_S_S_iiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 160
.L14:
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L15
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L13
.L15:
	movq	24(%rsp), %rsi
	movq	48(%rsp), %rax
	movq	%rsi, 48(%rsp)
	movq	%rax, 24(%rsp)
	decl	%r14d
	je	.L29
	xchgq	%rbp, %rbx
	jmp	.L17
.L29:
	movl	$2, %ecx
	movl	$38535168, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$6912, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	testq	%rbp, %rbp
	je	.L18
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
.L18:
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	movq	(%rsp), %rdi
	call	_ZdaPv@PLT
	testq	%rbx, %rbx
	je	.L19
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
.L19:
	movq	8(%rsp), %rdi
	call	_ZdaPv@PLT
	xorl	%eax, %eax
.L13:
	movq	88(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4010:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z18convBackpropKernelPfS_S_S_S_iiiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4039:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18convBackpropKernelPfS_S_S_S_iiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4039:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_fp16.h>

// Define constants for the convolutional neural network
#define BATCH_SIZE 64
#define INPUT_CHANNELS 3
#define OUTPUT_CHANNELS 64
#define FILTER_SIZE 3
#define IMAGE_SIZE 224
#define NUM_LAYERS 5

// CUDA kernel for backpropagation in a convolutional layer
__global__ void convBackpropKernel(float* d_outputGrad, float* d_inputGrad, float* d_filtersGrad, float* d_input, float* d_filters, int batchSize, int inputChannels, int outputChannels, int filterSize, int imageSize) {
    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int tz = threadIdx.z;
    int bx = blockIdx.x;
    int by = blockIdx.y;
    int bz = blockIdx.z;

    int n = bz;
    int oc = ty;
    int h = by * blockDim.y + ty;
    int w = bx * blockDim.x + tx;

    if (n >= batchSize || h >= imageSize || w >= imageSize) return;

    float sum = 0.0f;
    for (int ic = 0; ic < inputChannels; ++ic) {
        for (int fh = 0; fh < filterSize; ++fh) {
            for (int fw = 0; fw < filterSize; ++fw) {
                int ih = h + fh - filterSize / 2;
                int iw = w + fw - filterSize / 2;
                if (ih >= 0 && ih < imageSize && iw >= 0 && iw < imageSize) {
                    int inputIndex = n * inputChannels * imageSize * imageSize + ic * imageSize * imageSize + ih * imageSize + iw;
                    int filterIndex = oc * inputChannels * filterSize * filterSize + ic * filterSize * filterSize + fh * filterSize + fw;
                    int outputIndex = n * outputChannels * imageSize * imageSize + oc * imageSize * imageSize + h * imageSize + w;
                    sum += d_filters[filterIndex] * d_outputGrad[outputIndex];
                    atomicAdd(&d_filtersGrad[filterIndex], d_input[inputIndex] * d_outputGrad[outputIndex]);
                }
            }
        }
    }
    int inputGradIndex = n * inputChannels * imageSize * imageSize + tz * imageSize * imageSize + h * imageSize + w;
    d_inputGrad[inputGradIndex] = sum;
}

// Function to initialize data
void initData(float* data, int size) {
    for (int i = 0; i < size; ++i) {
        data[i] = static_cast<float>(rand()) / RAND_MAX;
    }
}

int main() {
    // Allocate memory on host
    int inputSize = BATCH_SIZE * INPUT_CHANNELS * IMAGE_SIZE * IMAGE_SIZE;
    int outputSize = BATCH_SIZE * OUTPUT_CHANNELS * IMAGE_SIZE * IMAGE_SIZE;
    int filterSize = OUTPUT_CHANNELS * INPUT_CHANNELS * FILTER_SIZE * FILTER_SIZE;

    float* h_input = new float[inputSize];
    float* h_outputGrad = new float[outputSize];
    float* h_filters = new float[filterSize];
    float* h_inputGrad = new float[inputSize];
    float* h_filtersGrad = new float[filterSize];

    // Initialize data on host
    initData(h_input, inputSize);
    initData(h_outputGrad, outputSize);
    initData(h_filters, filterSize);

    // Allocate memory on device
    float* d_input, *d_outputGrad, *d_filters, *d_inputGrad, *d_filtersGrad;
    hipMalloc(&d_input, inputSize * sizeof(float));
    hipMalloc(&d_outputGrad, outputSize * sizeof(float));
    hipMalloc(&d_filters, filterSize * sizeof(float));
    hipMalloc(&d_inputGrad, inputSize * sizeof(float));
    hipMalloc(&d_filtersGrad, filterSize * sizeof(float));

    // Copy data from host to device
    hipMemcpy(d_input, h_input, inputSize * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_outputGrad, h_outputGrad, outputSize * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_filters, h_filters, filterSize * sizeof(float), hipMemcpyHostToDevice);

    // Define grid and block dimensions
    dim3 blockSize(16, 16, 1);
    dim3 gridSize((IMAGE_SIZE + blockSize.x - 1) / blockSize.x, (IMAGE_SIZE + blockSize.y - 1) / blockSize.y, BATCH_SIZE);

    // Launch kernel for each layer
    for (int layer = 0; layer < NUM_LAYERS; ++layer) {
        convBackpropKernel<<<gridSize, blockSize>>>(d_outputGrad, d_inputGrad, d_filtersGrad, d_input, d_filters, BATCH_SIZE, INPUT_CHANNELS, OUTPUT_CHANNELS, FILTER_SIZE, IMAGE_SIZE);
        hipDeviceSynchronize();

        // Check for errors
        hipError_t err = hipGetLastError();
        if (err != hipSuccess) {
            std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
            return -1;
        }

        // Swap input and output for the next layer
        std::swap(d_input, d_inputGrad);
        std::swap(h_input, h_inputGrad);
    }

    // Copy results back to host
    hipMemcpy(h_inputGrad, d_inputGrad, inputSize * sizeof(float), hipMemcpyDeviceToHost);
    hipMemcpy(h_filtersGrad, d_filtersGrad, filterSize * sizeof(float), hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_input);
    hipFree(d_outputGrad);
    hipFree(d_filters);
    hipFree(d_inputGrad);
    hipFree(d_filtersGrad);

    // Free host memory
    delete[] h_input;
    delete[] h_outputGrad;
    delete[] h_filters;
    delete[] h_inputGrad;
    delete[] h_filtersGrad;

    return 0;
}
	.text
	.file	"cuda_code_085761.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__convBackpropKernelPfS_S_S_S_iiiii # -- Begin function _Z33__device_stub__convBackpropKernelPfS_S_S_S_iiiii
	.type	_Z33__device_stub__convBackpropKernelPfS_S_S_S_iiiii,@function
_Z33__device_stub__convBackpropKernelPfS_S_S_S_iiiii: # @_Z33__device_stub__convBackpropKernelPfS_S_S_S_iiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18convBackpropKernelPfS_S_S_S_iiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__convBackpropKernelPfS_S_S_S_iiiii, .Lfunc_end0-_Z33__device_stub__convBackpropKernelPfS_S_S_S_iiiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z8initDataPfi
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z8initDataPfi
	.type	_Z8initDataPfi,@function
_Z8initDataPfi:                         # @_Z8initDataPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB1_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_4:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z8initDataPfi, .Lfunc_end1-_Z8initDataPfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$38535168, %edi                 # imm = 0x24C0000
	callq	_Znam
	movq	%rax, %r13
	movl	$822083584, %edi                # imm = 0x31000000
	callq	_Znam
	movq	%rax, %rbx
	movl	$6912, %edi                     # imm = 0x1B00
	callq	_Znam
	movq	%rax, %r12
	movl	$38535168, %edi                 # imm = 0x24C0000
	callq	_Znam
	movq	%rax, %r15
	movl	$6912, %edi                     # imm = 0x1B00
	callq	_Znam
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
.LBB2_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movss	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r13,%r14,4)
	incq	%r14
	cmpq	$9633792, %r14                  # imm = 0x930000
	jne	.LBB2_1
# %bb.2:                                # %.lr.ph.i46.preheader
	xorl	%r14d, %r14d
.LBB2_3:                                # %.lr.ph.i46
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r14,4)
	incq	%r14
	cmpq	$205520896, %r14                # imm = 0xC400000
	jne	.LBB2_3
# %bb.4:                                # %.lr.ph.i51.preheader
	xorl	%r14d, %r14d
.LBB2_5:                                # %.lr.ph.i51
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	%xmm0, (%r12,%r14,4)
	incq	%r14
	cmpq	$1728, %r14                     # imm = 0x6C0
	jne	.LBB2_5
# %bb.6:                                # %_Z8initDataPfi.exit55
	leaq	16(%rsp), %r14
	movl	$38535168, %esi                 # imm = 0x24C0000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	40(%rsp), %rbp
	movl	$822083584, %esi                # imm = 0x31000000
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$6912, %esi                     # imm = 0x1B00
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$38535168, %esi                 # imm = 0x24C0000
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$6912, %esi                     # imm = 0x1B00
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$38535168, %edx                 # imm = 0x24C0000
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$822083584, %edx                # imm = 0x31000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %rax
	movq	(%rax), %rdi
	movl	$6912, %edx                     # imm = 0x1B00
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$5, %r14d
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	movq	%r15, %rbp
	movq	%r13, %r15
	movabsq	$60129542158, %rdi              # imm = 0xE0000000E
	movl	$64, %esi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_9
# %bb.8:                                #   in Loop: Header=BB2_7 Depth=1
	movq	40(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	movq	32(%rsp), %r8
	movl	$64, %r9d
	pushq	$224
	.cfi_adjust_cfa_offset 8
	movl	$3, %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	$64
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z33__device_stub__convBackpropKernelPfS_S_S_S_iiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB2_9:                                #   in Loop: Header=BB2_7 Depth=1
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.14:                               #   in Loop: Header=BB2_7 Depth=1
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	%rsi, 8(%rsp)
	movq	%rbp, %r13
	decl	%r14d
	jne	.LBB2_7
# %bb.15:
	movl	$38535168, %edx                 # imm = 0x24C0000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movl	$6912, %edx                     # imm = 0x1B00
	movq	48(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	testq	%rbp, %rbp
	je	.LBB2_17
# %bb.16:
	movq	%rbp, %rdi
	callq	_ZdaPv
.LBB2_17:
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r12, %rdi
	callq	_ZdaPv
	testq	%r15, %r15
	je	.LBB2_19
# %bb.18:
	movq	%r15, %rdi
	callq	_ZdaPv
.LBB2_19:
	movq	%r14, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	jmp	.LBB2_20
.LBB2_10:
	movl	%eax, %r13d
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r13d, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB2_11
# %bb.12:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_13
.LBB2_11:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_13:
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB2_20:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18convBackpropKernelPfS_S_S_S_iiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18convBackpropKernelPfS_S_S_S_iiiii,@object # @_Z18convBackpropKernelPfS_S_S_S_iiiii
	.section	.rodata,"a",@progbits
	.globl	_Z18convBackpropKernelPfS_S_S_S_iiiii
	.p2align	3, 0x0
_Z18convBackpropKernelPfS_S_S_S_iiiii:
	.quad	_Z33__device_stub__convBackpropKernelPfS_S_S_S_iiiii
	.size	_Z18convBackpropKernelPfS_S_S_S_iiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18convBackpropKernelPfS_S_S_S_iiiii"
	.size	.L__unnamed_1, 38

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__convBackpropKernelPfS_S_S_S_iiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18convBackpropKernelPfS_S_S_S_iiiii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18convBackpropKernelPfS_S_S_S_iiiii ; -- Begin function _Z18convBackpropKernelPfS_S_S_S_iiiii
	.globl	_Z18convBackpropKernelPfS_S_S_S_iiiii
	.p2align	8
	.type	_Z18convBackpropKernelPfS_S_S_S_iiiii,@function
_Z18convBackpropKernelPfS_S_S_S_iiiii:  ; @_Z18convBackpropKernelPfS_S_S_S_iiiii
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b32 s3, s[0:1], 0x38
	s_load_b128 s[16:19], s[0:1], 0x28
	v_bfe_u32 v4, v0, 10, 10
	v_and_b32_e32 v5, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s14, s4, v[4:5]
	v_mad_u64_u32 v[2:3], null, s13, s2, v[5:6]
	s_cmp_lt_i32 s15, s16
	s_cselect_b32 s4, -1, 0
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e64 s2, s3, v2
	s_and_b32 s4, s4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_19
; %bb.1:                                ; %.preheader111
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x20
	s_cmp_gt_i32 s17, 0
	s_mov_b32 s0, 0
	s_cbranch_scc1 .LBB0_3
; %bb.2:                                ; %.preheader111.._crit_edge120_crit_edge
	s_mul_i32 s14, s15, s17
	s_mov_b32 s1, 0
	s_branch .LBB0_4
.LBB0_3:
	s_mov_b32 s0, -1
                                        ; implicit-def: $sgpr1
                                        ; implicit-def: $sgpr14
.LBB0_4:                                ; %Flow160
	v_mov_b32_e32 v9, s1
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_18
; %bb.5:                                ; %.preheader110.lr.ph
	v_mad_u64_u32 v[5:6], null, s15, s18, v[4:5]
	s_cmp_gt_i32 s19, 0
	v_mul_lo_u32 v10, v4, s17
	s_cselect_b32 s16, -1, 0
	s_lshr_b32 s0, s19, 31
	v_mov_b32_e32 v9, 0
	s_add_i32 s0, s19, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[6:7], null, v5, s3, v[1:2]
	s_ashr_i32 s0, s0, 1
	s_mul_i32 s14, s15, s17
	v_subrev_nc_u32_e32 v11, s0, v1
	v_subrev_nc_u32_e32 v12, s0, v2
	v_mad_u64_u32 v[7:8], null, v6, s3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[3:4], 2, v[7:8]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s4, 0
.LBB0_6:                                ; %.preheader110
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_8 Depth 2
                                        ;       Child Loop BB0_9 Depth 3
                                        ;         Child Loop BB0_12 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_17
; %bb.7:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB0_6 Depth=1
	v_add_nc_u32_e32 v5, s4, v10
	s_add_i32 s5, s4, s14
	s_mov_b32 s15, 0
	s_mul_i32 s5, s5, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v13, v5, s19
.LBB0_8:                                ; %.preheader
                                        ;   Parent Loop BB0_6 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_9 Depth 3
                                        ;         Child Loop BB0_12 Depth 4
	v_add_nc_u32_e32 v5, s15, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, s15, v13
	s_mov_b32 s18, 0
	v_add_nc_u32_e32 v6, s5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v15, v7, s19
	v_cmp_lt_i32_e32 vcc_lo, -1, v5
	v_cmp_gt_i32_e64 s0, s3, v5
	v_mul_lo_u32 v14, v6, s3
.LBB0_9:                                ;   Parent Loop BB0_6 Depth=1
                                        ;     Parent Loop BB0_8 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_12 Depth 4
	s_and_saveexec_b32 s20, vcc_lo
	s_cbranch_execz .LBB0_15
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=3
	v_add_nc_u32_e32 v5, s18, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e64 s1, -1, v5
	v_cmp_gt_i32_e64 s2, s3, v5
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_14
; %bb.11:                               ;   in Loop: Header=BB0_9 Depth=3
	global_load_b32 v18, v[3:4], off
	v_add_nc_u32_e32 v6, s18, v15
	v_add_nc_u32_e32 v16, v5, v14
	s_mov_b32 s21, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v17, 31, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[6:7]
	v_lshlrev_b64 v[7:8], 2, v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v16, s1, s12, v5
	v_add_co_ci_u32_e64 v17, s1, s13, v6, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s1, s10, v7
	v_add_co_ci_u32_e64 v8, s1, s11, v8, s1
	v_add_co_u32 v5, s1, s8, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s1, s9, v6, s1
	global_load_b32 v16, v[16:17], off
	global_load_b32 v7, v[7:8], off
	global_load_b32 v8, v[5:6], off
	s_waitcnt vmcnt(1)
	v_dual_fmac_f32 v9, v16, v18 :: v_dual_mul_f32 v16, v18, v7
.LBB0_12:                               ; %atomicrmw.start
                                        ;   Parent Loop BB0_6 Depth=1
                                        ;     Parent Loop BB0_8 Depth=2
                                        ;       Parent Loop BB0_9 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_f32_e32 v7, v8, v16
	global_atomic_cmpswap_b32 v7, v[5:6], v[7:8], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s1, v7, v8
	v_mov_b32_e32 v8, v7
	s_or_b32 s21, s1, s21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s21
	s_cbranch_execnz .LBB0_12
; %bb.13:                               ; %Flow
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_or_b32 exec_lo, exec_lo, s21
.LBB0_14:                               ; %Flow156
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_15:                               ;   in Loop: Header=BB0_9 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s20
	s_add_i32 s18, s18, 1
	s_cmp_eq_u32 s18, s19
	s_cbranch_scc0 .LBB0_9
; %bb.16:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_add_i32 s15, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s19
	s_cbranch_scc0 .LBB0_8
.LBB0_17:                               ; %._crit_edge116
                                        ;   in Loop: Header=BB0_6 Depth=1
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s4, s17
	s_cbranch_scc0 .LBB0_6
.LBB0_18:                               ; %._crit_edge120
	v_bfe_u32 v0, v0, 20, 10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, s14, v0
	v_mad_u64_u32 v[3:4], null, v0, s3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v3, s3, v[2:3]
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v9, off
.LBB0_19:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18convBackpropKernelPfS_S_S_S_iiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18convBackpropKernelPfS_S_S_S_iiiii, .Lfunc_end0-_Z18convBackpropKernelPfS_S_S_S_iiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 800
; NumSgprs: 24
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18convBackpropKernelPfS_S_S_S_iiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z18convBackpropKernelPfS_S_S_S_iiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
