#include <iostream>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>

#define NUM_NODES 128
#define MAX_DEGREE 8 // Assuming maximum degree of a node is 8

// Graph data structure
struct Graph {
    int* edges; // Adjacency list
    int* degrees; // Degree of each node
};

// Kernel to perform graph coloring
__global__ void graphColoringKernel(int* colors, int* edges, int* degrees) {
    extern __shared__ int sharedColors[];
    int tid = threadIdx.x + blockIdx.x * blockDim.x;

    if (tid >= NUM_NODES) return;

    int currentColor = 0;
    bool availableColors[MAX_DEGREE + 1] = {false};

    // Initialize available colors to true
    for (int i = 0; i <= degrees[tid]; ++i) {
        availableColors[i] = true;
    }

    // Mark colors of adjacent nodes as false
    for (int i = 0; i < degrees[tid]; ++i) {
        int neighbor = edges[tid * MAX_DEGREE + i];
        if (neighbor < NUM_NODES) {
            int neighborColor = sharedColors[neighbor];
            availableColors[neighborColor] = false;
        }
    }

    // Find the first available color
    while (currentColor <= degrees[tid] && !availableColors[currentColor]) {
        ++currentColor;
    }

    // Assign color to the current node
    colors[tid] = currentColor;
    sharedColors[tid] = currentColor;
}

// Host function to initialize graph
void initializeGraph(Graph& g, int* edges, int* degrees) {
    cudaMallocManaged(&g.edges, NUM_NODES * MAX_DEGREE * sizeof(int));
    cudaMallocManaged(&g.degrees, NUM_NODES * sizeof(int));

    // Example graph initialization (fully connected for simplicity)
    for (int i = 0; i < NUM_NODES; ++i) {
        degrees[i] = MAX_DEGREE;
        for (int j = 0; j < MAX_DEGREE; ++j) {
            edges[i * MAX_DEGREE + j] = (i + j + 1) % NUM_NODES;
        }
    }

    cudaMemcpy(g.edges, edges, NUM_NODES * MAX_DEGREE * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(g.degrees, degrees, NUM_NODES * sizeof(int), cudaMemcpyHostToDevice);
}

// Main function
int main() {
    Graph g;
    int edges[NUM_NODES * MAX_DEGREE];
    int degrees[NUM_NODES];
    int* colors;
    cudaError_t err;

    // Initialize graph
    initializeGraph(g, edges, degrees);

    // Allocate memory for colors
    cudaMallocManaged(&colors, NUM_NODES * sizeof(int));

    // Launch kernel
    int blockSize = 128;
    int numBlocks = (NUM_NODES + blockSize - 1) / blockSize;
    graphColoringKernel<<<numBlocks, blockSize, NUM_NODES * sizeof(int)>>>(colors, g.edges, g.degrees);

    // Synchronize and check for errors
    err = cudaDeviceSynchronize();
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Print colors
    std::cout << "Node colors:" << std::endl;
    for (int i = 0; i < NUM_NODES; ++i) {
        std::cout << "Node " << i << ": Color " << colors[i] << std::endl;
    }

    // Free memory
    cudaFree(g.edges);
    cudaFree(g.degrees);
    cudaFree(colors);

    return 0;
}
	.file	"tmpxft_00032791_00000000-6_cuda_code_026089.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z15initializeGraphR5GraphPiS1_
	.type	_Z15initializeGraphR5GraphPiS1_, @function
_Z15initializeGraphR5GraphPiS1_:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r12
	movl	$4096, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	movl	$1, %edx
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	call	cudaMallocManaged@PLT
	leaq	8(%rbx), %rdi
	movl	$1, %edx
	movl	$512, %esi
	call	cudaMallocManaged@PLT
	xorl	%eax, %eax
.L4:
	movq	%rax, %rcx
	movl	$8, 0(%rbp,%rax,4)
	movl	%eax, %edi
	movl	$1, %edx
	salq	$5, %rcx
	addq	%r12, %rcx
.L3:
	leal	(%rdi,%rdx), %esi
	andl	$127, %esi
	movl	%esi, -4(%rcx,%rdx,4)
	incq	%rdx
	cmpq	$9, %rdx
	jne	.L3
	incq	%rax
	cmpq	$128, %rax
	jne	.L4
	movq	(%rbx), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	movl	$4096, %edx
	call	cudaMemcpy@PLT
	movq	8(%rbx), %rdi
	movq	%rbp, %rsi
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	$1, %ecx
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$512, %edx
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	cudaMemcpy@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z15initializeGraphR5GraphPiS1_, .-_Z15initializeGraphR5GraphPiS1_
	.globl	_Z43__device_stub__Z19graphColoringKernelPiS_S_PiS_S_
	.type	_Z43__device_stub__Z19graphColoringKernelPiS_S_PiS_S_, @function
_Z43__device_stub__Z19graphColoringKernelPiS_S_PiS_S_:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z19graphColoringKernelPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L9:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z43__device_stub__Z19graphColoringKernelPiS_S_PiS_S_, .-_Z43__device_stub__Z19graphColoringKernelPiS_S_PiS_S_
	.globl	_Z19graphColoringKernelPiS_S_
	.type	_Z19graphColoringKernelPiS_S_, @function
_Z19graphColoringKernelPiS_S_:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z19graphColoringKernelPiS_S_PiS_S_
	.cfi_endproc
.LFE3662:
	.size	_Z19graphColoringKernelPiS_S_, .-_Z19graphColoringKernelPiS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error: "
.LC1:
	.string	"Node colors:"
.LC2:
	.string	"Node "
.LC3:
	.string	": Color "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$4096, %rsp
	.cfi_def_cfa_offset 4128
	orq	$0, (%rsp)
	subq	$576, %rsp
	.cfi_def_cfa_offset 4704
	movq	%fs:40, %rax
	movq	%rax, 4664(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rdx
	leaq	568(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	_Z15initializeGraphR5GraphPiS1_
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	movl	$512, %esi
	call	cudaMallocManaged@PLT
	movl	$33554433, %edx
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rdi
	salq	$7, %rdx
	movl	$512, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z43__device_stub__Z19graphColoringKernelPiS_S_PiS_S_
.L15:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L16
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L14
.L16:
	leaq	_ZSt4cout(%rip), %rbp
	leaq	.LC1(%rip), %rsi
	xorl	%ebx, %ebx
	movq	%rbp, %rdi
	leaq	.LC2(%rip), %r12
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L18:
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	8(%rsp), %rax
	movl	(%rax,%rbx,4), %esi
	incq	%rbx
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpq	$128, %rbx
	jne	.L18
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L14:
	movq	4664(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$4672, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z19graphColoringKernelPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z19graphColoringKernelPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>


#define NUM_NODES 128
#define MAX_DEGREE 8 // Assuming maximum degree of a node is 8

// Graph data structure
struct Graph {
    int* edges; // Adjacency list
    int* degrees; // Degree of each node
};

// Kernel to perform graph coloring
__global__ void graphColoringKernel(int* colors, int* edges, int* degrees) {
    extern __shared__ int sharedColors[];
    int tid = threadIdx.x + blockIdx.x * blockDim.x;

    if (tid >= NUM_NODES) return;

    int currentColor = 0;
    bool availableColors[MAX_DEGREE + 1] = {false};

    // Initialize available colors to true
    for (int i = 0; i <= degrees[tid]; ++i) {
        availableColors[i] = true;
    }

    // Mark colors of adjacent nodes as false
    for (int i = 0; i < degrees[tid]; ++i) {
        int neighbor = edges[tid * MAX_DEGREE + i];
        if (neighbor < NUM_NODES) {
            int neighborColor = sharedColors[neighbor];
            availableColors[neighborColor] = false;
        }
    }

    // Find the first available color
    while (currentColor <= degrees[tid] && !availableColors[currentColor]) {
        ++currentColor;
    }

    // Assign color to the current node
    colors[tid] = currentColor;
    sharedColors[tid] = currentColor;
}

// Host function to initialize graph
void initializeGraph(Graph& g, int* edges, int* degrees) {
    hipMallocManaged(&g.edges, NUM_NODES * MAX_DEGREE * sizeof(int));
    hipMallocManaged(&g.degrees, NUM_NODES * sizeof(int));

    // Example graph initialization (fully connected for simplicity)
    for (int i = 0; i < NUM_NODES; ++i) {
        degrees[i] = MAX_DEGREE;
        for (int j = 0; j < MAX_DEGREE; ++j) {
            edges[i * MAX_DEGREE + j] = (i + j + 1) % NUM_NODES;
        }
    }

    hipMemcpy(g.edges, edges, NUM_NODES * MAX_DEGREE * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(g.degrees, degrees, NUM_NODES * sizeof(int), hipMemcpyHostToDevice);
}

// Main function
int main() {
    Graph g;
    int edges[NUM_NODES * MAX_DEGREE];
    int degrees[NUM_NODES];
    int* colors;
    hipError_t err;

    // Initialize graph
    initializeGraph(g, edges, degrees);

    // Allocate memory for colors
    hipMallocManaged(&colors, NUM_NODES * sizeof(int));

    // Launch kernel
    int blockSize = 128;
    int numBlocks = (NUM_NODES + blockSize - 1) / blockSize;
    graphColoringKernel<<<numBlocks, blockSize, NUM_NODES * sizeof(int)>>>(colors, g.edges, g.degrees);

    // Synchronize and check for errors
    err = hipDeviceSynchronize();
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Print colors
    std::cout << "Node colors:" << std::endl;
    for (int i = 0; i < NUM_NODES; ++i) {
        std::cout << "Node " << i << ": Color " << colors[i] << std::endl;
    }

    // Free memory
    hipFree(g.edges);
    hipFree(g.degrees);
    hipFree(colors);

    return 0;
}
	.text
	.file	"cuda_code_026089.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z34__device_stub__graphColoringKernelPiS_S_ # -- Begin function _Z34__device_stub__graphColoringKernelPiS_S_
	.type	_Z34__device_stub__graphColoringKernelPiS_S_,@function
_Z34__device_stub__graphColoringKernelPiS_S_: # @_Z34__device_stub__graphColoringKernelPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19graphColoringKernelPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z34__device_stub__graphColoringKernelPiS_S_, .Lfunc_end0-_Z34__device_stub__graphColoringKernelPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z15initializeGraphR5GraphPiS1_ # -- Begin function _Z15initializeGraphR5GraphPiS1_
	.type	_Z15initializeGraphR5GraphPiS1_,@function
_Z15initializeGraphR5GraphPiS1_:        # @_Z15initializeGraphR5GraphPiS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r15
	movq	%rdi, %r14
	movl	$4096, %esi                     # imm = 0x1000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%r14), %rdi
	movl	$512, %esi                      # imm = 0x200
	movl	$1, %edx
	callq	hipMallocManaged
	movl	$1, %eax
	xorl	%ecx, %ecx
	movq	%r15, %rdx
.LBB1_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	movl	$8, (%rbx,%rcx,4)
	incq	%rcx
	xorl	%esi, %esi
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rax,%rsi), %edi
	andl	$127, %edi
	movl	%edi, (%rdx,%rsi,4)
	incq	%rsi
	cmpq	$8, %rsi
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	addq	$32, %rdx
	incq	%rax
	cmpq	$128, %rcx
	jne	.LBB1_1
# %bb.4:
	movq	(%r14), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%r14), %rdi
	movl	$512, %edx                      # imm = 0x200
	movq	%rbx, %rsi
	movl	$1, %ecx
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipMemcpy                       # TAILCALL
.Lfunc_end1:
	.size	_Z15initializeGraphR5GraphPiS1_, .Lfunc_end1-_Z15initializeGraphR5GraphPiS1_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$4648, %rsp                     # imm = 0x1228
	.cfi_def_cfa_offset 4672
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rsp), %rdi
	leaq	544(%rsp), %rsi
	leaq	32(%rsp), %rdx
	callq	_Z15initializeGraphR5GraphPiS1_
	leaq	8(%rsp), %rdi
	movl	$512, %esi                      # imm = 0x200
	movl	$1, %edx
	callq	hipMallocManaged
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	127(%rdi), %rdx
	movl	$512, %r8d                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdx
	callq	_Z34__device_stub__graphColoringKernelPiS_S_
.LBB2_2:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	je	.LBB2_7
# %bb.3:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB2_4
# %bb.5:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_6
.LBB2_7:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%ebx, %ebx
.LBB2_8:                                # =>This Inner Loop Header: Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$8, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	8(%rsp), %rax
	movl	(%rax,%rbx,4), %esi
	movq	%r14, %rdi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%rbx
	cmpq	$128, %rbx
	jne	.LBB2_8
# %bb.9:
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	jmp	.LBB2_10
.LBB2_4:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_6:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB2_10:
	addq	$4648, %rsp                     # imm = 0x1228
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19graphColoringKernelPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z19graphColoringKernelPiS_S_,@object # @_Z19graphColoringKernelPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z19graphColoringKernelPiS_S_
	.p2align	3, 0x0
_Z19graphColoringKernelPiS_S_:
	.quad	_Z34__device_stub__graphColoringKernelPiS_S_
	.size	_Z19graphColoringKernelPiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Node colors:"
	.size	.L.str.1, 13

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Node "
	.size	.L.str.2, 6

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	": Color "
	.size	.L.str.3, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z19graphColoringKernelPiS_S_"
	.size	.L__unnamed_1, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z34__device_stub__graphColoringKernelPiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z19graphColoringKernelPiS_S_
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z19graphColoringKernelPiS_S_ ; -- Begin function _Z19graphColoringKernelPiS_S_
	.globl	_Z19graphColoringKernelPiS_S_
	.p2align	8
	.type	_Z19graphColoringKernelPiS_S_,@function
_Z19graphColoringKernelPiS_S_:          ; @_Z19graphColoringKernelPiS_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x80, v1
	s_cbranch_execz .LBB0_14
; %bb.1:                                ; %.preheader39
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v6, 0
	v_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v13, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v9, 0
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v11, 0
	v_mov_b32_e32 v14, 0
	s_mov_b32 s10, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
	s_mov_b32 s3, exec_lo
	global_load_b32 v0, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 -1, v0
	s_cbranch_execz .LBB0_5
; %bb.2:                                ; %.lr.ph.preheader
	v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v4, 1, v0
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v13, 0
	v_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v9, 0
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, 0
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v14, 0
	s_mov_b64 s[8:9], 0
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s8, 5
	v_and_b32_e32 v5, 0xff, v13
	v_lshlrev_b16 v9, 8, v9
	v_and_b32_e32 v11, 0xff, v11
	v_lshlrev_b16 v13, 8, v14
	s_cselect_b32 vcc_lo, -1, 0
	v_and_b32_e32 v8, 0xff, v8
	v_lshlrev_b16 v10, 8, v10
	v_lshlrev_b16 v12, 8, v12
	v_and_b32_e32 v7, 0xff, v7
	v_or_b32_e32 v11, v11, v13
	v_or_b32_e32 v9, v8, v9
	v_or_b32_e32 v5, v5, v10
	v_and_b32_e32 v10, 0xffff, v12
	v_or_b32_e32 v12, v7, v12
	v_lshlrev_b32_e32 v13, 16, v11
	v_and_b32_e32 v8, 0xffff, v9
	v_lshlrev_b32_e32 v7, 16, v5
	s_cmp_lg_u32 s8, 3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v14, 24, v13
	v_or_b32_e32 v8, v8, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_or_b32_e32 v10, v10, v7
	s_cselect_b32 s0, -1, 0
	s_cmp_lg_u32 s8, 4
	v_lshrrev_b32_e32 v13, 8, v8
	v_lshrrev_b64 v[7:8], 24, v[7:8]
	s_cselect_b32 s1, -1, 0
	s_cmp_lg_u32 s8, 0
	v_cndmask_b32_e64 v8, 1, v9, s1
	v_cndmask_b32_e32 v9, 1, v13, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_lg_u32 s8, 6
	v_lshrrev_b32_e32 v15, 8, v10
	v_cndmask_b32_e64 v10, 1, v7, s0
	v_cndmask_b32_e32 v7, 1, v12, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_lg_u32 s8, 2
	v_cndmask_b32_e32 v11, 1, v11, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_lg_u32 s8, 7
	v_cndmask_b32_e32 v13, 1, v5, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_lg_u32 s8, 1
	v_cndmask_b32_e64 v14, 1, v14, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_lg_u32 s8, 8
	v_cndmask_b32_e64 v12, 1, v15, s1
	s_cselect_b32 s2, -1, 0
	s_add_u32 s8, s8, 1
	v_cndmask_b32_e64 v6, 1, v6, s2
	v_cmp_eq_u32_e32 vcc_lo, s8, v4
	s_addc_u32 s9, s9, 0
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_3
; %bb.4:                                ; %Flow69
	s_or_b32 exec_lo, exec_lo, s10
.LBB0_5:                                ; %Flow70
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_mov_b32 s2, 0
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_i32_e32 0, v0
	s_cbranch_execz .LBB0_11
; %bb.6:                                ; %.lr.ph48
	v_dual_mov_b32 v15, v0 :: v_dual_lshlrev_b32 v4, 3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
.LBB0_7:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v16, v[4:5], off
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i32_e32 0x80, v16
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=1
	v_lshl_add_u32 v16, v16, 2, 0
	ds_load_b32 v16, v16
	s_waitcnt lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 3, v16
	v_cndmask_b32_e32 v10, 0, v10, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 2, v16
	v_cndmask_b32_e32 v13, 0, v13, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 1, v16
	v_cndmask_b32_e32 v12, 0, v12, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v16
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 4, v16
	v_cndmask_b32_e32 v8, 0, v8, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 5, v16
	v_cndmask_b32_e32 v9, 0, v9, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 6, v16
	v_cndmask_b32_e32 v11, 0, v11, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 7, v16
	v_cndmask_b32_e32 v14, 0, v14, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 8, v16
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
.LBB0_9:                                ;   in Loop: Header=BB0_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v15, -1, v15
	v_add_co_u32 v4, s0, v4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
	v_cmp_eq_u32_e32 vcc_lo, 0, v15
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_7
; %bb.10:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_11:                               ; %Flow68
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b64 s[2:3], 0
	s_mov_b32 s1, 0
.LBB0_12:                               ; =>This Inner Loop Header: Depth=1
	s_cmp_eq_u32 s2, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 2
	v_cndmask_b32_e32 v4, v7, v12, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, v4, v13, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 4
	v_cndmask_b32_e32 v4, v4, v10, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, v4, v8, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 6
	v_cndmask_b32_e32 v4, v4, v9, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, v4, v11, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 8
	v_cndmask_b32_e32 v4, v4, v14, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v4, v6, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	v_and_b32_e32 v4, 0xff, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u16_e64 s0, 0, v4
	s_or_b32 s0, vcc_lo, s0
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	s_and_b32 s0, exec_lo, s0
	v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v4, s2
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_12
; %bb.13:                               ; %.critedge
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_nc_u32_e32 v0, -1, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	v_lshl_add_u32 v1, v1, 2, 0
	global_store_b32 v[2:3], v0, off
	ds_store_b32 v1, v0
.LBB0_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19graphColoringKernelPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z19graphColoringKernelPiS_S_, .Lfunc_end0-_Z19graphColoringKernelPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 996
; NumSgprs: 18
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19graphColoringKernelPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19graphColoringKernelPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
