#include <iostream>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>

// Define the ELLPACK matrix structure
typedef struct {
    int* values;
    int* col_indices;
    int max_cols;
    int rows;
} ELLMatrix;

// Kernel for sparse matrix-matrix multiplication in ELL format
__global__ void ellmm_kernel(const ELLMatrix A, const ELLMatrix B, int* C, int width) {
    // Calculate row and column indices
    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;

    // Initialize the result for this thread
    int sum = 0;

    // Perform the multiplication
    if (row < A.rows && col < width) {
        for (int k = 0; k < A.max_cols; ++k) {
            int a_val = A.values[row * A.max_cols + k];
            int a_col = A.col_indices[row * A.max_cols + k];
            int b_val = B.values[a_col * B.max_cols + col];
            sum += a_val * b_val;
        }
        // Write the result to the output matrix
        C[row * width + col] = sum;
    }
}

// Function to allocate and initialize an ELL matrix
ELLMatrix create_ell_matrix(int rows, int max_cols, int* values, int* col_indices) {
    ELLMatrix matrix;
    cudaMalloc((void**)&matrix.values, rows * max_cols * sizeof(int));
    cudaMalloc((void**)&matrix.col_indices, rows * max_cols * sizeof(int));
    cudaMemcpy(matrix.values, values, rows * max_cols * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(matrix.col_indices, col_indices, rows * max_cols * sizeof(int), cudaMemcpyHostToDevice);
    matrix.max_cols = max_cols;
    matrix.rows = rows;
    return matrix;
}

// Function to free an ELL matrix
void free_ell_matrix(ELLMatrix matrix) {
    cudaFree(matrix.values);
    cudaFree(matrix.col_indices);
}

int main() {
    // Example matrices in ELL format
    int A_values[] = {1, 0, 2, 0, 3, 0, 0, 4, 5, 0, 6, 0};
    int A_col_indices[] = {0, 2, 0, 2, 1, 3, 0, 2, 0, 2, 1, 3};
    int B_values[] = {7, 0, 8, 0, 9, 0, 0, 10, 11, 0, 12, 0};
    int B_col_indices[] = {0, 2, 0, 2, 1, 3, 0, 2, 0, 2, 1, 3};

    int rows = 3;
    int max_cols = 4;
    int width = 3;

    // Create ELL matrices
    ELLMatrix A = create_ell_matrix(rows, max_cols, A_values, A_col_indices);
    ELLMatrix B = create_ell_matrix(max_cols, max_cols, B_values, B_col_indices);

    // Allocate memory for the result matrix
    int* C;
    cudaMalloc((void**)&C, rows * width * sizeof(int));

    // Define block and grid sizes
    dim3 blockSize(16, 16);
    dim3 gridSize((width + blockSize.x - 1) / blockSize.x, (rows + blockSize.y - 1) / blockSize.y);

    // Launch the kernel
    ellmm_kernel<<<gridSize, blockSize>>>(A, B, C, width);

    // Check for errors in kernel launch
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Kernel launch failed: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Synchronize device
    cudaDeviceSynchronize();

    // Copy the result back to the host
    int* h_C = new int[rows * width];
    cudaMemcpy(h_C, C, rows * width * sizeof(int), cudaMemcpyDeviceToHost);

    // Print the result matrix
    std::cout << "Result Matrix C:" << std::endl;
    for (int i = 0; i < rows; ++i) {
        for (int j = 0; j < width; ++j) {
            std::cout << h_C[i * width + j] << " ";
        }
        std::cout << std::endl;
    }

    // Free memory
    delete[] h_C;
    free_ell_matrix(A);
    free_ell_matrix(B);
    cudaFree(C);

    return 0;
}
	.file	"tmpxft_000c1bb1_00000000-6_cuda_code_000683.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z17create_ell_matrixiiPiS_
	.type	_Z17create_ell_matrixiiPiS_, @function
_Z17create_ell_matrixiiPiS_:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rcx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%esi, %ebp
	imull	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	pushq	%rax
	.cfi_def_cfa_offset 64
	movslq	%ebp, %rbp
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	8(%rbx), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	(%rbx), %rdi
	movq	%rbp, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rbx), %rdi
	movq	%rbp, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r13d, 16(%rbx)
	movq	%rbx, %rax
	movl	%r12d, 20(%rbx)
	popq	%rdx
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z17create_ell_matrixiiPiS_, .-_Z17create_ell_matrixiiPiS_
	.globl	_Z15free_ell_matrix9ELLMatrix
	.type	_Z15free_ell_matrix9ELLMatrix, @function
_Z15free_ell_matrix9ELLMatrix:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE3636:
	.size	_Z15free_ell_matrix9ELLMatrix, .-_Z15free_ell_matrix9ELLMatrix
	.globl	_Z45__device_stub__Z12ellmm_kernel9ELLMatrixS_PiiRK9ELLMatrixS1_Pii
	.type	_Z45__device_stub__Z12ellmm_kernel9ELLMatrixS_PiiRK9ELLMatrixS1_Pii, @function
_Z45__device_stub__Z12ellmm_kernel9ELLMatrixS_PiiRK9ELLMatrixS1_Pii:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdx, 8(%rsp)
	leaq	24(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	32(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rsi, 96(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12ellmm_kernel9ELLMatrixS_Pii(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L6:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z45__device_stub__Z12ellmm_kernel9ELLMatrixS_PiiRK9ELLMatrixS1_Pii, .-_Z45__device_stub__Z12ellmm_kernel9ELLMatrixS_PiiRK9ELLMatrixS1_Pii
	.globl	_Z12ellmm_kernel9ELLMatrixS_Pii
	.type	_Z12ellmm_kernel9ELLMatrixS_Pii, @function
_Z12ellmm_kernel9ELLMatrixS_Pii:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdi, %rdx
	movl	%esi, %ecx
	leaq	16(%rsp), %rdi
	leaq	40(%rsp), %rsi
	call	_Z45__device_stub__Z12ellmm_kernel9ELLMatrixS_PiiRK9ELLMatrixS1_Pii
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z12ellmm_kernel9ELLMatrixS_Pii, .-_Z12ellmm_kernel9ELLMatrixS_Pii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"Kernel launch failed: "
.LC4:
	.string	"Result Matrix C:"
.LC5:
	.string	" "
	.section	.rodata
	.align 32
.LC0:
	.long	1
	.long	0
	.long	2
	.long	0
	.long	3
	.long	0
	.long	0
	.long	4
	.long	5
	.long	0
	.long	6
	.long	0
	.align 32
.LC1:
	.long	0
	.long	2
	.long	0
	.long	2
	.long	1
	.long	3
	.long	0
	.long	2
	.long	0
	.long	2
	.long	1
	.long	3
	.align 32
.LC2:
	.long	7
	.long	0
	.long	8
	.long	0
	.long	9
	.long	0
	.long	0
	.long	10
	.long	11
	.long	0
	.long	12
	.long	0
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4, %edx
	movl	$12, %ecx
	leaq	.LC0(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$344, %rsp
	.cfi_def_cfa_offset 400
	movq	%fs:40, %rax
	movq	%rax, 328(%rsp)
	xorl	%eax, %eax
	leaq	184(%rsp), %r8
	leaq	136(%rsp), %rdi
	rep movsl
	leaq	184(%rsp), %rdi
	leaq	.LC1(%rip), %rsi
	movl	$12, %ecx
	rep movsl
	leaq	232(%rsp), %rdi
	leaq	.LC2(%rip), %rsi
	movl	$12, %ecx
	rep movsl
	leaq	280(%rsp), %rdi
	leaq	.LC1(%rip), %rsi
	movl	$12, %ecx
	rep movsl
	leaq	40(%rsp), %rdi
	leaq	136(%rsp), %rcx
	movl	$3, %esi
	call	_Z17create_ell_matrixiiPiS_
	movl	$4, %edx
	leaq	64(%rsp), %rdi
	leaq	232(%rsp), %rcx
	leaq	280(%rsp), %r8
	movl	$4, %esi
	call	_Z17create_ell_matrixiiPiS_
	leaq	8(%rsp), %rdi
	movl	$36, %esi
	call	cudaMalloc@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	movq	56(%rsp), %rax
	movups	40(%rsp), %xmm0
	leaq	112(%rsp), %rsi
	leaq	88(%rsp), %rdi
	movups	64(%rsp), %xmm1
	movq	8(%rsp), %rdx
	movl	$3, %ecx
	movq	%rax, 104(%rsp)
	movq	80(%rsp), %rax
	movups	%xmm0, 88(%rsp)
	movq	%rax, 128(%rsp)
	movups	%xmm1, 112(%rsp)
	call	_Z45__device_stub__Z12ellmm_kernel9ELLMatrixS_PiiRK9ELLMatrixS1_Pii
.L14:
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L15
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L13
.L15:
	call	cudaDeviceSynchronize@PLT
	movl	$36, %edi
	leaq	_ZSt4cout(%rip), %r14
	xorl	%r12d, %r12d
	call	_Znam@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$36, %edx
	movq	%rax, %rdi
	movq	%rax, %rbx
	leaq	.LC5(%rip), %r15
	call	cudaMemcpy@PLT
	leaq	.LC4(%rip), %rsi
	movq	%r14, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L17:
	imulq	$12, %r12, %r13
	xorl	%ebp, %ebp
	addq	%rbx, %r13
.L18:
	movl	0(%r13,%rbp,4), %esi
	movq	%r14, %rdi
	incq	%rbp
	call	_ZNSolsEi@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$3, %rbp
	jne	.L18
	movq	%r14, %rdi
	incq	%r12
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpq	$3, %r12
	jne	.L17
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	subq	$32, %rsp
	.cfi_def_cfa_offset 432
	movups	72(%rsp), %xmm2
	movq	88(%rsp), %rax
	movups	%xmm2, (%rsp)
	movq	%rax, 16(%rsp)
	call	_Z15free_ell_matrix9ELLMatrix
	movups	96(%rsp), %xmm3
	movq	112(%rsp), %rax
	movups	%xmm3, (%rsp)
	movq	%rax, 16(%rsp)
	call	_Z15free_ell_matrix9ELLMatrix
	movq	40(%rsp), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 400
	call	cudaFree@PLT
	xorl	%eax, %eax
.L13:
	movq	328(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$344, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z12ellmm_kernel9ELLMatrixS_Pii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12ellmm_kernel9ELLMatrixS_Pii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>


// Define the ELLPACK matrix structure
typedef struct {
    int* values;
    int* col_indices;
    int max_cols;
    int rows;
} ELLMatrix;

// Kernel for sparse matrix-matrix multiplication in ELL format
__global__ void ellmm_kernel(const ELLMatrix A, const ELLMatrix B, int* C, int width) {
    // Calculate row and column indices
    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;

    // Initialize the result for this thread
    int sum = 0;

    // Perform the multiplication
    if (row < A.rows && col < width) {
        for (int k = 0; k < A.max_cols; ++k) {
            int a_val = A.values[row * A.max_cols + k];
            int a_col = A.col_indices[row * A.max_cols + k];
            int b_val = B.values[a_col * B.max_cols + col];
            sum += a_val * b_val;
        }
        // Write the result to the output matrix
        C[row * width + col] = sum;
    }
}

// Function to allocate and initialize an ELL matrix
ELLMatrix create_ell_matrix(int rows, int max_cols, int* values, int* col_indices) {
    ELLMatrix matrix;
    hipMalloc((void**)&matrix.values, rows * max_cols * sizeof(int));
    hipMalloc((void**)&matrix.col_indices, rows * max_cols * sizeof(int));
    hipMemcpy(matrix.values, values, rows * max_cols * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(matrix.col_indices, col_indices, rows * max_cols * sizeof(int), hipMemcpyHostToDevice);
    matrix.max_cols = max_cols;
    matrix.rows = rows;
    return matrix;
}

// Function to free an ELL matrix
void free_ell_matrix(ELLMatrix matrix) {
    hipFree(matrix.values);
    hipFree(matrix.col_indices);
}

int main() {
    // Example matrices in ELL format
    int A_values[] = {1, 0, 2, 0, 3, 0, 0, 4, 5, 0, 6, 0};
    int A_col_indices[] = {0, 2, 0, 2, 1, 3, 0, 2, 0, 2, 1, 3};
    int B_values[] = {7, 0, 8, 0, 9, 0, 0, 10, 11, 0, 12, 0};
    int B_col_indices[] = {0, 2, 0, 2, 1, 3, 0, 2, 0, 2, 1, 3};

    int rows = 3;
    int max_cols = 4;
    int width = 3;

    // Create ELL matrices
    ELLMatrix A = create_ell_matrix(rows, max_cols, A_values, A_col_indices);
    ELLMatrix B = create_ell_matrix(max_cols, max_cols, B_values, B_col_indices);

    // Allocate memory for the result matrix
    int* C;
    hipMalloc((void**)&C, rows * width * sizeof(int));

    // Define block and grid sizes
    dim3 blockSize(16, 16);
    dim3 gridSize((width + blockSize.x - 1) / blockSize.x, (rows + blockSize.y - 1) / blockSize.y);

    // Launch the kernel
    ellmm_kernel<<<gridSize, blockSize>>>(A, B, C, width);

    // Check for errors in kernel launch
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Kernel launch failed: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Synchronize device
    hipDeviceSynchronize();

    // Copy the result back to the host
    int* h_C = new int[rows * width];
    hipMemcpy(h_C, C, rows * width * sizeof(int), hipMemcpyDeviceToHost);

    // Print the result matrix
    std::cout << "Result Matrix C:" << std::endl;
    for (int i = 0; i < rows; ++i) {
        for (int j = 0; j < width; ++j) {
            std::cout << h_C[i * width + j] << " ";
        }
        std::cout << std::endl;
    }

    // Free memory
    delete[] h_C;
    free_ell_matrix(A);
    free_ell_matrix(B);
    hipFree(C);

    return 0;
}
	.text
	.file	"cuda_code_000683.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__ellmm_kernel9ELLMatrixS_Pii # -- Begin function _Z27__device_stub__ellmm_kernel9ELLMatrixS_Pii
	.type	_Z27__device_stub__ellmm_kernel9ELLMatrixS_Pii,@function
_Z27__device_stub__ellmm_kernel9ELLMatrixS_Pii: # @_Z27__device_stub__ellmm_kernel9ELLMatrixS_Pii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	144(%rsp), %rdx
	leaq	64(%rsp), %rbx
	movq	%rdx, (%rbx)
	leaq	168(%rsp), %rdx
	movq	%rdx, 8(%rbx)
	movq	%rax, 16(%rbx)
	movq	%rcx, 24(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12ellmm_kernel9ELLMatrixS_Pii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__ellmm_kernel9ELLMatrixS_Pii, .Lfunc_end0-_Z27__device_stub__ellmm_kernel9ELLMatrixS_Pii
	.cfi_endproc
                                        # -- End function
	.globl	_Z17create_ell_matrixiiPiS_     # -- Begin function _Z17create_ell_matrixiiPiS_
	.type	_Z17create_ell_matrixiiPiS_,@function
_Z17create_ell_matrixiiPiS_:            # @_Z17create_ell_matrixiiPiS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %r15
	movq	%rcx, %r12
	movl	%edx, %ebp
	movl	%esi, %ebx
	movq	%rdi, %r14
	movl	%edx, %eax
	imull	%esi, %eax
	movslq	%eax, %r13
	shlq	$2, %r13
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	8(%r14), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%r14), %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%ebp, 16(%r14)
	movl	%ebx, 20(%r14)
	movq	%r14, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z17create_ell_matrixiiPiS_, .Lfunc_end1-_Z17create_ell_matrixiiPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z15free_ell_matrix9ELLMatrix   # -- Begin function _Z15free_ell_matrix9ELLMatrix
	.type	_Z15free_ell_matrix9ELLMatrix,@function
_Z15free_ell_matrix9ELLMatrix:          # @_Z15free_ell_matrix9ELLMatrix
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end2:
	.size	_Z15free_ell_matrix9ELLMatrix, .Lfunc_end2-_Z15free_ell_matrix9ELLMatrix
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0                               # 0x0
	.long	2                               # 0x2
	.long	0                               # 0x0
	.long	2                               # 0x2
.LCPI3_1:
	.long	1                               # 0x1
	.long	3                               # 0x3
	.long	0                               # 0x0
	.long	2                               # 0x2
.LCPI3_2:
	.long	0                               # 0x0
	.long	2                               # 0x2
	.long	1                               # 0x1
	.long	3                               # 0x3
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$304, %rsp                      # imm = 0x130
	.cfi_def_cfa_offset 352
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorps	%xmm0, %xmm0
	leaq	256(%rsp), %rcx
	movaps	%xmm0, (%rcx)
	movaps	%xmm0, 16(%rcx)
	movaps	%xmm0, 32(%rcx)
	movl	$1, (%rcx)
	movl	$2, 8(%rcx)
	movl	$3, 16(%rcx)
	movl	$4, 28(%rcx)
	movl	$5, 32(%rcx)
	movl	$6, 40(%rcx)
	movaps	.LCPI3_0(%rip), %xmm1           # xmm1 = [0,2,0,2]
	leaq	208(%rsp), %r8
	movaps	%xmm1, (%r8)
	movaps	.LCPI3_1(%rip), %xmm2           # xmm2 = [1,3,0,2]
	movaps	%xmm2, 16(%r8)
	movaps	.LCPI3_2(%rip), %xmm3           # xmm3 = [0,2,1,3]
	movaps	%xmm3, 32(%r8)
	leaq	160(%rsp), %rbx
	movaps	%xmm0, (%rbx)
	movaps	%xmm0, 16(%rbx)
	movaps	%xmm0, 32(%rbx)
	movl	$7, (%rbx)
	movl	$8, 8(%rbx)
	movl	$9, 16(%rbx)
	movl	$10, 28(%rbx)
	movl	$11, 32(%rbx)
	movl	$12, 40(%rbx)
	leaq	112(%rsp), %r14
	movaps	%xmm1, (%r14)
	movaps	%xmm2, 16(%r14)
	movaps	%xmm3, 32(%r14)
	leaq	88(%rsp), %rdi
	movl	$3, %esi
	movl	$4, %edx
	callq	_Z17create_ell_matrixiiPiS_
	leaq	64(%rsp), %rdi
	movl	$4, %esi
	movl	$4, %edx
	movq	%rbx, %rcx
	movq	%r14, %r8
	callq	_Z17create_ell_matrixiiPiS_
	leaq	56(%rsp), %rdi
	movl	$36, %esi
	callq	hipMalloc
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	56(%rsp), %rdi
	movq	80(%rsp), %rax
	movq	%rax, 40(%rsp)
	movups	64(%rsp), %xmm0
	movups	%xmm0, 24(%rsp)
	movq	104(%rsp), %rax
	movq	%rax, 16(%rsp)
	movups	88(%rsp), %xmm0
	movups	%xmm0, (%rsp)
	movl	$3, %esi
	callq	_Z27__device_stub__ellmm_kernel9ELLMatrixS_Pii
.LBB3_2:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB3_7
# %bb.3:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB3_4
# %bb.5:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB3_6
.LBB3_7:
	callq	hipDeviceSynchronize
	movl	$36, %edi
	callq	_Znam
	movq	%rax, %rbx
	movq	56(%rsp), %rsi
	movl	$36, %edx
	movq	%rax, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %r14d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%r15d, %r15d
	movq	%rbx, %r12
.LBB3_8:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_9 Depth 2
	xorl	%r13d, %r13d
.LBB3_9:                                #   Parent Loop BB3_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r12,%r13,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r13
	cmpq	$3, %r13
	jne	.LBB3_9
# %bb.10:                               #   in Loop: Header=BB3_8 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r15
	addq	$12, %r12
	cmpq	$3, %r15
	jne	.LBB3_8
# %bb.11:
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	88(%rsp), %rdi
	movq	96(%rsp), %rbx
	callq	hipFree
	movq	%rbx, %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	movq	72(%rsp), %rbx
	callq	hipFree
	movq	%rbx, %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	jmp	.LBB3_12
.LBB3_4:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB3_6:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB3_12:
	addq	$304, %rsp                      # imm = 0x130
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12ellmm_kernel9ELLMatrixS_Pii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12ellmm_kernel9ELLMatrixS_Pii,@object # @_Z12ellmm_kernel9ELLMatrixS_Pii
	.section	.rodata,"a",@progbits
	.globl	_Z12ellmm_kernel9ELLMatrixS_Pii
	.p2align	3, 0x0
_Z12ellmm_kernel9ELLMatrixS_Pii:
	.quad	_Z27__device_stub__ellmm_kernel9ELLMatrixS_Pii
	.size	_Z12ellmm_kernel9ELLMatrixS_Pii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Kernel launch failed: "
	.size	.L.str, 23

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Result Matrix C:"
	.size	.L.str.1, 17

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" "
	.size	.L.str.2, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12ellmm_kernel9ELLMatrixS_Pii"
	.size	.L__unnamed_1, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__ellmm_kernel9ELLMatrixS_Pii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12ellmm_kernel9ELLMatrixS_Pii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12ellmm_kernel9ELLMatrixS_Pii ; -- Begin function _Z12ellmm_kernel9ELLMatrixS_Pii
	.globl	_Z12ellmm_kernel9ELLMatrixS_Pii
	.p2align	8
	.type	_Z12ellmm_kernel9ELLMatrixS_Pii,@function
_Z12ellmm_kernel9ELLMatrixS_Pii:        ; @_Z12ellmm_kernel9ELLMatrixS_Pii
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b64 s[4:5], s[0:1], 0x10
	s_load_b32 s6, s[0:1], 0x38
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s6, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	s_load_b128 s[8:11], s[0:1], 0x0
	v_mul_lo_u32 v2, v0, s4
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x18
	s_load_b32 s5, s[0:1], 0x28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[5:6], 2, v[2:3]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v6, vcc_lo
	v_add_co_u32 v5, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v9, v[5:6], off
	s_add_i32 s4, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s4, 0
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v9, s5, v[1:2]
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v7, vcc_lo, s2, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
	global_load_b32 v9, v[3:4], off
	global_load_b32 v10, v[7:8], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v10, v9, v[2:3]
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, v5, 4
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	v_mov_b32_e32 v2, v7
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v2, 0
.LBB0_5:                                ; %Flow47
	s_load_b64 s[0:1], s[0:1], 0x30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v0, s6, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12ellmm_kernel9ELLMatrixS_Pii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12ellmm_kernel9ELLMatrixS_Pii, .Lfunc_end0-_Z12ellmm_kernel9ELLMatrixS_Pii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 416
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           24
        .value_kind:     by_value
      - .offset:         24
        .size:           24
        .value_kind:     by_value
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12ellmm_kernel9ELLMatrixS_Pii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12ellmm_kernel9ELLMatrixS_Pii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
