#include <iostream>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>

#define MAX_ELEMENTS 2048

// Node structure for the priority queue
struct Node {
    int key;
    int value;
};

// Global device array for the priority queue
__device__ Node d_queue[MAX_ELEMENTS];
__device__ int d_size = 0;

// Kernel to insert an element into the priority queue
__global__ void insertKernel(Node node) {
    int idx = atomicAdd(&d_size, 1);
    if (idx >= MAX_ELEMENTS) return;

    d_queue[idx] = node;
    int parentIdx = (idx - 1) / 2;

    // Bubble up
    while (idx > 0 && d_queue[parentIdx].key < node.key) {
        d_queue[idx] = d_queue[parentIdx];
        idx = parentIdx;
        parentIdx = (idx - 1) / 2;
    }
    d_queue[idx] = node;
}

// Kernel to extract the maximum element from the priority queue
__global__ void extractMaxKernel(Node* result) {
    if (atomicCAS(&d_size, 0, 0) == 0) return; // Queue is empty

    Node root = d_queue[0];
    *result = root;

    Node last = d_queue[d_size - 1];
    atomicSub(&d_size, 1);

    int idx = 0;
    int leftChildIdx, rightChildIdx;
    int largestIdx;

    // Bubble down
    while (true) {
        leftChildIdx = 2 * idx + 1;
        rightChildIdx = 2 * idx + 2;
        largestIdx = idx;

        if (leftChildIdx < d_size && d_queue[leftChildIdx].key > last.key) {
            largestIdx = leftChildIdx;
        }
        if (rightChildIdx < d_size && d_queue[rightChildIdx].key > d_queue[largestIdx].key) {
            largestIdx = rightChildIdx;
        }
        if (largestIdx == idx) break;

        d_queue[idx] = d_queue[largestIdx];
        idx = largestIdx;
    }
    d_queue[idx] = last;
}

// Helper function to check CUDA errors
void checkCudaError(cudaError_t err, const char* msg) {
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << msg << " (" << cudaGetErrorString(err) << ")" << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    // Initialize host array with random data
    Node* h_nodes = new Node[MAX_ELEMENTS];
    for (int i = 0; i < MAX_ELEMENTS; ++i) {
        h_nodes[i].key = rand() % 1000;
        h_nodes[i].value = i;
    }

    // Allocate device memory for nodes
    Node* d_nodes;
    checkCudaError(cudaMalloc(&d_nodes, MAX_ELEMENTS * sizeof(Node)), "Failed to allocate device memory for nodes");

    // Copy nodes from host to device
    checkCudaError(cudaMemcpy(d_nodes, h_nodes, MAX_ELEMENTS * sizeof(Node), cudaMemcpyHostToDevice), "Failed to copy nodes to device");

    // Insert elements into the priority queue
    for (int i = 0; i < MAX_ELEMENTS; ++i) {
        insertKernel<<<1, 1>>>(d_nodes[i]);
        cudaDeviceSynchronize();
        checkCudaError(cudaGetLastError(), "Failed to launch insertKernel");
    }

    // Extract elements from the priority queue
    Node* h_result = new Node[MAX_ELEMENTS];
    Node* d_result;
    checkCudaError(cudaMalloc(&d_result, sizeof(Node)), "Failed to allocate device memory for result");

    for (int i = 0; i < MAX_ELEMENTS; ++i) {
        extractMaxKernel<<<1, 1>>>(d_result);
        cudaDeviceSynchronize();
        checkCudaError(cudaGetLastError(), "Failed to launch extractMaxKernel");

        checkCudaError(cudaMemcpy(&h_result[i], d_result, sizeof(Node), cudaMemcpyDeviceToHost), "Failed to copy result from device to host");
    }

    // Free device memory
    checkCudaError(cudaFree(d_nodes), "Failed to free device memory for nodes");
    checkCudaError(cudaFree(d_result), "Failed to free device memory for result");

    // Free host memory
    delete[] h_nodes;
    delete[] h_result;

    std::cout << "Priority queue operations completed successfully." << std::endl;

    return 0;
}
	.file	"tmpxft_000cc399_00000000-6_cuda_code_012499.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error: "
.LC1:
	.string	" ("
.LC2:
	.string	")"
	.text
	.globl	_Z14checkCudaError9cudaErrorPKc
	.type	_Z14checkCudaError9cudaErrorPKc, @function
_Z14checkCudaError9cudaErrorPKc:
.LFB3635:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	leaq	.LC0(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	leaq	_ZSt4cerr(%rip), %rdi
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z14checkCudaError9cudaErrorPKc, .-_Z14checkCudaError9cudaErrorPKc
	.globl	_Z35__device_stub__Z12insertKernel4NodeR4Node
	.type	_Z35__device_stub__Z12insertKernel4NodeR4Node, @function
_Z35__device_stub__Z12insertKernel4NodeR4Node:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 64(%rsp)
	movq	%rsp, %rdx
	movabsq	$4294967297, %rax
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z12insertKernel4Node(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L8:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z35__device_stub__Z12insertKernel4NodeR4Node, .-_Z35__device_stub__Z12insertKernel4NodeR4Node
	.globl	_Z12insertKernel4Node
	.type	_Z12insertKernel4Node, @function
_Z12insertKernel4Node:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	leaq	8(%rsp), %rdi
	call	_Z35__device_stub__Z12insertKernel4NodeR4Node
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z12insertKernel4Node, .-_Z12insertKernel4Node
	.globl	_Z40__device_stub__Z16extractMaxKernelP4NodeP4Node
	.type	_Z40__device_stub__Z16extractMaxKernelP4NodeP4Node, @function
_Z40__device_stub__Z16extractMaxKernelP4NodeP4Node:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z16extractMaxKernelP4Node(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L14:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z40__device_stub__Z16extractMaxKernelP4NodeP4Node, .-_Z40__device_stub__Z16extractMaxKernelP4NodeP4Node
	.globl	_Z16extractMaxKernelP4Node
	.type	_Z16extractMaxKernelP4Node, @function
_Z16extractMaxKernelP4Node:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z16extractMaxKernelP4NodeP4Node
	.cfi_endproc
.LFE3664:
	.size	_Z16extractMaxKernelP4Node, .-_Z16extractMaxKernelP4Node
	.section	.rodata.str1.1
.LC3:
	.string	"Failed to allocate device memory for nodes"
.LC4:
	.string	"Failed to copy nodes to device"
.LC5:
	.string	"Failed to launch insertKernel"
.LC6:
	.string	"Failed to allocate device memory for result"
.LC7:
	.string	"Failed to launch extractMaxKernel"
.LC8:
	.string	"Failed to copy result from device to host"
.LC9:
	.string	"Failed to free device memory for nodes"
.LC10:
	.string	"Failed to free device memory for result"
.LC11:
	.string	"Priority queue operations completed successfully."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$16384, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	$1000, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movq	%rax, %rbx
.L20:
	call	rand@PLT
	movl	%ebp, 4(%rbx,%rbp,8)
	cltd
	idivl	%r12d
	movl	%edx, (%rbx,%rbp,8)
	incq	%rbp
	cmpq	$2048, %rbp
	jne	.L20
	movq	%rsp, %rdi
	movl	$16384, %esi
	xorl	%ebp, %ebp
	movabsq	$4294967297, %r12
	call	cudaMalloc@PLT
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$16384, %edx
	call	cudaMemcpy@PLT
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
.L22:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r12, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%r12, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	(%rsp), %rax
	leaq	8(%rsp), %rdi
	movq	(%rax,%rbp), %rax
	movq	%rax, 8(%rsp)
	call	_Z35__device_stub__Z12insertKernel4NodeR4Node
.L21:
	call	cudaDeviceSynchronize@PLT
	addq	$8, %rbp
	call	cudaGetLastError@PLT
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	cmpq	$16384, %rbp
	jne	.L22
	movabsq	$4294967297, %r13
	movl	$16384, %edi
	call	_Znam@PLT
	leaq	8(%rsp), %rdi
	movl	$8, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rbp, %r12
	leaq	16384(%rbp), %r14
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
.L24:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movl	$1, %ecx
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r13, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%r13, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	movq	8(%rsp), %rdi
	call	_Z40__device_stub__Z16extractMaxKernelP4NodeP4Node
.L23:
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	leaq	.LC7(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	8(%rsp), %rsi
	movq	%r12, %rdi
	movl	$2, %ecx
	movl	$8, %edx
	addq	$8, %r12
	call	cudaMemcpy@PLT
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	cmpq	%r14, %r12
	jne	.L24
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC10(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	leaq	_ZSt4cout(%rip), %rdi
	leaq	.LC11(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z16extractMaxKernelP4Node"
.LC13:
	.string	"_Z12insertKernel4Node"
.LC14:
	.string	"d_queue"
.LC15:
	.string	"d_size"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3666:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16extractMaxKernelP4Node(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12insertKernel4Node(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	movl	$16384, %r9d
	leaq	_ZL7d_queue(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL6d_size(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3666:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL6d_size
	.comm	_ZL6d_size,4,4
	.local	_ZL7d_queue
	.comm	_ZL7d_queue,16384,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>


#define MAX_ELEMENTS 2048

// Node structure for the priority queue
struct Node {
    int key;
    int value;
};

// Global device array for the priority queue
__device__ Node d_queue[MAX_ELEMENTS];
__device__ int d_size = 0;

// Kernel to insert an element into the priority queue
__global__ void insertKernel(Node node) {
    int idx = atomicAdd(&d_size, 1);
    if (idx >= MAX_ELEMENTS) return;

    d_queue[idx] = node;
    int parentIdx = (idx - 1) / 2;

    // Bubble up
    while (idx > 0 && d_queue[parentIdx].key < node.key) {
        d_queue[idx] = d_queue[parentIdx];
        idx = parentIdx;
        parentIdx = (idx - 1) / 2;
    }
    d_queue[idx] = node;
}

// Kernel to extract the maximum element from the priority queue
__global__ void extractMaxKernel(Node* result) {
    if (atomicCAS(&d_size, 0, 0) == 0) return; // Queue is empty

    Node root = d_queue[0];
    *result = root;

    Node last = d_queue[d_size - 1];
    atomicSub(&d_size, 1);

    int idx = 0;
    int leftChildIdx, rightChildIdx;
    int largestIdx;

    // Bubble down
    while (true) {
        leftChildIdx = 2 * idx + 1;
        rightChildIdx = 2 * idx + 2;
        largestIdx = idx;

        if (leftChildIdx < d_size && d_queue[leftChildIdx].key > last.key) {
            largestIdx = leftChildIdx;
        }
        if (rightChildIdx < d_size && d_queue[rightChildIdx].key > d_queue[largestIdx].key) {
            largestIdx = rightChildIdx;
        }
        if (largestIdx == idx) break;

        d_queue[idx] = d_queue[largestIdx];
        idx = largestIdx;
    }
    d_queue[idx] = last;
}

// Helper function to check CUDA errors
void checkCudaError(hipError_t err, const char* msg) {
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << msg << " (" << hipGetErrorString(err) << ")" << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    // Initialize host array with random data
    Node* h_nodes = new Node[MAX_ELEMENTS];
    for (int i = 0; i < MAX_ELEMENTS; ++i) {
        h_nodes[i].key = rand() % 1000;
        h_nodes[i].value = i;
    }

    // Allocate device memory for nodes
    Node* d_nodes;
    checkCudaError(hipMalloc(&d_nodes, MAX_ELEMENTS * sizeof(Node)), "Failed to allocate device memory for nodes");

    // Copy nodes from host to device
    checkCudaError(hipMemcpy(d_nodes, h_nodes, MAX_ELEMENTS * sizeof(Node), hipMemcpyHostToDevice), "Failed to copy nodes to device");

    // Insert elements into the priority queue
    for (int i = 0; i < MAX_ELEMENTS; ++i) {
        insertKernel<<<1, 1>>>(d_nodes[i]);
        hipDeviceSynchronize();
        checkCudaError(hipGetLastError(), "Failed to launch insertKernel");
    }

    // Extract elements from the priority queue
    Node* h_result = new Node[MAX_ELEMENTS];
    Node* d_result;
    checkCudaError(hipMalloc(&d_result, sizeof(Node)), "Failed to allocate device memory for result");

    for (int i = 0; i < MAX_ELEMENTS; ++i) {
        extractMaxKernel<<<1, 1>>>(d_result);
        hipDeviceSynchronize();
        checkCudaError(hipGetLastError(), "Failed to launch extractMaxKernel");

        checkCudaError(hipMemcpy(&h_result[i], d_result, sizeof(Node), hipMemcpyDeviceToHost), "Failed to copy result from device to host");
    }

    // Free device memory
    checkCudaError(hipFree(d_nodes), "Failed to free device memory for nodes");
    checkCudaError(hipFree(d_result), "Failed to free device memory for result");

    // Free host memory
    delete[] h_nodes;
    delete[] h_result;

    std::cout << "Priority queue operations completed successfully." << std::endl;

    return 0;
}
	.text
	.file	"cuda_code_012499.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__insertKernel4Node # -- Begin function _Z27__device_stub__insertKernel4Node
	.type	_Z27__device_stub__insertKernel4Node,@function
_Z27__device_stub__insertKernel4Node:   # @_Z27__device_stub__insertKernel4Node
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12insertKernel4Node, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__insertKernel4Node, .Lfunc_end0-_Z27__device_stub__insertKernel4Node
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__extractMaxKernelP4Node # -- Begin function _Z31__device_stub__extractMaxKernelP4Node
	.type	_Z31__device_stub__extractMaxKernelP4Node,@function
_Z31__device_stub__extractMaxKernelP4Node: # @_Z31__device_stub__extractMaxKernelP4Node
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16extractMaxKernelP4Node, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__extractMaxKernelP4Node, .Lfunc_end1-_Z31__device_stub__extractMaxKernelP4Node
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCudaError10hipError_tPKc # -- Begin function _Z14checkCudaError10hipError_tPKc
	.type	_Z14checkCudaError10hipError_tPKc,@function
_Z14checkCudaError10hipError_tPKc:      # @_Z14checkCudaError10hipError_tPKc
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB2_2
# %bb.1:
	retq
.LBB2_2:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %r14
	movl	%edi, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	_Z14checkCudaError10hipError_tPKc, .Lfunc_end2-_Z14checkCudaError10hipError_tPKc
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$16384, %edi                    # imm = 0x4000
	callq	_Znam
	movq	%rax, %rbx
	xorl	%r14d, %r14d
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r14,8)
	movl	%r14d, 4(%rbx,%r14,8)
	incq	%r14
	cmpq	$2048, %r14                     # imm = 0x800
	jne	.LBB3_1
# %bb.2:
	movabsq	$4294967297, %r14               # imm = 0x100000001
	leaq	16(%rsp), %r15
	movl	$16384, %esi                    # imm = 0x4000
	movq	%r15, %rdi
	callq	hipMalloc
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	(%r15), %rdi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.4, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	xorl	%r15d, %r15d
.LBB3_3:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_5
# %bb.4:                                #   in Loop: Header=BB3_3 Depth=1
	movq	16(%rsp), %rax
	movq	(%rax,%r15,8), %rdi
	callq	_Z27__device_stub__insertKernel4Node
.LBB3_5:                                #   in Loop: Header=BB3_3 Depth=1
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	movl	$.L.str.5, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	incq	%r15
	cmpq	$2048, %r15                     # imm = 0x800
	jne	.LBB3_3
# %bb.6:
	movl	$16384, %edi                    # imm = 0x4000
	callq	_Znam
	movq	%rax, %r15
	leaq	8(%rsp), %rdi
	movl	$8, %esi
	callq	hipMalloc
	movl	$.L.str.6, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	xorl	%r12d, %r12d
.LBB3_7:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_9
# %bb.8:                                #   in Loop: Header=BB3_7 Depth=1
	movq	8(%rsp), %rdi
	callq	_Z31__device_stub__extractMaxKernelP4Node
.LBB3_9:                                #   in Loop: Header=BB3_7 Depth=1
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	movl	$.L.str.7, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	leaq	(%r15,%r12), %rdi
	movq	8(%rsp), %rsi
	movl	$8, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.8, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	addq	$8, %r12
	cmpq	$16384, %r12                    # imm = 0x4000
	jne	.LBB3_7
# %bb.10:
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.9, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.10, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$49, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12insertKernel4Node, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16extractMaxKernelP4Node, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$d_queue, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$16384, %r9d                    # imm = 0x4000
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$d_size, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	d_queue,@object                 # @d_queue
	.local	d_queue
	.comm	d_queue,16384,16
	.type	d_size,@object                  # @d_size
	.local	d_size
	.comm	d_size,4,4
	.type	_Z12insertKernel4Node,@object   # @_Z12insertKernel4Node
	.section	.rodata,"a",@progbits
	.globl	_Z12insertKernel4Node
	.p2align	3, 0x0
_Z12insertKernel4Node:
	.quad	_Z27__device_stub__insertKernel4Node
	.size	_Z12insertKernel4Node, 8

	.type	_Z16extractMaxKernelP4Node,@object # @_Z16extractMaxKernelP4Node
	.globl	_Z16extractMaxKernelP4Node
	.p2align	3, 0x0
_Z16extractMaxKernelP4Node:
	.quad	_Z31__device_stub__extractMaxKernelP4Node
	.size	_Z16extractMaxKernelP4Node, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" ("
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	")"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate device memory for nodes"
	.size	.L.str.3, 43

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to copy nodes to device"
	.size	.L.str.4, 31

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to launch insertKernel"
	.size	.L.str.5, 30

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to allocate device memory for result"
	.size	.L.str.6, 44

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to launch extractMaxKernel"
	.size	.L.str.7, 34

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Failed to copy result from device to host"
	.size	.L.str.8, 42

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to free device memory for nodes"
	.size	.L.str.9, 39

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Failed to free device memory for result"
	.size	.L.str.10, 40

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Priority queue operations completed successfully."
	.size	.L.str.11, 50

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12insertKernel4Node"
	.size	.L__unnamed_1, 22

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16extractMaxKernelP4Node"
	.size	.L__unnamed_2, 27

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"d_queue"
	.size	.L__unnamed_3, 8

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"d_size"
	.size	.L__unnamed_4, 7

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__insertKernel4Node
	.addrsig_sym _Z31__device_stub__extractMaxKernelP4Node
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym d_queue
	.addrsig_sym d_size
	.addrsig_sym _Z12insertKernel4Node
	.addrsig_sym _Z16extractMaxKernelP4Node
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12insertKernel4Node   ; -- Begin function _Z12insertKernel4Node
	.globl	_Z12insertKernel4Node
	.p2align	8
	.type	_Z12insertKernel4Node,@function
_Z12insertKernel4Node:                  ; @_Z12insertKernel4Node
; %bb.0:
	s_mov_b32 s3, exec_lo
	s_mov_b32 s2, exec_lo
	v_mbcnt_lo_u32_b32 v0, s3, 0
                                        ; implicit-def: $vgpr1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_bcnt1_i32_b32 s3, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, s3
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, d_size@rel32@lo+4
	s_addc_u32 s5, s5, d_size@rel32@hi+12
	global_atomic_add_u32 v1, v1, v2, s[4:5] glc
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, s2, v0
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x800, v0
	s_cbranch_execz .LBB0_12
; %bb.3:
	s_load_b64 s[2:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_queue@rel32@lo+4
	s_addc_u32 s1, s1, d_queue@rel32@hi+12
	s_mov_b32 s5, 0
	s_mov_b32 s4, exec_lo
	v_lshlrev_b64 v[2:3], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v2, s0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v5, s3 :: v_dual_mov_b32 v4, s2
	global_store_b64 v[2:3], v[4:5], off
	v_cmpx_lt_i32_e32 0, v0
	s_cbranch_execz .LBB0_11
; %bb.4:                                ; %.lr.ph.preheader
	v_mov_b32_e32 v3, 0
                                        ; implicit-def: $sgpr6
                                        ; implicit-def: $sgpr8
                                        ; implicit-def: $sgpr7
.LBB0_5:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, v0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_queue@rel32@lo+4
	s_addc_u32 s1, s1, d_queue@rel32@hi+12
	s_or_b32 s7, s7, exec_lo
	s_or_b32 s8, s8, exec_lo
	s_mov_b32 s9, exec_lo
	v_add_nc_u32_e32 v0, -1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v1, 31, v0
	v_add_nc_u32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v0, 1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[0:1]
	v_add_co_u32 v4, vcc_lo, v4, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	global_load_b32 v6, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i32_e64 s2, v6
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	global_load_b64 v[4:5], v[4:5], off
	v_lshlrev_b64 v[6:7], 3, v[2:3]
	v_cmp_gt_i32_e32 vcc_lo, 3, v2
	s_and_not1_b32 s7, s7, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, s0, v6, s0
	v_add_co_ci_u32_e64 v7, s0, s1, v7, s0
	s_and_not1_b32 s0, s8, exec_lo
	s_and_b32 s1, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s8, s0, s1
	s_waitcnt vmcnt(0)
	global_store_b64 v[6:7], v[4:5], off
.LBB0_7:                                ; %Flow38
                                        ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s8
	s_or_b32 s5, s0, s5
	s_and_not1_b32 s0, s6, exec_lo
	s_and_b32 s1, s7, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s6, s0, s1
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_5
; %bb.8:                                ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s0, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
; %bb.9:                                ; %.lr.ph..critedge.loopexit_crit_edge
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v0, v2 :: v_dual_mov_b32 v1, v3
; %bb.10:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_11:                               ; %Flow39
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_queue@rel32@lo+4
	s_addc_u32 s1, s1, d_queue@rel32@hi+12
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB0_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12insertKernel4Node
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 10
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12insertKernel4Node, .Lfunc_end0-_Z12insertKernel4Node
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 548
; NumSgprs: 12
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 12
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16extractMaxKernelP4Node ; -- Begin function _Z16extractMaxKernelP4Node
	.globl	_Z16extractMaxKernelP4Node
	.p2align	8
	.type	_Z16extractMaxKernelP4Node,@function
_Z16extractMaxKernelP4Node:             ; @_Z16extractMaxKernelP4Node
; %bb.0:
	v_mov_b32_e32 v0, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_size@rel32@lo+4
	s_addc_u32 s3, s3, d_size@rel32@hi+12
	s_mov_b32 s4, exec_lo
	v_mov_b32_e32 v1, v0
	global_atomic_cmpswap_b32 v1, v0, v[0:1], s[2:3] glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 0, v1
	s_cbranch_execz .LBB1_12
; %bb.1:
	global_load_b32 v1, v0, s[2:3]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_queue@rel32@lo+4
	s_addc_u32 s3, s3, d_queue@rel32@hi+12
	s_load_b64 s[2:3], s[2:3], 0x0
	s_load_b64 s[0:1], s[0:1], 0x0
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, d_queue@rel32@lo-4
	s_addc_u32 s7, s7, d_queue@rel32@hi+4
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v4, s3 :: v_dual_mov_b32 v3, s2
	global_store_b64 v0, v[3:4], s[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	v_add_co_u32 v1, vcc_lo, v1, s6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b64 v[0:1], v[1:2], off
	v_mbcnt_lo_u32_b32 v2, s4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v0
	v_readfirstlane_b32 s7, v1
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB1_3
; %bb.2:
	s_bcnt1_i32_b32 s1, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s1, 0, s1
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s1
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_size@rel32@lo+4
	s_addc_u32 s3, s3, d_size@rel32@hi+12
	global_atomic_add_u32 v0, v1, s[2:3]
.LBB1_3:
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v0, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_size@rel32@lo+4
	s_addc_u32 s1, s1, d_size@rel32@hi+12
	s_mov_b32 s2, 0
	global_load_b32 v1, v0, s[0:1]
.LBB1_4:                                ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s4, s2, 1
	s_mov_b32 s0, s2
	s_or_b32 s1, s4, 1
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s1, v1
	s_cbranch_vccnz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_4 Depth=1
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_queue@rel32@lo+12
	s_addc_u32 s3, s3, d_queue@rel32@hi+20
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[4:5], 3
	s_add_u32 s2, s8, s2
	s_addc_u32 s3, s9, s3
	global_load_b32 v2, v0, s[2:3]
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_gt_i32 s2, s6
	s_cselect_b32 s2, s1, s0
.LBB1_6:                                ;   in Loop: Header=BB1_4 Depth=1
	s_add_i32 s1, s4, 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, s1, v1
	s_cbranch_vccnz .LBB1_8
; %bb.7:                                ;   in Loop: Header=BB1_4 Depth=1
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, d_queue@rel32@lo+4
	s_addc_u32 s9, s9, d_queue@rel32@hi+12
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[2:3], 3
	s_add_u32 s8, s10, s8
	s_addc_u32 s9, s11, s9
	s_getpc_b64 s[10:11]
	s_add_u32 s10, s10, d_queue@rel32@lo+20
	s_addc_u32 s11, s11, d_queue@rel32@hi+28
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[4:5], s[4:5], 3
	s_add_u32 s4, s4, s10
	s_addc_u32 s5, s5, s11
	s_clause 0x1
	global_load_b32 v2, v0, s[4:5]
	global_load_b32 v3, v0, s[8:9]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s3, v2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s4, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_gt_i32 s3, s4
	s_cselect_b32 s2, s1, s2
.LBB1_8:                                ;   in Loop: Header=BB1_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, s0
	s_mov_b32 s1, -1
	s_cbranch_scc1 .LBB1_10
; %bb.9:                                ;   in Loop: Header=BB1_4 Depth=1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, d_queue@rel32@lo+4
	s_addc_u32 s5, s5, d_queue@rel32@hi+12
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[2:3], 3
	s_add_u32 s8, s8, s4
	s_addc_u32 s9, s9, s5
	s_ashr_i32 s1, s0, 31
	global_load_b64 v[2:3], v0, s[8:9]
	s_lshl_b64 s[8:9], s[0:1], 3
	s_mov_b32 s1, 0
	s_add_u32 s4, s8, s4
	s_addc_u32 s5, s9, s5
	s_waitcnt vmcnt(0)
	global_store_b64 v0, v[2:3], s[4:5]
.LBB1_10:                               ; %Flow
                                        ;   in Loop: Header=BB1_4 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_4
; %bb.11:
	s_ashr_i32 s1, s0, 31
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_queue@rel32@lo+4
	s_addc_u32 s3, s3, d_queue@rel32@hi+12
	s_lshl_b64 s[0:1], s[0:1], 3
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s7
	v_mov_b32_e32 v0, s6
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b64 v2, v[0:1], s[0:1]
.LBB1_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16extractMaxKernelP4Node
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 12
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16extractMaxKernelP4Node, .Lfunc_end1-_Z16extractMaxKernelP4Node
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 716
; NumSgprs: 14
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 14
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	d_queue                 ; @d_queue
	.type	d_queue,@object
	.section	.bss,"aw",@nobits
	.globl	d_queue
	.p2align	4, 0x0
d_queue:
	.zero	16384
	.size	d_queue, 16384

	.protected	d_size                  ; @d_size
	.type	d_size,@object
	.globl	d_size
	.p2align	2, 0x0
d_size:
	.long	0                               ; 0x0
	.size	d_size, 4

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym d_queue
	.addrsig_sym d_size
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 4
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12insertKernel4Node
    .private_segment_fixed_size: 0
    .sgpr_count:     12
    .sgpr_spill_count: 0
    .symbol:         _Z12insertKernel4Node.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16extractMaxKernelP4Node
    .private_segment_fixed_size: 0
    .sgpr_count:     14
    .sgpr_spill_count: 0
    .symbol:         _Z16extractMaxKernelP4Node.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
