#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>

namespace cg = cooperative_groups;

#define N 1024
#define BLOCK_SIZE 128
#define NUM_BLOCKS (N / BLOCK_SIZE)

__global__ void crankNicolsonStep(float* u, float* u_new, float* d_u, float alpha, int n) {
    extern __shared__ float shared_u[];

    int tid = threadIdx.x;
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    // Load data into shared memory
    if (idx < n) {
        shared_u[tid] = u[idx];
    } else {
        shared_u[tid] = 0.0f;
    }
    __syncthreads();

    // Compute the right-hand side of the Crank-Nicolson scheme
    float rhs = 0.0f;
    if (idx > 0 && idx < n - 1) {
        rhs = (alpha * (shared_u[tid + 1] + shared_u[tid - 1]) + (1 - 2 * alpha) * shared_u[tid]);
    } else if (idx == 0) {
        rhs = (alpha * shared_u[tid + 1] + (1 - 2 * alpha) * shared_u[tid]);
    } else if (idx == n - 1) {
        rhs = (alpha * shared_u[tid - 1] + (1 - 2 * alpha) * shared_u[tid]);
    }

    // Store the right-hand side in d_u
    if (idx < n) {
        d_u[idx] = rhs;
    }
    __syncthreads();

    // Compute the new values using the Crank-Nicolson scheme
    if (idx > 0 && idx < n - 1) {
        u_new[idx] = 0.5f * (shared_u[tid] + rhs + alpha * (d_u[tid + 1] + d_u[tid - 1]) + (1 - 2 * alpha) * d_u[tid]);
    } else if (idx == 0) {
        u_new[idx] = 0.5f * (shared_u[tid] + rhs + alpha * d_u[tid + 1] + (1 - 2 * alpha) * d_u[tid]);
    } else if (idx == n - 1) {
        u_new[idx] = 0.5f * (shared_u[tid] + rhs + alpha * d_u[tid - 1] + (1 - 2 * alpha) * d_u[tid]);
    }
}

int main() {
    float *h_u, *h_u_new, *h_d_u;
    float *d_u, *d_u_new, *d_d_u;

    // Allocate host memory
    h_u = new float[N];
    h_u_new = new float[N];
    h_d_u = new float[N];

    // Initialize host data
    for (int i = 0; i < N; i++) {
        h_u[i] = 0.0f;
    }
    h_u[0] = 1.0f; // Boundary condition

    // Allocate device memory
    cudaMalloc((void**)&d_u, N * sizeof(float));
    cudaMalloc((void**)&d_u_new, N * sizeof(float));
    cudaMalloc((void**)&d_d_u, N * sizeof(float));

    // Copy data from host to device
    cudaMemcpy(d_u, h_u, N * sizeof(float), cudaMemcpyHostToDevice);

    // Parameters
    float alpha = 0.25f; // Stability parameter
    int steps = 1000;    // Number of time steps

    // Perform time-stepping
    for (int step = 0; step < steps; step++) {
        crankNicolsonStep<<<NUM_BLOCKS, BLOCK_SIZE, BLOCK_SIZE * sizeof(float)>>>(d_u, d_u_new, d_d_u, alpha, N);
        cudaDeviceSynchronize();
        std::swap(d_u, d_u_new);
    }

    // Copy results back to host
    cudaMemcpy(h_u, d_u, N * sizeof(float), cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_u);
    cudaFree(d_u_new);
    cudaFree(d_d_u);

    // Free host memory
    delete[] h_u;
    delete[] h_u_new;
    delete[] h_d_u;

    return 0;
}
	.file	"tmpxft_001f24a5_00000000-6_cuda_code_084343.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6836:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6836:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z43__device_stub__Z17crankNicolsonStepPfS_S_fiPfS_S_fi
	.type	_Z43__device_stub__Z17crankNicolsonStepPfS_S_fiPfS_S_fi, @function
_Z43__device_stub__Z17crankNicolsonStepPfS_S_fiPfS_S_fi:
.LFB6858:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, (%rsp)
	leaq	40(%rsp), %rcx
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17crankNicolsonStepPfS_S_fi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6858:
	.size	_Z43__device_stub__Z17crankNicolsonStepPfS_S_fiPfS_S_fi, .-_Z43__device_stub__Z17crankNicolsonStepPfS_S_fiPfS_S_fi
	.globl	_Z17crankNicolsonStepPfS_S_fi
	.type	_Z17crankNicolsonStepPfS_S_fi, @function
_Z17crankNicolsonStepPfS_S_fi:
.LFB6859:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z17crankNicolsonStepPfS_S_fiPfS_S_fi
	.cfi_endproc
.LFE6859:
	.size	_Z17crankNicolsonStepPfS_S_fi, .-_Z17crankNicolsonStepPfS_S_fi
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6832:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$4096, %edi
	movabsq	$4294967424, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	$1000, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$1024, %ecx
	movl	$4096, %esi
	movq	%rax, %rbx
	xorl	%eax, %eax
	movq	%rbx, %rdi
	rep stosl
	movl	$0x3f800000, (%rbx)
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4096, %edx
	call	cudaMemcpy@PLT
.L10:
	movl	$536870913, %edi
	xorl	%r9d, %r9d
	movq	%r12, %rdx
	movl	$1, %ecx
	salq	$3, %rdi
	movl	$512, %r8d
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1024, %ecx
	movss	.LC1(%rip), %xmm0
	movq	8(%rsp), %rdi
	call	_Z43__device_stub__Z17crankNicolsonStepPfS_S_fiPfS_S_fi
.L9:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rax
	movq	16(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	%rsi, 8(%rsp)
	decl	%ebp
	jne	.L10
	movl	$2, %ecx
	movl	$4096, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6832:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"_Z17crankNicolsonStepPfS_S_fi"
.LC3:
	.string	"_ZN50_INTERNAL_1808d769_19_cuda_code_084343_cu_b66802cf4cuda3std3__419piecewise_constructE"
.LC4:
	.string	"_ZN50_INTERNAL_1808d769_19_cuda_code_084343_cu_b66802cf4cuda3std6ranges3__45__cpo4swapE"
.LC5:
	.string	"_ZN50_INTERNAL_1808d769_19_cuda_code_084343_cu_b66802cf4cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6861:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z17crankNicolsonStepPfS_S_fi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6861:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1048576000
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>

namespace cg = cooperative_groups;

#define N 1024
#define BLOCK_SIZE 128
#define NUM_BLOCKS (N / BLOCK_SIZE)

__global__ void crankNicolsonStep(float* u, float* u_new, float* d_u, float alpha, int n) {
    extern __shared__ float shared_u[];

    int tid = threadIdx.x;
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    // Load data into shared memory
    if (idx < n) {
        shared_u[tid] = u[idx];
    } else {
        shared_u[tid] = 0.0f;
    }
    __syncthreads();

    // Compute the right-hand side of the Crank-Nicolson scheme
    float rhs = 0.0f;
    if (idx > 0 && idx < n - 1) {
        rhs = (alpha * (shared_u[tid + 1] + shared_u[tid - 1]) + (1 - 2 * alpha) * shared_u[tid]);
    } else if (idx == 0) {
        rhs = (alpha * shared_u[tid + 1] + (1 - 2 * alpha) * shared_u[tid]);
    } else if (idx == n - 1) {
        rhs = (alpha * shared_u[tid - 1] + (1 - 2 * alpha) * shared_u[tid]);
    }

    // Store the right-hand side in d_u
    if (idx < n) {
        d_u[idx] = rhs;
    }
    __syncthreads();

    // Compute the new values using the Crank-Nicolson scheme
    if (idx > 0 && idx < n - 1) {
        u_new[idx] = 0.5f * (shared_u[tid] + rhs + alpha * (d_u[tid + 1] + d_u[tid - 1]) + (1 - 2 * alpha) * d_u[tid]);
    } else if (idx == 0) {
        u_new[idx] = 0.5f * (shared_u[tid] + rhs + alpha * d_u[tid + 1] + (1 - 2 * alpha) * d_u[tid]);
    } else if (idx == n - 1) {
        u_new[idx] = 0.5f * (shared_u[tid] + rhs + alpha * d_u[tid - 1] + (1 - 2 * alpha) * d_u[tid]);
    }
}

int main() {
    float *h_u, *h_u_new, *h_d_u;
    float *d_u, *d_u_new, *d_d_u;

    // Allocate host memory
    h_u = new float[N];
    h_u_new = new float[N];
    h_d_u = new float[N];

    // Initialize host data
    for (int i = 0; i < N; i++) {
        h_u[i] = 0.0f;
    }
    h_u[0] = 1.0f; // Boundary condition

    // Allocate device memory
    hipMalloc((void**)&d_u, N * sizeof(float));
    hipMalloc((void**)&d_u_new, N * sizeof(float));
    hipMalloc((void**)&d_d_u, N * sizeof(float));

    // Copy data from host to device
    hipMemcpy(d_u, h_u, N * sizeof(float), hipMemcpyHostToDevice);

    // Parameters
    float alpha = 0.25f; // Stability parameter
    int steps = 1000;    // Number of time steps

    // Perform time-stepping
    for (int step = 0; step < steps; step++) {
        crankNicolsonStep<<<NUM_BLOCKS, BLOCK_SIZE, BLOCK_SIZE * sizeof(float)>>>(d_u, d_u_new, d_d_u, alpha, N);
        hipDeviceSynchronize();
        std::swap(d_u, d_u_new);
    }

    // Copy results back to host
    hipMemcpy(h_u, d_u, N * sizeof(float), hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_u);
    hipFree(d_u_new);
    hipFree(d_d_u);

    // Free host memory
    delete[] h_u;
    delete[] h_u_new;
    delete[] h_d_u;

    return 0;
}
	.text
	.file	"cuda_code_084343.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z32__device_stub__crankNicolsonStepPfS_S_fi # -- Begin function _Z32__device_stub__crankNicolsonStepPfS_S_fi
	.type	_Z32__device_stub__crankNicolsonStepPfS_S_fi,@function
_Z32__device_stub__crankNicolsonStepPfS_S_fi: # @_Z32__device_stub__crankNicolsonStepPfS_S_fi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movss	%xmm0, (%rdx)
	movq	%rsp, %r8
	movl	%ecx, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r8, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17crankNicolsonStepPfS_S_fi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__crankNicolsonStepPfS_S_fi, .Lfunc_end0-_Z32__device_stub__crankNicolsonStepPfS_S_fi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3e800000                      # float 0.25
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967304, %r14               # imm = 0x100000008
	movl	$4096, %edi                     # imm = 0x1000
	callq	_Znam
	movq	%rax, %rbx
	leaq	4(%rax), %rdi
	movl	$4092, %edx                     # imm = 0xFFC
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$1065353216, (%rbx)             # imm = 0x3F800000
	leaq	8(%rsp), %r15
	movl	$4096, %esi                     # imm = 0x1000
	movq	%r15, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$1000, %ebp                     # imm = 0x3E8
	leaq	120(%r14), %r15
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	$512, %r8d                      # imm = 0x200
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.2:                                #   in Loop: Header=BB1_1 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	16(%rsp), %rdx
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$1024, %ecx                     # imm = 0x400
	callq	_Z32__device_stub__crankNicolsonStepPfS_S_fi
.LBB1_3:                                #   in Loop: Header=BB1_1 Depth=1
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rax
	movq	(%rsp), %rsi
	movq	%rsi, 8(%rsp)
	movq	%rax, (%rsp)
	decl	%ebp
	jne	.LBB1_1
# %bb.4:
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17crankNicolsonStepPfS_S_fi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17crankNicolsonStepPfS_S_fi,@object # @_Z17crankNicolsonStepPfS_S_fi
	.section	.rodata,"a",@progbits
	.globl	_Z17crankNicolsonStepPfS_S_fi
	.p2align	3, 0x0
_Z17crankNicolsonStepPfS_S_fi:
	.quad	_Z32__device_stub__crankNicolsonStepPfS_S_fi
	.size	_Z17crankNicolsonStepPfS_S_fi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z17crankNicolsonStepPfS_S_fi"
	.size	.L__unnamed_1, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__crankNicolsonStepPfS_S_fi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17crankNicolsonStepPfS_S_fi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17crankNicolsonStepPfS_S_fi ; -- Begin function _Z17crankNicolsonStepPfS_S_fi
	.globl	_Z17crankNicolsonStepPfS_S_fi
	.p2align	8
	.type	_Z17crankNicolsonStepPfS_S_fi,@function
_Z17crankNicolsonStepPfS_S_fi:          ; @_Z17crankNicolsonStepPfS_S_fi
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b256 s[0:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	v_mov_b32_e32 v2, 0
	v_cmp_gt_i32_e32 vcc_lo, s7, v1
	s_and_saveexec_b32 s8, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v2, s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s1, v3, s0
	global_load_b32 v2, v[2:3], off
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s8
	s_add_i32 s7, s7, -1
	v_cmp_gt_i32_e64 s0, 1, v1
	v_cmp_le_i32_e64 s1, s7, v1
	v_lshl_add_u32 v3, v0, 2, 0
	s_mov_b32 s10, 0
                                        ; implicit-def: $sgpr8
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s1, s0, s1
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s9, exec_lo, s0
	s_cbranch_execz .LBB0_10
; %bb.3:
	v_cmp_ne_u32_e64 s0, 0, v1
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $sgpr8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s11, s0
	s_xor_b32 s11, exec_lo, s11
	s_cbranch_execz .LBB0_7
; %bb.4:
	v_cmp_eq_u32_e64 s0, s7, v1
	s_mov_b32 s8, 0
                                        ; implicit-def: $vgpr2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s12, s0
	s_xor_b32 s0, exec_lo, s12
	s_cbranch_execz .LBB0_6
; %bb.5:
	v_add_nc_u32_e32 v2, -4, v3
	s_mov_b32 s10, exec_lo
	ds_load_b32 v2, v2
.LBB0_6:                                ; %Flow99
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s10, s10, exec_lo
.LBB0_7:                                ; %Flow98
	s_and_not1_saveexec_b32 s0, s11
	s_cbranch_execz .LBB0_9
; %bb.8:
	s_waitcnt lgkmcnt(0)
	ds_load_b32 v2, v3 offset:4
	s_or_b32 s10, s10, exec_lo
.LBB0_9:                                ; %Flow100
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s10, s10, exec_lo
.LBB0_10:                               ; %Flow97
	s_and_not1_saveexec_b32 s0, s9
	s_cbranch_execz .LBB0_12
; %bb.11:
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, -4, v3
	s_or_b32 s10, s10, exec_lo
	ds_load_b32 v4, v3 offset:4
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v4, v2
.LBB0_12:                               ; %Flow101
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v5, s8
	v_fma_f32 v4, s6, -2.0, 1.0
	s_and_saveexec_b32 s0, s10
	s_cbranch_execz .LBB0_14
; %bb.13:                               ; %.sink.split
	ds_load_b32 v5, v3
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v5, v4, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v5, s6, v2
.LBB0_14:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_16
; %bb.15:
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_store_b32 v[6:7], v5, off
.LBB0_16:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_24
; %bb.17:
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u32_e32 0, v1
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_21
; %bb.18:
	v_cmp_eq_u32_e32 vcc_lo, s7, v1
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB0_20
; %bb.19:
	v_lshlrev_b32_e32 v0, 2, v0
	v_ashrrev_i32_e32 v2, 31, v1
	global_load_b64 v[6:7], v0, s[4:5] offset:-4
	ds_load_b32 v0, v3
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v3, v5, v0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v3, s6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v4, v7
	v_mul_f32_e32 v2, 0.5, v3
	global_store_b32 v[0:1], v2, off
.LBB0_20:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s7
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr4
.LBB0_21:                               ; %Flow94
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB0_23
; %bb.22:
	v_lshlrev_b32_e32 v0, 2, v0
	ds_load_b32 v2, v3
	global_load_b64 v[0:1], v0, s[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v2, s6, v1 :: v_dual_mov_b32 v1, 0
	v_fmac_f32_e32 v2, v4, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v0, 0.5, v2
	global_store_b32 v1, v0, s[2:3]
.LBB0_23:                               ; %Flow95
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr1_vgpr2
.LBB0_24:                               ; %Flow96
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_26
; %bb.25:
	v_lshlrev_b32_e32 v0, 2, v0
	v_mov_b32_e32 v2, 0
	global_load_b96 v[6:8], v0, s[4:5] offset:-4
	ds_load_b32 v0, v3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_add_f32 v3, v5, v0 :: v_dual_add_f32 v0, v8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v3, s6, v0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_fmac_f32_e32 v3, v4, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f32_e32 v2, 0.5, v3
	global_store_b32 v[0:1], v2, off
.LBB0_26:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17crankNicolsonStepPfS_S_fi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17crankNicolsonStepPfS_S_fi, .Lfunc_end0-_Z17crankNicolsonStepPfS_S_fi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 796
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17crankNicolsonStepPfS_S_fi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17crankNicolsonStepPfS_S_fi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
