#include <iostream>
#include <cuda_runtime.h>

#define WIDTH 2048
#define HEIGHT 2048
#define BLOCK_SIZE 16

__global__ void clothSimulationKernel(float* d_positions, float* d_velocities, float* d_forces, float dt, int width, int height) {
    int x = blockIdx.x * blockDim.x + threadIdx.x;
    int y = blockIdx.y * blockDim.y + threadIdx.y;

    if (x < width && y < height) {
        int idx = y * width + x;
        // Simple Euler integration for demonstration purposes
        d_positions[idx] += d_velocities[idx] * dt;
        d_velocities[idx] += d_forces[idx] * dt;

        // Example force reset (typically would be more complex)
        d_forces[idx] = 0.0f;

        // Example boundary condition (simple wrap-around)
        if (d_positions[idx] > 1.0f) d_positions[idx] -= 1.0f;
        if (d_positions[idx] < 0.0f) d_positions[idx] += 1.0f;

        // Atomic operation example: accumulate forces from neighbors
        if (x > 0) atomicAdd(&d_forces[idx - 1], 0.01f);
        if (x < width - 1) atomicAdd(&d_forces[idx + 1], 0.01f);
        if (y > 0) atomicAdd(&d_forces[idx - width], 0.01f);
        if (y < height - 1) atomicAdd(&d_forces[idx + width], 0.01f);
    }
}

void checkCudaError(cudaError_t error, const char* message) {
    if (error != cudaSuccess) {
        std::cerr << "CUDA error: " << message << " (" << cudaGetErrorString(error) << ")" << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    float* h_positions = new float[WIDTH * HEIGHT];
    float* h_velocities = new float[WIDTH * HEIGHT];
    float* h_forces = new float[WIDTH * HEIGHT];

    // Initialize host data
    for (int i = 0; i < WIDTH * HEIGHT; ++i) {
        h_positions[i] = 0.5f;
        h_velocities[i] = 0.0f;
        h_forces[i] = 0.0f;
    }

    float* d_positions;
    float* d_velocities;
    float* d_forces;

    // Allocate device memory
    checkCudaError(cudaMalloc((void**)&d_positions, WIDTH * HEIGHT * sizeof(float)), "Failed to allocate d_positions");
    checkCudaError(cudaMalloc((void**)&d_velocities, WIDTH * HEIGHT * sizeof(float)), "Failed to allocate d_velocities");
    checkCudaError(cudaMalloc((void**)&d_forces, WIDTH * HEIGHT * sizeof(float)), "Failed to allocate d_forces");

    // Asynchronous memory copies
    cudaStream_t stream;
    checkCudaError(cudaStreamCreate(&stream), "Failed to create stream");

    checkCudaError(cudaMemcpyAsync(d_positions, h_positions, WIDTH * HEIGHT * sizeof(float), cudaMemcpyHostToDevice, stream), "Failed to copy h_positions to d_positions");
    checkCudaError(cudaMemcpyAsync(d_velocities, h_velocities, WIDTH * HEIGHT * sizeof(float), cudaMemcpyHostToDevice, stream), "Failed to copy h_velocities to d_velocities");
    checkCudaError(cudaMemcpyAsync(d_forces, h_forces, WIDTH * HEIGHT * sizeof(float), cudaMemcpyHostToDevice, stream), "Failed to copy h_forces to d_forces");

    // Define grid and block dimensions
    dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
    dim3 dimGrid((WIDTH + dimBlock.x - 1) / dimBlock.x, (HEIGHT + dimBlock.y - 1) / dimBlock.y);

    // Launch kernel
    clothSimulationKernel<<<dimGrid, dimBlock, 0, stream>>>(d_positions, d_velocities, d_forces, 0.01f, WIDTH, HEIGHT);
    checkCudaError(cudaGetLastError(), "Kernel launch failed");

    // Asynchronous memory copy back
    checkCudaError(cudaMemcpyAsync(h_positions, d_positions, WIDTH * HEIGHT * sizeof(float), cudaMemcpyDeviceToHost, stream), "Failed to copy d_positions to h_positions");
    checkCudaError(cudaMemcpyAsync(h_velocities, d_velocities, WIDTH * HEIGHT * sizeof(float), cudaMemcpyDeviceToHost, stream), "Failed to copy d_velocities to h_velocities");
    checkCudaError(cudaMemcpyAsync(h_forces, d_forces, WIDTH * HEIGHT * sizeof(float), cudaMemcpyDeviceToHost, stream), "Failed to copy d_forces to h_forces");

    // Synchronize to ensure all operations are complete
    checkCudaError(cudaStreamSynchronize(stream), "Failed to synchronize stream");

    // Free device memory
    cudaFree(d_positions);
    cudaFree(d_velocities);
    cudaFree(d_forces);

    // Free host memory
    delete[] h_positions;
    delete[] h_velocities;
    delete[] h_forces;

    // Destroy stream
    cudaStreamDestroy(stream);

    std::cout << "Simulation completed successfully." << std::endl;

    return 0;
}
	.file	"tmpxft_0013ddde_00000000-6_cuda_code_064131.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error: "
.LC1:
	.string	" ("
.LC2:
	.string	")"
	.text
	.globl	_Z14checkCudaError9cudaErrorPKc
	.type	_Z14checkCudaError9cudaErrorPKc, @function
_Z14checkCudaError9cudaErrorPKc:
.LFB3635:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	leaq	.LC0(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	leaq	_ZSt4cerr(%rip), %rdi
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z14checkCudaError9cudaErrorPKc, .-_Z14checkCudaError9cudaErrorPKc
	.globl	_Z48__device_stub__Z21clothSimulationKernelPfS_S_fiiPfS_S_fii
	.type	_Z48__device_stub__Z21clothSimulationKernelPfS_S_fiiPfS_S_fii, @function
_Z48__device_stub__Z21clothSimulationKernelPfS_S_fiiPfS_S_fii:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movss	%xmm0, 20(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z21clothSimulationKernelPfS_S_fii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L8:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z48__device_stub__Z21clothSimulationKernelPfS_S_fiiPfS_S_fii, .-_Z48__device_stub__Z21clothSimulationKernelPfS_S_fiiPfS_S_fii
	.globl	_Z21clothSimulationKernelPfS_S_fii
	.type	_Z21clothSimulationKernelPfS_S_fii, @function
_Z21clothSimulationKernelPfS_S_fii:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z21clothSimulationKernelPfS_S_fiiPfS_S_fii
	.cfi_endproc
.LFE3662:
	.size	_Z21clothSimulationKernelPfS_S_fii, .-_Z21clothSimulationKernelPfS_S_fii
	.section	.rodata.str1.1
.LC4:
	.string	"Failed to allocate d_positions"
.LC5:
	.string	"Failed to allocate d_velocities"
.LC6:
	.string	"Failed to allocate d_forces"
.LC7:
	.string	"Failed to create stream"
.LC8:
	.string	"Failed to copy h_positions to d_positions"
.LC9:
	.string	"Failed to copy h_velocities to d_velocities"
.LC10:
	.string	"Failed to copy h_forces to d_forces"
.LC12:
	.string	"Kernel launch failed"
.LC13:
	.string	"Failed to copy d_positions to h_positions"
.LC14:
	.string	"Failed to copy d_velocities to h_velocities"
.LC15:
	.string	"Failed to copy d_forces to h_forces"
.LC16:
	.string	"Failed to synchronize stream"
.LC17:
	.string	"Simulation completed successfully."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$16777216, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$16777216, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$16777216, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movss	.LC3(%rip), %xmm0
	xorl	%edx, %edx
	movq	%rax, %rbx
.L14:
	movss	%xmm0, (%r12,%rdx,4)
	incq	%rdx
	cmpq	$4194304, %rdx
	jne	.L14
	movq	%rdx, %rcx
	xorl	%eax, %eax
	movq	%rbp, %rdi
	movl	$16777216, %esi
	rep stosl
	movq	%rdx, %rcx
	movq	%rbx, %rdi
	rep stosl
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	8(%rsp), %rdi
	movl	$16777216, %esi
	call	cudaMalloc@PLT
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	16(%rsp), %rdi
	movl	$16777216, %esi
	call	cudaMalloc@PLT
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	24(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	.LC7(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	24(%rsp), %r8
	movq	(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	movl	$16777216, %edx
	call	cudaMemcpyAsync@PLT
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	24(%rsp), %r8
	movq	8(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$16777216, %edx
	call	cudaMemcpyAsync@PLT
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	24(%rsp), %r8
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$16777216, %edx
	call	cudaMemcpyAsync@PLT
	leaq	.LC10(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	24(%rsp), %r9
	xorl	%r8d, %r8d
	movabsq	$68719476752, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$549755814016, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$2048, %r8d
	movl	$2048, %ecx
	movss	.LC11(%rip), %xmm0
	movq	(%rsp), %rdi
	call	_Z48__device_stub__Z21clothSimulationKernelPfS_S_fiiPfS_S_fii
.L15:
	call	cudaGetLastError@PLT
	leaq	.LC12(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	24(%rsp), %r8
	movq	(%rsp), %rsi
	movq	%r12, %rdi
	movl	$2, %ecx
	movl	$16777216, %edx
	call	cudaMemcpyAsync@PLT
	leaq	.LC13(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	24(%rsp), %r8
	movq	8(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	movl	$16777216, %edx
	call	cudaMemcpyAsync@PLT
	leaq	.LC14(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	24(%rsp), %r8
	movq	16(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$16777216, %edx
	call	cudaMemcpyAsync@PLT
	leaq	.LC15(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	24(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
	leaq	.LC16(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	24(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	leaq	_ZSt4cout(%rip), %rdi
	leaq	.LC17(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC18:
	.string	"_Z21clothSimulationKernelPfS_S_fii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z21clothSimulationKernelPfS_S_fii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	1056964608
	.align 4
.LC11:
	.long	1008981770
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

#define WIDTH 2048
#define HEIGHT 2048
#define BLOCK_SIZE 16

__global__ void clothSimulationKernel(float* d_positions, float* d_velocities, float* d_forces, float dt, int width, int height) {
    int x = blockIdx.x * blockDim.x + threadIdx.x;
    int y = blockIdx.y * blockDim.y + threadIdx.y;

    if (x < width && y < height) {
        int idx = y * width + x;
        // Simple Euler integration for demonstration purposes
        d_positions[idx] += d_velocities[idx] * dt;
        d_velocities[idx] += d_forces[idx] * dt;

        // Example force reset (typically would be more complex)
        d_forces[idx] = 0.0f;

        // Example boundary condition (simple wrap-around)
        if (d_positions[idx] > 1.0f) d_positions[idx] -= 1.0f;
        if (d_positions[idx] < 0.0f) d_positions[idx] += 1.0f;

        // Atomic operation example: accumulate forces from neighbors
        if (x > 0) atomicAdd(&d_forces[idx - 1], 0.01f);
        if (x < width - 1) atomicAdd(&d_forces[idx + 1], 0.01f);
        if (y > 0) atomicAdd(&d_forces[idx - width], 0.01f);
        if (y < height - 1) atomicAdd(&d_forces[idx + width], 0.01f);
    }
}

void checkCudaError(hipError_t error, const char* message) {
    if (error != hipSuccess) {
        std::cerr << "CUDA error: " << message << " (" << hipGetErrorString(error) << ")" << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    float* h_positions = new float[WIDTH * HEIGHT];
    float* h_velocities = new float[WIDTH * HEIGHT];
    float* h_forces = new float[WIDTH * HEIGHT];

    // Initialize host data
    for (int i = 0; i < WIDTH * HEIGHT; ++i) {
        h_positions[i] = 0.5f;
        h_velocities[i] = 0.0f;
        h_forces[i] = 0.0f;
    }

    float* d_positions;
    float* d_velocities;
    float* d_forces;

    // Allocate device memory
    checkCudaError(hipMalloc((void**)&d_positions, WIDTH * HEIGHT * sizeof(float)), "Failed to allocate d_positions");
    checkCudaError(hipMalloc((void**)&d_velocities, WIDTH * HEIGHT * sizeof(float)), "Failed to allocate d_velocities");
    checkCudaError(hipMalloc((void**)&d_forces, WIDTH * HEIGHT * sizeof(float)), "Failed to allocate d_forces");

    // Asynchronous memory copies
    hipStream_t stream;
    checkCudaError(hipStreamCreate(&stream), "Failed to create stream");

    checkCudaError(hipMemcpyAsync(d_positions, h_positions, WIDTH * HEIGHT * sizeof(float), hipMemcpyHostToDevice, stream), "Failed to copy h_positions to d_positions");
    checkCudaError(hipMemcpyAsync(d_velocities, h_velocities, WIDTH * HEIGHT * sizeof(float), hipMemcpyHostToDevice, stream), "Failed to copy h_velocities to d_velocities");
    checkCudaError(hipMemcpyAsync(d_forces, h_forces, WIDTH * HEIGHT * sizeof(float), hipMemcpyHostToDevice, stream), "Failed to copy h_forces to d_forces");

    // Define grid and block dimensions
    dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
    dim3 dimGrid((WIDTH + dimBlock.x - 1) / dimBlock.x, (HEIGHT + dimBlock.y - 1) / dimBlock.y);

    // Launch kernel
    clothSimulationKernel<<<dimGrid, dimBlock, 0, stream>>>(d_positions, d_velocities, d_forces, 0.01f, WIDTH, HEIGHT);
    checkCudaError(hipGetLastError(), "Kernel launch failed");

    // Asynchronous memory copy back
    checkCudaError(hipMemcpyAsync(h_positions, d_positions, WIDTH * HEIGHT * sizeof(float), hipMemcpyDeviceToHost, stream), "Failed to copy d_positions to h_positions");
    checkCudaError(hipMemcpyAsync(h_velocities, d_velocities, WIDTH * HEIGHT * sizeof(float), hipMemcpyDeviceToHost, stream), "Failed to copy d_velocities to h_velocities");
    checkCudaError(hipMemcpyAsync(h_forces, d_forces, WIDTH * HEIGHT * sizeof(float), hipMemcpyDeviceToHost, stream), "Failed to copy d_forces to h_forces");

    // Synchronize to ensure all operations are complete
    checkCudaError(hipStreamSynchronize(stream), "Failed to synchronize stream");

    // Free device memory
    hipFree(d_positions);
    hipFree(d_velocities);
    hipFree(d_forces);

    // Free host memory
    delete[] h_positions;
    delete[] h_velocities;
    delete[] h_forces;

    // Destroy stream
    hipStreamDestroy(stream);

    std::cout << "Simulation completed successfully." << std::endl;

    return 0;
}
	.text
	.file	"cuda_code_064131.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z36__device_stub__clothSimulationKernelPfS_S_fii # -- Begin function _Z36__device_stub__clothSimulationKernelPfS_S_fii
	.type	_Z36__device_stub__clothSimulationKernelPfS_S_fii,@function
_Z36__device_stub__clothSimulationKernelPfS_S_fii: # @_Z36__device_stub__clothSimulationKernelPfS_S_fii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	16(%rsp), %r9
	movl	%ecx, (%r9)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r9, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21clothSimulationKernelPfS_S_fii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z36__device_stub__clothSimulationKernelPfS_S_fii, .Lfunc_end0-_Z36__device_stub__clothSimulationKernelPfS_S_fii
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCudaError10hipError_tPKc # -- Begin function _Z14checkCudaError10hipError_tPKc
	.type	_Z14checkCudaError10hipError_tPKc,@function
_Z14checkCudaError10hipError_tPKc:      # @_Z14checkCudaError10hipError_tPKc
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB1_2
# %bb.1:
	retq
.LBB1_2:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %r14
	movl	%edi, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z14checkCudaError10hipError_tPKc, .Lfunc_end1-_Z14checkCudaError10hipError_tPKc
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x3c23d70a                      # float 0.00999999977
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	_Znam
	movq	%rax, %rbx
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	_Znam
	movq	%rax, %r12
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	_Znam
	movq	%rax, %r15
	xorl	%r14d, %r14d
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1056964608, (%rbx,%r14,4)      # imm = 0x3F000000
	incq	%r14
	cmpq	$4194304, %r14                  # imm = 0x400000
	jne	.LBB2_1
# %bb.2:
	leaq	24(%rsp), %r14
	movl	$16777216, %esi                 # imm = 0x1000000
	movq	%r14, %rdi
	callq	hipMalloc
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	leaq	16(%rsp), %rbp
	movl	$16777216, %esi                 # imm = 0x1000000
	movq	%rbp, %rdi
	callq	hipMalloc
	movl	$.L.str.4, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	leaq	8(%rsp), %r13
	movl	$16777216, %esi                 # imm = 0x1000000
	movq	%r13, %rdi
	callq	hipMalloc
	movl	$.L.str.5, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	%rsp, %r12
	movq	%r12, %rdi
	callq	hipStreamCreate
	movl	$.L.str.6, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	(%r14), %rdi
	movq	(%r12), %r8
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movl	$.L.str.7, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	(%rbp), %rdi
	movq	(%r12), %r8
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	32(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movl	$.L.str.8, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	(%r13), %rdi
	movq	(%r12), %r8
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movl	$.L.str.9, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	(%r12), %r9
	movabsq	$549755814016, %rdi             # imm = 0x8000000080
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$2048, %ecx                     # imm = 0x800
	movl	$2048, %r8d                     # imm = 0x800
	callq	_Z36__device_stub__clothSimulationKernelPfS_S_fii
.LBB2_4:
	callq	hipGetLastError
	movl	$.L.str.10, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	24(%rsp), %rsi
	movq	(%rsp), %r8
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movl	$.L.str.11, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	16(%rsp), %rsi
	movq	(%rsp), %r8
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movl	$.L.str.12, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	8(%rsp), %rsi
	movq	(%rsp), %r8
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movl	$.L.str.13, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	(%rsp), %rdi
	callq	hipStreamSynchronize
	movl	$.L.str.14, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	(%rsp), %rdi
	callq	hipStreamDestroy
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.15, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21clothSimulationKernelPfS_S_fii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z21clothSimulationKernelPfS_S_fii,@object # @_Z21clothSimulationKernelPfS_S_fii
	.section	.rodata,"a",@progbits
	.globl	_Z21clothSimulationKernelPfS_S_fii
	.p2align	3, 0x0
_Z21clothSimulationKernelPfS_S_fii:
	.quad	_Z36__device_stub__clothSimulationKernelPfS_S_fii
	.size	_Z21clothSimulationKernelPfS_S_fii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" ("
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	")"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate d_positions"
	.size	.L.str.3, 31

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to allocate d_velocities"
	.size	.L.str.4, 32

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to allocate d_forces"
	.size	.L.str.5, 28

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to create stream"
	.size	.L.str.6, 24

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to copy h_positions to d_positions"
	.size	.L.str.7, 42

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Failed to copy h_velocities to d_velocities"
	.size	.L.str.8, 44

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to copy h_forces to d_forces"
	.size	.L.str.9, 36

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Kernel launch failed"
	.size	.L.str.10, 21

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Failed to copy d_positions to h_positions"
	.size	.L.str.11, 42

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Failed to copy d_velocities to h_velocities"
	.size	.L.str.12, 44

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Failed to copy d_forces to h_forces"
	.size	.L.str.13, 36

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Failed to synchronize stream"
	.size	.L.str.14, 29

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Simulation completed successfully."
	.size	.L.str.15, 35

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z21clothSimulationKernelPfS_S_fii"
	.size	.L__unnamed_1, 35

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z36__device_stub__clothSimulationKernelPfS_S_fii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z21clothSimulationKernelPfS_S_fii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z21clothSimulationKernelPfS_S_fii ; -- Begin function _Z21clothSimulationKernelPfS_S_fii
	.globl	_Z21clothSimulationKernelPfS_S_fii
	.p2align	8
	.type	_Z21clothSimulationKernelPfS_S_fii,@function
_Z21clothSimulationKernelPfS_S_fii:     ; @_Z21clothSimulationKernelPfS_S_fii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[5:6], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s5, v5
	v_cmp_gt_i32_e64 s2, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_15
; %bb.1:
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mad_u64_u32 v[3:4], null, v0, s5, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v2, vcc_lo
	v_add_co_u32 v6, vcc_lo, s8, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v2, vcc_lo
	global_load_b32 v4, v[8:9], off
	global_load_b32 v10, v[6:7], off
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v10, s4, v4
	global_store_b32 v[6:7], v10, off
	global_load_b32 v4, v[1:2], off
	global_load_b32 v10, v[8:9], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v10, s4, v4
	v_mov_b32_e32 v4, 0
	global_store_b32 v[8:9], v10, off
	global_store_b32 v[1:2], v4, off
	global_load_b32 v4, v[6:7], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v8, -1.0, v4
	v_cmp_lt_f32_e64 s0, 1.0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v8, s0
	v_cmp_gt_f32_e32 vcc_lo, 0, v4
	s_or_b32 s1, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_add_f32_e32 v8, 1.0, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v4, v4, v8, vcc_lo
	global_store_b32 v[6:7], v4, off
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 0, v5
	s_cbranch_execz .LBB0_6
; %bb.4:
	global_load_b32 v7, v[1:2], off offset:-4
	s_mov_b32 s1, 0
.LBB0_5:                                ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v6, 0x3c23d70a, v7
	global_atomic_cmpswap_b32 v4, v[1:2], v[6:7], off offset:-4 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v4, v7
	v_mov_b32_e32 v7, v4
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_5
.LBB0_6:                                ; %Flow95
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s0, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s0, v5
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_9
; %bb.7:
	global_load_b32 v5, v[1:2], off offset:4
	s_mov_b32 s1, 0
.LBB0_8:                                ; %atomicrmw.start52
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v4, 0x3c23d70a, v5
	global_atomic_cmpswap_b32 v4, v[1:2], v[4:5], off offset:4 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v4, v5
	v_mov_b32_e32 v5, v4
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_8
.LBB0_9:                                ; %Flow93
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s1, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 0, v0
	s_cbranch_execz .LBB0_12
; %bb.10:
	v_subrev_nc_u32_e32 v3, s5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	global_load_b32 v6, v[3:4], off
.LBB0_11:                               ; %atomicrmw.start58
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v5, 0x3c23d70a, v6
	global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v5, v6
	v_mov_b32_e32 v6, v5
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_11
.LBB0_12:                               ; %Flow91
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s0, s6, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_15
; %bb.13:
	s_ashr_i32 s1, s5, 31
	s_mov_b32 s0, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	v_add_co_u32 v0, vcc_lo, v1, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v2, vcc_lo
	s_mov_b32 s0, 0
	global_load_b32 v3, v[0:1], off
.LBB0_14:                               ; %atomicrmw.start64
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, 0x3c23d70a, v3
	global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v2, v3
	v_mov_b32_e32 v3, v2
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_14
.LBB0_15:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21clothSimulationKernelPfS_S_fii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z21clothSimulationKernelPfS_S_fii, .Lfunc_end0-_Z21clothSimulationKernelPfS_S_fii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 744
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21clothSimulationKernelPfS_S_fii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21clothSimulationKernelPfS_S_fii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
