#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>
#include <cassert>

#define LAYERS 10
#define NEURONS 256
#define BATCH_SIZE 256
#define LEARNING_RATE 0.01f
#define ITERATIONS 1000

__global__ void initialize_weights(float *weights, int size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < size) {
        curandState state;
        curand_init(idx, 0, 0, &state);
        weights[idx] = curand_normal(&state) * 0.01f;
    }
}

__global__ void forward_pass(float *inputs, float *weights, float *outputs, int layer) {
    extern __shared__ float shared_weights[];
    int neuron_idx = threadIdx.x;
    int batch_idx = blockIdx.x;

    // Load weights into shared memory
    for (int i = neuron_idx; i < NEURONS * NEURONS; i += blockDim.x) {
        shared_weights[i] = weights[layer * NEURONS * NEURONS + i];
    }
    __syncthreads();

    // Perform matrix-vector multiplication
    float sum = 0.0f;
    for (int k = 0; k < NEURONS; ++k) {
        sum += shared_weights[neuron_idx * NEURONS + k] * inputs[batch_idx * NEURONS + k];
    }
    outputs[batch_idx * NEURONS + neuron_idx] = tanh(sum);
}

__global__ void compute_gradients(float *outputs, float *deltas, float *weights, float *gradients, int layer) {
    extern __shared__ float shared_weights[];
    int neuron_idx = threadIdx.x;
    int batch_idx = blockIdx.x;

    // Load weights into shared memory
    for (int i = neuron_idx; i < NEURONS * NEURONS; i += blockDim.x) {
        shared_weights[i] = weights[layer * NEURONS * NEURONS + i];
    }
    __syncthreads();

    // Compute gradients for weights
    for (int k = 0; k < NEURONS; ++k) {
        gradients[layer * NEURONS * NEURONS + neuron_idx * NEURONS + k] += 
            deltas[batch_idx * NEURONS + neuron_idx] * outputs[batch_idx * NEURONS + k];
    }
}

__global__ void update_weights(float *weights, float *gradients, int size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < size) {
        weights[idx] -= LEARNING_RATE * gradients[idx];
        gradients[idx] = 0.0f; // Reset gradient
    }
}

int main() {
    float *d_inputs, *d_outputs[LAYERS], *d_weights[LAYERS], *d_deltas[LAYERS], *d_gradients[LAYERS];
    size_t input_size = BATCH_SIZE * NEURONS * sizeof(float);
    size_t layer_size = NEURONS * NEURONS * sizeof(float);
    size_t delta_size = BATCH_SIZE * NEURONS * sizeof(float);

    // Allocate memory
    cudaMalloc(&d_inputs, input_size);
    for (int i = 0; i < LAYERS; ++i) {
        cudaMalloc(&d_outputs[i], input_size);
        cudaMalloc(&d_weights[i], layer_size);
        cudaMalloc(&d_deltas[i], delta_size);
        cudaMalloc(&d_gradients[i], layer_size);
        cudaMemset(d_gradients[i], 0, layer_size);
    }

    // Initialize weights
    int threads_per_block = 256;
    int blocks_per_grid = (NEURONS * NEURONS * LAYERS + threads_per_block - 1) / threads_per_block;
    curandState *d_state;
    cudaMalloc(&d_state, blocks_per_grid * threads_per_block * sizeof(curandState));
    initialize_weights<<<blocks_per_grid, threads_per_block>>>(d_weights[0], NEURONS * NEURONS * LAYERS);
    cudaDeviceSynchronize();

    // Initialize inputs (random data for demonstration)
    float *h_inputs = new float[BATCH_SIZE * NEURONS];
    for (int i = 0; i < BATCH_SIZE * NEURONS; ++i) {
        h_inputs[i] = static_cast<float>(rand()) / RAND_MAX;
    }
    cudaMemcpy(d_inputs, h_inputs, input_size, cudaMemcpyHostToDevice);

    // Training loop
    for (int iter = 0; iter < ITERATIONS; ++iter) {
        // Forward pass
        for (int layer = 0; layer < LAYERS; ++layer) {
            int shared_mem_size = NEURONS * NEURONS * sizeof(float);
            if (layer == 0) {
                forward_pass<<<BATCH_SIZE, NEURONS, shared_mem_size>>>(d_inputs, d_weights[layer], d_outputs[layer], layer);
            } else {
                forward_pass<<<BATCH_SIZE, NEURONS, shared_mem_size>>>(d_outputs[layer - 1], d_weights[layer], d_outputs[layer], layer);
            }
            cudaDeviceSynchronize();
        }

        // Backward pass (simplified, assumes output layer error is computed elsewhere)
        for (int layer = LAYERS - 1; layer >= 0; --layer) {
            if (layer == LAYERS - 1) {
                // Compute deltas for output layer (example: assuming MSE loss and tanh activation)
                for (int i = 0; i < BATCH_SIZE * NEURONS; ++i) {
                    float target = 0.5f; // Example target
                    float output = d_outputs[layer][i];
                    d_deltas[layer][i] = (output - target) * (1.0f - output * output);
                }
            } else {
                // Compute deltas for hidden layers
                for (int i = 0; i < BATCH_SIZE * NEURONS; ++i) {
                    float sum = 0.0f;
                    for (int j = 0; j < NEURONS; ++j) {
                        sum += d_weights[layer + 1][j * NEURONS + (i % NEURONS)] * d_deltas[layer + 1][i / NEURONS * NEURONS + j];
                    }
                    float output = d_outputs[layer][i];
                    d_deltas[layer][i] = sum * (1.0f - output * output);
                }
            }

            // Compute gradients
            int shared_mem_size = NEURONS * NEURONS * sizeof(float);
            if (layer == 0) {
                compute_gradients<<<BATCH_SIZE, NEURONS, shared_mem_size>>>(d_inputs, d_deltas[layer], d_weights[layer], d_gradients[layer], layer);
            } else {
                compute_gradients<<<BATCH_SIZE, NEURONS, shared_mem_size>>>(d_outputs[layer - 1], d_deltas[layer], d_weights[layer], d_gradients[layer], layer);
            }
            cudaDeviceSynchronize();
        }

        // Update weights
        for (int layer = 0; layer < LAYERS; ++layer) {
            update_weights<<<blocks_per_grid, threads_per_block>>>(d_weights[layer], d_gradients[layer], NEURONS * NEURONS);
            cudaDeviceSynchronize();
        }
    }

    // Cleanup
    delete[] h_inputs;
    cudaFree(d_inputs);
    for (int i = 0; i < LAYERS; ++i) {
        cudaFree(d_outputs[i]);
        cudaFree(d_weights[i]);
        cudaFree(d_deltas[i]);
        cudaFree(d_gradients[i]);
    }

    return 0;
}
	.file	"tmpxft_00134413_00000000-6_cuda_code_056763.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3852:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3852:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z39__device_stub__Z18initialize_weightsPfiPfi
	.type	_Z39__device_stub__Z18initialize_weightsPfiPfi, @function
_Z39__device_stub__Z18initialize_weightsPfiPfi:
.LFB3874:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18initialize_weightsPfi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3874:
	.size	_Z39__device_stub__Z18initialize_weightsPfiPfi, .-_Z39__device_stub__Z18initialize_weightsPfiPfi
	.globl	_Z18initialize_weightsPfi
	.type	_Z18initialize_weightsPfi, @function
_Z18initialize_weightsPfi:
.LFB3875:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z18initialize_weightsPfiPfi
	.cfi_endproc
.LFE3875:
	.size	_Z18initialize_weightsPfi, .-_Z18initialize_weightsPfi
	.globl	_Z37__device_stub__Z12forward_passPfS_S_iPfS_S_i
	.type	_Z37__device_stub__Z12forward_passPfS_S_iPfS_S_i, @function
_Z37__device_stub__Z12forward_passPfS_S_iPfS_S_i:
.LFB3876:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12forward_passPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3876:
	.size	_Z37__device_stub__Z12forward_passPfS_S_iPfS_S_i, .-_Z37__device_stub__Z12forward_passPfS_S_iPfS_S_i
	.globl	_Z12forward_passPfS_S_i
	.type	_Z12forward_passPfS_S_i, @function
_Z12forward_passPfS_S_i:
.LFB3877:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z12forward_passPfS_S_iPfS_S_i
	.cfi_endproc
.LFE3877:
	.size	_Z12forward_passPfS_S_i, .-_Z12forward_passPfS_S_i
	.globl	_Z44__device_stub__Z17compute_gradientsPfS_S_S_iPfS_S_S_i
	.type	_Z44__device_stub__Z17compute_gradientsPfS_S_S_iPfS_S_S_i, @function
_Z44__device_stub__Z17compute_gradientsPfS_S_S_iPfS_S_S_i:
.LFB3878:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z17compute_gradientsPfS_S_S_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L13:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3878:
	.size	_Z44__device_stub__Z17compute_gradientsPfS_S_S_iPfS_S_S_i, .-_Z44__device_stub__Z17compute_gradientsPfS_S_S_iPfS_S_S_i
	.globl	_Z17compute_gradientsPfS_S_S_i
	.type	_Z17compute_gradientsPfS_S_S_i, @function
_Z17compute_gradientsPfS_S_S_i:
.LFB3879:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z17compute_gradientsPfS_S_S_iPfS_S_S_i
	.cfi_endproc
.LFE3879:
	.size	_Z17compute_gradientsPfS_S_S_i, .-_Z17compute_gradientsPfS_S_S_i
	.globl	_Z37__device_stub__Z14update_weightsPfS_iPfS_i
	.type	_Z37__device_stub__Z14update_weightsPfS_iPfS_i, @function
_Z37__device_stub__Z14update_weightsPfS_iPfS_i:
.LFB3880:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14update_weightsPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L18:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3880:
	.size	_Z37__device_stub__Z14update_weightsPfS_iPfS_i, .-_Z37__device_stub__Z14update_weightsPfS_iPfS_i
	.globl	_Z14update_weightsPfS_i
	.type	_Z14update_weightsPfS_i, @function
_Z14update_weightsPfS_i:
.LFB3881:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z14update_weightsPfS_iPfS_i
	.cfi_endproc
.LFE3881:
	.size	_Z14update_weightsPfS_i, .-_Z14update_weightsPfS_i
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3849:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$262144, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$408, %rsp
	.cfi_def_cfa_offset 464
	movq	%fs:40, %rax
	movq	%rax, 392(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rdi
	leaq	72(%rsp), %r14
	call	cudaMalloc@PLT
	leaq	312(%rsp), %rbp
	movq	%rbp, %r12
.L24:
	leaq	(%r14,%rbx), %rdi
	movl	$262144, %esi
	leaq	152(%rsp), %r13
	call	cudaMalloc@PLT
	leaq	0(%r13,%rbx), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	leaq	232(%rsp), %rax
	movl	$262144, %esi
	leaq	(%rbx,%rax), %rdi
	movq	%rax, 16(%rsp)
	addq	$8, %rbx
	call	cudaMalloc@PLT
	movq	%rbp, %rdi
	movl	$262144, %esi
	addq	$8, %rbp
	call	cudaMalloc@PLT
	movq	-8(%rbp), %rdi
	movl	$262144, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	cmpq	$80, %rbx
	jne	.L24
	leaq	40(%rsp), %rdi
	movl	$31457280, %esi
	call	cudaMalloc@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$8388613, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$9, %rdi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	152(%rsp), %rdi
	movl	$655360, %esi
	call	_Z39__device_stub__Z18initialize_weightsPfiPfi
.L25:
	call	cudaDeviceSynchronize@PLT
	movl	$262144, %edi
	xorl	%ebx, %ebx
	call	_Znam@PLT
	movq	%rax, 8(%rsp)
.L26:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC1(%rip), %xmm0
	movq	8(%rsp), %rax
	movss	%xmm0, (%rax,%rbx,4)
	incq	%rbx
	cmpq	$65536, %rbx
	jne	.L26
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$262144, %edx
	movq	%rax, %rsi
	movl	$16777217, %ebx
	call	cudaMemcpy@PLT
	movl	$1000, 28(%rsp)
	salq	$8, %rbx
.L27:
	xorl	%ebp, %ebp
.L32:
	movq	%rbx, 60(%rsp)
	xorl	%r9d, %r9d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movl	$1, 68(%rsp)
	movl	$262144, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, 48(%rsp)
	movl	$1, 56(%rsp)
	testq	%rbp, %rbp
	jne	.L28
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	movq	72(%rsp), %rdx
	movq	152(%rsp), %rsi
	xorl	%ecx, %ecx
	movq	32(%rsp), %rdi
	jmp	.L57
.L28:
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	movq	72(%rsp,%rbp,8), %rdx
	movq	152(%rsp,%rbp,8), %rsi
	movl	%ebp, %ecx
	movq	64(%rsp,%rbp,8), %rdi
.L57:
	call	_Z37__device_stub__Z12forward_passPfS_S_iPfS_S_i
.L30:
	call	cudaDeviceSynchronize@PLT
	incq	%rbp
	cmpq	$10, %rbp
	jne	.L32
	movq	16(%rsp), %rbp
	movl	$9, %r15d
.L42:
	movl	%r15d, %r10d
	cmpl	$9, %r15d
	je	.L33
	movq	160(%rsp,%r15,8), %r8
	movq	80(%rbp), %rdi
	xorl	%edx, %edx
	movq	72(%rsp,%r15,8), %r9
	movq	72(%rbp), %r11
	movss	.LC2(%rip), %xmm3
	jmp	.L34
.L33:
	movq	144(%rsp), %rcx
	movq	304(%rsp), %rdx
	xorl	%eax, %eax
	movss	.LC2(%rip), %xmm4
	movss	.LC3(%rip), %xmm2
.L35:
	movss	(%rcx,%rax), %xmm0
	movaps	%xmm4, %xmm1
	movaps	%xmm0, %xmm3
	mulss	%xmm0, %xmm3
	subss	%xmm2, %xmm0
	subss	%xmm3, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, (%rdx,%rax)
	addq	$4, %rax
	cmpq	$262144, %rax
	jne	.L35
	jmp	.L36
.L37:
	movss	(%rsi), %xmm0
	mulss	(%rax,%rcx,4), %xmm0
	incq	%rcx
	addq	$1024, %rsi
	addss	%xmm0, %xmm1
	cmpq	$256, %rcx
	jne	.L37
	movss	(%r9,%rdx,4), %xmm0
	movaps	%xmm3, %xmm2
	mulss	%xmm0, %xmm0
	subss	%xmm0, %xmm2
	mulss	%xmm1, %xmm2
	movss	%xmm2, (%r11,%rdx,4)
	incq	%rdx
	cmpq	$65536, %rdx
	je	.L38
.L34:
	movzbl	%dl, %eax
	xorl	%ecx, %ecx
	xorps	%xmm1, %xmm1
	leaq	(%r8,%rax,4), %rsi
	movl	%edx, %eax
	sarl	$8, %eax
	cltq
	salq	$10, %rax
	addq	%rdi, %rax
	jmp	.L37
.L38:
	testl	%r10d, %r10d
	jne	.L36
	xorl	%r9d, %r9d
	movl	$262144, %r8d
	movq	%rbx, %rdx
	movq	%rbx, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rbx, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	movq	312(%rsp), %rcx
	movq	152(%rsp), %rdx
	xorl	%r8d, %r8d
	movq	232(%rsp), %rsi
	movq	32(%rsp), %rdi
	jmp	.L58
.L36:
	xorl	%r9d, %r9d
	movl	$262144, %r8d
	movq	%rbx, %rdx
	movq	%rbx, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rbx, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	movq	(%r12,%r15,8), %rcx
	movq	152(%rsp,%r15,8), %rdx
	movl	%r15d, %r8d
	movq	72(%rbp), %rsi
	movq	64(%rsp,%r15,8), %rdi
.L58:
	call	_Z44__device_stub__Z17compute_gradientsPfS_S_S_iPfS_S_S_i
.L40:
	call	cudaDeviceSynchronize@PLT
	decq	%r15
	subq	$8, %rbp
	cmpq	$-1, %r15
	jne	.L42
	xorl	%ebp, %ebp
.L44:
	movl	$8388613, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	salq	$9, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movq	(%r12,%rbp), %rsi
	movq	152(%rsp,%rbp), %rdi
	movl	$65536, %edx
	call	_Z37__device_stub__Z14update_weightsPfS_iPfS_i
.L43:
	call	cudaDeviceSynchronize@PLT
	addq	$8, %rbp
	cmpq	$80, %rbp
	jne	.L44
	decl	28(%rsp)
	jne	.L27
	movq	8(%rsp), %rdi
	xorl	%ebx, %ebx
	call	_ZdaPv@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
.L46:
	movq	(%r14,%rbx), %rdi
	call	cudaFree@PLT
	movq	0(%r13,%rbx), %rdi
	call	cudaFree@PLT
	movq	232(%rsp,%rbx), %rdi
	call	cudaFree@PLT
	movq	(%r12,%rbx), %rdi
	addq	$8, %rbx
	call	cudaFree@PLT
	cmpq	$80, %rbx
	jne	.L46
	movq	392(%rsp), %rax
	subq	%fs:40, %rax
	je	.L47
	call	__stack_chk_fail@PLT
.L47:
	addq	$408, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3849:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"_Z14update_weightsPfS_i"
.LC5:
	.string	"_Z17compute_gradientsPfS_S_S_i"
.LC6:
	.string	"_Z12forward_passPfS_S_i"
.LC7:
	.string	"_Z18initialize_weightsPfi"
.LC8:
	.string	"precalc_xorwow_matrix"
.LC9:
	.string	"precalc_xorwow_offset_matrix"
.LC10:
	.string	"mrg32k3aM1"
.LC11:
	.string	"mrg32k3aM2"
.LC12:
	.string	"mrg32k3aM1SubSeq"
.LC13:
	.string	"mrg32k3aM2SubSeq"
.LC14:
	.string	"mrg32k3aM1Seq"
.LC15:
	.string	"mrg32k3aM2Seq"
.LC16:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3883:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14update_weightsPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17compute_gradientsPfS_S_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12forward_passPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z18initialize_weightsPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3883:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	805306368
	.align 4
.LC2:
	.long	1065353216
	.align 4
.LC3:
	.long	1056964608
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
#include <cassert>

#define LAYERS 10
#define NEURONS 256
#define BATCH_SIZE 256
#define LEARNING_RATE 0.01f
#define ITERATIONS 1000

__global__ void initialize_weights(float *weights, int size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < size) {
        hiprandState state;
        hiprand_init(idx, 0, 0, &state);
        weights[idx] = hiprand_normal(&state) * 0.01f;
    }
}

__global__ void forward_pass(float *inputs, float *weights, float *outputs, int layer) {
    extern __shared__ float shared_weights[];
    int neuron_idx = threadIdx.x;
    int batch_idx = blockIdx.x;

    // Load weights into shared memory
    for (int i = neuron_idx; i < NEURONS * NEURONS; i += blockDim.x) {
        shared_weights[i] = weights[layer * NEURONS * NEURONS + i];
    }
    __syncthreads();

    // Perform matrix-vector multiplication
    float sum = 0.0f;
    for (int k = 0; k < NEURONS; ++k) {
        sum += shared_weights[neuron_idx * NEURONS + k] * inputs[batch_idx * NEURONS + k];
    }
    outputs[batch_idx * NEURONS + neuron_idx] = tanh(sum);
}

__global__ void compute_gradients(float *outputs, float *deltas, float *weights, float *gradients, int layer) {
    extern __shared__ float shared_weights[];
    int neuron_idx = threadIdx.x;
    int batch_idx = blockIdx.x;

    // Load weights into shared memory
    for (int i = neuron_idx; i < NEURONS * NEURONS; i += blockDim.x) {
        shared_weights[i] = weights[layer * NEURONS * NEURONS + i];
    }
    __syncthreads();

    // Compute gradients for weights
    for (int k = 0; k < NEURONS; ++k) {
        gradients[layer * NEURONS * NEURONS + neuron_idx * NEURONS + k] += 
            deltas[batch_idx * NEURONS + neuron_idx] * outputs[batch_idx * NEURONS + k];
    }
}

__global__ void update_weights(float *weights, float *gradients, int size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < size) {
        weights[idx] -= LEARNING_RATE * gradients[idx];
        gradients[idx] = 0.0f; // Reset gradient
    }
}

int main() {
    float *d_inputs, *d_outputs[LAYERS], *d_weights[LAYERS], *d_deltas[LAYERS], *d_gradients[LAYERS];
    size_t input_size = BATCH_SIZE * NEURONS * sizeof(float);
    size_t layer_size = NEURONS * NEURONS * sizeof(float);
    size_t delta_size = BATCH_SIZE * NEURONS * sizeof(float);

    // Allocate memory
    hipMalloc(&d_inputs, input_size);
    for (int i = 0; i < LAYERS; ++i) {
        hipMalloc(&d_outputs[i], input_size);
        hipMalloc(&d_weights[i], layer_size);
        hipMalloc(&d_deltas[i], delta_size);
        hipMalloc(&d_gradients[i], layer_size);
        hipMemset(d_gradients[i], 0, layer_size);
    }

    // Initialize weights
    int threads_per_block = 256;
    int blocks_per_grid = (NEURONS * NEURONS * LAYERS + threads_per_block - 1) / threads_per_block;
    hiprandState *d_state;
    hipMalloc(&d_state, blocks_per_grid * threads_per_block * sizeof(hiprandState));
    initialize_weights<<<blocks_per_grid, threads_per_block>>>(d_weights[0], NEURONS * NEURONS * LAYERS);
    hipDeviceSynchronize();

    // Initialize inputs (random data for demonstration)
    float *h_inputs = new float[BATCH_SIZE * NEURONS];
    for (int i = 0; i < BATCH_SIZE * NEURONS; ++i) {
        h_inputs[i] = static_cast<float>(rand()) / RAND_MAX;
    }
    hipMemcpy(d_inputs, h_inputs, input_size, hipMemcpyHostToDevice);

    // Training loop
    for (int iter = 0; iter < ITERATIONS; ++iter) {
        // Forward pass
        for (int layer = 0; layer < LAYERS; ++layer) {
            int shared_mem_size = NEURONS * NEURONS * sizeof(float);
            if (layer == 0) {
                forward_pass<<<BATCH_SIZE, NEURONS, shared_mem_size>>>(d_inputs, d_weights[layer], d_outputs[layer], layer);
            } else {
                forward_pass<<<BATCH_SIZE, NEURONS, shared_mem_size>>>(d_outputs[layer - 1], d_weights[layer], d_outputs[layer], layer);
            }
            hipDeviceSynchronize();
        }

        // Backward pass (simplified, assumes output layer error is computed elsewhere)
        for (int layer = LAYERS - 1; layer >= 0; --layer) {
            if (layer == LAYERS - 1) {
                // Compute deltas for output layer (example: assuming MSE loss and tanh activation)
                for (int i = 0; i < BATCH_SIZE * NEURONS; ++i) {
                    float target = 0.5f; // Example target
                    float output = d_outputs[layer][i];
                    d_deltas[layer][i] = (output - target) * (1.0f - output * output);
                }
            } else {
                // Compute deltas for hidden layers
                for (int i = 0; i < BATCH_SIZE * NEURONS; ++i) {
                    float sum = 0.0f;
                    for (int j = 0; j < NEURONS; ++j) {
                        sum += d_weights[layer + 1][j * NEURONS + (i % NEURONS)] * d_deltas[layer + 1][i / NEURONS * NEURONS + j];
                    }
                    float output = d_outputs[layer][i];
                    d_deltas[layer][i] = sum * (1.0f - output * output);
                }
            }

            // Compute gradients
            int shared_mem_size = NEURONS * NEURONS * sizeof(float);
            if (layer == 0) {
                compute_gradients<<<BATCH_SIZE, NEURONS, shared_mem_size>>>(d_inputs, d_deltas[layer], d_weights[layer], d_gradients[layer], layer);
            } else {
                compute_gradients<<<BATCH_SIZE, NEURONS, shared_mem_size>>>(d_outputs[layer - 1], d_deltas[layer], d_weights[layer], d_gradients[layer], layer);
            }
            hipDeviceSynchronize();
        }

        // Update weights
        for (int layer = 0; layer < LAYERS; ++layer) {
            update_weights<<<blocks_per_grid, threads_per_block>>>(d_weights[layer], d_gradients[layer], NEURONS * NEURONS);
            hipDeviceSynchronize();
        }
    }

    // Cleanup
    delete[] h_inputs;
    hipFree(d_inputs);
    for (int i = 0; i < LAYERS; ++i) {
        hipFree(d_outputs[i]);
        hipFree(d_weights[i]);
        hipFree(d_deltas[i]);
        hipFree(d_gradients[i]);
    }

    return 0;
}
	.text
	.file	"cuda_code_056763.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__initialize_weightsPfi # -- Begin function _Z33__device_stub__initialize_weightsPfi
	.type	_Z33__device_stub__initialize_weightsPfi,@function
_Z33__device_stub__initialize_weightsPfi: # @_Z33__device_stub__initialize_weightsPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18initialize_weightsPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__initialize_weightsPfi, .Lfunc_end0-_Z33__device_stub__initialize_weightsPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__forward_passPfS_S_i # -- Begin function _Z27__device_stub__forward_passPfS_S_i
	.type	_Z27__device_stub__forward_passPfS_S_i,@function
_Z27__device_stub__forward_passPfS_S_i: # @_Z27__device_stub__forward_passPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12forward_passPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__forward_passPfS_S_i, .Lfunc_end1-_Z27__device_stub__forward_passPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__compute_gradientsPfS_S_S_i # -- Begin function _Z32__device_stub__compute_gradientsPfS_S_S_i
	.type	_Z32__device_stub__compute_gradientsPfS_S_S_i,@function
_Z32__device_stub__compute_gradientsPfS_S_S_i: # @_Z32__device_stub__compute_gradientsPfS_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17compute_gradientsPfS_S_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z32__device_stub__compute_gradientsPfS_S_S_i, .Lfunc_end2-_Z32__device_stub__compute_gradientsPfS_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__update_weightsPfS_i # -- Begin function _Z29__device_stub__update_weightsPfS_i
	.type	_Z29__device_stub__update_weightsPfS_i,@function
_Z29__device_stub__update_weightsPfS_i: # @_Z29__device_stub__update_weightsPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14update_weightsPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z29__device_stub__update_weightsPfS_i, .Lfunc_end3-_Z29__device_stub__update_weightsPfS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI4_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI4_1:
	.long	0x3f800000                      # float 1
.LCPI4_2:
	.long	0xbf000000                      # float -0.5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$336, %rsp                      # imm = 0x150
	.cfi_def_cfa_offset 384
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsp, %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	xorl	%r14d, %r14d
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	leaq	(%rsp,%r14), %rdi
	addq	$96, %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	leaq	(%rsp,%r14), %rdi
	addq	$16, %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	leaq	(%rsp,%r14), %rdi
	addq	$176, %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	leaq	(%rsp,%r14), %rbx
	addq	$256, %rbx                      # imm = 0x100
	movl	$262144, %esi                   # imm = 0x40000
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	xorl	%esi, %esi
	callq	hipMemset
	addq	$8, %r14
	cmpq	$80, %r14
	jne	.LBB4_1
# %bb.2:
	movabsq	$4294967552, %rbx               # imm = 0x100000100
	leaq	8(%rsp), %rdi
	movl	$31457280, %esi                 # imm = 0x1E00000
	callq	hipMalloc
	leaq	2304(%rbx), %r14
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_4
# %bb.3:
	movq	16(%rsp), %rdi
	movl	$655360, %esi                   # imm = 0xA0000
	callq	_Z33__device_stub__initialize_weightsPfi
.LBB4_4:
	callq	hipDeviceSynchronize
	movl	$262144, %edi                   # imm = 0x40000
	callq	_Znam
	movq	%rax, %r15
	xorl	%r12d, %r12d
.LBB4_5:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpq	$65536, %r12                    # imm = 0x10000
	jne	.LBB4_5
# %bb.6:
	movq	(%rsp), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%r13d, %r13d
.LBB4_7:                                # %.preheader170
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_8 Depth 2
                                        #     Child Loop BB4_16 Depth 2
                                        #       Child Loop BB4_18 Depth 3
                                        #         Child Loop BB4_19 Depth 4
                                        #       Child Loop BB4_22 Depth 3
                                        #     Child Loop BB4_27 Depth 2
	xorl	%r12d, %r12d
.LBB4_8:                                #   Parent Loop BB4_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$262144, %r8d                   # imm = 0x40000
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testq	%r12, %r12
	je	.LBB4_9
# %bb.11:                               #   in Loop: Header=BB4_8 Depth=2
	testl	%eax, %eax
	jne	.LBB4_14
# %bb.12:                               #   in Loop: Header=BB4_8 Depth=2
	movq	16(%rsp,%r12,8), %rsi
	movq	88(%rsp,%r12,8), %rdi
	movq	96(%rsp,%r12,8), %rdx
	movl	%r12d, %ecx
	jmp	.LBB4_13
.LBB4_9:                                #   in Loop: Header=BB4_8 Depth=2
	testl	%eax, %eax
	jne	.LBB4_14
# %bb.10:                               #   in Loop: Header=BB4_8 Depth=2
	movq	(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	96(%rsp), %rdx
	xorl	%ecx, %ecx
.LBB4_13:                               #   in Loop: Header=BB4_8 Depth=2
	callq	_Z27__device_stub__forward_passPfS_S_i
.LBB4_14:                               #   in Loop: Header=BB4_8 Depth=2
	callq	hipDeviceSynchronize
	incq	%r12
	cmpq	$10, %r12
	jne	.LBB4_8
# %bb.15:                               # %.preheader169.preheader
                                        #   in Loop: Header=BB4_7 Depth=1
	movl	$9, %r12d
.LBB4_16:                               # %.preheader169
                                        #   Parent Loop BB4_7 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_18 Depth 3
                                        #         Child Loop BB4_19 Depth 4
                                        #       Child Loop BB4_22 Depth 3
	cmpq	$9, %r12
	movss	.LCPI4_2(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	movss	.LCPI4_1(%rip), %xmm4           # xmm4 = mem[0],zero,zero,zero
	jne	.LBB4_17
# %bb.21:                               # %.preheader165
                                        #   in Loop: Header=BB4_16 Depth=2
	movq	168(%rsp), %rax
	movq	248(%rsp), %rcx
	xorl	%edx, %edx
.LBB4_22:                               #   Parent Loop BB4_7 Depth=1
                                        #     Parent Loop BB4_16 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rax,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movaps	%xmm0, %xmm1
	addss	%xmm3, %xmm1
	mulss	%xmm0, %xmm0
	movaps	%xmm4, %xmm2
	subss	%xmm0, %xmm2
	mulss	%xmm1, %xmm2
	movss	%xmm2, (%rcx,%rdx,4)
	incq	%rdx
	cmpq	$65536, %rdx                    # imm = 0x10000
	jne	.LBB4_22
	jmp	.LBB4_23
.LBB4_17:                               # %.preheader166
                                        #   in Loop: Header=BB4_16 Depth=2
	movq	24(%rsp,%r12,8), %rax
	movq	176(%rsp,%r12,8), %rcx
	movq	184(%rsp,%r12,8), %rdx
	movq	96(%rsp,%r12,8), %rsi
	xorl	%edi, %edi
.LBB4_18:                               # %.preheader
                                        #   Parent Loop BB4_7 Depth=1
                                        #     Parent Loop BB4_16 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB4_19 Depth 4
	movzbl	%dil, %r8d
	leaq	(%rax,%r8,4), %r8
	movq	%rdi, %r9
	andq	$-256, %r9
	leaq	(%rdx,%r9,4), %r9
	xorps	%xmm0, %xmm0
	xorl	%r10d, %r10d
.LBB4_19:                               #   Parent Loop BB4_7 Depth=1
                                        #     Parent Loop BB4_16 Depth=2
                                        #       Parent Loop BB4_18 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movss	(%r8), %xmm1                    # xmm1 = mem[0],zero,zero,zero
	mulss	(%r9,%r10,4), %xmm1
	addss	%xmm1, %xmm0
	incq	%r10
	addq	$1024, %r8                      # imm = 0x400
	cmpq	$256, %r10                      # imm = 0x100
	jne	.LBB4_19
# %bb.20:                               #   in Loop: Header=BB4_18 Depth=3
	movss	(%rsi,%rdi,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm1
	movaps	%xmm4, %xmm2
	subss	%xmm1, %xmm2
	mulss	%xmm2, %xmm0
	movss	%xmm0, (%rcx,%rdi,4)
	incq	%rdi
	cmpq	$65536, %rdi                    # imm = 0x10000
	jne	.LBB4_18
.LBB4_23:                               # %.loopexit
                                        #   in Loop: Header=BB4_16 Depth=2
	movl	$262144, %r8d                   # imm = 0x40000
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testq	%r12, %r12
	je	.LBB4_24
# %bb.34:                               #   in Loop: Header=BB4_16 Depth=2
	testl	%eax, %eax
	jne	.LBB4_36
# %bb.35:                               #   in Loop: Header=BB4_16 Depth=2
	movq	88(%rsp,%r12,8), %rdi
	movq	176(%rsp,%r12,8), %rsi
	movq	16(%rsp,%r12,8), %rdx
	movq	256(%rsp,%r12,8), %rcx
	movl	%r12d, %r8d
	callq	_Z32__device_stub__compute_gradientsPfS_S_S_i
.LBB4_36:                               #   in Loop: Header=BB4_16 Depth=2
	callq	hipDeviceSynchronize
	decq	%r12
	jmp	.LBB4_16
.LBB4_24:                               #   in Loop: Header=BB4_7 Depth=1
	testl	%eax, %eax
	jne	.LBB4_26
# %bb.25:                               #   in Loop: Header=BB4_7 Depth=1
	movq	(%rsp), %rdi
	movq	176(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	256(%rsp), %rcx
	xorl	%r8d, %r8d
	callq	_Z32__device_stub__compute_gradientsPfS_S_S_i
.LBB4_26:                               # %.preheader168.preheader
                                        #   in Loop: Header=BB4_7 Depth=1
	callq	hipDeviceSynchronize
	xorl	%r12d, %r12d
.LBB4_27:                               # %.preheader168
                                        #   Parent Loop BB4_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_29
# %bb.28:                               #   in Loop: Header=BB4_27 Depth=2
	movq	16(%rsp,%r12,8), %rdi
	movq	256(%rsp,%r12,8), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	callq	_Z29__device_stub__update_weightsPfS_i
.LBB4_29:                               #   in Loop: Header=BB4_27 Depth=2
	callq	hipDeviceSynchronize
	incq	%r12
	cmpq	$10, %r12
	jne	.LBB4_27
# %bb.30:                               #   in Loop: Header=BB4_7 Depth=1
	incl	%r13d
	cmpl	$1000, %r13d                    # imm = 0x3E8
	jne	.LBB4_7
# %bb.31:
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%ebx, %ebx
.LBB4_32:                               # =>This Inner Loop Header: Depth=1
	movq	96(%rsp,%rbx,8), %rdi
	callq	hipFree
	movq	16(%rsp,%rbx,8), %rdi
	callq	hipFree
	movq	176(%rsp,%rbx,8), %rdi
	callq	hipFree
	movq	256(%rsp,%rbx,8), %rdi
	callq	hipFree
	incq	%rbx
	cmpq	$10, %rbx
	jne	.LBB4_32
# %bb.33:
	xorl	%eax, %eax
	addq	$336, %rsp                      # imm = 0x150
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18initialize_weightsPfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12forward_passPfS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17compute_gradientsPfS_S_S_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14update_weightsPfS_i, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18initialize_weightsPfi,@object # @_Z18initialize_weightsPfi
	.section	.rodata,"a",@progbits
	.globl	_Z18initialize_weightsPfi
	.p2align	3, 0x0
_Z18initialize_weightsPfi:
	.quad	_Z33__device_stub__initialize_weightsPfi
	.size	_Z18initialize_weightsPfi, 8

	.type	_Z12forward_passPfS_S_i,@object # @_Z12forward_passPfS_S_i
	.globl	_Z12forward_passPfS_S_i
	.p2align	3, 0x0
_Z12forward_passPfS_S_i:
	.quad	_Z27__device_stub__forward_passPfS_S_i
	.size	_Z12forward_passPfS_S_i, 8

	.type	_Z17compute_gradientsPfS_S_S_i,@object # @_Z17compute_gradientsPfS_S_S_i
	.globl	_Z17compute_gradientsPfS_S_S_i
	.p2align	3, 0x0
_Z17compute_gradientsPfS_S_S_i:
	.quad	_Z32__device_stub__compute_gradientsPfS_S_S_i
	.size	_Z17compute_gradientsPfS_S_S_i, 8

	.type	_Z14update_weightsPfS_i,@object # @_Z14update_weightsPfS_i
	.globl	_Z14update_weightsPfS_i
	.p2align	3, 0x0
_Z14update_weightsPfS_i:
	.quad	_Z29__device_stub__update_weightsPfS_i
	.size	_Z14update_weightsPfS_i, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z18initialize_weightsPfi"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12forward_passPfS_S_i"
	.size	.L__unnamed_2, 24

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z17compute_gradientsPfS_S_S_i"
	.size	.L__unnamed_3, 31

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z14update_weightsPfS_i"
	.size	.L__unnamed_4, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__initialize_weightsPfi
	.addrsig_sym _Z27__device_stub__forward_passPfS_S_i
	.addrsig_sym _Z32__device_stub__compute_gradientsPfS_S_S_i
	.addrsig_sym _Z29__device_stub__update_weightsPfS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18initialize_weightsPfi
	.addrsig_sym _Z12forward_passPfS_S_i
	.addrsig_sym _Z17compute_gradientsPfS_S_S_i
	.addrsig_sym _Z14update_weightsPfS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18initialize_weightsPfi ; -- Begin function _Z18initialize_weightsPfi
	.globl	_Z18initialize_weightsPfi
	.p2align	8
	.type	_Z18initialize_weightsPfi,@function
_Z18initialize_weightsPfi:              ; @_Z18initialize_weightsPfi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:                                ; %_Z14hiprand_normalI12hiprandStateEfPT_.exit
	v_xor_b32_e32 v0, 0x2c7f967f, v1
	v_cmp_lt_i32_e32 vcc_lo, -1, v1
	s_load_b64 s[0:1], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, 0x493c4aa1, v0
	v_add_nc_u32_e32 v2, 0x75bcd15, v0
	v_add_nc_u32_e32 v4, 0x583f19, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v3, 2, v2
	v_lshlrev_b32_e32 v5, 4, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v3, v2
	v_dual_mov_b32 v3, 0x8a5d614f :: v_dual_lshlrev_b32 v6, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, 0xfa091aa4, v3, vcc_lo
	v_xor_b32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add3_u32 v3, v0, v3, 0x64f0c9
	v_xor_b32_e32 v0, 0x159a55e5, v0
	v_xor3_b32 v2, v5, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v4, v3, v2, 0x587c5
	v_cvt_f32_u32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v4, 0x2f800000, v4, 0x2f800000
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v4
	v_cndmask_b32_e64 v5, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v4, v5
	v_log_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v5, 0x3f317217, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, 0x3f317217, v4, -v5
	v_fmamk_f32 v6, v4, 0x3377d1cf, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v5, v5, v6
	v_cndmask_b32_e64 v6, 0, 0x41b17218, vcc_lo
	v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v4|
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	v_lshrrev_b32_e32 v5, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v5, v0
	v_dual_sub_f32 v4, v4, v6 :: v_dual_lshlrev_b32 v5, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, -2.0, v4
	v_mul_f32_e32 v6, 0x4f800000, v4
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v4, v6, vcc_lo
	v_lshlrev_b32_e32 v6, 4, v2
	v_sqrt_f32_e32 v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v5, v6
	v_xor3_b32 v0, v5, v0, v2
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v2, -1, v7
	v_add3_u32 v0, v3, v0, 0xb0f8a
	v_add_nc_u32_e32 v3, 1, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v5, -v2, v7, v4
	v_cvt_f32_u32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v6, -v3, v7, v4
	v_cmp_ge_f32_e64 s2, 0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v0, 0x30c90fdb, v0, 0x30c90fdb
	v_cndmask_b32_e64 v2, v7, v2, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_f32_e64 s2, 0, v6
	v_mul_f32_e32 v0, 0.15915494, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v2, v2, v3, s2
	v_sin_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, 0x37800000, v2
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v4, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v2, v4, vcc_lo
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, v3, v0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_mul_f32_e32 v2, 0x3c23d70a, v3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18initialize_weightsPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18initialize_weightsPfi, .Lfunc_end0-_Z18initialize_weightsPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 620
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12forward_passPfS_S_i ; -- Begin function _Z12forward_passPfS_S_i
	.globl	_Z12forward_passPfS_S_i
	.p2align	8
	.type	_Z12forward_passPfS_S_i,@function
_Z12forward_passPfS_S_i:                ; @_Z12forward_passPfS_S_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s8, s[0:1], 0x2c
	v_lshl_add_u32 v3, v0, 2, 0
	v_mov_b32_e32 v4, v0
	s_waitcnt lgkmcnt(0)
	s_lshl_b32 s9, s2, 16
	s_load_b64 s[2:3], s[0:1], 0x10
	s_ashr_i32 s0, s9, 31
	v_or_b32_e32 v1, s9, v0
	v_mov_b32_e32 v2, s0
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	s_and_b32 s6, s8, 0xffff
	s_lshl_b32 s7, s6, 2
.LBB1_1:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[1:2], off
	v_add_nc_u32_e32 v4, s6, v4
	v_add_co_u32 v1, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e64 s0, 0xffff, v4
	s_or_b32 s1, s0, s1
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v5
	v_add_nc_u32_e32 v3, s7, v3
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_1
; %bb.2:
	s_or_b32 exec_lo, exec_lo, s1
	s_lshl_b32 s0, s15, 8
	v_lshl_add_u32 v2, v0, 10, 0
	s_ashr_i32 s1, s0, 31
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[6:7], s[0:1], 2
	s_mov_b32 s1, 0
	s_add_u32 s4, s4, s6
	s_addc_u32 s5, s5, s7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v3, s1, v2
	s_load_b32 s6, s[4:5], 0x0
	s_add_i32 s1, s1, 4
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	ds_load_b32 v3, v3
	s_cmpk_eq_i32 s1, 0x400
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v1, s6, v3
	s_cbranch_scc0 .LBB1_3
; %bb.4:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ngt_f32_e64 s1, 0x3f200000, |v1|
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s4, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s4
	s_cbranch_execz .LBB1_6
; %bb.5:
	v_add_f32_e64 v2, |v1|, |v1|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v3, 0x3fb8aa3b, v2
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v2
	v_rndne_f32_e32 v4, v3
	v_fma_f32 v5, 0x3fb8aa3b, v2, -v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v3, v3, v4
	v_fmamk_f32 v5, v2, 0x32a5705f, v5
	v_cvt_i32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v5
	v_exp_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v2
	v_cndmask_b32_e32 v2, 0x7f800000, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, 1.0, v2
	v_rcp_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v2, v2, -2.0, 1.0
.LBB1_6:                                ; %Flow
	s_and_not1_saveexec_b32 s1, s1
; %bb.7:
	v_mul_f32_e32 v2, v1, v1
	s_mov_b32 s4, 0xbbbac73d
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fmaak_f32 v3, s4, v2, 0x3ca908c9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v3, v2, v3, 0xbd5c1c4e
	v_fmaak_f32 v3, v2, v3, 0x3e088382
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v3, v2, v3, 0xbeaaaa99
	v_mul_f32_e64 v3, |v1|, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v2, v2, v3, |v1|
; %bb.8:                                ; %_ZL4tanhf.exit
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v3, s0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfi_b32 v2, 0x7fffffff, v2, v1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v0, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v4, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12forward_passPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12forward_passPfS_S_i, .Lfunc_end1-_Z12forward_passPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 608
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17compute_gradientsPfS_S_S_i ; -- Begin function _Z17compute_gradientsPfS_S_S_i
	.globl	_Z17compute_gradientsPfS_S_S_i
	.p2align	8
	.type	_Z17compute_gradientsPfS_S_S_i,@function
_Z17compute_gradientsPfS_S_S_i:         ; @_Z17compute_gradientsPfS_S_S_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x20
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x34
	v_lshl_add_u32 v3, v0, 2, 0
	v_mov_b32_e32 v4, v0
	s_waitcnt lgkmcnt(0)
	s_lshl_b32 s1, s2, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_ashr_i32 s2, s1, 31
	v_or_b32_e32 v1, s1, v0
	v_mov_b32_e32 v2, s2
	s_and_b32 s3, s0, 0xffff
	s_mov_b32 s2, 0
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s8, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	s_lshl_b32 s8, s3, 2
.LBB2_1:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[1:2], off
	v_add_nc_u32_e32 v4, s3, v4
	v_add_co_u32 v1, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e64 s0, 0xffff, v4
	s_or_b32 s2, s0, s2
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v5
	v_add_nc_u32_e32 v3, s8, v3
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB2_1
; %bb.2:
	s_or_b32 exec_lo, exec_lo, s2
	v_lshl_add_u32 v1, v0, 8, s1
	s_lshl_b32 s0, s15, 8
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, s0, v0
	s_ashr_i32 s1, s0, 31
	v_ashrrev_i32_e32 v2, 31, v1
	s_lshl_b64 s[0:1], s[0:1], 2
	s_barrier
	v_ashrrev_i32_e32 v4, 31, v3
	s_add_u32 s2, s4, s0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_addc_u32 s3, s5, s1
	s_mov_b64 s[0:1], 0
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	buffer_gl0_inv
	v_add_co_u32 v2, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v4
	v_mov_b32_e32 v4, 0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v5, vcc_lo
.LBB2_3:                                ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v5, vcc_lo, v2, s0
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v3, vcc_lo
	s_add_u32 s4, s2, s0
	s_addc_u32 s5, s3, s1
	global_load_b32 v7, v[0:1], off
	global_load_b32 v8, v4, s[4:5]
	global_load_b32 v9, v[5:6], off
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_eq_i32 s0, 0x400
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v9, v7, v8
	global_store_b32 v[5:6], v9, off
	s_cbranch_scc0 .LBB2_3
; %bb.4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17compute_gradientsPfS_S_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z17compute_gradientsPfS_S_S_i, .Lfunc_end2-_Z17compute_gradientsPfS_S_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 368
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14update_weightsPfS_i ; -- Begin function _Z14update_weightsPfS_i
	.globl	_Z14update_weightsPfS_i
	.p2align	8
	.type	_Z14update_weightsPfS_i,@function
_Z14update_weightsPfS_i:                ; @_Z14update_weightsPfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v4, v[2:3], off
	global_load_b32 v5, v[0:1], off
	s_waitcnt vmcnt(0)
	v_dual_fmamk_f32 v4, v4, 0xbc23d70a, v5 :: v_dual_mov_b32 v5, 0
	global_store_b32 v[0:1], v4, off
	global_store_b32 v[2:3], v5, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14update_weightsPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z14update_weightsPfS_i, .Lfunc_end3-_Z14update_weightsPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
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...

	.end_amdgpu_metadata
