#include <iostream>
#include <cuda_runtime.h>
#include <cmath>

// Constants
#define N 512
#define DT 0.001f
#define EPSILON 1e-5f

// Kernel to calculate forces using Lennard-Jones potential
__global__ void calculateForces(float4 *pos, float4 *f, float4 *a, float4 *a_prev) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= N) return;

    float4 force = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    float4 pos_i = pos[idx];

    for (int j = 0; j < N; ++j) {
        if (idx != j) {
            float4 pos_j = pos[j];
            float dx = pos_j.x - pos_i.x;
            float dy = pos_j.y - pos_i.y;
            float dz = pos_j.z - pos_i.z;
            float r2 = dx * dx + dy * dy + dz * dz + EPSILON;
            float r6 = r2 * r2 * r2;
            float r12 = r6 * r6;
            float factor = 24.0f * (2.0f / r12 - 1.0f / r6) / r2;
            force.x += factor * dx;
            force.y += factor * dy;
            force.z += factor * dz;
        }
    }

    f[idx] = force;
}

// Kernel to update positions and velocities using Beeman's algorithm
__global__ void updateParticles(float4 *pos, float4 *v, float4 *a, float4 *a_prev) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= N) return;

    float4 pos_i = pos[idx];
    float4 v_i = v[idx];
    float4 a_i = a[idx];
    float4 a_prev_i = a_prev[idx];

    // Update positions
    pos_i.x += v_i.x * DT + (4.0f / 3.0f * a_i.x - 1.0f / 6.0f * a_prev_i.x) * DT * DT;
    pos_i.y += v_i.y * DT + (4.0f / 3.0f * a_i.y - 1.0f / 6.0f * a_prev_i.y) * DT * DT;
    pos_i.z += v_i.z * DT + (4.0f / 3.0f * a_i.z - 1.0f / 6.0f * a_prev_i.z) * DT * DT;

    // Update velocities
    v_i.x += (3.0f / 2.0f * a_i.x - 1.0f / 2.0f * a_prev_i.x) * DT;
    v_i.y += (3.0f / 2.0f * a_i.y - 1.0f / 2.0f * a_prev_i.y) * DT;
    v_i.z += (3.0f / 2.0f * a_i.z - 1.0f / 2.0f * a_prev_i.z) * DT;

    // Store updated values
    pos[idx] = pos_i;
    v[idx] = v_i;
}

// Main function
int main() {
    // Allocate Unified Memory for particle positions, velocities, and accelerations
    float4 *pos, *v, *a, *a_prev, *f;
    cudaMallocManaged(&pos, N * sizeof(float4));
    cudaMallocManaged(&v, N * sizeof(float4));
    cudaMallocManaged(&a, N * sizeof(float4));
    cudaMallocManaged(&a_prev, N * sizeof(float4));
    cudaMallocManaged(&f, N * sizeof(float4));

    // Initialize positions and velocities
    for (int i = 0; i < N; ++i) {
        pos[i] = make_float4(static_cast<float>(i) / N, 0.0f, 0.0f, 0.0f);
        v[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
        a[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
        a_prev[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    }

    // Number of blocks and threads per block
    int threadsPerBlock = 256;
    int blocksPerGrid = (N + threadsPerBlock - 1) / threadsPerBlock;

    // Simulate for a number of steps
    int steps = 100;
    for (int step = 0; step < steps; ++step) {
        // Calculate forces
        calculateForces<<<blocksPerGrid, threadsPerBlock>>>(pos, f, a, a_prev);
        cudaDeviceSynchronize();

        // Update positions and velocities
        updateParticles<<<blocksPerGrid, threadsPerBlock>>>(pos, v, a, a_prev);
        cudaDeviceSynchronize();

        // Update accelerations
        for (int i = 0; i < N; ++i) {
            a_prev[i] = a[i];
            a[i] = f[i];
        }
    }

    // Check for errors
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Free Unified Memory
    cudaFree(pos);
    cudaFree(v);
    cudaFree(a);
    cudaFree(a_prev);
    cudaFree(f);

    return 0;
}
	.file	"tmpxft_000d9abb_00000000-6_cuda_code_008460.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z50__device_stub__Z15calculateForcesP6float4S0_S0_S0_P6float4S0_S0_S0_
	.type	_Z50__device_stub__Z15calculateForcesP6float4S0_S0_S0_P6float4S0_S0_S0_, @function
_Z50__device_stub__Z15calculateForcesP6float4S0_S0_S0_P6float4S0_S0_S0_:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15calculateForcesP6float4S0_S0_S0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z50__device_stub__Z15calculateForcesP6float4S0_S0_S0_P6float4S0_S0_S0_, .-_Z50__device_stub__Z15calculateForcesP6float4S0_S0_S0_P6float4S0_S0_S0_
	.globl	_Z15calculateForcesP6float4S0_S0_S0_
	.type	_Z15calculateForcesP6float4S0_S0_S0_, @function
_Z15calculateForcesP6float4S0_S0_S0_:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z15calculateForcesP6float4S0_S0_S0_P6float4S0_S0_S0_
	.cfi_endproc
.LFE3661:
	.size	_Z15calculateForcesP6float4S0_S0_S0_, .-_Z15calculateForcesP6float4S0_S0_S0_
	.globl	_Z50__device_stub__Z15updateParticlesP6float4S0_S0_S0_P6float4S0_S0_S0_
	.type	_Z50__device_stub__Z15updateParticlesP6float4S0_S0_S0_P6float4S0_S0_S0_, @function
_Z50__device_stub__Z15updateParticlesP6float4S0_S0_S0_P6float4S0_S0_S0_:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15updateParticlesP6float4S0_S0_S0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z50__device_stub__Z15updateParticlesP6float4S0_S0_S0_P6float4S0_S0_S0_, .-_Z50__device_stub__Z15updateParticlesP6float4S0_S0_S0_P6float4S0_S0_S0_
	.globl	_Z15updateParticlesP6float4S0_S0_S0_
	.type	_Z15updateParticlesP6float4S0_S0_S0_, @function
_Z15updateParticlesP6float4S0_S0_S0_:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z15updateParticlesP6float4S0_S0_S0_P6float4S0_S0_S0_
	.cfi_endproc
.LFE3663:
	.size	_Z15updateParticlesP6float4S0_S0_S0_, .-_Z15updateParticlesP6float4S0_S0_S0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"CUDA error: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$1, %edx
	movl	$8192, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMallocManaged@PLT
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	movl	$8192, %esi
	call	cudaMallocManaged@PLT
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	movl	$8192, %esi
	call	cudaMallocManaged@PLT
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	movl	$8192, %esi
	call	cudaMallocManaged@PLT
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	movl	$8192, %esi
	call	cudaMallocManaged@PLT
	movq	8(%rsp), %r8
	xorl	%eax, %eax
	xorl	%edx, %edx
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rcx
	movss	.LC0(%rip), %xmm1
.L14:
	movl	$0x00000000, 4(%r8,%rax)
	cvtsi2ssl	%edx, %xmm0
	incl	%edx
	movl	$0x00000000, 8(%r8,%rax)
	movl	$0x00000000, 12(%r8,%rax)
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r8,%rax)
	movl	$0x00000000, (%rdi,%rax)
	movl	$0x00000000, 4(%rdi,%rax)
	movl	$0x00000000, 8(%rdi,%rax)
	movl	$0x00000000, 12(%rdi,%rax)
	movl	$0x00000000, (%rsi,%rax)
	movl	$0x00000000, 4(%rsi,%rax)
	movl	$0x00000000, 8(%rsi,%rax)
	movl	$0x00000000, 12(%rsi,%rax)
	movl	$0x00000000, (%rcx,%rax)
	movl	$0x00000000, 4(%rcx,%rax)
	movl	$0x00000000, 8(%rcx,%rax)
	movl	$0x00000000, 12(%rcx,%rax)
	addq	$16, %rax
	cmpl	$512, %edx
	jne	.L14
	movl	$16777217, %ebx
	movl	$2147483649, %ebp
	movl	$100, %r12d
	salq	$8, %rbx
	addq	%rbp, %rbp
.L18:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rbp, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z50__device_stub__Z15calculateForcesP6float4S0_S0_S0_P6float4S0_S0_S0_
.L15:
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rbp, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z50__device_stub__Z15updateParticlesP6float4S0_S0_S0_P6float4S0_S0_S0_
.L16:
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	32(%rsp), %rsi
	xorl	%eax, %eax
	movq	40(%rsp), %rcx
.L17:
	movaps	(%rdx,%rax), %xmm2
	movaps	%xmm2, (%rsi,%rax)
	movaps	(%rcx,%rax), %xmm3
	movaps	%xmm3, (%rdx,%rax)
	addq	$16, %rax
	cmpq	$8192, %rax
	jne	.L17
	decl	%r12d
	jne	.L18
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L19
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L13
.L19:
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L13:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z15updateParticlesP6float4S0_S0_S0_"
.LC4:
	.string	"_Z15calculateForcesP6float4S0_S0_S0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15updateParticlesP6float4S0_S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15calculateForcesP6float4S0_S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	989855744
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <cmath>

// Constants
#define N 512
#define DT 0.001f
#define EPSILON 1e-5f

// Kernel to calculate forces using Lennard-Jones potential
__global__ void calculateForces(float4 *pos, float4 *f, float4 *a, float4 *a_prev) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= N) return;

    float4 force = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    float4 pos_i = pos[idx];

    for (int j = 0; j < N; ++j) {
        if (idx != j) {
            float4 pos_j = pos[j];
            float dx = pos_j.x - pos_i.x;
            float dy = pos_j.y - pos_i.y;
            float dz = pos_j.z - pos_i.z;
            float r2 = dx * dx + dy * dy + dz * dz + EPSILON;
            float r6 = r2 * r2 * r2;
            float r12 = r6 * r6;
            float factor = 24.0f * (2.0f / r12 - 1.0f / r6) / r2;
            force.x += factor * dx;
            force.y += factor * dy;
            force.z += factor * dz;
        }
    }

    f[idx] = force;
}

// Kernel to update positions and velocities using Beeman's algorithm
__global__ void updateParticles(float4 *pos, float4 *v, float4 *a, float4 *a_prev) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= N) return;

    float4 pos_i = pos[idx];
    float4 v_i = v[idx];
    float4 a_i = a[idx];
    float4 a_prev_i = a_prev[idx];

    // Update positions
    pos_i.x += v_i.x * DT + (4.0f / 3.0f * a_i.x - 1.0f / 6.0f * a_prev_i.x) * DT * DT;
    pos_i.y += v_i.y * DT + (4.0f / 3.0f * a_i.y - 1.0f / 6.0f * a_prev_i.y) * DT * DT;
    pos_i.z += v_i.z * DT + (4.0f / 3.0f * a_i.z - 1.0f / 6.0f * a_prev_i.z) * DT * DT;

    // Update velocities
    v_i.x += (3.0f / 2.0f * a_i.x - 1.0f / 2.0f * a_prev_i.x) * DT;
    v_i.y += (3.0f / 2.0f * a_i.y - 1.0f / 2.0f * a_prev_i.y) * DT;
    v_i.z += (3.0f / 2.0f * a_i.z - 1.0f / 2.0f * a_prev_i.z) * DT;

    // Store updated values
    pos[idx] = pos_i;
    v[idx] = v_i;
}

// Main function
int main() {
    // Allocate Unified Memory for particle positions, velocities, and accelerations
    float4 *pos, *v, *a, *a_prev, *f;
    hipMallocManaged(&pos, N * sizeof(float4));
    hipMallocManaged(&v, N * sizeof(float4));
    hipMallocManaged(&a, N * sizeof(float4));
    hipMallocManaged(&a_prev, N * sizeof(float4));
    hipMallocManaged(&f, N * sizeof(float4));

    // Initialize positions and velocities
    for (int i = 0; i < N; ++i) {
        pos[i] = make_float4(static_cast<float>(i) / N, 0.0f, 0.0f, 0.0f);
        v[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
        a[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
        a_prev[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    }

    // Number of blocks and threads per block
    int threadsPerBlock = 256;
    int blocksPerGrid = (N + threadsPerBlock - 1) / threadsPerBlock;

    // Simulate for a number of steps
    int steps = 100;
    for (int step = 0; step < steps; ++step) {
        // Calculate forces
        calculateForces<<<blocksPerGrid, threadsPerBlock>>>(pos, f, a, a_prev);
        hipDeviceSynchronize();

        // Update positions and velocities
        updateParticles<<<blocksPerGrid, threadsPerBlock>>>(pos, v, a, a_prev);
        hipDeviceSynchronize();

        // Update accelerations
        for (int i = 0; i < N; ++i) {
            a_prev[i] = a[i];
            a[i] = f[i];
        }
    }

    // Check for errors
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Free Unified Memory
    hipFree(pos);
    hipFree(v);
    hipFree(a);
    hipFree(a_prev);
    hipFree(f);

    return 0;
}
	.text
	.file	"cuda_code_008460.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z30__device_stub__calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_ # -- Begin function _Z30__device_stub__calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.type	_Z30__device_stub__calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_,@function
_Z30__device_stub__calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_: # @_Z30__device_stub__calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_, .Lfunc_end0-_Z30__device_stub__calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_ # -- Begin function _Z30__device_stub__updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.type	_Z30__device_stub__updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_,@function
_Z30__device_stub__updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_: # @_Z30__device_stub__updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z30__device_stub__updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_, .Lfunc_end1-_Z30__device_stub__updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x3b000000                      # float 0.001953125
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rdi
	movl	$8192, %esi                     # imm = 0x2000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	40(%rsp), %rdi
	movl	$8192, %esi                     # imm = 0x2000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movl	$8192, %esi                     # imm = 0x2000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %rdi
	movl	$8192, %esi                     # imm = 0x2000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	32(%rsp), %rdi
	movl	$8192, %esi                     # imm = 0x2000
	movl	$1, %edx
	callq	hipMallocManaged
	xorl	%eax, %eax
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	xorps	%xmm1, %xmm1
	xorl	%ecx, %ecx
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm2, %xmm2
	cvtsi2ss	%ecx, %xmm2
	mulss	%xmm0, %xmm2
	xorps	%xmm3, %xmm3
	movss	%xmm2, %xmm3                    # xmm3 = xmm2[0],xmm3[1,2,3]
	movq	24(%rsp), %rdx
	movlps	%xmm3, (%rdx,%rax)
	movq	$0, 8(%rdx,%rax)
	movq	40(%rsp), %rdx
	movaps	%xmm1, (%rdx,%rax)
	movq	16(%rsp), %rdx
	movaps	%xmm1, (%rdx,%rax)
	movq	8(%rsp), %rdx
	incq	%rcx
	movaps	%xmm1, (%rdx,%rax)
	addq	$16, %rax
	cmpq	$512, %rcx                      # imm = 0x200
	jne	.LBB2_1
# %bb.2:                                # %.preheader.preheader
	xorl	%r15d, %r15d
	movabsq	$4294967298, %rbx               # imm = 0x100000002
	leaq	254(%rbx), %r14
.LBB2_3:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_8 Depth 2
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_5
# %bb.4:                                #   in Loop: Header=BB2_3 Depth=1
	movq	24(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	callq	_Z30__device_stub__calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
.LBB2_5:                                #   in Loop: Header=BB2_3 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_7
# %bb.6:                                #   in Loop: Header=BB2_3 Depth=1
	movq	24(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	callq	_Z30__device_stub__updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_
.LBB2_7:                                #   in Loop: Header=BB2_3 Depth=1
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rax
	movq	8(%rsp), %rcx
	movq	32(%rsp), %rdx
	xorl	%esi, %esi
.LBB2_8:                                #   Parent Loop BB2_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movaps	(%rax,%rsi), %xmm0
	movaps	%xmm0, (%rcx,%rsi)
	movaps	(%rdx,%rsi), %xmm0
	movaps	%xmm0, (%rax,%rsi)
	addq	$16, %rsi
	cmpq	$8192, %rsi                     # imm = 0x2000
	jne	.LBB2_8
# %bb.9:                                #   in Loop: Header=BB2_3 Depth=1
	incl	%r15d
	cmpl	$100, %r15d
	jne	.LBB2_3
# %bb.10:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB2_15
# %bb.11:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB2_12
# %bb.13:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_14
.LBB2_15:
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	jmp	.LBB2_16
.LBB2_12:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_14:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB2_16:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_,@object # @_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.section	.rodata,"a",@progbits
	.globl	_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.p2align	3, 0x0
_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_:
	.quad	_Z30__device_stub__calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.size	_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_, 8

	.type	_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_,@object # @_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.globl	_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.p2align	3, 0x0
_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_:
	.quad	_Z30__device_stub__updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.size	_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_"
	.size	.L__unnamed_1, 54

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_"
	.size	.L__unnamed_2, 54

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.addrsig_sym _Z30__device_stub__updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.addrsig_sym _Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_ ; -- Begin function _Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.globl	_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.p2align	8
	.type	_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_,@function
_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_: ; @_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x2c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x200, v7
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v8, 31, v7
	s_mov_b32 s4, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_lshlrev_b64 v[8:9], 4, v[7:8]
	s_mov_b32 s7, s4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v9, vcc_lo
	global_load_b96 v[4:6], v[0:1], off
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s7
	s_add_u32 s5, s0, 4
	s_addc_u32 s1, s1, 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s6, exec_lo
	v_cmpx_ne_u32_e64 s4, v7
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_u32 s8, s5, -4
	s_addc_u32 s9, s1, -1
	s_load_b128 s[8:11], s[8:9], 0x0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_sub_f32 v10, s9, v5 :: v_dual_sub_f32 v11, s8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v10, v10
	v_dual_sub_f32 v13, s10, v6 :: v_dual_fmac_f32 v12, v11, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v13, v13
	v_add_f32_e32 v12, 0x3727c5ac, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v14, v12, v12
	v_mul_f32_e32 v14, v12, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v15, v14, v14
	v_div_scale_f32 v17, null, v14, v14, -1.0
	v_div_scale_f32 v16, null, v15, v15, 2.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v19, v17
	v_div_scale_f32 v22, vcc_lo, 2.0, v15, 2.0
	v_rcp_f32_e32 v18, v16
	s_waitcnt_depctr 0xfff
	v_fma_f32 v21, -v17, v19, 1.0
	v_fma_f32 v20, -v16, v18, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v19, v21, v19 :: v_dual_fmac_f32 v18, v20, v18
	v_div_scale_f32 v20, s0, -1.0, v14, -1.0
	v_mul_f32_e32 v21, v22, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v24, -v16, v21, v22
	v_fmac_f32_e32 v21, v24, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v16, -v16, v21, v22
	v_div_fmas_f32 v16, v16, v18, v21
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v15, v16, v15, 2.0
	v_mul_f32_e32 v23, v20, v19
	v_fma_f32 v25, -v17, v23, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, v25, v19
	v_fma_f32 v17, -v17, v23, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v17, v17, v19, v23
	v_div_fixup_f32 v14, v17, v14, -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v15, v14
	v_mul_f32_e32 v14, 0x41c00000, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v15, null, v12, v12, v14
	v_div_scale_f32 v18, vcc_lo, v14, v12, v14
	v_rcp_f32_e32 v16, v15
	s_waitcnt_depctr 0xfff
	v_fma_f32 v17, -v15, v16, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v17, v16
	v_mul_f32_e32 v17, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v19, -v15, v17, v18
	v_fmac_f32_e32 v17, v19, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v15, -v15, v17, v18
	v_div_fmas_f32 v15, v15, v16, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v12, v15, v12, v14
	v_fma_f32 v0, v11, v12, v0
	v_fma_f32 v1, v10, v12, v1
	v_fmac_f32_e32 v2, v13, v12
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s4, s4, 1
	s_add_u32 s5, s5, 16
	s_addc_u32 s1, s1, 0
	s_cmpk_eq_i32 s4, 0x200
	s_cbranch_scc0 .LBB0_2
; %bb.5:
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v9, vcc_lo
	global_store_b128 v[4:5], v[0:3], off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_, .Lfunc_end0-_Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 608
; NumSgprs: 18
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_ ; -- Begin function _Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.globl	_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_
	.p2align	8
	.type	_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_,@function
_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_: ; @_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x2c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x200, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 4, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v7, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v13, vcc_lo, s2, v0
	global_load_b96 v[4:6], v[2:3], off
	global_load_b96 v[7:9], v[7:8], off
	v_add_co_ci_u32_e32 v14, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v15, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v16, vcc_lo, s1, v1, vcc_lo
	global_load_b128 v[0:3], v[13:14], off
	global_load_b96 v[10:12], v[15:16], off
	s_waitcnt vmcnt(3)
	v_dual_mul_f32 v17, 0x3e2aaaab, v4 :: v_dual_mul_f32 v18, 0x3e2aaaab, v5
	v_dual_mul_f32 v19, 0x3e2aaaab, v6 :: v_dual_mul_f32 v4, 0.5, v4
	v_mul_f32_e32 v6, 0.5, v6
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_fma_f32 v17, 0x3faaaaab, v7, -v17
	v_fma_f32 v18, 0x3faaaaab, v8, -v18
	v_fma_f32 v19, 0x3faaaaab, v9, -v19
	v_mul_f32_e32 v5, 0.5, v5
	v_fma_f32 v4, 0x3fc00000, v7, -v4
	v_dual_mul_f32 v17, 0x3a83126f, v17 :: v_dual_mul_f32 v18, 0x3a83126f, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v19, 0x3a83126f, v19
	v_fma_f32 v5, 0x3fc00000, v8, -v5
	v_fma_f32 v8, 0x3fc00000, v9, -v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v7, 0x3a83126f, v17
	v_dual_mul_f32 v17, 0x3a83126f, v18 :: v_dual_mul_f32 v18, 0x3a83126f, v19
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v18, 0x3a83126f, v2 :: v_dual_fmac_f32 v7, 0x3a83126f, v0
	v_fmamk_f32 v0, v4, 0x3a83126f, v0
	v_fmamk_f32 v2, v8, 0x3a83126f, v2
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v6, v12, v18 :: v_dual_fmac_f32 v17, 0x3a83126f, v1
	v_dual_add_f32 v4, v10, v7 :: v_dual_fmamk_f32 v1, v5, 0x3a83126f, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f32_e32 v5, v11, v17
	global_store_b96 v[15:16], v[4:6], off
	global_store_b128 v[13:14], v[0:3], off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_, .Lfunc_end1-_Z15updateParticlesP15HIP_vector_typeIfLj4EES1_S1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 424
; NumSgprs: 18
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
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    .language:       OpenCL C
    .language_version:
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    .max_flat_workgroup_size: 1024
    .name:           _Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_
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    .sgpr_spill_count: 0
    .symbol:         _Z15calculateForcesP15HIP_vector_typeIfLj4EES1_S1_S1_.kd
    .uniform_work_group_size: 1
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    .vgpr_count:     26
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
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        .value_kind:     global_buffer
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
