// genetic_algorithm.cu
// A simple genetic algorithm implemented in CUDA with focus on optimizing atomic operations.
// This example assumes a fixed population size of 512 and demonstrates basic genetic operations.

#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>

#define POPULATION_SIZE 512
#define GENOME_SIZE 32
#define NUM_GENERATIONS 1000

// Kernel to initialize the population with random values
__global__ void initializePopulation(curandState *states, unsigned int *population) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        curand_init((unsigned long long) clock() + idx, 0, 0, &states[idx]);
        unsigned int genome = 0;
        for (int i = 0; i < GENOME_SIZE; ++i) {
            genome = (genome << 1) | (curand(&states[idx]) & 1);
        }
        population[idx] = genome;
    }
}

// Simple fitness function: count the number of 1s in the genome
__device__ int fitness(unsigned int genome) {
    int count = 0;
    for (int i = 0; i < GENOME_SIZE; ++i) {
        count += (genome >> i) & 1;
    }
    return count;
}

// Kernel to perform selection and crossover
__global__ void selectionAndCrossover(curandState *states, unsigned int *population, unsigned int *newPopulation) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        curandState localState = states[idx];
        int parent1 = curand(&localState) % POPULATION_SIZE;
        int parent2 = curand(&localState) % POPULATION_SIZE;
        unsigned int genome1 = population[parent1];
        unsigned int genome2 = population[parent2];
        unsigned int child = 0;

        // Simple one-point crossover
        int crossoverPoint = curand(&localState) % GENOME_SIZE;
        for (int i = 0; i < GENOME_SIZE; ++i) {
            if (i < crossoverPoint) {
                child = (child << 1) | ((genome1 >> i) & 1);
            } else {
                child = (child << 1) | ((genome2 >> i) & 1);
            }
        }

        // Mutation
        if (curand(&localState) < 0.01f * UINT_MAX) { // 1% mutation rate
            int mutationPoint = curand(&localState) % GENOME_SIZE;
            child ^= (1 << mutationPoint);
        }

        newPopulation[idx] = child;
        states[idx] = localState;
    }
}

// Kernel to evaluate the fitness of the population and find the best genome
__global__ void evaluatePopulation(unsigned int *population, int *bestFitness, unsigned int *bestGenome) {
    extern __shared__ int sharedFitness[];
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        sharedFitness[threadIdx.x] = fitness(population[idx]);
        __syncthreads();

        // Find the best fitness in shared memory
        for (int s = blockDim.x / 2; s > 0; s >>= 1) {
            if (threadIdx.x < s) {
                sharedFitness[threadIdx.x] = max(sharedFitness[threadIdx.x], sharedFitness[threadIdx.x + s]);
            }
            __syncthreads();
        }

        // Use atomic operation to update the best fitness and genome in global memory
        if (threadIdx.x == 0) {
            int localBestFitness = sharedFitness[0];
            unsigned int localBestGenome = population[idx];
            int globalBestFitness = atomicMax(bestFitness, localBestFitness);
            if (localBestFitness > globalBestFitness) {
                atomicExch(bestGenome, localBestGenome);
            }
        }
    }
}

int main() {
    unsigned int *d_population, *d_newPopulation;
    curandState *d_states;
    int *d_bestFitness;
    unsigned int *d_bestGenome;

    // Allocate memory on the device
    cudaMalloc(&d_population, POPULATION_SIZE * sizeof(unsigned int));
    cudaMalloc(&d_newPopulation, POPULATION_SIZE * sizeof(unsigned int));
    cudaMalloc(&d_states, POPULATION_SIZE * sizeof(curandState));
    cudaMalloc(&d_bestFitness, sizeof(int));
    cudaMalloc(&d_bestGenome, sizeof(unsigned int));

    // Initialize population
    int blockSize = 256;
    int numBlocks = (POPULATION_SIZE + blockSize - 1) / blockSize;
    initializePopulation<<<numBlocks, blockSize>>>(d_states, d_population);
    cudaDeviceSynchronize();

    // Main genetic algorithm loop
    for (int generation = 0; generation < NUM_GENERATIONS; ++generation) {
        // Evaluate population
        selectionAndCrossover<<<numBlocks, blockSize>>>(d_states, d_population, d_newPopulation);
        cudaDeviceSynchronize();

        // Evaluate fitness and find the best genome
        int sharedMemSize = blockSize * sizeof(int);
        evaluatePopulation<<<numBlocks, blockSize, sharedMemSize>>>(d_newPopulation, d_bestFitness, d_bestGenome);
        cudaDeviceSynchronize();

        // Swap populations
        unsigned int *temp = d_population;
        d_population = d_newPopulation;
        d_newPopulation = temp;
    }

    // Copy the best fitness and genome back to the host
    int h_bestFitness;
    unsigned int h_bestGenome;
    cudaMemcpy(&h_bestFitness, d_bestFitness, sizeof(int), cudaMemcpyDeviceToHost);
    cudaMemcpy(&h_bestGenome, d_bestGenome, sizeof(unsigned int), cudaMemcpyDeviceToHost);

    // Output the best genome and its fitness
    std::cout << "Best genome: " << h_bestGenome << " with fitness: " << h_bestFitness << std::endl;

    // Free device memory
    cudaFree(d_population);
    cudaFree(d_newPopulation);
    cudaFree(d_states);
    cudaFree(d_bestFitness);
    cudaFree(d_bestGenome);

    return 0;
}
	.file	"tmpxft_000486e3_00000000-6_cuda_code_043735.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3853:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3853:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7fitnessj
	.type	_Z7fitnessj, @function
_Z7fitnessj:
.LFB3849:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3849:
	.size	_Z7fitnessj, .-_Z7fitnessj
	.globl	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPjP17curandStateXORWOWPj
	.type	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPjP17curandStateXORWOWPj, @function
_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPjP17curandStateXORWOWPj:
.LFB3875:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20initializePopulationP17curandStateXORWOWPj(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L4:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3875:
	.size	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPjP17curandStateXORWOWPj, .-_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPjP17curandStateXORWOWPj
	.globl	_Z20initializePopulationP17curandStateXORWOWPj
	.type	_Z20initializePopulationP17curandStateXORWOWPj, @function
_Z20initializePopulationP17curandStateXORWOWPj:
.LFB3876:
	.cfi_startproc
	endbr64
	jmp	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPjP17curandStateXORWOWPj
	.cfi_endproc
.LFE3876:
	.size	_Z20initializePopulationP17curandStateXORWOWPj, .-_Z20initializePopulationP17curandStateXORWOWPj
	.globl	_Z64__device_stub__Z21selectionAndCrossoverP17curandStateXORWOWPjS1_P17curandStateXORWOWPjS1_
	.type	_Z64__device_stub__Z21selectionAndCrossoverP17curandStateXORWOWPjS1_P17curandStateXORWOWPjS1_, @function
_Z64__device_stub__Z21selectionAndCrossoverP17curandStateXORWOWPjS1_P17curandStateXORWOWPjS1_:
.LFB3877:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z21selectionAndCrossoverP17curandStateXORWOWPjS1_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L10:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3877:
	.size	_Z64__device_stub__Z21selectionAndCrossoverP17curandStateXORWOWPjS1_P17curandStateXORWOWPjS1_, .-_Z64__device_stub__Z21selectionAndCrossoverP17curandStateXORWOWPjS1_P17curandStateXORWOWPjS1_
	.globl	_Z21selectionAndCrossoverP17curandStateXORWOWPjS1_
	.type	_Z21selectionAndCrossoverP17curandStateXORWOWPjS1_, @function
_Z21selectionAndCrossoverP17curandStateXORWOWPjS1_:
.LFB3878:
	.cfi_startproc
	endbr64
	jmp	_Z64__device_stub__Z21selectionAndCrossoverP17curandStateXORWOWPjS1_P17curandStateXORWOWPjS1_
	.cfi_endproc
.LFE3878:
	.size	_Z21selectionAndCrossoverP17curandStateXORWOWPjS1_, .-_Z21selectionAndCrossoverP17curandStateXORWOWPjS1_
	.globl	_Z42__device_stub__Z18evaluatePopulationPjPiS_PjPiS_
	.type	_Z42__device_stub__Z18evaluatePopulationPjPiS_PjPiS_, @function
_Z42__device_stub__Z18evaluatePopulationPjPiS_PjPiS_:
.LFB3879:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z18evaluatePopulationPjPiS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L15:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3879:
	.size	_Z42__device_stub__Z18evaluatePopulationPjPiS_PjPiS_, .-_Z42__device_stub__Z18evaluatePopulationPjPiS_PjPiS_
	.globl	_Z18evaluatePopulationPjPiS_
	.type	_Z18evaluatePopulationPjPiS_, @function
_Z18evaluatePopulationPjPiS_:
.LFB3880:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z18evaluatePopulationPjPiS_PjPiS_
	.cfi_endproc
.LFE3880:
	.size	_Z18evaluatePopulationPjPiS_, .-_Z18evaluatePopulationPjPiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Best genome: "
.LC1:
	.string	" with fitness: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3850:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$2048, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$2048, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$24576, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$2147483649, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	addq	%rdi, %rdi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPjP17curandStateXORWOWPj
.L21:
	movl	$16777217, %ebx
	movl	$2147483649, %ebp
	movl	$1000, %r12d
	call	cudaDeviceSynchronize@PLT
	salq	$8, %rbx
	addq	%rbp, %rbp
.L24:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rbp, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z64__device_stub__Z21selectionAndCrossoverP17curandStateXORWOWPjS1_P17curandStateXORWOWPjS1_
.L22:
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movl	$1024, %r8d
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rbp, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z42__device_stub__Z18evaluatePopulationPjPiS_PjPiS_
.L23:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rax
	movq	16(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	%rdx, 8(%rsp)
	decl	%r12d
	jne	.L24
	movq	32(%rsp), %rsi
	leaq	48(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	leaq	60(%rsp), %rdi
	call	cudaMemcpy@PLT
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	60(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	48(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3850:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z18evaluatePopulationPjPiS_"
.LC3:
	.string	"_Z21selectionAndCrossoverP17curandStateXORWOWPjS1_"
.LC4:
	.string	"_Z20initializePopulationP17curandStateXORWOWPj"
.LC5:
	.string	"precalc_xorwow_matrix"
.LC6:
	.string	"precalc_xorwow_offset_matrix"
.LC7:
	.string	"mrg32k3aM1"
.LC8:
	.string	"mrg32k3aM2"
.LC9:
	.string	"mrg32k3aM1SubSeq"
.LC10:
	.string	"mrg32k3aM2SubSeq"
.LC11:
	.string	"mrg32k3aM1Seq"
.LC12:
	.string	"mrg32k3aM2Seq"
.LC13:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3882:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z18evaluatePopulationPjPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z21selectionAndCrossoverP17curandStateXORWOWPjS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z20initializePopulationP17curandStateXORWOWPj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3882:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// genetic_algorithm.cu
// A simple genetic algorithm implemented in CUDA with focus on optimizing atomic operations.
// This example assumes a fixed population size of 512 and demonstrates basic genetic operations.

#include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>

#define POPULATION_SIZE 512
#define GENOME_SIZE 32
#define NUM_GENERATIONS 1000

// Kernel to initialize the population with random values
__global__ void initializePopulation(hiprandState *states, unsigned int *population) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        hiprand_init((unsigned long long) clock() + idx, 0, 0, &states[idx]);
        unsigned int genome = 0;
        for (int i = 0; i < GENOME_SIZE; ++i) {
            genome = (genome << 1) | (hiprand(&states[idx]) & 1);
        }
        population[idx] = genome;
    }
}

// Simple fitness function: count the number of 1s in the genome
__device__ int fitness(unsigned int genome) {
    int count = 0;
    for (int i = 0; i < GENOME_SIZE; ++i) {
        count += (genome >> i) & 1;
    }
    return count;
}

// Kernel to perform selection and crossover
__global__ void selectionAndCrossover(hiprandState *states, unsigned int *population, unsigned int *newPopulation) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        hiprandState localState = states[idx];
        int parent1 = hiprand(&localState) % POPULATION_SIZE;
        int parent2 = hiprand(&localState) % POPULATION_SIZE;
        unsigned int genome1 = population[parent1];
        unsigned int genome2 = population[parent2];
        unsigned int child = 0;

        // Simple one-point crossover
        int crossoverPoint = hiprand(&localState) % GENOME_SIZE;
        for (int i = 0; i < GENOME_SIZE; ++i) {
            if (i < crossoverPoint) {
                child = (child << 1) | ((genome1 >> i) & 1);
            } else {
                child = (child << 1) | ((genome2 >> i) & 1);
            }
        }

        // Mutation
        if (hiprand(&localState) < 0.01f * UINT_MAX) { // 1% mutation rate
            int mutationPoint = hiprand(&localState) % GENOME_SIZE;
            child ^= (1 << mutationPoint);
        }

        newPopulation[idx] = child;
        states[idx] = localState;
    }
}

// Kernel to evaluate the fitness of the population and find the best genome
__global__ void evaluatePopulation(unsigned int *population, int *bestFitness, unsigned int *bestGenome) {
    extern __shared__ int sharedFitness[];
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        sharedFitness[threadIdx.x] = fitness(population[idx]);
        __syncthreads();

        // Find the best fitness in shared memory
        for (int s = blockDim.x / 2; s > 0; s >>= 1) {
            if (threadIdx.x < s) {
                sharedFitness[threadIdx.x] = max(sharedFitness[threadIdx.x], sharedFitness[threadIdx.x + s]);
            }
            __syncthreads();
        }

        // Use atomic operation to update the best fitness and genome in global memory
        if (threadIdx.x == 0) {
            int localBestFitness = sharedFitness[0];
            unsigned int localBestGenome = population[idx];
            int globalBestFitness = atomicMax(bestFitness, localBestFitness);
            if (localBestFitness > globalBestFitness) {
                atomicExch(bestGenome, localBestGenome);
            }
        }
    }
}

int main() {
    unsigned int *d_population, *d_newPopulation;
    hiprandState *d_states;
    int *d_bestFitness;
    unsigned int *d_bestGenome;

    // Allocate memory on the device
    hipMalloc(&d_population, POPULATION_SIZE * sizeof(unsigned int));
    hipMalloc(&d_newPopulation, POPULATION_SIZE * sizeof(unsigned int));
    hipMalloc(&d_states, POPULATION_SIZE * sizeof(hiprandState));
    hipMalloc(&d_bestFitness, sizeof(int));
    hipMalloc(&d_bestGenome, sizeof(unsigned int));

    // Initialize population
    int blockSize = 256;
    int numBlocks = (POPULATION_SIZE + blockSize - 1) / blockSize;
    initializePopulation<<<numBlocks, blockSize>>>(d_states, d_population);
    hipDeviceSynchronize();

    // Main genetic algorithm loop
    for (int generation = 0; generation < NUM_GENERATIONS; ++generation) {
        // Evaluate population
        selectionAndCrossover<<<numBlocks, blockSize>>>(d_states, d_population, d_newPopulation);
        hipDeviceSynchronize();

        // Evaluate fitness and find the best genome
        int sharedMemSize = blockSize * sizeof(int);
        evaluatePopulation<<<numBlocks, blockSize, sharedMemSize>>>(d_newPopulation, d_bestFitness, d_bestGenome);
        hipDeviceSynchronize();

        // Swap populations
        unsigned int *temp = d_population;
        d_population = d_newPopulation;
        d_newPopulation = temp;
    }

    // Copy the best fitness and genome back to the host
    int h_bestFitness;
    unsigned int h_bestGenome;
    hipMemcpy(&h_bestFitness, d_bestFitness, sizeof(int), hipMemcpyDeviceToHost);
    hipMemcpy(&h_bestGenome, d_bestGenome, sizeof(unsigned int), hipMemcpyDeviceToHost);

    // Output the best genome and its fitness
    std::cout << "Best genome: " << h_bestGenome << " with fitness: " << h_bestFitness << std::endl;

    // Free device memory
    hipFree(d_population);
    hipFree(d_newPopulation);
    hipFree(d_states);
    hipFree(d_bestFitness);
    hipFree(d_bestGenome);

    return 0;
}
	.text
	.file	"cuda_code_043735.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z35__device_stub__initializePopulationP12hiprandStatePj # -- Begin function _Z35__device_stub__initializePopulationP12hiprandStatePj
	.type	_Z35__device_stub__initializePopulationP12hiprandStatePj,@function
_Z35__device_stub__initializePopulationP12hiprandStatePj: # @_Z35__device_stub__initializePopulationP12hiprandStatePj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20initializePopulationP12hiprandStatePj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z35__device_stub__initializePopulationP12hiprandStatePj, .Lfunc_end0-_Z35__device_stub__initializePopulationP12hiprandStatePj
	.cfi_endproc
                                        # -- End function
	.globl	_Z36__device_stub__selectionAndCrossoverP12hiprandStatePjS1_ # -- Begin function _Z36__device_stub__selectionAndCrossoverP12hiprandStatePjS1_
	.type	_Z36__device_stub__selectionAndCrossoverP12hiprandStatePjS1_,@function
_Z36__device_stub__selectionAndCrossoverP12hiprandStatePjS1_: # @_Z36__device_stub__selectionAndCrossoverP12hiprandStatePjS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21selectionAndCrossoverP12hiprandStatePjS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z36__device_stub__selectionAndCrossoverP12hiprandStatePjS1_, .Lfunc_end1-_Z36__device_stub__selectionAndCrossoverP12hiprandStatePjS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__evaluatePopulationPjPiS_ # -- Begin function _Z33__device_stub__evaluatePopulationPjPiS_
	.type	_Z33__device_stub__evaluatePopulationPjPiS_,@function
_Z33__device_stub__evaluatePopulationPjPiS_: # @_Z33__device_stub__evaluatePopulationPjPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18evaluatePopulationPjPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z33__device_stub__evaluatePopulationPjPiS_, .Lfunc_end2-_Z33__device_stub__evaluatePopulationPjPiS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967298, %rbx               # imm = 0x100000002
	leaq	8(%rsp), %rdi
	movl	$2048, %esi                     # imm = 0x800
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$2048, %esi                     # imm = 0x800
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$24576, %esi                    # imm = 0x6000
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	leaq	254(%rbx), %r14
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	32(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z35__device_stub__initializePopulationP12hiprandStatePj
.LBB3_2:
	callq	hipDeviceSynchronize
	movl	$1000, %ebp                     # imm = 0x3E8
.LBB3_3:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_5
# %bb.4:                                #   in Loop: Header=BB3_3 Depth=1
	movq	32(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	_Z36__device_stub__selectionAndCrossoverP12hiprandStatePjS1_
.LBB3_5:                                #   in Loop: Header=BB3_3 Depth=1
	callq	hipDeviceSynchronize
	movl	$1024, %r8d                     # imm = 0x400
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_7
# %bb.6:                                #   in Loop: Header=BB3_3 Depth=1
	movq	(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z33__device_stub__evaluatePopulationPjPiS_
.LBB3_7:                                #   in Loop: Header=BB3_3 Depth=1
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rax
	movq	(%rsp), %rcx
	movq	%rcx, 8(%rsp)
	movq	%rax, (%rsp)
	decl	%ebp
	jne	.LBB3_3
# %bb.8:
	movq	24(%rsp), %rsi
	leaq	44(%rsp), %rbx
	movl	$4, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	leaq	40(%rsp), %r14
	movl	$4, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%r14), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.1, %esi
	movl	$15, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20initializePopulationP12hiprandStatePj, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21selectionAndCrossoverP12hiprandStatePjS1_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18evaluatePopulationPjPiS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z20initializePopulationP12hiprandStatePj,@object # @_Z20initializePopulationP12hiprandStatePj
	.section	.rodata,"a",@progbits
	.globl	_Z20initializePopulationP12hiprandStatePj
	.p2align	3, 0x0
_Z20initializePopulationP12hiprandStatePj:
	.quad	_Z35__device_stub__initializePopulationP12hiprandStatePj
	.size	_Z20initializePopulationP12hiprandStatePj, 8

	.type	_Z21selectionAndCrossoverP12hiprandStatePjS1_,@object # @_Z21selectionAndCrossoverP12hiprandStatePjS1_
	.globl	_Z21selectionAndCrossoverP12hiprandStatePjS1_
	.p2align	3, 0x0
_Z21selectionAndCrossoverP12hiprandStatePjS1_:
	.quad	_Z36__device_stub__selectionAndCrossoverP12hiprandStatePjS1_
	.size	_Z21selectionAndCrossoverP12hiprandStatePjS1_, 8

	.type	_Z18evaluatePopulationPjPiS_,@object # @_Z18evaluatePopulationPjPiS_
	.globl	_Z18evaluatePopulationPjPiS_
	.p2align	3, 0x0
_Z18evaluatePopulationPjPiS_:
	.quad	_Z33__device_stub__evaluatePopulationPjPiS_
	.size	_Z18evaluatePopulationPjPiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Best genome: "
	.size	.L.str, 14

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" with fitness: "
	.size	.L.str.1, 16

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20initializePopulationP12hiprandStatePj"
	.size	.L__unnamed_1, 42

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z21selectionAndCrossoverP12hiprandStatePjS1_"
	.size	.L__unnamed_2, 46

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z18evaluatePopulationPjPiS_"
	.size	.L__unnamed_3, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__initializePopulationP12hiprandStatePj
	.addrsig_sym _Z36__device_stub__selectionAndCrossoverP12hiprandStatePjS1_
	.addrsig_sym _Z33__device_stub__evaluatePopulationPjPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z20initializePopulationP12hiprandStatePj
	.addrsig_sym _Z21selectionAndCrossoverP12hiprandStatePjS1_
	.addrsig_sym _Z18evaluatePopulationPjPiS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20initializePopulationP12hiprandStatePj ; -- Begin function _Z20initializePopulationP12hiprandStatePj
	.globl	_Z20initializePopulationP12hiprandStatePj
	.p2align	8
	.type	_Z20initializePopulationP12hiprandStatePj,@function
_Z20initializePopulationP12hiprandStatePj: ; @_Z20initializePopulationP12hiprandStatePj
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x200, v4
	s_cbranch_execz .LBB0_4
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v5, 31, v4
	s_getreg_b32 s4, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v0, 0x2c7f967f, v0
	v_xor_b32_e32 v1, 0xa03697cb, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, 0x493c4aa1, v0
	v_mul_lo_u32 v11, 0x7b99840d, v1
	v_mov_b32_e32 v8, 0
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[6:7], null, v4, 48, s[0:1]
	s_delay_alu instid0(VALU_DEP_4)
	v_xor_b32_e32 v14, 0x159a55e5, v10
	v_add_nc_u32_e32 v12, 0x583f19, v10
	v_add_nc_u32_e32 v15, 0x1f123bb5, v11
	v_dual_mov_b32 v9, v8 :: v_dual_add_nc_u32 v16, 0x75bcd15, v10
	v_xor_b32_e32 v3, 0x5491333, v11
	v_add3_u32 v13, v11, v10, 0x6a788e
	s_mov_b32 s0, 0
	global_store_b64 v[6:7], v[8:9], off offset:4
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_lshrrev_b32_e32 v0, 2, v16
	v_dual_mov_b32 v2, v3 :: v_dual_mov_b32 v3, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v8, 1, v8
	v_xor_b32_e32 v0, v0, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v16, v14 :: v_dual_lshlrev_b32 v1, 4, v3
	v_lshlrev_b32_e32 v9, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v9, v1
	v_xor3_b32 v12, v1, v0, v3
	v_dual_mov_b32 v1, v15 :: v_dual_mov_b32 v0, v14
	v_dual_mov_b32 v14, v15 :: v_dual_mov_b32 v15, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add3_u32 v9, v13, s0, v12
	s_add_i32 s0, s0, 0x587c5
	s_cmp_eq_u32 s0, 0xb0f8a0
	s_delay_alu instid0(VALU_DEP_1)
	v_and_or_b32 v8, v9, 1, v8
	s_cbranch_scc0 .LBB0_2
; %bb.3:
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add3_u32 v9, v10, v11, 0x115e969
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	s_clause 0x2
	global_store_b32 v[6:7], v12, off offset:40
	global_store_b128 v[6:7], v[0:3], off offset:24
	global_store_b32 v[6:7], v9, off
	global_store_b32 v[4:5], v8, off
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20initializePopulationP12hiprandStatePj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20initializePopulationP12hiprandStatePj, .Lfunc_end0-_Z20initializePopulationP12hiprandStatePj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 416
; NumSgprs: 18
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z21selectionAndCrossoverP12hiprandStatePjS1_ ; -- Begin function _Z21selectionAndCrossoverP12hiprandStatePjS1_
	.globl	_Z21selectionAndCrossoverP12hiprandStatePjS1_
	.p2align	8
	.type	_Z21selectionAndCrossoverP12hiprandStatePjS1_,@function
_Z21selectionAndCrossoverP12hiprandStatePjS1_: ; @_Z21selectionAndCrossoverP12hiprandStatePjS1_
; %bb.0:
	s_load_b32 s4, s[2:3], 0x24
	v_and_b32_e32 v11, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[7:8], null, s15, s4, v[11:12]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0x200, v7
	s_cbranch_execz .LBB1_6
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[2:3], 0x0
	s_load_b64 s[2:3], s[2:3], 0x10
	s_load_b64 s[0:1], s[0:1], 0x4
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[9:10], null, v7, 48, s[4:5]
	s_lshr_b32 s0, s0, 16
	s_clause 0x4
	global_load_b128 v[3:6], v[9:10], off offset:24
	global_load_b64 v[1:2], v[9:10], off offset:40
	global_load_b32 v15, v[9:10], off
	global_load_b128 v[19:22], v[9:10], off offset:4
	global_load_b32 v23, v[9:10], off offset:20
	s_mul_i32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, s0, v11
	s_mov_b32 s0, 0
	s_waitcnt vmcnt(4)
	v_lshrrev_b32_e32 v8, 2, v3
	v_xor_b32_e32 v3, v8, v3
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v8, 4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v12, 1, v3
	v_xor_b32_e32 v8, v12, v8
	v_lshrrev_b32_e32 v12, 2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v16, v8, v3, v1
	v_xor_b32_e32 v3, v12, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v4, 4, v16
	v_lshlrev_b32_e32 v8, 1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v8, v4
	v_lshrrev_b32_e32 v8, 2, v5
	v_xor3_b32 v17, v4, v3, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_xor_b32_e32 v5, v8, v5
	s_waitcnt vmcnt(2)
	v_add3_u32 v3, v15, v16, 0x1c5
	v_bfe_u32 v8, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	v_lshlrev_b32_e32 v12, 4, v17
	v_lshlrev_b32_e32 v13, 1, v5
	v_add3_u32 v4, v15, v17, 0x18a
	v_and_b32_e32 v3, 0x1ff, v3
	v_mul_u32_u24_e32 v8, s1, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v12, v13, v12
	v_and_b32_e32 v4, 0x1ff, v4
	v_add_co_u32 v13, vcc_lo, v9, 4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add3_u32 v0, v11, v8, v0
	v_xor3_b32 v18, v12, v5, v17
	v_dual_mov_b32 v12, v2 :: v_dual_lshlrev_b32 v3, 2, v3
	v_lshlrev_b32_e32 v4, 2, v4
	s_clause 0x1
	global_load_b32 v3, v3, s[6:7]
	global_load_b32 v4, v4, s[6:7]
	v_add3_u32 v5, v15, v18, 15
	v_mul_lo_u32 v0, v0, 20
	v_ashrrev_i32_e32 v8, 31, v7
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mov_b32 v5, 0 :: v_dual_and_b32 v2, 31, v5
	s_waitcnt vmcnt(3)
	ds_store_2addr_b32 v0, v19, v20 offset1:1
	ds_store_2addr_b32 v0, v21, v22 offset0:2 offset1:3
	s_waitcnt vmcnt(2)
	ds_store_b32 v0, v23 offset:16
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	v_cmp_lt_u32_e32 vcc_lo, s0, v2
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e32 v11, v4, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_bfe_u32 v11, v11, s0, 1
	s_add_i32 s0, s0, 1
	s_cmp_eq_u32 s0, 32
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_or_b32 v5, v5, 1, v11
	s_cbranch_scc0 .LBB1_2
; %bb.3:
	v_lshrrev_b32_e32 v2, 2, v6
	v_lshlrev_b32_e32 v3, 4, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v6
	v_lshlrev_b32_e32 v4, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v3, v4, v3
	v_mov_b32_e32 v4, v18
	v_xor3_b32 v19, v3, v2, v18
	v_dual_mov_b32 v3, v17 :: v_dual_add_nc_u32 v6, 0x161f14, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v11, v19
	v_add_nc_u32_e32 v2, v19, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v2, v2
	v_cmp_gt_f32_e32 vcc_lo, 0x4c23d70a, v2
	v_mov_b32_e32 v2, v16
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB1_5
; %bb.4:
	v_lshrrev_b32_e32 v2, 2, v1
	v_add_nc_u32_e32 v6, 0x1ba6d9, v15
	v_mov_b32_e32 v4, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v2, v1
	v_lshlrev_b32_e32 v2, 4, v19
	v_lshlrev_b32_e32 v3, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v2, v3, v2
	v_mov_b32_e32 v3, v18
	v_xor3_b32 v11, v2, v1, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v17 :: v_dual_add_nc_u32 v1, v11, v6
	v_lshlrev_b32_e64 v1, v1, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_xor_b32_e32 v5, v5, v1
	v_mov_b32_e32 v1, v16
.LBB1_5:
	s_or_b32 exec_lo, exec_lo, s0
	ds_load_b32 v19, v0 offset:16
	ds_load_2addr_b32 v[17:18], v0 offset0:2 offset1:3
	ds_load_2addr_b32 v[15:16], v0 offset1:1
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
	global_store_b32 v[7:8], v5, off
	s_clause 0x1
	global_store_b32 v[9:10], v6, off
	global_store_b128 v[9:10], v[1:4], off offset:24
	s_waitcnt lgkmcnt(2)
	global_store_b32 v[13:14], v19, off offset:16
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b128 v[13:14], v[15:18], off
	global_store_b64 v[9:10], v[11:12], off offset:40
.LBB1_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21selectionAndCrossoverP12hiprandStatePjS1_
		.amdhsa_group_segment_fixed_size 20480
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 1
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z21selectionAndCrossoverP12hiprandStatePjS1_, .Lfunc_end1-_Z21selectionAndCrossoverP12hiprandStatePjS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 820
; NumSgprs: 18
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 20480 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z18evaluatePopulationPjPiS_ ; -- Begin function _Z18evaluatePopulationPjPiS_
	.globl	_Z18evaluatePopulationPjPiS_
	.p2align	8
	.type	_Z18evaluatePopulationPjPiS_,@function
_Z18evaluatePopulationPjPiS_:           ; @_Z18evaluatePopulationPjPiS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_cmpx_gt_i32_e32 0x200, v1
	s_cbranch_execz .LBB2_13
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v4, 0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_load_b32 v3, v[1:2], off
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_bfe_u32 v5, v3, s3, 1
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s3, 32
	v_add_nc_u32_e32 v4, v5, v4
	s_cbranch_scc1 .LBB2_2
; %bb.3:                                ; %_Z7fitnessj.exit
	v_lshl_add_u32 v3, v0, 2, 0
	s_cmp_lt_u32 s2, 2
	ds_store_b32 v3, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB2_4:                                ; %_Z7fitnessj.exit
                                        ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_8
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_4 Depth=1
	s_lshr_b32 s3, s2, 1
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_u32_e64 s3, v0
	s_cbranch_execz .LBB2_7
; %bb.6:                                ;   in Loop: Header=BB2_4 Depth=1
	v_lshl_add_u32 v4, s3, 2, v3
	ds_load_b32 v5, v3
	ds_load_b32 v4, v4
	s_waitcnt lgkmcnt(0)
	v_max_i32_e32 v4, v5, v4
	ds_store_b32 v3, v4
.LBB2_7:                                ;   in Loop: Header=BB2_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s2, 4
	s_mov_b32 s2, s3
	s_branch .LBB2_4
.LBB2_8:                                ; %._crit_edge
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_13
; %bb.9:
	global_load_b32 v0, v[1:2], off
	v_mov_b32_e32 v2, 0
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	ds_load_b32 v1, v2
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
                                        ; implicit-def: $vgpr3
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB2_11
; %bb.10:
	s_waitcnt lgkmcnt(0)
	global_atomic_max_i32 v3, v2, v1, s[6:7] glc
.LBB2_11:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v3
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e64 v2, v1, 0x80000000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, s2, v2
	v_cmp_gt_i32_e32 vcc_lo, v1, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_13
; %bb.12:
	v_mov_b32_e32 v1, 0
	global_atomic_swap_b32 v1, v0, s[0:1]
.LBB2_13:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18evaluatePopulationPjPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z18evaluatePopulationPjPiS_, .Lfunc_end2-_Z18evaluatePopulationPjPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 408
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20initializePopulationP12hiprandStatePj
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20initializePopulationP12hiprandStatePj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 20480
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21selectionAndCrossoverP12hiprandStatePjS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21selectionAndCrossoverP12hiprandStatePjS1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18evaluatePopulationPjPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18evaluatePopulationPjPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
