#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>

#define NUM_LAYERS 4
#define NUM_NEURONS 64
#define BATCH_SIZE 256

__global__ void initializeWeights(float *weights, int num_weights) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < num_weights) {
        curandState state;
        curand_init(idx, 0, 0, &state);
        weights[idx] = curand_uniform(&state) * 0.1f; // Small random weights
    }
}

__global__ void forwardPass(float *inputs, float *weights, float *outputs, int num_layers, int num_neurons, int batch_size) {
    extern __shared__ float shared_weights[];
    int layer = blockIdx.x;
    int neuron = blockIdx.y;
    int batch = threadIdx.x;

    if (layer == 0) {
        outputs[batch * num_neurons + neuron] = inputs[batch * num_neurons + neuron];
        return;
    }

    float sum = 0.0f;
    for (int i = 0; i < num_neurons; i++) {
        int weight_idx = (layer - 1) * num_neurons * num_neurons + neuron * num_neurons + i;
        shared_weights[threadIdx.x * num_neurons + i] = weights[weight_idx];
    }
    __syncthreads();

    for (int i = 0; i < num_neurons; i++) {
        sum += shared_weights[threadIdx.x * num_neurons + i] * outputs[(layer - 1) * batch_size * num_neurons + batch * num_neurons + i];
    }
    outputs[layer * batch_size * num_neurons + batch * num_neurons + neuron] = tanh(sum);
}

__global__ void computeLoss(float *outputs, float *targets, float *loss, int num_neurons, int batch_size) {
    int batch = blockIdx.x;
    int neuron = threadIdx.x;
    float diff = outputs[batch * num_neurons + neuron] - targets[batch * num_neurons + neuron];
    atomicAdd(loss, diff * diff);
}

int main() {
    int num_weights = (NUM_LAYERS - 1) * NUM_NEURONS * NUM_NEURONS;
    int num_outputs = NUM_LAYERS * BATCH_SIZE * NUM_NEURONS;

    float *h_inputs = new float[BATCH_SIZE * NUM_NEURONS];
    float *h_targets = new float[BATCH_SIZE * NUM_NEURONS];
    float *h_weights = new float[num_weights];
    float *h_outputs = new float[num_outputs];
    float *h_loss = new float[1];

    // Initialize inputs and targets
    for (int i = 0; i < BATCH_SIZE * NUM_NEURONS; i++) {
        h_inputs[i] = static_cast<float>(rand()) / RAND_MAX;
        h_targets[i] = static_cast<float>(rand()) / RAND_MAX;
    }

    float *d_inputs, *d_targets, *d_weights, *d_outputs, *d_loss;
    cudaMalloc(&d_inputs, BATCH_SIZE * NUM_NEURONS * sizeof(float));
    cudaMalloc(&d_targets, BATCH_SIZE * NUM_NEURONS * sizeof(float));
    cudaMalloc(&d_weights, num_weights * sizeof(float));
    cudaMalloc(&d_outputs, num_outputs * sizeof(float));
    cudaMalloc(&d_loss, sizeof(float));

    cudaMemcpy(d_inputs, h_inputs, BATCH_SIZE * NUM_NEURONS * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_targets, h_targets, BATCH_SIZE * NUM_NEURONS * sizeof(float), cudaMemcpyHostToDevice);

    dim3 grid_weights((num_weights + 255) / 256);
    dim3 grid_forward(NUM_LAYERS, NUM_NEURONS);
    dim3 grid_loss(BATCH_SIZE);
    dim3 block_weights(256);
    dim3 block_forward(BATCH_SIZE);
    dim3 block_loss(NUM_NEURONS);

    initializeWeights<<<grid_weights, block_weights>>>(d_weights, num_weights);
    cudaDeviceSynchronize();

    forwardPass<<<grid_forward, block_forward, BATCH_SIZE * NUM_NEURONS * sizeof(float)>>>(d_inputs, d_weights, d_outputs, NUM_LAYERS, NUM_NEURONS, BATCH_SIZE);
    cudaDeviceSynchronize();

    cudaMemset(d_loss, 0, sizeof(float));
    computeLoss<<<grid_loss, block_loss>>>(d_outputs + (NUM_LAYERS - 1) * BATCH_SIZE * NUM_NEURONS, d_targets, d_loss, NUM_NEURONS, BATCH_SIZE);
    cudaDeviceSynchronize();

    cudaMemcpy(h_loss, d_loss, sizeof(float), cudaMemcpyDeviceToHost);
    std::cout << "Loss: " << *h_loss << std::endl;

    cudaFree(d_inputs);
    cudaFree(d_targets);
    cudaFree(d_weights);
    cudaFree(d_outputs);
    cudaFree(d_loss);

    delete[] h_inputs;
    delete[] h_targets;
    delete[] h_weights;
    delete[] h_outputs;
    delete[] h_loss;

    return 0;
}
	.file	"tmpxft_0016e229_00000000-6_cuda_code_019693.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3852:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3852:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z38__device_stub__Z17initializeWeightsPfiPfi
	.type	_Z38__device_stub__Z17initializeWeightsPfiPfi, @function
_Z38__device_stub__Z17initializeWeightsPfiPfi:
.LFB3874:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17initializeWeightsPfi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3874:
	.size	_Z38__device_stub__Z17initializeWeightsPfiPfi, .-_Z38__device_stub__Z17initializeWeightsPfiPfi
	.globl	_Z17initializeWeightsPfi
	.type	_Z17initializeWeightsPfi, @function
_Z17initializeWeightsPfi:
.LFB3875:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z17initializeWeightsPfiPfi
	.cfi_endproc
.LFE3875:
	.size	_Z17initializeWeightsPfi, .-_Z17initializeWeightsPfi
	.globl	_Z38__device_stub__Z11forwardPassPfS_S_iiiPfS_S_iii
	.type	_Z38__device_stub__Z11forwardPassPfS_S_iiiPfS_S_iii, @function
_Z38__device_stub__Z11forwardPassPfS_S_iiiPfS_S_iii:
.LFB3876:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z11forwardPassPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L8:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3876:
	.size	_Z38__device_stub__Z11forwardPassPfS_S_iiiPfS_S_iii, .-_Z38__device_stub__Z11forwardPassPfS_S_iiiPfS_S_iii
	.globl	_Z11forwardPassPfS_S_iii
	.type	_Z11forwardPassPfS_S_iii, @function
_Z11forwardPassPfS_S_iii:
.LFB3877:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z11forwardPassPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE3877:
	.size	_Z11forwardPassPfS_S_iii, .-_Z11forwardPassPfS_S_iii
	.globl	_Z37__device_stub__Z11computeLossPfS_S_iiPfS_S_ii
	.type	_Z37__device_stub__Z11computeLossPfS_S_iiPfS_S_ii, @function
_Z37__device_stub__Z11computeLossPfS_S_iiPfS_S_ii:
.LFB3878:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11computeLossPfS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L13:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3878:
	.size	_Z37__device_stub__Z11computeLossPfS_S_iiPfS_S_ii, .-_Z37__device_stub__Z11computeLossPfS_S_iiPfS_S_ii
	.globl	_Z11computeLossPfS_S_ii
	.type	_Z11computeLossPfS_S_ii, @function
_Z11computeLossPfS_S_ii:
.LFB3879:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z11computeLossPfS_S_iiPfS_S_ii
	.cfi_endproc
.LFE3879:
	.size	_Z11computeLossPfS_S_ii, .-_Z11computeLossPfS_S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Loss: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3849:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$65536, %edi
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$136, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$65536, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$4, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movq	%rax, %rbx
.L19:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, (%r12,%r13)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, 0(%rbp,%r13)
	addq	$4, %r13
	cmpq	$65536, %r13
	jne	.L19
	leaq	8(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$49152, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$268435459, %edi
	salq	$8, %rdx
	movabsq	$274877906948, %rax
	movl	$1, %ecx
	movq	%rax, 60(%rsp)
	movl	$67108865, %eax
	salq	$4, %rdi
	movl	$1, %esi
	salq	$6, %rax
	movl	$1, 68(%rsp)
	movq	%rdx, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rdx, 96(%rsp)
	movl	$1, 104(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	24(%rsp), %rdi
	movl	$12288, %esi
	call	_Z38__device_stub__Z17initializeWeightsPfiPfi
.L20:
	call	cudaDeviceSynchronize@PLT
	movl	104(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	96(%rsp), %rdx
	movq	60(%rsp), %rdi
	movl	$65536, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$256, %r9d
	movl	$64, %r8d
	movq	8(%rsp), %rdi
	movl	$4, %ecx
	call	_Z38__device_stub__Z11forwardPassPfS_S_iiiPfS_S_iii
.L21:
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	call	cudaMemset@PLT
	movl	116(%rsp), %ecx
	movl	80(%rsp), %esi
	xorl	%r9d, %r9d
	movq	108(%rsp), %rdx
	movq	72(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movq	32(%rsp), %rax
	movq	40(%rsp), %rdx
	movl	$64, %ecx
	movl	$256, %r8d
	movq	16(%rsp), %rsi
	leaq	196608(%rax), %rdi
	call	_Z37__device_stub__Z11computeLossPfS_S_iiPfS_S_ii
.L22:
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$136, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3849:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z11computeLossPfS_S_ii"
.LC3:
	.string	"_Z11forwardPassPfS_S_iii"
.LC4:
	.string	"_Z17initializeWeightsPfi"
.LC5:
	.string	"precalc_xorwow_matrix"
.LC6:
	.string	"precalc_xorwow_offset_matrix"
.LC7:
	.string	"mrg32k3aM1"
.LC8:
	.string	"mrg32k3aM2"
.LC9:
	.string	"mrg32k3aM1SubSeq"
.LC10:
	.string	"mrg32k3aM2SubSeq"
.LC11:
	.string	"mrg32k3aM1Seq"
.LC12:
	.string	"mrg32k3aM2Seq"
.LC13:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3881:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11computeLossPfS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11forwardPassPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17initializeWeightsPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3881:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>

#define NUM_LAYERS 4
#define NUM_NEURONS 64
#define BATCH_SIZE 256

__global__ void initializeWeights(float *weights, int num_weights) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < num_weights) {
        hiprandState state;
        hiprand_init(idx, 0, 0, &state);
        weights[idx] = hiprand_uniform(&state) * 0.1f; // Small random weights
    }
}

__global__ void forwardPass(float *inputs, float *weights, float *outputs, int num_layers, int num_neurons, int batch_size) {
    extern __shared__ float shared_weights[];
    int layer = blockIdx.x;
    int neuron = blockIdx.y;
    int batch = threadIdx.x;

    if (layer == 0) {
        outputs[batch * num_neurons + neuron] = inputs[batch * num_neurons + neuron];
        return;
    }

    float sum = 0.0f;
    for (int i = 0; i < num_neurons; i++) {
        int weight_idx = (layer - 1) * num_neurons * num_neurons + neuron * num_neurons + i;
        shared_weights[threadIdx.x * num_neurons + i] = weights[weight_idx];
    }
    __syncthreads();

    for (int i = 0; i < num_neurons; i++) {
        sum += shared_weights[threadIdx.x * num_neurons + i] * outputs[(layer - 1) * batch_size * num_neurons + batch * num_neurons + i];
    }
    outputs[layer * batch_size * num_neurons + batch * num_neurons + neuron] = tanh(sum);
}

__global__ void computeLoss(float *outputs, float *targets, float *loss, int num_neurons, int batch_size) {
    int batch = blockIdx.x;
    int neuron = threadIdx.x;
    float diff = outputs[batch * num_neurons + neuron] - targets[batch * num_neurons + neuron];
    atomicAdd(loss, diff * diff);
}

int main() {
    int num_weights = (NUM_LAYERS - 1) * NUM_NEURONS * NUM_NEURONS;
    int num_outputs = NUM_LAYERS * BATCH_SIZE * NUM_NEURONS;

    float *h_inputs = new float[BATCH_SIZE * NUM_NEURONS];
    float *h_targets = new float[BATCH_SIZE * NUM_NEURONS];
    float *h_weights = new float[num_weights];
    float *h_outputs = new float[num_outputs];
    float *h_loss = new float[1];

    // Initialize inputs and targets
    for (int i = 0; i < BATCH_SIZE * NUM_NEURONS; i++) {
        h_inputs[i] = static_cast<float>(rand()) / RAND_MAX;
        h_targets[i] = static_cast<float>(rand()) / RAND_MAX;
    }

    float *d_inputs, *d_targets, *d_weights, *d_outputs, *d_loss;
    hipMalloc(&d_inputs, BATCH_SIZE * NUM_NEURONS * sizeof(float));
    hipMalloc(&d_targets, BATCH_SIZE * NUM_NEURONS * sizeof(float));
    hipMalloc(&d_weights, num_weights * sizeof(float));
    hipMalloc(&d_outputs, num_outputs * sizeof(float));
    hipMalloc(&d_loss, sizeof(float));

    hipMemcpy(d_inputs, h_inputs, BATCH_SIZE * NUM_NEURONS * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_targets, h_targets, BATCH_SIZE * NUM_NEURONS * sizeof(float), hipMemcpyHostToDevice);

    dim3 grid_weights((num_weights + 255) / 256);
    dim3 grid_forward(NUM_LAYERS, NUM_NEURONS);
    dim3 grid_loss(BATCH_SIZE);
    dim3 block_weights(256);
    dim3 block_forward(BATCH_SIZE);
    dim3 block_loss(NUM_NEURONS);

    initializeWeights<<<grid_weights, block_weights>>>(d_weights, num_weights);
    hipDeviceSynchronize();

    forwardPass<<<grid_forward, block_forward, BATCH_SIZE * NUM_NEURONS * sizeof(float)>>>(d_inputs, d_weights, d_outputs, NUM_LAYERS, NUM_NEURONS, BATCH_SIZE);
    hipDeviceSynchronize();

    hipMemset(d_loss, 0, sizeof(float));
    computeLoss<<<grid_loss, block_loss>>>(d_outputs + (NUM_LAYERS - 1) * BATCH_SIZE * NUM_NEURONS, d_targets, d_loss, NUM_NEURONS, BATCH_SIZE);
    hipDeviceSynchronize();

    hipMemcpy(h_loss, d_loss, sizeof(float), hipMemcpyDeviceToHost);
    std::cout << "Loss: " << *h_loss << std::endl;

    hipFree(d_inputs);
    hipFree(d_targets);
    hipFree(d_weights);
    hipFree(d_outputs);
    hipFree(d_loss);

    delete[] h_inputs;
    delete[] h_targets;
    delete[] h_weights;
    delete[] h_outputs;
    delete[] h_loss;

    return 0;
}
	.text
	.file	"cuda_code_019693.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z32__device_stub__initializeWeightsPfi # -- Begin function _Z32__device_stub__initializeWeightsPfi
	.type	_Z32__device_stub__initializeWeightsPfi,@function
_Z32__device_stub__initializeWeightsPfi: # @_Z32__device_stub__initializeWeightsPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17initializeWeightsPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__initializeWeightsPfi, .Lfunc_end0-_Z32__device_stub__initializeWeightsPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__forwardPassPfS_S_iii # -- Begin function _Z26__device_stub__forwardPassPfS_S_iii
	.type	_Z26__device_stub__forwardPassPfS_S_iii,@function
_Z26__device_stub__forwardPassPfS_S_iii: # @_Z26__device_stub__forwardPassPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11forwardPassPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z26__device_stub__forwardPassPfS_S_iii, .Lfunc_end1-_Z26__device_stub__forwardPassPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__computeLossPfS_S_ii # -- Begin function _Z26__device_stub__computeLossPfS_S_ii
	.type	_Z26__device_stub__computeLossPfS_S_ii,@function
_Z26__device_stub__computeLossPfS_S_ii: # @_Z26__device_stub__computeLossPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11computeLossPfS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z26__device_stub__computeLossPfS_S_ii, .Lfunc_end2-_Z26__device_stub__computeLossPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$65536, %edi                    # imm = 0x10000
	callq	_Znam
	movq	%rax, %rbx
	movl	$65536, %edi                    # imm = 0x10000
	callq	_Znam
	movq	%rax, %r14
	movl	$4, %edi
	callq	_Znam
	movq	%rax, %r15
	xorl	%r12d, %r12d
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI3_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	movss	%xmm0, (%r14,%r12,4)
	incq	%r12
	cmpq	$16384, %r12                    # imm = 0x4000
	jne	.LBB3_1
# %bb.2:
	movabsq	$4294967552, %r12               # imm = 0x100000100
	leaq	32(%rsp), %rbp
	movl	$65536, %esi                    # imm = 0x10000
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %r13
	movl	$65536, %esi                    # imm = 0x10000
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$49152, %esi                    # imm = 0xC000
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$4, %esi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	-208(%r12), %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	16(%rsp), %rdi
	movl	$12288, %esi                    # imm = 0x3000
	callq	_Z32__device_stub__initializeWeightsPfi
.LBB3_4:
	callq	hipDeviceSynchronize
	movabsq	$274877906948, %rdi             # imm = 0x4000000004
	movl	$65536, %r8d                    # imm = 0x10000
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_6
# %bb.5:
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$4, %ecx
	movl	$64, %r8d
	movl	$256, %r9d                      # imm = 0x100
	callq	_Z26__device_stub__forwardPassPfS_S_iii
.LBB3_6:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rdi
	movl	$4, %edx
	xorl	%esi, %esi
	callq	hipMemset
	leaq	-192(%r12), %rdx
	movq	%r12, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_8
# %bb.7:
	movl	$196608, %edi                   # imm = 0x30000
	addq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$64, %ecx
	movl	$256, %r8d                      # imm = 0x100
	callq	_Z26__device_stub__computeLossPfS_S_ii
.LBB3_8:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rsi
	movl	$4, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	(%r15), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17initializeWeightsPfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11forwardPassPfS_S_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11computeLossPfS_S_ii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17initializeWeightsPfi,@object # @_Z17initializeWeightsPfi
	.section	.rodata,"a",@progbits
	.globl	_Z17initializeWeightsPfi
	.p2align	3, 0x0
_Z17initializeWeightsPfi:
	.quad	_Z32__device_stub__initializeWeightsPfi
	.size	_Z17initializeWeightsPfi, 8

	.type	_Z11forwardPassPfS_S_iii,@object # @_Z11forwardPassPfS_S_iii
	.globl	_Z11forwardPassPfS_S_iii
	.p2align	3, 0x0
_Z11forwardPassPfS_S_iii:
	.quad	_Z26__device_stub__forwardPassPfS_S_iii
	.size	_Z11forwardPassPfS_S_iii, 8

	.type	_Z11computeLossPfS_S_ii,@object # @_Z11computeLossPfS_S_ii
	.globl	_Z11computeLossPfS_S_ii
	.p2align	3, 0x0
_Z11computeLossPfS_S_ii:
	.quad	_Z26__device_stub__computeLossPfS_S_ii
	.size	_Z11computeLossPfS_S_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Loss: "
	.size	.L.str, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17initializeWeightsPfi"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11forwardPassPfS_S_iii"
	.size	.L__unnamed_2, 25

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z11computeLossPfS_S_ii"
	.size	.L__unnamed_3, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__initializeWeightsPfi
	.addrsig_sym _Z26__device_stub__forwardPassPfS_S_iii
	.addrsig_sym _Z26__device_stub__computeLossPfS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17initializeWeightsPfi
	.addrsig_sym _Z11forwardPassPfS_S_iii
	.addrsig_sym _Z11computeLossPfS_S_ii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17initializeWeightsPfi ; -- Begin function _Z17initializeWeightsPfi
	.globl	_Z17initializeWeightsPfi
	.p2align	8
	.type	_Z17initializeWeightsPfi,@function
_Z17initializeWeightsPfi:               ; @_Z17initializeWeightsPfi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_xor_b32_e32 v0, 0x2c7f967f, v1
	v_cmp_lt_i32_e32 vcc_lo, -1, v1
	s_load_b64 s[0:1], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, 0x493c4aa1, v0
	v_add_nc_u32_e32 v2, 0x75bcd15, v0
	v_add_nc_u32_e32 v4, 0x583f19, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v3, 2, v2
	v_lshlrev_b32_e32 v5, 4, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v3, v2
	v_dual_mov_b32 v3, 0x8a5d614f :: v_dual_lshlrev_b32 v6, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, 0xfa091aa4, v3, vcc_lo
	v_xor_b32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v0, v3
	v_xor3_b32 v2, v5, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v0, v0, v2, 0x6a788e
	v_ashrrev_i32_e32 v2, 31, v1
	v_cvt_f32_u32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmaak_f32 v3, 0x2f800000, v0, 0x2f800000
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v2, 0x3dcccccd, v3
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17initializeWeightsPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17initializeWeightsPfi, .Lfunc_end0-_Z17initializeWeightsPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 272
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11forwardPassPfS_S_iii ; -- Begin function _Z11forwardPassPfS_S_iii
	.globl	_Z11forwardPassPfS_S_iii
	.p2align	8
	.type	_Z11forwardPassPfS_S_iii,@function
_Z11forwardPassPfS_S_iii:               ; @_Z11forwardPassPfS_S_iii
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b64 s[0:1], s[0:1], 0x1c
	s_mov_b32 s8, s15
	s_cmp_eq_u32 s14, 0
	s_cbranch_scc1 .LBB1_7
; %bb.1:                                ; %.preheader
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v1, v0, s0
	s_cmp_gt_i32 s0, 0
	s_cselect_b32 s9, -1, 0
	s_cmp_lt_i32 s0, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v3, v1, 2, 0
	s_cbranch_scc1 .LBB1_4
; %bb.2:                                ; %.lr.ph
	s_add_i32 s10, s14, -1
	v_lshl_add_u32 v1, v1, 2, 0
	s_mul_i32 s10, s10, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s10, s10, s8
	s_mul_i32 s10, s10, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s11, s10, 31
	s_lshl_b64 s[10:11], s[10:11], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s6, s6, s10
	s_addc_u32 s7, s7, s11
	s_mov_b32 s10, s0
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s11, s[6:7], 0x0
	s_add_i32 s10, s10, -1
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s10, 0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v2, s11
	ds_store_b32 v1, v2
	v_add_nc_u32_e32 v1, 4, v1
	s_cbranch_scc0 .LBB1_3
.LBB1_4:                                ; %._crit_edge
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB1_8
; %bb.5:                                ; %.lr.ph53
	s_add_i32 s6, s14, -1
	v_mov_b32_e32 v4, 0
	v_mad_u64_u32 v[1:2], null, s6, s1, v[0:1]
	s_mov_b32 s6, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v1, s0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
.LBB1_6:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[1:2], off
	ds_load_b32 v6, v3
	v_add_co_u32 v1, vcc_lo, v1, 4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	v_add_nc_u32_e32 v3, 4, v3
	s_add_i32 s6, s6, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v4, v6, v5
	s_cbranch_scc0 .LBB1_6
	s_branch .LBB1_9
.LBB1_7:
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr1_vgpr2
	s_branch .LBB1_14
.LBB1_8:
	v_mov_b32_e32 v4, 0
.LBB1_9:                                ; %._crit_edge54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ngt_f32_e64 s6, 0x3f200000, |v4|
                                        ; implicit-def: $vgpr3
	s_and_saveexec_b32 s7, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s7
	s_cbranch_execz .LBB1_11
; %bb.10:
	v_add_f32_e64 v1, |v4|, |v4|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v2, 0x3fb8aa3b, v1
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v1
	v_rndne_f32_e32 v3, v2
	v_fma_f32 v5, 0x3fb8aa3b, v1, -v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v2, v2, v3 :: v_dual_fmamk_f32 v5, v1, 0x32a5705f, v5
	v_cvt_i32_f32_e32 v3, v3
	v_add_f32_e32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v2, v2, v3
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, 0x7f800000, v2, vcc_lo
	v_add_f32_e32 v1, 1.0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_rcp_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v3, v1, -2.0, 1.0
.LBB1_11:                               ; %Flow
	s_and_not1_saveexec_b32 s6, s6
; %bb.12:
	v_mul_f32_e32 v1, v4, v4
	s_mov_b32 s7, 0xbbbac73d
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fmaak_f32 v2, s7, v1, 0x3ca908c9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v2, v1, v2, 0xbd5c1c4e
	v_fmaak_f32 v2, v1, v2, 0x3e088382
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v2, v1, v2, 0xbeaaaa99
	v_mul_f32_e64 v2, |v4|, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v3, v1, v2, |v4|
; %bb.13:                               ; %_ZL4tanhf.exit
	s_or_b32 exec_lo, exec_lo, s6
	v_mad_u64_u32 v[5:6], null, s14, s1, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_bfi_b32 v3, 0x7fffffff, v3, v4
	s_mov_b32 s1, 0
	v_mad_u64_u32 v[1:2], null, v5, s0, s[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
.LBB1_14:                               ; %Flow89
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB1_16
; %bb.15:
	v_mad_u64_u32 v[1:2], null, v0, s0, s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
.LBB1_16:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11forwardPassPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11forwardPassPfS_S_iii, .Lfunc_end1-_Z11forwardPassPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 752
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11computeLossPfS_S_ii ; -- Begin function _Z11computeLossPfS_S_ii
	.globl	_Z11computeLossPfS_S_ii
	.p2align	8
	.type	_Z11computeLossPfS_S_ii,@function
_Z11computeLossPfS_S_ii:                ; @_Z11computeLossPfS_S_ii
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v0, v2, v0
	v_bfrev_b32_e32 v2, 1
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f32_e32 v0, v0, v0
.LBB2_1:                                ; %ComputeLoop
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s4, v0, s3
	s_lshl_b32 s3, 1, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s2, s2, s3
	s_cmp_lg_u32 s2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, s4, v2
	s_cbranch_scc1 .LBB2_1
; %bb.2:                                ; %ComputeEnd
	v_mbcnt_lo_u32_b32 v0, exec_lo, 0
	s_mov_b32 s2, 0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB2_5
; %bb.3:
	s_load_b32 s3, s[0:1], 0x0
	v_mov_b32_e32 v3, 0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v1, s3
.LBB2_4:                                ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v1, v2
	global_atomic_cmpswap_b32 v0, v3, v[0:1], s[0:1] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB2_4
.LBB2_5:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11computeLossPfS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z11computeLossPfS_S_ii, .Lfunc_end2-_Z11computeLossPfS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 268
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17initializeWeightsPfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17initializeWeightsPfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11forwardPassPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11forwardPassPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11computeLossPfS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11computeLossPfS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
