#include <iostream>
#include <vector>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>

// CSR graph representation
struct CSRGraph {
    int* rowPtr;
    int* colInd;
    int numNodes;
    int numEdges;
};

// Kernel to initialize the BFS frontiers
__global__ void initializeFrontier(int* frontier, int* distances, int startNode, int numNodes) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx == startNode) {
        frontier[idx] = 1;
        distances[idx] = 0;
    } else {
        frontier[idx] = 0;
        distances[idx] = -1;
    }
}

// Kernel to perform BFS on a single GPU
__global__ void bfsKernel(const CSRGraph graph, int* frontier, int* newFrontier, int* distances, int* frontierSize) {
    extern __shared__ int sharedFrontier[];
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    int tid = threadIdx.x;

    if (idx < graph.numNodes && frontier[idx]) {
        int rowStart = graph.rowPtr[idx];
        int rowEnd = graph.rowPtr[idx + 1];
        for (int neighborIdx = rowStart; neighborIdx < rowEnd; ++neighborIdx) {
            int neighbor = graph.colInd[neighborIdx];
            if (atomicCAS(&distances[neighbor], -1, distances[idx] + 1) == -1) {
                sharedFrontier[tid] = neighbor;
                atomicAdd(frontierSize, 1);
            }
        }
    }
    __syncthreads();

    // Copy shared memory to global memory
    if (tid < blockDim.x) {
        int offset = tid + blockIdx.x * blockDim.x;
        if (offset < *frontierSize) {
            newFrontier[offset] = sharedFrontier[tid];
        }
    }
}

// Function to check for CUDA errors
void checkCudaError(cudaError_t err, const char* msg) {
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << msg << " - " << cudaGetErrorString(err) << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    const int numNodes = 2048;
    const int numEdges = 5000; // Example number of edges
    const int startNode = 0;

    // Example CSR graph data (randomly generated or predefined)
    std::vector<int> h_rowPtr(numNodes + 1);
    std::vector<int> h_colInd(numEdges);

    // Initialize CSR graph data (for demonstration, assume it's already filled)
    for (int i = 0; i <= numNodes; ++i) {
        h_rowPtr[i] = i * (numEdges / numNodes); // Simplified for example
    }
    for (int i = 0; i < numEdges; ++i) {
        h_colInd[i] = i % numNodes; // Simplified for example
    }

    CSRGraph d_graph;
    int* d_frontier;
    int* d_newFrontier;
    int* d_distances;
    int* d_frontierSize;

    // Allocate device memory
    checkCudaError(cudaMalloc(&d_graph.rowPtr, (numNodes + 1) * sizeof(int)), "Allocating rowPtr");
    checkCudaError(cudaMalloc(&d_graph.colInd, numEdges * sizeof(int)), "Allocating colInd");
    checkCudaError(cudaMalloc(&d_frontier, numNodes * sizeof(int)), "Allocating frontier");
    checkCudaError(cudaMalloc(&d_newFrontier, numNodes * sizeof(int)), "Allocating newFrontier");
    checkCudaError(cudaMalloc(&d_distances, numNodes * sizeof(int)), "Allocating distances");
    checkCudaError(cudaMalloc(&d_frontierSize, sizeof(int)), "Allocating frontierSize");

    // Copy graph data to device
    checkCudaError(cudaMemcpy(d_graph.rowPtr, h_rowPtr.data(), (numNodes + 1) * sizeof(int), cudaMemcpyHostToDevice), "Copying rowPtr");
    checkCudaError(cudaMemcpy(d_graph.colInd, h_colInd.data(), numEdges * sizeof(int), cudaMemcpyHostToDevice), "Copying colInd");

    // Initialize frontier and distances
    int blockSize = 256;
    int numBlocks = (numNodes + blockSize - 1) / blockSize;
    initializeFrontier<<<numBlocks, blockSize>>>(d_frontier, d_distances, startNode, numNodes);
    checkCudaError(cudaGetLastError(), "Initializing frontier");

    // Perform BFS
    int h_frontierSize = numNodes;
    while (h_frontierSize > 0) {
        cudaMemset(d_frontierSize, 0, sizeof(int));
        bfsKernel<<<numBlocks, blockSize, blockSize * sizeof(int)>>>(d_graph, d_frontier, d_newFrontier, d_distances, d_frontierSize);
        checkCudaError(cudaGetLastError(), "BFS kernel execution");

        // Swap frontiers and get frontier size
        std::swap(d_frontier, d_newFrontier);
        cudaMemcpy(&h_frontierSize, d_frontierSize, sizeof(int), cudaMemcpyDeviceToHost);
    }

    // Clean up
    cudaFree(d_graph.rowPtr);
    cudaFree(d_graph.colInd);
    cudaFree(d_frontier);
    cudaFree(d_newFrontier);
    cudaFree(d_distances);
    cudaFree(d_frontierSize);

    std::cout << "BFS completed successfully." << std::endl;
    return 0;
}
	.file	"tmpxft_000a5805_00000000-6_cuda_code_077589.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4003:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4003:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error: "
.LC1:
	.string	" - "
	.text
	.globl	_Z14checkCudaError9cudaErrorPKc
	.type	_Z14checkCudaError9cudaErrorPKc, @function
_Z14checkCudaError9cudaErrorPKc:
.LFB3998:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	leaq	.LC0(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	leaq	_ZSt4cerr(%rip), %rdi
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE3998:
	.size	_Z14checkCudaError9cudaErrorPKc, .-_Z14checkCudaError9cudaErrorPKc
	.globl	_Z42__device_stub__Z18initializeFrontierPiS_iiPiS_ii
	.type	_Z42__device_stub__Z18initializeFrontierPiS_iiPiS_ii, @function
_Z42__device_stub__Z18initializeFrontierPiS_iiPiS_ii:
.LFB4025:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z18initializeFrontierPiS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4025:
	.size	_Z42__device_stub__Z18initializeFrontierPiS_iiPiS_ii, .-_Z42__device_stub__Z18initializeFrontierPiS_iiPiS_ii
	.globl	_Z18initializeFrontierPiS_ii
	.type	_Z18initializeFrontierPiS_ii, @function
_Z18initializeFrontierPiS_ii:
.LFB4026:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z18initializeFrontierPiS_iiPiS_ii
	.cfi_endproc
.LFE4026:
	.size	_Z18initializeFrontierPiS_ii, .-_Z18initializeFrontierPiS_ii
	.globl	_Z46__device_stub__Z9bfsKernel8CSRGraphPiS0_S0_S0_RK8CSRGraphPiS2_S2_S2_
	.type	_Z46__device_stub__Z9bfsKernel8CSRGraphPiS0_S0_S0_RK8CSRGraphPiS2_S2_S2_, @function
_Z46__device_stub__Z9bfsKernel8CSRGraphPiS0_S0_S0_RK8CSRGraphPiS2_S2_S2_:
.LFB4027:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rsi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rdi, 96(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9bfsKernel8CSRGraphPiS0_S0_S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L13:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4027:
	.size	_Z46__device_stub__Z9bfsKernel8CSRGraphPiS0_S0_S0_RK8CSRGraphPiS2_S2_S2_, .-_Z46__device_stub__Z9bfsKernel8CSRGraphPiS0_S0_S0_RK8CSRGraphPiS2_S2_S2_
	.globl	_Z9bfsKernel8CSRGraphPiS0_S0_S0_
	.type	_Z9bfsKernel8CSRGraphPiS0_S0_S0_, @function
_Z9bfsKernel8CSRGraphPiS0_S0_S0_:
.LFB4028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rcx, %r8
	movq	%rdx, %rcx
	movq	%rsi, %rdx
	movq	%rdi, %rsi
	leaq	16(%rsp), %rdi
	call	_Z46__device_stub__Z9bfsKernel8CSRGraphPiS0_S0_S0_RK8CSRGraphPiS2_S2_S2_
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4028:
	.size	_Z9bfsKernel8CSRGraphPiS0_S0_S0_, .-_Z9bfsKernel8CSRGraphPiS0_S0_S0_
	.section	.rodata.str1.1
.LC2:
	.string	"_Z9bfsKernel8CSRGraphPiS0_S0_S0_"
.LC3:
	.string	"_Z18initializeFrontierPiS_ii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4030:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9bfsKernel8CSRGraphPiS0_S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z18initializeFrontierPiS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4030:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEED2Ev
	.type	_ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB4343:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L21
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L21:
	ret
	.cfi_endproc
.LFE4343:
	.size	_ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
	.weak	_ZNSt6vectorIiSaIiEED1Ev
	.set	_ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
	.section	.rodata.str1.1
.LC4:
	.string	"Allocating rowPtr"
.LC5:
	.string	"Allocating colInd"
.LC6:
	.string	"Allocating frontier"
.LC7:
	.string	"Allocating newFrontier"
.LC8:
	.string	"Allocating distances"
.LC9:
	.string	"Allocating frontierSize"
.LC10:
	.string	"Copying rowPtr"
.LC11:
	.string	"Copying colInd"
.LC12:
	.string	"Initializing frontier"
.LC13:
	.string	"BFS kernel execution"
.LC14:
	.string	"BFS completed successfully."
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3999:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3999
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$8196, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$184, %rsp
	.cfi_def_cfa_offset 208
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
.LEHB0:
	call	_Znwm@PLT
.LEHE0:
	xorl	%r9d, %r9d
	leaq	8196(%rax), %rdx
	movq	%rax, 72(%rsp)
	movq	%rax, %rbp
	movq	%rdx, 88(%rsp)
	movl	%r9d, (%rax)
	xorl	%eax, %eax
.L24:
	addq	$4, %rax
	cmpq	$8196, %rax
	je	.L47
	xorl	%r8d, %r8d
	movl	%r8d, 0(%rbp,%rax)
	jmp	.L24
.L47:
	xorl	%edi, %edi
	movq	%rdx, 80(%rsp)
	movq	%rdi, 104(%rsp)
	movq	%rdi, 112(%rsp)
	movl	$20000, %edi
.LEHB1:
	call	_Znwm@PLT
.LEHE1:
	leaq	20000(%rax), %rdx
	xorl	%esi, %esi
	movq	%rax, 96(%rsp)
	movq	%rax, %rbx
	movq	%rdx, 112(%rsp)
	movl	%esi, (%rax)
	xorl	%eax, %eax
.L26:
	addq	$4, %rax
	cmpq	$20000, %rax
	je	.L48
	xorl	%ecx, %ecx
	movl	%ecx, (%rbx,%rax)
	jmp	.L26
.L48:
	movq	%rdx, 104(%rsp)
	xorl	%eax, %eax
.L28:
	leal	(%rax,%rax), %edx
	movl	%edx, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$2049, %rax
	jne	.L28
	xorl	%eax, %eax
.L29:
	movl	%eax, %edx
	andl	$2047, %edx
	movl	%edx, (%rbx,%rax,4)
	incq	%rax
	cmpq	$5000, %rax
	jne	.L29
	leaq	120(%rsp), %rdi
	movl	$8196, %esi
.LEHB2:
	call	cudaMalloc@PLT
	movl	%eax, %edi
	leaq	.LC4(%rip), %rsi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	128(%rsp), %rdi
	movl	$20000, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	leaq	.LC5(%rip), %rsi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	16(%rsp), %rdi
	movl	$8192, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	leaq	.LC6(%rip), %rsi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	24(%rsp), %rdi
	movl	$8192, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	leaq	.LC7(%rip), %rsi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	32(%rsp), %rdi
	movl	$8192, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	leaq	.LC8(%rip), %rsi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	leaq	.LC9(%rip), %rsi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	120(%rsp), %rdi
	movl	$1, %ecx
	movl	$8196, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	leaq	.LC10(%rip), %rsi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	128(%rsp), %rdi
	movl	$1, %ecx
	movl	$20000, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	leaq	.LC11(%rip), %rsi
	call	_Z14checkCudaError9cudaErrorPKc
	movl	$16777217, %edx
	movl	$536870913, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	salq	$3, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 144(%rsp)
	movl	$1, 152(%rsp)
	movq	%rdi, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L30
.L32:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	leaq	.LC12(%rip), %rsi
	call	_Z14checkCudaError9cudaErrorPKc
	movl	$16777217, %ebx
	movl	$2048, 12(%rsp)
	salq	$8, %rbx
	jmp	.L33
.L30:
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$2048, %ecx
	xorl	%edx, %edx
	call	_Z42__device_stub__Z18initializeFrontierPiS_iiPiS_ii
	jmp	.L32
.L35:
	movq	40(%rsp), %rdi
	movl	$4, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$536870913, %edi
	xorl	%r9d, %r9d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movl	$1024, %r8d
	salq	$3, %rdi
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L49
.L34:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	leaq	.LC13(%rip), %rsi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rax
	leaq	12(%rsp), %rdi
	movl	$2, %ecx
	movq	40(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	movl	$4, %edx
	movq	%rax, 24(%rsp)
	call	cudaMemcpy@PLT
.L33:
	cmpl	$0, 12(%rsp)
	jg	.L35
	jmp	.L50
.L49:
	movups	120(%rsp), %xmm0
	movq	136(%rsp), %rax
	leaq	144(%rsp), %rdi
	movq	40(%rsp), %r8
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	%rax, 160(%rsp)
	movups	%xmm0, 144(%rsp)
	call	_Z46__device_stub__Z9bfsKernel8CSRGraphPiS0_S0_S0_RK8CSRGraphPiS2_S2_S2_
	jmp	.L34
.L50:
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC14(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.LEHE2:
	leaq	96(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	72(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	jmp	.L45
.L41:
	endbr64
	movq	%rax, %rbx
.L36:
	leaq	96(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L37
.L40:
	endbr64
	movq	%rax, %rbx
.L37:
	leaq	72(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L45
	movq	%rbx, %rdi
.LEHB3:
	call	_Unwind_Resume@PLT
.LEHE3:
.L45:
	call	__stack_chk_fail@PLT
.L39:
	addq	$184, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3999:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3999:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3999-.LLSDACSB3999
.LLSDACSB3999:
	.uleb128 .LEHB0-.LFB3999
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3999
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L40-.LFB3999
	.uleb128 0
	.uleb128 .LEHB2-.LFB3999
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L41-.LFB3999
	.uleb128 0
	.uleb128 .LEHB3-.LFB3999
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE3999:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <vector>
#include <hip/hip_runtime.h>


// CSR graph representation
struct CSRGraph {
    int* rowPtr;
    int* colInd;
    int numNodes;
    int numEdges;
};

// Kernel to initialize the BFS frontiers
__global__ void initializeFrontier(int* frontier, int* distances, int startNode, int numNodes) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx == startNode) {
        frontier[idx] = 1;
        distances[idx] = 0;
    } else {
        frontier[idx] = 0;
        distances[idx] = -1;
    }
}

// Kernel to perform BFS on a single GPU
__global__ void bfsKernel(const CSRGraph graph, int* frontier, int* newFrontier, int* distances, int* frontierSize) {
    extern __shared__ int sharedFrontier[];
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    int tid = threadIdx.x;

    if (idx < graph.numNodes && frontier[idx]) {
        int rowStart = graph.rowPtr[idx];
        int rowEnd = graph.rowPtr[idx + 1];
        for (int neighborIdx = rowStart; neighborIdx < rowEnd; ++neighborIdx) {
            int neighbor = graph.colInd[neighborIdx];
            if (atomicCAS(&distances[neighbor], -1, distances[idx] + 1) == -1) {
                sharedFrontier[tid] = neighbor;
                atomicAdd(frontierSize, 1);
            }
        }
    }
    __syncthreads();

    // Copy shared memory to global memory
    if (tid < blockDim.x) {
        int offset = tid + blockIdx.x * blockDim.x;
        if (offset < *frontierSize) {
            newFrontier[offset] = sharedFrontier[tid];
        }
    }
}

// Function to check for CUDA errors
void checkCudaError(hipError_t err, const char* msg) {
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << msg << " - " << hipGetErrorString(err) << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    const int numNodes = 2048;
    const int numEdges = 5000; // Example number of edges
    const int startNode = 0;

    // Example CSR graph data (randomly generated or predefined)
    std::vector<int> h_rowPtr(numNodes + 1);
    std::vector<int> h_colInd(numEdges);

    // Initialize CSR graph data (for demonstration, assume it's already filled)
    for (int i = 0; i <= numNodes; ++i) {
        h_rowPtr[i] = i * (numEdges / numNodes); // Simplified for example
    }
    for (int i = 0; i < numEdges; ++i) {
        h_colInd[i] = i % numNodes; // Simplified for example
    }

    CSRGraph d_graph;
    int* d_frontier;
    int* d_newFrontier;
    int* d_distances;
    int* d_frontierSize;

    // Allocate device memory
    checkCudaError(hipMalloc(&d_graph.rowPtr, (numNodes + 1) * sizeof(int)), "Allocating rowPtr");
    checkCudaError(hipMalloc(&d_graph.colInd, numEdges * sizeof(int)), "Allocating colInd");
    checkCudaError(hipMalloc(&d_frontier, numNodes * sizeof(int)), "Allocating frontier");
    checkCudaError(hipMalloc(&d_newFrontier, numNodes * sizeof(int)), "Allocating newFrontier");
    checkCudaError(hipMalloc(&d_distances, numNodes * sizeof(int)), "Allocating distances");
    checkCudaError(hipMalloc(&d_frontierSize, sizeof(int)), "Allocating frontierSize");

    // Copy graph data to device
    checkCudaError(hipMemcpy(d_graph.rowPtr, h_rowPtr.data(), (numNodes + 1) * sizeof(int), hipMemcpyHostToDevice), "Copying rowPtr");
    checkCudaError(hipMemcpy(d_graph.colInd, h_colInd.data(), numEdges * sizeof(int), hipMemcpyHostToDevice), "Copying colInd");

    // Initialize frontier and distances
    int blockSize = 256;
    int numBlocks = (numNodes + blockSize - 1) / blockSize;
    initializeFrontier<<<numBlocks, blockSize>>>(d_frontier, d_distances, startNode, numNodes);
    checkCudaError(hipGetLastError(), "Initializing frontier");

    // Perform BFS
    int h_frontierSize = numNodes;
    while (h_frontierSize > 0) {
        hipMemset(d_frontierSize, 0, sizeof(int));
        bfsKernel<<<numBlocks, blockSize, blockSize * sizeof(int)>>>(d_graph, d_frontier, d_newFrontier, d_distances, d_frontierSize);
        checkCudaError(hipGetLastError(), "BFS kernel execution");

        // Swap frontiers and get frontier size
        std::swap(d_frontier, d_newFrontier);
        hipMemcpy(&h_frontierSize, d_frontierSize, sizeof(int), hipMemcpyDeviceToHost);
    }

    // Clean up
    hipFree(d_graph.rowPtr);
    hipFree(d_graph.colInd);
    hipFree(d_frontier);
    hipFree(d_newFrontier);
    hipFree(d_distances);
    hipFree(d_frontierSize);

    std::cout << "BFS completed successfully." << std::endl;
    return 0;
}
	.text
	.file	"cuda_code_077589.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__initializeFrontierPiS_ii # -- Begin function _Z33__device_stub__initializeFrontierPiS_ii
	.type	_Z33__device_stub__initializeFrontierPiS_ii,@function
_Z33__device_stub__initializeFrontierPiS_ii: # @_Z33__device_stub__initializeFrontierPiS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18initializeFrontierPiS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__initializeFrontierPiS_ii, .Lfunc_end0-_Z33__device_stub__initializeFrontierPiS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__bfsKernel8CSRGraphPiS0_S0_S0_ # -- Begin function _Z24__device_stub__bfsKernel8CSRGraphPiS0_S0_S0_
	.type	_Z24__device_stub__bfsKernel8CSRGraphPiS0_S0_S0_,@function
_Z24__device_stub__bfsKernel8CSRGraphPiS0_S0_S0_: # @_Z24__device_stub__bfsKernel8CSRGraphPiS0_S0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	176(%rsp), %rcx
	leaq	80(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9bfsKernel8CSRGraphPiS0_S0_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__bfsKernel8CSRGraphPiS0_S0_S0_, .Lfunc_end1-_Z24__device_stub__bfsKernel8CSRGraphPiS0_S0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCudaError10hipError_tPKc # -- Begin function _Z14checkCudaError10hipError_tPKc
	.type	_Z14checkCudaError10hipError_tPKc,@function
_Z14checkCudaError10hipError_tPKc:      # @_Z14checkCudaError10hipError_tPKc
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB2_2
# %bb.1:
	retq
.LBB2_2:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %r14
	movl	%edi, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	_Z14checkCudaError10hipError_tPKc, .Lfunc_end2-_Z14checkCudaError10hipError_tPKc
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$8196, %edi                     # imm = 0x2004
	callq	_Znwm
	movq	%rax, %rbx
	movl	$8196, %edx                     # imm = 0x2004
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.Ltmp0:
	movl	$20000, %edi                    # imm = 0x4E20
	callq	_Znwm
.Ltmp1:
# %bb.1:
	movq	%rax, %r14
	xorl	%r15d, %r15d
	movl	$20000, %edx                    # imm = 0x4E20
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB3_2:                                # =>This Inner Loop Header: Depth=1
	movl	%r15d, (%rbx,%r15,2)
	addq	$2, %r15
	cmpq	$4098, %r15                     # imm = 0x1002
	jne	.LBB3_2
# %bb.3:                                # %.preheader.preheader
	xorl	%eax, %eax
.LBB3_4:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	%eax, %ecx
	andl	$2047, %ecx                     # imm = 0x7FF
	movl	%ecx, (%r14,%rax,4)
	incq	%rax
	cmpq	$5000, %rax                     # imm = 0x1388
	jne	.LBB3_4
# %bb.5:
.Ltmp3:
	leaq	72(%rsp), %rdi
	movl	$8196, %esi                     # imm = 0x2004
	callq	hipMalloc
.Ltmp4:
# %bb.6:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
.Ltmp5:
	movl	$.L.str.2, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
.Ltmp6:
# %bb.7:
	leaq	80(%rsp), %rdi
.Ltmp7:
	movl	$20000, %esi                    # imm = 0x4E20
	callq	hipMalloc
.Ltmp8:
# %bb.8:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit35
.Ltmp9:
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
.Ltmp10:
# %bb.9:
.Ltmp11:
	leaq	32(%rsp), %rdi
	movl	$8192, %esi                     # imm = 0x2000
	callq	hipMalloc
.Ltmp12:
# %bb.10:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit36
.Ltmp13:
	movl	$.L.str.4, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
.Ltmp14:
# %bb.11:
.Ltmp15:
	leaq	48(%rsp), %rdi
	movl	$8192, %esi                     # imm = 0x2000
	callq	hipMalloc
.Ltmp16:
# %bb.12:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit37
.Ltmp17:
	movl	$.L.str.5, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
.Ltmp18:
# %bb.13:
.Ltmp19:
	leaq	56(%rsp), %rdi
	movl	$8192, %esi                     # imm = 0x2000
	callq	hipMalloc
.Ltmp20:
# %bb.14:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit38
.Ltmp21:
	movl	$.L.str.6, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
.Ltmp22:
# %bb.15:
.Ltmp23:
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
.Ltmp24:
# %bb.16:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit39
.Ltmp25:
	movl	$.L.str.7, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
.Ltmp26:
# %bb.17:
	movq	72(%rsp), %rdi
.Ltmp27:
	movl	$8196, %edx                     # imm = 0x2004
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp28:
# %bb.18:
.Ltmp29:
	movl	$.L.str.8, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
.Ltmp30:
# %bb.19:
	movq	80(%rsp), %rdi
.Ltmp31:
	movl	$20000, %edx                    # imm = 0x4E20
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp32:
# %bb.20:
.Ltmp33:
	movl	$.L.str.9, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
.Ltmp34:
# %bb.21:
.Ltmp36:
	movabsq	$4294967304, %rdi               # imm = 0x100000008
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp37:
# %bb.22:
	testl	%eax, %eax
	jne	.LBB3_24
# %bb.23:
	movq	32(%rsp), %rdi
	movq	56(%rsp), %rsi
.Ltmp38:
	xorl	%edx, %edx
	movl	$2048, %ecx                     # imm = 0x800
	callq	_Z33__device_stub__initializeFrontierPiS_ii
.Ltmp39:
.LBB3_24:
.Ltmp40:
	callq	hipGetLastError
.Ltmp41:
# %bb.25:
.Ltmp42:
	movl	$.L.str.10, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
.Ltmp43:
# %bb.26:
	leaq	68(%rsp), %r15
	movl	$2048, (%r15)                   # imm = 0x800
	movabsq	$4294967304, %r12               # imm = 0x100000008
	movabsq	$4294967552, %r13               # imm = 0x100000100
.LBB3_28:                               # =>This Inner Loop Header: Depth=1
	movq	40(%rsp), %rdi
.Ltmp45:
	movl	$4, %edx
	xorl	%esi, %esi
	callq	hipMemset
.Ltmp46:
# %bb.29:                               #   in Loop: Header=BB3_28 Depth=1
.Ltmp47:
	movl	$1024, %r8d                     # imm = 0x400
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp48:
# %bb.30:                               #   in Loop: Header=BB3_28 Depth=1
	testl	%eax, %eax
	jne	.LBB3_32
# %bb.31:                               #   in Loop: Header=BB3_28 Depth=1
	movq	32(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	56(%rsp), %rdx
	movq	40(%rsp), %rcx
.Ltmp49:
	movq	88(%rsp), %rax
	movq	%rax, 16(%rsp)
	movups	72(%rsp), %xmm0
	movups	%xmm0, (%rsp)
	callq	_Z24__device_stub__bfsKernel8CSRGraphPiS0_S0_S0_
.Ltmp50:
.LBB3_32:                               #   in Loop: Header=BB3_28 Depth=1
.Ltmp51:
	callq	hipGetLastError
.Ltmp52:
# %bb.33:                               #   in Loop: Header=BB3_28 Depth=1
.Ltmp53:
	movl	$.L.str.11, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
.Ltmp54:
# %bb.34:                               #   in Loop: Header=BB3_28 Depth=1
	movq	32(%rsp), %rax
	movq	48(%rsp), %rcx
	movq	%rcx, 32(%rsp)
	movq	%rax, 48(%rsp)
	movq	40(%rsp), %rsi
.Ltmp55:
	movl	$4, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp56:
# %bb.27:                               # %thread-pre-split
                                        #   in Loop: Header=BB3_28 Depth=1
	cmpl	$0, 68(%rsp)
	jg	.LBB3_28
# %bb.37:
	movq	72(%rsp), %rdi
.Ltmp58:
	callq	hipFree
.Ltmp59:
# %bb.38:
	movq	80(%rsp), %rdi
.Ltmp60:
	callq	hipFree
.Ltmp61:
# %bb.39:
	movq	32(%rsp), %rdi
.Ltmp62:
	callq	hipFree
.Ltmp63:
# %bb.40:
	movq	48(%rsp), %rdi
.Ltmp64:
	callq	hipFree
.Ltmp65:
# %bb.41:
	movq	56(%rsp), %rdi
.Ltmp66:
	callq	hipFree
.Ltmp67:
# %bb.42:
	movq	40(%rsp), %rdi
.Ltmp68:
	callq	hipFree
.Ltmp69:
# %bb.43:
.Ltmp70:
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.12, %esi
	movl	$27, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp71:
# %bb.44:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %r15
.Ltmp72:
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp73:
# %bb.45:                               # %.noexc
.Ltmp74:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp75:
# %bb.46:                               # %.noexc47
.Ltmp76:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp77:
# %bb.47:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit41
	movq	%r14, %rdi
	callq	_ZdlPv
	movq	%rbx, %rdi
	callq	_ZdlPv
	xorl	%eax, %eax
	addq	$96, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB3_51:
	.cfi_def_cfa_offset 144
.Ltmp2:
	movq	%rax, %r15
	jmp	.LBB3_50
.LBB3_52:
.Ltmp44:
	jmp	.LBB3_49
.LBB3_36:                               # %.loopexit.split-lp
.Ltmp78:
	jmp	.LBB3_49
.LBB3_48:
.Ltmp35:
	jmp	.LBB3_49
.LBB3_35:                               # %.loopexit
.Ltmp57:
.LBB3_49:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit43
	movq	%rax, %r15
	movq	%r14, %rdi
	callq	_ZdlPv
.LBB3_50:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit45
	movq	%rbx, %rdi
	callq	_ZdlPv
	movq	%r15, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table3:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp1-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp3-.Ltmp1                  #   Call between .Ltmp1 and .Ltmp3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp34-.Ltmp3                 #   Call between .Ltmp3 and .Ltmp34
	.uleb128 .Ltmp35-.Lfunc_begin0          #     jumps to .Ltmp35
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp36-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp43-.Ltmp36                #   Call between .Ltmp36 and .Ltmp43
	.uleb128 .Ltmp44-.Lfunc_begin0          #     jumps to .Ltmp44
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp45-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp56-.Ltmp45                #   Call between .Ltmp45 and .Ltmp56
	.uleb128 .Ltmp57-.Lfunc_begin0          #     jumps to .Ltmp57
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp58-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp77-.Ltmp58                #   Call between .Ltmp58 and .Ltmp77
	.uleb128 .Ltmp78-.Lfunc_begin0          #     jumps to .Ltmp78
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp77-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Lfunc_end3-.Ltmp77            #   Call between .Ltmp77 and .Lfunc_end3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18initializeFrontierPiS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9bfsKernel8CSRGraphPiS0_S0_S0_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18initializeFrontierPiS_ii,@object # @_Z18initializeFrontierPiS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z18initializeFrontierPiS_ii
	.p2align	3, 0x0
_Z18initializeFrontierPiS_ii:
	.quad	_Z33__device_stub__initializeFrontierPiS_ii
	.size	_Z18initializeFrontierPiS_ii, 8

	.type	_Z9bfsKernel8CSRGraphPiS0_S0_S0_,@object # @_Z9bfsKernel8CSRGraphPiS0_S0_S0_
	.globl	_Z9bfsKernel8CSRGraphPiS0_S0_S0_
	.p2align	3, 0x0
_Z9bfsKernel8CSRGraphPiS0_S0_S0_:
	.quad	_Z24__device_stub__bfsKernel8CSRGraphPiS0_S0_S0_
	.size	_Z9bfsKernel8CSRGraphPiS0_S0_S0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" - "
	.size	.L.str.1, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Allocating rowPtr"
	.size	.L.str.2, 18

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Allocating colInd"
	.size	.L.str.3, 18

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Allocating frontier"
	.size	.L.str.4, 20

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Allocating newFrontier"
	.size	.L.str.5, 23

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Allocating distances"
	.size	.L.str.6, 21

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Allocating frontierSize"
	.size	.L.str.7, 24

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Copying rowPtr"
	.size	.L.str.8, 15

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Copying colInd"
	.size	.L.str.9, 15

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Initializing frontier"
	.size	.L.str.10, 22

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"BFS kernel execution"
	.size	.L.str.11, 21

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"BFS completed successfully."
	.size	.L.str.12, 28

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18initializeFrontierPiS_ii"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9bfsKernel8CSRGraphPiS0_S0_S0_"
	.size	.L__unnamed_2, 33

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__initializeFrontierPiS_ii
	.addrsig_sym _Z24__device_stub__bfsKernel8CSRGraphPiS0_S0_S0_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z18initializeFrontierPiS_ii
	.addrsig_sym _Z9bfsKernel8CSRGraphPiS0_S0_S0_
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18initializeFrontierPiS_ii ; -- Begin function _Z18initializeFrontierPiS_ii
	.globl	_Z18initializeFrontierPiS_ii
	.p2align	8
	.type	_Z18initializeFrontierPiS_ii,@function
_Z18initializeFrontierPiS_ii:           ; @_Z18initializeFrontierPiS_ii
; %bb.0:
	s_clause 0x2
	s_load_b32 s4, s[0:1], 0x24
	s_load_b32 s5, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	v_cmp_eq_u32_e32 vcc_lo, s5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, s5, v1
	v_cndmask_b32_e64 v5, 0, -1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_store_b32 v[0:1], v4, off
	global_store_b32 v[2:3], v5, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18initializeFrontierPiS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18initializeFrontierPiS_ii, .Lfunc_end0-_Z18initializeFrontierPiS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 144
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9bfsKernel8CSRGraphPiS0_S0_S0_ ; -- Begin function _Z9bfsKernel8CSRGraphPiS0_S0_S0_
	.globl	_Z9bfsKernel8CSRGraphPiS0_S0_S0_
	.p2align	8
	.type	_Z9bfsKernel8CSRGraphPiS0_S0_S0_,@function
_Z9bfsKernel8CSRGraphPiS0_S0_S0_:       ; @_Z9bfsKernel8CSRGraphPiS0_S0_S0_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x44
	s_load_b32 s3, s[0:1], 0x10
	s_load_b256 s[4:11], s[0:1], 0x18
	s_mov_b32 s13, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_8
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_8
; %bb.2:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v5, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v2, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_8
; %bb.3:                                ; %.lr.ph
	v_ashrrev_i32_e32 v7, 31, v2
	v_dual_mov_b32 v6, v2 :: v_dual_mov_b32 v13, 0
	v_add_co_u32 v4, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_lshl_add_u32 v12, v0, 2, 0
	v_mov_b32_e32 v9, -1
	s_mov_b32 s1, 0
	v_add_co_u32 v6, vcc_lo, s2, v6
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
.LBB1_4:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v10, v[6:7], off
	global_load_b32 v8, v[4:5], off
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(1)
	v_ashrrev_i32_e32 v11, 31, v10
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[14:15], 2, v[10:11]
	v_add_co_u32 v14, vcc_lo, s8, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v15, vcc_lo, s9, v15, vcc_lo
	global_atomic_cmpswap_b32 v8, v[14:15], v[8:9], off glc
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 -1, v8
	s_cbranch_execz .LBB1_7
; %bb.5:                                ;   in Loop: Header=BB1_4 Depth=1
	s_mov_b32 s2, exec_lo
	ds_store_b32 v12, v10
	v_mbcnt_lo_u32_b32 v8, s2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	s_and_b32 s3, exec_lo, vcc_lo
	s_mov_b32 exec_lo, s3
	s_cbranch_execz .LBB1_7
; %bb.6:                                ;   in Loop: Header=BB1_4 Depth=1
	s_bcnt1_i32_b32 s2, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v8, s2
	global_atomic_add_u32 v13, v8, s[10:11]
.LBB1_7:                                ;   in Loop: Header=BB1_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v2, 1, v2
	v_add_co_u32 v6, s0, v6, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v7, s0, 0, v7, s0
	v_cmp_ge_i32_e32 vcc_lo, v2, v3
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_4
.LBB1_8:                                ; %.loopexit
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e64 s12, v0
	s_cbranch_execz .LBB1_11
; %bb.9:
	v_mov_b32_e32 v2, 0
	global_load_b32 v2, v2, s[10:11]
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v1, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_11
; %bb.10:
	v_lshl_add_u32 v0, v0, 2, 0
	v_ashrrev_i32_e32 v2, 31, v1
	ds_load_b32 v3, v0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v3, off
.LBB1_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9bfsKernel8CSRGraphPiS0_S0_S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9bfsKernel8CSRGraphPiS0_S0_S0_, .Lfunc_end1-_Z9bfsKernel8CSRGraphPiS0_S0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 568
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18initializeFrontierPiS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18initializeFrontierPiS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           24
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         176
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9bfsKernel8CSRGraphPiS0_S0_S0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9bfsKernel8CSRGraphPiS0_S0_S0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
