#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>

#define LAYERS 10
#define NEURONS 64
#define BATCH_SIZE 256
#define WARPSIZE 32

// Kernel to perform matrix-vector multiplication using shared memory
__global__ void matrixVectorMul(const float* __restrict__ weights, const float* __restrict__ input, float* __restrict__ output) {
    __shared__ float s_weights[WARPSIZE][NEURONS];
    __shared__ float s_input[WARPSIZE];

    int neuron = threadIdx.x % NEURONS;
    int warp_id = threadIdx.x / WARPSIZE;
    int batch_id = blockIdx.x * blockDim.x + warp_id;

    // Load input into shared memory
    if (neuron < NEURONS) {
        s_input[neuron] = input[batch_id * NEURONS + neuron];
    }
    __syncthreads();

    // Initialize output to zero
    float sum = 0.0f;

    // Loop over all layers
    for (int layer = 0; layer < LAYERS; ++layer) {
        // Load weights into shared memory
        if (neuron < NEURONS) {
            s_weights[threadIdx.x % WARPSIZE][neuron] = weights[layer * NEURONS * NEURONS + neuron * NEURONS + threadIdx.x % NEURONS];
        }
        __syncthreads();

        // Perform dot product
        for (int k = 0; k < NEURONS; k += WARPSIZE) {
            int index = k + threadIdx.x % WARPSIZE;
            if (index < NEURONS) {
                sum += s_weights[threadIdx.x % WARPSIZE][index] * s_input[index];
            }
            __syncthreads();
        }

        // Store result and load next input for the next layer
        if (neuron == 0) {
            output[batch_id * NEURONS] = sum;
        }
        __syncthreads();

        // Load next input for the next layer
        if (neuron < NEURONS) {
            s_input[neuron] = output[batch_id * NEURONS + neuron];
        }
        __syncthreads();

        sum = 0.0f;
    }
}

// Utility function to check for CUDA errors
void checkCudaError(cudaError_t error, const char* file, int line) {
    if (error != cudaSuccess) {
        std::cerr << "CUDA error at " << file << ":" << line << " - " << cudaGetErrorString(error) << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    // Seed random number generator
    curandGenerator_t gen;
    curandCreateGenerator(&gen, CURAND_RNG_PSEUDO_DEFAULT);
    curandSetPseudoRandomGeneratorSeed(gen, 1234ULL);

    // Allocate and initialize host memory
    float* h_weights = new float[LAYERS * NEURONS * NEURONS];
    float* h_input = new float[BATCH_SIZE * NEURONS];
    float* h_output = new float[BATCH_SIZE * NEURONS];

    curandGenerateUniform(gen, h_weights, LAYERS * NEURONS * NEURONS);
    curandGenerateUniform(gen, h_input, BATCH_SIZE * NEURONS);

    // Allocate device memory
    float* d_weights;
    float* d_input;
    float* d_output;

    checkCudaError(cudaMalloc(&d_weights, LAYERS * NEURONS * NEURONS * sizeof(float)), __FILE__, __LINE__);
    checkCudaError(cudaMalloc(&d_input, BATCH_SIZE * NEURONS * sizeof(float)), __FILE__, __LINE__);
    checkCudaError(cudaMalloc(&d_output, BATCH_SIZE * NEURONS * sizeof(float)), __FILE__, __LINE__);

    // Copy data from host to device
    checkCudaError(cudaMemcpy(d_weights, h_weights, LAYERS * NEURONS * NEURONS * sizeof(float), cudaMemcpyHostToDevice), __FILE__, __LINE__);
    checkCudaError(cudaMemcpy(d_input, h_input, BATCH_SIZE * NEURONS * sizeof(float), cudaMemcpyHostToDevice), __FILE__, __LINE__);

    // Launch kernel
    int threadsPerBlock = WARPSIZE * (NEURONS / WARPSIZE);
    int blocksPerGrid = (BATCH_SIZE + threadsPerBlock - 1) / threadsPerBlock;

    matrixVectorMul<<<blocksPerGrid, threadsPerBlock>>>(d_weights, d_input, d_output);
    checkCudaError(cudaGetLastError(), __FILE__, __LINE__);
    checkCudaError(cudaDeviceSynchronize(), __FILE__, __LINE__);

    // Copy result back to host
    checkCudaError(cudaMemcpy(h_output, d_output, BATCH_SIZE * NEURONS * sizeof(float), cudaMemcpyDeviceToHost), __FILE__, __LINE__);

    // Free device memory
    checkCudaError(cudaFree(d_weights), __FILE__, __LINE__);
    checkCudaError(cudaFree(d_input), __FILE__, __LINE__);
    checkCudaError(cudaFree(d_output), __FILE__, __LINE__);

    // Free host memory
    delete[] h_weights;
    delete[] h_input;
    delete[] h_output;

    curandDestroyGenerator(gen);

    std::cout << "Neural network training complete." << std::endl;

    return 0;
}
	.file	"tmpxft_0010392c_00000000-6_cuda_code_000512.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3853:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3853:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error at "
.LC1:
	.string	":"
.LC2:
	.string	" - "
	.text
	.globl	_Z14checkCudaError9cudaErrorPKci
	.type	_Z14checkCudaError9cudaErrorPKci, @function
_Z14checkCudaError9cudaErrorPKci:
.LFB3849:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r12
	leaq	.LC0(%rip), %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%edi, %ebx
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	ret
	.cfi_endproc
.LFE3849:
	.size	_Z14checkCudaError9cudaErrorPKci, .-_Z14checkCudaError9cudaErrorPKci
	.globl	_Z41__device_stub__Z15matrixVectorMulPKfS0_PfPKfS0_Pf
	.type	_Z41__device_stub__Z15matrixVectorMulPKfS0_PfPKfS0_Pf, @function
_Z41__device_stub__Z15matrixVectorMulPKfS0_PfPKfS0_Pf:
.LFB3875:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	leaq	48(%rsp), %rdi
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15matrixVectorMulPKfS0_Pf(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3875:
	.size	_Z41__device_stub__Z15matrixVectorMulPKfS0_PfPKfS0_Pf, .-_Z41__device_stub__Z15matrixVectorMulPKfS0_PfPKfS0_Pf
	.globl	_Z15matrixVectorMulPKfS0_Pf
	.type	_Z15matrixVectorMulPKfS0_Pf, @function
_Z15matrixVectorMulPKfS0_Pf:
.LFB3876:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z15matrixVectorMulPKfS0_PfPKfS0_Pf
	.cfi_endproc
.LFE3876:
	.size	_Z15matrixVectorMulPKfS0_Pf, .-_Z15matrixVectorMulPKfS0_Pf
	.section	.rodata.str1.1
.LC3:
	.string	"/home/ubuntu/Datasets/cuda-codes-80k-from-llm-dedup/cuda_code_000512.cu"
.LC4:
	.string	"Neural network training complete."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3850:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$100, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leaq	.LC3(%rip), %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	curandCreateGenerator@PLT
	movq	(%rsp), %rdi
	movl	$1234, %esi
	call	curandSetPseudoRandomGeneratorSeed@PLT
	movl	$163840, %edi
	call	_Znam@PLT
	movl	$65536, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$65536, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movq	(%rsp), %rdi
	movl	$40960, %edx
	movq	%r12, %rsi
	movq	%rax, %r13
	call	curandGenerateUniform@PLT
	movq	(%rsp), %rdi
	movl	$16384, %edx
	movq	%rbp, %rsi
	call	curandGenerateUniform@PLT
	leaq	8(%rsp), %rdi
	movl	$163840, %esi
	call	cudaMalloc@PLT
	movl	$88, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	leaq	16(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	movl	$89, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	leaq	24(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	movl	$90, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$163840, %edx
	call	cudaMemcpy@PLT
	movl	$93, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movl	$94, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movl	$67108865, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1073741825, %edi
	salq	$6, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$2, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z41__device_stub__Z15matrixVectorMulPKfS0_PfPKfS0_Pf
.L14:
	call	cudaGetLastError@PLT
	movl	$101, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	call	cudaDeviceSynchronize@PLT
	movl	$102, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movl	$105, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movl	$108, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	$109, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	$110, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	movq	(%rsp), %rdi
	call	curandDestroyGenerator@PLT
	leaq	_ZSt4cout(%rip), %rdi
	leaq	.LC4(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3850:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z15matrixVectorMulPKfS0_Pf"
.LC6:
	.string	"precalc_xorwow_matrix"
.LC7:
	.string	"precalc_xorwow_offset_matrix"
.LC8:
	.string	"mrg32k3aM1"
.LC9:
	.string	"mrg32k3aM2"
.LC10:
	.string	"mrg32k3aM1SubSeq"
.LC11:
	.string	"mrg32k3aM2SubSeq"
.LC12:
	.string	"mrg32k3aM1Seq"
.LC13:
	.string	"mrg32k3aM2Seq"
.LC14:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3878:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15matrixVectorMulPKfS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3878:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>

#define LAYERS 10
#define NEURONS 64
#define BATCH_SIZE 256
#define WARPSIZE 32

// Kernel to perform matrix-vector multiplication using shared memory
__global__ void matrixVectorMul(const float* __restrict__ weights, const float* __restrict__ input, float* __restrict__ output) {
    __shared__ float s_weights[WARPSIZE][NEURONS];
    __shared__ float s_input[WARPSIZE];

    int neuron = threadIdx.x % NEURONS;
    int warp_id = threadIdx.x / WARPSIZE;
    int batch_id = blockIdx.x * blockDim.x + warp_id;

    // Load input into shared memory
    if (neuron < NEURONS) {
        s_input[neuron] = input[batch_id * NEURONS + neuron];
    }
    __syncthreads();

    // Initialize output to zero
    float sum = 0.0f;

    // Loop over all layers
    for (int layer = 0; layer < LAYERS; ++layer) {
        // Load weights into shared memory
        if (neuron < NEURONS) {
            s_weights[threadIdx.x % WARPSIZE][neuron] = weights[layer * NEURONS * NEURONS + neuron * NEURONS + threadIdx.x % NEURONS];
        }
        __syncthreads();

        // Perform dot product
        for (int k = 0; k < NEURONS; k += WARPSIZE) {
            int index = k + threadIdx.x % WARPSIZE;
            if (index < NEURONS) {
                sum += s_weights[threadIdx.x % WARPSIZE][index] * s_input[index];
            }
            __syncthreads();
        }

        // Store result and load next input for the next layer
        if (neuron == 0) {
            output[batch_id * NEURONS] = sum;
        }
        __syncthreads();

        // Load next input for the next layer
        if (neuron < NEURONS) {
            s_input[neuron] = output[batch_id * NEURONS + neuron];
        }
        __syncthreads();

        sum = 0.0f;
    }
}

// Utility function to check for CUDA errors
void checkCudaError(hipError_t error, const char* file, int line) {
    if (error != hipSuccess) {
        std::cerr << "CUDA error at " << file << ":" << line << " - " << hipGetErrorString(error) << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    // Seed random number generator
    hiprandGenerator_t gen;
    hiprandCreateGenerator(&gen, HIPRAND_RNG_PSEUDO_DEFAULT);
    hiprandSetPseudoRandomGeneratorSeed(gen, 1234ULL);

    // Allocate and initialize host memory
    float* h_weights = new float[LAYERS * NEURONS * NEURONS];
    float* h_input = new float[BATCH_SIZE * NEURONS];
    float* h_output = new float[BATCH_SIZE * NEURONS];

    hiprandGenerateUniform(gen, h_weights, LAYERS * NEURONS * NEURONS);
    hiprandGenerateUniform(gen, h_input, BATCH_SIZE * NEURONS);

    // Allocate device memory
    float* d_weights;
    float* d_input;
    float* d_output;

    checkCudaError(hipMalloc(&d_weights, LAYERS * NEURONS * NEURONS * sizeof(float)), __FILE__, __LINE__);
    checkCudaError(hipMalloc(&d_input, BATCH_SIZE * NEURONS * sizeof(float)), __FILE__, __LINE__);
    checkCudaError(hipMalloc(&d_output, BATCH_SIZE * NEURONS * sizeof(float)), __FILE__, __LINE__);

    // Copy data from host to device
    checkCudaError(hipMemcpy(d_weights, h_weights, LAYERS * NEURONS * NEURONS * sizeof(float), hipMemcpyHostToDevice), __FILE__, __LINE__);
    checkCudaError(hipMemcpy(d_input, h_input, BATCH_SIZE * NEURONS * sizeof(float), hipMemcpyHostToDevice), __FILE__, __LINE__);

    // Launch kernel
    int threadsPerBlock = WARPSIZE * (NEURONS / WARPSIZE);
    int blocksPerGrid = (BATCH_SIZE + threadsPerBlock - 1) / threadsPerBlock;

    matrixVectorMul<<<blocksPerGrid, threadsPerBlock>>>(d_weights, d_input, d_output);
    checkCudaError(hipGetLastError(), __FILE__, __LINE__);
    checkCudaError(hipDeviceSynchronize(), __FILE__, __LINE__);

    // Copy result back to host
    checkCudaError(hipMemcpy(h_output, d_output, BATCH_SIZE * NEURONS * sizeof(float), hipMemcpyDeviceToHost), __FILE__, __LINE__);

    // Free device memory
    checkCudaError(hipFree(d_weights), __FILE__, __LINE__);
    checkCudaError(hipFree(d_input), __FILE__, __LINE__);
    checkCudaError(hipFree(d_output), __FILE__, __LINE__);

    // Free host memory
    delete[] h_weights;
    delete[] h_input;
    delete[] h_output;

    hiprandDestroyGenerator(gen);

    std::cout << "Neural network training complete." << std::endl;

    return 0;
}
	.text
	.file	"cuda_code_000512.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z30__device_stub__matrixVectorMulPKfS0_Pf # -- Begin function _Z30__device_stub__matrixVectorMulPKfS0_Pf
	.type	_Z30__device_stub__matrixVectorMulPKfS0_Pf,@function
_Z30__device_stub__matrixVectorMulPKfS0_Pf: # @_Z30__device_stub__matrixVectorMulPKfS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15matrixVectorMulPKfS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__matrixVectorMulPKfS0_Pf, .Lfunc_end0-_Z30__device_stub__matrixVectorMulPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCudaError10hipError_tPKci # -- Begin function _Z14checkCudaError10hipError_tPKci
	.type	_Z14checkCudaError10hipError_tPKci,@function
_Z14checkCudaError10hipError_tPKci:     # @_Z14checkCudaError10hipError_tPKci
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB1_2
# %bb.1:
	retq
.LBB1_2:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rsi, %r14
	movl	%edi, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z14checkCudaError10hipError_tPKci, .Lfunc_end1-_Z14checkCudaError10hipError_tPKci
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %r12
	movq	%r12, %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hiprandCreateGenerator
	movq	(%r12), %rdi
	movl	$1234, %esi                     # imm = 0x4D2
	callq	hiprandSetPseudoRandomGeneratorSeed
	movl	$163840, %edi                   # imm = 0x28000
	callq	_Znam
	movq	%rax, %rbx
	movl	$65536, %edi                    # imm = 0x10000
	callq	_Znam
	movq	%rax, %r14
	movl	$65536, %edi                    # imm = 0x10000
	callq	_Znam
	movq	%rax, %r15
	movq	(%r12), %rdi
	movl	$40960, %edx                    # imm = 0xA000
	movq	%rbx, %rsi
	callq	hiprandGenerateUniform
	movq	(%r12), %rdi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%r14, %rsi
	callq	hiprandGenerateUniform
	leaq	16(%rsp), %r13
	movl	$163840, %esi                   # imm = 0x28000
	movq	%r13, %rdi
	callq	hipMalloc
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$88, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	leaq	8(%rsp), %r12
	movl	$65536, %esi                    # imm = 0x10000
	movq	%r12, %rdi
	callq	hipMalloc
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$89, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	%rsp, %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$90, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	(%r13), %rdi
	movl	$163840, %edx                   # imm = 0x28000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$93, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	(%r12), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$94, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movabsq	$4294967300, %rdi               # imm = 0x100000004
	leaq	60(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	_Z30__device_stub__matrixVectorMulPKfS0_Pf
.LBB2_2:
	callq	hipGetLastError
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$101, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	callq	hipDeviceSynchronize
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$102, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$105, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$108, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$109, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$110, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	24(%rsp), %rdi
	callq	hiprandDestroyGenerator
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15matrixVectorMulPKfS0_Pf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15matrixVectorMulPKfS0_Pf,@object # @_Z15matrixVectorMulPKfS0_Pf
	.section	.rodata,"a",@progbits
	.globl	_Z15matrixVectorMulPKfS0_Pf
	.p2align	3, 0x0
_Z15matrixVectorMulPKfS0_Pf:
	.quad	_Z30__device_stub__matrixVectorMulPKfS0_Pf
	.size	_Z15matrixVectorMulPKfS0_Pf, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error at "
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	":"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" - "
	.size	.L.str.2, 4

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"/home/ubuntu/Datasets/hip-codes-80k-from-llm-dedup-disassemble-sm89/cuda_code_000512.hip"
	.size	.L.str.3, 89

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Neural network training complete."
	.size	.L.str.4, 34

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15matrixVectorMulPKfS0_Pf"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__matrixVectorMulPKfS0_Pf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15matrixVectorMulPKfS0_Pf
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15matrixVectorMulPKfS0_Pf ; -- Begin function _Z15matrixVectorMulPKfS0_Pf
	.globl	_Z15matrixVectorMulPKfS0_Pf
	.p2align	8
	.type	_Z15matrixVectorMulPKfS0_Pf,@function
_Z15matrixVectorMulPKfS0_Pf:            ; @_Z15matrixVectorMulPKfS0_Pf
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_lshrrev_b32_e32 v1, 5, v0
	v_and_b32_e32 v10, 63, v0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	v_and_b32_e32 v0, 31, v0
	v_lshlrev_b32_e32 v12, 2, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v9, 8, v0
	v_lshlrev_b32_e32 v0, 2, v0
	v_or_b32_e32 v6, 0x2000, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v7, v9, v12
	v_or_b32_e32 v8, 0x2000, v0
	v_or_b32_e32 v9, v9, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s2
	s_mov_b64 s[2:3], 0
	v_add_lshl_u32 v1, s15, v1, 6
	v_or_b32_e32 v2, v1, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v5, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v10
	global_load_b32 v11, v[2:3], off
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_mad_u64_u32 v[0:1], null, 0x104, v10, s[4:5]
	v_add_co_u32 v2, s0, s8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s9, v3, s0
	v_add_co_u32 v4, s0, s8, v4
	v_add_co_ci_u32_e64 v5, s0, s9, v5, s0
	s_waitcnt vmcnt(0)
	ds_store_b32 v12, v11 offset:8192
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v10, s0, v0, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s0, s3, v1, s0
	global_load_b32 v10, v[10:11], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v7, v10
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v10, v9
	ds_load_b32 v11, v8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v9 offset:128
	ds_load_b32 v13, v8 offset:128
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	v_fma_f32 v10, v10, v11, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v10, v12, v13
	global_store_b32 v[2:3], v10, off
.LBB0_3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v10, v[4:5], off
	s_add_u32 s2, s2, 0x4000
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 0x28000
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v10
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_1
; %bb.4:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15matrixVectorMulPKfS0_Pf
		.amdhsa_group_segment_fixed_size 8320
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15matrixVectorMulPKfS0_Pf, .Lfunc_end0-_Z15matrixVectorMulPKfS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 492
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8320 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .actual_access:  read_only
        .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 8320
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15matrixVectorMulPKfS0_Pf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15matrixVectorMulPKfS0_Pf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
