#include <iostream>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>

// Define the dimensions of the 1080p frame
#define WIDTH 1920
#define HEIGHT 1080

// Kernel to process a frame using warp-level programming
__global__ void processFrameKernel(unsigned char* input, unsigned char* output) {
    // Calculate the global index for the current thread
    int x = blockIdx.x * blockDim.x + threadIdx.x;
    int y = blockIdx.y * blockDim.y + threadIdx.y;

    // Check if the thread is within the bounds of the frame
    if (x < WIDTH && y < HEIGHT) {
        // Calculate the index in the flat array
        int index = y * WIDTH + x;

        // Example processing: simple grayscale conversion
        // Assuming input is in RGB format (3 bytes per pixel)
        int r = input[index * 3];
        int g = input[index * 3 + 1];
        int b = input[index * 3 + 2];

        // Convert to grayscale using luminosity method
        unsigned char gray = static_cast<unsigned char>(0.2126f * r + 0.7152f * g + 0.0722f * b);

        // Write the grayscale value to the output array
        output[index] = gray;
    }
}

// Function to initialize CUDA devices and launch the kernel
void processFrame(unsigned char* h_input, unsigned char* h_output, int numGPUs) {
    // Allocate memory on each GPU
    unsigned char* d_input[numGPUs];
    unsigned char* d_output[numGPUs];
    size_t frameSize = WIDTH * HEIGHT * 3 * sizeof(unsigned char); // RGB frame
    size_t outputSize = WIDTH * HEIGHT * sizeof(unsigned char); // Grayscale frame

    for (int i = 0; i < numGPUs; ++i) {
        cudaSetDevice(i);
        cudaMalloc(&d_input[i], frameSize);
        cudaMalloc(&d_output[i], outputSize);
        cudaMemcpy(d_input[i], h_input, frameSize, cudaMemcpyHostToDevice);
    }

    // Define block and grid sizes
    dim3 blockSize(32, 32);
    dim3 gridSize((WIDTH + blockSize.x - 1) / blockSize.x, (HEIGHT + blockSize.y - 1) / blockSize.y);

    // Launch the kernel on each GPU
    for (int i = 0; i < numGPUs; ++i) {
        cudaSetDevice(i);
        processFrameKernel<<<gridSize, blockSize>>>(d_input[i], d_output[i]);
        cudaDeviceSynchronize();
        cudaMemcpy(h_output + i * WIDTH * HEIGHT, d_output[i], outputSize, cudaMemcpyDeviceToHost);
    }

    // Free device memory
    for (int i = 0; i < numGPUs; ++i) {
        cudaSetDevice(i);
        cudaFree(d_input[i]);
        cudaFree(d_output[i]);
    }
}

int main() {
    // Number of GPUs to use
    int numGPUs = 2;
    cudaGetDeviceCount(&numGPUs); // Get the number of available GPUs

    // Allocate memory for input and output frames
    unsigned char* h_input = new unsigned char[WIDTH * HEIGHT * 3 * numGPUs];
    unsigned char* h_output = new unsigned char[WIDTH * HEIGHT * numGPUs];

    // Initialize input frame with dummy data (e.g., solid red)
    for (int i = 0; i < WIDTH * HEIGHT * 3 * numGPUs; i += 3) {
        h_input[i] = 255; // R
        h_input[i + 1] = 0; // G
        h_input[i + 2] = 0; // B
    }

    // Process the frame
    processFrame(h_input, h_output, numGPUs);

    // Verify the output (print the first 100 grayscale values for demonstration)
    for (int i = 0; i < 100; ++i) {
        std::cout << static_cast<int>(h_output[i]) << " ";
    }
    std::cout << std::endl;

    // Free host memory
    delete[] h_input;
    delete[] h_output;

    return 0;
}
	.file	"tmpxft_0014404c_00000000-6_cuda_code_053286.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z40__device_stub__Z18processFrameKernelPhS_PhS_
	.type	_Z40__device_stub__Z18processFrameKernelPhS_PhS_, @function
_Z40__device_stub__Z18processFrameKernelPhS_PhS_:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18processFrameKernelPhS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z40__device_stub__Z18processFrameKernelPhS_PhS_, .-_Z40__device_stub__Z18processFrameKernelPhS_PhS_
	.globl	_Z18processFrameKernelPhS_
	.type	_Z18processFrameKernelPhS_, @function
_Z18processFrameKernelPhS_:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z18processFrameKernelPhS_PhS_
	.cfi_endproc
.LFE3662:
	.size	_Z18processFrameKernelPhS_, .-_Z18processFrameKernelPhS_
	.globl	_Z12processFramePhS_i
	.type	_Z12processFramePhS_i, @function
_Z12processFramePhS_i:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$72, %rsp
	movq	%rsi, -96(%rbp)
	movq	%rdi, -88(%rbp)
	movq	%rsp, %rcx
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	movslq	%edx, %rax
	leaq	15(,%rax,8), %rax
	movq	%rax, %rsi
	movq	%rax, %rdx
	andq	$-4096, %rsi
	andq	$-16, %rdx
	subq	%rsi, %rcx
.L9:
	cmpq	%rcx, %rsp
	je	.L10
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L9
.L10:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L11
	orq	$0, -8(%rsp,%rdx)
.L11:
	movq	%rax, %rdx
	movq	%rsp, %rcx
	andq	$-4096, %rax
	movq	%rsp, %r14
	andq	$-16, %rdx
	subq	%rax, %rcx
.L12:
	cmpq	%rcx, %rsp
	je	.L13
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L12
.L13:
	movq	%rdx, %rax
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L14
	orq	$0, -8(%rsp,%rax)
.L14:
	movq	%rsp, %r12
	movq	%r14, %r13
	xorl	%r8d, %r8d
	movq	%r12, %r15
.L15:
	cmpl	%ebx, %r8d
	jge	.L30
	movl	%r8d, %edi
	movl	%r8d, -100(%rbp)
	call	cudaSetDevice@PLT
	movq	%r13, %rdi
	movl	$6220800, %esi
	addq	$8, %r13
	call	cudaMalloc@PLT
	movq	%r15, %rdi
	movl	$2073600, %esi
	addq	$8, %r15
	call	cudaMalloc@PLT
	movq	-8(%r13), %rdi
	movq	-88(%rbp), %rsi
	movl	$1, %ecx
	movl	$6220800, %edx
	call	cudaMemcpy@PLT
	movl	-100(%rbp), %r8d
	incl	%r8d
	jmp	.L15
.L30:
	movabsq	$146028888124, %rax
	movl	$1, -72(%rbp)
	xorl	%r15d, %r15d
	movabsq	$137438953504, %r13
	movq	%rax, -68(%rbp)
	movl	$1, -60(%rbp)
.L17:
	movl	%r15d, %edi
	cmpl	%r15d, %ebx
	jle	.L31
	call	cudaSetDevice@PLT
	movl	-72(%rbp), %ecx
	movq	-68(%rbp), %rdi
	xorl	%r9d, %r9d
	movl	-60(%rbp), %esi
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movq	%r13, -80(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	(%r12,%r15,8), %rsi
	movq	(%r14,%r15,8), %rdi
	call	_Z40__device_stub__Z18processFrameKernelPhS_PhS_
.L18:
	call	cudaDeviceSynchronize@PLT
	imulq	$2073600, %r15, %rdi
	movq	-96(%rbp), %rax
	movq	(%r12,%r15,8), %rsi
	movl	$2, %ecx
	movl	$2073600, %edx
	incq	%r15
	addq	%rax, %rdi
	call	cudaMemcpy@PLT
	jmp	.L17
.L31:
	xorl	%r13d, %r13d
.L20:
	movl	%r13d, %edi
	cmpl	%r13d, %ebx
	jle	.L32
	call	cudaSetDevice@PLT
	movq	(%r14,%r13,8), %rdi
	call	cudaFree@PLT
	movq	(%r12,%r13,8), %rdi
	incq	%r13
	call	cudaFree@PLT
	jmp	.L20
.L32:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z12processFramePhS_i, .-_Z12processFramePhS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	4(%rsp), %rdi
	movl	$2, 4(%rsp)
	call	cudaGetDeviceCount@PLT
	imull	$6220800, 4(%rsp), %edi
	movslq	%edi, %rdi
	call	_Znam@PLT
	imull	$2073600, 4(%rsp), %edi
	movq	%rax, %rbx
	movslq	%edi, %rdi
	call	_Znam@PLT
	movl	4(%rsp), %edx
	movq	%rax, %rbp
	xorl	%eax, %eax
	imull	$6220800, %edx, %ecx
.L34:
	cmpl	%eax, %ecx
	jle	.L40
	movb	$-1, (%rbx,%rax)
	movb	$0, 1(%rbx,%rax)
	movb	$0, 2(%rbx,%rax)
	addq	$3, %rax
	jmp	.L34
.L40:
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	leaq	_ZSt4cout(%rip), %r13
	xorl	%r12d, %r12d
	call	_Z12processFramePhS_i
.L36:
	movzbl	0(%rbp,%r12), %esi
	movq	%r13, %rdi
	incq	%r12
	call	_ZNSolsEi@PLT
	movl	$1, %edx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	cmpq	$100, %r12
	jne	.L36
	movq	%r13, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC1:
	.string	"_Z18processFrameKernelPhS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18processFrameKernelPhS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>


// Define the dimensions of the 1080p frame
#define WIDTH 1920
#define HEIGHT 1080

// Kernel to process a frame using warp-level programming
__global__ void processFrameKernel(unsigned char* input, unsigned char* output) {
    // Calculate the global index for the current thread
    int x = blockIdx.x * blockDim.x + threadIdx.x;
    int y = blockIdx.y * blockDim.y + threadIdx.y;

    // Check if the thread is within the bounds of the frame
    if (x < WIDTH && y < HEIGHT) {
        // Calculate the index in the flat array
        int index = y * WIDTH + x;

        // Example processing: simple grayscale conversion
        // Assuming input is in RGB format (3 bytes per pixel)
        int r = input[index * 3];
        int g = input[index * 3 + 1];
        int b = input[index * 3 + 2];

        // Convert to grayscale using luminosity method
        unsigned char gray = static_cast<unsigned char>(0.2126f * r + 0.7152f * g + 0.0722f * b);

        // Write the grayscale value to the output array
        output[index] = gray;
    }
}

// Function to initialize CUDA devices and launch the kernel
void processFrame(unsigned char* h_input, unsigned char* h_output, int numGPUs) {
    // Allocate memory on each GPU
    unsigned char* d_input[numGPUs];
    unsigned char* d_output[numGPUs];
    size_t frameSize = WIDTH * HEIGHT * 3 * sizeof(unsigned char); // RGB frame
    size_t outputSize = WIDTH * HEIGHT * sizeof(unsigned char); // Grayscale frame

    for (int i = 0; i < numGPUs; ++i) {
        hipSetDevice(i);
        hipMalloc(&d_input[i], frameSize);
        hipMalloc(&d_output[i], outputSize);
        hipMemcpy(d_input[i], h_input, frameSize, hipMemcpyHostToDevice);
    }

    // Define block and grid sizes
    dim3 blockSize(32, 32);
    dim3 gridSize((WIDTH + blockSize.x - 1) / blockSize.x, (HEIGHT + blockSize.y - 1) / blockSize.y);

    // Launch the kernel on each GPU
    for (int i = 0; i < numGPUs; ++i) {
        hipSetDevice(i);
        processFrameKernel<<<gridSize, blockSize>>>(d_input[i], d_output[i]);
        hipDeviceSynchronize();
        hipMemcpy(h_output + i * WIDTH * HEIGHT, d_output[i], outputSize, hipMemcpyDeviceToHost);
    }

    // Free device memory
    for (int i = 0; i < numGPUs; ++i) {
        hipSetDevice(i);
        hipFree(d_input[i]);
        hipFree(d_output[i]);
    }
}

int main() {
    // Number of GPUs to use
    int numGPUs = 2;
    hipGetDeviceCount(&numGPUs); // Get the number of available GPUs

    // Allocate memory for input and output frames
    unsigned char* h_input = new unsigned char[WIDTH * HEIGHT * 3 * numGPUs];
    unsigned char* h_output = new unsigned char[WIDTH * HEIGHT * numGPUs];

    // Initialize input frame with dummy data (e.g., solid red)
    for (int i = 0; i < WIDTH * HEIGHT * 3 * numGPUs; i += 3) {
        h_input[i] = 255; // R
        h_input[i + 1] = 0; // G
        h_input[i + 2] = 0; // B
    }

    // Process the frame
    processFrame(h_input, h_output, numGPUs);

    // Verify the output (print the first 100 grayscale values for demonstration)
    for (int i = 0; i < 100; ++i) {
        std::cout << static_cast<int>(h_output[i]) << " ";
    }
    std::cout << std::endl;

    // Free host memory
    delete[] h_input;
    delete[] h_output;

    return 0;
}
	.text
	.file	"cuda_code_053286.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__processFrameKernelPhS_ # -- Begin function _Z33__device_stub__processFrameKernelPhS_
	.type	_Z33__device_stub__processFrameKernelPhS_,@function
_Z33__device_stub__processFrameKernelPhS_: # @_Z33__device_stub__processFrameKernelPhS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18processFrameKernelPhS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__processFrameKernelPhS_, .Lfunc_end0-_Z33__device_stub__processFrameKernelPhS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z12processFramePhS_i           # -- Begin function _Z12processFramePhS_i
	.type	_Z12processFramePhS_i,@function
_Z12processFramePhS_i:                  # @_Z12processFramePhS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, -72(%rbp)                 # 8-byte Spill
	movl	%edx, %r14d
	movq	%rsp, %r13
	leaq	15(,%r14,8), %rax
	andq	$-16, %rax
	subq	%rax, %r13
	movq	%r13, %rsp
	movq	%rsp, %rbx
	subq	%rax, %rbx
	movq	%rbx, %rsp
	movl	%edx, -44(%rbp)                 # 4-byte Spill
	testl	%edx, %edx
	jle	.LBB1_11
# %bb.1:                                # %.lr.ph.preheader
	movq	%rdi, %r15
	xorl	%r12d, %r12d
	movq	%r13, -64(%rbp)                 # 8-byte Spill
	movq	%rbx, -56(%rbp)                 # 8-byte Spill
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%r12d, %edi
	callq	hipSetDevice
	movl	$6220800, %esi                  # imm = 0x5EEC00
	movq	%r13, %rdi
	callq	hipMalloc
	movl	$2073600, %esi                  # imm = 0x1FA400
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$6220800, %edx                  # imm = 0x5EEC00
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	incq	%r12
	addq	$8, %rbx
	addq	$8, %r13
	cmpq	%r12, %r14
	jne	.LBB1_2
# %bb.3:                                # %.preheader40
	cmpl	$0, -44(%rbp)                   # 4-byte Folded Reload
	jle	.LBB1_11
# %bb.4:                                # %.lr.ph43.preheader
	xorl	%ebx, %ebx
	movabsq	$137438953504, %r12             # imm = 0x2000000020
	movabsq	$8906044184985600, %r15         # imm = 0x1FA40000000000
	xorl	%r13d, %r13d
.LBB1_5:                                # %.lr.ph43
                                        # =>This Inner Loop Header: Depth=1
	movl	%r13d, %edi
	callq	hipSetDevice
	movabsq	$146028888124, %rdi             # imm = 0x220000003C
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.6:                                #   in Loop: Header=BB1_5 Depth=1
	movq	-64(%rbp), %rax                 # 8-byte Reload
	movq	(%rax,%r13,8), %rdi
	movq	-56(%rbp), %rax                 # 8-byte Reload
	movq	(%rax,%r13,8), %rsi
	callq	_Z33__device_stub__processFrameKernelPhS_
.LBB1_7:                                #   in Loop: Header=BB1_5 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbx, %rdi
	sarq	$32, %rdi
	addq	-72(%rbp), %rdi                 # 8-byte Folded Reload
	movq	-56(%rbp), %rax                 # 8-byte Reload
	movq	(%rax,%r13,8), %rsi
	movl	$2073600, %edx                  # imm = 0x1FA400
	movl	$2, %ecx
	callq	hipMemcpy
	incq	%r13
	addq	%r15, %rbx
	cmpq	%r13, %r14
	jne	.LBB1_5
# %bb.8:                                # %.preheader
	cmpl	$0, -44(%rbp)                   # 4-byte Folded Reload
	movq	-64(%rbp), %r15                 # 8-byte Reload
	movq	-56(%rbp), %r12                 # 8-byte Reload
	jle	.LBB1_11
# %bb.9:                                # %.lr.ph45.preheader
	xorl	%ebx, %ebx
.LBB1_10:                               # %.lr.ph45
                                        # =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	hipSetDevice
	movq	(%r15,%rbx,8), %rdi
	callq	hipFree
	movq	(%r12,%rbx,8), %rdi
	callq	hipFree
	incq	%rbx
	cmpq	%rbx, %r14
	jne	.LBB1_10
.LBB1_11:                               # %._crit_edge
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end1:
	.size	_Z12processFramePhS_i, .Lfunc_end1-_Z12processFramePhS_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rbx
	movl	$2, (%rbx)
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	movslq	(%rbx), %r15
	imulq	$6220800, %r15, %r12            # imm = 0x5EEC00
	movq	%r12, %rdi
	callq	_Znam
	movq	%rax, %rbx
	imulq	$2073600, %r15, %rdi            # imm = 0x1FA400
	callq	_Znam
	movq	%rax, %r14
	testq	%r15, %r15
	jle	.LBB2_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%eax, %eax
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movw	$255, (%rbx,%rax)
	movb	$0, 2(%rbx,%rax)
	addq	$3, %rax
	cmpq	%r12, %rax
	jl	.LBB2_2
.LBB2_3:                                # %._crit_edge
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	%r15d, %edx
	callq	_Z12processFramePhS_i
	xorl	%r15d, %r15d
.LBB2_4:                                # =>This Inner Loop Header: Depth=1
	movzbl	(%r14,%r15), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r15
	cmpq	$100, %r15
	jne	.LBB2_4
# %bb.5:
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18processFrameKernelPhS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18processFrameKernelPhS_,@object # @_Z18processFrameKernelPhS_
	.section	.rodata,"a",@progbits
	.globl	_Z18processFrameKernelPhS_
	.p2align	3, 0x0
_Z18processFrameKernelPhS_:
	.quad	_Z33__device_stub__processFrameKernelPhS_
	.size	_Z18processFrameKernelPhS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" "
	.size	.L.str, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18processFrameKernelPhS_"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__processFrameKernelPhS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18processFrameKernelPhS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18processFrameKernelPhS_ ; -- Begin function _Z18processFrameKernelPhS_
	.globl	_Z18processFrameKernelPhS_
	.p2align	8
	.type	_Z18processFrameKernelPhS_,@function
_Z18processFrameKernelPhS_:             ; @_Z18processFrameKernelPhS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, 0x780, v0
	v_cmp_gt_i32_e64 s2, 0x438, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, 0x780, v1, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v0, v2, 1, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_clause 0x1
	global_load_u16 v3, v[0:1], off
	global_load_u8 v0, v[0:1], off offset:2
	s_waitcnt vmcnt(1)
	v_cvt_f32_ubyte1_e32 v1, v3
	v_cvt_f32_ubyte0_e32 v3, v3
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, 0x3f371759, v1
	v_fmamk_f32 v1, v3, 0x3e59b3d0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmamk_f32 v0, v0, 0x3d93dd98, v1
	v_ashrrev_i32_e32 v1, 31, v2
	v_cvt_i32_f32_e32 v3, v0
	v_add_co_u32 v0, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b8 v[0:1], v3, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18processFrameKernelPhS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18processFrameKernelPhS_, .Lfunc_end0-_Z18processFrameKernelPhS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 272
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18processFrameKernelPhS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18processFrameKernelPhS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
