#include <iostream>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>

#define N 64  // Number of nodes in the graph

__global__ void bfsKernel(int *frontier, int *new_frontier, int *visited, const int *adj_matrix, int frontier_size, int *new_frontier_size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= frontier_size) return;

    int node = frontier[idx];
    for (int i = 0; i < N; ++i) {
        if (adj_matrix[node * N + i] && !visited[i]) {
            int pos = atomicAdd(new_frontier_size, 1);
            new_frontier[pos] = i;
            visited[i] = 1;
        }
    }
}

void bfsMultiGPU(int *adj_matrix, int start_node, int *visited) {
    int *frontier, *new_frontier, *d_adj_matrix, *d_frontier, *d_new_frontier, *d_visited, *d_new_frontier_size;
    int frontier_size = 1;
    int *h_frontier = new int[N];
    int *h_new_frontier = new int[N];
    int *h_new_frontier_size = new int[1];

    h_frontier[0] = start_node;
    visited[start_node] = 1;

    cudaSetDevice(0);
    cudaMalloc(&d_adj_matrix, N * N * sizeof(int));
    cudaMemcpy(d_adj_matrix, adj_matrix, N * N * sizeof(int), cudaMemcpyHostToDevice);

    for (int i = 0; i < 2; ++i) {  // Assume 2 GPUs for simplicity
        cudaSetDevice(i);
        cudaMalloc(&d_frontier, N * sizeof(int));
        cudaMalloc(&d_new_frontier, N * sizeof(int));
        cudaMalloc(&d_visited, N * sizeof(int));
        cudaMalloc(&d_new_frontier_size, sizeof(int));

        cudaMemcpy(d_frontier, h_frontier, frontier_size * sizeof(int), cudaMemcpyHostToDevice);
        cudaMemcpy(d_visited, visited, N * sizeof(int), cudaMemcpyHostToDevice);
        *h_new_frontier_size = 0;
        cudaMemcpy(d_new_frontier_size, h_new_frontier_size, sizeof(int), cudaMemcpyHostToDevice);

        dim3 blockSize(256);
        dim3 gridSize((frontier_size + blockSize.x - 1) / blockSize.x);

        bfsKernel<<<gridSize, blockSize>>>(d_frontier, d_new_frontier, d_visited, d_adj_matrix, frontier_size, d_new_frontier_size);

        cudaMemcpy(h_new_frontier_size, d_new_frontier_size, sizeof(int), cudaMemcpyDeviceToHost);
        frontier_size = *h_new_frontier_size;
        cudaMemcpy(h_new_frontier, d_new_frontier, frontier_size * sizeof(int), cudaMemcpyDeviceToHost);
        cudaMemcpy(visited, d_visited, N * sizeof(int), cudaMemcpyDeviceToHost);

        cudaFree(d_frontier);
        cudaFree(d_new_frontier);
        cudaFree(d_visited);
        cudaFree(d_new_frontier_size);

        // Copy new frontier to host for the next iteration
        for (int j = 0; j < frontier_size; ++j) {
            h_frontier[j] = h_new_frontier[j];
        }
    }

    cudaFree(d_adj_matrix);
    delete[] h_frontier;
    delete[] h_new_frontier;
    delete[] h_new_frontier_size;
}

int main() {
    int *adj_matrix = new int[N * N];
    int *visited = new int[N];

    // Initialize adjacency matrix and visited array
    for (int i = 0; i < N * N; ++i) adj_matrix[i] = 0;
    for (int i = 0; i < N; ++i) visited[i] = 0;

    // Example graph: a simple ring
    for (int i = 0; i < N; ++i) {
        adj_matrix[i * N + (i + 1) % N] = 1;
        adj_matrix[(i + 1) % N * N + i] = 1;
    }

    bfsMultiGPU(adj_matrix, 0, visited);

    // Output visited nodes
    for (int i = 0; i < N; ++i) {
        if (visited[i]) std::cout << "Node " << i << " visited" << std::endl;
    }

    delete[] adj_matrix;
    delete[] visited;

    return 0;
}
	.file	"tmpxft_001a712b_00000000-6_cuda_code_065816.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z38__device_stub__Z9bfsKernelPiS_S_PKiiS_PiS_S_PKiiS_
	.type	_Z38__device_stub__Z9bfsKernelPiS_S_PKiiS_PiS_S_PKiiS_, @function
_Z38__device_stub__Z9bfsKernelPiS_S_PKiiS_PiS_S_PKiiS_:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z9bfsKernelPiS_S_PKiiS_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z38__device_stub__Z9bfsKernelPiS_S_PKiiS_PiS_S_PKiiS_, .-_Z38__device_stub__Z9bfsKernelPiS_S_PKiiS_PiS_S_PKiiS_
	.globl	_Z9bfsKernelPiS_S_PKiiS_
	.type	_Z9bfsKernelPiS_S_PKiiS_, @function
_Z9bfsKernelPiS_S_PKiiS_:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z9bfsKernelPiS_S_PKiiS_PiS_S_PKiiS_
	.cfi_endproc
.LFE3662:
	.size	_Z9bfsKernelPiS_S_PKiiS_, .-_Z9bfsKernelPiS_S_PKiiS_
	.globl	_Z11bfsMultiGPUPiiS_
	.type	_Z11bfsMultiGPUPiiS_, @function
_Z11bfsMultiGPUPiiS_:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movabsq	$4294967297, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	movl	$256, %edi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movslq	%esi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdx, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$256, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movl	$4, %edi
	movq	%rax, %r13
	call	_Znam@PLT
	movl	%r12d, 0(%rbp)
	xorl	%edi, %edi
	movq	%rax, %rbx
	movq	8(%rsp), %rax
	movl	$1, (%rax,%r12,4)
	movl	$1, %r12d
	call	cudaSetDevice@PLT
	leaq	24(%rsp), %rdi
	movl	$16384, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	movl	$16384, %edx
	xorl	%r14d, %r14d
	call	cudaMemcpy@PLT
.L12:
	movl	%r14d, %edi
	call	cudaSetDevice@PLT
	leaq	32(%rsp), %rdi
	movl	$256, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$256, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$256, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	movslq	%r12d, %rdx
	movq	%rbp, %rsi
	salq	$2, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movl	$256, %edx
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	movq	56(%rsp), %rdi
	movq	%rbx, %rsi
	movl	%eax, (%rbx)
	movl	$1, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	%r15, 80(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$16777217, %edx
	movl	84(%rsp), %esi
	movl	$1, %ecx
	leal	255(%r12), %eax
	shrl	$8, %eax
	salq	$8, %rdx
	movl	%eax, 76(%rsp)
	movq	76(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movq	56(%rsp), %r9
	movq	24(%rsp), %rcx
	movl	%r12d, %r8d
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z38__device_stub__Z9bfsKernelPiS_S_PKiiS_PiS_S_PKiiS_
.L9:
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movslq	(%rbx), %rdx
	movq	40(%rsp), %rsi
	movq	%r13, %rdi
	movl	$2, %ecx
	movq	%rdx, %r12
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$256, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L10:
	cmpl	%eax, %r12d
	jle	.L16
	movl	0(%r13,%rax,4), %edx
	movl	%edx, 0(%rbp,%rax,4)
	incq	%rax
	jmp	.L10
.L16:
	testl	%r14d, %r14d
	jne	.L17
	movl	$1, %r14d
	jmp	.L12
.L17:
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z11bfsMultiGPUPiiS_, .-_Z11bfsMultiGPUPiiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Node "
.LC1:
	.string	" visited"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$16384, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rcx
	.cfi_def_cfa_offset 48
	call	_Znam@PLT
	movl	$256, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movl	$4096, %ecx
	movq	%rbx, %rdi
	xorl	%edx, %edx
	movq	%rax, %rbp
	xorl	%eax, %eax
	rep stosl
	movl	$64, %ecx
	movq	%rbp, %rdi
	rep stosl
.L19:
	movl	%edx, %ecx
	movl	%edx, %esi
	incl	%edx
	movl	%edx, %eax
	sall	$6, %ecx
	andl	$63, %eax
	addl	%eax, %ecx
	sall	$6, %eax
	addl	%esi, %eax
	movslq	%ecx, %rcx
	cltq
	movl	$1, (%rbx,%rcx,4)
	movl	$1, (%rbx,%rax,4)
	cmpl	$64, %edx
	jne	.L19
	movq	%rbp, %rdx
	xorl	%esi, %esi
	movq	%rbx, %rdi
	xorl	%r12d, %r12d
	call	_Z11bfsMultiGPUPiiS_
	leaq	.LC0(%rip), %r13
.L21:
	cmpl	$0, 0(%rbp,%r12,4)
	je	.L20
	movq	%r13, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L20:
	incq	%r12
	cmpq	$64, %r12
	jne	.L21
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	popq	%rdx
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z9bfsKernelPiS_S_PKiiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9bfsKernelPiS_S_PKiiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>


#define N 64  // Number of nodes in the graph

__global__ void bfsKernel(int *frontier, int *new_frontier, int *visited, const int *adj_matrix, int frontier_size, int *new_frontier_size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= frontier_size) return;

    int node = frontier[idx];
    for (int i = 0; i < N; ++i) {
        if (adj_matrix[node * N + i] && !visited[i]) {
            int pos = atomicAdd(new_frontier_size, 1);
            new_frontier[pos] = i;
            visited[i] = 1;
        }
    }
}

void bfsMultiGPU(int *adj_matrix, int start_node, int *visited) {
    int *frontier, *new_frontier, *d_adj_matrix, *d_frontier, *d_new_frontier, *d_visited, *d_new_frontier_size;
    int frontier_size = 1;
    int *h_frontier = new int[N];
    int *h_new_frontier = new int[N];
    int *h_new_frontier_size = new int[1];

    h_frontier[0] = start_node;
    visited[start_node] = 1;

    hipSetDevice(0);
    hipMalloc(&d_adj_matrix, N * N * sizeof(int));
    hipMemcpy(d_adj_matrix, adj_matrix, N * N * sizeof(int), hipMemcpyHostToDevice);

    for (int i = 0; i < 2; ++i) {  // Assume 2 GPUs for simplicity
        hipSetDevice(i);
        hipMalloc(&d_frontier, N * sizeof(int));
        hipMalloc(&d_new_frontier, N * sizeof(int));
        hipMalloc(&d_visited, N * sizeof(int));
        hipMalloc(&d_new_frontier_size, sizeof(int));

        hipMemcpy(d_frontier, h_frontier, frontier_size * sizeof(int), hipMemcpyHostToDevice);
        hipMemcpy(d_visited, visited, N * sizeof(int), hipMemcpyHostToDevice);
        *h_new_frontier_size = 0;
        hipMemcpy(d_new_frontier_size, h_new_frontier_size, sizeof(int), hipMemcpyHostToDevice);

        dim3 blockSize(256);
        dim3 gridSize((frontier_size + blockSize.x - 1) / blockSize.x);

        bfsKernel<<<gridSize, blockSize>>>(d_frontier, d_new_frontier, d_visited, d_adj_matrix, frontier_size, d_new_frontier_size);

        hipMemcpy(h_new_frontier_size, d_new_frontier_size, sizeof(int), hipMemcpyDeviceToHost);
        frontier_size = *h_new_frontier_size;
        hipMemcpy(h_new_frontier, d_new_frontier, frontier_size * sizeof(int), hipMemcpyDeviceToHost);
        hipMemcpy(visited, d_visited, N * sizeof(int), hipMemcpyDeviceToHost);

        hipFree(d_frontier);
        hipFree(d_new_frontier);
        hipFree(d_visited);
        hipFree(d_new_frontier_size);

        // Copy new frontier to host for the next iteration
        for (int j = 0; j < frontier_size; ++j) {
            h_frontier[j] = h_new_frontier[j];
        }
    }

    hipFree(d_adj_matrix);
    delete[] h_frontier;
    delete[] h_new_frontier;
    delete[] h_new_frontier_size;
}

int main() {
    int *adj_matrix = new int[N * N];
    int *visited = new int[N];

    // Initialize adjacency matrix and visited array
    for (int i = 0; i < N * N; ++i) adj_matrix[i] = 0;
    for (int i = 0; i < N; ++i) visited[i] = 0;

    // Example graph: a simple ring
    for (int i = 0; i < N; ++i) {
        adj_matrix[i * N + (i + 1) % N] = 1;
        adj_matrix[(i + 1) % N * N + i] = 1;
    }

    bfsMultiGPU(adj_matrix, 0, visited);

    // Output visited nodes
    for (int i = 0; i < N; ++i) {
        if (visited[i]) std::cout << "Node " << i << " visited" << std::endl;
    }

    delete[] adj_matrix;
    delete[] visited;

    return 0;
}
	.text
	.file	"cuda_code_065816.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z24__device_stub__bfsKernelPiS_S_PKiiS_ # -- Begin function _Z24__device_stub__bfsKernelPiS_S_PKiiS_
	.type	_Z24__device_stub__bfsKernelPiS_S_PKiiS_,@function
_Z24__device_stub__bfsKernelPiS_S_PKiiS_: # @_Z24__device_stub__bfsKernelPiS_S_PKiiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9bfsKernelPiS_S_PKiiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__bfsKernelPiS_S_PKiiS_, .Lfunc_end0-_Z24__device_stub__bfsKernelPiS_S_PKiiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z11bfsMultiGPUPiiS_            # -- Begin function _Z11bfsMultiGPUPiiS_
	.type	_Z11bfsMultiGPUPiiS_,@function
_Z11bfsMultiGPUPiiS_:                   # @_Z11bfsMultiGPUPiiS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movl	%esi, %ebp
	movq	%rdi, %r15
	movl	$256, %edi                      # imm = 0x100
	callq	_Znam
	movq	%rax, %r14
	movl	$256, %edi                      # imm = 0x100
	callq	_Znam
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	$4, %edi
	callq	_Znam
	movq	%rax, %r12
	movl	%ebp, (%r14)
	movslq	%ebp, %rax
	movl	$1, (%rbx,%rax,4)
	xorl	%r13d, %r13d
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	40(%rsp), %rbp
	movl	$16384, %esi                    # imm = 0x4000
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$1, %ebp
	movl	$16384, %edx                    # imm = 0x4000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movb	$1, %r15b
	movabsq	$4294967296, %rax               # imm = 0x100000000
	addq	$256, %rax                      # imm = 0x100
	movq	%rax, 48(%rsp)                  # 8-byte Spill
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%r13d, %edi
	callq	hipSetDevice
	movl	$256, %esi                      # imm = 0x100
	leaq	24(%rsp), %rdi
	callq	hipMalloc
	movl	$256, %esi                      # imm = 0x100
	leaq	16(%rsp), %rdi
	callq	hipMalloc
	movl	$256, %esi                      # imm = 0x100
	leaq	8(%rsp), %rdi
	callq	hipMalloc
	movl	$4, %esi
	movq	%rsp, %rdi
	callq	hipMalloc
	movq	24(%rsp), %rdi
	movslq	%ebp, %r13
	leaq	(,%r13,4), %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$0, (%r12)
	movq	(%rsp), %rdi
	movl	$4, %edx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	addl	$255, %r13d
	shrl	$8, %r13d
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %r13
	movq	%r13, %rdi
	movl	$1, %esi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.2:                                #   in Loop: Header=BB1_1 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rcx
	movq	(%rsp), %r9
	movl	%ebp, %r8d
	callq	_Z24__device_stub__bfsKernelPiS_S_PKiiS_
.LBB1_3:                                #   in Loop: Header=BB1_1 Depth=1
	movq	(%rsp), %rsi
	movl	$4, %edx
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movslq	(%r12), %rbp
	movq	16(%rsp), %rsi
	leaq	(,%rbp,4), %rdx
	movq	32(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	testq	%rbp, %rbp
	jle	.LBB1_5
# %bb.4:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_1 Depth=1
	movl	%ebp, %edx
	shlq	$2, %rdx
	movq	%r14, %rdi
	movq	%r13, %rsi
	callq	memcpy@PLT
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_1 Depth=1
	movl	$1, %r13d
	testb	$1, %r15b
	movl	$0, %r15d
	jne	.LBB1_1
# %bb.6:
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	_ZdaPv
	movq	%r12, %rdi
	callq	_ZdaPv
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z11bfsMultiGPUPiiS_, .Lfunc_end1-_Z11bfsMultiGPUPiiS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:                                # %.preheader27.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$16384, %edi                    # imm = 0x4000
	callq	_Znam
	movq	%rax, %rbx
	movl	$256, %edi                      # imm = 0x100
	callq	_Znam
	movq	%rax, %r14
	xorl	%r15d, %r15d
	movl	$16384, %edx                    # imm = 0x4000
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$256, %edx                      # imm = 0x100
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$1, %eax
	movq	%rbx, %rcx
	movl	$1, %edx
.LBB2_1:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	%edx, %esi
	andl	$63, %esi
	leal	(%r15,%rsi), %edi
	shll	$8, %esi
	movl	%eax, (%rbx,%rdi,4)
	movl	%eax, (%rcx,%rsi)
	incl	%edx
	addl	$64, %r15d
	addq	$4, %rcx
	cmpl	$65, %edx
	jne	.LBB2_1
# %bb.2:
	xorl	%r15d, %r15d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	_Z11bfsMultiGPUPiiS_
.LBB2_3:                                # =>This Inner Loop Header: Depth=1
	cmpl	$0, (%r14,%r15,4)
	je	.LBB2_5
# %bb.4:                                #   in Loop: Header=BB2_3 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r15d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r12
	movl	$.L.str.1, %esi
	movl	$8, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB2_5:                                #   in Loop: Header=BB2_3 Depth=1
	incq	%r15
	cmpq	$64, %r15
	jne	.LBB2_3
# %bb.6:
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9bfsKernelPiS_S_PKiiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9bfsKernelPiS_S_PKiiS_,@object # @_Z9bfsKernelPiS_S_PKiiS_
	.section	.rodata,"a",@progbits
	.globl	_Z9bfsKernelPiS_S_PKiiS_
	.p2align	3, 0x0
_Z9bfsKernelPiS_S_PKiiS_:
	.quad	_Z24__device_stub__bfsKernelPiS_S_PKiiS_
	.size	_Z9bfsKernelPiS_S_PKiiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Node "
	.size	.L.str, 6

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" visited"
	.size	.L.str.1, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9bfsKernelPiS_S_PKiiS_"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__bfsKernelPiS_S_PKiiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9bfsKernelPiS_S_PKiiS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9bfsKernelPiS_S_PKiiS_ ; -- Begin function _Z9bfsKernelPiS_S_PKiiS_
	.globl	_Z9bfsKernelPiS_S_PKiiS_
	.p2align	8
	.type	_Z9bfsKernelPiS_S_PKiiS_,@function
_Z9bfsKernelPiS_S_PKiiS_:               ; @_Z9bfsKernelPiS_S_PKiiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s3, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_8
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x28
	s_mov_b32 s2, 0
	v_mov_b32_e32 v3, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 6, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v4, v[0:1], off
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 0, v4
	s_cbranch_execz .LBB0_7
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	global_load_b32 v4, v2, s[8:9]
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	s_cbranch_vccnz .LBB0_7
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s5, exec_lo
	s_mov_b32 s4, exec_lo
	v_mbcnt_lo_u32_b32 v4, s5, 0
                                        ; implicit-def: $vgpr5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	s_bcnt1_i32_b32 s5, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s5
	global_atomic_add_u32 v5, v2, v5, s[0:1] glc
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s4, v5
	v_mov_b32_e32 v6, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, s4, v4
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	global_store_b32 v[4:5], v6, off
	global_store_b32 v2, v3, s[8:9]
.LBB0_7:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_add_co_u32 v0, vcc_lo, v0, 4
	s_add_i32 s2, s2, 1
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s2, 64
	s_cbranch_scc1 .LBB0_2
.LBB0_8:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9bfsKernelPiS_S_PKiiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9bfsKernelPiS_S_PKiiS_, .Lfunc_end0-_Z9bfsKernelPiS_S_PKiiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 384
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9bfsKernelPiS_S_PKiiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9bfsKernelPiS_S_PKiiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
