#include <iostream>
#include <cuda_runtime.h>
#include <cuda.h>

// Define ELLPACK matrix structure
typedef struct {
    int rows;
    int cols;
    int maxNZRow;
    float* values;
    int* colIndices;
} ELLMatrix;

// Kernel for ELLPACK matrix-matrix multiplication
__global__ void ellMMKernel(ELLMatrix A, ELLMatrix B, float* C, int width) {
    __shared__ float sA[32][32];
    __shared__ float sB[32][32];

    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;

    float cValue = 0.0f;

    for (int e = 0; e < A.maxNZRow; e += 32) {
        // Load A and B into shared memory
        if (row < A.rows && e + threadIdx.y < A.maxNZRow) {
            sA[threadIdx.y][threadIdx.x] = A.values[row * A.maxNZRow + e + threadIdx.y];
        } else {
            sA[threadIdx.y][threadIdx.x] = 0.0f;
        }

        if (col < B.cols && e + threadIdx.x < A.maxNZRow) {
            sB[threadIdx.y][threadIdx.x] = B.values[(e + threadIdx.x) * B.cols + col];
        } else {
            sB[threadIdx.y][threadIdx.x] = 0.0f;
        }

        __syncthreads();

        // Perform multiplication
        for (int k = 0; k < 32; ++k) {
            cValue += sA[threadIdx.y][k] * sB[k][threadIdx.x];
        }

        __syncthreads();
    }

    // Write the result to global memory
    if (row < A.rows && col < B.cols) {
        C[row * width + col] = cValue;
    }
}

// Function to initialize an ELL matrix with some values
void initializeELLMatrix(ELLMatrix& matrix, int rows, int cols, int maxNZRow) {
    matrix.rows = rows;
    matrix.cols = cols;
    matrix.maxNZRow = maxNZRow;
    cudaMallocManaged(&matrix.values, rows * maxNZRow * sizeof(float));
    cudaMallocManaged(&matrix.colIndices, rows * maxNZRow * sizeof(int));
}

// Function to free the ELL matrix
void freeELLMatrix(ELLMatrix& matrix) {
    cudaFree(matrix.values);
    cudaFree(matrix.colIndices);
}

int main() {
    // Define matrix dimensions and maximum non-zero elements per row
    int rowsA = 128;
    int colsA = 128;
    int maxNZRowA = 16;
    int rowsB = colsA;
    int colsB = 128;

    // Initialize matrices A and B
    ELLMatrix A, B;
    initializeELLMatrix(A, rowsA, colsA, maxNZRowA);
    initializeELLMatrix(B, rowsB, colsB, maxNZRowA);

    // Initialize C matrix
    float* C;
    cudaMallocManaged(&C, rowsA * colsB * sizeof(float));

    // Initialize A and B with some values (example values)
    for (int i = 0; i < rowsA; ++i) {
        for (int j = 0; j < maxNZRowA; ++j) {
            A.values[i * maxNZRowA + j] = 1.0f;
            A.colIndices[i * maxNZRowA + j] = j;
            B.values[j * colsB + i] = 1.0f;
        }
    }

    // Define block and grid sizes
    dim3 blockSize(32, 32);
    dim3 gridSize((colsB + blockSize.x - 1) / blockSize.x, (rowsA + blockSize.y - 1) / blockSize.y);

    // Launch kernel
    ellMMKernel<<<gridSize, blockSize>>>(A, B, C, colsB);

    // Check for errors in kernel launch
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Kernel launch failed: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Synchronize to ensure all computations are done
    cudaDeviceSynchronize();

    // Output the result matrix C (for demonstration, print only a part of it)
    std::cout << "Result matrix C (first 16 elements):" << std::endl;
    for (int i = 0; i < 4; ++i) {
        for (int j = 0; j < 4; ++j) {
            std::cout << C[i * colsB + j] << " ";
        }
        std::cout << std::endl;
    }

    // Free memory
    freeELLMatrix(A);
    freeELLMatrix(B);
    cudaFree(C);

    return 0;
}
	.file	"tmpxft_001ddba2_00000000-6_cuda_code_056009.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z19initializeELLMatrixR9ELLMatrixiii
	.type	_Z19initializeELLMatrixR9ELLMatrixiii, @function
_Z19initializeELLMatrixR9ELLMatrixiii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	leaq	16(%rdi), %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rax
	.cfi_def_cfa_offset 32
	movl	%esi, -16(%rdi)
	imull	%ecx, %esi
	movl	%edx, -12(%rdi)
	movl	$1, %edx
	movl	%ecx, -8(%rdi)
	movslq	%esi, %rbx
	salq	$2, %rbx
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	leaq	24(%rbp), %rdi
	movq	%rbx, %rsi
	movl	$1, %edx
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	cudaMallocManaged@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z19initializeELLMatrixR9ELLMatrixiii, .-_Z19initializeELLMatrixR9ELLMatrixiii
	.globl	_Z13freeELLMatrixR9ELLMatrix
	.type	_Z13freeELLMatrixR9ELLMatrix, @function
_Z13freeELLMatrixR9ELLMatrix:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movq	16(%rdi), %rdi
	call	cudaFree@PLT
	movq	24(%rbx), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE3636:
	.size	_Z13freeELLMatrixR9ELLMatrix, .-_Z13freeELLMatrixR9ELLMatrix
	.globl	_Z44__device_stub__Z11ellMMKernel9ELLMatrixS_PfiR9ELLMatrixS0_Pfi
	.type	_Z44__device_stub__Z11ellMMKernel9ELLMatrixS_PfiR9ELLMatrixS0_Pfi, @function
_Z44__device_stub__Z11ellMMKernel9ELLMatrixS_PfiR9ELLMatrixS0_Pfi:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdx, 8(%rsp)
	leaq	24(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	32(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rsi, 96(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11ellMMKernel9ELLMatrixS_Pfi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L6:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z44__device_stub__Z11ellMMKernel9ELLMatrixS_PfiR9ELLMatrixS0_Pfi, .-_Z44__device_stub__Z11ellMMKernel9ELLMatrixS_PfiR9ELLMatrixS0_Pfi
	.globl	_Z11ellMMKernel9ELLMatrixS_Pfi
	.type	_Z11ellMMKernel9ELLMatrixS_Pfi, @function
_Z11ellMMKernel9ELLMatrixS_Pfi:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdi, %rdx
	movl	%esi, %ecx
	leaq	16(%rsp), %rdi
	leaq	48(%rsp), %rsi
	call	_Z44__device_stub__Z11ellMMKernel9ELLMatrixS_PfiR9ELLMatrixS0_Pfi
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z11ellMMKernel9ELLMatrixS_Pfi, .-_Z11ellMMKernel9ELLMatrixS_Pfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Kernel launch failed: "
.LC2:
	.string	"Result matrix C (first 16 elements):"
.LC3:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$16, %ecx
	movl	$128, %edx
	movl	$128, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %r13
	leaq	72(%rsp), %r12
	movq	%r13, %rdi
	call	_Z19initializeELLMatrixR9ELLMatrixiii
	movl	$16, %ecx
	movl	$128, %edx
	movq	%r12, %rdi
	movl	$128, %esi
	call	_Z19initializeELLMatrixR9ELLMatrixiii
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	movl	$65536, %esi
	call	cudaMallocManaged@PLT
	movq	56(%rsp), %r8
	xorl	%eax, %eax
	movq	64(%rsp), %r9
	movq	88(%rsp), %rdi
	movss	.LC0(%rip), %xmm0
.L14:
	movq	%rax, %rcx
	leaq	(%rdi,%rax,4), %rsi
	xorl	%edx, %edx
	salq	$6, %rcx
.L15:
	movss	%xmm0, (%r8,%rcx)
	addq	$512, %rsi
	movl	%edx, (%r9,%rcx)
	incl	%edx
	addq	$4, %rcx
	movss	%xmm0, -512(%rsi)
	cmpl	$16, %edx
	jne	.L15
	incq	%rax
	cmpq	$128, %rax
	jne	.L14
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$17179869188, %rdi
	movl	$1, 36(%rsp)
	movabsq	$137438953504, %rdx
	movq	%rdi, 28(%rsp)
	movq	%rdx, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movups	40(%rsp), %xmm1
	movups	56(%rsp), %xmm2
	leaq	104(%rsp), %rdi
	leaq	136(%rsp), %rsi
	movups	72(%rsp), %xmm3
	movups	88(%rsp), %xmm4
	movl	$128, %ecx
	movq	8(%rsp), %rdx
	movups	%xmm1, 104(%rsp)
	movups	%xmm2, 120(%rsp)
	movups	%xmm3, 136(%rsp)
	movups	%xmm4, 152(%rsp)
	call	_Z44__device_stub__Z11ellMMKernel9ELLMatrixS_PfiR9ELLMatrixS0_Pfi
.L17:
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L18
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L13
.L18:
	leaq	_ZSt4cout(%rip), %r14
	xorl	%ebp, %ebp
	leaq	.LC3(%rip), %r15
	call	cudaDeviceSynchronize@PLT
	leaq	.LC2(%rip), %rsi
	movq	%r14, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L20:
	xorl	%ebx, %ebx
.L21:
	leaq	0(,%rbx,4), %rax
	movq	%r14, %rdi
	addq	8(%rsp), %rax
	incq	%rbx
	cvtss2sd	(%rax,%rbp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$4, %rbx
	jne	.L21
	movq	%r14, %rdi
	addq	$512, %rbp
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpq	$2048, %rbp
	jne	.L20
	movq	%r13, %rdi
	call	_Z13freeELLMatrixR9ELLMatrix
	movq	%r12, %rdi
	call	_Z13freeELLMatrixR9ELLMatrix
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L13:
	movq	168(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z11ellMMKernel9ELLMatrixS_Pfi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z11ellMMKernel9ELLMatrixS_Pfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>


// Define ELLPACK matrix structure
typedef struct {
    int rows;
    int cols;
    int maxNZRow;
    float* values;
    int* colIndices;
} ELLMatrix;

// Kernel for ELLPACK matrix-matrix multiplication
__global__ void ellMMKernel(ELLMatrix A, ELLMatrix B, float* C, int width) {
    __shared__ float sA[32][32];
    __shared__ float sB[32][32];

    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;

    float cValue = 0.0f;

    for (int e = 0; e < A.maxNZRow; e += 32) {
        // Load A and B into shared memory
        if (row < A.rows && e + threadIdx.y < A.maxNZRow) {
            sA[threadIdx.y][threadIdx.x] = A.values[row * A.maxNZRow + e + threadIdx.y];
        } else {
            sA[threadIdx.y][threadIdx.x] = 0.0f;
        }

        if (col < B.cols && e + threadIdx.x < A.maxNZRow) {
            sB[threadIdx.y][threadIdx.x] = B.values[(e + threadIdx.x) * B.cols + col];
        } else {
            sB[threadIdx.y][threadIdx.x] = 0.0f;
        }

        __syncthreads();

        // Perform multiplication
        for (int k = 0; k < 32; ++k) {
            cValue += sA[threadIdx.y][k] * sB[k][threadIdx.x];
        }

        __syncthreads();
    }

    // Write the result to global memory
    if (row < A.rows && col < B.cols) {
        C[row * width + col] = cValue;
    }
}

// Function to initialize an ELL matrix with some values
void initializeELLMatrix(ELLMatrix& matrix, int rows, int cols, int maxNZRow) {
    matrix.rows = rows;
    matrix.cols = cols;
    matrix.maxNZRow = maxNZRow;
    hipMallocManaged(&matrix.values, rows * maxNZRow * sizeof(float));
    hipMallocManaged(&matrix.colIndices, rows * maxNZRow * sizeof(int));
}

// Function to free the ELL matrix
void freeELLMatrix(ELLMatrix& matrix) {
    hipFree(matrix.values);
    hipFree(matrix.colIndices);
}

int main() {
    // Define matrix dimensions and maximum non-zero elements per row
    int rowsA = 128;
    int colsA = 128;
    int maxNZRowA = 16;
    int rowsB = colsA;
    int colsB = 128;

    // Initialize matrices A and B
    ELLMatrix A, B;
    initializeELLMatrix(A, rowsA, colsA, maxNZRowA);
    initializeELLMatrix(B, rowsB, colsB, maxNZRowA);

    // Initialize C matrix
    float* C;
    hipMallocManaged(&C, rowsA * colsB * sizeof(float));

    // Initialize A and B with some values (example values)
    for (int i = 0; i < rowsA; ++i) {
        for (int j = 0; j < maxNZRowA; ++j) {
            A.values[i * maxNZRowA + j] = 1.0f;
            A.colIndices[i * maxNZRowA + j] = j;
            B.values[j * colsB + i] = 1.0f;
        }
    }

    // Define block and grid sizes
    dim3 blockSize(32, 32);
    dim3 gridSize((colsB + blockSize.x - 1) / blockSize.x, (rowsA + blockSize.y - 1) / blockSize.y);

    // Launch kernel
    ellMMKernel<<<gridSize, blockSize>>>(A, B, C, colsB);

    // Check for errors in kernel launch
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Kernel launch failed: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Synchronize to ensure all computations are done
    hipDeviceSynchronize();

    // Output the result matrix C (for demonstration, print only a part of it)
    std::cout << "Result matrix C (first 16 elements):" << std::endl;
    for (int i = 0; i < 4; ++i) {
        for (int j = 0; j < 4; ++j) {
            std::cout << C[i * colsB + j] << " ";
        }
        std::cout << std::endl;
    }

    // Free memory
    freeELLMatrix(A);
    freeELLMatrix(B);
    hipFree(C);

    return 0;
}
	.text
	.file	"cuda_code_056009.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z26__device_stub__ellMMKernel9ELLMatrixS_Pfi # -- Begin function _Z26__device_stub__ellMMKernel9ELLMatrixS_Pfi
	.type	_Z26__device_stub__ellMMKernel9ELLMatrixS_Pfi,@function
_Z26__device_stub__ellMMKernel9ELLMatrixS_Pfi: # @_Z26__device_stub__ellMMKernel9ELLMatrixS_Pfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	144(%rsp), %rdx
	leaq	64(%rsp), %rbx
	movq	%rdx, (%rbx)
	leaq	176(%rsp), %rdx
	movq	%rdx, 8(%rbx)
	movq	%rax, 16(%rbx)
	movq	%rcx, 24(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11ellMMKernel9ELLMatrixS_Pfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__ellMMKernel9ELLMatrixS_Pfi, .Lfunc_end0-_Z26__device_stub__ellMMKernel9ELLMatrixS_Pfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z19initializeELLMatrixR9ELLMatrixiii # -- Begin function _Z19initializeELLMatrixR9ELLMatrixiii
	.type	_Z19initializeELLMatrixR9ELLMatrixiii,@function
_Z19initializeELLMatrixR9ELLMatrixiii:  # @_Z19initializeELLMatrixR9ELLMatrixiii
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	movl	%esi, (%rdi)
	movl	%edx, 4(%rdi)
	movl	%ecx, 8(%rdi)
	addq	$16, %rdi
	imull	%esi, %ecx
	movslq	%ecx, %r14
	shlq	$2, %r14
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	addq	$24, %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	hipMallocManaged                # TAILCALL
.Lfunc_end1:
	.size	_Z19initializeELLMatrixR9ELLMatrixiii, .Lfunc_end1-_Z19initializeELLMatrixR9ELLMatrixiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13freeELLMatrixR9ELLMatrix    # -- Begin function _Z13freeELLMatrixR9ELLMatrix
	.type	_Z13freeELLMatrixR9ELLMatrix,@function
_Z13freeELLMatrixR9ELLMatrix:           # @_Z13freeELLMatrixR9ELLMatrix
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	16(%rdi), %rdi
	callq	hipFree
	movq	24(%rbx), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end2:
	.size	_Z13freeELLMatrixR9ELLMatrix, .Lfunc_end2-_Z13freeELLMatrixR9ELLMatrix
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$549755814016, %r14             # imm = 0x8000000080
	leaq	128(%rsp), %rdi
	movq	%r14, -16(%rdi)
	movl	$16, %ebp
	movl	%ebp, -8(%rdi)
	movl	$8192, %esi                     # imm = 0x2000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	136(%rsp), %rbx
	movl	$8192, %esi                     # imm = 0x2000
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	96(%rsp), %rdi
	movq	%r14, -16(%rdi)
	movl	%ebp, -8(%rdi)
	movl	$8192, %esi                     # imm = 0x2000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	104(%rsp), %r14
	movl	$8192, %esi                     # imm = 0x2000
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	72(%rsp), %rdi
	movl	$65536, %esi                    # imm = 0x10000
	movl	$1, %edx
	callq	hipMallocManaged
	movq	-8(%rbx), %rax
	movq	(%rbx), %rcx
	xorl	%edx, %edx
	movq	-8(%r14), %rsi
	movl	$1065353216, %edi               # imm = 0x3F800000
.LBB3_1:                                # %.preheader52
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	movq	%rsi, %r8
	xorl	%r9d, %r9d
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%edi, (%rax,%r9,4)
	movl	%r9d, (%rcx,%r9,4)
	movl	%edi, (%r8)
	incq	%r9
	addq	$512, %r8                       # imm = 0x200
	cmpq	$16, %r9
	jne	.LBB3_2
# %bb.3:                                #   in Loop: Header=BB3_1 Depth=1
	incq	%rdx
	addq	$4, %rsi
	addq	$64, %rcx
	addq	$64, %rax
	cmpq	$128, %rdx
	jne	.LBB3_1
# %bb.4:
	movabsq	$17179869188, %rdi              # imm = 0x400000004
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_6
# %bb.5:
	movq	72(%rsp), %rdi
	movups	80(%rsp), %xmm0
	movups	96(%rsp), %xmm1
	movups	%xmm1, 48(%rsp)
	movups	%xmm0, 32(%rsp)
	movups	112(%rsp), %xmm0
	movups	128(%rsp), %xmm1
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$128, %esi
	callq	_Z26__device_stub__ellMMKernel9ELLMatrixS_Pfi
.LBB3_6:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB3_11
# %bb.7:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB3_8
# %bb.9:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB3_10
.LBB3_11:
	callq	hipDeviceSynchronize
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$36, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB3_12:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_13 Depth 2
	xorl	%r12d, %r12d
.LBB3_13:                               #   Parent Loop BB3_12 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	72(%rsp), %rax
	addq	%r14, %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r12,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r12
	cmpq	$4, %r12
	jne	.LBB3_13
# %bb.14:                               #   in Loop: Header=BB3_12 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r15
	addq	$512, %r14                      # imm = 0x200
	cmpq	$4, %r15
	jne	.LBB3_12
# %bb.15:
	movq	128(%rsp), %rdi
	callq	hipFree
	movq	136(%rsp), %rdi
	callq	hipFree
	movq	96(%rsp), %rdi
	callq	hipFree
	movq	104(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	jmp	.LBB3_16
.LBB3_8:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB3_10:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB3_16:
	addq	$144, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11ellMMKernel9ELLMatrixS_Pfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11ellMMKernel9ELLMatrixS_Pfi,@object # @_Z11ellMMKernel9ELLMatrixS_Pfi
	.section	.rodata,"a",@progbits
	.globl	_Z11ellMMKernel9ELLMatrixS_Pfi
	.p2align	3, 0x0
_Z11ellMMKernel9ELLMatrixS_Pfi:
	.quad	_Z26__device_stub__ellMMKernel9ELLMatrixS_Pfi
	.size	_Z11ellMMKernel9ELLMatrixS_Pfi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Kernel launch failed: "
	.size	.L.str, 23

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Result matrix C (first 16 elements):"
	.size	.L.str.1, 37

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" "
	.size	.L.str.2, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11ellMMKernel9ELLMatrixS_Pfi"
	.size	.L__unnamed_1, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__ellMMKernel9ELLMatrixS_Pfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11ellMMKernel9ELLMatrixS_Pfi
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11ellMMKernel9ELLMatrixS_Pfi ; -- Begin function _Z11ellMMKernel9ELLMatrixS_Pfi
	.globl	_Z11ellMMKernel9ELLMatrixS_Pfi
	.p2align	8
	.type	_Z11ellMMKernel9ELLMatrixS_Pfi,@function
_Z11ellMMKernel9ELLMatrixS_Pfi:         ; @_Z11ellMMKernel9ELLMatrixS_Pfi
; %bb.0:
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x5c
	s_load_b32 s8, s[0:1], 0x0
	s_load_b32 s9, s[0:1], 0x24
	s_load_b32 s10, s[0:1], 0x8
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_add_u32 s6, s0, 32
	s_addc_u32 s7, s1, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[0:1], null, s15, s3, v[3:4]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[4:5]
	s_cmp_lt_i32 s10, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s8, v0
	v_cmp_gt_i32_e64 s2, s9, v1
	s_cbranch_scc1 .LBB0_11
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x10
	s_load_b64 s[6:7], s[6:7], 0x10
	v_lshlrev_b32_e32 v2, 2, v4
	v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v7, 7, v3
	v_mul_lo_u32 v10, v0, s10
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v8, 0x1000, v2
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v9, v7, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v8, v7
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_9 Depth 2
	v_dual_mov_b32 v12, 0 :: v_dual_add_nc_u32 v5, s11, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s3, s10, v5
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s12, s3
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v5, v5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v12, s3, s4, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s3, s5, v13, s3
	global_load_b32 v12, v[12:13], off
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_mov_b32_e32 v5, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v12
	s_and_saveexec_b32 s12, s2
	s_cbranch_execz .LBB0_8
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	v_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v12, s11, v4
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s10, v12
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mad_u64_u32 v[13:14], null, v12, s9, v[1:2]
	v_mov_b32_e32 v14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[13:14]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v12, s3, s6, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s3, s7, v13, s3
	global_load_b32 v5, v[12:13], off
.LBB0_7:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_8:                                ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s12
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v5
	v_mov_b32_e32 v5, v8
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_9:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v12, s3, v7
	s_add_i32 s3, s3, 4
	ds_load_b32 v13, v5
	ds_load_b32 v12, v12
	v_add_nc_u32_e32 v5, 0x80, v5
	s_cmpk_eq_i32 s3, 0x80
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v2, v12, v13
	s_cbranch_scc0 .LBB0_9
; %bb.10:                               ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s11, s11, 32
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s11, s10
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_12
.LBB0_11:
	v_mov_b32_e32 v2, 0
.LBB0_12:                               ; %Flow58
	v_cmp_gt_i32_e32 vcc_lo, s8, v0
	v_cmp_gt_i32_e64 s2, s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_14
; %bb.13:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x48
	s_load_b64 s[0:1], s[0:1], 0x40
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[3:4], null, v0, s2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11ellMMKernel9ELLMatrixS_Pfi
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11ellMMKernel9ELLMatrixS_Pfi, .Lfunc_end0-_Z11ellMMKernel9ELLMatrixS_Pfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 628
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           32
        .value_kind:     by_value
      - .offset:         32
        .size:           32
        .value_kind:     by_value
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .offset:         72
        .size:           4
        .value_kind:     by_value
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         84
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         88
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         92
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         94
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         96
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         98
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         100
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         102
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         144
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 336
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11ellMMKernel9ELLMatrixS_Pfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11ellMMKernel9ELLMatrixS_Pfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
