#include <iostream>
#include <cuda_runtime.h>
#include <vector_types.h>

#define BLOCK_SIZE 32
#define MAX_ITERATIONS 100

__device__ bool comparePixel(unsigned char* image, int width, int height, int x, int y, unsigned char* seedColor, int threshold) {
    int idx = y * width + x;
    int colorDiff = abs(image[idx] - seedColor[0]) + abs(image[idx + 1] - seedColor[1]) + abs(image[idx + 2] - seedColor[2]);
    return colorDiff <= threshold;
}

__global__ void regionGrowing(unsigned char* d_image, unsigned char* d_output, int width, int height, int seedX, int seedY, unsigned char* d_seedColor, int threshold, int* d_activePixels, int* d_activePixelsCount) {
    extern __shared__ int sharedPixels[];

    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    int gid = tid;

    // Load seed color into shared memory
    if (tid < 3) {
        sharedPixels[tid] = d_seedColor[tid];
    }
    __syncthreads();

    int x = seedX;
    int y = seedY;

    // Load initial active pixels into shared memory
    if (tid == 0) {
        sharedPixels[3] = x;
        sharedPixels[4] = y;
    }
    __syncthreads();

    for (int iter = 0; iter < MAX_ITERATIONS; ++iter) {
        int localIdx = threadIdx.x;
        int pixelX = sharedPixels[3 + 2 * localIdx];
        int pixelY = sharedPixels[4 + 2 * localIdx];

        if (pixelX >= 0 && pixelX < width && pixelY >= 0 && pixelY < height) {
            int idx = pixelY * width + pixelX;
            if (d_output[idx] == 0 && comparePixel(d_image, width, height, pixelX, pixelY, (unsigned char*)sharedPixels, threshold)) {
                d_output[idx] = 255;
                int nextIdx = atomicAdd(d_activePixelsCount, 2);
                if (nextIdx < blockDim.x * 2) {
                    d_activePixels[nextIdx] = pixelX - 1;
                    d_activePixels[nextIdx + 1] = pixelY;
                    d_activePixels[nextIdx + 2] = pixelX + 1;
                    d_activePixels[nextIdx + 3] = pixelY;
                    d_activePixels[nextIdx + 4] = pixelX;
                    d_activePixels[nextIdx + 5] = pixelY - 1;
                    d_activePixels[nextIdx + 6] = pixelX;
                    d_activePixels[nextIdx + 7] = pixelY + 1;
                }
            }
        }
        __syncthreads();

        // Load next set of active pixels into shared memory
        if (tid < blockDim.x) {
            int pixelIdx = tid * 2;
            sharedPixels[3 + 2 * tid] = d_activePixels[pixelIdx];
            sharedPixels[4 + 2 * tid] = d_activePixels[pixelIdx + 1];
        }
        __syncthreads();

        // Reset active pixels count for next iteration
        if (tid == 0) {
            atomicExch(d_activePixelsCount, 0);
        }
        __syncthreads();
    }
}

int main() {
    const int width = 512;
    const int height = 512;
    const int imageSize = width * height * 3; // 3 channels (RGB)

    // Host memory allocation
    unsigned char* h_image = new unsigned char[imageSize];
    unsigned char* h_output = new unsigned char[imageSize];
    unsigned char h_seedColor[3] = {128, 128, 128}; // Seed color (gray)

    // Initialize image and output
    for (int i = 0; i < imageSize; ++i) {
        h_image[i] = rand() % 256;
        h_output[i] = 0;
    }

    // Device memory allocation
    unsigned char* d_image;
    unsigned char* d_output;
    unsigned char* d_seedColor;
    int* d_activePixels;
    int* d_activePixelsCount;

    cudaError_t err;
    err = cudaMalloc((void**)&d_image, imageSize);
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate d_image (error code " << err << ")" << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_output, imageSize);
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate d_output (error code " << err << ")" << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_seedColor, 3 * sizeof(unsigned char));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate d_seedColor (error code " << err << ")" << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_activePixels, BLOCK_SIZE * 2 * sizeof(int));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate d_activePixels (error code " << err << ")" << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_activePixelsCount, sizeof(int));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate d_activePixelsCount (error code " << err << ")" << std::endl;
        return -1;
    }

    // Copy data from host to device
    err = cudaMemcpy(d_image, h_image, imageSize, cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy h_image to d_image (error code " << err << ")" << std::endl;
        return -1;
    }
    err = cudaMemcpy(d_seedColor, h_seedColor, 3 * sizeof(unsigned char), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy h_seedColor to d_seedColor (error code " << err << ")" << std::endl;
        return -1;
    }

    // Initialize active pixels count
    err = cudaMemset(d_activePixelsCount, 0, sizeof(int));
    if (err != cudaSuccess) {
        std::cerr << "Failed to initialize d_activePixelsCount (error code " << err << ")" << std::endl;
        return -1;
    }

    // Launch kernel
    int seedX = width / 2;
    int seedY = height / 2;
    int threshold = 30;
    int sharedMemSize = BLOCK_SIZE * 5 * sizeof(int); // 3 for seed color, 2 for initial pixel, 2 * BLOCK_SIZE for active pixels

    regionGrowing<<<1, BLOCK_SIZE, sharedMemSize>>>(d_image, d_output, width, height, seedX, seedY, d_seedColor, threshold, d_activePixels, d_activePixelsCount);

    // Copy result back to host
    err = cudaMemcpy(h_output, d_output, imageSize, cudaMemcpyDeviceToHost);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy d_output to h_output (error code " << err << ")" << std::endl;
        return -1;
    }

    // Free device memory
    cudaFree(d_image);
    cudaFree(d_output);
    cudaFree(d_seedColor);
    cudaFree(d_activePixels);
    cudaFree(d_activePixelsCount);

    // Free host memory
    delete[] h_image;
    delete[] h_output;

    return 0;
}
	.file	"tmpxft_00102eec_00000000-6_cuda_code_030185.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4293:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4293:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z12comparePixelPhiiiiS_i
	.type	_Z12comparePixelPhiiiiS_i, @function
_Z12comparePixelPhiiiiS_i:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z12comparePixelPhiiiiS_i, .-_Z12comparePixelPhiiiiS_i
	.globl	_Z47__device_stub__Z13regionGrowingPhS_iiiiS_iPiS0_PhS_iiiiS_iPiS0_
	.type	_Z47__device_stub__Z13regionGrowingPhS_iiiiS_iPiS0_PhS_iiiiS_iPiS0_, @function
_Z47__device_stub__Z13regionGrowingPhS_iiiiS_iPiS0_PhS_iiiiS_iPiS0_:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	240(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	256(%rsp), %rax
	movl	%edx, 44(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	264(%rsp), %rax
	movl	%ecx, 40(%rsp)
	leaq	80(%rsp), %rcx
	movl	%r8d, 36(%rsp)
	movl	%r9d, 32(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	44(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L5
	pushq	80(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z13regionGrowingPhS_iiiiS_iPiS0_(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 256
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L5:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z47__device_stub__Z13regionGrowingPhS_iiiiS_iPiS0_PhS_iiiiS_iPiS0_, .-_Z47__device_stub__Z13regionGrowingPhS_iiiiS_iPiS0_PhS_iiiiS_iPiS0_
	.globl	_Z13regionGrowingPhS_iiiiS_iPiS0_
	.type	_Z13regionGrowingPhS_iiiiS_iPiS0_, @function
_Z13regionGrowingPhS_iiiiS_iPiS0_:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z13regionGrowingPhS_iiiiS_iPiS0_PhS_iiiiS_iPiS0_
	.cfi_endproc
.LFE3662:
	.size	_Z13regionGrowingPhS_iiiiS_iPiS0_, .-_Z13regionGrowingPhS_iiiiS_iPiS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Failed to allocate d_image (error code "
.LC1:
	.string	")"
.LC2:
	.string	"Failed to allocate d_output (error code "
.LC3:
	.string	"Failed to allocate d_seedColor (error code "
.LC4:
	.string	"Failed to allocate d_activePixels (error code "
.LC5:
	.string	"Failed to allocate d_activePixelsCount (error code "
.LC6:
	.string	"Failed to copy h_image to d_image (error code "
.LC7:
	.string	"Failed to copy h_seedColor to d_seedColor (error code "
.LC8:
	.string	"Failed to initialize d_activePixelsCount (error code "
.LC9:
	.string	"Failed to copy d_output to h_output (error code "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$786432, %edi
	movl	$256, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$786432, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movw	$-32640, 69(%rsp)
	movb	$-128, 71(%rsp)
	movq	%rax, %rbx
.L12:
	call	rand@PLT
	movb	$0, (%rbx,%r12)
	cltd
	idivl	%r13d
	movb	%dl, 0(%rbp,%r12)
	incq	%r12
	cmpq	$786432, %r12
	jne	.L12
	movl	$786432, %esi
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	leaq	.LC0(%rip), %rsi
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L28
	leaq	8(%rsp), %rdi
	movl	$786432, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L15
	leaq	.LC2(%rip), %rsi
.L28:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	orl	$-1, %eax
	jmp	.L11
.L15:
	movl	$3, %esi
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC3(%rip), %rsi
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L28
	movl	$256, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC4(%rip), %rsi
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L28
	movl	$4, %esi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC5(%rip), %rsi
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L28
	movq	(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$786432, %edx
	call	cudaMemcpy@PLT
	leaq	.LC6(%rip), %rsi
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L28
	movq	16(%rsp), %rdi
	leaq	69(%rsp), %rsi
	movl	$1, %ecx
	movl	$3, %edx
	call	cudaMemcpy@PLT
	leaq	.LC7(%rip), %rsi
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L28
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	call	cudaMemset@PLT
	leaq	.LC8(%rip), %rsi
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L28
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	movl	$640, %r8d
	movl	$1, %ecx
	salq	$5, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	movl	$256, %r9d
	movl	$256, %r8d
	movl	$512, %ecx
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movl	$512, %edx
	pushq	$30
	.cfi_def_cfa_offset 152
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z47__device_stub__Z13regionGrowingPhS_iiiiS_iPiS0_PhS_iiiiS_iPiS0_
	addq	$32, %rsp
	.cfi_def_cfa_offset 128
.L23:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$786432, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC9(%rip), %rsi
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L28
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	xorl	%eax, %eax
.L11:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z13regionGrowingPhS_iiiiS_iPiS0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13regionGrowingPhS_iiiiS_iPiS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_vector_types.h>

#define BLOCK_SIZE 32
#define MAX_ITERATIONS 100

__device__ bool comparePixel(unsigned char* image, int width, int height, int x, int y, unsigned char* seedColor, int threshold) {
    int idx = y * width + x;
    int colorDiff = abs(image[idx] - seedColor[0]) + abs(image[idx + 1] - seedColor[1]) + abs(image[idx + 2] - seedColor[2]);
    return colorDiff <= threshold;
}

__global__ void regionGrowing(unsigned char* d_image, unsigned char* d_output, int width, int height, int seedX, int seedY, unsigned char* d_seedColor, int threshold, int* d_activePixels, int* d_activePixelsCount) {
    extern __shared__ int sharedPixels[];

    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    int gid = tid;

    // Load seed color into shared memory
    if (tid < 3) {
        sharedPixels[tid] = d_seedColor[tid];
    }
    __syncthreads();

    int x = seedX;
    int y = seedY;

    // Load initial active pixels into shared memory
    if (tid == 0) {
        sharedPixels[3] = x;
        sharedPixels[4] = y;
    }
    __syncthreads();

    for (int iter = 0; iter < MAX_ITERATIONS; ++iter) {
        int localIdx = threadIdx.x;
        int pixelX = sharedPixels[3 + 2 * localIdx];
        int pixelY = sharedPixels[4 + 2 * localIdx];

        if (pixelX >= 0 && pixelX < width && pixelY >= 0 && pixelY < height) {
            int idx = pixelY * width + pixelX;
            if (d_output[idx] == 0 && comparePixel(d_image, width, height, pixelX, pixelY, (unsigned char*)sharedPixels, threshold)) {
                d_output[idx] = 255;
                int nextIdx = atomicAdd(d_activePixelsCount, 2);
                if (nextIdx < blockDim.x * 2) {
                    d_activePixels[nextIdx] = pixelX - 1;
                    d_activePixels[nextIdx + 1] = pixelY;
                    d_activePixels[nextIdx + 2] = pixelX + 1;
                    d_activePixels[nextIdx + 3] = pixelY;
                    d_activePixels[nextIdx + 4] = pixelX;
                    d_activePixels[nextIdx + 5] = pixelY - 1;
                    d_activePixels[nextIdx + 6] = pixelX;
                    d_activePixels[nextIdx + 7] = pixelY + 1;
                }
            }
        }
        __syncthreads();

        // Load next set of active pixels into shared memory
        if (tid < blockDim.x) {
            int pixelIdx = tid * 2;
            sharedPixels[3 + 2 * tid] = d_activePixels[pixelIdx];
            sharedPixels[4 + 2 * tid] = d_activePixels[pixelIdx + 1];
        }
        __syncthreads();

        // Reset active pixels count for next iteration
        if (tid == 0) {
            atomicExch(d_activePixelsCount, 0);
        }
        __syncthreads();
    }
}

int main() {
    const int width = 512;
    const int height = 512;
    const int imageSize = width * height * 3; // 3 channels (RGB)

    // Host memory allocation
    unsigned char* h_image = new unsigned char[imageSize];
    unsigned char* h_output = new unsigned char[imageSize];
    unsigned char h_seedColor[3] = {128, 128, 128}; // Seed color (gray)

    // Initialize image and output
    for (int i = 0; i < imageSize; ++i) {
        h_image[i] = rand() % 256;
        h_output[i] = 0;
    }

    // Device memory allocation
    unsigned char* d_image;
    unsigned char* d_output;
    unsigned char* d_seedColor;
    int* d_activePixels;
    int* d_activePixelsCount;

    hipError_t err;
    err = hipMalloc((void**)&d_image, imageSize);
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate d_image (error code " << err << ")" << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_output, imageSize);
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate d_output (error code " << err << ")" << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_seedColor, 3 * sizeof(unsigned char));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate d_seedColor (error code " << err << ")" << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_activePixels, BLOCK_SIZE * 2 * sizeof(int));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate d_activePixels (error code " << err << ")" << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_activePixelsCount, sizeof(int));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate d_activePixelsCount (error code " << err << ")" << std::endl;
        return -1;
    }

    // Copy data from host to device
    err = hipMemcpy(d_image, h_image, imageSize, hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy h_image to d_image (error code " << err << ")" << std::endl;
        return -1;
    }
    err = hipMemcpy(d_seedColor, h_seedColor, 3 * sizeof(unsigned char), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy h_seedColor to d_seedColor (error code " << err << ")" << std::endl;
        return -1;
    }

    // Initialize active pixels count
    err = hipMemset(d_activePixelsCount, 0, sizeof(int));
    if (err != hipSuccess) {
        std::cerr << "Failed to initialize d_activePixelsCount (error code " << err << ")" << std::endl;
        return -1;
    }

    // Launch kernel
    int seedX = width / 2;
    int seedY = height / 2;
    int threshold = 30;
    int sharedMemSize = BLOCK_SIZE * 5 * sizeof(int); // 3 for seed color, 2 for initial pixel, 2 * BLOCK_SIZE for active pixels

    regionGrowing<<<1, BLOCK_SIZE, sharedMemSize>>>(d_image, d_output, width, height, seedX, seedY, d_seedColor, threshold, d_activePixels, d_activePixelsCount);

    // Copy result back to host
    err = hipMemcpy(h_output, d_output, imageSize, hipMemcpyDeviceToHost);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy d_output to h_output (error code " << err << ")" << std::endl;
        return -1;
    }

    // Free device memory
    hipFree(d_image);
    hipFree(d_output);
    hipFree(d_seedColor);
    hipFree(d_activePixels);
    hipFree(d_activePixelsCount);

    // Free host memory
    delete[] h_image;
    delete[] h_output;

    return 0;
}
	.text
	.file	"cuda_code_030185.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z28__device_stub__regionGrowingPhS_iiiiS_iPiS0_ # -- Begin function _Z28__device_stub__regionGrowingPhS_iiiiS_iPiS0_
	.type	_Z28__device_stub__regionGrowingPhS_iiiiS_iPiS0_,@function
_Z28__device_stub__regionGrowingPhS_iiiiS_iPiS0_: # @_Z28__device_stub__regionGrowingPhS_iiiiS_iPiS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13regionGrowingPhS_iiiiS_iPiS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__regionGrowingPhS_iiiiS_iPiS0_, .Lfunc_end0-_Z28__device_stub__regionGrowingPhS_iiiiS_iPiS0_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$786432, %edi                   # imm = 0xC0000
	callq	_Znam
	movq	%rax, %rbx
	movl	$786432, %edi                   # imm = 0xC0000
	callq	_Znam
	movq	%rax, %r14
	movw	$-32640, 13(%rsp)               # imm = 0x8080
	movb	$-128, 15(%rsp)
	xorl	%r15d, %r15d
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	movb	%al, (%rbx,%r15)
	movb	$0, (%r14,%r15)
	incq	%r15
	cmpq	$786432, %r15                   # imm = 0xC0000
	jne	.LBB1_1
# %bb.2:
	leaq	40(%rsp), %rdi
	movl	$786432, %esi                   # imm = 0xC0000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_4
# %bb.3:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$39, %edx
	jmp	.LBB1_10
.LBB1_4:
	leaq	32(%rsp), %rdi
	movl	$786432, %esi                   # imm = 0xC0000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_6
# %bb.5:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	movl	$40, %edx
	jmp	.LBB1_10
.LBB1_6:
	leaq	24(%rsp), %rdi
	movl	$3, %esi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_8
# %bb.7:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$43, %edx
	jmp	.LBB1_10
.LBB1_8:
	leaq	48(%rsp), %rdi
	movl	$256, %esi                      # imm = 0x100
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_13
# %bb.9:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.4, %esi
	movl	$46, %edx
.LBB1_10:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cerr, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_11:
	movl	$-1, %eax
.LBB1_12:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_13:
	.cfi_def_cfa_offset 96
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_15
# %bb.14:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	movl	$51, %edx
	jmp	.LBB1_25
.LBB1_15:
	movq	40(%rsp), %rdi
	movl	$786432, %edx                   # imm = 0xC0000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_17
# %bb.16:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.6, %esi
	movl	$46, %edx
	jmp	.LBB1_25
.LBB1_17:
	movq	24(%rsp), %rdi
	leaq	13(%rsp), %rsi
	movl	$3, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_19
# %bb.18:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.7, %esi
	movl	$54, %edx
	jmp	.LBB1_25
.LBB1_19:
	movq	16(%rsp), %rdi
	movl	$4, %edx
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	je	.LBB1_21
# %bb.20:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.8, %esi
	movl	$53, %edx
	jmp	.LBB1_25
.LBB1_21:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	31(%rdi), %rdx
	movl	$640, %r8d                      # imm = 0x280
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_23
# %bb.22:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	movl	$512, %ecx                      # imm = 0x200
	movl	$256, %r8d                      # imm = 0x100
	movl	$256, %r9d                      # imm = 0x100
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	$30
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__regionGrowingPhS_iiiiS_iPiS0_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB1_23:
	movq	32(%rsp), %rsi
	movl	$786432, %edx                   # imm = 0xC0000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_26
# %bb.24:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.9, %esi
	movl	$48, %edx
.LBB1_25:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cerr, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	jmp	.LBB1_11
.LBB1_26:
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	jmp	.LBB1_12
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13regionGrowingPhS_iiiiS_iPiS0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13regionGrowingPhS_iiiiS_iPiS0_,@object # @_Z13regionGrowingPhS_iiiiS_iPiS0_
	.section	.rodata,"a",@progbits
	.globl	_Z13regionGrowingPhS_iiiiS_iPiS0_
	.p2align	3, 0x0
_Z13regionGrowingPhS_iiiiS_iPiS0_:
	.quad	_Z28__device_stub__regionGrowingPhS_iiiiS_iPiS0_
	.size	_Z13regionGrowingPhS_iiiiS_iPiS0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to allocate d_image (error code "
	.size	.L.str, 40

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	")"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate d_output (error code "
	.size	.L.str.2, 41

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate d_seedColor (error code "
	.size	.L.str.3, 44

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to allocate d_activePixels (error code "
	.size	.L.str.4, 47

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to allocate d_activePixelsCount (error code "
	.size	.L.str.5, 52

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to copy h_image to d_image (error code "
	.size	.L.str.6, 47

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to copy h_seedColor to d_seedColor (error code "
	.size	.L.str.7, 55

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Failed to initialize d_activePixelsCount (error code "
	.size	.L.str.8, 54

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to copy d_output to h_output (error code "
	.size	.L.str.9, 49

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13regionGrowingPhS_iiiiS_iPiS0_"
	.size	.L__unnamed_1, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__regionGrowingPhS_iiiiS_iPiS0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13regionGrowingPhS_iiiiS_iPiS0_
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13regionGrowingPhS_iiiiS_iPiS0_ ; -- Begin function _Z13regionGrowingPhS_iiiiS_iPiS0_
	.globl	_Z13regionGrowingPhS_iiiiS_iPiS0_
	.p2align	8
	.type	_Z13regionGrowingPhS_iiiiS_iPiS0_,@function
_Z13regionGrowingPhS_iiiiS_iPiS0_:      ; @_Z13regionGrowingPhS_iiiiS_iPiS0_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x4c
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_cmpx_gt_i32_e32 3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b64 s[4:5], s[0:1], 0x20
	v_ashrrev_i32_e32 v3, 31, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_u8 v2, v[2:3], off
	v_lshl_add_u32 v3, v1, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v2
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b128 s[4:7], s[0:1], 0x10
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, s6
	v_mov_b32_e32 v4, s7
	ds_store_2addr_b32 v2, v3, v4 offset0:3 offset1:4
.LBB0_4:
	s_or_b32 exec_lo, exec_lo, s3
	s_clause 0x2
	s_load_b128 s[8:11], s[0:1], 0x30
	s_load_b128 s[12:15], s[0:1], 0x0
	s_load_b32 s6, s[0:1], 0x28
	v_dual_mov_b32 v4, 0 :: v_dual_lshlrev_b32 v3, 1, v1
	v_lshl_add_u32 v11, v0, 3, 0
	v_cmp_gt_u32_e64 s0, s2, v1
	v_lshl_add_u32 v12, v1, 3, 0
	v_mov_b32_e32 v13, 0xff
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_lshl_b32 s7, s2, 1
	s_movk_i32 s16, 0x64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_co_u32 v5, s1, s8, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s1, s9, v3, s1
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	ds_load_2addr_b32 v[1:2], v11 offset0:3 offset1:4
	s_mov_b32 s17, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_i32_e32 -1, v1
	s_cbranch_execz .LBB0_13
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	v_cmp_gt_i32_e64 s1, s4, v1
	v_cmp_gt_i32_e64 s2, s5, v2
	v_cmp_lt_i32_e64 s3, -1, v2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB0_13
; %bb.7:                                ;   in Loop: Header=BB0_5 Depth=1
	v_mad_u64_u32 v[9:10], null, v2, s4, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v0, 31, v9
	v_add_co_u32 v7, s1, s14, v9
	v_add_co_ci_u32_e64 v8, s1, s15, v0, s1
	global_load_u8 v3, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s1, 0, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB0_13
; %bb.8:                                ;   in Loop: Header=BB0_5 Depth=1
	v_add_co_u32 v9, s1, s12, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s1, s13, v0, s1
	s_clause 0x1
	global_load_u16 v0, v[9:10], off
	global_load_u8 v3, v[9:10], off offset:2
	ds_load_b32 v9, v4
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v10, 0xff, v9
	v_bfe_u32 v14, v9, 8, 8
	v_bfe_u32 v9, v9, 16, 8
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v15, 0xff, v0
	v_lshrrev_b32_e32 v0, 8, v0
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v3, v3, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v10, v15, v10
	v_sub_nc_u32_e32 v0, v0, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v15, 0, v3
	v_sub_nc_u32_e32 v9, 0, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v14, 0, v0
	v_max_i32_e32 v3, v3, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_max_i32_e32 v9, v10, v9
	v_max_i32_e32 v0, v0, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, v0, v9, v3
	v_cmp_ge_i32_e64 s1, s6, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB0_13
; %bb.9:                                ;   in Loop: Header=BB0_5 Depth=1
	s_mov_b32 s3, exec_lo
	s_mov_b32 s2, exec_lo
	v_mbcnt_lo_u32_b32 v0, s3, 0
	global_store_b8 v[7:8], v13, off
                                        ; implicit-def: $vgpr3
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_5 Depth=1
	s_bcnt1_i32_b32 s1, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s1, s1, 1
	v_mov_b32_e32 v3, s1
	global_atomic_add_u32 v3, v4, v3, s[10:11] glc
.LBB0_11:                               ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v3, v0, 1, s1
	v_cmp_gt_u32_e64 s1, s7, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_5 Depth=1
	v_ashrrev_i32_e32 v8, 31, v3
	v_mov_b32_e32 v7, v3
	v_lshlrev_b64 v[9:10], 2, v[3:4]
	v_add_nc_u32_e32 v3, -1, v1
	v_add_nc_u32_e32 v0, -1, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v14, s1, s8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v15, s1, s9, v10, s1
	v_mov_b32_e32 v10, v1
	v_add_co_u32 v16, s1, s8, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v17, s1, s9, v8, s1
	v_dual_mov_b32 v7, v2 :: v_dual_add_nc_u32 v8, 1, v1
	v_dual_mov_b32 v9, v2 :: v_dual_add_nc_u32 v2, 1, v2
	s_clause 0x2
	global_store_b32 v[14:15], v3, off
	global_store_b128 v[16:17], v[7:10], off offset:4
	global_store_b96 v[16:17], v[0:2], off offset:20
.LBB0_13:                               ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_15
; %bb.14:                               ;   in Loop: Header=BB0_5 Depth=1
	global_load_b64 v[0:1], v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v12, v0, v1 offset0:3 offset1:4
.LBB0_15:                               ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB0_17
; %bb.16:                               ;   in Loop: Header=BB0_5 Depth=1
	global_atomic_swap_b32 v4, v4, s[10:11]
.LBB0_17:                               ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s16, s16, -1
	s_waitcnt_vscnt null, 0x0
	s_cmp_eq_u32 s16, 0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_5
; %bb.18:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13regionGrowingPhS_iiiiS_iPiS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 18
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13regionGrowingPhS_iiiiS_iPiS0_, .Lfunc_end0-_Z13regionGrowingPhS_iiiiS_iPiS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 952
; NumSgprs: 20
; NumVgprs: 18
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 18
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         184
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13regionGrowingPhS_iiiiS_iPiS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z13regionGrowingPhS_iiiiS_iPiS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     18
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
