#include <iostream>
#include <cuda_runtime.h>

// Define a simple 3D vector structure
struct Vec3 {
    float x, y, z;
    __device__ Vec3 operator+(const Vec3& v) const { return Vec3{x + v.x, y + v.y, z + v.z}; }
    __device__ Vec3 operator-(const Vec3& v) const { return Vec3{x - v.x, y - v.y, z - v.z}; }
    __device__ Vec3 operator*(float f) const { return Vec3{x * f, y * f, z * f}; }
    __device__ float dot(const Vec3& v) const { return x * v.x + y * v.y + z * v.z; }
    __device__ Vec3 cross(const Vec3& v) const { return Vec3{y * v.z - z * v.y, z * v.x - x * v.z, x * v.y - y * v.x}; }
    __device__ Vec3 normalize() const {
        float len = sqrtf(x * x + y * y + z * z);
        return Vec3{x / len, y / len, z / len};
    }
};

// Define a simple sphere object
struct Sphere {
    Vec3 center;
    float radius;
    Vec3 color;
};

// Define a ray structure
struct Ray {
    Vec3 origin;
    Vec3 direction;
};

// Ray-sphere intersection function
__device__ bool intersect(const Ray& ray, const Sphere& sphere, float& t) {
    Vec3 oc = ray.origin - sphere.center;
    float a = ray.direction.dot(ray.direction);
    float b = 2.0f * oc.dot(ray.direction);
    float c = oc.dot(oc) - sphere.radius * sphere.radius;
    float discriminant = b * b - 4 * a * c;
    if (discriminant > 0) {
        float t0 = (-b - sqrtf(discriminant)) / (2.0f * a);
        float t1 = (-b + sqrtf(discriminant)) / (2.0f * a);
        t = t0 > 0 ? t0 : t1;
        return t > 0;
    }
    return false;
}

// Kernel function for ray tracing
__global__ void raytraceKernel(const Sphere* spheres, int numSpheres, Ray* rays, Vec3* colors, int width, int height) {
    int x = blockIdx.x * blockDim.x + threadIdx.x;
    int y = blockIdx.y * blockDim.y + threadIdx.y;
    if (x >= width || y >= height) return;

    // Calculate ray direction
    float u = float(x) / float(width);
    float v = float(y) / float(height);
    Vec3 direction = Vec3{2 * u - 1, 1 - 2 * v, -1}.normalize();
    Ray ray = {Vec3{0, 0, 0}, direction};

    // Find the nearest intersection
    float closestT = INFINITY;
    Vec3 closestColor = {0, 0, 0};
    for (int i = 0; i < numSpheres; ++i) {
        float t;
        if (intersect(ray, spheres[i], t) && t < closestT) {
            closestT = t;
            Vec3 hitPoint = ray.origin + ray.direction * t;
            Vec3 normal = (hitPoint - spheres[i].center).normalize();
            float lightIntensity = normal.dot(Vec3{1, 1, 1}.normalize());
            closestColor = spheres[i].color * lightIntensity;
        }
    }

    // Store the color in the output array
    colors[y * width + x] = closestColor;
}

// Host code
int main() {
    const int width = 800;
    const int height = 600;
    const int numSpheres = 32;

    // Initialize spheres on host
    Sphere* h_spheres = new Sphere[numSpheres];
    for (int i = 0; i < numSpheres; ++i) {
        h_spheres[i] = {{-1 + 2 * (i % 8) * 0.3f, -1 + 2 * (i / 8) * 0.3f, -3 + (i / 64) * 0.3f}, 0.1f, {1, 0, 0}};
        h_spheres[i].color = {static_cast<float>(rand()) / RAND_MAX, static_cast<float>(rand()) / RAND_MAX, static_cast<float>(rand()) / RAND_MAX};
    }

    // Allocate memory on device
    Sphere* d_spheres;
    Ray* d_rays;
    Vec3* d_colors;
    cudaMalloc(&d_spheres, numSpheres * sizeof(Sphere));
    cudaMalloc(&d_rays, width * height * sizeof(Ray));
    cudaMalloc(&d_colors, width * height * sizeof(Vec3));

    // Copy spheres to device
    cudaMemcpy(d_spheres, h_spheres, numSpheres * sizeof(Sphere), cudaMemcpyHostToDevice);

    // Define block and grid dimensions
    dim3 blockSize(16, 16);
    dim3 gridSize((width + blockSize.x - 1) / blockSize.x, (height + blockSize.y - 1) / blockSize.y);

    // Launch kernel
    raytraceKernel<<<gridSize, blockSize>>>(d_spheres, numSpheres, d_rays, d_colors, width, height);
    cudaDeviceSynchronize();

    // Check for errors
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Free device memory
    cudaFree(d_spheres);
    cudaFree(d_rays);
    cudaFree(d_colors);

    // Free host memory
    delete[] h_spheres;

    return 0;
}
	.file	"tmpxft_000c0aec_00000000-6_cuda_code_008924.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3645:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3645:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9intersectRK3RayRK6SphereRf
	.type	_Z9intersectRK3RayRK6SphereRf, @function
_Z9intersectRK3RayRK6SphereRf:
.LFB3641:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3641:
	.size	_Z9intersectRK3RayRK6SphereRf, .-_Z9intersectRK3RayRK6SphereRf
	.globl	_Z55__device_stub__Z14raytraceKernelPK6SphereiP3RayP4Vec3iiPK6SphereiP3RayP4Vec3ii
	.type	_Z55__device_stub__Z14raytraceKernelPK6SphereiP3RayP4Vec3iiPK6SphereiP3RayP4Vec3ii, @function
_Z55__device_stub__Z14raytraceKernelPK6SphereiP3RayP4Vec3iiPK6SphereiP3RayP4Vec3ii:
.LFB3667:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 32(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L4:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3667:
	.size	_Z55__device_stub__Z14raytraceKernelPK6SphereiP3RayP4Vec3iiPK6SphereiP3RayP4Vec3ii, .-_Z55__device_stub__Z14raytraceKernelPK6SphereiP3RayP4Vec3iiPK6SphereiP3RayP4Vec3ii
	.globl	_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii
	.type	_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii, @function
_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii:
.LFB3668:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z14raytraceKernelPK6SphereiP3RayP4Vec3iiPK6SphereiP3RayP4Vec3ii
	.cfi_endproc
.LFE3668:
	.size	_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii, .-_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC6:
	.string	"CUDA error: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3642:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$896, %edi
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movq	%rax, %rbp
	movq	%rax, %rbx
.L11:
	movl	%r12d, %eax
	movss	.LC1(%rip), %xmm1
	movl	$0xc0400000, 8(%rbx)
	addq	$28, %rbx
	andl	$7, %eax
	movl	$0x3dcccccd, -16(%rbx)
	addl	%eax, %eax
	movl	$0x00000000, -8(%rbx)
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movl	%r12d, %eax
	movl	$0x00000000, -4(%rbx)
	sarl	$3, %eax
	movss	%xmm1, -12(%rbx)
	incl	%r12d
	addl	%eax, %eax
	subss	%xmm1, %xmm0
	movss	%xmm0, -28(%rbx)
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	subss	%xmm1, %xmm0
	movss	%xmm0, -24(%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm1
	mulss	.LC5(%rip), %xmm1
	movss	%xmm1, 12(%rsp)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC5(%rip), %xmm0
	movss	%xmm0, 8(%rsp)
	call	rand@PLT
	movss	8(%rsp), %xmm0
	movss	12(%rsp), %xmm1
	movss	%xmm0, -8(%rbx)
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC5(%rip), %xmm0
	movss	%xmm1, -12(%rbx)
	movss	%xmm0, -4(%rbx)
	cmpl	$32, %r12d
	jne	.L11
	leaq	24(%rsp), %rdi
	movl	$896, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$11520000, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$5760000, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$896, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movabsq	$163208757298, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movl	$600, %r9d
	movl	$800, %r8d
	movq	24(%rsp), %rdi
	movl	$32, %esi
	call	_Z55__device_stub__Z14raytraceKernelPK6SphereiP3RayP4Vec3iiPK6SphereiP3RayP4Vec3ii
.L12:
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L13
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L10
.L13:
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	xorl	%eax, %eax
.L10:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3642:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3670:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3670:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1050253722
	.align 4
.LC1:
	.long	1065353216
	.align 4
.LC5:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

// Define a simple 3D vector structure
struct Vec3 {
    float x, y, z;
    __device__ Vec3 operator+(const Vec3& v) const { return Vec3{x + v.x, y + v.y, z + v.z}; }
    __device__ Vec3 operator-(const Vec3& v) const { return Vec3{x - v.x, y - v.y, z - v.z}; }
    __device__ Vec3 operator*(float f) const { return Vec3{x * f, y * f, z * f}; }
    __device__ float dot(const Vec3& v) const { return x * v.x + y * v.y + z * v.z; }
    __device__ Vec3 cross(const Vec3& v) const { return Vec3{y * v.z - z * v.y, z * v.x - x * v.z, x * v.y - y * v.x}; }
    __device__ Vec3 normalize() const {
        float len = sqrtf(x * x + y * y + z * z);
        return Vec3{x / len, y / len, z / len};
    }
};

// Define a simple sphere object
struct Sphere {
    Vec3 center;
    float radius;
    Vec3 color;
};

// Define a ray structure
struct Ray {
    Vec3 origin;
    Vec3 direction;
};

// Ray-sphere intersection function
__device__ bool intersect(const Ray& ray, const Sphere& sphere, float& t) {
    Vec3 oc = ray.origin - sphere.center;
    float a = ray.direction.dot(ray.direction);
    float b = 2.0f * oc.dot(ray.direction);
    float c = oc.dot(oc) - sphere.radius * sphere.radius;
    float discriminant = b * b - 4 * a * c;
    if (discriminant > 0) {
        float t0 = (-b - sqrtf(discriminant)) / (2.0f * a);
        float t1 = (-b + sqrtf(discriminant)) / (2.0f * a);
        t = t0 > 0 ? t0 : t1;
        return t > 0;
    }
    return false;
}

// Kernel function for ray tracing
__global__ void raytraceKernel(const Sphere* spheres, int numSpheres, Ray* rays, Vec3* colors, int width, int height) {
    int x = blockIdx.x * blockDim.x + threadIdx.x;
    int y = blockIdx.y * blockDim.y + threadIdx.y;
    if (x >= width || y >= height) return;

    // Calculate ray direction
    float u = float(x) / float(width);
    float v = float(y) / float(height);
    Vec3 direction = Vec3{2 * u - 1, 1 - 2 * v, -1}.normalize();
    Ray ray = {Vec3{0, 0, 0}, direction};

    // Find the nearest intersection
    float closestT = INFINITY;
    Vec3 closestColor = {0, 0, 0};
    for (int i = 0; i < numSpheres; ++i) {
        float t;
        if (intersect(ray, spheres[i], t) && t < closestT) {
            closestT = t;
            Vec3 hitPoint = ray.origin + ray.direction * t;
            Vec3 normal = (hitPoint - spheres[i].center).normalize();
            float lightIntensity = normal.dot(Vec3{1, 1, 1}.normalize());
            closestColor = spheres[i].color * lightIntensity;
        }
    }

    // Store the color in the output array
    colors[y * width + x] = closestColor;
}

// Host code
int main() {
    const int width = 800;
    const int height = 600;
    const int numSpheres = 32;

    // Initialize spheres on host
    Sphere* h_spheres = new Sphere[numSpheres];
    for (int i = 0; i < numSpheres; ++i) {
        h_spheres[i] = {{-1 + 2 * (i % 8) * 0.3f, -1 + 2 * (i / 8) * 0.3f, -3 + (i / 64) * 0.3f}, 0.1f, {1, 0, 0}};
        h_spheres[i].color = {static_cast<float>(rand()) / RAND_MAX, static_cast<float>(rand()) / RAND_MAX, static_cast<float>(rand()) / RAND_MAX};
    }

    // Allocate memory on device
    Sphere* d_spheres;
    Ray* d_rays;
    Vec3* d_colors;
    hipMalloc(&d_spheres, numSpheres * sizeof(Sphere));
    hipMalloc(&d_rays, width * height * sizeof(Ray));
    hipMalloc(&d_colors, width * height * sizeof(Vec3));

    // Copy spheres to device
    hipMemcpy(d_spheres, h_spheres, numSpheres * sizeof(Sphere), hipMemcpyHostToDevice);

    // Define block and grid dimensions
    dim3 blockSize(16, 16);
    dim3 gridSize((width + blockSize.x - 1) / blockSize.x, (height + blockSize.y - 1) / blockSize.y);

    // Launch kernel
    raytraceKernel<<<gridSize, blockSize>>>(d_spheres, numSpheres, d_rays, d_colors, width, height);
    hipDeviceSynchronize();

    // Check for errors
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Free device memory
    hipFree(d_spheres);
    hipFree(d_rays);
    hipFree(d_colors);

    // Free host memory
    delete[] h_spheres;

    return 0;
}
	.text
	.file	"cuda_code_008924.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z29__device_stub__raytraceKernelPK6SphereiP3RayP4Vec3ii # -- Begin function _Z29__device_stub__raytraceKernelPK6SphereiP3RayP4Vec3ii
	.type	_Z29__device_stub__raytraceKernelPK6SphereiP3RayP4Vec3ii,@function
_Z29__device_stub__raytraceKernelPK6SphereiP3RayP4Vec3ii: # @_Z29__device_stub__raytraceKernelPK6SphereiP3RayP4Vec3ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__raytraceKernelPK6SphereiP3RayP4Vec3ii, .Lfunc_end0-_Z29__device_stub__raytraceKernelPK6SphereiP3RayP4Vec3ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3e99999a                      # float 0.300000012
.LCPI1_1:
	.long	0xbf800000                      # float -1
.LCPI1_2:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$896, %edi                      # imm = 0x380
	callq	_Znam
	movq	%rax, %rbx
	movq	%rax, %r14
	addq	$24, %r14
	xorl	%r15d, %r15d
	movabsq	$4453159315628359680, %r12      # imm = 0x3DCCCCCDC0400000
	xorl	%r13d, %r13d
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%r15d, %eax
	andl	$14, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI1_0(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	mulss	%xmm2, %xmm0
	movss	.LCPI1_1(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	addss	%xmm3, %xmm0
	movl	%r13d, %eax
	shrl	$2, %eax
	andl	$6, %eax
	xorps	%xmm1, %xmm1
	cvtsi2ss	%eax, %xmm1
	mulss	%xmm2, %xmm1
	addss	%xmm3, %xmm1
	movss	%xmm0, -24(%r14)
	movss	%xmm1, -20(%r14)
	movq	%r12, -16(%r14)
	callq	rand
	xorps	%xmm1, %xmm1
	cvtsi2ss	%eax, %xmm1
	movss	.LCPI1_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm1
	movss	%xmm1, 12(%rsp)                 # 4-byte Spill
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_2(%rip), %xmm0
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_2(%rip), %xmm0
	movss	12(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, -8(%r14)
	movss	8(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, -4(%r14)
	movss	%xmm0, (%r14)
	incq	%r13
	addl	$2, %r15d
	addq	$28, %r14
	cmpq	$32, %r13
	jne	.LBB1_1
# %bb.2:
	leaq	32(%rsp), %r14
	movl	$896, %esi                      # imm = 0x380
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$11520000, %esi                 # imm = 0xAFC800
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$5760000, %esi                  # imm = 0x57E400
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$896, %edx                      # imm = 0x380
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$163208757298, %rdi             # imm = 0x2600000032
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	movl	$32, %esi
	movl	$800, %r8d                      # imm = 0x320
	movl	$600, %r9d                      # imm = 0x258
	callq	_Z29__device_stub__raytraceKernelPK6SphereiP3RayP4Vec3ii
.LBB1_4:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_9
# %bb.5:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_6
# %bb.7:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_8
.LBB1_9:
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	jmp	.LBB1_10
.LBB1_6:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_8:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB1_10:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii,@object # @_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii
	.section	.rodata,"a",@progbits
	.globl	_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii
	.p2align	3, 0x0
_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii:
	.quad	_Z29__device_stub__raytraceKernelPK6SphereiP3RayP4Vec3ii
	.size	_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii"
	.size	.L__unnamed_1, 42

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__raytraceKernelPK6SphereiP3RayP4Vec3ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14raytraceKernelPK6SphereiP3RayP4Vec3ii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii ; -- Begin function _Z14raytraceKernelPK6SphereiP3RayP4Vec3ii
	.globl	_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii
	.p2align	8
	.type	_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii,@function
_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii: ; @_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[8:9], s[0:1], 0x20
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[4:5], null, s15, s3, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s8, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s9, v4
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_9
; %bb.1:
	s_load_b32 s12, s[0:1], 0x8
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s12, 1
	s_cbranch_scc1 .LBB0_8
; %bb.2:                                ; %.lr.ph
	v_cvt_f32_i32_e32 v0, v3
	v_cvt_f32_i32_e32 v1, s8
	v_cvt_f32_i32_e32 v2, v4
	v_cvt_f32_i32_e32 v5, s9
	s_load_b64 s[4:5], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v6, null, v1, v1, v0
	v_div_scale_f32 v7, null, v5, v5, v2
	v_div_scale_f32 v12, vcc_lo, v0, v1, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v8, v6
	v_rcp_f32_e32 v9, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v10, -v6, v8, 1.0
	v_fma_f32 v11, -v7, v9, 1.0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s10, s4, 12
	s_addc_u32 s11, s5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v8, v10, v8 :: v_dual_fmac_f32 v9, v11, v9
	v_div_scale_f32 v10, s2, v2, v5, v2
	v_mul_f32_e32 v11, v12, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v14, -v6, v11, v12
	v_fmac_f32_e32 v11, v14, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v6, v11, v12
	v_div_fmas_f32 v6, v6, v8, v11
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v0, v6, v1, v0
	v_fma_f32 v0, v0, 2.0, -1.0
	v_mul_f32_e32 v13, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v15, -v7, v13, v10
	v_fmac_f32_e32 v13, v15, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, -v7, v13, v10
	v_div_fmas_f32 v7, v7, v9, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v2, v7, v5, v2
	v_fma_f32 v1, v2, -2.0, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v1, v1
	v_fmac_f32_e32 v2, v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, 1.0, v2
	v_mul_f32_e32 v5, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	v_sqrt_f32_e32 v5, v2
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v6, -1, v5
	v_add_nc_u32_e32 v7, 1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v8, -v6, v5, v2
	v_fma_f32 v9, -v7, v5, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v8
	v_cndmask_b32_e64 v5, v5, v6, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v9
	v_cndmask_b32_e64 v5, v5, v7, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, 0x37800000, v5
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v5, v2, vcc_lo
	v_div_scale_f32 v5, null, v2, v2, v0
	v_div_scale_f32 v6, null, v2, v2, v1
	v_div_scale_f32 v8, null, v2, v2, -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v7, v5
	v_rcp_f32_e32 v9, v6
	v_div_scale_f32 v12, vcc_lo, v0, v2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(TRANS32_DEP_3)
	v_rcp_f32_e32 v10, v8
	v_div_scale_f32 v14, s2, v1, v2, v1
	v_fma_f32 v11, -v5, v7, 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v6, v9, 1.0
	v_fmac_f32_e32 v7, v11, v7
	v_fma_f32 v11, -v8, v10, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v9, v13, v9
	v_div_scale_f32 v13, s3, -1.0, v2, -1.0
	v_dual_mul_f32 v15, v12, v7 :: v_dual_fmac_f32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v11, v14, v9
	v_fma_f32 v16, -v5, v15, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v17, v13, v10
	v_fma_f32 v18, -v6, v11, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v15, v16, v7
	v_fma_f32 v16, -v8, v17, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v11, v18, v9
	v_fma_f32 v5, -v5, v15, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v17, v16, v10
	v_fma_f32 v6, -v6, v11, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v7, v5, v7, v15
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f32 v5, v6, v9, v11
	v_fma_f32 v6, -v8, v17, v13
	s_mov_b32 vcc_lo, s3
	v_mov_b32_e32 v11, 0x7f800000
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v5, v5, v2, v1
	v_div_fmas_f32 v1, v6, v10, v17
	v_div_fixup_f32 v6, v7, v2, v0
	v_mov_b32_e32 v0, 0
                                        ; implicit-def: $vgpr10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v9, v5, v5
	v_div_fixup_f32 v7, v1, v2, -1.0
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v6, v6
	v_fmac_f32_e32 v9, v7, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v8, 4.0, v9
	v_add_f32_e32 v9, v9, v9
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_add_u32 s2, s10, -12
	s_addc_u32 s3, s11, -1
	s_load_b128 s[4:7], s[2:3], 0x0
	s_mov_b32 s2, 0
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e64 v12, 0, s4
	v_mul_f32_e64 v15, v5, -s5
	v_mul_f32_e64 v13, -s5, -s5
	v_sub_f32_e64 v14, 0, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v6, v12
	v_fmac_f32_e32 v15, v7, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v13, v12, v12 :: v_dual_add_f32 v12, v15, v15
	v_fmac_f32_e32 v13, v14, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v13, -s7, s7, v13
	v_mul_f32_e32 v13, v8, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v13, v12, v12, -v13
	v_cmpx_lt_f32_e32 0, v13
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v13
	v_mul_f32_e32 v10, 0x4f800000, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v13, v10, vcc_lo
	v_sqrt_f32_e32 v13, v10
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v15, 1, v13
	v_add_nc_u32_e32 v14, -1, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v17, -v15, v13, v10
	v_fma_f32 v16, -v14, v13, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v16
	v_cndmask_b32_e64 v13, v13, v14, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v17
	v_cndmask_b32_e64 v13, v13, v15, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v14, 0x37800000, v13
	v_cndmask_b32_e32 v13, v13, v14, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v10, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v13, v10, vcc_lo
	v_sub_f32_e64 v13, -v12, v10
	v_sub_f32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v12, null, v9, v9, v13
	v_div_scale_f32 v14, null, v9, v9, v10
	v_div_scale_f32 v19, vcc_lo, v13, v9, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v15, v12
	v_rcp_f32_e32 v16, v14
	s_waitcnt_depctr 0xfff
	v_fma_f32 v17, -v12, v15, 1.0
	v_fma_f32 v18, -v14, v16, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v15, v17, v15
	v_div_scale_f32 v17, s2, v10, v9, v10
	v_fmac_f32_e32 v16, v18, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v18, v19, v15
	v_mul_f32_e32 v20, v17, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v21, -v12, v18, v19
	v_fma_f32 v22, -v14, v20, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v18, v21, v15
	v_fmac_f32_e32 v20, v22, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, -v12, v18, v19
	v_fma_f32 v14, -v14, v20, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v12, v12, v15, v18
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f32 v14, v14, v16, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v12, v12, v9, v13
	v_div_fixup_f32 v10, v14, v9, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e32 vcc_lo, 0, v12
	v_cndmask_b32_e32 v10, v10, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_f32_e32 vcc_lo, 0, v10
	s_and_b32 s2, vcc_lo, exec_lo
.LBB0_5:                                ; %_Z9intersectRK3RayRK6SphereRf.exit
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_lt_f32_e32 vcc_lo, v10, v11
	s_and_b32 s2, s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_3 Depth=1
	v_fma_f32 v0, v5, v10, 0
	v_fma_f32 v1, v6, v10, 0
	v_fma_f32 v2, v7, v10, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_subrev_f32 v0, s5, v0 :: v_dual_subrev_f32 v1, s4, v1
	v_dual_subrev_f32 v2, s6, v2 :: v_dual_mul_f32 v11, v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v1, v1
	v_fmac_f32_e32 v11, v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v12, 0x4f800000, v11
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v11
	v_cndmask_b32_e32 v11, v11, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v12, v11
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v13, -1, v12
	v_add_nc_u32_e32 v14, 1, v12
	v_fma_f32 v15, -v13, v12, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v16, -v14, v12, v11
	v_cmp_ge_f32_e64 s2, 0, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v12, v12, v13, s2
	v_cmp_lt_f32_e64 s2, 0, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v12, v12, v14, s2
	v_mul_f32_e32 v13, 0x37800000, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v12, v13, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v11, 0x260
	v_cndmask_b32_e32 v11, v12, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_scale_f32 v12, null, v11, v11, v1
	v_div_scale_f32 v13, null, v11, v11, v0
	v_div_scale_f32 v15, null, v11, v11, v2
	v_rcp_f32_e32 v14, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v16, v13
	v_div_scale_f32 v21, s2, v0, v11, v0
	v_rcp_f32_e32 v17, v15
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fma_f32 v18, -v12, v14, 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v20, -v13, v16, 1.0
	v_fmac_f32_e32 v14, v18, v14
	v_fma_f32 v18, -v15, v17, 1.0
	v_dual_fmac_f32 v16, v20, v16 :: v_dual_fmac_f32 v17, v18, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v18, v21, v16
	v_div_scale_f32 v19, vcc_lo, v1, v11, v1
	v_div_scale_f32 v20, s3, v2, v11, v2
	v_fma_f32 v25, -v13, v18, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v22, v19, v14
	v_mul_f32_e32 v24, v20, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v18, v25, v16
	v_fma_f32 v23, -v12, v22, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v13, -v13, v18, v21
	v_fmac_f32_e32 v22, v23, v14
	v_fma_f32 v23, -v15, v24, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, -v12, v22, v19
	v_fmac_f32_e32 v24, v23, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v12, v12, v14, v22
	s_mov_b32 vcc_lo, s2
	v_fma_f32 v14, -v15, v24, v20
	v_div_fmas_f32 v13, v13, v16, v18
	s_clause 0x1
	s_load_b64 s[4:5], s[10:11], 0x4
	s_load_b32 s2, s[10:11], 0xc
	s_mov_b32 vcc_lo, s3
	v_div_fixup_f32 v1, v12, v11, v1
	v_div_fixup_f32 v0, v13, v11, v0
	v_div_fmas_f32 v13, v14, v17, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v12, 0x3f13cd3a, v0
	v_div_fixup_f32 v0, v13, v11, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v11, v10 :: v_dual_fmac_f32 v12, 0x3f13cd3a, v1
	v_fmac_f32_e32 v12, 0x3f13cd3a, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v1, s5, v12
	v_mul_f32_e32 v0, s4, v12
	v_mul_f32_e32 v2, s2, v12
.LBB0_7:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_add_i32 s12, s12, -1
	s_add_u32 s10, s10, 28
	s_addc_u32 s11, s11, 0
	s_cmp_eq_u32 s12, 0
	s_cbranch_scc0 .LBB0_3
.LBB0_8:                                ; %Flow116
	s_load_b64 s[0:1], s[0:1], 0x18
	v_mad_u64_u32 v[5:6], null, v4, s8, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_i64_i32 v[3:4], null, v5, 12, s[0:1]
	global_store_b96 v[3:4], v[0:2], off
.LBB0_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14raytraceKernelPK6SphereiP3RayP4Vec3ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii, .Lfunc_end0-_Z14raytraceKernelPK6SphereiP3RayP4Vec3ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1968
; NumSgprs: 18
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14raytraceKernelPK6SphereiP3RayP4Vec3ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14raytraceKernelPK6SphereiP3RayP4Vec3ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     26
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
