#include <iostream>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>

#define FILTER_SIZE 11
#define BLOCK_SIZE 16

// Kernel to apply median filter
__global__ void medianFilterKernel(const unsigned char* input, unsigned char* output, int width, int height) {
    __shared__ unsigned char sharedMem[BLOCK_SIZE + FILTER_SIZE - 1][BLOCK_SIZE + FILTER_SIZE - 1];

    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int bx = blockIdx.x;
    int by = blockIdx.y;

    int row = by * BLOCK_SIZE + ty;
    int col = bx * BLOCK_SIZE + tx;

    // Load data into shared memory with halo
    for (int i = 0; i < FILTER_SIZE; i++) {
        for (int j = 0; j < FILTER_SIZE; j++) {
            int sRow = row + i - FILTER_SIZE / 2;
            int sCol = col + j - FILTER_SIZE / 2;

            if (sRow >= 0 && sRow < height && sCol >= 0 && sCol < width) {
                sharedMem[ty + i][tx + j] = input[sRow * width + sCol];
            } else {
                sharedMem[ty + i][tx + j] = 0; // Boundary condition
            }
        }
    }
    __syncthreads();

    // Only threads within the block bounds compute the median
    if (row < height && col < width) {
        unsigned char window[FILTER_SIZE * FILTER_SIZE];
        int index = 0;

        // Collect the window of data
        for (int i = 0; i < FILTER_SIZE; i++) {
            for (int j = 0; j < FILTER_SIZE; j++) {
                window[index++] = sharedMem[ty + i][tx + j];
            }
        }

        // Sort the window to find the median
        for (int i = 0; i < FILTER_SIZE * FILTER_SIZE - 1; i++) {
            for (int j = 0; j < FILTER_SIZE * FILTER_SIZE - i - 1; j++) {
                if (window[j] > window[j + 1]) {
                    unsigned char temp = window[j];
                    window[j] = window[j + 1];
                    window[j + 1] = temp;
                }
            }
        }

        // Store the median value in the output
        output[row * width + col] = window[(FILTER_SIZE * FILTER_SIZE) / 2];
    }
}

int main() {
    const int width = 512;
    const int height = 512;
    const int size = width * height * sizeof(unsigned char);

    unsigned char* h_input = new unsigned char[size];
    unsigned char* h_output = new unsigned char[size];

    // Initialize input with some values
    for (int i = 0; i < height; i++) {
        for (int j = 0; j < width; j++) {
            h_input[i * width + j] = static_cast<unsigned char>(i + j);
        }
    }

    unsigned char* d_input;
    unsigned char* d_output;

    // Allocate device memory
    cudaError_t err = cudaMalloc((void**)&d_input, size);
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device memory for input: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    err = cudaMalloc((void**)&d_output, size);
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device memory for output: " << cudaGetErrorString(err) << std::endl;
        cudaFree(d_input);
        return -1;
    }

    // Copy input data to device
    err = cudaMemcpy(d_input, h_input, size, cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy input data to device: " << cudaGetErrorString(err) << std::endl;
        cudaFree(d_input);
        cudaFree(d_output);
        return -1;
    }

    // Set up execution configuration
    dim3 threadsPerBlock(BLOCK_SIZE, BLOCK_SIZE);
    dim3 blocksPerGrid((width + BLOCK_SIZE - 1) / BLOCK_SIZE, (height + BLOCK_SIZE - 1) / BLOCK_SIZE);

    // Launch kernel
    medianFilterKernel<<<blocksPerGrid, threadsPerBlock>>>(d_input, d_output, width, height);
    err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Kernel launch failed: " << cudaGetErrorString(err) << std::endl;
        cudaFree(d_input);
        cudaFree(d_output);
        return -1;
    }

    // Copy output data back to host
    err = cudaMemcpy(h_output, d_output, size, cudaMemcpyDeviceToHost);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy output data to host: " << cudaGetErrorString(err) << std::endl;
        cudaFree(d_input);
        cudaFree(d_output);
        return -1;
    }

    // Free device memory
    cudaFree(d_input);
    cudaFree(d_output);

    // Clean up host memory
    delete[] h_input;
    delete[] h_output;

    return 0;
}
	.file	"tmpxft_0018ee0a_00000000-6_cuda_code_034678.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4292:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4292:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z43__device_stub__Z18medianFilterKernelPKhPhiiPKhPhii
	.type	_Z43__device_stub__Z18medianFilterKernelPKhPhiiPKhPhii, @function
_Z43__device_stub__Z18medianFilterKernelPKhPhiiPKhPhii:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z18medianFilterKernelPKhPhii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L3:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z43__device_stub__Z18medianFilterKernelPKhPhiiPKhPhii, .-_Z43__device_stub__Z18medianFilterKernelPKhPhiiPKhPhii
	.globl	_Z18medianFilterKernelPKhPhii
	.type	_Z18medianFilterKernelPKhPhii, @function
_Z18medianFilterKernelPKhPhii:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z18medianFilterKernelPKhPhiiPKhPhii
	.cfi_endproc
.LFE3661:
	.size	_Z18medianFilterKernelPKhPhii, .-_Z18medianFilterKernelPKhPhii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Failed to allocate device memory for input: "
.LC1:
	.string	"Failed to allocate device memory for output: "
.LC2:
	.string	"Failed to copy input data to device: "
.LC3:
	.string	"Kernel launch failed: "
.LC4:
	.string	"Failed to copy output data to host: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$262144, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$262144, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movq	%rbx, %rcx
	xorl	%edx, %edx
	movq	%rax, %rbp
.L10:
	xorl	%eax, %eax
.L11:
	leal	(%rax,%rdx), %esi
	movb	%sil, (%rcx,%rax)
	incq	%rax
	cmpq	$512, %rax
	jne	.L11
	incl	%edx
	addq	$512, %rcx
	cmpl	$512, %edx
	jne	.L10
	movq	%rsp, %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L13
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L14
.L13:
	leaq	8(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L15
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
.L24:
	call	cudaFree@PLT
.L14:
	orl	$-1, %eax
	jmp	.L9
.L15:
	movq	(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	leaq	.LC2(%rip), %rsi
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L25
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$68719476752, %rdx
	movabsq	$137438953504, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$512, %ecx
	movl	$512, %edx
	call	_Z43__device_stub__Z18medianFilterKernelPKhPhiiPKhPhii
.L18:
	call	cudaGetLastError@PLT
	leaq	.LC3(%rip), %rsi
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L25
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$262144, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L20
	leaq	.LC4(%rip), %rsi
.L25:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	jmp	.L24
.L20:
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	xorl	%eax, %eax
.L9:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z18medianFilterKernelPKhPhii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18medianFilterKernelPKhPhii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>


#define FILTER_SIZE 11
#define BLOCK_SIZE 16

// Kernel to apply median filter
__global__ void medianFilterKernel(const unsigned char* input, unsigned char* output, int width, int height) {
    __shared__ unsigned char sharedMem[BLOCK_SIZE + FILTER_SIZE - 1][BLOCK_SIZE + FILTER_SIZE - 1];

    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int bx = blockIdx.x;
    int by = blockIdx.y;

    int row = by * BLOCK_SIZE + ty;
    int col = bx * BLOCK_SIZE + tx;

    // Load data into shared memory with halo
    for (int i = 0; i < FILTER_SIZE; i++) {
        for (int j = 0; j < FILTER_SIZE; j++) {
            int sRow = row + i - FILTER_SIZE / 2;
            int sCol = col + j - FILTER_SIZE / 2;

            if (sRow >= 0 && sRow < height && sCol >= 0 && sCol < width) {
                sharedMem[ty + i][tx + j] = input[sRow * width + sCol];
            } else {
                sharedMem[ty + i][tx + j] = 0; // Boundary condition
            }
        }
    }
    __syncthreads();

    // Only threads within the block bounds compute the median
    if (row < height && col < width) {
        unsigned char window[FILTER_SIZE * FILTER_SIZE];
        int index = 0;

        // Collect the window of data
        for (int i = 0; i < FILTER_SIZE; i++) {
            for (int j = 0; j < FILTER_SIZE; j++) {
                window[index++] = sharedMem[ty + i][tx + j];
            }
        }

        // Sort the window to find the median
        for (int i = 0; i < FILTER_SIZE * FILTER_SIZE - 1; i++) {
            for (int j = 0; j < FILTER_SIZE * FILTER_SIZE - i - 1; j++) {
                if (window[j] > window[j + 1]) {
                    unsigned char temp = window[j];
                    window[j] = window[j + 1];
                    window[j + 1] = temp;
                }
            }
        }

        // Store the median value in the output
        output[row * width + col] = window[(FILTER_SIZE * FILTER_SIZE) / 2];
    }
}

int main() {
    const int width = 512;
    const int height = 512;
    const int size = width * height * sizeof(unsigned char);

    unsigned char* h_input = new unsigned char[size];
    unsigned char* h_output = new unsigned char[size];

    // Initialize input with some values
    for (int i = 0; i < height; i++) {
        for (int j = 0; j < width; j++) {
            h_input[i * width + j] = static_cast<unsigned char>(i + j);
        }
    }

    unsigned char* d_input;
    unsigned char* d_output;

    // Allocate device memory
    hipError_t err = hipMalloc((void**)&d_input, size);
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device memory for input: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    err = hipMalloc((void**)&d_output, size);
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device memory for output: " << hipGetErrorString(err) << std::endl;
        hipFree(d_input);
        return -1;
    }

    // Copy input data to device
    err = hipMemcpy(d_input, h_input, size, hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy input data to device: " << hipGetErrorString(err) << std::endl;
        hipFree(d_input);
        hipFree(d_output);
        return -1;
    }

    // Set up execution configuration
    dim3 threadsPerBlock(BLOCK_SIZE, BLOCK_SIZE);
    dim3 blocksPerGrid((width + BLOCK_SIZE - 1) / BLOCK_SIZE, (height + BLOCK_SIZE - 1) / BLOCK_SIZE);

    // Launch kernel
    medianFilterKernel<<<blocksPerGrid, threadsPerBlock>>>(d_input, d_output, width, height);
    err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Kernel launch failed: " << hipGetErrorString(err) << std::endl;
        hipFree(d_input);
        hipFree(d_output);
        return -1;
    }

    // Copy output data back to host
    err = hipMemcpy(h_output, d_output, size, hipMemcpyDeviceToHost);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy output data to host: " << hipGetErrorString(err) << std::endl;
        hipFree(d_input);
        hipFree(d_output);
        return -1;
    }

    // Free device memory
    hipFree(d_input);
    hipFree(d_output);

    // Clean up host memory
    delete[] h_input;
    delete[] h_output;

    return 0;
}
	.text
	.file	"cuda_code_034678.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__medianFilterKernelPKhPhii # -- Begin function _Z33__device_stub__medianFilterKernelPKhPhii
	.type	_Z33__device_stub__medianFilterKernelPKhPhii,@function
_Z33__device_stub__medianFilterKernelPKhPhii: # @_Z33__device_stub__medianFilterKernelPKhPhii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18medianFilterKernelPKhPhii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__medianFilterKernelPKhPhii, .Lfunc_end0-_Z33__device_stub__medianFilterKernelPKhPhii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	$262144, %edi                   # imm = 0x40000
	callq	_Znam
	movq	%rax, %rbx
	movl	$262144, %edi                   # imm = 0x40000
	callq	_Znam
	movq	%rax, %r14
	xorl	%eax, %eax
	movl	$512, %ecx                      # imm = 0x200
	movq	%rbx, %rdx
.LBB1_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorl	%esi, %esi
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rax,%rsi), %edi
	movb	%dil, (%rdx,%rsi)
	incq	%rsi
	cmpq	$512, %rsi                      # imm = 0x200
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%rax
	addq	%rcx, %rdx
	cmpq	%rcx, %rax
	jne	.LBB1_1
# %bb.4:
	movq	%rsp, %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_7
# %bb.5:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$44, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_10
# %bb.6:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_11
.LBB1_7:
	leaq	8(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_12
# %bb.8:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_14
# %bb.9:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_15
.LBB1_10:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_11:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	jmp	.LBB1_26
.LBB1_12:
	movq	(%rsp), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_16
# %bb.13:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	movl	$37, %edx
	jmp	.LBB1_20
.LBB1_14:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_15:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit42
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rdi
	jmp	.LBB1_25
.LBB1_16:
	movabsq	$137438953504, %rdi             # imm = 0x2000000020
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_18
# %bb.17:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	movl	$512, %ecx                      # imm = 0x200
	callq	_Z33__device_stub__medianFilterKernelPKhPhii
.LBB1_18:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_28
# %bb.19:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$22, %edx
.LBB1_20:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_22
# %bb.21:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_23
.LBB1_22:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_23:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit44
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_24:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
.LBB1_25:
	callq	hipFree
.LBB1_26:
	movl	$-1, %eax
.LBB1_27:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_28:
	.cfi_def_cfa_offset 48
	movq	8(%rsp), %rsi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_30
# %bb.29:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.4, %esi
	movl	$36, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	movl	$_ZSt4cerr, %edi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	jmp	.LBB1_24
.LBB1_30:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	jmp	.LBB1_27
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18medianFilterKernelPKhPhii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18medianFilterKernelPKhPhii,@object # @_Z18medianFilterKernelPKhPhii
	.section	.rodata,"a",@progbits
	.globl	_Z18medianFilterKernelPKhPhii
	.p2align	3, 0x0
_Z18medianFilterKernelPKhPhii:
	.quad	_Z33__device_stub__medianFilterKernelPKhPhii
	.size	_Z18medianFilterKernelPKhPhii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to allocate device memory for input: "
	.size	.L.str, 45

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Failed to allocate device memory for output: "
	.size	.L.str.1, 46

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to copy input data to device: "
	.size	.L.str.2, 38

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Kernel launch failed: "
	.size	.L.str.3, 23

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to copy output data to host: "
	.size	.L.str.4, 37

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18medianFilterKernelPKhPhii"
	.size	.L__unnamed_1, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__medianFilterKernelPKhPhii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18medianFilterKernelPKhPhii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18medianFilterKernelPKhPhii ; -- Begin function _Z18medianFilterKernelPKhPhii
	.globl	_Z18medianFilterKernelPKhPhii
	.p2align	8
	.type	_Z18medianFilterKernelPKhPhii,@function
_Z18medianFilterKernelPKhPhii:          ; @_Z18medianFilterKernelPKhPhii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u32_u24 v2, v1, 26, v0
	v_lshl_add_u32 v1, s15, 4, v1
	v_mov_b32_e32 v3, v2
	v_lshl_add_u32 v0, s14, 4, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s3, s4, -5
	s_addc_u32 s4, s5, -1
	s_mov_b32 s5, 0
.LBB0_1:                                ; %.preheader77
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_2 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, s5, v1
	s_mov_b32 s10, 0
	v_add_nc_u32_e32 v6, -5, v5
	v_cmp_lt_i32_e32 vcc_lo, 4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v6, s8
	v_cmp_gt_i32_e64 s0, s9, v6
	v_ashrrev_i32_e32 v5, 31, v4
.LBB0_2:                                ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v6, 0
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB0_6
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=2
	v_add_nc_u32_e32 v7, s10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, -5, v7
	v_cmp_gt_i32_e64 s2, s8, v6
	v_mov_b32_e32 v6, 0
	v_cmp_lt_i32_e64 s1, 4, v7
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=2
	v_ashrrev_i32_e32 v6, 31, v7
	v_add_co_u32 v7, s1, v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v8, s1, v6, v5, s1
	v_add_co_u32 v6, s1, s3, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s1, s4, v8, s1
	global_load_u8 v6, v[6:7], off
.LBB0_5:                                ; %Flow130
                                        ;   in Loop: Header=BB0_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v7, s10, v3
	s_add_i32 s10, s10, 1
	s_cmp_eq_u32 s10, 11
	s_waitcnt vmcnt(0)
	ds_store_b8 v7, v6
	s_cbranch_scc0 .LBB0_2
; %bb.7:                                ;   in Loop: Header=BB0_1 Depth=1
	v_add_nc_u32_e32 v3, 26, v3
	s_add_i32 s5, s5, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, 11
	s_cbranch_scc0 .LBB0_1
; %bb.8:
	v_cmp_gt_i32_e32 vcc_lo, s9, v1
	v_cmp_gt_i32_e64 s0, s8, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_20
; %bb.9:
	s_mov_b32 s0, 0
	s_mov_b32 s1, 0
.LBB0_10:                               ; %.preheader76
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_11 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e64 v3, s1, 16
	s_mov_b32 s2, 0
.LBB0_11:                               ;   Parent Loop BB0_10 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, s2, v2
	v_add_nc_u32_e32 v5, s2, v3
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, 11
	ds_load_u8 v4, v4
	s_waitcnt lgkmcnt(0)
	scratch_store_b8 v5, v4, off
	s_cbranch_scc0 .LBB0_11
; %bb.12:                               ;   in Loop: Header=BB0_10 Depth=1
	v_add_nc_u32_e32 v2, 26, v2
	s_add_i32 s0, s0, 1
	s_add_i32 s1, s1, s2
	s_cmp_lg_u32 s0, 11
	s_cbranch_scc1 .LBB0_10
; %bb.13:                               ; %.preheader.preheader
	s_mov_b32 s0, 0
.LBB0_14:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_15 Depth 2
	scratch_load_u8 v2, off, off offset:16
	s_sub_i32 s1, 0x78, s0
	s_mov_b32 s2, 0
.LBB0_15:                               ; %.lr.ph
                                        ;   Parent Loop BB0_14 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_nc_u32_e64 v5, s2, 16
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v6, 0xff, v2
	s_mov_b32 s3, exec_lo
	v_add_nc_u32_e32 v4, 1, v5
	scratch_load_u8 v3, v4, off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_u16_e64 v6, v3
; %bb.16:                               ;   in Loop: Header=BB0_15 Depth=2
	s_clause 0x1
	scratch_store_b8 v5, v3, off
	scratch_store_b8 v4, v2, off
	v_mov_b32_e32 v3, v2
; %bb.17:                               ;   in Loop: Header=BB0_15 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v2, v3
	s_add_i32 s2, s2, 1
	s_cmp_ge_u32 s2, s1
	s_cbranch_scc0 .LBB0_15
; %bb.18:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_14 Depth=1
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s0, 0x78
	s_cbranch_scc0 .LBB0_14
; %bb.19:
	scratch_load_u8 v4, off, off offset:76
	v_mad_u64_u32 v[2:3], null, v1, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v2
	v_add_co_u32 v0, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b8 v[0:1], v4, off
.LBB0_20:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18medianFilterKernelPKhPhii
		.amdhsa_group_segment_fixed_size 676
		.amdhsa_private_segment_fixed_size 144
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18medianFilterKernelPKhPhii, .Lfunc_end0-_Z18medianFilterKernelPKhPhii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 640
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 144
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 676 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 676
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18medianFilterKernelPKhPhii
    .private_segment_fixed_size: 144
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18medianFilterKernelPKhPhii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
