#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>

namespace cg = cooperative_groups;

#define NUM_NODES 2048
#define INF (1 << 30)

// Kernel to compute SSSP using Bellman-Ford algorithm with cooperative groups
__global__ void ssspKernel(int *dist, int *graph, int *weights, int *updated) {
    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    int step = blockDim.x * gridDim.x;

    // Shared memory for distance values
    extern __shared__ int s_dist[];

    // Load distance values into shared memory
    for (int i = tid; i < NUM_NODES; i += step) {
        s_dist[i] = dist[i];
    }
    __syncthreads();

    // Bellman-Ford relaxation step
    for (int i = tid; i < NUM_NODES * NUM_NODES; i += step) {
        int src = i / NUM_NODES;
        int dst = i % NUM_NODES;
        int weight = graph[i];

        if (weight != 0 && s_dist[src] != INF && s_dist[src] + weight < s_dist[dst]) {
            s_dist[dst] = s_dist[src] + weight;
            atomicExch(updated, 1);
        }
    }
    __syncthreads();

    // Write back to global memory
    for (int i = tid; i < NUM_NODES; i += step) {
        dist[i] = s_dist[i];
    }
}

int main() {
    // Initialize graph and distances
    int *h_graph = new int[NUM_NODES * NUM_NODES];
    int *h_weights = new int[NUM_NODES * NUM_NODES];
    int *h_dist = new int[NUM_NODES];
    int *h_updated = new int[1];

    // Randomly initialize graph and weights (simplified for demonstration)
    for (int i = 0; i < NUM_NODES; ++i) {
        h_dist[i] = (i == 0) ? 0 : INF;
    }
    for (int i = 0; i < NUM_NODES * NUM_NODES; ++i) {
        h_graph[i] = (rand() % 10 < 2) ? 1 : 0; // Randomly set edges
        h_weights[i] = (h_graph[i]) ? (rand() % 10 + 1) : 0; // Random weights for edges
    }

    // Allocate device memory
    int *d_graph, *d_weights, *d_dist, *d_updated;
    cudaMalloc(&d_graph, NUM_NODES * NUM_NODES * sizeof(int));
    cudaMalloc(&d_weights, NUM_NODES * NUM_NODES * sizeof(int));
    cudaMalloc(&d_dist, NUM_NODES * sizeof(int));
    cudaMalloc(&d_updated, sizeof(int));

    // Copy data to device
    cudaMemcpy(d_graph, h_graph, NUM_NODES * NUM_NODES * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_weights, h_weights, NUM_NODES * NUM_NODES * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_dist, h_dist, NUM_NODES * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_updated, h_updated, sizeof(int), cudaMemcpyHostToDevice);

    // Launch kernel
    int numBlocks = 256;
    int numThreads = 256;
    int sharedMemSize = NUM_NODES * sizeof(int);

    do {
        cudaMemcpy(d_updated, h_updated, sizeof(int), cudaMemcpyHostToDevice);
        ssspKernel<<<numBlocks, numThreads, sharedMemSize>>>(d_dist, d_graph, d_weights, d_updated);
        cudaDeviceSynchronize();
        cudaMemcpy(h_updated, d_updated, sizeof(int), cudaMemcpyDeviceToHost);
    } while (*h_updated);

    // Copy result back to host
    cudaMemcpy(h_dist, d_dist, NUM_NODES * sizeof(int), cudaMemcpyDeviceToHost);

    // Output results
    std::cout << "Shortest distances from node 0:" << std::endl;
    for (int i = 0; i < NUM_NODES; ++i) {
        std::cout << "Node " << i << ": " << h_dist[i] << std::endl;
    }

    // Free memory
    delete[] h_graph;
    delete[] h_weights;
    delete[] h_dist;
    delete[] h_updated;
    cudaFree(d_graph);
    cudaFree(d_weights);
    cudaFree(d_dist);
    cudaFree(d_updated);

    return 0;
}
	.file	"tmpxft_000fe118_00000000-6_cuda_code_009320.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6835:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6835:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z36__device_stub__Z10ssspKernelPiS_S_S_PiS_S_S_
	.type	_Z36__device_stub__Z10ssspKernelPiS_S_S_PiS_S_S_, @function
_Z36__device_stub__Z10ssspKernelPiS_S_S_PiS_S_S_:
.LFB6857:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10ssspKernelPiS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6857:
	.size	_Z36__device_stub__Z10ssspKernelPiS_S_S_PiS_S_S_, .-_Z36__device_stub__Z10ssspKernelPiS_S_S_PiS_S_S_
	.globl	_Z10ssspKernelPiS_S_S_
	.type	_Z10ssspKernelPiS_S_S_, @function
_Z10ssspKernelPiS_S_S_:
.LFB6858:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z10ssspKernelPiS_S_S_PiS_S_S_
	.cfi_endproc
.LFE6858:
	.size	_Z10ssspKernelPiS_S_S_, .-_Z10ssspKernelPiS_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Shortest distances from node 0:"
.LC1:
	.string	"Node "
.LC2:
	.string	": "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6832:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$16777216, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$16777216, %edi
	movq	%rax, %r13
	call	_Znam@PLT
	movl	$8192, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$4, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movq	%rax, %rbx
	xorl	%eax, %eax
.L9:
	xorl	%edx, %edx
	testl	%eax, %eax
	setne	%dl
	sall	$30, %edx
	movl	%edx, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$2048, %rax
	jne	.L9
	xorl	%r14d, %r14d
	movl	$10, %r15d
.L11:
	call	rand@PLT
	cltd
	idivl	%r15d
	xorl	%eax, %eax
	decl	%edx
	setle	%dl
	movzbl	%dl, %edx
	movl	%edx, 0(%r13,%r14)
	jg	.L10
	call	rand@PLT
	cltd
	idivl	%r15d
	leal	1(%rdx), %eax
.L10:
	movl	%eax, (%r12,%r14)
	addq	$4, %r14
	cmpq	$16777216, %r14
	jne	.L11
	movq	%rsp, %rdi
	movl	$16777216, %esi
	movabsq	$4294967552, %r14
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$16777216, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$8192, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$16777216, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$16777216, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$8192, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
.L13:
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$4, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	movq	%r14, %rdx
	movl	$1, %ecx
	movl	$8192, %r8d
	movq	%r14, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	24(%rsp), %rcx
	movq	8(%rsp), %rdx
	movq	(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z36__device_stub__Z10ssspKernelPiS_S_S_PiS_S_S_
.L12:
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	cmpl	$0, (%rbx)
	jne	.L13
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	xorl	%r14d, %r14d
	movl	$8192, %edx
	leaq	.LC1(%rip), %r15
	call	cudaMemcpy@PLT
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L14:
	movq	%r15, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	0(%rbp,%r14,4), %esi
	incq	%r14
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpq	$2048, %r14
	jne	.L14
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6832:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z10ssspKernelPiS_S_S_"
.LC4:
	.string	"_ZN50_INTERNAL_37cff752_19_cuda_code_009320_cu_d2ccf2dc4cuda3std3__419piecewise_constructE"
.LC5:
	.string	"_ZN50_INTERNAL_37cff752_19_cuda_code_009320_cu_d2ccf2dc4cuda3std6ranges3__45__cpo4swapE"
.LC6:
	.string	"_ZN50_INTERNAL_37cff752_19_cuda_code_009320_cu_d2ccf2dc4cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6860:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10ssspKernelPiS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6860:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>

namespace cg = cooperative_groups;

#define NUM_NODES 2048
#define INF (1 << 30)

// Kernel to compute SSSP using Bellman-Ford algorithm with cooperative groups
__global__ void ssspKernel(int *dist, int *graph, int *weights, int *updated) {
    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    int step = blockDim.x * gridDim.x;

    // Shared memory for distance values
    extern __shared__ int s_dist[];

    // Load distance values into shared memory
    for (int i = tid; i < NUM_NODES; i += step) {
        s_dist[i] = dist[i];
    }
    __syncthreads();

    // Bellman-Ford relaxation step
    for (int i = tid; i < NUM_NODES * NUM_NODES; i += step) {
        int src = i / NUM_NODES;
        int dst = i % NUM_NODES;
        int weight = graph[i];

        if (weight != 0 && s_dist[src] != INF && s_dist[src] + weight < s_dist[dst]) {
            s_dist[dst] = s_dist[src] + weight;
            atomicExch(updated, 1);
        }
    }
    __syncthreads();

    // Write back to global memory
    for (int i = tid; i < NUM_NODES; i += step) {
        dist[i] = s_dist[i];
    }
}

int main() {
    // Initialize graph and distances
    int *h_graph = new int[NUM_NODES * NUM_NODES];
    int *h_weights = new int[NUM_NODES * NUM_NODES];
    int *h_dist = new int[NUM_NODES];
    int *h_updated = new int[1];

    // Randomly initialize graph and weights (simplified for demonstration)
    for (int i = 0; i < NUM_NODES; ++i) {
        h_dist[i] = (i == 0) ? 0 : INF;
    }
    for (int i = 0; i < NUM_NODES * NUM_NODES; ++i) {
        h_graph[i] = (rand() % 10 < 2) ? 1 : 0; // Randomly set edges
        h_weights[i] = (h_graph[i]) ? (rand() % 10 + 1) : 0; // Random weights for edges
    }

    // Allocate device memory
    int *d_graph, *d_weights, *d_dist, *d_updated;
    hipMalloc(&d_graph, NUM_NODES * NUM_NODES * sizeof(int));
    hipMalloc(&d_weights, NUM_NODES * NUM_NODES * sizeof(int));
    hipMalloc(&d_dist, NUM_NODES * sizeof(int));
    hipMalloc(&d_updated, sizeof(int));

    // Copy data to device
    hipMemcpy(d_graph, h_graph, NUM_NODES * NUM_NODES * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_weights, h_weights, NUM_NODES * NUM_NODES * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_dist, h_dist, NUM_NODES * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_updated, h_updated, sizeof(int), hipMemcpyHostToDevice);

    // Launch kernel
    int numBlocks = 256;
    int numThreads = 256;
    int sharedMemSize = NUM_NODES * sizeof(int);

    do {
        hipMemcpy(d_updated, h_updated, sizeof(int), hipMemcpyHostToDevice);
        ssspKernel<<<numBlocks, numThreads, sharedMemSize>>>(d_dist, d_graph, d_weights, d_updated);
        hipDeviceSynchronize();
        hipMemcpy(h_updated, d_updated, sizeof(int), hipMemcpyDeviceToHost);
    } while (*h_updated);

    // Copy result back to host
    hipMemcpy(h_dist, d_dist, NUM_NODES * sizeof(int), hipMemcpyDeviceToHost);

    // Output results
    std::cout << "Shortest distances from node 0:" << std::endl;
    for (int i = 0; i < NUM_NODES; ++i) {
        std::cout << "Node " << i << ": " << h_dist[i] << std::endl;
    }

    // Free memory
    delete[] h_graph;
    delete[] h_weights;
    delete[] h_dist;
    delete[] h_updated;
    hipFree(d_graph);
    hipFree(d_weights);
    hipFree(d_dist);
    hipFree(d_updated);

    return 0;
}
	.text
	.file	"cuda_code_009320.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z25__device_stub__ssspKernelPiS_S_S_ # -- Begin function _Z25__device_stub__ssspKernelPiS_S_S_
	.type	_Z25__device_stub__ssspKernelPiS_S_S_,@function
_Z25__device_stub__ssspKernelPiS_S_S_:  # @_Z25__device_stub__ssspKernelPiS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10ssspKernelPiS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__ssspKernelPiS_S_S_, .Lfunc_end0-_Z25__device_stub__ssspKernelPiS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	_Znam
	movq	%rax, %rbx
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	_Znam
	movq	%rax, %r14
	movl	$8192, %edi                     # imm = 0x2000
	callq	_Znam
	movq	%rax, %r15
	movl	$4, %edi
	callq	_Znam
	movq	%rax, %r12
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	xorl	%ecx, %ecx
	testq	%rax, %rax
	setne	%cl
	shll	$30, %ecx
	movl	%ecx, (%r15,%rax,4)
	incq	%rax
	cmpq	$2048, %rax                     # imm = 0x800
	jne	.LBB1_1
# %bb.2:                                # %.preheader.preheader
	xorl	%r13d, %r13d
.LBB1_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movslq	%eax, %rcx
	imulq	$1717986919, %rcx, %rax         # imm = 0x66666667
	movq	%rax, %rdx
	shrq	$63, %rdx
	sarq	$34, %rax
	addl	%edx, %eax
	addl	%eax, %eax
	leal	(%rax,%rax,4), %eax
	subl	%eax, %ecx
	xorl	%edx, %edx
	movl	$0, %eax
	cmpl	$2, %ecx
	setl	%dl
	movl	%edx, (%rbx,%r13,4)
	jge	.LBB1_5
# %bb.4:                                #   in Loop: Header=BB1_3 Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
.LBB1_5:                                #   in Loop: Header=BB1_3 Depth=1
	movl	%eax, (%r14,%r13,4)
	incq	%r13
	cmpq	$4194304, %r13                  # imm = 0x400000
	jne	.LBB1_3
# %bb.6:
	movabsq	$4294967552, %r13               # imm = 0x100000100
	leaq	32(%rsp), %rbp
	movl	$16777216, %esi                 # imm = 0x1000000
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$16777216, %esi                 # imm = 0x1000000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$8192, %esi                     # imm = 0x2000
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movl	$8192, %edx                     # imm = 0x2000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	movl	$4, %edx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.LBB1_7:                                # =>This Inner Loop Header: Depth=1
	movq	8(%rsp), %rdi
	movl	$4, %edx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$8192, %r8d                     # imm = 0x2000
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:                                #   in Loop: Header=BB1_7 Depth=1
	movq	16(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	8(%rsp), %rcx
	callq	_Z25__device_stub__ssspKernelPiS_S_S_
.LBB1_9:                                #   in Loop: Header=BB1_7 Depth=1
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movl	$4, %edx
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$0, (%r12)
	jne	.LBB1_7
# %bb.10:
	movq	16(%rsp), %rsi
	movl	$8192, %edx                     # imm = 0x2000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %r13d
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%r13d, %r13d
.LBB1_11:                               # =>This Inner Loop Header: Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r13d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbp
	movl	$.L.str.2, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%r15,%r13,4), %esi
	movq	%rbp, %rdi
	callq	_ZNSolsEi
	movq	%rax, %rbp
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbp, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbp, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r13
	cmpq	$2048, %r13                     # imm = 0x800
	jne	.LBB1_11
# %bb.12:
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	%r12, %rdi
	callq	_ZdaPv
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10ssspKernelPiS_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10ssspKernelPiS_S_S_,@object  # @_Z10ssspKernelPiS_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z10ssspKernelPiS_S_S_
	.p2align	3, 0x0
_Z10ssspKernelPiS_S_S_:
	.quad	_Z25__device_stub__ssspKernelPiS_S_S_
	.size	_Z10ssspKernelPiS_S_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Shortest distances from node 0:"
	.size	.L.str, 32

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Node "
	.size	.L.str.1, 6

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	": "
	.size	.L.str.2, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10ssspKernelPiS_S_S_"
	.size	.L__unnamed_1, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__ssspKernelPiS_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10ssspKernelPiS_S_S_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10ssspKernelPiS_S_S_  ; -- Begin function _Z10ssspKernelPiS_S_S_
	.globl	_Z10ssspKernelPiS_S_S_
	.p2align	8
	.type	_Z10ssspKernelPiS_S_S_,@function
_Z10ssspKernelPiS_S_S_:                 ; @_Z10ssspKernelPiS_S_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mul_i32 s8, s3, s2
	v_cmp_gt_i32_e32 vcc_lo, 0x800, v1
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshl_add_u32 v0, v1, 2, 0
	s_and_saveexec_b32 s12, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_lshl_add_u32 v5, v1, 2, 0
	v_mov_b32_e32 v6, v1
	s_ashr_i32 s9, s8, 31
	s_lshl_b32 s13, s8, 2
	s_lshl_b64 s[10:11], s[8:9], 2
	v_add_co_u32 v3, s2, s4, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s2, s5, v4, s2
	s_mov_b32 s9, 0
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v7, v[3:4], off
	v_add_nc_u32_e32 v6, s8, v6
	v_add_co_u32 v3, s2, v3, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v4, s2, s11, v4, s2
	v_cmp_lt_i32_e64 s3, 0x7ff, v6
	s_delay_alu instid0(VALU_DEP_1)
	s_or_b32 s9, s3, s9
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v7
	v_add_nc_u32_e32 v5, s13, v5
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow77
	s_or_b32 exec_lo, exec_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s9, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e32 0x400000, v1
	s_cbranch_execz .LBB0_10
; %bb.4:                                ; %.lr.ph43.preheader
	s_load_b64 s[2:3], s[0:1], 0x18
	v_lshl_add_u32 v5, v1, 2, 0
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v7, 1
	v_mov_b32_e32 v3, v1
	s_mov_b32 s1, 0
	s_lshl_b32 s10, s8, 2
.LBB0_5:                                ; %.lr.ph43
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	s_mov_b32 s11, exec_lo
	v_lshlrev_b64 v[8:9], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s0, s6, v8
	v_add_co_ci_u32_e64 v9, s0, s7, v9, s0
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 0, v8
	s_cbranch_execz .LBB0_9
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	v_lshrrev_b32_e32 v4, 21, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v3, v4
	v_ashrrev_i32_e32 v9, 11, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v4, v9, 2, 0
	ds_load_b32 v4, v4
	s_waitcnt lgkmcnt(0)
	v_cmp_ne_u32_e64 s0, 2.0, v4
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_9
; %bb.7:                                ;   in Loop: Header=BB0_5 Depth=1
	v_mul_i32_i24_e32 v9, 0x800, v9
	v_add_nc_u32_e32 v4, v4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v9, 2, v9
	v_sub_nc_u32_e32 v10, v5, v9
	ds_load_b32 v10, v10
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e64 s0, v4, v10
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_5 Depth=1
	v_sub_nc_u32_e32 v8, 0, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v5, v8
	ds_store_b32 v8, v4
	global_atomic_swap_b32 v6, v7, s[2:3]
.LBB0_9:                                ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v3, s8, v3
	v_add_nc_u32_e32 v5, s10, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e64 s0, 0x3fffff, v3
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_5
.LBB0_10:                               ; %Flow75
	s_or_b32 exec_lo, exec_lo, s9
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_13
; %bb.11:                               ; %.lr.ph47.preheader
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_ashr_i32 s9, s8, 31
	s_mov_b32 s1, 0
	s_lshl_b64 s[2:3], s[8:9], 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_lshl_b32 s4, s8, 2
.LBB0_12:                               ; %.lr.ph47
                                        ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v4, v0
	v_add_nc_u32_e32 v1, s8, v1
	v_add_nc_u32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, 0x7ff, v1
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[2:3], v4, off
	v_add_co_u32 v2, s0, v2, s2
	v_add_co_ci_u32_e64 v3, s0, s3, v3, s0
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_12
.LBB0_13:                               ; %Flow71
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10ssspKernelPiS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10ssspKernelPiS_S_S_, .Lfunc_end0-_Z10ssspKernelPiS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 692
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10ssspKernelPiS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10ssspKernelPiS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
