#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>

#define POPULATION_SIZE 1024
#define NUM_VARIABLES 256
#define NUM_GENERATIONS 100

__global__ void initializePopulation(curandState *state, float *population) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE * NUM_VARIABLES) {
        curand_init(idx, 0, 0, &state[idx]);
        population[idx] = curand_uniform(&state[idx]) * 2.0f - 1.0f; // Initialize to [-1, 1]
    }
}

__device__ float fitnessFunction(const float *individual) {
    float sum = 0.0f;
    for (int i = 0; i < NUM_VARIABLES; ++i) {
        sum += individual[i] * individual[i];
    }
    return sum;
}

__global__ void evaluatePopulation(float *population, float *fitness) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        fitness[idx] = fitnessFunction(&population[idx * NUM_VARIABLES]);
    }
}

__global__ void selectParents(float *population, float *fitness, curandState *state, float *newPopulation) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        curandState localState = state[idx];
        float parent1Fitness = curand_uniform(&localState) * 2.0f;
        float parent2Fitness = curand_uniform(&localState) * 2.0f;
        int parent1 = 0, parent2 = 0;
        for (int i = 0; i < POPULATION_SIZE; ++i) {
            if (fitness[i] < parent1Fitness) {
                parent1 = i;
                parent1Fitness = fitness[i];
            }
            if (fitness[i] < parent2Fitness) {
                parent2 = i;
                parent2Fitness = fitness[i];
            }
        }
        // Simple crossover
        for (int i = 0; i < NUM_VARIABLES; ++i) {
            newPopulation[idx * NUM_VARIABLES + i] = curand_uniform(&localState) > 0.5f ?
                population[parent1 * NUM_VARIABLES + i] : population[parent2 * NUM_VARIABLES + i];
        }
        state[idx] = localState;
    }
}

__global__ void mutatePopulation(curandState *state, float *population) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE * NUM_VARIABLES) {
        curandState localState = state[idx];
        if (curand_uniform(&localState) < 0.01f) { // Mutation rate of 1%
            population[idx] += curand_normal(&localState) * 0.1f; // Small mutation
        }
        state[idx] = localState;
    }
}

int main() {
    float *h_population, *h_fitness, *d_population, *d_fitness;
    curandState *d_state;

    // Allocate host memory
    h_population = (float *)malloc(POPULATION_SIZE * NUM_VARIABLES * sizeof(float));
    h_fitness = (float *)malloc(POPULATION_SIZE * sizeof(float));

    // Allocate device memory
    cudaMalloc((void **)&d_population, POPULATION_SIZE * NUM_VARIABLES * sizeof(float));
    cudaMalloc((void **)&d_fitness, POPULATION_SIZE * sizeof(float));
    cudaMalloc((void **)&d_state, POPULATION_SIZE * NUM_VARIABLES * sizeof(curandState));

    // Initialize population
    initializePopulation<<<(POPULATION_SIZE * NUM_VARIABLES + 255) / 256, 256>>>(d_state, d_population);
    cudaDeviceSynchronize();

    // Main genetic algorithm loop
    for (int generation = 0; generation < NUM_GENERATIONS; ++generation) {
        // Evaluate fitness
        evaluatePopulation<<<(POPULATION_SIZE + 255) / 256, 256>>>(d_population, d_fitness);
        cudaDeviceSynchronize();

        // Select parents and create new population
        selectParents<<<(POPULATION_SIZE + 255) / 256, 256>>>(d_population, d_fitness, d_state, d_population);
        cudaDeviceSynchronize();

        // Mutate population
        mutatePopulation<<<(POPULATION_SIZE * NUM_VARIABLES + 255) / 256, 256>>>(d_state, d_population);
        cudaDeviceSynchronize();
    }

    // Copy results back to host
    cudaMemcpy(h_population, d_population, POPULATION_SIZE * NUM_VARIABLES * sizeof(float), cudaMemcpyDeviceToHost);
    cudaMemcpy(h_fitness, d_fitness, POPULATION_SIZE * sizeof(float), cudaMemcpyDeviceToHost);

    // Find and print the best individual
    float bestFitness = h_fitness[0];
    int bestIndex = 0;
    for (int i = 1; i < POPULATION_SIZE; ++i) {
        if (h_fitness[i] < bestFitness) {
            bestFitness = h_fitness[i];
            bestIndex = i;
        }
    }
    std::cout << "Best fitness: " << bestFitness << std::endl;
    std::cout << "Best individual: ";
    for (int i = 0; i < NUM_VARIABLES; ++i) {
        std::cout << h_population[bestIndex * NUM_VARIABLES + i] << " ";
    }
    std::cout << std::endl;

    // Free memory
    free(h_population);
    free(h_fitness);
    cudaFree(d_population);
    cudaFree(d_fitness);
    cudaFree(d_state);

    return 0;
}
	.file	"tmpxft_00128a48_00000000-6_cuda_code_083624.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3853:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3853:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z15fitnessFunctionPKf
	.type	_Z15fitnessFunctionPKf, @function
_Z15fitnessFunctionPKf:
.LFB3849:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3849:
	.size	_Z15fitnessFunctionPKf, .-_Z15fitnessFunctionPKf
	.globl	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPfP17curandStateXORWOWPf
	.type	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPfP17curandStateXORWOWPf, @function
_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPfP17curandStateXORWOWPf:
.LFB3875:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20initializePopulationP17curandStateXORWOWPf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L4:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3875:
	.size	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPfP17curandStateXORWOWPf, .-_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPfP17curandStateXORWOWPf
	.globl	_Z20initializePopulationP17curandStateXORWOWPf
	.type	_Z20initializePopulationP17curandStateXORWOWPf, @function
_Z20initializePopulationP17curandStateXORWOWPf:
.LFB3876:
	.cfi_startproc
	endbr64
	jmp	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPfP17curandStateXORWOWPf
	.cfi_endproc
.LFE3876:
	.size	_Z20initializePopulationP17curandStateXORWOWPf, .-_Z20initializePopulationP17curandStateXORWOWPf
	.globl	_Z40__device_stub__Z18evaluatePopulationPfS_PfS_
	.type	_Z40__device_stub__Z18evaluatePopulationPfS_PfS_, @function
_Z40__device_stub__Z18evaluatePopulationPfS_PfS_:
.LFB3877:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18evaluatePopulationPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L10:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3877:
	.size	_Z40__device_stub__Z18evaluatePopulationPfS_PfS_, .-_Z40__device_stub__Z18evaluatePopulationPfS_PfS_
	.globl	_Z18evaluatePopulationPfS_
	.type	_Z18evaluatePopulationPfS_, @function
_Z18evaluatePopulationPfS_:
.LFB3878:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z18evaluatePopulationPfS_PfS_
	.cfi_endproc
.LFE3878:
	.size	_Z18evaluatePopulationPfS_, .-_Z18evaluatePopulationPfS_
	.globl	_Z57__device_stub__Z13selectParentsPfS_P17curandStateXORWOWS_PfS_P17curandStateXORWOWS_
	.type	_Z57__device_stub__Z13selectParentsPfS_P17curandStateXORWOWS_PfS_P17curandStateXORWOWS_, @function
_Z57__device_stub__Z13selectParentsPfS_P17curandStateXORWOWS_PfS_P17curandStateXORWOWS_:
.LFB3879:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13selectParentsPfS_P17curandStateXORWOWS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L15:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3879:
	.size	_Z57__device_stub__Z13selectParentsPfS_P17curandStateXORWOWS_PfS_P17curandStateXORWOWS_, .-_Z57__device_stub__Z13selectParentsPfS_P17curandStateXORWOWS_PfS_P17curandStateXORWOWS_
	.globl	_Z13selectParentsPfS_P17curandStateXORWOWS_
	.type	_Z13selectParentsPfS_P17curandStateXORWOWS_, @function
_Z13selectParentsPfS_P17curandStateXORWOWS_:
.LFB3880:
	.cfi_startproc
	endbr64
	jmp	_Z57__device_stub__Z13selectParentsPfS_P17curandStateXORWOWS_PfS_P17curandStateXORWOWS_
	.cfi_endproc
.LFE3880:
	.size	_Z13selectParentsPfS_P17curandStateXORWOWS_, .-_Z13selectParentsPfS_P17curandStateXORWOWS_
	.globl	_Z56__device_stub__Z16mutatePopulationP17curandStateXORWOWPfP17curandStateXORWOWPf
	.type	_Z56__device_stub__Z16mutatePopulationP17curandStateXORWOWPfP17curandStateXORWOWPf, @function
_Z56__device_stub__Z16mutatePopulationP17curandStateXORWOWPfP17curandStateXORWOWPf:
.LFB3881:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z16mutatePopulationP17curandStateXORWOWPf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L20:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3881:
	.size	_Z56__device_stub__Z16mutatePopulationP17curandStateXORWOWPfP17curandStateXORWOWPf, .-_Z56__device_stub__Z16mutatePopulationP17curandStateXORWOWPfP17curandStateXORWOWPf
	.globl	_Z16mutatePopulationP17curandStateXORWOWPf
	.type	_Z16mutatePopulationP17curandStateXORWOWPf, @function
_Z16mutatePopulationP17curandStateXORWOWPf:
.LFB3882:
	.cfi_startproc
	endbr64
	jmp	_Z56__device_stub__Z16mutatePopulationP17curandStateXORWOWPfP17curandStateXORWOWPf
	.cfi_endproc
.LFE3882:
	.size	_Z16mutatePopulationP17curandStateXORWOWPf, .-_Z16mutatePopulationP17curandStateXORWOWPf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Best fitness: "
.LC1:
	.string	"Best individual: "
.LC2:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3850:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1048576, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$4096, %edi
	movq	%rax, %r12
	call	malloc@PLT
	leaq	24(%rsp), %rdi
	movl	$1048576, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$12582912, %esi
	call	cudaMalloc@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$4194305, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$10, %rdi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	24(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPfP17curandStateXORWOWPf
.L26:
	call	cudaDeviceSynchronize@PLT
	movl	$16777217, %ebx
	movl	$100, %r14d
	movabsq	$4294967300, %r13
	movabsq	$4294968320, %r15
	salq	$8, %rbx
.L30:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%r13, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z40__device_stub__Z18evaluatePopulationPfS_PfS_
.L27:
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%r13, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	24(%rsp), %rdi
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	%rdi, %rcx
	call	_Z57__device_stub__Z13selectParentsPfS_P17curandStateXORWOWS_PfS_P17curandStateXORWOWS_
.L28:
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%r15, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	24(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z56__device_stub__Z16mutatePopulationP17curandStateXORWOWPfP17curandStateXORWOWPf
.L29:
	call	cudaDeviceSynchronize@PLT
	decl	%r14d
	jne	.L30
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	xorl	%ebx, %ebx
	movl	$1048576, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$4096, %edx
	call	cudaMemcpy@PLT
	movss	0(%rbp), %xmm0
	movl	$1, %eax
.L33:
	movss	0(%rbp,%rax,4), %xmm1
	comiss	%xmm1, %xmm0
	minss	%xmm0, %xmm1
	cmova	%eax, %ebx
	incq	%rax
	movaps	%xmm1, %xmm0
	cmpq	$1024, %rax
	jne	.L33
	leaq	_ZSt4cout(%rip), %r13
	leaq	.LC0(%rip), %rsi
	movslq	%ebx, %rbx
	xorl	%r14d, %r14d
	movq	%r13, %rdi
	movss	%xmm1, 12(%rsp)
	salq	$10, %rbx
	leaq	.LC2(%rip), %r15
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	12(%rsp), %xmm0
	addq	%r12, %rbx
	movq	%rax, %rdi
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	.LC1(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L34:
	movq	%r13, %rdi
	cvtss2sd	(%rbx,%r14,4), %xmm0
	incq	%r14
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$256, %r14
	jne	.L34
	movq	%r13, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3850:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z16mutatePopulationP17curandStateXORWOWPf"
.LC4:
	.string	"_Z13selectParentsPfS_P17curandStateXORWOWS_"
.LC5:
	.string	"_Z18evaluatePopulationPfS_"
.LC6:
	.string	"_Z20initializePopulationP17curandStateXORWOWPf"
.LC7:
	.string	"precalc_xorwow_matrix"
.LC8:
	.string	"precalc_xorwow_offset_matrix"
.LC9:
	.string	"mrg32k3aM1"
.LC10:
	.string	"mrg32k3aM2"
.LC11:
	.string	"mrg32k3aM1SubSeq"
.LC12:
	.string	"mrg32k3aM2SubSeq"
.LC13:
	.string	"mrg32k3aM1Seq"
.LC14:
	.string	"mrg32k3aM2Seq"
.LC15:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3884:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16mutatePopulationP17curandStateXORWOWPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13selectParentsPfS_P17curandStateXORWOWS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z18evaluatePopulationPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20initializePopulationP17curandStateXORWOWPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3884:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>

#define POPULATION_SIZE 1024
#define NUM_VARIABLES 256
#define NUM_GENERATIONS 100

__global__ void initializePopulation(hiprandState *state, float *population) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE * NUM_VARIABLES) {
        hiprand_init(idx, 0, 0, &state[idx]);
        population[idx] = hiprand_uniform(&state[idx]) * 2.0f - 1.0f; // Initialize to [-1, 1]
    }
}

__device__ float fitnessFunction(const float *individual) {
    float sum = 0.0f;
    for (int i = 0; i < NUM_VARIABLES; ++i) {
        sum += individual[i] * individual[i];
    }
    return sum;
}

__global__ void evaluatePopulation(float *population, float *fitness) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        fitness[idx] = fitnessFunction(&population[idx * NUM_VARIABLES]);
    }
}

__global__ void selectParents(float *population, float *fitness, hiprandState *state, float *newPopulation) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        hiprandState localState = state[idx];
        float parent1Fitness = hiprand_uniform(&localState) * 2.0f;
        float parent2Fitness = hiprand_uniform(&localState) * 2.0f;
        int parent1 = 0, parent2 = 0;
        for (int i = 0; i < POPULATION_SIZE; ++i) {
            if (fitness[i] < parent1Fitness) {
                parent1 = i;
                parent1Fitness = fitness[i];
            }
            if (fitness[i] < parent2Fitness) {
                parent2 = i;
                parent2Fitness = fitness[i];
            }
        }
        // Simple crossover
        for (int i = 0; i < NUM_VARIABLES; ++i) {
            newPopulation[idx * NUM_VARIABLES + i] = hiprand_uniform(&localState) > 0.5f ?
                population[parent1 * NUM_VARIABLES + i] : population[parent2 * NUM_VARIABLES + i];
        }
        state[idx] = localState;
    }
}

__global__ void mutatePopulation(hiprandState *state, float *population) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE * NUM_VARIABLES) {
        hiprandState localState = state[idx];
        if (hiprand_uniform(&localState) < 0.01f) { // Mutation rate of 1%
            population[idx] += hiprand_normal(&localState) * 0.1f; // Small mutation
        }
        state[idx] = localState;
    }
}

int main() {
    float *h_population, *h_fitness, *d_population, *d_fitness;
    hiprandState *d_state;

    // Allocate host memory
    h_population = (float *)malloc(POPULATION_SIZE * NUM_VARIABLES * sizeof(float));
    h_fitness = (float *)malloc(POPULATION_SIZE * sizeof(float));

    // Allocate device memory
    hipMalloc((void **)&d_population, POPULATION_SIZE * NUM_VARIABLES * sizeof(float));
    hipMalloc((void **)&d_fitness, POPULATION_SIZE * sizeof(float));
    hipMalloc((void **)&d_state, POPULATION_SIZE * NUM_VARIABLES * sizeof(hiprandState));

    // Initialize population
    initializePopulation<<<(POPULATION_SIZE * NUM_VARIABLES + 255) / 256, 256>>>(d_state, d_population);
    hipDeviceSynchronize();

    // Main genetic algorithm loop
    for (int generation = 0; generation < NUM_GENERATIONS; ++generation) {
        // Evaluate fitness
        evaluatePopulation<<<(POPULATION_SIZE + 255) / 256, 256>>>(d_population, d_fitness);
        hipDeviceSynchronize();

        // Select parents and create new population
        selectParents<<<(POPULATION_SIZE + 255) / 256, 256>>>(d_population, d_fitness, d_state, d_population);
        hipDeviceSynchronize();

        // Mutate population
        mutatePopulation<<<(POPULATION_SIZE * NUM_VARIABLES + 255) / 256, 256>>>(d_state, d_population);
        hipDeviceSynchronize();
    }

    // Copy results back to host
    hipMemcpy(h_population, d_population, POPULATION_SIZE * NUM_VARIABLES * sizeof(float), hipMemcpyDeviceToHost);
    hipMemcpy(h_fitness, d_fitness, POPULATION_SIZE * sizeof(float), hipMemcpyDeviceToHost);

    // Find and print the best individual
    float bestFitness = h_fitness[0];
    int bestIndex = 0;
    for (int i = 1; i < POPULATION_SIZE; ++i) {
        if (h_fitness[i] < bestFitness) {
            bestFitness = h_fitness[i];
            bestIndex = i;
        }
    }
    std::cout << "Best fitness: " << bestFitness << std::endl;
    std::cout << "Best individual: ";
    for (int i = 0; i < NUM_VARIABLES; ++i) {
        std::cout << h_population[bestIndex * NUM_VARIABLES + i] << " ";
    }
    std::cout << std::endl;

    // Free memory
    free(h_population);
    free(h_fitness);
    hipFree(d_population);
    hipFree(d_fitness);
    hipFree(d_state);

    return 0;
}
	.text
	.file	"cuda_code_083624.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z35__device_stub__initializePopulationP12hiprandStatePf # -- Begin function _Z35__device_stub__initializePopulationP12hiprandStatePf
	.type	_Z35__device_stub__initializePopulationP12hiprandStatePf,@function
_Z35__device_stub__initializePopulationP12hiprandStatePf: # @_Z35__device_stub__initializePopulationP12hiprandStatePf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20initializePopulationP12hiprandStatePf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z35__device_stub__initializePopulationP12hiprandStatePf, .Lfunc_end0-_Z35__device_stub__initializePopulationP12hiprandStatePf
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__evaluatePopulationPfS_ # -- Begin function _Z33__device_stub__evaluatePopulationPfS_
	.type	_Z33__device_stub__evaluatePopulationPfS_,@function
_Z33__device_stub__evaluatePopulationPfS_: # @_Z33__device_stub__evaluatePopulationPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18evaluatePopulationPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z33__device_stub__evaluatePopulationPfS_, .Lfunc_end1-_Z33__device_stub__evaluatePopulationPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__selectParentsPfS_P12hiprandStateS_ # -- Begin function _Z28__device_stub__selectParentsPfS_P12hiprandStateS_
	.type	_Z28__device_stub__selectParentsPfS_P12hiprandStateS_,@function
_Z28__device_stub__selectParentsPfS_P12hiprandStateS_: # @_Z28__device_stub__selectParentsPfS_P12hiprandStateS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13selectParentsPfS_P12hiprandStateS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z28__device_stub__selectParentsPfS_P12hiprandStateS_, .Lfunc_end2-_Z28__device_stub__selectParentsPfS_P12hiprandStateS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__mutatePopulationP12hiprandStatePf # -- Begin function _Z31__device_stub__mutatePopulationP12hiprandStatePf
	.type	_Z31__device_stub__mutatePopulationP12hiprandStatePf,@function
_Z31__device_stub__mutatePopulationP12hiprandStatePf: # @_Z31__device_stub__mutatePopulationP12hiprandStatePf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16mutatePopulationP12hiprandStatePf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z31__device_stub__mutatePopulationP12hiprandStatePf, .Lfunc_end3-_Z31__device_stub__mutatePopulationP12hiprandStatePf
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967552, %r15               # imm = 0x100000100
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	movq	%rax, %rbx
	movl	$4096, %edi                     # imm = 0x1000
	callq	malloc
	movq	%rax, %r14
	leaq	8(%rsp), %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$12582912, %esi                 # imm = 0xC00000
	callq	hipMalloc
	leaq	768(%r15), %r12
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_2
# %bb.1:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z35__device_stub__initializePopulationP12hiprandStatePf
.LBB4_2:
	callq	hipDeviceSynchronize
	movl	$100, %ebp
	leaq	-252(%r15), %r13
.LBB4_3:                                # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_5
# %bb.4:                                #   in Loop: Header=BB4_3 Depth=1
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z33__device_stub__evaluatePopulationPfS_
.LBB4_5:                                #   in Loop: Header=BB4_3 Depth=1
	callq	hipDeviceSynchronize
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_7
# %bb.6:                                #   in Loop: Header=BB4_3 Depth=1
	movq	8(%rsp), %rcx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	%rcx, %rdi
	callq	_Z28__device_stub__selectParentsPfS_P12hiprandStateS_
.LBB4_7:                                #   in Loop: Header=BB4_3 Depth=1
	callq	hipDeviceSynchronize
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_9
# %bb.8:                                #   in Loop: Header=BB4_3 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z31__device_stub__mutatePopulationP12hiprandStatePf
.LBB4_9:                                #   in Loop: Header=BB4_3 Depth=1
	callq	hipDeviceSynchronize
	decl	%ebp
	jne	.LBB4_3
# %bb.10:
	movq	8(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movss	(%r14), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	xorl	%ebp, %ebp
	movl	$1, %eax
.LBB4_11:                               # =>This Inner Loop Header: Depth=1
	movaps	%xmm1, %xmm0
	movss	(%r14,%rax,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	cmoval	%eax, %ebp
	minss	%xmm0, %xmm1
	incq	%rax
	cmpq	$1024, %rax                     # imm = 0x400
	jne	.LBB4_11
# %bb.12:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$14, %edx
	movss	%xmm1, 36(%rsp)                 # 4-byte Spill
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	36(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	shll	$8, %ebp
	movslq	%ebp, %rax
	leaq	(%rbx,%rax,4), %r15
	xorl	%r12d, %r12d
.LBB4_13:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%r12,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r12
	cmpq	$256, %r12                      # imm = 0x100
	jne	.LBB4_13
# %bb.14:
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20initializePopulationP12hiprandStatePf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18evaluatePopulationPfS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13selectParentsPfS_P12hiprandStateS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16mutatePopulationP12hiprandStatePf, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z20initializePopulationP12hiprandStatePf,@object # @_Z20initializePopulationP12hiprandStatePf
	.section	.rodata,"a",@progbits
	.globl	_Z20initializePopulationP12hiprandStatePf
	.p2align	3, 0x0
_Z20initializePopulationP12hiprandStatePf:
	.quad	_Z35__device_stub__initializePopulationP12hiprandStatePf
	.size	_Z20initializePopulationP12hiprandStatePf, 8

	.type	_Z18evaluatePopulationPfS_,@object # @_Z18evaluatePopulationPfS_
	.globl	_Z18evaluatePopulationPfS_
	.p2align	3, 0x0
_Z18evaluatePopulationPfS_:
	.quad	_Z33__device_stub__evaluatePopulationPfS_
	.size	_Z18evaluatePopulationPfS_, 8

	.type	_Z13selectParentsPfS_P12hiprandStateS_,@object # @_Z13selectParentsPfS_P12hiprandStateS_
	.globl	_Z13selectParentsPfS_P12hiprandStateS_
	.p2align	3, 0x0
_Z13selectParentsPfS_P12hiprandStateS_:
	.quad	_Z28__device_stub__selectParentsPfS_P12hiprandStateS_
	.size	_Z13selectParentsPfS_P12hiprandStateS_, 8

	.type	_Z16mutatePopulationP12hiprandStatePf,@object # @_Z16mutatePopulationP12hiprandStatePf
	.globl	_Z16mutatePopulationP12hiprandStatePf
	.p2align	3, 0x0
_Z16mutatePopulationP12hiprandStatePf:
	.quad	_Z31__device_stub__mutatePopulationP12hiprandStatePf
	.size	_Z16mutatePopulationP12hiprandStatePf, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Best fitness: "
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Best individual: "
	.size	.L.str.1, 18

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" "
	.size	.L.str.2, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20initializePopulationP12hiprandStatePf"
	.size	.L__unnamed_1, 42

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z18evaluatePopulationPfS_"
	.size	.L__unnamed_2, 27

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z13selectParentsPfS_P12hiprandStateS_"
	.size	.L__unnamed_3, 39

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z16mutatePopulationP12hiprandStatePf"
	.size	.L__unnamed_4, 38

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__initializePopulationP12hiprandStatePf
	.addrsig_sym _Z33__device_stub__evaluatePopulationPfS_
	.addrsig_sym _Z28__device_stub__selectParentsPfS_P12hiprandStateS_
	.addrsig_sym _Z31__device_stub__mutatePopulationP12hiprandStatePf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z20initializePopulationP12hiprandStatePf
	.addrsig_sym _Z18evaluatePopulationPfS_
	.addrsig_sym _Z13selectParentsPfS_P12hiprandStateS_
	.addrsig_sym _Z16mutatePopulationP12hiprandStatePf
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20initializePopulationP12hiprandStatePf ; -- Begin function _Z20initializePopulationP12hiprandStatePf
	.globl	_Z20initializePopulationP12hiprandStatePf
	.p2align	8
	.type	_Z20initializePopulationP12hiprandStatePf,@function
_Z20initializePopulationP12hiprandStatePf: ; @_Z20initializePopulationP12hiprandStatePf
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x40000, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_xor_b32_e32 v0, 0x2c7f967f, v1
	v_cmp_lt_i32_e32 vcc_lo, -1, v1
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, 0x493c4aa1, v0
	v_add_nc_u32_e32 v2, 0x75bcd15, v0
	v_add_nc_u32_e32 v4, 0x583f19, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v3, 2, v2
	v_lshlrev_b32_e32 v5, 4, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v3, v2
	v_dual_mov_b32 v3, 0x8a5d614f :: v_dual_lshlrev_b32 v6, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, 0xfa091aa4, v3, vcc_lo
	v_xor_b32_e32 v6, v5, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v5, v0, v3, 0x6a788e
	v_xor3_b32 v12, v6, v4, v2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v6, 0 :: v_dual_add_nc_u32 v7, v12, v5
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	v_add_nc_u32_e32 v2, 0x1f123bb5, v3
	v_xor_b32_e32 v3, 0x5491333, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_cvt_f32_u32_e32 v10, v7
	v_mov_b32_e32 v7, v6
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	v_fmaak_f32 v13, 0x2f800000, v10, 0x2f800000
	v_mad_i64_i32 v[10:11], null, v1, 48, s[0:1]
	v_xor_b32_e32 v1, 0x159a55e5, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f32 v0, v13, 2.0, -1.0
	s_clause 0x2
	global_store_b32 v[10:11], v12, off offset:40
	global_store_b128 v[10:11], v[1:4], off offset:24
	global_store_b96 v[10:11], v[5:7], off
	global_store_b32 v[8:9], v0, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20initializePopulationP12hiprandStatePf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20initializePopulationP12hiprandStatePf, .Lfunc_end0-_Z20initializePopulationP12hiprandStatePf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 324
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z18evaluatePopulationPfS_ ; -- Begin function _Z18evaluatePopulationPfS_
	.globl	_Z18evaluatePopulationPfS_
	.p2align	8
	.type	_Z18evaluatePopulationPfS_,@function
_Z18evaluatePopulationPfS_:             ; @_Z18evaluatePopulationPfS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x400, v1
	s_cbranch_execz .LBB1_4
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v2, 8, v1
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_mov_b64 s[0:1], 0
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_co_u32 v4, vcc_lo, v2, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x400
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v0, v4, v4
	s_cbranch_scc1 .LBB1_2
; %bb.3:                                ; %_Z15fitnessFunctionPKf.exit
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB1_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18evaluatePopulationPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z18evaluatePopulationPfS_, .Lfunc_end1-_Z18evaluatePopulationPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 208
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13selectParentsPfS_P12hiprandStateS_ ; -- Begin function _Z13selectParentsPfS_P12hiprandStateS_
	.globl	_Z13selectParentsPfS_P12hiprandStateS_
	.p2align	8
	.type	_Z13selectParentsPfS_P12hiprandStateS_,@function
_Z13selectParentsPfS_P12hiprandStateS_: ; @_Z13selectParentsPfS_P12hiprandStateS_
; %bb.0:
	s_load_b32 s4, s[2:3], 0x2c
	v_and_b32_e32 v10, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[10:11]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0x400, v1
	s_cbranch_execz .LBB2_6
; %bb.1:
	s_load_b256 s[4:11], s[2:3], 0x0
	s_load_b64 s[0:1], s[0:1], 0x4
	v_dual_mov_b32 v18, 0 :: v_dual_mov_b32 v17, 0
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[6:7], null, v1, 48, s[8:9]
	s_clause 0x4
	global_load_b128 v[2:5], v[6:7], off offset:24
	global_load_b64 v[8:9], v[6:7], off offset:40
	global_load_b32 v11, v[6:7], off
	global_load_b128 v[19:22], v[6:7], off offset:4
	global_load_b32 v14, v[6:7], off offset:20
	s_lshr_b32 s0, s0, 16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s0, s0, s1
	s_waitcnt vmcnt(4)
	v_lshrrev_b32_e32 v12, 2, v2
	v_lshrrev_b32_e32 v15, 2, v3
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v16, 0xb0f8a, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v2, v12, v2
	v_lshlrev_b32_e32 v12, 4, v8
	v_lshlrev_b32_e32 v13, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v12, v13, v12
	v_xor_b32_e32 v13, v15, v3
	v_mul_lo_u32 v15, s0, v10
	v_xor3_b32 v3, v12, v2, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v2, 1, v13
	v_lshlrev_b32_e32 v12, 4, v3
	v_add3_u32 v11, v11, v3, 0x587c5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v2, v2, v12
	v_bfe_u32 v12, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	v_xor3_b32 v10, v2, v13, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_u32_u24_e32 v2, s1, v12
	s_mov_b32 s1, 0
	v_add_nc_u32_e32 v12, v10, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add3_u32 v0, v15, v2, v0
	v_cvt_f32_u32_e32 v2, v11
	v_cvt_f32_u32_e32 v12, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v11, v0, 20
	v_fmaak_f32 v0, 0x2f800000, v2, 0x2f800000
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fmaak_f32 v2, 0x2f800000, v12, 0x2f800000
	v_add_co_u32 v12, vcc_lo, v6, 4
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v7, vcc_lo
	v_add_f32_e32 v0, v0, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f32_e32 v2, v2, v2
	s_waitcnt vmcnt(1)
	ds_store_2addr_b32 v11, v19, v20 offset1:1
	ds_store_2addr_b32 v11, v21, v22 offset0:2 offset1:3
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v14 offset:16
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s2, s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, s2, v0
	v_cmp_lt_f32_e64 s0, s2, v2
	v_cndmask_b32_e64 v0, v0, s2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v2, v2, s2, s0
	v_cndmask_b32_e64 v18, v18, s1, vcc_lo
	v_cndmask_b32_e64 v17, v17, s1, s0
	s_add_i32 s1, s1, 1
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
	s_cmpk_eq_i32 s1, 0x400
	s_cbranch_scc0 .LBB2_2
; %bb.3:                                ; %.preheader
	v_lshlrev_b32_e32 v0, 8, v1
	s_mov_b64 s[0:1], 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v15, vcc_lo, s11, v1, vcc_lo
.LBB2_4:                                ; =>This Inner Loop Header: Depth=1
	v_lshrrev_b32_e32 v0, 2, v4
	v_dual_mov_b32 v2, v3 :: v_dual_mov_b32 v3, v10
	v_add_nc_u32_e32 v16, 0x587c5, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v0, v0, v4
	v_lshlrev_b32_e32 v1, 4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 1, v0
	v_xor_b32_e32 v1, v1, v4
	v_mov_b32_e32 v4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v10, v1, v3, v0
	v_add_nc_u32_e32 v0, v16, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, v0
	v_fmaak_f32 v0, 0x2f800000, v0, 0x2f800000
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e32 vcc_lo, 0.5, v0
	v_cndmask_b32_e32 v0, v17, v18, vcc_lo
	v_lshlrev_b32_e32 v0, 8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_add_u32 s0, s0, 1
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_addc_u32 s1, s1, 0
	s_cmpk_eq_i32 s0, 0x100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v19, v[0:1], off
	v_dual_mov_b32 v0, v5 :: v_dual_mov_b32 v5, v8
	v_dual_mov_b32 v1, v8 :: v_dual_mov_b32 v8, v2
	s_waitcnt vmcnt(0)
	global_store_b32 v[14:15], v19, off
	v_add_co_u32 v14, vcc_lo, v14, 4
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v15, vcc_lo
	s_cbranch_scc0 .LBB2_4
; %bb.5:
	ds_load_b32 v4, v11 offset:16
	ds_load_2addr_b32 v[19:20], v11 offset0:2 offset1:3
	ds_load_2addr_b32 v[17:18], v11 offset1:1
	v_mov_b32_e32 v11, v9
	s_clause 0x1
	global_store_b32 v[6:7], v16, off
	global_store_b128 v[6:7], v[0:3], off offset:24
	s_waitcnt lgkmcnt(2)
	global_store_b32 v[12:13], v4, off offset:16
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b128 v[12:13], v[17:20], off
	global_store_b64 v[6:7], v[10:11], off offset:40
.LBB2_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13selectParentsPfS_P12hiprandStateS_
		.amdhsa_group_segment_fixed_size 20480
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 1
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z13selectParentsPfS_P12hiprandStateS_, .Lfunc_end2-_Z13selectParentsPfS_P12hiprandStateS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 824
; NumSgprs: 18
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 20480 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z16mutatePopulationP12hiprandStatePf ; -- Begin function _Z16mutatePopulationP12hiprandStatePf
	.globl	_Z16mutatePopulationP12hiprandStatePf
	.p2align	8
	.type	_Z16mutatePopulationP12hiprandStatePf,@function
_Z16mutatePopulationP12hiprandStatePf:  ; @_Z16mutatePopulationP12hiprandStatePf
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x40000, v9
	s_cbranch_execz .LBB3_6
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[12:13], null, v9, 48, s[0:1]
	s_mov_b32 s1, exec_lo
	s_clause 0x3
	global_load_b128 v[0:3], v[12:13], off offset:24
	global_load_b64 v[16:17], v[12:13], off offset:40
	global_load_b128 v[4:7], v[12:13], off
	global_load_b64 v[14:15], v[12:13], off offset:16
	s_waitcnt vmcnt(3)
	v_lshrrev_b32_e32 v8, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v0, v8, v0
	s_waitcnt vmcnt(2)
	v_lshlrev_b32_e32 v8, 4, v16
	v_lshlrev_b32_e32 v10, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v8, v10, v8
	v_xor3_b32 v0, v8, v0, v16
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v8, 0x587c5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v10, v0, v8
	v_cvt_f32_u32_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v10, 0x2f800000, v10, 0x2f800000
	v_cmpx_gt_f32_e32 0x3c23d70a, v10
	s_cbranch_execz .LBB3_5
; %bb.2:
	v_ashrrev_i32_e32 v10, 31, v9
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v18, v7
	v_mov_b32_e32 v11, v3
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB3_4
; %bb.3:
	v_lshrrev_b32_e32 v5, 2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v5, v1
	v_lshlrev_b32_e32 v5, 4, v0
	v_lshlrev_b32_e32 v7, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v7, v5
	v_xor3_b32 v7, v5, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v4, v7, 0xb0f8a
	v_cvt_f32_u32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v1, 0x2f800000, v1, 0x2f800000
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v1
	v_cndmask_b32_e64 v5, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, v1, v5
	v_log_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v5, 0x3f317217, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, 0x3f317217, v1, -v5
	v_fmamk_f32 v8, v1, 0x3377d1cf, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v5, v5, v8
	v_cndmask_b32_e64 v8, 0, 0x41b17218, vcc_lo
	v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v1|
	v_cndmask_b32_e32 v1, v1, v5, vcc_lo
	v_lshrrev_b32_e32 v5, 2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v1, v1, v8
	v_xor_b32_e32 v2, v5, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, -2.0, v1
	v_mul_f32_e32 v8, 0x4f800000, v1
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v1, v1, v8, vcc_lo
	v_lshlrev_b32_e32 v5, 1, v2
	v_lshlrev_b32_e32 v8, 4, v7
	v_sqrt_f32_e32 v11, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v5, v5, v8
	v_add_nc_u32_e32 v8, 0x10974f, v4
	v_xor3_b32 v4, v5, v2, v7
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v2, -1, v11
	v_add_nc_u32_e32 v18, 1, v11
	v_add_nc_u32_e32 v5, v4, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v19, -v2, v11, v1
	v_fma_f32 v20, -v18, v11, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f32_u32_e32 v5, v5
	v_cmp_ge_f32_e64 s0, 0, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v5, 0x30c90fdb, v5, 0x30c90fdb
	v_cndmask_b32_e64 v2, v11, v2, s0
	v_cmp_lt_f32_e64 s0, 0, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v2, v2, v18, s0
	v_mul_f32_e32 v11, 0x37800000, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v2, v2, v11 :: v_dual_mov_b32 v11, v0
	v_dual_mov_b32 v0, v4 :: v_dual_mul_f32 v5, 0.15915494, v5
	v_cmp_class_f32_e64 vcc_lo, v1, 0x260
	v_sin_f32_e32 v18, v5
	v_cos_f32_e32 v19, v5
	v_dual_cndmask_b32 v20, v2, v1 :: v_dual_mov_b32 v5, 1
	v_dual_mov_b32 v2, v16 :: v_dual_mov_b32 v1, v3
	v_mov_b32_e32 v16, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v18, v20, v18
	v_mul_f32_e32 v7, v20, v19
.LBB3_4:                                ; %_Z14hiprand_normalI12hiprandStateEfPT_.exit
	s_or_b32 exec_lo, exec_lo, s4
	v_lshlrev_b64 v[3:4], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v4, vcc_lo
	global_load_b32 v3, v[9:10], off
	s_waitcnt vmcnt(0)
	v_dual_fmamk_f32 v4, v18, 0x3dcccccd, v3 :: v_dual_mov_b32 v3, v11
	global_store_b32 v[9:10], v4, off
.LBB3_5:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v9, v5 :: v_dual_mov_b32 v10, v6
	v_dual_mov_b32 v11, v7 :: v_dual_mov_b32 v4, v1
	v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v6, v3
	v_mov_b32_e32 v7, v16
	v_mov_b32_e32 v1, v17
	global_store_b128 v[12:13], v[8:11], off
	s_waitcnt vmcnt(0)
	s_clause 0x2
	global_store_b64 v[12:13], v[14:15], off offset:16
	global_store_b128 v[12:13], v[4:7], off offset:24
	global_store_b64 v[12:13], v[0:1], off offset:40
.LBB3_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16mutatePopulationP12hiprandStatePf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 21
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z16mutatePopulationP12hiprandStatePf, .Lfunc_end3-_Z16mutatePopulationP12hiprandStatePf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 804
; NumSgprs: 18
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 21
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20initializePopulationP12hiprandStatePf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20initializePopulationP12hiprandStatePf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18evaluatePopulationPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18evaluatePopulationPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
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    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13selectParentsPfS_P12hiprandStateS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13selectParentsPfS_P12hiprandStateS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     23
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
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    .language:       OpenCL C
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    .name:           _Z16mutatePopulationP12hiprandStatePf
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    .sgpr_spill_count: 0
    .symbol:         _Z16mutatePopulationP12hiprandStatePf.kd
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
