#include <iostream>
#include <cuda_runtime.h>

#define TILE_WIDTH 16

// Kernel for matrix multiplication, used to simulate convolution backpropagation
__global__ void matrixMulKernel(float* C, float* A, float* B, int numARows, int numACols, int numBCols) {
    __shared__ float ds_A[TILE_WIDTH][TILE_WIDTH];
    __shared__ float ds_B[TILE_WIDTH][TILE_WIDTH];

    int bx = blockIdx.x, by = blockIdx.y;
    int tx = threadIdx.x, ty = threadIdx.y;

    int Row = by * TILE_WIDTH + ty;
    int Col = bx * TILE_WIDTH + tx;

    float Cvalue = 0;

    for (int m = 0; m < (numACols - 1) / TILE_WIDTH + 1; ++m) {
        if (Row < numARows && m * TILE_WIDTH + tx < numACols) {
            ds_A[ty][tx] = A[Row * numACols + m * TILE_WIDTH + tx];
        } else {
            ds_A[ty][tx] = 0.0;
        }

        if (Col < numBCols && m * TILE_WIDTH + ty < numACols) {
            ds_B[ty][tx] = B[(m * TILE_WIDTH + ty) * numBCols + Col];
        } else {
            ds_B[ty][tx] = 0.0;
        }

        __syncthreads();

        for (int e = 0; e < TILE_WIDTH; ++e) {
            Cvalue += ds_A[ty][e] * ds_B[e][tx];
        }

        __syncthreads();
    }

    if (Row < numARows && Col < numBCols) {
        C[Row * numBCols + Col] = Cvalue;
    }
}

// Error checking macro
#define cudaCheckError(err) (HandleError(err, __FILE__, __LINE__))

// Function to handle CUDA errors
static void HandleError(cudaError_t err, const char *file, int line) {
    if (err != cudaSuccess) {
        printf("%s in %s at line %d\n", cudaGetErrorString(err), file, line);
        exit(EXIT_FAILURE);
    }
}

int main() {
    int numARows = 256, numACols = 256, numBCols = 256;
    float *h_A, *h_B, *h_C;
    float *d_A, *d_B, *d_C;

    // Allocate host memory
    h_A = (float*)malloc(numARows * numACols * sizeof(float));
    h_B = (float*)malloc(numACols * numBCols * sizeof(float));
    h_C = (float*)malloc(numARows * numBCols * sizeof(float));

    // Initialize matrices on the host
    for (int i = 0; i < numARows * numACols; i++) h_A[i] = 1.0f;
    for (int i = 0; i < numACols * numBCols; i++) h_B[i] = 2.0f;

    // Allocate device memory
    cudaCheckError(cudaMalloc((void**)&d_A, numARows * numACols * sizeof(float)));
    cudaCheckError(cudaMalloc((void**)&d_B, numACols * numBCols * sizeof(float)));
    cudaCheckError(cudaMalloc((void**)&d_C, numARows * numBCols * sizeof(float)));

    // Copy matrices from host to device
    cudaCheckError(cudaMemcpy(d_A, h_A, numARows * numACols * sizeof(float), cudaMemcpyHostToDevice));
    cudaCheckError(cudaMemcpy(d_B, h_B, numACols * numBCols * sizeof(float), cudaMemcpyHostToDevice));

    // Set up execution configuration
    dim3 dimBlock(TILE_WIDTH, TILE_WIDTH);
    dim3 dimGrid((numBCols - 1) / TILE_WIDTH + 1, (numARows - 1) / TILE_WIDTH + 1);

    // Launch kernel
    matrixMulKernel<<<dimGrid, dimBlock>>>(d_C, d_A, d_B, numARows, numACols, numBCols);
    cudaCheckError(cudaDeviceSynchronize());

    // Copy result back to host
    cudaCheckError(cudaMemcpy(h_C, d_C, numARows * numBCols * sizeof(float), cudaMemcpyDeviceToHost));

    // Free device memory
    cudaCheckError(cudaFree(d_A));
    cudaCheckError(cudaFree(d_B));
    cudaCheckError(cudaFree(d_C));

    // Free host memory
    free(h_A);
    free(h_B);
    free(h_C);

    std::cout << "Matrix multiplication completed successfully!" << std::endl;
    return 0;
}
	.file	"tmpxft_0014ed42_00000000-6_cuda_code_034244.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/cuda-codes-80k-from-llm-dedup/cuda_code_034244.cu"
.LC1:
	.string	"%s in %s at line %d\n"
	.text
	.type	_ZL11HandleError9cudaErrorPKci.constprop.0, @function
_ZL11HandleError9cudaErrorPKci.constprop.0:
.LFB4294:
	.cfi_startproc
	testl	%edi, %edi
	je	.L2
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%esi, 12(%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r8d
	movl	$2, %edi
	leaq	.LC0(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4294:
	.size	_ZL11HandleError9cudaErrorPKci.constprop.0, .-_ZL11HandleError9cudaErrorPKci.constprop.0
	.globl	_Z42__device_stub__Z15matrixMulKernelPfS_S_iiiPfS_S_iii
	.type	_Z42__device_stub__Z15matrixMulKernelPfS_S_iiiPfS_S_iii, @function
_Z42__device_stub__Z15matrixMulKernelPfS_S_iiiPfS_S_iii:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15matrixMulKernelPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L8:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z42__device_stub__Z15matrixMulKernelPfS_S_iiiPfS_S_iii, .-_Z42__device_stub__Z15matrixMulKernelPfS_S_iiiPfS_S_iii
	.globl	_Z15matrixMulKernelPfS_S_iii
	.type	_Z15matrixMulKernelPfS_S_iii, @function
_Z15matrixMulKernelPfS_S_iii:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z15matrixMulKernelPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE3662:
	.size	_Z15matrixMulKernelPfS_S_iii, .-_Z15matrixMulKernelPfS_S_iii
	.section	.rodata.str1.1
.LC4:
	.string	"Matrix multiplication completed successfully!"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$262144, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$262144, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$262144, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movss	.LC2(%rip), %xmm0
	movq	%rax, %r12
	xorl	%eax, %eax
.L14:
	movss	%xmm0, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$65536, %rax
	jne	.L14
	movss	.LC3(%rip), %xmm0
	xorl	%eax, %eax
.L15:
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$65536, %rax
	jne	.L15
	leaq	8(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	movl	$72, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	leaq	16(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	movl	$73, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	leaq	24(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	movl	$74, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movl	$77, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movl	$78, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdi
	movl	$1, %esi
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$256, %r9d
	movl	$256, %r8d
	movq	24(%rsp), %rdi
	movl	$256, %ecx
	call	_Z42__device_stub__Z15matrixMulKernelPfS_S_iiiPfS_S_iii
.L16:
	call	cudaDeviceSynchronize@PLT
	movl	$86, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movl	$89, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movl	$92, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	$93, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	$94, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	leaq	_ZSt4cout(%rip), %rdi
	leaq	.LC4(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z15matrixMulKernelPfS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15matrixMulKernelPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1065353216
	.align 4
.LC3:
	.long	1073741824
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

#define TILE_WIDTH 16

// Kernel for matrix multiplication, used to simulate convolution backpropagation
__global__ void matrixMulKernel(float* C, float* A, float* B, int numARows, int numACols, int numBCols) {
    __shared__ float ds_A[TILE_WIDTH][TILE_WIDTH];
    __shared__ float ds_B[TILE_WIDTH][TILE_WIDTH];

    int bx = blockIdx.x, by = blockIdx.y;
    int tx = threadIdx.x, ty = threadIdx.y;

    int Row = by * TILE_WIDTH + ty;
    int Col = bx * TILE_WIDTH + tx;

    float Cvalue = 0;

    for (int m = 0; m < (numACols - 1) / TILE_WIDTH + 1; ++m) {
        if (Row < numARows && m * TILE_WIDTH + tx < numACols) {
            ds_A[ty][tx] = A[Row * numACols + m * TILE_WIDTH + tx];
        } else {
            ds_A[ty][tx] = 0.0;
        }

        if (Col < numBCols && m * TILE_WIDTH + ty < numACols) {
            ds_B[ty][tx] = B[(m * TILE_WIDTH + ty) * numBCols + Col];
        } else {
            ds_B[ty][tx] = 0.0;
        }

        __syncthreads();

        for (int e = 0; e < TILE_WIDTH; ++e) {
            Cvalue += ds_A[ty][e] * ds_B[e][tx];
        }

        __syncthreads();
    }

    if (Row < numARows && Col < numBCols) {
        C[Row * numBCols + Col] = Cvalue;
    }
}

// Error checking macro
#define cudaCheckError(err) (HandleError(err, __FILE__, __LINE__))

// Function to handle CUDA errors
static void HandleError(hipError_t err, const char *file, int line) {
    if (err != hipSuccess) {
        printf("%s in %s at line %d\n", hipGetErrorString(err), file, line);
        exit(EXIT_FAILURE);
    }
}

int main() {
    int numARows = 256, numACols = 256, numBCols = 256;
    float *h_A, *h_B, *h_C;
    float *d_A, *d_B, *d_C;

    // Allocate host memory
    h_A = (float*)malloc(numARows * numACols * sizeof(float));
    h_B = (float*)malloc(numACols * numBCols * sizeof(float));
    h_C = (float*)malloc(numARows * numBCols * sizeof(float));

    // Initialize matrices on the host
    for (int i = 0; i < numARows * numACols; i++) h_A[i] = 1.0f;
    for (int i = 0; i < numACols * numBCols; i++) h_B[i] = 2.0f;

    // Allocate device memory
    cudaCheckError(hipMalloc((void**)&d_A, numARows * numACols * sizeof(float)));
    cudaCheckError(hipMalloc((void**)&d_B, numACols * numBCols * sizeof(float)));
    cudaCheckError(hipMalloc((void**)&d_C, numARows * numBCols * sizeof(float)));

    // Copy matrices from host to device
    cudaCheckError(hipMemcpy(d_A, h_A, numARows * numACols * sizeof(float), hipMemcpyHostToDevice));
    cudaCheckError(hipMemcpy(d_B, h_B, numACols * numBCols * sizeof(float), hipMemcpyHostToDevice));

    // Set up execution configuration
    dim3 dimBlock(TILE_WIDTH, TILE_WIDTH);
    dim3 dimGrid((numBCols - 1) / TILE_WIDTH + 1, (numARows - 1) / TILE_WIDTH + 1);

    // Launch kernel
    matrixMulKernel<<<dimGrid, dimBlock>>>(d_C, d_A, d_B, numARows, numACols, numBCols);
    cudaCheckError(hipDeviceSynchronize());

    // Copy result back to host
    cudaCheckError(hipMemcpy(h_C, d_C, numARows * numBCols * sizeof(float), hipMemcpyDeviceToHost));

    // Free device memory
    cudaCheckError(hipFree(d_A));
    cudaCheckError(hipFree(d_B));
    cudaCheckError(hipFree(d_C));

    // Free host memory
    free(h_A);
    free(h_B);
    free(h_C);

    std::cout << "Matrix multiplication completed successfully!" << std::endl;
    return 0;
}
	.text
	.file	"cuda_code_034244.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z30__device_stub__matrixMulKernelPfS_S_iii # -- Begin function _Z30__device_stub__matrixMulKernelPfS_S_iii
	.type	_Z30__device_stub__matrixMulKernelPfS_S_iii,@function
_Z30__device_stub__matrixMulKernelPfS_S_iii: # @_Z30__device_stub__matrixMulKernelPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15matrixMulKernelPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__matrixMulKernelPfS_S_iii, .Lfunc_end0-_Z30__device_stub__matrixMulKernelPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$262144, %edi                   # imm = 0x40000
	callq	malloc
	movq	%rax, %rbx
	movl	$262144, %edi                   # imm = 0x40000
	callq	malloc
	movq	%rax, %r14
	movl	$262144, %edi                   # imm = 0x40000
	callq	malloc
	movq	%rax, %r15
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rbx,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$65536, %rax                    # imm = 0x10000
	jne	.LBB1_1
# %bb.2:                                # %.preheader.preheader
	xorl	%eax, %eax
.LBB1_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	$1073741824, (%r14,%rax,4)      # imm = 0x40000000
	incq	%rax
	cmpq	$65536, %rax                    # imm = 0x10000
	jne	.LBB1_3
# %bb.4:
	leaq	24(%rsp), %r13
	movl	$262144, %esi                   # imm = 0x40000
	movq	%r13, %rdi
	callq	hipMalloc
	movl	%eax, %edi
	movl	$72, %esi
	callq	_ZL11HandleError10hipError_tPKci
	leaq	16(%rsp), %r12
	movl	$262144, %esi                   # imm = 0x40000
	movq	%r12, %rdi
	callq	hipMalloc
	movl	%eax, %edi
	movl	$73, %esi
	callq	_ZL11HandleError10hipError_tPKci
	leaq	8(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	movl	%eax, %edi
	movl	$74, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	(%r13), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$77, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	(%r12), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$78, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movabsq	$68719476752, %rdi              # imm = 0x1000000010
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$256, %ecx                      # imm = 0x100
	movl	$256, %r8d                      # imm = 0x100
	movl	$256, %r9d                      # imm = 0x100
	callq	_Z30__device_stub__matrixMulKernelPfS_S_iii
.LBB1_6:
	callq	hipDeviceSynchronize
	movl	%eax, %edi
	movl	$86, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	8(%rsp), %rsi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$89, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	24(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	movl	$92, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	movl	$93, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	movl	$94, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.type	_ZL11HandleError10hipError_tPKci,@function # -- Begin function _ZL11HandleError10hipError_tPKci
_ZL11HandleError10hipError_tPKci:       # @_ZL11HandleError10hipError_tPKci
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB2_2
# %bb.1:
	retq
.LBB2_2:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%esi, %ebx
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	%ebx, %ecx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	_ZL11HandleError10hipError_tPKci, .Lfunc_end2-_ZL11HandleError10hipError_tPKci
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15matrixMulKernelPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15matrixMulKernelPfS_S_iii,@object # @_Z15matrixMulKernelPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z15matrixMulKernelPfS_S_iii
	.p2align	3, 0x0
_Z15matrixMulKernelPfS_S_iii:
	.quad	_Z30__device_stub__matrixMulKernelPfS_S_iii
	.size	_Z15matrixMulKernelPfS_S_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/home/ubuntu/Datasets/hip-codes-80k-from-llm-dedup-disassemble-sm89/cuda_code_034244.hip"
	.size	.L.str, 89

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Matrix multiplication completed successfully!"
	.size	.L.str.1, 46

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%s in %s at line %d\n"
	.size	.L.str.2, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15matrixMulKernelPfS_S_iii"
	.size	.L__unnamed_1, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__matrixMulKernelPfS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15matrixMulKernelPfS_S_iii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15matrixMulKernelPfS_S_iii ; -- Begin function _Z15matrixMulKernelPfS_S_iii
	.globl	_Z15matrixMulKernelPfS_S_iii
	.p2align	8
	.type	_Z15matrixMulKernelPfS_S_iii,@function
_Z15matrixMulKernelPfS_S_iii:           ; @_Z15matrixMulKernelPfS_S_iii
; %bb.0:
	s_clause 0x2
	s_load_b128 s[8:11], s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_bfe_u32 v2, v0, 10, 10
	v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v3, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v1, s15, 4, v2
	v_lshl_add_u32 v0, s14, 4, v3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s8, v1
	v_cmp_gt_i32_e64 s0, s10, v0
	s_cmp_lt_i32 s9, -14
	s_cbranch_scc1 .LBB0_14
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b32_e32 v4, 2, v3
	s_add_i32 s1, s9, -1
	v_lshlrev_b32_e32 v5, 6, v2
	s_ashr_i32 s11, s1, 31
	v_mul_lo_u32 v7, v1, s9
	v_add_nc_u32_e32 v6, 0x400, v4
	s_lshr_b32 s11, s11, 28
	v_add_nc_u32_e32 v8, v5, v4
	v_mov_b32_e32 v4, 0
	s_add_i32 s1, s1, s11
	v_add_nc_u32_e32 v9, v6, v5
	s_ashr_i32 s11, s1, 4
	s_mov_b32 s12, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_11 Depth 2
	v_mov_b32_e32 v10, 0
	s_and_saveexec_b32 s13, vcc_lo
	s_cbranch_execz .LBB0_6
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshl_add_u32 v11, s12, 4, v3
	v_mov_b32_e32 v10, 0
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e64 s9, v11
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v10, v11, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s1, s6, v10
	v_add_co_ci_u32_e64 v11, s1, s7, v11, s1
	global_load_b32 v10, v[10:11], off
.LBB0_5:                                ; %Flow92
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s13
	v_mov_b32_e32 v11, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v10
	s_and_saveexec_b32 s13, s0
	s_cbranch_execz .LBB0_10
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshl_add_u32 v10, s12, 4, v2
	v_mov_b32_e32 v11, 0
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e64 s9, v10
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mad_u64_u32 v[11:12], null, v10, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[10:11], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s1, s2, v10
	v_add_co_ci_u32_e64 v11, s1, s3, v11, s1
	global_load_b32 v11, v[10:11], off
.LBB0_9:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
.LBB0_10:                               ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s13
	v_mov_b32_e32 v10, v6
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_11:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v11, s1, v5
	s_add_i32 s1, s1, 4
	ds_load_b32 v12, v10
	ds_load_b32 v11, v11
	v_add_nc_u32_e32 v10, 64, v10
	s_cmp_eq_u32 s1, 64
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v4, v11, v12
	s_cbranch_scc0 .LBB0_11
; %bb.12:                               ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s1, s12, 1
	s_cmp_eq_u32 s12, s11
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s12, s1
	s_branch .LBB0_2
.LBB0_14:                               ; %Flow94
	v_cmp_gt_i32_e32 vcc_lo, s8, v1
	v_cmp_gt_i32_e64 s0, s10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_16
; %bb.15:
	v_mad_u64_u32 v[2:3], null, v1, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB0_16:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15matrixMulKernelPfS_S_iii
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15matrixMulKernelPfS_S_iii, .Lfunc_end0-_Z15matrixMulKernelPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 580
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15matrixMulKernelPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15matrixMulKernelPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
