#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>

namespace cg = cooperative_groups;

#define NUM_ELEMENTS 1024
#define NUM_LEVELS 4
#define WARP_SIZE 32

// Structure to represent a node in the skip list
struct SkipListNode {
    int value;
    int level;
    SkipListNode* next[NUM_LEVELS];
};

// Kernel to initialize the skip list
__global__ void initializeSkipListKernel(SkipListNode* d_nodes, int* d_heads) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < NUM_ELEMENTS) {
        d_nodes[idx].value = idx; // Simple initialization with index as value
        d_nodes[idx].level = 0;
        for (int i = 0; i < NUM_LEVELS; ++i) {
            d_nodes[idx].next[i] = nullptr;
        }
    }
    if (idx < NUM_LEVELS) {
        d_heads[idx] = -1; // Initialize heads to -1 indicating no node yet
    }
}

// Kernel to insert a node into the skip list
__global__ void insertNodeKernel(SkipListNode* d_nodes, int* d_heads, int value) {
    extern __shared__ SkipListNode* s_preds[];
    int idx = threadIdx.x;
    cg::thread_block cta = cg::this_thread_block();
    cg::thread_block_tile<WARP_SIZE> tile32 = cg::tiled_partition<WARP_SIZE>(cta);

    // Initialize preds and cursors
    SkipListNode* preds[NUM_LEVELS];
    SkipListNode* cursors[NUM_LEVELS];
    for (int i = 0; i < NUM_LEVELS; ++i) {
        preds[i] = nullptr;
        cursors[i] = nullptr;
    }

    // Find the position to insert the new node
    for (int level = NUM_LEVELS - 1; level >= 0; --level) {
        int pred_idx = d_heads[level];
        SkipListNode* pred = (pred_idx == -1) ? nullptr : &d_nodes[pred_idx];
        SkipListNode* cursor = pred;

        while (cursor != nullptr && cursor->value < value) {
            pred = cursor;
            cursor = cursor->next[level];
        }
        preds[level] = pred;
        cursors[level] = cursor;
    }

    // Insert the new node at the appropriate position
    SkipListNode* newNode = &d_nodes[value];
    for (int level = 0; level < NUM_LEVELS; ++level) {
        newNode->next[level] = cursors[level];
        if (preds[level] == nullptr) {
            d_heads[level] = value;
        } else {
            preds[level]->next[level] = newNode;
        }
    }
}

int main() {
    SkipListNode* d_nodes;
    int* d_heads;

    // Allocate memory for nodes and heads
    cudaError_t err = cudaMalloc(&d_nodes, NUM_ELEMENTS * sizeof(SkipListNode));
    if (err != cudaSuccess) {
        std::cerr << "Error allocating memory for nodes: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMalloc(&d_heads, NUM_LEVELS * sizeof(int));
    if (err != cudaSuccess) {
        std::cerr << "Error allocating memory for heads: " << cudaGetErrorString(err) << std::endl;
        cudaFree(d_nodes);
        return -1;
    }

    // Initialize the skip list
    int blockSize = 256;
    int numBlocks = (NUM_ELEMENTS + blockSize - 1) / blockSize;
    initializeSkipListKernel<<<numBlocks, blockSize>>>(d_nodes, d_heads);
    err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Error in initializeSkipListKernel: " << cudaGetErrorString(err) << std::endl;
        cudaFree(d_nodes);
        cudaFree(d_heads);
        return -1;
    }

    // Insert nodes into the skip list
    int sharedMemSize = NUM_LEVELS * sizeof(SkipListNode*);
    for (int i = 0; i < NUM_ELEMENTS; ++i) {
        insertNodeKernel<<<1, WARP_SIZE, sharedMemSize>>>(d_nodes, d_heads, i);
        err = cudaGetLastError();
        if (err != cudaSuccess) {
            std::cerr << "Error in insertNodeKernel for value " << i << ": " << cudaGetErrorString(err) << std::endl;
            cudaFree(d_nodes);
            cudaFree(d_heads);
            return -1;
        }
    }

    // Free allocated memory
    cudaFree(d_nodes);
    cudaFree(d_heads);

    std::cout << "Skip list operations completed successfully." << std::endl;
    return 0;
}
	.file	"tmpxft_000148ad_00000000-6_cuda_code_037534.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6835:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6835:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB7721:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE7721:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z59__device_stub__Z24initializeSkipListKernelP12SkipListNodePiP12SkipListNodePi
	.type	_Z59__device_stub__Z24initializeSkipListKernelP12SkipListNodePiP12SkipListNodePi, @function
_Z59__device_stub__Z24initializeSkipListKernelP12SkipListNodePiP12SkipListNodePi:
.LFB6857:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z24initializeSkipListKernelP12SkipListNodePi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L3:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6857:
	.size	_Z59__device_stub__Z24initializeSkipListKernelP12SkipListNodePiP12SkipListNodePi, .-_Z59__device_stub__Z24initializeSkipListKernelP12SkipListNodePiP12SkipListNodePi
	.globl	_Z24initializeSkipListKernelP12SkipListNodePi
	.type	_Z24initializeSkipListKernelP12SkipListNodePi, @function
_Z24initializeSkipListKernelP12SkipListNodePi:
.LFB6858:
	.cfi_startproc
	endbr64
	jmp	_Z59__device_stub__Z24initializeSkipListKernelP12SkipListNodePiP12SkipListNodePi
	.cfi_endproc
.LFE6858:
	.size	_Z24initializeSkipListKernelP12SkipListNodePi, .-_Z24initializeSkipListKernelP12SkipListNodePi
	.globl	_Z52__device_stub__Z16insertNodeKernelP12SkipListNodePiiP12SkipListNodePii
	.type	_Z52__device_stub__Z16insertNodeKernelP12SkipListNodePiiP12SkipListNodePii, @function
_Z52__device_stub__Z16insertNodeKernelP12SkipListNodePiiP12SkipListNodePii:
.LFB6859:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16insertNodeKernelP12SkipListNodePii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L9:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6859:
	.size	_Z52__device_stub__Z16insertNodeKernelP12SkipListNodePiiP12SkipListNodePii, .-_Z52__device_stub__Z16insertNodeKernelP12SkipListNodePiiP12SkipListNodePii
	.globl	_Z16insertNodeKernelP12SkipListNodePii
	.type	_Z16insertNodeKernelP12SkipListNodePii, @function
_Z16insertNodeKernelP12SkipListNodePii:
.LFB6860:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z16insertNodeKernelP12SkipListNodePiiP12SkipListNodePii
	.cfi_endproc
.LFE6860:
	.size	_Z16insertNodeKernelP12SkipListNodePii, .-_Z16insertNodeKernelP12SkipListNodePii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error allocating memory for nodes: "
.LC1:
	.string	"Error allocating memory for heads: "
.LC2:
	.string	"Error in initializeSkipListKernel: "
.LC3:
	.string	"Error in insertNodeKernel for value "
.LC4:
	.string	": "
.LC5:
	.string	"Skip list operations completed successfully."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6832:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$40960, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L15
	movl	%eax, %ebx
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L16
.L15:
	leaq	8(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L17
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
.L28:
	call	cudaFree@PLT
.L16:
	orl	$-1, %eax
	jmp	.L14
.L17:
	movl	$16777217, %edx
	movl	$1073741825, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z59__device_stub__Z24initializeSkipListKernelP12SkipListNodePiP12SkipListNodePi
.L19:
	call	cudaGetLastError@PLT
	xorl	%ebx, %ebx
	movabsq	$4294967328, %r12
	leaq	.LC2(%rip), %rsi
	movl	%eax, %ebp
	leaq	_ZSt4cerr(%rip), %rdi
	testl	%eax, %eax
	jne	.L29
.L20:
	xorl	%r9d, %r9d
	movq	%r12, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$32, %r8d
	movq	%r12, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z52__device_stub__Z16insertNodeKernelP12SkipListNodePiiP12SkipListNodePii
.L21:
	call	cudaGetLastError@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L22
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
.L29:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	jmp	.L28
.L22:
	incl	%ebx
	cmpl	$1024, %ebx
	jne	.L20
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%eax, %eax
.L14:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6832:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z16insertNodeKernelP12SkipListNodePii"
.LC7:
	.string	"_Z24initializeSkipListKernelP12SkipListNodePi"
.LC8:
	.string	"_ZN50_INTERNAL_8d24d616_19_cuda_code_037534_cu_ca98318d4cuda3std3__419piecewise_constructE"
.LC9:
	.string	"_ZN50_INTERNAL_8d24d616_19_cuda_code_037534_cu_ca98318d4cuda3std6ranges3__45__cpo4swapE"
.LC10:
	.string	"_ZN50_INTERNAL_8d24d616_19_cuda_code_037534_cu_ca98318d4cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6862:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16insertNodeKernelP12SkipListNodePii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z24initializeSkipListKernelP12SkipListNodePi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6862:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>

namespace cg = cooperative_groups;

#define NUM_ELEMENTS 1024
#define NUM_LEVELS 4
#define WARP_SIZE 32

// Structure to represent a node in the skip list
struct SkipListNode {
    int value;
    int level;
    SkipListNode* next[NUM_LEVELS];
};

// Kernel to initialize the skip list
__global__ void initializeSkipListKernel(SkipListNode* d_nodes, int* d_heads) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < NUM_ELEMENTS) {
        d_nodes[idx].value = idx; // Simple initialization with index as value
        d_nodes[idx].level = 0;
        for (int i = 0; i < NUM_LEVELS; ++i) {
            d_nodes[idx].next[i] = nullptr;
        }
    }
    if (idx < NUM_LEVELS) {
        d_heads[idx] = -1; // Initialize heads to -1 indicating no node yet
    }
}

// Kernel to insert a node into the skip list
__global__ void insertNodeKernel(SkipListNode* d_nodes, int* d_heads, int value) {
    extern __shared__ SkipListNode* s_preds[];
    int idx = threadIdx.x;
    cg::thread_block cta = cg::this_thread_block();
    cg::thread_block_tile<WARP_SIZE> tile32 = cg::tiled_partition<WARP_SIZE>(cta);

    // Initialize preds and cursors
    SkipListNode* preds[NUM_LEVELS];
    SkipListNode* cursors[NUM_LEVELS];
    for (int i = 0; i < NUM_LEVELS; ++i) {
        preds[i] = nullptr;
        cursors[i] = nullptr;
    }

    // Find the position to insert the new node
    for (int level = NUM_LEVELS - 1; level >= 0; --level) {
        int pred_idx = d_heads[level];
        SkipListNode* pred = (pred_idx == -1) ? nullptr : &d_nodes[pred_idx];
        SkipListNode* cursor = pred;

        while (cursor != nullptr && cursor->value < value) {
            pred = cursor;
            cursor = cursor->next[level];
        }
        preds[level] = pred;
        cursors[level] = cursor;
    }

    // Insert the new node at the appropriate position
    SkipListNode* newNode = &d_nodes[value];
    for (int level = 0; level < NUM_LEVELS; ++level) {
        newNode->next[level] = cursors[level];
        if (preds[level] == nullptr) {
            d_heads[level] = value;
        } else {
            preds[level]->next[level] = newNode;
        }
    }
}

int main() {
    SkipListNode* d_nodes;
    int* d_heads;

    // Allocate memory for nodes and heads
    hipError_t err = hipMalloc(&d_nodes, NUM_ELEMENTS * sizeof(SkipListNode));
    if (err != hipSuccess) {
        std::cerr << "Error allocating memory for nodes: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMalloc(&d_heads, NUM_LEVELS * sizeof(int));
    if (err != hipSuccess) {
        std::cerr << "Error allocating memory for heads: " << hipGetErrorString(err) << std::endl;
        hipFree(d_nodes);
        return -1;
    }

    // Initialize the skip list
    int blockSize = 256;
    int numBlocks = (NUM_ELEMENTS + blockSize - 1) / blockSize;
    initializeSkipListKernel<<<numBlocks, blockSize>>>(d_nodes, d_heads);
    err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Error in initializeSkipListKernel: " << hipGetErrorString(err) << std::endl;
        hipFree(d_nodes);
        hipFree(d_heads);
        return -1;
    }

    // Insert nodes into the skip list
    int sharedMemSize = NUM_LEVELS * sizeof(SkipListNode*);
    for (int i = 0; i < NUM_ELEMENTS; ++i) {
        insertNodeKernel<<<1, WARP_SIZE, sharedMemSize>>>(d_nodes, d_heads, i);
        err = hipGetLastError();
        if (err != hipSuccess) {
            std::cerr << "Error in insertNodeKernel for value " << i << ": " << hipGetErrorString(err) << std::endl;
            hipFree(d_nodes);
            hipFree(d_heads);
            return -1;
        }
    }

    // Free allocated memory
    hipFree(d_nodes);
    hipFree(d_heads);

    std::cout << "Skip list operations completed successfully." << std::endl;
    return 0;
}
	.text
	.file	"cuda_code_037534.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z39__device_stub__initializeSkipListKernelP12SkipListNodePi # -- Begin function _Z39__device_stub__initializeSkipListKernelP12SkipListNodePi
	.type	_Z39__device_stub__initializeSkipListKernelP12SkipListNodePi,@function
_Z39__device_stub__initializeSkipListKernelP12SkipListNodePi: # @_Z39__device_stub__initializeSkipListKernelP12SkipListNodePi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24initializeSkipListKernelP12SkipListNodePi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z39__device_stub__initializeSkipListKernelP12SkipListNodePi, .Lfunc_end0-_Z39__device_stub__initializeSkipListKernelP12SkipListNodePi
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__insertNodeKernelP12SkipListNodePii # -- Begin function _Z31__device_stub__insertNodeKernelP12SkipListNodePii
	.type	_Z31__device_stub__insertNodeKernelP12SkipListNodePii,@function
_Z31__device_stub__insertNodeKernelP12SkipListNodePii: # @_Z31__device_stub__insertNodeKernelP12SkipListNodePii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16insertNodeKernelP12SkipListNodePii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__insertNodeKernelP12SkipListNodePii, .Lfunc_end1-_Z31__device_stub__insertNodeKernelP12SkipListNodePii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	8(%rsp), %rdi
	movl	$40960, %esi                    # imm = 0xA000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB2_3
# %bb.1:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB2_6
# %bb.2:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_7
.LBB2_3:
	leaq	16(%rsp), %rdi
	movl	$16, %esi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB2_8
# %bb.4:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB2_13
# %bb.5:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_14
.LBB2_6:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_7:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	jmp	.LBB2_29
.LBB2_8:
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	leaq	3(%rbx), %rdi
	leaq	255(%rbx), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.9:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	callq	_Z39__device_stub__initializeSkipListKernelP12SkipListNodePi
.LBB2_10:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB2_15
# %bb.11:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB2_21
# %bb.12:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_22
.LBB2_13:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_14:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit37
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	8(%rsp), %rdi
	jmp	.LBB2_28
.LBB2_15:                               # %.preheader.preheader
	xorl	%r14d, %r14d
	leaq	31(%rbx), %r15
.LBB2_16:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_18
# %bb.17:                               #   in Loop: Header=BB2_16 Depth=1
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	%r14d, %edx
	callq	_Z31__device_stub__insertNodeKernelP12SkipListNodePii
.LBB2_18:                               #   in Loop: Header=BB2_16 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_23
# %bb.19:                               #   in Loop: Header=BB2_16 Depth=1
	incl	%r14d
	cmpl	$1024, %r14d                    # imm = 0x400
	jne	.LBB2_16
# %bb.20:
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$44, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	jmp	.LBB2_30
.LBB2_21:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_22:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit39
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	jmp	.LBB2_27
.LBB2_23:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$36, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cerr, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.4, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB2_25
# %bb.24:
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	strlen
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_26
.LBB2_25:
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	movq	%rbx, %rdi
	addq	%rax, %rdi
	movl	32(%rbx,%rax), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_26:
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
.LBB2_27:
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
.LBB2_28:
	callq	hipFree
.LBB2_29:
	movl	$-1, %eax
.LBB2_30:
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24initializeSkipListKernelP12SkipListNodePi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16insertNodeKernelP12SkipListNodePii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z24initializeSkipListKernelP12SkipListNodePi,@object # @_Z24initializeSkipListKernelP12SkipListNodePi
	.section	.rodata,"a",@progbits
	.globl	_Z24initializeSkipListKernelP12SkipListNodePi
	.p2align	3, 0x0
_Z24initializeSkipListKernelP12SkipListNodePi:
	.quad	_Z39__device_stub__initializeSkipListKernelP12SkipListNodePi
	.size	_Z24initializeSkipListKernelP12SkipListNodePi, 8

	.type	_Z16insertNodeKernelP12SkipListNodePii,@object # @_Z16insertNodeKernelP12SkipListNodePii
	.globl	_Z16insertNodeKernelP12SkipListNodePii
	.p2align	3, 0x0
_Z16insertNodeKernelP12SkipListNodePii:
	.quad	_Z31__device_stub__insertNodeKernelP12SkipListNodePii
	.size	_Z16insertNodeKernelP12SkipListNodePii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error allocating memory for nodes: "
	.size	.L.str, 36

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Error allocating memory for heads: "
	.size	.L.str.1, 36

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Error in initializeSkipListKernel: "
	.size	.L.str.2, 36

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Error in insertNodeKernel for value "
	.size	.L.str.3, 37

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	": "
	.size	.L.str.4, 3

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Skip list operations completed successfully."
	.size	.L.str.5, 45

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z24initializeSkipListKernelP12SkipListNodePi"
	.size	.L__unnamed_1, 46

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16insertNodeKernelP12SkipListNodePii"
	.size	.L__unnamed_2, 39

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z39__device_stub__initializeSkipListKernelP12SkipListNodePi
	.addrsig_sym _Z31__device_stub__insertNodeKernelP12SkipListNodePii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z24initializeSkipListKernelP12SkipListNodePi
	.addrsig_sym _Z16insertNodeKernelP12SkipListNodePii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z24initializeSkipListKernelP12SkipListNodePi ; -- Begin function _Z24initializeSkipListKernelP12SkipListNodePi
	.globl	_Z24initializeSkipListKernelP12SkipListNodePi
	.p2align	8
	.type	_Z24initializeSkipListKernelP12SkipListNodePi,@function
_Z24initializeSkipListKernelP12SkipListNodePi: ; @_Z24initializeSkipListKernelP12SkipListNodePi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_i32_e32 0x400, v1
; %bb.1:                                ; %.loopexit.loopexit
	s_mov_b32 s8, 0
	v_mad_i64_i32 v[7:8], null, v1, 40, s[0:1]
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, s8
	v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10
	v_mov_b32_e32 v6, s11
	s_clause 0x2
	global_store_b64 v[7:8], v[1:2], off
	global_store_b128 v[7:8], v[3:6], off offset:8
	global_store_b128 v[7:8], v[3:6], off offset:24
; %bb.2:                                ; %.loopexit
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_i32_e32 4, v1
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_mov_b32_e32 v2, -1
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24initializeSkipListKernelP12SkipListNodePi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z24initializeSkipListKernelP12SkipListNodePi, .Lfunc_end0-_Z24initializeSkipListKernelP12SkipListNodePi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 204
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16insertNodeKernelP12SkipListNodePii ; -- Begin function _Z16insertNodeKernelP12SkipListNodePii
	.globl	_Z16insertNodeKernelP12SkipListNodePii
	.p2align	8
	.type	_Z16insertNodeKernelP12SkipListNodePii,@function
_Z16insertNodeKernelP12SkipListNodePii: ; @_Z16insertNodeKernelP12SkipListNodePii
; %bb.0:
	s_mov_b64 s[2:3], 0
                                        ; implicit-def: $sgpr4_sgpr5
                                        ; implicit-def: $sgpr12_sgpr13
.LBB1_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, 2
	s_cselect_b32 s9, 0, s9
	s_cselect_b32 s8, 0, s8
	s_cselect_b32 s16, 0, s16
	s_cselect_b32 s17, 0, s17
	s_cmp_eq_u32 s2, 1
	s_cselect_b32 s6, 0, s6
	s_cselect_b32 s7, 0, s7
	s_cselect_b32 s15, 0, s15
	s_cselect_b32 s14, 0, s14
	s_cmp_eq_u32 s2, 3
	s_cselect_b32 s11, 0, s11
	s_cselect_b32 s10, 0, s10
	s_cselect_b32 s18, 0, s18
	s_cselect_b32 s19, 0, s19
	s_cmp_eq_u32 s2, 0
	s_cselect_b32 s5, 0, s5
	s_cselect_b32 s4, 0, s4
	s_cselect_b32 s13, 0, s13
	s_cselect_b32 s12, 0, s12
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 4
	s_cbranch_scc1 .LBB1_1
; %bb.2:                                ; %.preheader.preheader
	s_clause 0x1
	s_load_b128 s[20:23], s[0:1], 0x0
	s_load_b32 s24, s[0:1], 0x10
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v9, s13
	v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s7
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, s9
	v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, s11
	v_dual_mov_b32 v10, s14 :: v_dual_mov_b32 v11, s15
	v_dual_mov_b32 v12, s16 :: v_dual_mov_b32 v13, s17
	v_dual_mov_b32 v14, s18 :: v_dual_mov_b32 v15, s19
	s_mov_b32 s4, 3
	s_mov_b32 s5, 0
.LBB1_3:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_6 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	v_mov_b32_e32 v18, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s22, s0
	s_addc_u32 s1, s23, s1
	v_mov_b32_e32 v19, 0
	s_load_b32 s0, s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v16, v18 :: v_dual_mov_b32 v17, v19
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s1, s0, 31
	s_mul_hi_i32 s2, s0, 40
	s_cmp_eq_u64 s[0:1], -1
	s_mul_i32 s0, s0, 40
	s_cselect_b32 s3, -1, 0
	s_add_u32 s0, s20, s0
	s_addc_u32 s1, s21, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u64 s[0:1], 0
	s_cselect_b32 s2, -1, 0
	s_or_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB1_10
; %bb.4:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_load_b32 s2, s[0:1], 0x0
	v_dual_mov_b32 v17, s1 :: v_dual_mov_b32 v16, s0
	v_dual_mov_b32 v19, s1 :: v_dual_mov_b32 v18, s0
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s2, s24
	s_cbranch_scc1 .LBB1_10
; %bb.5:                                ; %.lr.ph104.preheader
                                        ;   in Loop: Header=BB1_3 Depth=1
	v_dual_mov_b32 v21, s1 :: v_dual_mov_b32 v20, s0
	s_mov_b32 s2, 0
	s_lshl_b64 s[0:1], s[4:5], 3
                                        ; implicit-def: $sgpr3
.LBB1_6:                                ; %.lr.ph104
                                        ;   Parent Loop BB1_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v18, v20 :: v_dual_mov_b32 v19, v21
	s_or_b32 s3, s3, exec_lo
	s_mov_b32 s6, exec_lo
	v_add_co_u32 v16, vcc_lo, v18, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, s1, v19, vcc_lo
	flat_load_b64 v[20:21], v[16:17] offset:8
	v_mov_b32_e32 v16, 0
	v_mov_b32_e32 v17, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u64_e32 0, v[20:21]
	s_cbranch_execz .LBB1_8
; %bb.7:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_6 Depth=2
	flat_load_b32 v16, v[20:21]
	s_and_not1_b32 s3, s3, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, s24, v16
	v_dual_mov_b32 v16, v20 :: v_dual_mov_b32 v17, v21
	s_and_b32 s7, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s3, s3, s7
.LBB1_8:                                ; %Flow141
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s6, exec_lo, s3
	s_or_b32 s2, s6, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB1_6
; %bb.9:                                ; %Flow142
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_10:                               ; %.critedge
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_cmp_eq_u32 s4, 3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 2
	v_dual_cndmask_b32 v7, v7, v19 :: v_dual_cndmask_b32 v6, v6, v18
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 1
	v_cndmask_b32_e64 v5, v5, v19, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s4, 0
	v_cndmask_b32_e64 v4, v4, v18, s0
	s_cselect_b32 s2, -1, 0
	v_cndmask_b32_e64 v3, v3, v19, s1
	v_cndmask_b32_e64 v2, v2, v18, s1
	v_cndmask_b32_e64 v1, v1, v19, s2
	v_cndmask_b32_e64 v0, v0, v18, s2
	v_dual_cndmask_b32 v15, v15, v17 :: v_dual_cndmask_b32 v14, v14, v16
	v_cndmask_b32_e64 v13, v13, v17, s0
	v_cndmask_b32_e64 v12, v12, v16, s0
	v_cndmask_b32_e64 v11, v11, v17, s1
	v_cndmask_b32_e64 v10, v10, v16, s1
	v_cndmask_b32_e64 v9, v9, v17, s2
	v_cndmask_b32_e64 v8, v8, v16, s2
	s_and_b32 vcc_lo, exec_lo, s2
	s_add_i32 s4, s4, -1
	s_cbranch_vccz .LBB1_3
; %bb.11:
	s_mul_i32 s0, s24, 40
	v_mov_b32_e32 v18, 0
	s_mul_hi_i32 s1, s24, 40
	s_add_u32 s2, s20, s0
	s_addc_u32 s3, s21, s1
	s_mov_b64 s[4:5], 8
	s_mov_b64 s[6:7], 0
.LBB1_12:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v16, v9, v11 :: v_dual_cndmask_b32 v19, v0, v2
	s_cselect_b32 s0, -1, 0
	v_cndmask_b32_e32 v21, v8, v10, vcc_lo
	s_cmp_eq_u32 s6, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v16, v16, v13, s0
	v_cndmask_b32_e64 v19, v19, v4, s0
	v_cndmask_b32_e32 v17, v1, v3, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v21, v21, v12, s0
	v_cndmask_b32_e32 v20, v16, v15, vcc_lo
	v_cndmask_b32_e32 v16, v19, v6, vcc_lo
	v_cndmask_b32_e64 v17, v17, v5, s0
	s_add_u32 s0, s2, s4
	v_cndmask_b32_e32 v19, v21, v14, vcc_lo
	s_addc_u32 s1, s3, s5
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v17, v17, v7, vcc_lo
	global_store_b64 v18, v[19:20], s[0:1]
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u64_e32 0, v[16:17]
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB1_14
; %bb.13:                               ;   in Loop: Header=BB1_12 Depth=1
	v_add_co_u32 v16, vcc_lo, v16, s4
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v17, vcc_lo
	v_dual_mov_b32 v20, s3 :: v_dual_mov_b32 v19, s2
	flat_store_b64 v[16:17], v[19:20]
.LBB1_14:                               ; %Flow
                                        ;   in Loop: Header=BB1_12 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB1_16
; %bb.15:                               ;   in Loop: Header=BB1_12 Depth=1
	v_mov_b32_e32 v16, s24
	global_store_b32 v18, v16, s[22:23]
.LBB1_16:                               ;   in Loop: Header=BB1_12 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	s_add_u32 s6, s6, 1
	s_addc_u32 s7, s7, 0
	s_add_u32 s22, s22, 4
	s_addc_u32 s23, s23, 0
	s_cmp_eq_u32 s4, 40
	s_cbranch_scc0 .LBB1_12
; %bb.17:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16insertNodeKernelP12SkipListNodePii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 25
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16insertNodeKernelP12SkipListNodePii, .Lfunc_end1-_Z16insertNodeKernelP12SkipListNodePii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 896
; NumSgprs: 27
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 27
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24initializeSkipListKernelP12SkipListNodePi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z24initializeSkipListKernelP12SkipListNodePi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16insertNodeKernelP12SkipListNodePii
    .private_segment_fixed_size: 0
    .sgpr_count:     27
    .sgpr_spill_count: 0
    .symbol:         _Z16insertNodeKernelP12SkipListNodePii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     22
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
