#include <iostream>
#include <cuda_runtime.h>
#include <vector>

// Kernel for sparse matrix-vector multiplication
// Uses CSR (Compressed Sparse Row) format for the matrix
__global__ void sparseMatVecMul(const int* rowPtr, const int* colIdx, const float* values, const float* x, float* y, int num_rows) {
    extern __shared__ float sdata[];

    int row = blockIdx.x * blockDim.x + threadIdx.x;
    float sum = 0.0f;

    if (row < num_rows) {
        int row_start = rowPtr[row];
        int row_end = rowPtr[row + 1];

        // Load relevant data into shared memory
        int num_nonzero = row_end - row_start;
        int num_threads = blockDim.x;
        int tid = threadIdx.x;

        for (int j = 0; j < num_nonzero; j += num_threads) {
            int idx = row_start + j + tid;
            if (idx < row_end) {
                sdata[tid] = values[idx] * x[colIdx[idx]];
            } else {
                sdata[tid] = 0.0f;
            }
            __syncthreads();

            // Reduce in shared memory
            for (int s = num_threads / 2; s > 0; s >>= 1) {
                if (tid < s) {
                    sdata[tid] += sdata[tid + s];
                }
                __syncthreads();
            }

            if (tid == 0) {
                sum += sdata[0];
            }
        }
        y[row] = sum;
    }
}

int main() {
    // Example sparse matrix in CSR format
    // 4x4 matrix with 6 non-zero elements
    // | 1 0 0 0 |
    // | 0 2 0 0 |
    // | 0 0 3 0 |
    // | 0 0 0 4 |

    const int num_rows = 4;
    const int num_nonzeros = 6;

    int h_rowPtr[] = {0, 1, 2, 3, 4};
    int h_colIdx[] = {0, 1, 2, 3};
    float h_values[] = {1.0f, 2.0f, 3.0f, 4.0f};

    float h_x[] = {1.0f, 2.0f, 3.0f, 4.0f}; // Input vector
    float h_y[num_rows]; // Output vector

    // Allocate device memory
    int* d_rowPtr;
    int* d_colIdx;
    float* d_values;
    float* d_x;
    float* d_y;

    cudaError_t err;

    err = cudaMalloc((void**)&d_rowPtr, (num_rows + 1) * sizeof(int));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate d_rowPtr" << std::endl;
        return -1;
    }

    err = cudaMalloc((void**)&d_colIdx, num_nonzeros * sizeof(int));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate d_colIdx" << std::endl;
        return -1;
    }

    err = cudaMalloc((void**)&d_values, num_nonzeros * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate d_values" << std::endl;
        return -1;
    }

    err = cudaMalloc((void**)&d_x, num_rows * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate d_x" << std::endl;
        return -1;
    }

    err = cudaMalloc((void**)&d_y, num_rows * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate d_y" << std::endl;
        return -1;
    }

    // Copy data to device
    cudaMemcpy(d_rowPtr, h_rowPtr, (num_rows + 1) * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_colIdx, h_colIdx, num_nonzeros * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_values, h_values, num_nonzeros * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_x, h_x, num_rows * sizeof(float), cudaMemcpyHostToDevice);

    // Launch kernel
    int blockSize = 256;
    int numBlocks = (num_rows + blockSize - 1) / blockSize;
    int sharedMemSize = blockSize * sizeof(float);

    sparseMatVecMul<<<numBlocks, blockSize, sharedMemSize>>>(d_rowPtr, d_colIdx, d_values, d_x, d_y, num_rows);

    // Check for kernel launch errors
    err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Kernel launch failed: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy result back to host
    cudaMemcpy(h_y, d_y, num_rows * sizeof(float), cudaMemcpyDeviceToHost);

    // Print result
    std::cout << "Result vector y: ";
    for (int i = 0; i < num_rows; ++i) {
        std::cout << h_y[i] << " ";
    }
    std::cout << std::endl;

    // Free device memory
    cudaFree(d_rowPtr);
    cudaFree(d_colIdx);
    cudaFree(d_values);
    cudaFree(d_x);
    cudaFree(d_y);

    return 0;
}
	.file	"tmpxft_0002f19f_00000000-6_cuda_code_036489.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4001:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4001:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4656:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4656:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z48__device_stub__Z15sparseMatVecMulPKiS0_PKfS2_PfiPKiS0_PKfS2_Pfi
	.type	_Z48__device_stub__Z15sparseMatVecMulPKiS0_PKfS2_PfiPKiS0_PKfS2_Pfi, @function
_Z48__device_stub__Z15sparseMatVecMulPKiS0_PKfS2_PfiPKiS0_PKfS2_Pfi:
.LFB4023:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15sparseMatVecMulPKiS0_PKfS2_Pfi(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L3:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4023:
	.size	_Z48__device_stub__Z15sparseMatVecMulPKiS0_PKfS2_PfiPKiS0_PKfS2_Pfi, .-_Z48__device_stub__Z15sparseMatVecMulPKiS0_PKfS2_PfiPKiS0_PKfS2_Pfi
	.globl	_Z15sparseMatVecMulPKiS0_PKfS2_Pfi
	.type	_Z15sparseMatVecMulPKiS0_PKfS2_Pfi, @function
_Z15sparseMatVecMulPKiS0_PKfS2_Pfi:
.LFB4024:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z15sparseMatVecMulPKiS0_PKfS2_PfiPKiS0_PKfS2_Pfi
	.cfi_endproc
.LFE4024:
	.size	_Z15sparseMatVecMulPKiS0_PKfS2_Pfi, .-_Z15sparseMatVecMulPKiS0_PKfS2_Pfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Failed to allocate d_rowPtr"
.LC1:
	.string	"Failed to allocate d_colIdx"
.LC2:
	.string	"Failed to allocate d_values"
.LC3:
	.string	"Failed to allocate d_x"
.LC4:
	.string	"Failed to allocate d_y"
.LC5:
	.string	"Kernel launch failed: "
.LC6:
	.string	"Result vector y: "
.LC7:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3998:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$1, %edx
	movl	$20, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	salq	$32, %rdx
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$168, %rsp
	.cfi_def_cfa_offset 208
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	movq	%rdx, 132(%rsp)
	movabsq	$12884901890, %rax
	movq	%rax, 140(%rsp)
	movq	%rdx, 68(%rsp)
	movabsq	$4611686019492741120, %rdx
	movq	%rax, 76(%rsp)
	movabsq	$4647714816524288000, %rax
	movl	$4, 148(%rsp)
	movq	%rdx, 84(%rsp)
	movq	%rax, 92(%rsp)
	movq	%rdx, 100(%rsp)
	movq	%rax, 108(%rsp)
	call	cudaMalloc@PLT
	leaq	.LC0(%rip), %rsi
	testl	%eax, %eax
	jne	.L23
	leaq	8(%rsp), %rdi
	movl	$24, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L12
	leaq	.LC1(%rip), %rsi
.L23:
	leaq	_ZSt4cerr(%rip), %rdi
.L24:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	orl	$-1, %eax
	jmp	.L9
.L12:
	movl	$24, %esi
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC2(%rip), %rsi
	testl	%eax, %eax
	jne	.L23
	movl	$16, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC3(%rip), %rsi
	testl	%eax, %eax
	jne	.L23
	movl	$16, %esi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC4(%rip), %rsi
	testl	%eax, %eax
	jne	.L23
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$20, %edx
	leaq	132(%rsp), %rsi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	leaq	68(%rsp), %rsi
	movl	$1, %ecx
	movl	$24, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	leaq	84(%rsp), %rsi
	movl	$1, %ecx
	movl	$24, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	leaq	100(%rsp), %rsi
	movl	$1, %ecx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rdi
	salq	$8, %rdx
	movl	$1024, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	32(%rsp), %r8
	movq	24(%rsp), %rcx
	movl	$4, %r9d
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z48__device_stub__Z15sparseMatVecMulPKiS0_PKfS2_PfiPKiS0_PKfS2_Pfi
.L17:
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L18
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	jmp	.L24
.L18:
	movq	32(%rsp), %rsi
	leaq	116(%rsp), %r12
	xorl	%ebx, %ebx
	movl	$2, %ecx
	movl	$16, %edx
	movq	%r12, %rdi
	leaq	_ZSt4cout(%rip), %rbp
	call	cudaMemcpy@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rbp, %rdi
	leaq	.LC7(%rip), %r13
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L19:
	movq	%rbp, %rdi
	cvtss2sd	(%r12,%rbx,4), %xmm0
	incq	%rbx
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$4, %rbx
	jne	.L19
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L9:
	movq	152(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$168, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3998:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z15sparseMatVecMulPKiS0_PKfS2_Pfi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4026:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15sparseMatVecMulPKiS0_PKfS2_Pfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4026:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <vector>

// Kernel for sparse matrix-vector multiplication
// Uses CSR (Compressed Sparse Row) format for the matrix
__global__ void sparseMatVecMul(const int* rowPtr, const int* colIdx, const float* values, const float* x, float* y, int num_rows) {
    extern __shared__ float sdata[];

    int row = blockIdx.x * blockDim.x + threadIdx.x;
    float sum = 0.0f;

    if (row < num_rows) {
        int row_start = rowPtr[row];
        int row_end = rowPtr[row + 1];

        // Load relevant data into shared memory
        int num_nonzero = row_end - row_start;
        int num_threads = blockDim.x;
        int tid = threadIdx.x;

        for (int j = 0; j < num_nonzero; j += num_threads) {
            int idx = row_start + j + tid;
            if (idx < row_end) {
                sdata[tid] = values[idx] * x[colIdx[idx]];
            } else {
                sdata[tid] = 0.0f;
            }
            __syncthreads();

            // Reduce in shared memory
            for (int s = num_threads / 2; s > 0; s >>= 1) {
                if (tid < s) {
                    sdata[tid] += sdata[tid + s];
                }
                __syncthreads();
            }

            if (tid == 0) {
                sum += sdata[0];
            }
        }
        y[row] = sum;
    }
}

int main() {
    // Example sparse matrix in CSR format
    // 4x4 matrix with 6 non-zero elements
    // | 1 0 0 0 |
    // | 0 2 0 0 |
    // | 0 0 3 0 |
    // | 0 0 0 4 |

    const int num_rows = 4;
    const int num_nonzeros = 6;

    int h_rowPtr[] = {0, 1, 2, 3, 4};
    int h_colIdx[] = {0, 1, 2, 3};
    float h_values[] = {1.0f, 2.0f, 3.0f, 4.0f};

    float h_x[] = {1.0f, 2.0f, 3.0f, 4.0f}; // Input vector
    float h_y[num_rows]; // Output vector

    // Allocate device memory
    int* d_rowPtr;
    int* d_colIdx;
    float* d_values;
    float* d_x;
    float* d_y;

    hipError_t err;

    err = hipMalloc((void**)&d_rowPtr, (num_rows + 1) * sizeof(int));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate d_rowPtr" << std::endl;
        return -1;
    }

    err = hipMalloc((void**)&d_colIdx, num_nonzeros * sizeof(int));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate d_colIdx" << std::endl;
        return -1;
    }

    err = hipMalloc((void**)&d_values, num_nonzeros * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate d_values" << std::endl;
        return -1;
    }

    err = hipMalloc((void**)&d_x, num_rows * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate d_x" << std::endl;
        return -1;
    }

    err = hipMalloc((void**)&d_y, num_rows * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate d_y" << std::endl;
        return -1;
    }

    // Copy data to device
    hipMemcpy(d_rowPtr, h_rowPtr, (num_rows + 1) * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_colIdx, h_colIdx, num_nonzeros * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_values, h_values, num_nonzeros * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_x, h_x, num_rows * sizeof(float), hipMemcpyHostToDevice);

    // Launch kernel
    int blockSize = 256;
    int numBlocks = (num_rows + blockSize - 1) / blockSize;
    int sharedMemSize = blockSize * sizeof(float);

    sparseMatVecMul<<<numBlocks, blockSize, sharedMemSize>>>(d_rowPtr, d_colIdx, d_values, d_x, d_y, num_rows);

    // Check for kernel launch errors
    err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Kernel launch failed: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy result back to host
    hipMemcpy(h_y, d_y, num_rows * sizeof(float), hipMemcpyDeviceToHost);

    // Print result
    std::cout << "Result vector y: ";
    for (int i = 0; i < num_rows; ++i) {
        std::cout << h_y[i] << " ";
    }
    std::cout << std::endl;

    // Free device memory
    hipFree(d_rowPtr);
    hipFree(d_colIdx);
    hipFree(d_values);
    hipFree(d_x);
    hipFree(d_y);

    return 0;
}
	.text
	.file	"cuda_code_036489.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z30__device_stub__sparseMatVecMulPKiS0_PKfS2_Pfi # -- Begin function _Z30__device_stub__sparseMatVecMulPKiS0_PKfS2_Pfi
	.type	_Z30__device_stub__sparseMatVecMulPKiS0_PKfS2_Pfi,@function
_Z30__device_stub__sparseMatVecMulPKiS0_PKfS2_Pfi: # @_Z30__device_stub__sparseMatVecMulPKiS0_PKfS2_Pfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15sparseMatVecMulPKiS0_PKfS2_Pfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__sparseMatVecMulPKiS0_PKfS2_Pfi, .Lfunc_end0-_Z30__device_stub__sparseMatVecMulPKiS0_PKfS2_Pfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0                               # 0x0
	.long	1                               # 0x1
	.long	2                               # 0x2
	.long	3                               # 0x3
.LCPI1_1:
	.long	0x3f800000                      # float 1
	.long	0x40000000                      # float 2
	.long	0x40400000                      # float 3
	.long	0x40800000                      # float 4
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$144, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -16
	movaps	.LCPI1_0(%rip), %xmm0           # xmm0 = [0,1,2,3]
	movaps	%xmm0, 48(%rsp)
	movl	$4, 64(%rsp)
	movaps	%xmm0, 128(%rsp)
	movaps	.LCPI1_1(%rip), %xmm0           # xmm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0]
	movaps	%xmm0, 112(%rsp)
	movaps	%xmm0, 96(%rsp)
	leaq	40(%rsp), %rdi
	movl	$20, %esi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_2
# %bb.1:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	jmp	.LBB1_6
.LBB1_2:
	leaq	32(%rsp), %rdi
	movl	$24, %esi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_4
# %bb.3:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	jmp	.LBB1_6
.LBB1_4:
	leaq	24(%rsp), %rdi
	movl	$24, %esi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_10
# %bb.5:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
.LBB1_6:
	movl	$27, %edx
.LBB1_7:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_8:
	movl	$-1, %eax
.LBB1_9:
	addq	$144, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB1_10:
	.cfi_def_cfa_offset 160
	leaq	16(%rsp), %rdi
	movl	$16, %esi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_12
# %bb.11:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$22, %edx
	jmp	.LBB1_7
.LBB1_12:
	leaq	8(%rsp), %rdi
	movl	$16, %esi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_14
# %bb.13:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.4, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cerr, %edi
	jmp	.LBB1_18
.LBB1_14:
	movq	40(%rsp), %rdi
	leaq	48(%rsp), %rsi
	movl	$20, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	leaq	128(%rsp), %rsi
	movl	$24, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	leaq	112(%rsp), %rsi
	movl	$24, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	leaq	96(%rsp), %rsi
	movl	$16, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	255(%rdi), %rdx
	movl	$1024, %r8d                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_16
# %bb.15:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	movq	8(%rsp), %r8
	movl	$4, %r9d
	callq	_Z30__device_stub__sparseMatVecMulPKiS0_PKfS2_Pfi
.LBB1_16:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_19
# %bb.17:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$_ZSt4cerr, %edi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
.LBB1_18:
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	jmp	.LBB1_8
.LBB1_19:
	movq	8(%rsp), %rsi
	leaq	80(%rsp), %rdi
	movl	$16, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%ebx, %ebx
.LBB1_20:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	80(%rsp,%rbx,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.7, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%rbx
	cmpq	$4, %rbx
	jne	.LBB1_20
# %bb.21:
	movl	$_ZSt4cout, %edi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	jmp	.LBB1_9
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15sparseMatVecMulPKiS0_PKfS2_Pfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15sparseMatVecMulPKiS0_PKfS2_Pfi,@object # @_Z15sparseMatVecMulPKiS0_PKfS2_Pfi
	.section	.rodata,"a",@progbits
	.globl	_Z15sparseMatVecMulPKiS0_PKfS2_Pfi
	.p2align	3, 0x0
_Z15sparseMatVecMulPKiS0_PKfS2_Pfi:
	.quad	_Z30__device_stub__sparseMatVecMulPKiS0_PKfS2_Pfi
	.size	_Z15sparseMatVecMulPKiS0_PKfS2_Pfi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to allocate d_rowPtr"
	.size	.L.str, 28

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Failed to allocate d_colIdx"
	.size	.L.str.1, 28

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate d_values"
	.size	.L.str.2, 28

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate d_x"
	.size	.L.str.3, 23

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to allocate d_y"
	.size	.L.str.4, 23

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Kernel launch failed: "
	.size	.L.str.5, 23

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Result vector y: "
	.size	.L.str.6, 18

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	" "
	.size	.L.str.7, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15sparseMatVecMulPKiS0_PKfS2_Pfi"
	.size	.L__unnamed_1, 35

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__sparseMatVecMulPKiS0_PKfS2_Pfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15sparseMatVecMulPKiS0_PKfS2_Pfi
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15sparseMatVecMulPKiS0_PKfS2_Pfi ; -- Begin function _Z15sparseMatVecMulPKiS0_PKfS2_Pfi
	.globl	_Z15sparseMatVecMulPKiS0_PKfS2_Pfi
	.p2align	8
	.type	_Z15sparseMatVecMulPKiS0_PKfS2_Pfi,@function
_Z15sparseMatVecMulPKiS0_PKfS2_Pfi:     ; @_Z15sparseMatVecMulPKiS0_PKfS2_Pfi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s3, s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s2, 0xffff
	s_mov_b32 s2, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_14
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[2:3], s[0:1], 0x20
	v_mov_b32_e32 v8, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	s_mov_b32 s4, 0
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v7, v4, v3
	v_cmpx_lt_i32_e32 0, v7
	s_cbranch_execz .LBB0_13
; %bb.2:                                ; %.lr.ph52
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v3, v3, v0
	v_lshl_add_u32 v9, v0, 2, 0
	v_cmp_eq_u32_e64 s0, 0, v0
	v_mov_b32_e32 v8, 0
	s_cmp_gt_u32 s12, 1
	s_mov_b32 s13, 0
	s_cselect_b32 s5, -1, 0
.LBB0_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
	v_dual_mov_b32 v6, 0 :: v_dual_add_nc_u32 v5, s13, v3
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v5, v4
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v11, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v5, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v6, vcc_lo
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v12, 31, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v11, vcc_lo, s10, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v12, vcc_lo
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[11:12], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v5, v6
.LBB0_5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_mov_b32 s14, s12
	ds_store_b32 v9, v6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_9
.LBB0_6:                                ; %.lr.ph
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshr_b32 s15, s14, 1
	s_mov_b32 s16, exec_lo
	v_cmpx_gt_u32_e64 s15, v0
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=2
	v_lshl_add_u32 v5, s15, 2, v9
	ds_load_b32 v5, v5
	ds_load_b32 v6, v9
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v5, v5, v6
	ds_store_b32 v9, v5
.LBB0_8:                                ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s16
	s_cmp_lt_u32 s14, 4
	s_mov_b32 s14, s15
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_6
.LBB0_9:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_3 Depth=1
	ds_load_b32 v5, v10
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v8, v8, v5
.LBB0_11:                               ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_add_i32 s13, s13, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, s13, v7
	s_or_b32 s4, vcc_lo, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_3
; %bb.12:                               ; %Flow71
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_13:                               ; %Flow72
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v0, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[0:1], v8, off
.LBB0_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15sparseMatVecMulPKiS0_PKfS2_Pfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15sparseMatVecMulPKiS0_PKfS2_Pfi, .Lfunc_end0-_Z15sparseMatVecMulPKiS0_PKfS2_Pfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 560
; NumSgprs: 19
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         168
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15sparseMatVecMulPKiS0_PKfS2_Pfi
    .private_segment_fixed_size: 0
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _Z15sparseMatVecMulPKiS0_PKfS2_Pfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
