#include <iostream>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>

// Constants for the radix sort
const int ARRAY_SIZE = 512;
const int BITS_PER_PASS = 4;
const int RADIX = 1 << BITS_PER_PASS;
const int MASK = RADIX - 1;

// Kernel to perform counting sort based on the digit represented by 'bit'
__global__ void radixCountSort(int* input, int* output, int* histogram, int bit) {
    extern __shared__ int s_histogram[];

    int tid = threadIdx.x;
    int gid = blockIdx.x * blockDim.x + threadIdx.x;

    // Initialize shared memory histogram
    s_histogram[tid] = 0;
    __syncthreads();

    // Count occurrences of each digit in the block
    if (gid < ARRAY_SIZE) {
        int digit = (input[gid] >> bit) & MASK;
        atomicAdd(&s_histogram[digit], 1);
    }
    __syncthreads();

    // Write block's histogram to global memory
    if (tid < RADIX) {
        int index = blockIdx.x * RADIX + tid;
        histogram[index] = s_histogram[tid];
    }
}

// Kernel to perform prefix sum on the histogram
__global__ void prefixSum(int* histogram, int numBlocks) {
    int tid = threadIdx.x;
    int stride = 1;

    // Build the sum in place up the tree
    for (int d = numBlocks >> 1; d > 0; d >>= 1) {
        __syncthreads();
        if (tid < d) {
            int ai = stride * (2 * tid + 1) - 1;
            int bi = stride * (2 * tid + 2) - 1;
            histogram[bi] += histogram[ai];
        }
        stride *= 2;
    }

    // Clear the last element
    if (tid == 0) {
        histogram[numBlocks * RADIX - 1] = 0;
    }

    // Traverse down the tree and build the scan
    for (int d = 1; d < numBlocks; d *= 2) {
        stride >>= 1;
        __syncthreads();
        if (tid < d) {
            int ai = stride * (2 * tid + 1) - 1;
            int bi = stride * (2 * tid + 2) - 1;
            int t = histogram[ai];
            histogram[ai] = histogram[bi];
            histogram[bi] += t;
        }
    }
}

// Kernel to scatter the data based on the prefix sum
__global__ void scatter(int* input, int* output, int* histogram, int bit) {
    extern __shared__ int s_histogram[];

    int tid = threadIdx.x;
    int gid = blockIdx.x * blockDim.x + threadIdx.x;

    // Load histogram into shared memory
    if (tid < RADIX) {
        s_histogram[tid] = histogram[blockIdx.x * RADIX + tid];
    }
    __syncthreads();

    // Perform scatter
    if (gid < ARRAY_SIZE) {
        int digit = (input[gid] >> bit) & MASK;
        int pos = atomicAdd(&s_histogram[digit], 1);
        output[pos + histogram[blockIdx.x * RADIX + digit]] = input[gid];
    }
}

// Function to perform radix sort
void radixSort(int* d_input, int* d_output, int numBits) {
    int numPasses = (numBits + BITS_PER_PASS - 1) / BITS_PER_PASS;
    int* d_histogram;
    int* d_temp;
    int numBlocks = (ARRAY_SIZE + 255) / 256;

    // Allocate device memory for histogram and temporary array
    cudaMalloc(&d_histogram, numBlocks * RADIX * sizeof(int));
    cudaMalloc(&d_temp, ARRAY_SIZE * sizeof(int));

    // Perform radix sort
    for (int bit = 0; bit < numBits; bit += BITS_PER_PASS) {
        // Count sort
        radixCountSort<<<numBlocks, 256, 256 * sizeof(int)>>>(d_input, d_temp, d_histogram, bit);
        cudaDeviceSynchronize();

        // Prefix sum
        prefixSum<<<1, numBlocks, numBlocks * sizeof(int)>>>(d_histogram, numBlocks);
        cudaDeviceSynchronize();

        // Scatter
        scatter<<<numBlocks, 256, 256 * sizeof(int)>>>(d_input, d_output, d_histogram, bit);
        cudaDeviceSynchronize();

        // Swap input and output for the next pass
        std::swap(d_input, d_output);
    }

    // If the number of passes is odd, copy the result back to the original array
    if (numPasses % 2 != 0) {
        cudaMemcpy(d_output, d_input, ARRAY_SIZE * sizeof(int), cudaMemcpyDeviceToDevice);
    }

    // Free device memory
    cudaFree(d_histogram);
    cudaFree(d_temp);
}

int main() {
    int h_input[ARRAY_SIZE];
    int h_output[ARRAY_SIZE];

    // Initialize input array with random values
    for (int i = 0; i < ARRAY_SIZE; ++i) {
        h_input[i] = rand() % 1024; // Assuming we sort 10-bit numbers for simplicity
    }

    int* d_input;
    int* d_output;

    // Allocate device memory
    cudaMalloc(&d_input, ARRAY_SIZE * sizeof(int));
    cudaMalloc(&d_output, ARRAY_SIZE * sizeof(int));

    // Copy input array to device
    cudaMemcpy(d_input, h_input, ARRAY_SIZE * sizeof(int), cudaMemcpyHostToDevice);

    // Perform radix sort
    radixSort(d_input, d_output, 10);

    // Copy sorted array back to host
    cudaMemcpy(h_output, d_output, ARRAY_SIZE * sizeof(int), cudaMemcpyDeviceToHost);

    // Print sorted array
    std::cout << "Sorted array: ";
    for (int i = 0; i < ARRAY_SIZE; ++i) {
        std::cout << h_output[i] << " ";
    }
    std::cout << std::endl;

    // Free device memory
    cudaFree(d_input);
    cudaFree(d_output);

    return 0;
}
	.file	"tmpxft_0002cad6_00000000-6_cuda_code_017486.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z39__device_stub__Z14radixCountSortPiS_S_iPiS_S_i
	.type	_Z39__device_stub__Z14radixCountSortPiS_S_iPiS_S_i, @function
_Z39__device_stub__Z14radixCountSortPiS_S_iPiS_S_i:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14radixCountSortPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z39__device_stub__Z14radixCountSortPiS_S_iPiS_S_i, .-_Z39__device_stub__Z14radixCountSortPiS_S_iPiS_S_i
	.globl	_Z14radixCountSortPiS_S_i
	.type	_Z14radixCountSortPiS_S_i, @function
_Z14radixCountSortPiS_S_i:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z14radixCountSortPiS_S_iPiS_S_i
	.cfi_endproc
.LFE3663:
	.size	_Z14radixCountSortPiS_S_i, .-_Z14radixCountSortPiS_S_i
	.globl	_Z29__device_stub__Z9prefixSumPiiPii
	.type	_Z29__device_stub__Z9prefixSumPiiPii, @function
_Z29__device_stub__Z9prefixSumPiiPii:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9prefixSumPii(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z29__device_stub__Z9prefixSumPiiPii, .-_Z29__device_stub__Z9prefixSumPiiPii
	.globl	_Z9prefixSumPii
	.type	_Z9prefixSumPii, @function
_Z9prefixSumPii:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z9prefixSumPiiPii
	.cfi_endproc
.LFE3665:
	.size	_Z9prefixSumPii, .-_Z9prefixSumPii
	.globl	_Z31__device_stub__Z7scatterPiS_S_iPiS_S_i
	.type	_Z31__device_stub__Z7scatterPiS_S_iPiS_S_i, @function
_Z31__device_stub__Z7scatterPiS_S_iPiS_S_i:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7scatterPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L13:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z31__device_stub__Z7scatterPiS_S_iPiS_S_i, .-_Z31__device_stub__Z7scatterPiS_S_iPiS_S_i
	.globl	_Z7scatterPiS_S_i
	.type	_Z7scatterPiS_S_i, @function
_Z7scatterPiS_S_i:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z7scatterPiS_S_iPiS_S_i
	.cfi_endproc
.LFE3667:
	.size	_Z7scatterPiS_S_i, .-_Z7scatterPiS_S_i
	.globl	_Z9radixSortPiS_i
	.type	_Z9radixSortPiS_i, @function
_Z9radixSortPiS_i:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4, %ecx
	movabsq	$4294967552, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	movl	$128, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leal	3(%rdx), %eax
	movq	%rsp, %rdi
	cltd
	idivl	%ecx
	movl	%eax, %r13d
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$2048, %esi
	call	cudaMalloc@PLT
.L19:
	cmpl	%r14d, %r12d
	jge	.L30
	movl	$2147483649, %edi
	xorl	%r9d, %r9d
	movq	%r15, %rdx
	movl	$1, %ecx
	addq	%rdi, %rdi
	movl	$1024, %r8d
	movl	$1, %esi
	movq	%r15, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	%r12d, %ecx
	movq	%rbx, %rdi
	call	_Z39__device_stub__Z14radixCountSortPiS_S_iPiS_S_i
.L20:
	call	cudaDeviceSynchronize@PLT
	movl	$2147483649, %edx
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rdi
	addq	%rdx, %rdx
	movl	$8, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	(%rsp), %rdi
	movl	$2, %esi
	call	_Z29__device_stub__Z9prefixSumPiiPii
.L21:
	call	cudaDeviceSynchronize@PLT
	movl	$2147483649, %edi
	xorl	%r9d, %r9d
	movq	%r15, %rdx
	addq	%rdi, %rdi
	movl	$1024, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%r15, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movq	(%rsp), %rdx
	movl	%r12d, %ecx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_Z31__device_stub__Z7scatterPiS_S_iPiS_S_i
.L22:
	call	cudaDeviceSynchronize@PLT
	addl	$4, %r12d
	xchgq	%rbp, %rbx
	jmp	.L19
.L30:
	andl	$1, %r13d
	je	.L24
	movl	$3, %ecx
	movl	$2048, %edx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
.L24:
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z9radixSortPiS_i, .-_Z9radixSortPiS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Sorted array: "
.LC1:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$4096, %rsp
	.cfi_def_cfa_offset 4136
	orq	$0, (%rsp)
	subq	$40, %rsp
	.cfi_def_cfa_offset 4176
	xorl	%ebx, %ebx
	movl	$1024, %r12d
	movq	%fs:40, %rax
	movq	%rax, 4120(%rsp)
	xorl	%eax, %eax
.L32:
	call	rand@PLT
	leaq	24(%rsp), %rbp
	cltd
	idivl	%r12d
	movl	%edx, 0(%rbp,%rbx,4)
	incq	%rbx
	cmpq	$512, %rbx
	jne	.L32
	leaq	8(%rsp), %rdi
	movl	$2048, %esi
	leaq	.LC1(%rip), %r13
	xorl	%ebx, %ebx
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$2048, %esi
	leaq	2072(%rsp), %r12
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$2048, %edx
	leaq	_ZSt4cout(%rip), %rbp
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$10, %edx
	call	_Z9radixSortPiS_i
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$2048, %edx
	call	cudaMemcpy@PLT
	movl	$14, %edx
	leaq	.LC0(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.L33:
	movl	(%r12,%rbx,4), %esi
	movq	%rbp, %rdi
	incq	%rbx
	call	_ZNSolsEi@PLT
	movl	$1, %edx
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	cmpq	$512, %rbx
	jne	.L33
	movq	%rbp, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	4120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$4136, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z7scatterPiS_S_i"
.LC3:
	.string	"_Z9prefixSumPii"
.LC4:
	.string	"_Z14radixCountSortPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3669:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7scatterPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9prefixSumPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14radixCountSortPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3669:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>


// Constants for the radix sort
const int ARRAY_SIZE = 512;
const int BITS_PER_PASS = 4;
const int RADIX = 1 << BITS_PER_PASS;
const int MASK = RADIX - 1;

// Kernel to perform counting sort based on the digit represented by 'bit'
__global__ void radixCountSort(int* input, int* output, int* histogram, int bit) {
    extern __shared__ int s_histogram[];

    int tid = threadIdx.x;
    int gid = blockIdx.x * blockDim.x + threadIdx.x;

    // Initialize shared memory histogram
    s_histogram[tid] = 0;
    __syncthreads();

    // Count occurrences of each digit in the block
    if (gid < ARRAY_SIZE) {
        int digit = (input[gid] >> bit) & MASK;
        atomicAdd(&s_histogram[digit], 1);
    }
    __syncthreads();

    // Write block's histogram to global memory
    if (tid < RADIX) {
        int index = blockIdx.x * RADIX + tid;
        histogram[index] = s_histogram[tid];
    }
}

// Kernel to perform prefix sum on the histogram
__global__ void prefixSum(int* histogram, int numBlocks) {
    int tid = threadIdx.x;
    int stride = 1;

    // Build the sum in place up the tree
    for (int d = numBlocks >> 1; d > 0; d >>= 1) {
        __syncthreads();
        if (tid < d) {
            int ai = stride * (2 * tid + 1) - 1;
            int bi = stride * (2 * tid + 2) - 1;
            histogram[bi] += histogram[ai];
        }
        stride *= 2;
    }

    // Clear the last element
    if (tid == 0) {
        histogram[numBlocks * RADIX - 1] = 0;
    }

    // Traverse down the tree and build the scan
    for (int d = 1; d < numBlocks; d *= 2) {
        stride >>= 1;
        __syncthreads();
        if (tid < d) {
            int ai = stride * (2 * tid + 1) - 1;
            int bi = stride * (2 * tid + 2) - 1;
            int t = histogram[ai];
            histogram[ai] = histogram[bi];
            histogram[bi] += t;
        }
    }
}

// Kernel to scatter the data based on the prefix sum
__global__ void scatter(int* input, int* output, int* histogram, int bit) {
    extern __shared__ int s_histogram[];

    int tid = threadIdx.x;
    int gid = blockIdx.x * blockDim.x + threadIdx.x;

    // Load histogram into shared memory
    if (tid < RADIX) {
        s_histogram[tid] = histogram[blockIdx.x * RADIX + tid];
    }
    __syncthreads();

    // Perform scatter
    if (gid < ARRAY_SIZE) {
        int digit = (input[gid] >> bit) & MASK;
        int pos = atomicAdd(&s_histogram[digit], 1);
        output[pos + histogram[blockIdx.x * RADIX + digit]] = input[gid];
    }
}

// Function to perform radix sort
void radixSort(int* d_input, int* d_output, int numBits) {
    int numPasses = (numBits + BITS_PER_PASS - 1) / BITS_PER_PASS;
    int* d_histogram;
    int* d_temp;
    int numBlocks = (ARRAY_SIZE + 255) / 256;

    // Allocate device memory for histogram and temporary array
    hipMalloc(&d_histogram, numBlocks * RADIX * sizeof(int));
    hipMalloc(&d_temp, ARRAY_SIZE * sizeof(int));

    // Perform radix sort
    for (int bit = 0; bit < numBits; bit += BITS_PER_PASS) {
        // Count sort
        radixCountSort<<<numBlocks, 256, 256 * sizeof(int)>>>(d_input, d_temp, d_histogram, bit);
        hipDeviceSynchronize();

        // Prefix sum
        prefixSum<<<1, numBlocks, numBlocks * sizeof(int)>>>(d_histogram, numBlocks);
        hipDeviceSynchronize();

        // Scatter
        scatter<<<numBlocks, 256, 256 * sizeof(int)>>>(d_input, d_output, d_histogram, bit);
        hipDeviceSynchronize();

        // Swap input and output for the next pass
        std::swap(d_input, d_output);
    }

    // If the number of passes is odd, copy the result back to the original array
    if (numPasses % 2 != 0) {
        hipMemcpy(d_output, d_input, ARRAY_SIZE * sizeof(int), hipMemcpyDeviceToDevice);
    }

    // Free device memory
    hipFree(d_histogram);
    hipFree(d_temp);
}

int main() {
    int h_input[ARRAY_SIZE];
    int h_output[ARRAY_SIZE];

    // Initialize input array with random values
    for (int i = 0; i < ARRAY_SIZE; ++i) {
        h_input[i] = rand() % 1024; // Assuming we sort 10-bit numbers for simplicity
    }

    int* d_input;
    int* d_output;

    // Allocate device memory
    hipMalloc(&d_input, ARRAY_SIZE * sizeof(int));
    hipMalloc(&d_output, ARRAY_SIZE * sizeof(int));

    // Copy input array to device
    hipMemcpy(d_input, h_input, ARRAY_SIZE * sizeof(int), hipMemcpyHostToDevice);

    // Perform radix sort
    radixSort(d_input, d_output, 10);

    // Copy sorted array back to host
    hipMemcpy(h_output, d_output, ARRAY_SIZE * sizeof(int), hipMemcpyDeviceToHost);

    // Print sorted array
    std::cout << "Sorted array: ";
    for (int i = 0; i < ARRAY_SIZE; ++i) {
        std::cout << h_output[i] << " ";
    }
    std::cout << std::endl;

    // Free device memory
    hipFree(d_input);
    hipFree(d_output);

    return 0;
}
	.text
	.file	"cuda_code_017486.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z29__device_stub__radixCountSortPiS_S_i # -- Begin function _Z29__device_stub__radixCountSortPiS_S_i
	.type	_Z29__device_stub__radixCountSortPiS_S_i,@function
_Z29__device_stub__radixCountSortPiS_S_i: # @_Z29__device_stub__radixCountSortPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14radixCountSortPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__radixCountSortPiS_S_i, .Lfunc_end0-_Z29__device_stub__radixCountSortPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__prefixSumPii # -- Begin function _Z24__device_stub__prefixSumPii
	.type	_Z24__device_stub__prefixSumPii,@function
_Z24__device_stub__prefixSumPii:        # @_Z24__device_stub__prefixSumPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9prefixSumPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__prefixSumPii, .Lfunc_end1-_Z24__device_stub__prefixSumPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__scatterPiS_S_i # -- Begin function _Z22__device_stub__scatterPiS_S_i
	.type	_Z22__device_stub__scatterPiS_S_i,@function
_Z22__device_stub__scatterPiS_S_i:      # @_Z22__device_stub__scatterPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7scatterPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z22__device_stub__scatterPiS_S_i, .Lfunc_end2-_Z22__device_stub__scatterPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z9radixSortPiS_i               # -- Begin function _Z9radixSortPiS_i
	.type	_Z9radixSortPiS_i,@function
_Z9radixSortPiS_i:                      # @_Z9radixSortPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movq	%rsi, %r15
	movq	%rdi, %r14
	leal	3(%rbx), %eax
	leal	6(%rbx), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$2, %ecx
	movl	%ecx, 12(%rsp)                  # 4-byte Spill
	movq	%rsp, %rdi
	movl	$128, %esi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$2048, %esi                     # imm = 0x800
	callq	hipMalloc
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	jle	.LBB3_1
# %bb.5:                                # %.lr.ph.preheader
	xorl	%r12d, %r12d
	movabsq	$4294967298, %r13               # imm = 0x100000002
	leaq	254(%r13), %rbp
	leaq	-1(%r13), %rax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
.LBB3_6:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%r14, %rbx
	movl	$1024, %r8d                     # imm = 0x400
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_8
# %bb.7:                                #   in Loop: Header=BB3_6 Depth=1
	movq	16(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	%rbx, %rdi
	movl	%r12d, %ecx
	callq	_Z29__device_stub__radixCountSortPiS_S_i
.LBB3_8:                                #   in Loop: Header=BB3_6 Depth=1
	callq	hipDeviceSynchronize
	movl	$8, %r8d
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_10
# %bb.9:                                #   in Loop: Header=BB3_6 Depth=1
	movq	(%rsp), %rdi
	movl	$2, %esi
	callq	_Z24__device_stub__prefixSumPii
.LBB3_10:                               #   in Loop: Header=BB3_6 Depth=1
	callq	hipDeviceSynchronize
	movl	$1024, %r8d                     # imm = 0x400
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_12
# %bb.11:                               #   in Loop: Header=BB3_6 Depth=1
	movq	(%rsp), %rdx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movl	%r12d, %ecx
	callq	_Z22__device_stub__scatterPiS_S_i
.LBB3_12:                               #   in Loop: Header=BB3_6 Depth=1
	callq	hipDeviceSynchronize
	addl	$4, %r12d
	movq	%r15, %r14
	movq	%rbx, %r15
	cmpl	32(%rsp), %r12d                 # 4-byte Folded Reload
	jl	.LBB3_6
	jmp	.LBB3_2
.LBB3_1:
	movq	%r15, %rbx
.LBB3_2:                                # %._crit_edge
	testb	$1, 12(%rsp)                    # 1-byte Folded Reload
	je	.LBB3_4
# %bb.3:
	movl	$2048, %edx                     # imm = 0x800
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$3, %ecx
	callq	hipMemcpy
.LBB3_4:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z9radixSortPiS_i, .Lfunc_end3-_Z9radixSortPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$4120, %rsp                     # imm = 0x1018
	.cfi_def_cfa_offset 4144
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	xorl	%ebx, %ebx
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	1023(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-1024, %ecx                    # imm = 0xFC00
	subl	%ecx, %eax
	movl	%eax, 2064(%rsp,%rbx,4)
	incq	%rbx
	cmpq	$512, %rbx                      # imm = 0x200
	jne	.LBB4_1
# %bb.2:
	leaq	8(%rsp), %rbx
	movl	$2048, %esi                     # imm = 0x800
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	%rsp, %r14
	movl	$2048, %esi                     # imm = 0x800
	movq	%r14, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	leaq	2064(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	(%r14), %rsi
	movl	$10, %edx
	callq	_Z9radixSortPiS_i
	movq	(%r14), %rsi
	leaq	16(%rsp), %rdi
	movl	$2048, %edx                     # imm = 0x800
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%ebx, %ebx
.LBB4_3:                                # =>This Inner Loop Header: Depth=1
	movl	16(%rsp,%rbx,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%rbx
	cmpq	$512, %rbx                      # imm = 0x200
	jne	.LBB4_3
# %bb.4:
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$4120, %rsp                     # imm = 0x1018
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14radixCountSortPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9prefixSumPii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7scatterPiS_S_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14radixCountSortPiS_S_i,@object # @_Z14radixCountSortPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z14radixCountSortPiS_S_i
	.p2align	3, 0x0
_Z14radixCountSortPiS_S_i:
	.quad	_Z29__device_stub__radixCountSortPiS_S_i
	.size	_Z14radixCountSortPiS_S_i, 8

	.type	_Z9prefixSumPii,@object         # @_Z9prefixSumPii
	.globl	_Z9prefixSumPii
	.p2align	3, 0x0
_Z9prefixSumPii:
	.quad	_Z24__device_stub__prefixSumPii
	.size	_Z9prefixSumPii, 8

	.type	_Z7scatterPiS_S_i,@object       # @_Z7scatterPiS_S_i
	.globl	_Z7scatterPiS_S_i
	.p2align	3, 0x0
_Z7scatterPiS_S_i:
	.quad	_Z22__device_stub__scatterPiS_S_i
	.size	_Z7scatterPiS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Sorted array: "
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" "
	.size	.L.str.1, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14radixCountSortPiS_S_i"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9prefixSumPii"
	.size	.L__unnamed_2, 16

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z7scatterPiS_S_i"
	.size	.L__unnamed_3, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__radixCountSortPiS_S_i
	.addrsig_sym _Z24__device_stub__prefixSumPii
	.addrsig_sym _Z22__device_stub__scatterPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14radixCountSortPiS_S_i
	.addrsig_sym _Z9prefixSumPii
	.addrsig_sym _Z7scatterPiS_S_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14radixCountSortPiS_S_i ; -- Begin function _Z14radixCountSortPiS_S_i
	.globl	_Z14radixCountSortPiS_S_i
	.p2align	8
	.type	_Z14radixCountSortPiS_S_i,@function
_Z14radixCountSortPiS_S_i:              ; @_Z14radixCountSortPiS_S_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x2c
	v_lshl_add_u32 v3, v0, 2, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	s_mov_b32 s2, exec_lo
	ds_store_b32 v3, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e32 0x200, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x0
	s_load_b32 s3, s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	v_mov_b32_e32 v2, 1
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v1, s3, v1
	v_and_b32_e32 v1, 15, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 2, 0
	ds_add_u32 v1, v2
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e32 16, v0
	s_cbranch_execz .LBB0_4
; %bb.3:
	s_load_b64 s[0:1], s[0:1], 0x10
	v_lshl_or_b32 v0, s15, 4, v0
	ds_load_b32 v2, v3
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14radixCountSortPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14radixCountSortPiS_S_i, .Lfunc_end0-_Z14radixCountSortPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 296
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9prefixSumPii         ; -- Begin function _Z9prefixSumPii
	.globl	_Z9prefixSumPii
	.p2align	8
	.type	_Z9prefixSumPii,@function
_Z9prefixSumPii:                        ; @_Z9prefixSumPii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x0
	v_lshl_or_b32 v3, v0, 1, 1
	s_mov_b32 s3, 1
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s4, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB1_6
; %bb.1:                                ; %.lr.ph
	v_mov_b32_e32 v2, 0
	s_add_u32 s5, s0, -4
	s_addc_u32 s6, s1, -1
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s7, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e64 s4, v0
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_mul_lo_u32 v1, s3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v5, v2 :: v_dual_add_nc_u32 v4, s3, v1
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s5, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s6, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s5, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s6, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v1, v[6:7], off
	global_load_b32 v6, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v6, v1
	global_store_b32 v[4:5], v1, off
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_lshl_b32 s3, s3, 1
	s_lshr_b32 s7, s4, 1
	s_cmp_lt_u32 s4, 2
	s_cbranch_scc1 .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s4, s7
	s_branch .LBB1_2
.LBB1_6:                                ; %Flow64
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_8
; %bb.7:
	s_lshl_b32 s6, s2, 4
	v_mov_b32_e32 v1, 0
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[6:7], 2
	s_add_u32 s6, s0, s6
	s_addc_u32 s7, s1, s7
	global_store_b32 v1, v1, s[6:7] offset:-4
.LBB1_8:
	s_or_b32 exec_lo, exec_lo, s4
	s_cmp_lt_i32 s2, 2
	s_cbranch_scc1 .LBB1_13
; %bb.9:                                ; %.lr.ph51
	v_mov_b32_e32 v2, 0
	s_add_u32 s0, s0, -4
	s_mov_b32 s4, 1
	s_addc_u32 s1, s1, -1
.LBB1_10:                               ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s3, s3, 1
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s4, v0
	s_cbranch_execz .LBB1_12
; %bb.11:                               ;   in Loop: Header=BB1_10 Depth=1
	v_mul_lo_u32 v1, s3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v5, v2 :: v_dual_add_nc_u32 v4, s3, v1
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v1, v[6:7], off
	global_load_b32 v8, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v8, v1
	s_clause 0x1
	global_store_b32 v[6:7], v8, off
	global_store_b32 v[4:5], v1, off
.LBB1_12:                               ;   in Loop: Header=BB1_10 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_lshl_b32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s4, s2
	s_cbranch_scc0 .LBB1_10
.LBB1_13:                               ; %._crit_edge52
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9prefixSumPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 12
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9prefixSumPii, .Lfunc_end1-_Z9prefixSumPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 488
; NumSgprs: 10
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7scatterPiS_S_i       ; -- Begin function _Z7scatterPiS_S_i
	.globl	_Z7scatterPiS_S_i
	.p2align	8
	.type	_Z7scatterPiS_S_i,@function
_Z7scatterPiS_S_i:                      ; @_Z7scatterPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b32 s4, s[0:1], 0x2c
	s_mov_b32 s5, exec_lo
	v_cmpx_gt_u32_e32 16, v0
	s_cbranch_execz .LBB2_2
; %bb.1:
	v_lshl_or_b32 v1, s15, 4, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	v_lshl_add_u32 v2, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v1
.LBB2_2:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, 0xffff, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_i32_e32 0x200, v1
	s_cbranch_execz .LBB2_4
; %bb.3:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b32 s0, s[0:1], 0x18
	v_mov_b32_e32 v4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v0, s0, v2
	v_and_b32_e32 v3, 15, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshl_or_b32 v0, s15, 4, v3
	v_lshl_add_u32 v3, v3, 2, 0
	ds_add_rtn_u32 v3, v3, v4
	v_mov_b32_e32 v1, 0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v0, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB2_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7scatterPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z7scatterPiS_S_i, .Lfunc_end2-_Z7scatterPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 360
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym s_histogram
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14radixCountSortPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14radixCountSortPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 12
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9prefixSumPii
    .private_segment_fixed_size: 0
    .sgpr_count:     10
    .sgpr_spill_count: 0
    .symbol:         _Z9prefixSumPii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7scatterPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7scatterPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
