// sparse_matrix_vector_multiplication.cu
#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>
#include <device_launch_parameters.h>

namespace cg = cooperative_groups;

// Define matrix dimensions and number of non-zero elements
#define NUM_ROWS 256
#define NUM_COLS 256
#define NUM_NON_ZEROS 256

// Kernel for sparse matrix-vector multiplication
__global__ void spmv_csr(const int* rowPtr, const int* colIdx, const float* val, const float* x, float* y) {
    extern __shared__ float shared_x[];

    int row = blockIdx.x * blockDim.x + threadIdx.x;
    float dot = 0.0f;

    if (row < NUM_ROWS) {
        int row_start = rowPtr[row];
        int row_end = rowPtr[row + 1];

        // Load vector x into shared memory
        for (int i = row_start; i < row_end; i++) {
            int col = colIdx[i];
            shared_x[threadIdx.x] = x[col];
            __syncthreads();

            // Compute dot product
            dot += val[i] * shared_x[threadIdx.x];
            __syncthreads();
        }

        // Store result in y
        y[row] = dot;
    }
}

// Main function to demonstrate the usage of the spmv_csr kernel
int main() {
    // Initialize matrix in CSR format
    int h_rowPtr[NUM_ROWS + 1];
    int h_colIdx[NUM_NON_ZEROS];
    float h_val[NUM_NON_ZEROS];
    float h_x[NUM_COLS];
    float h_y[NUM_ROWS];

    // Initialize data (for demonstration, use simple patterns)
    for (int i = 0; i < NUM_ROWS; i++) {
        h_rowPtr[i] = i * (NUM_NON_ZEROS / NUM_ROWS);
        h_y[i] = 0.0f;
    }
    h_rowPtr[NUM_ROWS] = NUM_NON_ZEROS;

    for (int i = 0; i < NUM_NON_ZEROS; i++) {
        h_colIdx[i] = i % NUM_COLS;
        h_val[i] = 1.0f;
    }

    for (int i = 0; i < NUM_COLS; i++) {
        h_x[i] = 2.0f;
    }

    // Allocate device memory
    int* d_rowPtr;
    int* d_colIdx;
    float* d_val;
    float* d_x;
    float* d_y;

    cudaError_t err;
    err = cudaMalloc((void**)&d_rowPtr, (NUM_ROWS + 1) * sizeof(int));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device memory for rowPtr (error code " << err << ")" << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_colIdx, NUM_NON_ZEROS * sizeof(int));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device memory for colIdx (error code " << err << ")" << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_val, NUM_NON_ZEROS * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device memory for val (error code " << err << ")" << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_x, NUM_COLS * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device memory for x (error code " << err << ")" << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_y, NUM_ROWS * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device memory for y (error code " << err << ")" << std::endl;
        return -1;
    }

    // Copy data to device
    err = cudaMemcpy(d_rowPtr, h_rowPtr, (NUM_ROWS + 1) * sizeof(int), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy rowPtr from host to device (error code " << err << ")" << std::endl;
        return -1;
    }
    err = cudaMemcpy(d_colIdx, h_colIdx, NUM_NON_ZEROS * sizeof(int), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy colIdx from host to device (error code " << err << ")" << std::endl;
        return -1;
    }
    err = cudaMemcpy(d_val, h_val, NUM_NON_ZEROS * sizeof(float), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy val from host to device (error code " << err << ")" << std::endl;
        return -1;
    }
    err = cudaMemcpy(d_x, h_x, NUM_COLS * sizeof(float), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy x from host to device (error code " << err << ")" << std::endl;
        return -1;
    }

    // Define block size and grid size
    int blockSize = 256;
    int gridSize = (NUM_ROWS + blockSize - 1) / blockSize;

    // Launch kernel
    spmv_csr<<<gridSize, blockSize, blockSize * sizeof(float)>>>(d_rowPtr, d_colIdx, d_val, d_x, d_y);
    err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Failed to launch spmv_csr kernel (error code " << err << ")" << std::endl;
        return -1;
    }

    // Copy result back to host
    err = cudaMemcpy(h_y, d_y, NUM_ROWS * sizeof(float), cudaMemcpyDeviceToHost);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy y from device to host (error code " << err << ")" << std::endl;
        return -1;
    }

    // Free device memory
    cudaFree(d_rowPtr);
    cudaFree(d_colIdx);
    cudaFree(d_val);
    cudaFree(d_x);
    cudaFree(d_y);

    // Print result (first 10 elements for brevity)
    std::cout << "Result vector y (first 10 elements): ";
    for (int i = 0; i < 10; i++) {
        std::cout << h_y[i] << " ";
    }
    std::cout << std::endl;

    return 0;
}
	.file	"tmpxft_0014788d_00000000-6_cuda_code_077022.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6835:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6835:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB7718:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE7718:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z39__device_stub__Z8spmv_csrPKiS0_PKfS2_PfPKiS0_PKfS2_Pf
	.type	_Z39__device_stub__Z8spmv_csrPKiS0_PKfS2_PfPKiS0_PKfS2_Pf, @function
_Z39__device_stub__Z8spmv_csrPKiS0_PKfS2_PfPKiS0_PKfS2_Pf:
.LFB6857:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z8spmv_csrPKiS0_PKfS2_Pf(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L3:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6857:
	.size	_Z39__device_stub__Z8spmv_csrPKiS0_PKfS2_PfPKiS0_PKfS2_Pf, .-_Z39__device_stub__Z8spmv_csrPKiS0_PKfS2_PfPKiS0_PKfS2_Pf
	.globl	_Z8spmv_csrPKiS0_PKfS2_Pf
	.type	_Z8spmv_csrPKiS0_PKfS2_Pf, @function
_Z8spmv_csrPKiS0_PKfS2_Pf:
.LFB6858:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z8spmv_csrPKiS0_PKfS2_PfPKiS0_PKfS2_Pf
	.cfi_endproc
.LFE6858:
	.size	_Z8spmv_csrPKiS0_PKfS2_Pf, .-_Z8spmv_csrPKiS0_PKfS2_Pf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Failed to allocate device memory for rowPtr (error code "
.LC3:
	.string	")"
.LC4:
	.string	"Failed to allocate device memory for colIdx (error code "
.LC5:
	.string	"Failed to allocate device memory for val (error code "
.LC6:
	.string	"Failed to allocate device memory for x (error code "
.LC7:
	.string	"Failed to allocate device memory for y (error code "
.LC8:
	.string	"Failed to copy rowPtr from host to device (error code "
.LC9:
	.string	"Failed to copy colIdx from host to device (error code "
.LC10:
	.string	"Failed to copy val from host to device (error code "
.LC11:
	.string	"Failed to copy x from host to device (error code "
.LC12:
	.string	"Failed to launch spmv_csr kernel (error code "
.LC13:
	.string	"Failed to copy y from device to host (error code "
.LC14:
	.string	"Result vector y (first 10 elements): "
.LC15:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6832:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$4096, %rsp
	.cfi_def_cfa_offset 4152
	orq	$0, (%rsp)
	subq	$1112, %rsp
	.cfi_def_cfa_offset 5264
	xorl	%ecx, %ecx
	movq	%fs:40, %rax
	movq	%rax, 5192(%rsp)
	xorl	%eax, %eax
	leaq	4164(%rsp), %rbx
.L10:
	movl	%ecx, (%rbx,%rcx,4)
	incq	%rcx
	cmpq	$256, %rcx
	jne	.L10
	leaq	3140(%rsp), %rbp
	xorl	%eax, %eax
	movl	$256, 5188(%rsp)
	movss	.LC0(%rip), %xmm0
	movq	%rbp, %rdi
	leaq	68(%rsp), %r14
	leaq	1092(%rsp), %r13
	rep stosl
	xorl	%eax, %eax
.L11:
	movl	%eax, (%r14,%rax,4)
	movss	%xmm0, 0(%r13,%rax,4)
	incq	%rax
	cmpq	$256, %rax
	jne	.L11
	movss	.LC1(%rip), %xmm0
	xorl	%eax, %eax
.L12:
	leaq	2116(%rsp), %r12
	movss	%xmm0, (%r12,%rax,4)
	incq	%rax
	cmpq	$256, %rax
	jne	.L12
	movl	$1028, %esi
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	leaq	.LC2(%rip), %rsi
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	.L34
	leaq	8(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r15d
	testl	%eax, %eax
	je	.L15
	leaq	.LC4(%rip), %rsi
.L34:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r15d, %esi
	movq	%rax, %rdi
.L35:
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	orl	$-1, %eax
	jmp	.L9
.L15:
	movl	$1024, %esi
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC5(%rip), %rsi
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	.L34
	movl	$1024, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC6(%rip), %rsi
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	.L34
	movl	$1024, %esi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC7(%rip), %rsi
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	.L34
	movq	(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$1028, %edx
	call	cudaMemcpy@PLT
	leaq	.LC8(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L36
	movq	8(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	leaq	.LC9(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L36
	movq	16(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	leaq	.LC10(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L36
	movq	24(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	leaq	.LC11(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L36
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$8, %rdx
	movl	$1024, %r8d
	movl	$1, %esi
	movl	$1, 64(%rsp)
	movq	%rdx, 56(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movq	32(%rsp), %r8
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z39__device_stub__Z8spmv_csrPKiS0_PKfS2_PfPKiS0_PKfS2_Pf
.L24:
	call	cudaGetLastError@PLT
	leaq	.LC12(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L36
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movl	$1024, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L26
	leaq	.LC13(%rip), %rsi
.L36:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	jmp	.L35
.L26:
	movq	(%rsp), %rdi
	leaq	_ZSt4cout(%rip), %r12
	xorl	%ebx, %ebx
	leaq	.LC15(%rip), %r13
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC14(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L27:
	movq	%r12, %rdi
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	incq	%rbx
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$10, %rbx
	jne	.L27
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%r12, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%eax, %eax
.L9:
	movq	5192(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$5208, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6832:
	.size	main, .-main
	.section	.rodata.str1.1
.LC16:
	.string	"_Z8spmv_csrPKiS0_PKfS2_Pf"
.LC17:
	.string	"_ZN50_INTERNAL_41a83f33_19_cuda_code_077022_cu_58e3b6e44cuda3std3__419piecewise_constructE"
.LC18:
	.string	"_ZN50_INTERNAL_41a83f33_19_cuda_code_077022_cu_58e3b6e44cuda3std6ranges3__45__cpo4swapE"
.LC19:
	.string	"_ZN50_INTERNAL_41a83f33_19_cuda_code_077022_cu_58e3b6e44cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6860:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8spmv_csrPKiS0_PKfS2_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6860:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.align 4
.LC1:
	.long	1073741824
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// sparse_matrix_vector_multiplication.cu
#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>


namespace cg = cooperative_groups;

// Define matrix dimensions and number of non-zero elements
#define NUM_ROWS 256
#define NUM_COLS 256
#define NUM_NON_ZEROS 256

// Kernel for sparse matrix-vector multiplication
__global__ void spmv_csr(const int* rowPtr, const int* colIdx, const float* val, const float* x, float* y) {
    extern __shared__ float shared_x[];

    int row = blockIdx.x * blockDim.x + threadIdx.x;
    float dot = 0.0f;

    if (row < NUM_ROWS) {
        int row_start = rowPtr[row];
        int row_end = rowPtr[row + 1];

        // Load vector x into shared memory
        for (int i = row_start; i < row_end; i++) {
            int col = colIdx[i];
            shared_x[threadIdx.x] = x[col];
            __syncthreads();

            // Compute dot product
            dot += val[i] * shared_x[threadIdx.x];
            __syncthreads();
        }

        // Store result in y
        y[row] = dot;
    }
}

// Main function to demonstrate the usage of the spmv_csr kernel
int main() {
    // Initialize matrix in CSR format
    int h_rowPtr[NUM_ROWS + 1];
    int h_colIdx[NUM_NON_ZEROS];
    float h_val[NUM_NON_ZEROS];
    float h_x[NUM_COLS];
    float h_y[NUM_ROWS];

    // Initialize data (for demonstration, use simple patterns)
    for (int i = 0; i < NUM_ROWS; i++) {
        h_rowPtr[i] = i * (NUM_NON_ZEROS / NUM_ROWS);
        h_y[i] = 0.0f;
    }
    h_rowPtr[NUM_ROWS] = NUM_NON_ZEROS;

    for (int i = 0; i < NUM_NON_ZEROS; i++) {
        h_colIdx[i] = i % NUM_COLS;
        h_val[i] = 1.0f;
    }

    for (int i = 0; i < NUM_COLS; i++) {
        h_x[i] = 2.0f;
    }

    // Allocate device memory
    int* d_rowPtr;
    int* d_colIdx;
    float* d_val;
    float* d_x;
    float* d_y;

    hipError_t err;
    err = hipMalloc((void**)&d_rowPtr, (NUM_ROWS + 1) * sizeof(int));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device memory for rowPtr (error code " << err << ")" << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_colIdx, NUM_NON_ZEROS * sizeof(int));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device memory for colIdx (error code " << err << ")" << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_val, NUM_NON_ZEROS * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device memory for val (error code " << err << ")" << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_x, NUM_COLS * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device memory for x (error code " << err << ")" << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_y, NUM_ROWS * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device memory for y (error code " << err << ")" << std::endl;
        return -1;
    }

    // Copy data to device
    err = hipMemcpy(d_rowPtr, h_rowPtr, (NUM_ROWS + 1) * sizeof(int), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy rowPtr from host to device (error code " << err << ")" << std::endl;
        return -1;
    }
    err = hipMemcpy(d_colIdx, h_colIdx, NUM_NON_ZEROS * sizeof(int), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy colIdx from host to device (error code " << err << ")" << std::endl;
        return -1;
    }
    err = hipMemcpy(d_val, h_val, NUM_NON_ZEROS * sizeof(float), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy val from host to device (error code " << err << ")" << std::endl;
        return -1;
    }
    err = hipMemcpy(d_x, h_x, NUM_COLS * sizeof(float), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy x from host to device (error code " << err << ")" << std::endl;
        return -1;
    }

    // Define block size and grid size
    int blockSize = 256;
    int gridSize = (NUM_ROWS + blockSize - 1) / blockSize;

    // Launch kernel
    spmv_csr<<<gridSize, blockSize, blockSize * sizeof(float)>>>(d_rowPtr, d_colIdx, d_val, d_x, d_y);
    err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Failed to launch spmv_csr kernel (error code " << err << ")" << std::endl;
        return -1;
    }

    // Copy result back to host
    err = hipMemcpy(h_y, d_y, NUM_ROWS * sizeof(float), hipMemcpyDeviceToHost);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy y from device to host (error code " << err << ")" << std::endl;
        return -1;
    }

    // Free device memory
    hipFree(d_rowPtr);
    hipFree(d_colIdx);
    hipFree(d_val);
    hipFree(d_x);
    hipFree(d_y);

    // Print result (first 10 elements for brevity)
    std::cout << "Result vector y (first 10 elements): ";
    for (int i = 0; i < 10; i++) {
        std::cout << h_y[i] << " ";
    }
    std::cout << std::endl;

    return 0;
}
	.text
	.file	"cuda_code_077022.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z23__device_stub__spmv_csrPKiS0_PKfS2_Pf # -- Begin function _Z23__device_stub__spmv_csrPKiS0_PKfS2_Pf
	.type	_Z23__device_stub__spmv_csrPKiS0_PKfS2_Pf,@function
_Z23__device_stub__spmv_csrPKiS0_PKfS2_Pf: # @_Z23__device_stub__spmv_csrPKiS0_PKfS2_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8spmv_csrPKiS0_PKfS2_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__spmv_csrPKiS0_PKfS2_Pf, .Lfunc_end0-_Z23__device_stub__spmv_csrPKiS0_PKfS2_Pf
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$5184, %rsp                     # imm = 0x1440
	.cfi_def_cfa_offset 5200
	.cfi_offset %rbx, -16
	leaq	48(%rsp), %rdi
	xorl	%ebx, %ebx
	movl	$1024, %edx                     # imm = 0x400
	xorl	%esi, %esi
	callq	memset@PLT
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%ebx, 1072(%rsp,%rbx,4)
	incq	%rbx
	cmpq	$256, %rbx                      # imm = 0x100
	jne	.LBB1_1
# %bb.2:
	movl	$256, 2096(%rsp)                # imm = 0x100
	xorl	%eax, %eax
.LBB1_3:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, 4160(%rsp,%rax,4)
	movl	$1065353216, 3136(%rsp,%rax,4)  # imm = 0x3F800000
	incq	%rax
	cmpq	$256, %rax                      # imm = 0x100
	jne	.LBB1_3
# %bb.4:                                # %.preheader.preheader
	xorl	%eax, %eax
.LBB1_5:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	$1073741824, 2112(%rsp,%rax,4)  # imm = 0x40000000
	incq	%rax
	cmpq	$256, %rax                      # imm = 0x100
	jne	.LBB1_5
# %bb.6:
	leaq	40(%rsp), %rdi
	movl	$1028, %esi                     # imm = 0x404
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_8
# %bb.7:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	jmp	.LBB1_10
.LBB1_8:
	leaq	32(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_14
# %bb.9:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
.LBB1_10:
	movl	$56, %edx
.LBB1_11:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cerr, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_12:
	movl	$-1, %eax
.LBB1_13:
	addq	$5184, %rsp                     # imm = 0x1440
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB1_14:
	.cfi_def_cfa_offset 5200
	leaq	24(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_16
# %bb.15:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$53, %edx
	jmp	.LBB1_11
.LBB1_16:
	leaq	16(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_18
# %bb.17:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.4, %esi
	movl	$51, %edx
	jmp	.LBB1_11
.LBB1_18:
	leaq	8(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_21
# %bb.19:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
.LBB1_20:
	movl	$51, %edx
	jmp	.LBB1_26
.LBB1_21:
	movq	40(%rsp), %rdi
	leaq	1072(%rsp), %rsi
	movl	$1028, %edx                     # imm = 0x404
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_23
# %bb.22:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.6, %esi
	jmp	.LBB1_25
.LBB1_23:
	movq	32(%rsp), %rdi
	leaq	4160(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_27
# %bb.24:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.7, %esi
.LBB1_25:
	movl	$54, %edx
.LBB1_26:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cerr, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	jmp	.LBB1_12
.LBB1_27:
	movq	24(%rsp), %rdi
	leaq	3136(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_29
# %bb.28:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.8, %esi
	jmp	.LBB1_20
.LBB1_29:
	movq	16(%rsp), %rdi
	leaq	2112(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_32
# %bb.30:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.9, %esi
.LBB1_31:
	movl	$49, %edx
	jmp	.LBB1_26
.LBB1_32:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	255(%rdi), %rdx
	movl	$1024, %r8d                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_34
# %bb.33:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	movq	8(%rsp), %r8
	callq	_Z23__device_stub__spmv_csrPKiS0_PKfS2_Pf
.LBB1_34:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_36
# %bb.35:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.10, %esi
	movl	$45, %edx
	jmp	.LBB1_26
.LBB1_36:
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	movl	$1024, %edx                     # imm = 0x400
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_38
# %bb.37:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.11, %esi
	jmp	.LBB1_31
.LBB1_38:
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %edi
	movl	$.L.str.12, %esi
	movl	$37, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%ebx, %ebx
.LBB1_39:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	48(%rsp,%rbx,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.13, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%rbx
	cmpq	$10, %rbx
	jne	.LBB1_39
# %bb.40:
	movl	$_ZSt4cout, %edi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	xorl	%eax, %eax
	jmp	.LBB1_13
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8spmv_csrPKiS0_PKfS2_Pf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8spmv_csrPKiS0_PKfS2_Pf,@object # @_Z8spmv_csrPKiS0_PKfS2_Pf
	.section	.rodata,"a",@progbits
	.globl	_Z8spmv_csrPKiS0_PKfS2_Pf
	.p2align	3, 0x0
_Z8spmv_csrPKiS0_PKfS2_Pf:
	.quad	_Z23__device_stub__spmv_csrPKiS0_PKfS2_Pf
	.size	_Z8spmv_csrPKiS0_PKfS2_Pf, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to allocate device memory for rowPtr (error code "
	.size	.L.str, 57

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	")"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate device memory for colIdx (error code "
	.size	.L.str.2, 57

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate device memory for val (error code "
	.size	.L.str.3, 54

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to allocate device memory for x (error code "
	.size	.L.str.4, 52

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to allocate device memory for y (error code "
	.size	.L.str.5, 52

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to copy rowPtr from host to device (error code "
	.size	.L.str.6, 55

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to copy colIdx from host to device (error code "
	.size	.L.str.7, 55

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Failed to copy val from host to device (error code "
	.size	.L.str.8, 52

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to copy x from host to device (error code "
	.size	.L.str.9, 50

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Failed to launch spmv_csr kernel (error code "
	.size	.L.str.10, 46

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Failed to copy y from device to host (error code "
	.size	.L.str.11, 50

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Result vector y (first 10 elements): "
	.size	.L.str.12, 38

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	" "
	.size	.L.str.13, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8spmv_csrPKiS0_PKfS2_Pf"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__spmv_csrPKiS0_PKfS2_Pf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8spmv_csrPKiS0_PKfS2_Pf
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8spmv_csrPKiS0_PKfS2_Pf ; -- Begin function _Z8spmv_csrPKiS0_PKfS2_Pf
	.globl	_Z8spmv_csrPKiS0_PKfS2_Pf
	.p2align	8
	.type	_Z8spmv_csrPKiS0_PKfS2_Pf,@function
_Z8spmv_csrPKiS0_PKfS2_Pf:              ; @_Z8spmv_csrPKiS0_PKfS2_Pf
; %bb.0:
	s_load_b32 s2, s[0:1], 0x34
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x100, v1
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[2:3], s[0:1], 0x20
	v_mov_b32_e32 v9, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v3, v4
	s_cbranch_execz .LBB0_5
; %bb.2:                                ; %.lr.ph
	v_ashrrev_i32_e32 v6, 31, v3
	v_mov_b32_e32 v5, v3
	v_lshl_add_u32 v0, v0, 2, 0
	v_mov_b32_e32 v9, 0
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[5:6]
	v_add_co_u32 v5, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v8, vcc_lo
	v_add_co_u32 v7, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v10, v[5:6], off
	v_add_nc_u32_e32 v3, 1, v3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_add_co_u32 v10, vcc_lo, s10, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v11, vcc_lo
	v_add_co_u32 v5, vcc_lo, v5, 4
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	global_load_b32 v10, v[10:11], off
	v_cmp_ge_i32_e32 vcc_lo, v3, v4
	s_or_b32 s4, vcc_lo, s4
	s_waitcnt vmcnt(0)
	ds_store_b32 v0, v10
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	global_load_b32 v10, v[7:8], off
	ds_load_b32 v11, v0
	v_add_co_u32 v7, s0, v7, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s0, 0, v8, s0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_fmac_f32_e32 v9, v10, v11
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_5:                                ; %Flow45
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v0, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[0:1], v9, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8spmv_csrPKiS0_PKfS2_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8spmv_csrPKiS0_PKfS2_Pf, .Lfunc_end0-_Z8spmv_csrPKiS0_PKfS2_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 408
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         160
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8spmv_csrPKiS0_PKfS2_Pf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8spmv_csrPKiS0_PKfS2_Pf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
