#include <iostream>
#include <cuda_runtime.h>
#include <cuda_fp16.h>

#define N_TOKENS 2048
#define HEADS 8
#define EMBED_DIM 64
#define BATCH_SIZE 1

__device__ __forceinline__ float softmax(float value, float* max_val, float* sum_exp) {
    float max_v = atomicMax((int*)max_val, __float_as_int(value));
    float exp_val = __expf(value - max_v);
    atomicAdd(sum_exp, exp_val);
    return exp_val;
}

__global__ void compute_attention(float* Q, float* K, float* V, float* output) {
    extern __shared__ float shared_mem[];
    float* shared_K = shared_mem;
    float* shared_V = shared_mem + N_TOKENS * EMBED_DIM / HEADS;

    int batch_id = blockIdx.x;
    int head_id = blockIdx.y;
    int token_id = threadIdx.x;

    float q_val[EMBED_DIM / HEADS];
    float k_val[EMBED_DIM / HEADS];
    float v_val[EMBED_DIM / HEADS];
    float dot_product = 0.0f;

    // Load Q values for this token
    for (int i = 0; i < EMBED_DIM / HEADS; ++i) {
        q_val[i] = Q[(batch_id * HEADS + head_id) * N_TOKENS * EMBED_DIM / HEADS + token_id * EMBED_DIM / HEADS + i];
    }

    // Load K and V values into shared memory
    for (int j = 0; j < N_TOKENS; j += blockDim.x) {
        int k_idx = j + token_id;
        if (k_idx < N_TOKENS) {
            for (int i = 0; i < EMBED_DIM / HEADS; ++i) {
                shared_K[k_idx * EMBED_DIM / HEADS + i] = K[(batch_id * HEADS + head_id) * N_TOKENS * EMBED_DIM / HEADS + k_idx * EMBED_DIM / HEADS + i];
                shared_V[k_idx * EMBED_DIM / HEADS + i] = V[(batch_id * HEADS + head_id) * N_TOKENS * EMBED_DIM / HEADS + k_idx * EMBED_DIM / HEADS + i];
            }
        }
        __syncthreads();

        // Compute dot product of Q and K
        for (int k = 0; k < N_TOKENS; k += blockDim.x) {
            int k_idx = k + token_id;
            if (k_idx < N_TOKENS) {
                for (int i = 0; i < EMBED_DIM / HEADS; ++i) {
                    dot_product += q_val[i] * shared_K[k_idx * EMBED_DIM / HEADS + i];
                }
            }
            __syncthreads();

            // Normalize dot product and compute weighted sum
            float max_val = -1e9f;
            float sum_exp = 0.0f;
            float exp_val = softmax(dot_product / sqrtf(EMBED_DIM / HEADS), &max_val, &sum_exp);
            __syncthreads();

            for (int i = 0; i < EMBED_DIM / HEADS; ++i) {
                atomicAdd(&output[(batch_id * HEADS + head_id) * N_TOKENS * EMBED_DIM / HEADS + token_id * EMBED_DIM / HEADS + i],
                          exp_val * shared_V[k_idx * EMBED_DIM / HEADS + i] / sum_exp);
            }
            __syncthreads();
            dot_product = 0.0f;
        }
    }
}

int main() {
    float *Q, *K, *V, *output;
    float *d_Q, *d_K, *d_V, *d_output;

    // Allocate host memory
    size_t size = BATCH_SIZE * HEADS * N_TOKENS * EMBED_DIM / HEADS * sizeof(float);
    Q = (float*)malloc(size);
    K = (float*)malloc(size);
    V = (float*)malloc(size);
    output = (float*)malloc(size);

    // Initialize host memory with some values
    for (int i = 0; i < size / sizeof(float); ++i) {
        Q[i] = 1.0f;
        K[i] = 1.0f;
        V[i] = 1.0f;
        output[i] = 0.0f;
    }

    // Allocate device memory
    cudaMalloc((void**)&d_Q, size);
    cudaMalloc((void**)&d_K, size);
    cudaMalloc((void**)&d_V, size);
    cudaMalloc((void**)&d_output, size);

    // Copy data from host to device
    cudaMemcpy(d_Q, Q, size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_K, K, size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_V, V, size, cudaMemcpyHostToDevice);

    // Define block and grid dimensions
    dim3 threadsPerBlock(N_TOKENS);
    dim3 blocksPerGrid(BATCH_SIZE, HEADS);

    // Launch kernel
    size_t sharedMemSize = 2 * N_TOKENS * EMBED_DIM / HEADS * sizeof(float);
    compute_attention<<<blocksPerGrid, threadsPerBlock, sharedMemSize>>>(d_Q, d_K, d_V, d_output);

    // Check for errors in kernel launch
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy result back to host
    cudaMemcpy(output, d_output, size, cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_Q);
    cudaFree(d_K);
    cudaFree(d_V);
    cudaFree(d_output);

    // Free host memory
    free(Q);
    free(K);
    free(V);
    free(output);

    return 0;
}
	.file	"tmpxft_001610c0_00000000-6_cuda_code_044468.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4013:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4013:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z43__device_stub__Z17compute_attentionPfS_S_S_PfS_S_S_
	.type	_Z43__device_stub__Z17compute_attentionPfS_S_S_PfS_S_S_, @function
_Z43__device_stub__Z17compute_attentionPfS_S_S_PfS_S_S_:
.LFB4035:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17compute_attentionPfS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4035:
	.size	_Z43__device_stub__Z17compute_attentionPfS_S_S_PfS_S_S_, .-_Z43__device_stub__Z17compute_attentionPfS_S_S_PfS_S_S_
	.globl	_Z17compute_attentionPfS_S_S_
	.type	_Z17compute_attentionPfS_S_S_, @function
_Z17compute_attentionPfS_S_S_:
.LFB4036:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z17compute_attentionPfS_S_S_PfS_S_S_
	.cfi_endproc
.LFE4036:
	.size	_Z17compute_attentionPfS_S_S_, .-_Z17compute_attentionPfS_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"CUDA error: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4010:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$524288, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$524288, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$524288, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$524288, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movss	.LC0(%rip), %xmm0
	movq	%rax, %rbx
	xorl	%eax, %eax
.L9:
	movss	%xmm0, 0(%r13,%rax)
	movss	%xmm0, (%r12,%rax)
	movss	%xmm0, 0(%rbp,%rax)
	addq	$4, %rax
	cmpq	$524288, %rax
	jne	.L9
	xorl	%eax, %eax
	movl	$131072, %ecx
	movq	%rbx, %rdi
	movl	$524288, %esi
	rep stosl
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$524288, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$524288, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$524288, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$524288, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$524288, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$524288, %edx
	call	cudaMemcpy@PLT
	movl	$2097153, %edx
	xorl	%r9d, %r9d
	movl	$131072, %r8d
	salq	$11, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$34359738369, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z43__device_stub__Z17compute_attentionPfS_S_S_PfS_S_S_
.L10:
	call	cudaGetLastError@PLT
	movl	%eax, %r14d
	testl	%eax, %eax
	je	.L11
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L8
.L11:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$524288, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	xorl	%eax, %eax
.L8:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4010:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z17compute_attentionPfS_S_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4038:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z17compute_attentionPfS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4038:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_fp16.h>

#define N_TOKENS 2048
#define HEADS 8
#define EMBED_DIM 64
#define BATCH_SIZE 1

__device__ __forceinline__ float softmax(float value, float* max_val, float* sum_exp) {
    float max_v = atomicMax((int*)max_val, __float_as_int(value));
    float exp_val = __expf(value - max_v);
    atomicAdd(sum_exp, exp_val);
    return exp_val;
}

__global__ void compute_attention(float* Q, float* K, float* V, float* output) {
    extern __shared__ float shared_mem[];
    float* shared_K = shared_mem;
    float* shared_V = shared_mem + N_TOKENS * EMBED_DIM / HEADS;

    int batch_id = blockIdx.x;
    int head_id = blockIdx.y;
    int token_id = threadIdx.x;

    float q_val[EMBED_DIM / HEADS];
    float k_val[EMBED_DIM / HEADS];
    float v_val[EMBED_DIM / HEADS];
    float dot_product = 0.0f;

    // Load Q values for this token
    for (int i = 0; i < EMBED_DIM / HEADS; ++i) {
        q_val[i] = Q[(batch_id * HEADS + head_id) * N_TOKENS * EMBED_DIM / HEADS + token_id * EMBED_DIM / HEADS + i];
    }

    // Load K and V values into shared memory
    for (int j = 0; j < N_TOKENS; j += blockDim.x) {
        int k_idx = j + token_id;
        if (k_idx < N_TOKENS) {
            for (int i = 0; i < EMBED_DIM / HEADS; ++i) {
                shared_K[k_idx * EMBED_DIM / HEADS + i] = K[(batch_id * HEADS + head_id) * N_TOKENS * EMBED_DIM / HEADS + k_idx * EMBED_DIM / HEADS + i];
                shared_V[k_idx * EMBED_DIM / HEADS + i] = V[(batch_id * HEADS + head_id) * N_TOKENS * EMBED_DIM / HEADS + k_idx * EMBED_DIM / HEADS + i];
            }
        }
        __syncthreads();

        // Compute dot product of Q and K
        for (int k = 0; k < N_TOKENS; k += blockDim.x) {
            int k_idx = k + token_id;
            if (k_idx < N_TOKENS) {
                for (int i = 0; i < EMBED_DIM / HEADS; ++i) {
                    dot_product += q_val[i] * shared_K[k_idx * EMBED_DIM / HEADS + i];
                }
            }
            __syncthreads();

            // Normalize dot product and compute weighted sum
            float max_val = -1e9f;
            float sum_exp = 0.0f;
            float exp_val = softmax(dot_product / sqrtf(EMBED_DIM / HEADS), &max_val, &sum_exp);
            __syncthreads();

            for (int i = 0; i < EMBED_DIM / HEADS; ++i) {
                atomicAdd(&output[(batch_id * HEADS + head_id) * N_TOKENS * EMBED_DIM / HEADS + token_id * EMBED_DIM / HEADS + i],
                          exp_val * shared_V[k_idx * EMBED_DIM / HEADS + i] / sum_exp);
            }
            __syncthreads();
            dot_product = 0.0f;
        }
    }
}

int main() {
    float *Q, *K, *V, *output;
    float *d_Q, *d_K, *d_V, *d_output;

    // Allocate host memory
    size_t size = BATCH_SIZE * HEADS * N_TOKENS * EMBED_DIM / HEADS * sizeof(float);
    Q = (float*)malloc(size);
    K = (float*)malloc(size);
    V = (float*)malloc(size);
    output = (float*)malloc(size);

    // Initialize host memory with some values
    for (int i = 0; i < size / sizeof(float); ++i) {
        Q[i] = 1.0f;
        K[i] = 1.0f;
        V[i] = 1.0f;
        output[i] = 0.0f;
    }

    // Allocate device memory
    hipMalloc((void**)&d_Q, size);
    hipMalloc((void**)&d_K, size);
    hipMalloc((void**)&d_V, size);
    hipMalloc((void**)&d_output, size);

    // Copy data from host to device
    hipMemcpy(d_Q, Q, size, hipMemcpyHostToDevice);
    hipMemcpy(d_K, K, size, hipMemcpyHostToDevice);
    hipMemcpy(d_V, V, size, hipMemcpyHostToDevice);

    // Define block and grid dimensions
    dim3 threadsPerBlock(N_TOKENS);
    dim3 blocksPerGrid(BATCH_SIZE, HEADS);

    // Launch kernel
    size_t sharedMemSize = 2 * N_TOKENS * EMBED_DIM / HEADS * sizeof(float);
    compute_attention<<<blocksPerGrid, threadsPerBlock, sharedMemSize>>>(d_Q, d_K, d_V, d_output);

    // Check for errors in kernel launch
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy result back to host
    hipMemcpy(output, d_output, size, hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_Q);
    hipFree(d_K);
    hipFree(d_V);
    hipFree(d_output);

    // Free host memory
    free(Q);
    free(K);
    free(V);
    free(output);

    return 0;
}
	.text
	.file	"cuda_code_044468.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z32__device_stub__compute_attentionPfS_S_S_ # -- Begin function _Z32__device_stub__compute_attentionPfS_S_S_
	.type	_Z32__device_stub__compute_attentionPfS_S_S_,@function
_Z32__device_stub__compute_attentionPfS_S_S_: # @_Z32__device_stub__compute_attentionPfS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17compute_attentionPfS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__compute_attentionPfS_S_S_, .Lfunc_end0-_Z32__device_stub__compute_attentionPfS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$524288, %edi                   # imm = 0x80000
	callq	malloc
	movq	%rax, %rbx
	movl	$524288, %edi                   # imm = 0x80000
	callq	malloc
	movq	%rax, %r14
	movl	$524288, %edi                   # imm = 0x80000
	callq	malloc
	movq	%rax, %r15
	movl	$1, %edi
	movl	$524288, %esi                   # imm = 0x80000
	callq	calloc@PLT
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	xorl	%eax, %eax
	movl	$1065353216, %ecx               # imm = 0x3F800000
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%ecx, (%rbx,%rax,4)
	movl	%ecx, (%r14,%rax,4)
	movl	%ecx, (%r15,%rax,4)
	incq	%rax
	cmpq	$131072, %rax                   # imm = 0x20000
	jne	.LBB1_1
# %bb.2:
	leaq	24(%rsp), %r12
	movl	$524288, %esi                   # imm = 0x80000
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rbp
	movl	$524288, %esi                   # imm = 0x80000
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r13
	movl	$524288, %esi                   # imm = 0x80000
	movq	%r13, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$524288, %esi                   # imm = 0x80000
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$524288, %edx                   # imm = 0x80000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$524288, %edx                   # imm = 0x80000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$524288, %edx                   # imm = 0x80000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$34359738369, %rdi              # imm = 0x800000001
	movabsq	$4294969344, %rdx               # imm = 0x100000800
	movl	$131072, %r8d                   # imm = 0x20000
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	(%rsp), %rcx
	callq	_Z32__device_stub__compute_attentionPfS_S_S_
.LBB1_4:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_9
# %bb.5:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_6
# %bb.7:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_8
.LBB1_9:
	movq	(%rsp), %rsi
	movl	$524288, %edx                   # imm = 0x80000
	movq	32(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	xorl	%eax, %eax
	jmp	.LBB1_10
.LBB1_6:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_8:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB1_10:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17compute_attentionPfS_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17compute_attentionPfS_S_S_,@object # @_Z17compute_attentionPfS_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z17compute_attentionPfS_S_S_
	.p2align	3, 0x0
_Z17compute_attentionPfS_S_S_:
	.quad	_Z32__device_stub__compute_attentionPfS_S_S_
	.size	_Z17compute_attentionPfS_S_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17compute_attentionPfS_S_S_"
	.size	.L__unnamed_1, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__compute_attentionPfS_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17compute_attentionPfS_S_S_
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17compute_attentionPfS_S_S_ ; -- Begin function _Z17compute_attentionPfS_S_S_
	.globl	_Z17compute_attentionPfS_S_S_
	.p2align	8
	.type	_Z17compute_attentionPfS_S_S_,@function
_Z17compute_attentionPfS_S_S_:          ; @_Z17compute_attentionPfS_S_S_
; %bb.0:
	s_lshl_b32 s2, s15, 17
	s_lshl_b32 s3, s14, 20
	v_lshlrev_b32_e32 v12, 3, v0
	s_load_b256 s[4:11], s[0:1], 0x0
	s_add_i32 s3, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_ashr_i32 s12, s3, 3
	s_mov_b64 s[2:3], 0
	v_or_b32_e32 v9, s12, v12
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[9:10]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v10, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v2, vcc_lo
                                        ; implicit-def: $vgpr1
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v13, v[10:11], off
	v_add_co_u32 v10, vcc_lo, v10, 4
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v11, vcc_lo
	s_mov_b32 m0, s2
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 8
	s_waitcnt vmcnt(0)
	v_movreld_b32_e32 v1, v13
	s_cbranch_scc0 .LBB0_1
; %bb.2:                                ; %.preheader68
	s_load_b32 s0, s[0:1], 0x2c
	v_lshl_add_u32 v14, v0, 5, 0
	v_dual_mov_b32 v16, 0xce6e6b28 :: v_dual_add_nc_u32 v15, s12, v12
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v17, v14
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s0, 0xffff
	s_lshl_b32 s4, s2, 3
	s_lshl_b32 s5, s2, 5
.LBB0_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;     Child Loop BB0_7 Depth 2
                                        ;       Child Loop BB0_9 Depth 3
                                        ;       Child Loop BB0_11 Depth 3
                                        ;         Child Loop BB0_12 Depth 4
	v_add_nc_u32_e32 v10, s3, v0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x800, v10
	s_cbranch_execz .LBB0_6
; %bb.4:                                ; %.preheader66
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_mov_b32_e32 v10, v15
	s_mov_b32 s1, 0
.LBB0_5:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[11:12], 2, v[10:11]
	v_add_nc_u32_e32 v10, 1, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v19, vcc_lo, s7, v12, vcc_lo
	v_add_co_u32 v11, vcc_lo, s8, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s9, v12, vcc_lo
	global_load_b32 v13, v[18:19], off
	global_load_b32 v11, v[11:12], off
	v_add_nc_u32_e32 v12, s1, v17
	s_add_i32 s1, s1, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s1, 32
	v_add_nc_u32_e32 v18, 0x10000, v12
	s_waitcnt vmcnt(1)
	ds_store_b32 v12, v13
	s_waitcnt vmcnt(0)
	ds_store_b32 v18, v11
	s_cbranch_scc1 .LBB0_5
.LBB0_6:                                ; %Flow125
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v18, v14
	s_mov_b32 s12, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_7:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_9 Depth 3
                                        ;       Child Loop BB0_11 Depth 3
                                        ;         Child Loop BB0_12 Depth 4
	v_dual_mov_b32 v11, 0 :: v_dual_add_nc_u32 v10, s12, v0
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x800, v10
	s_cbranch_execz .LBB0_10
; %bb.8:                                ; %.preheader
                                        ;   in Loop: Header=BB0_7 Depth=2
	v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, v18
	s_mov_b64 s[0:1], 0
.LBB0_9:                                ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	ds_load_b32 v13, v12
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v19, v1
	v_add_nc_u32_e32 v12, 4, v12
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 8
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, v19, v13
	s_cbranch_scc1 .LBB0_9
.LBB0_10:                               ; %Flow123
                                        ;   in Loop: Header=BB0_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v12, null, 0x403504f3, 0x403504f3, v11
	v_div_scale_f32 v20, vcc_lo, v11, 0x403504f3, v11
	v_rcp_f32_e32 v13, v12
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s0, 0
	v_lshlrev_b32_e32 v10, 5, v10
	v_fma_f32 v19, -v12, v13, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v19, v13
	v_mul_f32_e32 v19, v20, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v21, -v12, v19, v20
	v_fmac_f32_e32 v19, v21, v13
	v_add3_u32 v21, 0, 0x10000, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v12, -v12, v19, v20
	v_div_fmas_f32 v12, v12, v13, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v11, v12, 0x403504f3, v11
	v_add_f32_e32 v12, 0x4e464653, v11
	v_max_i32_e32 v11, 0xce6e6b28, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, 0x3fb8aa3b, v12
	v_exp_f32_e32 v19, v12
	s_waitcnt_depctr 0xfff
	v_add_f32_e32 v12, 0, v19
	s_clause 0x2
	scratch_store_b32 off, v16, off offset:4
	scratch_store_b32 off, v11, off offset:4
	scratch_store_b32 off, v12, off offset:8
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	scratch_load_b32 v20, off, off offset:8
.LBB0_11:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_7 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_12 Depth 4
	v_lshl_add_u32 v12, s0, 2, v21
	s_mov_b32 s1, 0
	ds_load_b32 v12, v12
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v12, v19, v12
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v22, null, v20, v20, v12
	v_rcp_f32_e32 v23, v22
	s_waitcnt_depctr 0xfff
	v_fma_f32 v24, -v22, v23, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v23, v24, v23 :: v_dual_add_nc_u32 v10, s0, v9
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_add_co_u32 v10, vcc_lo, s10, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v11, vcc_lo
	v_div_scale_f32 v24, vcc_lo, v12, v20, v12
	global_load_b32 v13, v[10:11], off
	v_mul_f32_e32 v25, v24, v23
	v_fma_f32 v26, -v22, v25, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v25, v26, v23
	v_fma_f32 v22, -v22, v25, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v22, v22, v23, v25
	v_div_fixup_f32 v22, v22, v20, v12
.LBB0_12:                               ; %atomicrmw.start
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_7 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v12, v13, v22
	global_atomic_cmpswap_b32 v12, v[10:11], v[12:13], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v12, v13
	v_mov_b32_e32 v13, v12
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_12
; %bb.13:                               ; %atomicrmw.end
                                        ;   in Loop: Header=BB0_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 8
	s_cbranch_scc0 .LBB0_11
; %bb.14:                               ;   in Loop: Header=BB0_7 Depth=2
	v_add_nc_u32_e32 v18, s5, v18
	s_add_i32 s12, s12, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_gt_u32 s12, 0x7ff
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_7
; %bb.15:                               ;   in Loop: Header=BB0_3 Depth=1
	v_add_nc_u32_e32 v15, s4, v15
	v_add_nc_u32_e32 v17, s5, v17
	s_add_i32 s3, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_gt_u32 s3, 0x7ff
	s_cbranch_scc0 .LBB0_3
; %bb.16:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17compute_attentionPfS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 12
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 27
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17compute_attentionPfS_S_S_, .Lfunc_end0-_Z17compute_attentionPfS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 972
; NumSgprs: 18
; NumVgprs: 27
; ScratchSize: 12
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 27
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17compute_attentionPfS_S_S_
    .private_segment_fixed_size: 12
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17compute_attentionPfS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     27
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
