#include <iostream>
#include <cuda_runtime.h>

// Define the number of layers and neurons per layer
#define LAYERS 8
#define NEURONS 256

// Kernel to perform a simple matrix-vector multiplication
// This represents a single layer of the neural network
__global__ void matrixVectorMul(float* A, float* B, float* C, int N) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    if (idx < N) {
        float sum = 0.0f;
        for (int i = 0; i < N; ++i) {
            sum += A[idx * N + i] * B[i];
        }
        C[idx] = sum;
    }
}

// Function to initialize a matrix with random values
void initMatrix(float* matrix, int rows, int cols) {
    for (int i = 0; i < rows * cols; ++i) {
        matrix[i] = static_cast<float>(rand()) / RAND_MAX;
    }
}

// Function to initialize a vector with random values
void initVector(float* vector, int size) {
    for (int i = 0; i < size; ++i) {
        vector[i] = static_cast<float>(rand()) / RAND_MAX;
    }
}

// Main function to demonstrate the usage of the kernel
int main() {
    // Allocate memory for input and output data
    float* h_A[LAYERS];
    float* h_B[LAYERS];
    float* h_C[LAYERS];

    for (int i = 0; i < LAYERS; ++i) {
        cudaMallocManaged(&h_A[i], NEURONS * NEURONS * sizeof(float));
        cudaMallocManaged(&h_B[i], NEURONS * sizeof(float));
        cudaMallocManaged(&h_C[i], NEURONS * sizeof(float));

        // Initialize input data
        initMatrix(h_A[i], NEURONS, NEURONS);
        initVector(h_B[i], NEURONS);
    }

    // Define block and grid sizes
    dim3 blockSize(256);
    dim3 gridSize((NEURONS + blockSize.x - 1) / blockSize.x);

    // Launch the kernel for each layer
    for (int i = 0; i < LAYERS; ++i) {
        matrixVectorMul<<<gridSize, blockSize>>>(h_A[i], h_B[i], h_C[i], NEURONS);

        // Wait for the GPU to finish before launching the next kernel
        cudaDeviceSynchronize();

        // Check for errors
        cudaError_t err = cudaGetLastError();
        if (err != cudaSuccess) {
            std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
            return -1;
        }

        // For the next layer, use the output of the current layer as input
        if (i < LAYERS - 1) {
            cudaMemcpy(h_B[i + 1], h_C[i], NEURONS * sizeof(float), cudaMemcpyDeviceToDevice);
        }
    }

    // Print the output of the last layer (first 10 elements for brevity)
    std::cout << "Output of the last layer (first 10 elements): ";
    for (int i = 0; i < 10; ++i) {
        std::cout << h_C[LAYERS - 1][i] << " ";
    }
    std::cout << std::endl;

    // Free allocated memory
    for (int i = 0; i < LAYERS; ++i) {
        cudaFree(h_A[i]);
        cudaFree(h_B[i]);
        cudaFree(h_C[i]);
    }

    return 0;
}
	.file	"tmpxft_000bf9bf_00000000-6_cuda_code_065453.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10initMatrixPfii
	.type	_Z10initMatrixPfii, @function
_Z10initMatrixPfii:
.LFB3635:
	.cfi_startproc
	endbr64
	imull	%edx, %esi
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
	movl	%esi, %ebp
.L3:
	cmpl	%ebx, %ebp
	jle	.L7
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L3
.L7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z10initMatrixPfii, .-_Z10initMatrixPfii
	.globl	_Z10initVectorPfi
	.type	_Z10initVectorPfi, @function
_Z10initVectorPfi:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L9:
	cmpl	%ebx, %ebp
	jle	.L12
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L9
.L12:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z10initVectorPfi, .-_Z10initVectorPfi
	.globl	_Z40__device_stub__Z15matrixVectorMulPfS_S_iPfS_S_i
	.type	_Z40__device_stub__Z15matrixVectorMulPfS_S_iPfS_S_i, @function
_Z40__device_stub__Z15matrixVectorMulPfS_S_iPfS_S_i:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15matrixVectorMulPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L13:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z40__device_stub__Z15matrixVectorMulPfS_S_iPfS_S_i, .-_Z40__device_stub__Z15matrixVectorMulPfS_S_iPfS_S_i
	.globl	_Z15matrixVectorMulPfS_S_i
	.type	_Z15matrixVectorMulPfS_S_i, @function
_Z15matrixVectorMulPfS_S_i:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z15matrixVectorMulPfS_S_iPfS_S_i
	.cfi_endproc
.LFE3663:
	.size	_Z15matrixVectorMulPfS_S_i, .-_Z15matrixVectorMulPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"CUDA error: "
.LC2:
	.string	"Output of the last layer (first 10 elements): "
.LC3:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %r14
	leaq	88(%rsp), %rbp
	movq	%r14, %r13
.L19:
	movq	%r14, %rdi
	movl	$1, %edx
	addq	$8, %r14
	movl	$262144, %esi
	call	cudaMallocManaged@PLT
	leaq	0(%rbp,%rbx), %rdi
	movl	$1, %edx
	movl	$1024, %esi
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	movl	$1024, %esi
	leaq	152(%rsp), %r12
	leaq	(%r12,%rbx), %rdi
	addq	$8, %rbx
	call	cudaMallocManaged@PLT
	movq	-8(%r14), %rdi
	movl	$256, %edx
	movl	$256, %esi
	call	_Z10initMatrixPfii
	movq	-8(%rbx,%rbp), %rdi
	movl	$256, %esi
	call	_Z10initVectorPfi
	cmpq	$64, %rbx
	jne	.L19
	movabsq	$4294967297, %rax
	movl	$1, 20(%rsp)
	xorl	%ebx, %ebx
	leaq	144(%rsp), %r15
	movq	%rax, 4(%rsp)
	movq	%rax, 12(%rsp)
.L25:
	movl	8(%rsp), %ecx
	movq	12(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$256, (%rsp)
	movl	20(%rsp), %esi
	movq	(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	(%r12,%rbx), %rdx
	movq	0(%rbp,%rbx), %rsi
	movl	$256, %ecx
	movq	0(%r13,%rbx), %rdi
	call	_Z40__device_stub__Z15matrixVectorMulPfS_S_iPfS_S_i
.L20:
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %r14d
	testl	%eax, %eax
	je	.L21
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L18
.L21:
	addq	$8, %rbx
	cmpq	$64, %rbx
	jne	.L23
	leaq	_ZSt4cout(%rip), %r14
	leaq	.LC2(%rip), %rsi
	xorl	%ebx, %ebx
	movq	%r14, %rdi
	leaq	.LC3(%rip), %r15
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L24
.L23:
	movq	0(%rbp,%rbx), %rdi
	movq	(%r15,%rbx), %rsi
	movl	$3, %ecx
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	jmp	.L25
.L24:
	movq	208(%rsp), %rax
	movq	%r14, %rdi
	cvtss2sd	(%rax,%rbx), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	addq	$4, %rbx
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$40, %rbx
	jne	.L24
	movq	%r14, %rdi
	xorl	%ebx, %ebx
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L26:
	movq	0(%r13,%rbx), %rdi
	call	cudaFree@PLT
	movq	0(%rbp,%rbx), %rdi
	call	cudaFree@PLT
	movq	(%r12,%rbx), %rdi
	addq	$8, %rbx
	call	cudaFree@PLT
	cmpq	$64, %rbx
	jne	.L26
	xorl	%eax, %eax
.L18:
	movq	216(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z15matrixVectorMulPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15matrixVectorMulPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

// Define the number of layers and neurons per layer
#define LAYERS 8
#define NEURONS 256

// Kernel to perform a simple matrix-vector multiplication
// This represents a single layer of the neural network
__global__ void matrixVectorMul(float* A, float* B, float* C, int N) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    if (idx < N) {
        float sum = 0.0f;
        for (int i = 0; i < N; ++i) {
            sum += A[idx * N + i] * B[i];
        }
        C[idx] = sum;
    }
}

// Function to initialize a matrix with random values
void initMatrix(float* matrix, int rows, int cols) {
    for (int i = 0; i < rows * cols; ++i) {
        matrix[i] = static_cast<float>(rand()) / RAND_MAX;
    }
}

// Function to initialize a vector with random values
void initVector(float* vector, int size) {
    for (int i = 0; i < size; ++i) {
        vector[i] = static_cast<float>(rand()) / RAND_MAX;
    }
}

// Main function to demonstrate the usage of the kernel
int main() {
    // Allocate memory for input and output data
    float* h_A[LAYERS];
    float* h_B[LAYERS];
    float* h_C[LAYERS];

    for (int i = 0; i < LAYERS; ++i) {
        hipMallocManaged(&h_A[i], NEURONS * NEURONS * sizeof(float));
        hipMallocManaged(&h_B[i], NEURONS * sizeof(float));
        hipMallocManaged(&h_C[i], NEURONS * sizeof(float));

        // Initialize input data
        initMatrix(h_A[i], NEURONS, NEURONS);
        initVector(h_B[i], NEURONS);
    }

    // Define block and grid sizes
    dim3 blockSize(256);
    dim3 gridSize((NEURONS + blockSize.x - 1) / blockSize.x);

    // Launch the kernel for each layer
    for (int i = 0; i < LAYERS; ++i) {
        matrixVectorMul<<<gridSize, blockSize>>>(h_A[i], h_B[i], h_C[i], NEURONS);

        // Wait for the GPU to finish before launching the next kernel
        hipDeviceSynchronize();

        // Check for errors
        hipError_t err = hipGetLastError();
        if (err != hipSuccess) {
            std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
            return -1;
        }

        // For the next layer, use the output of the current layer as input
        if (i < LAYERS - 1) {
            hipMemcpy(h_B[i + 1], h_C[i], NEURONS * sizeof(float), hipMemcpyDeviceToDevice);
        }
    }

    // Print the output of the last layer (first 10 elements for brevity)
    std::cout << "Output of the last layer (first 10 elements): ";
    for (int i = 0; i < 10; ++i) {
        std::cout << h_C[LAYERS - 1][i] << " ";
    }
    std::cout << std::endl;

    // Free allocated memory
    for (int i = 0; i < LAYERS; ++i) {
        hipFree(h_A[i]);
        hipFree(h_B[i]);
        hipFree(h_C[i]);
    }

    return 0;
}
	.text
	.file	"cuda_code_065453.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z30__device_stub__matrixVectorMulPfS_S_i # -- Begin function _Z30__device_stub__matrixVectorMulPfS_S_i
	.type	_Z30__device_stub__matrixVectorMulPfS_S_i,@function
_Z30__device_stub__matrixVectorMulPfS_S_i: # @_Z30__device_stub__matrixVectorMulPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15matrixVectorMulPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__matrixVectorMulPfS_S_i, .Lfunc_end0-_Z30__device_stub__matrixVectorMulPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10initMatrixPfii
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z10initMatrixPfii
	.type	_Z10initMatrixPfii,@function
_Z10initMatrixPfii:                     # @_Z10initMatrixPfii
	.cfi_startproc
# %bb.0:
	imull	%edx, %esi
	testl	%esi, %esi
	jle	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB1_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_4:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z10initMatrixPfii, .Lfunc_end1-_Z10initMatrixPfii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10initVectorPfi
.LCPI2_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z10initVectorPfi
	.type	_Z10initVectorPfi,@function
_Z10initVectorPfi:                      # @_Z10initVectorPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB2_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB2_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB2_4:                                # %._crit_edge
	retq
.Lfunc_end2:
	.size	_Z10initVectorPfi, .Lfunc_end2-_Z10initVectorPfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%r15d, %r15d
.LBB3_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
                                        #     Child Loop BB3_4 Depth 2
	leaq	(%rsp,%r15,8), %r14
	addq	$128, %r14
	movl	$262144, %esi                   # imm = 0x40000
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	(%rsp,%r15,8), %rbx
	addq	$64, %rbx
	movl	$1024, %esi                     # imm = 0x400
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	(%rsp,%r15,8), %rdi
	movl	$1024, %esi                     # imm = 0x400
	movl	$1, %edx
	callq	hipMallocManaged
	movq	(%r14), %r14
	xorl	%r12d, %r12d
.LBB3_2:                                # %.lr.ph.i
                                        #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movss	.LCPI3_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r14,%r12,4)
	incq	%r12
	cmpq	$65536, %r12                    # imm = 0x10000
	jne	.LBB3_2
# %bb.3:                                # %_Z10initMatrixPfii.exit
                                        #   in Loop: Header=BB3_1 Depth=1
	movq	(%rbx), %rbx
	xorl	%r14d, %r14d
.LBB3_4:                                # %.lr.ph.i44
                                        #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r14,4)
	incq	%r14
	cmpq	$256, %r14                      # imm = 0x100
	jne	.LBB3_4
# %bb.5:                                # %_Z10initVectorPfi.exit
                                        #   in Loop: Header=BB3_1 Depth=1
	incq	%r15
	cmpq	$8, %r15
	jne	.LBB3_1
# %bb.6:                                # %.preheader.preheader
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	xorl	%r15d, %r15d
	leaq	255(%rbx), %r14
.LBB3_7:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_9
# %bb.8:                                #   in Loop: Header=BB3_7 Depth=1
	movq	128(%rsp,%r15,8), %rdi
	movq	64(%rsp,%r15,8), %rsi
	movq	(%rsp,%r15,8), %rdx
	movl	$256, %ecx                      # imm = 0x100
	callq	_Z30__device_stub__matrixVectorMulPfS_S_i
.LBB3_9:                                #   in Loop: Header=BB3_7 Depth=1
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB3_10
# %bb.12:                               #   in Loop: Header=BB3_7 Depth=1
	cmpq	$7, %r15
	je	.LBB3_16
# %bb.13:                               #   in Loop: Header=BB3_7 Depth=1
	leaq	1(%r15), %r12
	movq	72(%rsp,%r15,8), %rdi
	movq	(%rsp,%r15,8), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movl	$3, %ecx
	callq	hipMemcpy
	movq	%r12, %r15
	jmp	.LBB3_7
.LBB3_10:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB3_11
# %bb.14:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB3_15
.LBB3_16:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$46, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%ebx, %ebx
.LBB3_17:                               # =>This Inner Loop Header: Depth=1
	movq	56(%rsp), %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%rbx,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%rbx
	cmpq	$10, %rbx
	jne	.LBB3_17
# %bb.18:
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB3_19:                               # =>This Inner Loop Header: Depth=1
	movq	128(%rsp,%r14,8), %rdi
	callq	hipFree
	movq	64(%rsp,%r14,8), %rdi
	callq	hipFree
	movq	(%rsp,%r14,8), %rdi
	callq	hipFree
	incq	%r14
	cmpq	$8, %r14
	jne	.LBB3_19
	jmp	.LBB3_20
.LBB3_11:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB3_15:
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %ebx
.LBB3_20:                               # %.loopexit
	movl	%ebx, %eax
	addq	$192, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15matrixVectorMulPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15matrixVectorMulPfS_S_i,@object # @_Z15matrixVectorMulPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z15matrixVectorMulPfS_S_i
	.p2align	3, 0x0
_Z15matrixVectorMulPfS_S_i:
	.quad	_Z30__device_stub__matrixVectorMulPfS_S_i
	.size	_Z15matrixVectorMulPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Output of the last layer (first 10 elements): "
	.size	.L.str.1, 47

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" "
	.size	.L.str.2, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15matrixVectorMulPfS_S_i"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__matrixVectorMulPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15matrixVectorMulPfS_S_i
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15matrixVectorMulPfS_S_i ; -- Begin function _Z15matrixVectorMulPfS_S_i
	.globl	_Z15matrixVectorMulPfS_S_i
	.p2align	8
	.type	_Z15matrixVectorMulPfS_S_i,@function
_Z15matrixVectorMulPfS_S_i:             ; @_Z15matrixVectorMulPfS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v2, v1, s2
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v4, v[2:3], off
	s_load_b32 s3, s[6:7], 0x0
	v_add_co_u32 v2, vcc_lo, v2, 4
	s_add_i32 s2, s2, -1
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s2, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v0, s3, v4
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v0, 0
.LBB0_5:                                ; %Flow36
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15matrixVectorMulPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15matrixVectorMulPfS_S_i, .Lfunc_end0-_Z15matrixVectorMulPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 256
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15matrixVectorMulPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15matrixVectorMulPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
