#include <iostream>
#include <cuda_runtime.h>

// Define grid and block dimensions
#define BLOCK_SIZE 256
#define GRID_SIZE 1

// Define problem size
#define NX 256

// Kernel to perform finite volume fluid simulation step
__global__ void fluidSimulationKernel(float* u, float* u_new, float dt, float dx) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    if (idx > 0 && idx < NX - 1) {
        // Finite volume method for 1D fluid simulation
        float flux_left = 0.5f * (u[idx] + u[idx - 1]);
        float flux_right = 0.5f * (u[idx + 1] + u[idx]);
        u_new[idx] = u[idx] - dt / dx * (flux_right - flux_left);
    }
}

int main() {
    // Allocate host memory
    float* h_u = new float[NX];
    float* h_u_new = new float[NX];

    // Initialize host data
    for (int i = 0; i < NX; i++) {
        h_u[i] = (i < NX / 2) ? 1.0f : 0.0f;
    }

    // Allocate device memory
    float* d_u;
    float* d_u_new;
    cudaError_t err = cudaMalloc((void**)&d_u, NX * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_u_new, NX * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy initial data from host to device
    err = cudaMemcpy(d_u, h_u, NX * sizeof(float), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Simulation parameters
    float dt = 0.01f;
    float dx = 1.0f / (NX - 1);
    int num_steps = 100;

    // Asynchronous memory copy and kernel launch
    for (int step = 0; step < num_steps; step++) {
        // Launch kernel
        fluidSimulationKernel<<<GRID_SIZE, BLOCK_SIZE>>>(d_u, d_u_new, dt, dx);
        err = cudaGetLastError();
        if (err != cudaSuccess) {
            std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
            return -1;
        }

        // Overlap data transfer with computation
        cudaStream_t stream;
        err = cudaStreamCreate(&stream);
        if (err != cudaSuccess) {
            std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
            return -1;
        }

        // Asynchronously copy new data to u
        err = cudaMemcpyAsync(d_u, d_u_new, NX * sizeof(float), cudaMemcpyDeviceToDevice, stream);
        if (err != cudaSuccess) {
            std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
            return -1;
        }

        // Destroy stream
        err = cudaStreamDestroy(stream);
        if (err != cudaSuccess) {
            std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
            return -1;
        }
    }

    // Copy result back to host
    err = cudaMemcpy(h_u_new, d_u, NX * sizeof(float), cudaMemcpyDeviceToHost);
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Free device memory
    cudaFree(d_u);
    cudaFree(d_u_new);

    // Free host memory
    delete[] h_u;
    delete[] h_u_new;

    // Print a sample result
    std::cout << "Simulation result at index 128: " << h_u_new[128] << std::endl;

    return 0;
}
	.file	"tmpxft_000ad1c4_00000000-6_cuda_code_059376.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4293:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4293:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z45__device_stub__Z21fluidSimulationKernelPfS_ffPfS_ff
	.type	_Z45__device_stub__Z21fluidSimulationKernelPfS_ffPfS_ff, @function
_Z45__device_stub__Z21fluidSimulationKernelPfS_ffPfS_ff:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	40(%rsp), %rdx
	movq	%rsi, 16(%rsp)
	leaq	56(%rsp), %rdi
	leaq	68(%rsp), %rsi
	movss	%xmm0, 12(%rsp)
	movss	%xmm1, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z21fluidSimulationKernelPfS_ff(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L3:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z45__device_stub__Z21fluidSimulationKernelPfS_ffPfS_ff, .-_Z45__device_stub__Z21fluidSimulationKernelPfS_ffPfS_ff
	.globl	_Z21fluidSimulationKernelPfS_ff
	.type	_Z21fluidSimulationKernelPfS_ff, @function
_Z21fluidSimulationKernelPfS_ff:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z21fluidSimulationKernelPfS_ffPfS_ff
	.cfi_endproc
.LFE3661:
	.size	_Z21fluidSimulationKernelPfS_ff, .-_Z21fluidSimulationKernelPfS_ff
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"CUDA error: "
.LC5:
	.string	"Simulation result at index 128: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$1024, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$1024, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movq	%rax, %rbx
	xorl	%eax, %eax
.L11:
	xorps	%xmm0, %xmm0
	cmpq	$127, %rax
	ja	.L10
	movss	.LC0(%rip), %xmm0
.L10:
	movss	%xmm0, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$256, %rax
	jne	.L11
	leaq	8(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L32
	leaq	16(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L14
.L32:
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	orl	$-1, %eax
	jmp	.L9
.L14:
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$1024, %edx
	movq	%rbp, %rsi
	movabsq	$4294967552, %r14
	movl	$100, %r13d
	call	cudaMemcpy@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L32
.L16:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%r14, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movss	.LC3(%rip), %xmm1
	movss	.LC4(%rip), %xmm0
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z45__device_stub__Z21fluidSimulationKernelPfS_ffPfS_ff
.L17:
	call	cudaGetLastError@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L32
	leaq	40(%rsp), %rdi
	call	cudaStreamCreate@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L32
	movq	40(%rsp), %r8
	movq	16(%rsp), %rsi
	movl	$3, %ecx
	movl	$1024, %edx
	movq	8(%rsp), %rdi
	call	cudaMemcpyAsync@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L32
	movq	40(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L32
	decl	%r13d
	jne	.L16
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$1024, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L32
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	512(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%eax, %eax
.L9:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z21fluidSimulationKernelPfS_ff"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z21fluidSimulationKernelPfS_ff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.align 4
.LC3:
	.long	998277249
	.align 4
.LC4:
	.long	1008981770
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

// Define grid and block dimensions
#define BLOCK_SIZE 256
#define GRID_SIZE 1

// Define problem size
#define NX 256

// Kernel to perform finite volume fluid simulation step
__global__ void fluidSimulationKernel(float* u, float* u_new, float dt, float dx) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    if (idx > 0 && idx < NX - 1) {
        // Finite volume method for 1D fluid simulation
        float flux_left = 0.5f * (u[idx] + u[idx - 1]);
        float flux_right = 0.5f * (u[idx + 1] + u[idx]);
        u_new[idx] = u[idx] - dt / dx * (flux_right - flux_left);
    }
}

int main() {
    // Allocate host memory
    float* h_u = new float[NX];
    float* h_u_new = new float[NX];

    // Initialize host data
    for (int i = 0; i < NX; i++) {
        h_u[i] = (i < NX / 2) ? 1.0f : 0.0f;
    }

    // Allocate device memory
    float* d_u;
    float* d_u_new;
    hipError_t err = hipMalloc((void**)&d_u, NX * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_u_new, NX * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy initial data from host to device
    err = hipMemcpy(d_u, h_u, NX * sizeof(float), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Simulation parameters
    float dt = 0.01f;
    float dx = 1.0f / (NX - 1);
    int num_steps = 100;

    // Asynchronous memory copy and kernel launch
    for (int step = 0; step < num_steps; step++) {
        // Launch kernel
        fluidSimulationKernel<<<GRID_SIZE, BLOCK_SIZE>>>(d_u, d_u_new, dt, dx);
        err = hipGetLastError();
        if (err != hipSuccess) {
            std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
            return -1;
        }

        // Overlap data transfer with computation
        hipStream_t stream;
        err = hipStreamCreate(&stream);
        if (err != hipSuccess) {
            std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
            return -1;
        }

        // Asynchronously copy new data to u
        err = hipMemcpyAsync(d_u, d_u_new, NX * sizeof(float), hipMemcpyDeviceToDevice, stream);
        if (err != hipSuccess) {
            std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
            return -1;
        }

        // Destroy stream
        err = hipStreamDestroy(stream);
        if (err != hipSuccess) {
            std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
            return -1;
        }
    }

    // Copy result back to host
    err = hipMemcpy(h_u_new, d_u, NX * sizeof(float), hipMemcpyDeviceToHost);
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Free device memory
    hipFree(d_u);
    hipFree(d_u_new);

    // Free host memory
    delete[] h_u;
    delete[] h_u_new;

    // Print a sample result
    std::cout << "Simulation result at index 128: " << h_u_new[128] << std::endl;

    return 0;
}
	.text
	.file	"cuda_code_059376.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z36__device_stub__fluidSimulationKernelPfS_ff # -- Begin function _Z36__device_stub__fluidSimulationKernelPfS_ff
	.type	_Z36__device_stub__fluidSimulationKernelPfS_ff,@function
_Z36__device_stub__fluidSimulationKernelPfS_ff: # @_Z36__device_stub__fluidSimulationKernelPfS_ff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	8(%rsp), %rsi
	movss	%xmm1, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	movq	%rsi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21fluidSimulationKernelPfS_ff, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z36__device_stub__fluidSimulationKernelPfS_ff, .Lfunc_end0-_Z36__device_stub__fluidSimulationKernelPfS_ff
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3f800000                      # float 1
.LCPI1_1:
	.long	0x3c23d70a                      # float 0.00999999977
.LCPI1_2:
	.long	0x3b808081                      # float 0.00392156886
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1024, %edi                     # imm = 0x400
	callq	_Znam
	movq	%rax, %r14
	movl	$1024, %edi                     # imm = 0x400
	callq	_Znam
	movq	%rax, %rbx
	xorl	%eax, %eax
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movaps	%xmm0, %xmm1
	cmpq	$128, %rax
	jb	.LBB1_3
# %bb.2:                                #   in Loop: Header=BB1_1 Depth=1
	xorps	%xmm1, %xmm1
.LBB1_3:                                #   in Loop: Header=BB1_1 Depth=1
	movss	%xmm1, (%r14,%rax,4)
	incq	%rax
	cmpq	$256, %rax                      # imm = 0x100
	jne	.LBB1_1
# %bb.4:
	movq	%rsp, %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.5:
	leaq	8(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.6:
	movq	(%rsp), %rdi
	movl	$1024, %edx                     # imm = 0x400
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_13
.LBB1_7:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_9
# %bb.8:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_10
.LBB1_9:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_10:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_11:                               # %.thread72
	movl	$-1, %eax
.LBB1_12:                               # %.thread72
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_13:                               # %.preheader.preheader
	.cfi_def_cfa_offset 80
	movl	$100, %r13d
	movabsq	$4294967297, %r15               # imm = 0x100000001
	leaq	255(%r15), %r12
.LBB1_14:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_16
# %bb.15:                               #   in Loop: Header=BB1_14 Depth=1
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	movss	.LCPI1_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI1_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	callq	_Z36__device_stub__fluidSimulationKernelPfS_ff
.LBB1_16:                               #   in Loop: Header=BB1_14 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_22
# %bb.17:                               #   in Loop: Header=BB1_14 Depth=1
	leaq	16(%rsp), %rdi
	callq	hipStreamCreate
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.18:                               #   in Loop: Header=BB1_14 Depth=1
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	16(%rsp), %r8
	movl	$1024, %edx                     # imm = 0x400
	movl	$3, %ecx
	callq	hipMemcpyAsync
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.19:                               #   in Loop: Header=BB1_14 Depth=1
	movq	16(%rsp), %rdi
	callq	hipStreamDestroy
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.20:                               #   in Loop: Header=BB1_14 Depth=1
	decl	%r13d
	jne	.LBB1_14
# %bb.21:
	movq	(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_23
.LBB1_22:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	movl	$_ZSt4cerr, %edi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	jmp	.LBB1_11
.LBB1_23:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%rbx, %rdi
	callq	_ZdaPv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	512(%rbx), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	xorl	%eax, %eax
	jmp	.LBB1_12
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21fluidSimulationKernelPfS_ff, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z21fluidSimulationKernelPfS_ff,@object # @_Z21fluidSimulationKernelPfS_ff
	.section	.rodata,"a",@progbits
	.globl	_Z21fluidSimulationKernelPfS_ff
	.p2align	3, 0x0
_Z21fluidSimulationKernelPfS_ff:
	.quad	_Z36__device_stub__fluidSimulationKernelPfS_ff
	.size	_Z21fluidSimulationKernelPfS_ff, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Simulation result at index 128: "
	.size	.L.str.1, 33

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z21fluidSimulationKernelPfS_ff"
	.size	.L__unnamed_1, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z36__device_stub__fluidSimulationKernelPfS_ff
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z21fluidSimulationKernelPfS_ff
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z21fluidSimulationKernelPfS_ff ; -- Begin function _Z21fluidSimulationKernelPfS_ff
	.globl	_Z21fluidSimulationKernelPfS_ff
	.p2align	8
	.type	_Z21fluidSimulationKernelPfS_ff,@function
_Z21fluidSimulationKernelPfS_ff:        ; @_Z21fluidSimulationKernelPfS_ff
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_add_nc_u32_e32 v0, -1, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0xfe, v0
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	v_div_scale_f32 v5, null, s1, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v5, v6, 1.0
	v_fmac_f32_e32 v6, v7, v6
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v4, vcc_lo
	v_div_scale_f32 v8, vcc_lo, s0, s1, s0
	global_load_b96 v[0:2], v[0:1], off offset:-4
	v_mul_f32_e32 v7, v8, v6
	v_fma_f32 v9, -v5, v7, v8
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v7, v9, v6
	v_add_f32_e32 v2, v1, v2
	v_mul_f32_e32 v0, 0.5, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v5, -v5, v7, v8
	v_fma_f32 v0, v2, 0.5, -v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v5, v5, v6, v7
	v_div_fixup_f32 v5, v5, s1, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v2, -v5, v0, v1
	v_add_co_u32 v0, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v4, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21fluidSimulationKernelPfS_ff
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z21fluidSimulationKernelPfS_ff, .Lfunc_end0-_Z21fluidSimulationKernelPfS_ff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21fluidSimulationKernelPfS_ff
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21fluidSimulationKernelPfS_ff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
