#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>

using namespace cooperative_groups;

// Define the number of particles
#define NUM_PARTICLES 64

// Define a simple 3D vector structure
struct Vec3 {
    float x, y, z;
};

// Kernel to perform a single Runge-Kutta step
__global__ void rungeKuttaStep(Vec3 *pos, Vec3 *vel, Vec3 *acc, float dt) {
    // Define a thread group for cooperative group operations
    grid_group grid = this_grid();

    // Calculate the index of the particle this thread is responsible for
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    // Check if the index is within the number of particles
    if (idx < NUM_PARTICLES) {
        // Perform a single Runge-Kutta step for the position and velocity
        Vec3 k1v = {acc[idx].x * dt, acc[idx].y * dt, acc[idx].z * dt};
        Vec3 k1x = {vel[idx].x * dt, vel[idx].y * dt, vel[idx].z * dt};

        Vec3 k2v = {acc[idx].x * dt, acc[idx].y * dt, acc[idx].z * dt};
        Vec3 k2x = {(vel[idx].x + 0.5f * k1v.x) * dt, (vel[idx].y + 0.5f * k1v.y) * dt, (vel[idx].z + 0.5f * k1v.z) * dt};

        Vec3 k3v = {acc[idx].x * dt, acc[idx].y * dt, acc[idx].z * dt};
        Vec3 k3x = {(vel[idx].x + 0.5f * k2v.x) * dt, (vel[idx].y + 0.5f * k2v.y) * dt, (vel[idx].z + 0.5f * k2v.z) * dt};

        Vec3 k4v = {acc[idx].x * dt, acc[idx].y * dt, acc[idx].z * dt};
        Vec3 k4x = {(vel[idx].x + k3v.x) * dt, (vel[idx].y + k3v.y) * dt, (vel[idx].z + k3v.z) * dt};

        pos[idx].x += (k1x.x + 2.0f * k2x.x + 2.0f * k3x.x + k4x.x) / 6.0f;
        pos[idx].y += (k1x.y + 2.0f * k2x.y + 2.0f * k3x.y + k4x.y) / 6.0f;
        pos[idx].z += (k1x.z + 2.0f * k2x.z + 2.0f * k3x.z + k4x.z) / 6.0f;

        vel[idx].x += (k1v.x + 2.0f * k2v.x + 2.0f * k3v.x + k4v.x) / 6.0f;
        vel[idx].y += (k1v.y + 2.0f * k2v.y + 2.0f * k3v.y + k4v.y) / 6.0f;
        vel[idx].z += (k1v.z + 2.0f * k2v.z + 2.0f * k3v.z + k4v.z) / 6.0f;
    }

    // Synchronize all threads in the grid
    grid.sync();
}

// Main function to demonstrate the usage of the rungeKuttaStep kernel
int main() {
    // Allocate memory for positions, velocities, and accelerations on the host
    Vec3 *h_pos = new Vec3[NUM_PARTICLES];
    Vec3 *h_vel = new Vec3[NUM_PARTICLES];
    Vec3 *h_acc = new Vec3[NUM_PARTICLES];

    // Initialize positions, velocities, and accelerations
    for (int i = 0; i < NUM_PARTICLES; ++i) {
        h_pos[i] = {static_cast<float>(i), 0.0f, 0.0f};
        h_vel[i] = {0.0f, 0.0f, 0.0f};
        h_acc[i] = {1.0f, 0.0f, 0.0f}; // Simple constant acceleration for demonstration
    }

    // Allocate memory for positions, velocities, and accelerations on the device
    Vec3 *d_pos, *d_vel, *d_acc;
    cudaMalloc((void**)&d_pos, NUM_PARTICLES * sizeof(Vec3));
    cudaMalloc((void**)&d_vel, NUM_PARTICLES * sizeof(Vec3));
    cudaMalloc((void**)&d_acc, NUM_PARTICLES * sizeof(Vec3));

    // Copy initial positions, velocities, and accelerations to the device
    cudaMemcpy(d_pos, h_pos, NUM_PARTICLES * sizeof(Vec3), cudaMemcpyHostToDevice);
    cudaMemcpy(d_vel, h_vel, NUM_PARTICLES * sizeof(Vec3), cudaMemcpyHostToDevice);
    cudaMemcpy(d_acc, h_acc, NUM_PARTICLES * sizeof(Vec3), cudaMemcpyHostToDevice);

    // Define the time step and number of steps
    float dt = 0.01f;
    int numSteps = 100;

    // Launch the Runge-Kutta kernel for a specified number of steps
    for (int step = 0; step < numSteps; ++step) {
        rungeKuttaStep<<<(NUM_PARTICLES + 255) / 256, 256>>>(d_pos, d_vel, d_acc, dt);
        cudaDeviceSynchronize(); // Ensure all threads have completed the step

        // Check for any CUDA errors
        cudaError_t err = cudaGetLastError();
        if (err != cudaSuccess) {
            std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
            return -1;
        }
    }

    // Copy the final positions back to the host
    cudaMemcpy(h_pos, d_pos, NUM_PARTICLES * sizeof(Vec3), cudaMemcpyDeviceToHost);

    // Print the final positions of the first few particles for verification
    for (int i = 0; i < 5; ++i) {
        std::cout << "Particle " << i << ": (" << h_pos[i].x << ", " << h_pos[i].y << ", " << h_pos[i].z << ")" << std::endl;
    }

    // Free the allocated memory on the device
    cudaFree(d_pos);
    cudaFree(d_vel);
    cudaFree(d_acc);

    // Free the allocated memory on the host
    delete[] h_pos;
    delete[] h_vel;
    delete[] h_acc;

    return 0;
}
	.file	"tmpxft_000892f8_00000000-6_cuda_code_083913.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6835:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6835:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z45__device_stub__Z14rungeKuttaStepP4Vec3S0_S0_fP4Vec3S0_S0_f
	.type	_Z45__device_stub__Z14rungeKuttaStepP4Vec3S0_S0_fP4Vec3S0_S0_f, @function
_Z45__device_stub__Z14rungeKuttaStepP4Vec3S0_S0_fP4Vec3S0_S0_f:
.LFB6857:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14rungeKuttaStepP4Vec3S0_S0_f(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6857:
	.size	_Z45__device_stub__Z14rungeKuttaStepP4Vec3S0_S0_fP4Vec3S0_S0_f, .-_Z45__device_stub__Z14rungeKuttaStepP4Vec3S0_S0_fP4Vec3S0_S0_f
	.globl	_Z14rungeKuttaStepP4Vec3S0_S0_f
	.type	_Z14rungeKuttaStepP4Vec3S0_S0_f, @function
_Z14rungeKuttaStepP4Vec3S0_S0_f:
.LFB6858:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z14rungeKuttaStepP4Vec3S0_S0_fP4Vec3S0_S0_f
	.cfi_endproc
.LFE6858:
	.size	_Z14rungeKuttaStepP4Vec3S0_S0_f, .-_Z14rungeKuttaStepP4Vec3S0_S0_f
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"CUDA error: "
.LC4:
	.string	"Particle "
.LC5:
	.string	": ("
.LC6:
	.string	", "
.LC7:
	.string	")"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6832:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$768, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$768, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movl	$768, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movss	.LC1(%rip), %xmm0
	xorl	%edx, %edx
	movq	%rax, %rbp
	xorl	%eax, %eax
.L9:
	cvtsi2ssl	%edx, %xmm1
	incl	%edx
	movl	$0x00000000, 4(%rbx,%rax)
	movl	$0x00000000, 8(%rbx,%rax)
	movl	$0x00000000, (%r12,%rax)
	movl	$0x00000000, 4(%r12,%rax)
	movl	$0x00000000, 8(%r12,%rax)
	movl	$0x00000000, 4(%rbp,%rax)
	movl	$0x00000000, 8(%rbp,%rax)
	movss	%xmm1, (%rbx,%rax)
	movss	%xmm0, 0(%rbp,%rax)
	addq	$12, %rax
	cmpl	$64, %edx
	jne	.L9
	leaq	8(%rsp), %rdi
	movl	$768, %esi
	movl	$100, %r14d
	movabsq	$4294967552, %r15
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$768, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$768, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$768, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$768, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$768, %edx
	call	cudaMemcpy@PLT
.L13:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movss	.LC2(%rip), %xmm0
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z45__device_stub__Z14rungeKuttaStepP4Vec3S0_S0_fP4Vec3S0_S0_f
.L10:
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	je	.L11
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r13d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L8
.L11:
	decl	%r14d
	jne	.L13
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movq	%rbx, %r13
	movl	$768, %edx
	xorl	%r14d, %r14d
	leaq	.LC4(%rip), %r15
	call	cudaMemcpy@PLT
.L14:
	movq	%r15, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	addq	$12, %r13
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %esi
	incl	%r14d
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	-12(%r13), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	-8(%r13), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	-4(%r13), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpl	$5, %r14d
	jne	.L14
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	xorl	%eax, %eax
.L8:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6832:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z14rungeKuttaStepP4Vec3S0_S0_f"
.LC9:
	.string	"_ZN50_INTERNAL_b4d445f1_19_cuda_code_083913_cu_0e38c28d4cuda3std3__419piecewise_constructE"
.LC10:
	.string	"_ZN50_INTERNAL_b4d445f1_19_cuda_code_083913_cu_0e38c28d4cuda3std6ranges3__45__cpo4swapE"
.LC11:
	.string	"_ZN50_INTERNAL_b4d445f1_19_cuda_code_083913_cu_0e38c28d4cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6860:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14rungeKuttaStepP4Vec3S0_S0_f(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6860:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.align 4
.LC2:
	.long	1008981770
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>

using namespace cooperative_groups;

// Define the number of particles
#define NUM_PARTICLES 64

// Define a simple 3D vector structure
struct Vec3 {
    float x, y, z;
};

// Kernel to perform a single Runge-Kutta step
__global__ void rungeKuttaStep(Vec3 *pos, Vec3 *vel, Vec3 *acc, float dt) {
    // Define a thread group for cooperative group operations
    grid_group grid = this_grid();

    // Calculate the index of the particle this thread is responsible for
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    // Check if the index is within the number of particles
    if (idx < NUM_PARTICLES) {
        // Perform a single Runge-Kutta step for the position and velocity
        Vec3 k1v = {acc[idx].x * dt, acc[idx].y * dt, acc[idx].z * dt};
        Vec3 k1x = {vel[idx].x * dt, vel[idx].y * dt, vel[idx].z * dt};

        Vec3 k2v = {acc[idx].x * dt, acc[idx].y * dt, acc[idx].z * dt};
        Vec3 k2x = {(vel[idx].x + 0.5f * k1v.x) * dt, (vel[idx].y + 0.5f * k1v.y) * dt, (vel[idx].z + 0.5f * k1v.z) * dt};

        Vec3 k3v = {acc[idx].x * dt, acc[idx].y * dt, acc[idx].z * dt};
        Vec3 k3x = {(vel[idx].x + 0.5f * k2v.x) * dt, (vel[idx].y + 0.5f * k2v.y) * dt, (vel[idx].z + 0.5f * k2v.z) * dt};

        Vec3 k4v = {acc[idx].x * dt, acc[idx].y * dt, acc[idx].z * dt};
        Vec3 k4x = {(vel[idx].x + k3v.x) * dt, (vel[idx].y + k3v.y) * dt, (vel[idx].z + k3v.z) * dt};

        pos[idx].x += (k1x.x + 2.0f * k2x.x + 2.0f * k3x.x + k4x.x) / 6.0f;
        pos[idx].y += (k1x.y + 2.0f * k2x.y + 2.0f * k3x.y + k4x.y) / 6.0f;
        pos[idx].z += (k1x.z + 2.0f * k2x.z + 2.0f * k3x.z + k4x.z) / 6.0f;

        vel[idx].x += (k1v.x + 2.0f * k2v.x + 2.0f * k3v.x + k4v.x) / 6.0f;
        vel[idx].y += (k1v.y + 2.0f * k2v.y + 2.0f * k3v.y + k4v.y) / 6.0f;
        vel[idx].z += (k1v.z + 2.0f * k2v.z + 2.0f * k3v.z + k4v.z) / 6.0f;
    }

    // Synchronize all threads in the grid
    grid.sync();
}

// Main function to demonstrate the usage of the rungeKuttaStep kernel
int main() {
    // Allocate memory for positions, velocities, and accelerations on the host
    Vec3 *h_pos = new Vec3[NUM_PARTICLES];
    Vec3 *h_vel = new Vec3[NUM_PARTICLES];
    Vec3 *h_acc = new Vec3[NUM_PARTICLES];

    // Initialize positions, velocities, and accelerations
    for (int i = 0; i < NUM_PARTICLES; ++i) {
        h_pos[i] = {static_cast<float>(i), 0.0f, 0.0f};
        h_vel[i] = {0.0f, 0.0f, 0.0f};
        h_acc[i] = {1.0f, 0.0f, 0.0f}; // Simple constant acceleration for demonstration
    }

    // Allocate memory for positions, velocities, and accelerations on the device
    Vec3 *d_pos, *d_vel, *d_acc;
    hipMalloc((void**)&d_pos, NUM_PARTICLES * sizeof(Vec3));
    hipMalloc((void**)&d_vel, NUM_PARTICLES * sizeof(Vec3));
    hipMalloc((void**)&d_acc, NUM_PARTICLES * sizeof(Vec3));

    // Copy initial positions, velocities, and accelerations to the device
    hipMemcpy(d_pos, h_pos, NUM_PARTICLES * sizeof(Vec3), hipMemcpyHostToDevice);
    hipMemcpy(d_vel, h_vel, NUM_PARTICLES * sizeof(Vec3), hipMemcpyHostToDevice);
    hipMemcpy(d_acc, h_acc, NUM_PARTICLES * sizeof(Vec3), hipMemcpyHostToDevice);

    // Define the time step and number of steps
    float dt = 0.01f;
    int numSteps = 100;

    // Launch the Runge-Kutta kernel for a specified number of steps
    for (int step = 0; step < numSteps; ++step) {
        rungeKuttaStep<<<(NUM_PARTICLES + 255) / 256, 256>>>(d_pos, d_vel, d_acc, dt);
        hipDeviceSynchronize(); // Ensure all threads have completed the step

        // Check for any CUDA errors
        hipError_t err = hipGetLastError();
        if (err != hipSuccess) {
            std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
            return -1;
        }
    }

    // Copy the final positions back to the host
    hipMemcpy(h_pos, d_pos, NUM_PARTICLES * sizeof(Vec3), hipMemcpyDeviceToHost);

    // Print the final positions of the first few particles for verification
    for (int i = 0; i < 5; ++i) {
        std::cout << "Particle " << i << ": (" << h_pos[i].x << ", " << h_pos[i].y << ", " << h_pos[i].z << ")" << std::endl;
    }

    // Free the allocated memory on the device
    hipFree(d_pos);
    hipFree(d_vel);
    hipFree(d_acc);

    // Free the allocated memory on the host
    delete[] h_pos;
    delete[] h_vel;
    delete[] h_acc;

    return 0;
}
	.text
	.file	"cuda_code_083913.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z29__device_stub__rungeKuttaStepP4Vec3S0_S0_f # -- Begin function _Z29__device_stub__rungeKuttaStepP4Vec3S0_S0_f
	.type	_Z29__device_stub__rungeKuttaStepP4Vec3S0_S0_f,@function
_Z29__device_stub__rungeKuttaStepP4Vec3S0_S0_f: # @_Z29__device_stub__rungeKuttaStepP4Vec3S0_S0_f
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14rungeKuttaStepP4Vec3S0_S0_f, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__rungeKuttaStepP4Vec3S0_S0_f, .Lfunc_end0-_Z29__device_stub__rungeKuttaStepP4Vec3S0_S0_f
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3c23d70a                      # float 0.00999999977
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$768, %edi                      # imm = 0x300
	callq	_Znam
	movq	%rax, %rbx
	movl	$768, %edi                      # imm = 0x300
	callq	_Znam
	movq	%rax, %r12
	movl	$768, %edi                      # imm = 0x300
	callq	_Znam
	movq	%rax, %r15
	xorl	%r14d, %r14d
	movl	$768, %edx                      # imm = 0x300
	movq	%r12, 16(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$8, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r14d, %xmm0
	movss	%xmm0, -8(%rbx,%rax)
	movq	$0, -4(%rbx,%rax)
	movq	$1065353216, -8(%r15,%rax)      # imm = 0x3F800000
	movl	$0, (%r15,%rax)
	incq	%r14
	addq	$12, %rax
	cmpq	$64, %r14
	jne	.LBB1_1
# %bb.2:
	movabsq	$4294967297, %r12               # imm = 0x100000001
	leaq	8(%rsp), %r13
	movl	$768, %esi                      # imm = 0x300
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %rbp
	movl	$768, %esi                      # imm = 0x300
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %r14
	movl	$768, %esi                      # imm = 0x300
	movq	%r14, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$768, %edx                      # imm = 0x300
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$768, %edx                      # imm = 0x300
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movl	$768, %edx                      # imm = 0x300
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$100, %r14d
	leaq	255(%r12), %r13
.LBB1_4:                                # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:                                #   in Loop: Header=BB1_4 Depth=1
	movq	8(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z29__device_stub__rungeKuttaStepP4Vec3S0_S0_f
.LBB1_6:                                #   in Loop: Header=BB1_4 Depth=1
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.3:                                #   in Loop: Header=BB1_4 Depth=1
	decl	%r14d
	jne	.LBB1_4
# %bb.11:
	movq	8(%rsp), %rsi
	movl	$768, %edx                      # imm = 0x300
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %r13
	addq	$8, %r13
	xorl	%r12d, %r12d
.LBB1_12:                               # =>This Inner Loop Header: Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r12d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.2, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	-8(%r13), %xmm0
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	-4(%r13), %xmm0
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13), %xmm0
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r14), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r12
	addq	$12, %r13
	cmpq	$5, %r12
	jne	.LBB1_12
# %bb.13:
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	16(%rsp), %rdi                  # 8-byte Reload
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	jmp	.LBB1_14
.LBB1_7:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_8
# %bb.9:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_10
.LBB1_8:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_10:
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB1_14:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14rungeKuttaStepP4Vec3S0_S0_f, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14rungeKuttaStepP4Vec3S0_S0_f,@object # @_Z14rungeKuttaStepP4Vec3S0_S0_f
	.section	.rodata,"a",@progbits
	.globl	_Z14rungeKuttaStepP4Vec3S0_S0_f
	.p2align	3, 0x0
_Z14rungeKuttaStepP4Vec3S0_S0_f:
	.quad	_Z29__device_stub__rungeKuttaStepP4Vec3S0_S0_f
	.size	_Z14rungeKuttaStepP4Vec3S0_S0_f, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Particle "
	.size	.L.str.1, 10

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	": ("
	.size	.L.str.2, 4

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	", "
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	")"
	.size	.L.str.4, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14rungeKuttaStepP4Vec3S0_S0_f"
	.size	.L__unnamed_1, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__rungeKuttaStepP4Vec3S0_S0_f
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14rungeKuttaStepP4Vec3S0_S0_f
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14rungeKuttaStepP4Vec3S0_S0_f ; -- Begin function _Z14rungeKuttaStepP4Vec3S0_S0_f
	.globl	_Z14rungeKuttaStepP4Vec3S0_S0_f
	.p2align	8
	.type	_Z14rungeKuttaStepP4Vec3S0_S0_f,@function
_Z14rungeKuttaStepP4Vec3S0_S0_f:        ; @_Z14rungeKuttaStepP4Vec3S0_S0_f
; %bb.0:
	s_load_b32 s4, s[0:1], 0x2c
	v_and_b32_e32 v1, 0x3ff, v0
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
	v_cmpx_gt_i32_e32 64, v2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_clause 0x1
	s_load_b64 s[10:11], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mad_i64_i32 v[8:9], null, v2, 12, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s10, v8
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v9, vcc_lo
	v_add_co_u32 v11, vcc_lo, s6, v8
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v9, vcc_lo
	v_add_co_u32 v13, vcc_lo, s4, v8
	global_load_b96 v[2:4], v[2:3], off
	global_load_b96 v[5:7], v[11:12], off
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v9, vcc_lo
	s_load_b32 s4, s[0:1], 0x18
	global_load_b96 v[8:10], v[13:14], off
	s_waitcnt vmcnt(2) lgkmcnt(0)
	v_dual_mul_f32 v15, s4, v2 :: v_dual_mul_f32 v16, s4, v3
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v18, 0.5, v15, v5
	v_mul_f32_e32 v17, s4, v4
	v_fma_f32 v19, 0.5, v16, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v18, s4, v18
	v_fma_f32 v20, 0.5, v17, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v19, s4, v19 :: v_dual_mul_f32 v20, s4, v20
	v_dual_add_f32 v21, v18, v18 :: v_dual_add_f32 v22, v19, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v23, v20, v20 :: v_dual_fmac_f32 v22, s4, v6
	v_fmac_f32_e32 v21, s4, v5
	v_fma_f32 v6, s4, v3, v6
	v_fma_f32 v5, s4, v2, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v22, 2.0, v19
	v_fmac_f32_e32 v23, s4, v7
	v_fma_f32 v7, s4, v4, v7
	v_dual_fmac_f32 v22, s4, v6 :: v_dual_fmac_f32 v23, 2.0, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v6, null, 0x40c00000, 0x40c00000, v22
	v_fmac_f32_e32 v23, s4, v7
	v_div_scale_f32 v25, s0, v22, 0x40c00000, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v19, v6
	v_div_scale_f32 v7, null, 0x40c00000, 0x40c00000, v23
	v_div_scale_f32 v29, s1, v23, 0x40c00000, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v20, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v27, -v6, v19, 1.0
	v_fma_f32 v28, -v7, v20, 1.0
	v_dual_fmac_f32 v21, 2.0, v18 :: v_dual_fmac_f32 v20, v28, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v21, s4, v5 :: v_dual_mul_f32 v28, v29, v20
	v_div_scale_f32 v5, null, 0x40c00000, 0x40c00000, v21
	v_div_scale_f32 v24, vcc_lo, v21, 0x40c00000, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v32, -v7, v28, v29
	v_rcp_f32_e32 v18, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v28, v32, v20
	v_fma_f32 v7, -v7, v28, v29
	s_waitcnt_depctr 0xfff
	v_fma_f32 v26, -v5, v18, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v18, v26, v18
	v_mul_f32_e32 v26, v24, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v30, -v5, v26, v24
	v_dual_fmac_f32 v19, v27, v19 :: v_dual_fmac_f32 v26, v30, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v27, v25, v19
	v_fma_f32 v5, -v5, v26, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v31, -v6, v27, v25
	v_div_fmas_f32 v5, v5, v18, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v27, v31, v19
	s_mov_b32 vcc_lo, s0
	v_div_fixup_f32 v5, v5, 0x40c00000, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v6, -v6, v27, v25
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v5, v8, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v6, v6, v19, v27
	s_mov_b32 vcc_lo, s1
	v_fma_f32 v8, 2.0, v15, v15
	v_div_fmas_f32 v7, v7, v20, v28
	v_div_fixup_f32 v6, v6, 0x40c00000, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v8, 2.0, v15
	v_div_fixup_f32 v7, v7, 0x40c00000, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v6, v9, v6
	v_fma_f32 v9, 2.0, v16, v16
	v_dual_fmac_f32 v8, s4, v2 :: v_dual_add_f32 v7, v10, v7
	v_fma_f32 v10, 2.0, v17, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v9, 2.0, v16
	v_div_scale_f32 v2, null, 0x40c00000, 0x40c00000, v8
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v10, 2.0, v17
	global_store_b96 v[13:14], v[5:7], off
	global_load_b96 v[5:7], v[11:12], off
	v_fmac_f32_e32 v9, s4, v3
	v_rcp_f32_e32 v13, v2
	v_fmac_f32_e32 v10, s4, v4
	v_div_scale_f32 v16, vcc_lo, v8, 0x40c00000, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_scale_f32 v3, null, 0x40c00000, 0x40c00000, v9
	v_div_scale_f32 v4, null, 0x40c00000, 0x40c00000, v10
	v_div_scale_f32 v17, s0, v9, 0x40c00000, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(TRANS32_DEP_2)
	v_rcp_f32_e32 v14, v3
	v_fma_f32 v18, -v2, v13, 1.0
	s_delay_alu instid0(VALU_DEP_3)
	v_rcp_f32_e32 v15, v4
	v_div_scale_f32 v21, s1, v10, 0x40c00000, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v19, -v3, v14, 1.0
	v_fmac_f32_e32 v13, v18, v13
	v_fma_f32 v20, -v4, v15, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, v19, v14
	v_dual_mul_f32 v18, v16, v13 :: v_dual_mul_f32 v19, v17, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v22, -v2, v18, v16
	v_fmac_f32_e32 v15, v20, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v23, -v3, v19, v17
	v_fmac_f32_e32 v18, v22, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v20, v21, v15 :: v_dual_fmac_f32 v19, v23, v14
	v_fma_f32 v2, -v2, v18, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v24, -v4, v20, v21
	v_fma_f32 v3, -v3, v19, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v2, v2, v13, v18
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f32 v3, v3, v14, v19
	s_mov_b32 vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v2, v2, 0x40c00000, v8
	v_div_fixup_f32 v3, v3, 0x40c00000, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v20, v24, v15 :: v_dual_add_f32 v3, v3, v6
	v_fma_f32 v4, -v4, v20, v21
	v_add_f32_e32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v4, v4, v15, v20
	v_div_fixup_f32 v4, v4, 0x40c00000, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v4, v7
	global_store_b96 v[11:12], v[2:4], off
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s8
	v_bfe_u32 v2, v0, 20, 10
	v_bfe_u32 v0, v0, 10, 10
	s_mov_b32 s4, exec_lo
	s_waitcnt_vscnt null, 0x0
	buffer_gl1_inv
	buffer_gl0_inv
	s_barrier
	v_or3_b32 v0, v0, v2, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_12
; %bb.3:
	s_load_b64 s[0:1], s[2:3], 0x58
	v_mov_b32_e32 v2, 0
	s_mov_b32 s5, exec_lo
	s_mov_b32 s2, exec_lo
	v_mbcnt_lo_u32_b32 v1, s5, 0
                                        ; implicit-def: $vgpr3
	s_waitcnt lgkmcnt(0)
	global_load_b32 v0, v2, s[0:1] offset:40
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB0_5
; %bb.4:
	s_bcnt1_i32_b32 s3, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v3, s3
	global_atomic_add_u32 v3, v2, v3, s[0:1] offset:32 glc
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v3
	v_add_nc_u32_e32 v3, -1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s2, v1
	s_mov_b32 s2, exec_lo
	v_and_b32_e32 v2, 0xffff, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v2, v3
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB0_9
; %bb.6:                                ; %.preheader.i.i.i.preheader
	v_mov_b32_e32 v0, 0
	s_mov_b32 s3, 0
.LBB0_7:                                ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_load_b32 v2, v0, s[0:1] offset:32 glc
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v2, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_u32_e32 vcc_lo, 0xffff, v2
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_7
; %bb.8:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s3
                                        ; implicit-def: $vgpr0
.LBB0_9:                                ; %Flow132
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB0_12
; %bb.10:
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v1, s2, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	s_and_b32 s3, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s3
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_sub_nc_u32_e32 v0, 0x10000, v0
	s_bcnt1_i32_b32 s2, s2
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_lo_u32 v0, v0, s2
	global_atomic_add_u32 v1, v0, s[0:1] offset:32
.LBB0_12:                               ; %Flow134
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt_vscnt null, 0x0
	s_barrier
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14rungeKuttaStepP4Vec3S0_S0_f
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 33
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14rungeKuttaStepP4Vec3S0_S0_f, .Lfunc_end0-_Z14rungeKuttaStepP4Vec3S0_S0_f
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1412
; NumSgprs: 18
; NumVgprs: 33
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 33
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         120
        .size:           8
        .value_kind:     hidden_multigrid_sync_arg
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14rungeKuttaStepP4Vec3S0_S0_f
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14rungeKuttaStepP4Vec3S0_S0_f.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     33
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
