#include <iostream>
#include <cuda_runtime.h>

// Define the maximum number of non-zero elements
#define MAX_NON_ZERO 256

// Kernel for sparse tensor operations
__global__ void sparseTensorKernel(const int* rowIndices, const int* colIndices, const float* values, float* result, int numRows) {
    // Calculate the global thread index
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    // Ensure the thread index is within the bounds of non-zero elements
    if (idx < MAX_NON_ZERO) {
        int row = rowIndices[idx];
        int col = colIndices[idx];
        float value = values[idx];

        // Perform the operation: add the value to the corresponding position in the result matrix
        atomicAdd(&result[row * numRows + col], value);
    }
}

int main() {
    // Initialize the host arrays
    int h_rowIndices[MAX_NON_ZERO];
    int h_colIndices[MAX_NON_ZERO];
    float h_values[MAX_NON_ZERO];
    float h_result[MAX_NON_ZERO * MAX_NON_ZERO];

    // Initialize the result matrix to zero
    for (int i = 0; i < MAX_NON_ZERO * MAX_NON_ZERO; ++i) {
        h_result[i] = 0.0f;
    }

    // Initialize the sparse tensor data (example data)
    for (int i = 0; i < MAX_NON_ZERO; ++i) {
        h_rowIndices[i] = i % MAX_NON_ZERO; // Example row index
        h_colIndices[i] = i / MAX_NON_ZERO; // Example column index
        h_values[i] = static_cast<float>(i) + 1.0f; // Example value
    }

    // Allocate device memory
    int* d_rowIndices;
    int* d_colIndices;
    float* d_values;
    float* d_result;

    cudaError_t err = cudaMalloc((void**)&d_rowIndices, MAX_NON_ZERO * sizeof(int));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device memory for row indices" << std::endl;
        return -1;
    }

    err = cudaMalloc((void**)&d_colIndices, MAX_NON_ZERO * sizeof(int));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device memory for column indices" << std::endl;
        cudaFree(d_rowIndices);
        return -1;
    }

    err = cudaMalloc((void**)&d_values, MAX_NON_ZERO * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device memory for values" << std::endl;
        cudaFree(d_rowIndices);
        cudaFree(d_colIndices);
        return -1;
    }

    err = cudaMalloc((void**)&d_result, MAX_NON_ZERO * MAX_NON_ZERO * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device memory for result" << std::endl;
        cudaFree(d_rowIndices);
        cudaFree(d_colIndices);
        cudaFree(d_values);
        return -1;
    }

    // Copy data from host to device
    err = cudaMemcpy(d_rowIndices, h_rowIndices, MAX_NON_ZERO * sizeof(int), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy row indices to device" << std::endl;
        cudaFree(d_rowIndices);
        cudaFree(d_colIndices);
        cudaFree(d_values);
        cudaFree(d_result);
        return -1;
    }

    err = cudaMemcpy(d_colIndices, h_colIndices, MAX_NON_ZERO * sizeof(int), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy column indices to device" << std::endl;
        cudaFree(d_rowIndices);
        cudaFree(d_colIndices);
        cudaFree(d_values);
        cudaFree(d_result);
        return -1;
    }

    err = cudaMemcpy(d_values, h_values, MAX_NON_ZERO * sizeof(float), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy values to device" << std::endl;
        cudaFree(d_rowIndices);
        cudaFree(d_colIndices);
        cudaFree(d_values);
        cudaFree(d_result);
        return -1;
    }

    err = cudaMemcpy(d_result, h_result, MAX_NON_ZERO * MAX_NON_ZERO * sizeof(float), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy result to device" << std::endl;
        cudaFree(d_rowIndices);
        cudaFree(d_colIndices);
        cudaFree(d_values);
        cudaFree(d_result);
        return -1;
    }

    // Define the block and grid sizes
    dim3 blockSize(256, 1, 1);
    dim3 gridSize((MAX_NON_ZERO + blockSize.x - 1) / blockSize.x, 1, 1);

    // Launch the kernel
    sparseTensorKernel<<<gridSize, blockSize>>>(d_rowIndices, d_colIndices, d_values, d_result, MAX_NON_ZERO);

    // Check for errors in kernel launch
    err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Kernel launch failed: " << cudaGetErrorString(err) << std::endl;
        cudaFree(d_rowIndices);
        cudaFree(d_colIndices);
        cudaFree(d_values);
        cudaFree(d_result);
        return -1;
    }

    // Copy the result back to the host
    err = cudaMemcpy(h_result, d_result, MAX_NON_ZERO * MAX_NON_ZERO * sizeof(float), cudaMemcpyDeviceToHost);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy result from device to host" << std::endl;
        cudaFree(d_rowIndices);
        cudaFree(d_colIndices);
        cudaFree(d_values);
        cudaFree(d_result);
        return -1;
    }

    // Free device memory
    cudaFree(d_rowIndices);
    cudaFree(d_colIndices);
    cudaFree(d_values);
    cudaFree(d_result);

    // Print the result (first 10 elements for brevity)
    std::cout << "Result (first 10 elements): ";
    for (int i = 0; i < 10; ++i) {
        std::cout << h_result[i] << " ";
    }
    std::cout << std::endl;

    return 0;
}
	.file	"tmpxft_000ead26_00000000-6_cuda_code_063751.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4293:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4293:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z48__device_stub__Z18sparseTensorKernelPKiS0_PKfPfiPKiS0_PKfPfi
	.type	_Z48__device_stub__Z18sparseTensorKernelPKiS0_PKfPfiPKiS0_PKfPfi, @function
_Z48__device_stub__Z18sparseTensorKernelPKiS0_PKfPfiPKiS0_PKfPfi:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z18sparseTensorKernelPKiS0_PKfPfi(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L3:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z48__device_stub__Z18sparseTensorKernelPKiS0_PKfPfiPKiS0_PKfPfi, .-_Z48__device_stub__Z18sparseTensorKernelPKiS0_PKfPfiPKiS0_PKfPfi
	.globl	_Z18sparseTensorKernelPKiS0_PKfPfi
	.type	_Z18sparseTensorKernelPKiS0_PKfPfi, @function
_Z18sparseTensorKernelPKiS0_PKfPfi:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z18sparseTensorKernelPKiS0_PKfPfiPKiS0_PKfPfi
	.cfi_endproc
.LFE3661:
	.size	_Z18sparseTensorKernelPKiS0_PKfPfi, .-_Z18sparseTensorKernelPKiS0_PKfPfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Failed to allocate device memory for row indices"
.LC2:
	.string	"Failed to allocate device memory for column indices"
.LC3:
	.string	"Failed to allocate device memory for values"
.LC4:
	.string	"Failed to allocate device memory for result"
.LC5:
	.string	"Failed to copy row indices to device"
.LC6:
	.string	"Failed to copy column indices to device"
.LC7:
	.string	"Failed to copy values to device"
.LC8:
	.string	"Failed to copy result to device"
.LC9:
	.string	"Kernel launch failed: "
.LC10:
	.string	"Failed to copy result from device to host"
.LC11:
	.string	"Result (first 10 elements): "
.LC12:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leaq	-262144(%rsp), %r11
	.cfi_def_cfa 11, 262184
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$3144, %rsp
	.cfi_def_cfa_offset 265328
	movl	$65536, %ecx
	movss	.LC0(%rip), %xmm1
	movq	%fs:40, %rax
	movq	%rax, 265272(%rsp)
	xorl	%eax, %eax
	leaq	3128(%rsp), %rbx
	movq	%rbx, %rdi
	rep stosl
.L10:
	cvtsi2ssl	%ecx, %xmm0
	leaq	56(%rsp), %r13
	leaq	2104(%rsp), %r12
	movl	%ecx, 0(%r13,%rcx,4)
	addss	%xmm1, %xmm0
	movss	%xmm0, (%r12,%rcx,4)
	incq	%rcx
	cmpq	$256, %rcx
	jne	.L10
	leaq	1080(%rsp), %rbp
	xorl	%eax, %eax
	movl	$1024, %esi
	movq	%rbp, %rdi
	rep stosl
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L11
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L12
.L11:
	leaq	8(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L13
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
.L29:
	call	cudaFree@PLT
.L12:
	orl	$-1, %eax
	jmp	.L9
.L13:
	leaq	16(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L15
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	jmp	.L29
.L15:
	leaq	24(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L16
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	jmp	.L29
.L16:
	movq	(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	leaq	.LC5(%rip), %rsi
	testl	%eax, %eax
	jne	.L31
	movq	8(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	leaq	.LC6(%rip), %rsi
	testl	%eax, %eax
	jne	.L31
	movq	16(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	leaq	.LC7(%rip), %rsi
	testl	%eax, %eax
	jne	.L31
	movq	24(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	leaq	.LC8(%rip), %rsi
	testl	%eax, %eax
	jne	.L31
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$8, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 52(%rsp)
	movq	%rdi, 44(%rsp)
	movq	%rdx, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movl	$256, %r8d
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z48__device_stub__Z18sparseTensorKernelPKiS0_PKfPfiPKiS0_PKfPfi
.L21:
	call	cudaGetLastError@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L22
	leaq	.LC9(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	jmp	.L30
.L22:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$262144, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L23
	leaq	.LC10(%rip), %rsi
.L31:
	leaq	_ZSt4cerr(%rip), %rdi
.L30:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	jmp	.L29
.L23:
	movq	(%rsp), %rdi
	leaq	_ZSt4cout(%rip), %r12
	xorl	%ebp, %ebp
	leaq	.LC12(%rip), %r13
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC11(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L24:
	movq	%r12, %rdi
	cvtss2sd	(%rbx,%rbp,4), %xmm0
	incq	%rbp
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$10, %rbp
	jne	.L24
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%r12, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%eax, %eax
.L9:
	movq	265272(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$265288, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC13:
	.string	"_Z18sparseTensorKernelPKiS0_PKfPfi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18sparseTensorKernelPKiS0_PKfPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

// Define the maximum number of non-zero elements
#define MAX_NON_ZERO 256

// Kernel for sparse tensor operations
__global__ void sparseTensorKernel(const int* rowIndices, const int* colIndices, const float* values, float* result, int numRows) {
    // Calculate the global thread index
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    // Ensure the thread index is within the bounds of non-zero elements
    if (idx < MAX_NON_ZERO) {
        int row = rowIndices[idx];
        int col = colIndices[idx];
        float value = values[idx];

        // Perform the operation: add the value to the corresponding position in the result matrix
        atomicAdd(&result[row * numRows + col], value);
    }
}

int main() {
    // Initialize the host arrays
    int h_rowIndices[MAX_NON_ZERO];
    int h_colIndices[MAX_NON_ZERO];
    float h_values[MAX_NON_ZERO];
    float h_result[MAX_NON_ZERO * MAX_NON_ZERO];

    // Initialize the result matrix to zero
    for (int i = 0; i < MAX_NON_ZERO * MAX_NON_ZERO; ++i) {
        h_result[i] = 0.0f;
    }

    // Initialize the sparse tensor data (example data)
    for (int i = 0; i < MAX_NON_ZERO; ++i) {
        h_rowIndices[i] = i % MAX_NON_ZERO; // Example row index
        h_colIndices[i] = i / MAX_NON_ZERO; // Example column index
        h_values[i] = static_cast<float>(i) + 1.0f; // Example value
    }

    // Allocate device memory
    int* d_rowIndices;
    int* d_colIndices;
    float* d_values;
    float* d_result;

    hipError_t err = hipMalloc((void**)&d_rowIndices, MAX_NON_ZERO * sizeof(int));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device memory for row indices" << std::endl;
        return -1;
    }

    err = hipMalloc((void**)&d_colIndices, MAX_NON_ZERO * sizeof(int));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device memory for column indices" << std::endl;
        hipFree(d_rowIndices);
        return -1;
    }

    err = hipMalloc((void**)&d_values, MAX_NON_ZERO * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device memory for values" << std::endl;
        hipFree(d_rowIndices);
        hipFree(d_colIndices);
        return -1;
    }

    err = hipMalloc((void**)&d_result, MAX_NON_ZERO * MAX_NON_ZERO * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device memory for result" << std::endl;
        hipFree(d_rowIndices);
        hipFree(d_colIndices);
        hipFree(d_values);
        return -1;
    }

    // Copy data from host to device
    err = hipMemcpy(d_rowIndices, h_rowIndices, MAX_NON_ZERO * sizeof(int), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy row indices to device" << std::endl;
        hipFree(d_rowIndices);
        hipFree(d_colIndices);
        hipFree(d_values);
        hipFree(d_result);
        return -1;
    }

    err = hipMemcpy(d_colIndices, h_colIndices, MAX_NON_ZERO * sizeof(int), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy column indices to device" << std::endl;
        hipFree(d_rowIndices);
        hipFree(d_colIndices);
        hipFree(d_values);
        hipFree(d_result);
        return -1;
    }

    err = hipMemcpy(d_values, h_values, MAX_NON_ZERO * sizeof(float), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy values to device" << std::endl;
        hipFree(d_rowIndices);
        hipFree(d_colIndices);
        hipFree(d_values);
        hipFree(d_result);
        return -1;
    }

    err = hipMemcpy(d_result, h_result, MAX_NON_ZERO * MAX_NON_ZERO * sizeof(float), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy result to device" << std::endl;
        hipFree(d_rowIndices);
        hipFree(d_colIndices);
        hipFree(d_values);
        hipFree(d_result);
        return -1;
    }

    // Define the block and grid sizes
    dim3 blockSize(256, 1, 1);
    dim3 gridSize((MAX_NON_ZERO + blockSize.x - 1) / blockSize.x, 1, 1);

    // Launch the kernel
    sparseTensorKernel<<<gridSize, blockSize>>>(d_rowIndices, d_colIndices, d_values, d_result, MAX_NON_ZERO);

    // Check for errors in kernel launch
    err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Kernel launch failed: " << hipGetErrorString(err) << std::endl;
        hipFree(d_rowIndices);
        hipFree(d_colIndices);
        hipFree(d_values);
        hipFree(d_result);
        return -1;
    }

    // Copy the result back to the host
    err = hipMemcpy(h_result, d_result, MAX_NON_ZERO * MAX_NON_ZERO * sizeof(float), hipMemcpyDeviceToHost);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy result from device to host" << std::endl;
        hipFree(d_rowIndices);
        hipFree(d_colIndices);
        hipFree(d_values);
        hipFree(d_result);
        return -1;
    }

    // Free device memory
    hipFree(d_rowIndices);
    hipFree(d_colIndices);
    hipFree(d_values);
    hipFree(d_result);

    // Print the result (first 10 elements for brevity)
    std::cout << "Result (first 10 elements): ";
    for (int i = 0; i < 10; ++i) {
        std::cout << h_result[i] << " ";
    }
    std::cout << std::endl;

    return 0;
}
	.text
	.file	"cuda_code_063751.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__sparseTensorKernelPKiS0_PKfPfi # -- Begin function _Z33__device_stub__sparseTensorKernelPKiS0_PKfPfi
	.type	_Z33__device_stub__sparseTensorKernelPKiS0_PKfPfi,@function
_Z33__device_stub__sparseTensorKernelPKiS0_PKfPfi: # @_Z33__device_stub__sparseTensorKernelPKiS0_PKfPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18sparseTensorKernelPKiS0_PKfPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__sparseTensorKernelPKiS0_PKfPfi, .Lfunc_end0-_Z33__device_stub__sparseTensorKernelPKiS0_PKfPfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:                                # %.preheader.preheader
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$265248, %rsp                   # imm = 0x40C20
	.cfi_def_cfa_offset 265264
	.cfi_offset %rbx, -16
	leaq	3104(%rsp), %rdi
	xorl	%ebx, %ebx
	movl	$262144, %edx                   # imm = 0x40000
	xorl	%esi, %esi
	callq	memset@PLT
	leaq	1056(%rsp), %rdi
	movl	$1024, %edx                     # imm = 0x400
	xorl	%esi, %esi
	callq	memset@PLT
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB1_1:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	%ebx, 2080(%rsp,%rbx,4)
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ebx, %xmm1
	addss	%xmm0, %xmm1
	movss	%xmm1, 32(%rsp,%rbx,4)
	incq	%rbx
	cmpq	$256, %rbx                      # imm = 0x100
	jne	.LBB1_1
# %bb.2:
	movq	%rsp, %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_4
# %bb.3:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$48, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	jmp	.LBB1_22
.LBB1_4:
	leaq	8(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_6
# %bb.5:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	movl	$51, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rdi
	jmp	.LBB1_21
.LBB1_6:
	leaq	24(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_8
# %bb.7:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	movl	$43, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	jmp	.LBB1_21
.LBB1_8:
	leaq	16(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_10
# %bb.9:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$43, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	jmp	.LBB1_21
.LBB1_10:
	movq	(%rsp), %rdi
	leaq	2080(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_12
# %bb.11:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.4, %esi
	movl	$36, %edx
	jmp	.LBB1_19
.LBB1_12:
	movq	8(%rsp), %rdi
	leaq	1056(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_14
# %bb.13:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	movl	$39, %edx
	jmp	.LBB1_19
.LBB1_14:
	movq	24(%rsp), %rdi
	leaq	32(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_16
# %bb.15:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.6, %esi
	jmp	.LBB1_18
.LBB1_16:
	movq	16(%rsp), %rdi
	leaq	3104(%rsp), %rsi
	movl	$262144, %edx                   # imm = 0x40000
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_24
# %bb.17:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.7, %esi
.LBB1_18:
	movl	$31, %edx
.LBB1_19:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cerr, %edi
.LBB1_20:
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
.LBB1_21:
	callq	hipFree
.LBB1_22:
	movl	$-1, %eax
.LBB1_23:
	addq	$265248, %rsp                   # imm = 0x40C20
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB1_24:
	.cfi_def_cfa_offset 265264
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	255(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_26
# %bb.25:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	movl	$256, %r8d                      # imm = 0x100
	callq	_Z33__device_stub__sparseTensorKernelPKiS0_PKfPfi
.LBB1_26:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_28
# %bb.27:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.8, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$_ZSt4cerr, %edi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	jmp	.LBB1_20
.LBB1_28:
	movq	16(%rsp), %rsi
	leaq	3104(%rsp), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_30
# %bb.29:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.9, %esi
	movl	$41, %edx
	jmp	.LBB1_19
.LBB1_30:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%ebx, %ebx
.LBB1_31:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	3104(%rsp,%rbx,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.11, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%rbx
	cmpq	$10, %rbx
	jne	.LBB1_31
# %bb.32:
	movl	$_ZSt4cout, %edi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	xorl	%eax, %eax
	jmp	.LBB1_23
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18sparseTensorKernelPKiS0_PKfPfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18sparseTensorKernelPKiS0_PKfPfi,@object # @_Z18sparseTensorKernelPKiS0_PKfPfi
	.section	.rodata,"a",@progbits
	.globl	_Z18sparseTensorKernelPKiS0_PKfPfi
	.p2align	3, 0x0
_Z18sparseTensorKernelPKiS0_PKfPfi:
	.quad	_Z33__device_stub__sparseTensorKernelPKiS0_PKfPfi
	.size	_Z18sparseTensorKernelPKiS0_PKfPfi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to allocate device memory for row indices"
	.size	.L.str, 49

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Failed to allocate device memory for column indices"
	.size	.L.str.1, 52

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate device memory for values"
	.size	.L.str.2, 44

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate device memory for result"
	.size	.L.str.3, 44

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to copy row indices to device"
	.size	.L.str.4, 37

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to copy column indices to device"
	.size	.L.str.5, 40

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to copy values to device"
	.size	.L.str.6, 32

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to copy result to device"
	.size	.L.str.7, 32

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Kernel launch failed: "
	.size	.L.str.8, 23

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to copy result from device to host"
	.size	.L.str.9, 42

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Result (first 10 elements): "
	.size	.L.str.10, 29

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	" "
	.size	.L.str.11, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18sparseTensorKernelPKiS0_PKfPfi"
	.size	.L__unnamed_1, 35

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__sparseTensorKernelPKiS0_PKfPfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18sparseTensorKernelPKiS0_PKfPfi
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18sparseTensorKernelPKiS0_PKfPfi ; -- Begin function _Z18sparseTensorKernelPKiS0_PKfPfi
	.globl	_Z18sparseTensorKernelPKiS0_PKfPfi
	.p2align	8
	.type	_Z18sparseTensorKernelPKiS0_PKfPfi,@function
_Z18sparseTensorKernelPKiS0_PKfPfi:     ; @_Z18sparseTensorKernelPKiS0_PKfPfi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x34
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x100, v1
	s_cbranch_execz .LBB0_3
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b32 s0, s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v6, v[2:3], off
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v6, s0, v[2:3]
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	v_add_co_u32 v4, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v3, vcc_lo
	global_load_b32 v4, v[4:5], off
	global_load_b32 v3, v[0:1], off
.LBB0_2:                                ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v3, v4
	global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v2, v3
	v_mov_b32_e32 v3, v2
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_2
.LBB0_3:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18sparseTensorKernelPKiS0_PKfPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18sparseTensorKernelPKiS0_PKfPfi, .Lfunc_end0-_Z18sparseTensorKernelPKiS0_PKfPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 252
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18sparseTensorKernelPKiS0_PKfPfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18sparseTensorKernelPKiS0_PKfPfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
