#include <iostream>
#include <cuda_runtime.h>

// Kernel to perform backpropagation for a single convolutional layer
__global__ void convBackpropKernel(float* d_input, float* d_output, float* d_kernel, int inputWidth, int inputHeight, int inputDepth, int filterSize, int outputWidth, int outputHeight, int outputDepth) {
    int ox = blockIdx.x * blockDim.x + threadIdx.x;
    int oy = blockIdx.y * blockDim.y + threadIdx.y;
    int oz = blockIdx.z * blockDim.z + threadIdx.z;

    if (ox < outputWidth && oy < outputHeight && oz < outputDepth) {
        float sum = 0.0f;
        for (int ky = 0; ky < filterSize; ky++) {
            for (int kx = 0; kx < filterSize; kx++) {
                for (int kd = 0; kd < inputDepth; kd++) {
                    int ix = ox + kx;
                    int iy = oy + ky;
                    if (ix >= 0 && ix < inputWidth && iy >= 0 && iy < inputHeight) {
                        sum += d_input[(iy * inputWidth + ix) * inputDepth + kd] * d_kernel[(ky * filterSize + kx) * inputDepth * outputDepth + kd * outputDepth + oz];
                    }
                }
            }
        }
        d_output[(oy * outputWidth + ox) * outputDepth + oz] = sum;
    }
}

void checkCudaError(cudaError_t err, const char* msg) {
    if (err != cudaSuccess) {
        std::cerr << "CUDA Error: " << msg << " (" << cudaGetErrorString(err) << ")" << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    const int inputWidth = 28, inputHeight = 28, inputDepth = 3;
    const int filterSize = 3;
    const int outputWidth = 26, outputHeight = 26, outputDepth = 16;

    // Allocate host memory
    float* h_input = new float[inputWidth * inputHeight * inputDepth];
    float* h_output = new float[outputWidth * outputHeight * outputDepth];
    float* h_kernel = new float[filterSize * filterSize * inputDepth * outputDepth];

    // Initialize host memory
    for (int i = 0; i < inputWidth * inputHeight * inputDepth; i++) h_input[i] = static_cast<float>(rand()) / RAND_MAX;
    for (int i = 0; i < outputWidth * outputHeight * outputDepth; i++) h_output[i] = 0.0f;
    for (int i = 0; i < filterSize * filterSize * inputDepth * outputDepth; i++) h_kernel[i] = static_cast<float>(rand()) / RAND_MAX;

    // Allocate device memory
    float* d_input, *d_output, *d_kernel;
    checkCudaError(cudaMalloc((void**)&d_input, inputWidth * inputHeight * inputDepth * sizeof(float)), "Failed to allocate d_input");
    checkCudaError(cudaMalloc((void**)&d_output, outputWidth * outputHeight * outputDepth * sizeof(float)), "Failed to allocate d_output");
    checkCudaError(cudaMalloc((void**)&d_kernel, filterSize * filterSize * inputDepth * outputDepth * sizeof(float)), "Failed to allocate d_kernel");

    // Asynchronous memory copies
    cudaMemcpyAsync(d_input, h_input, inputWidth * inputHeight * inputDepth * sizeof(float), cudaMemcpyHostToDevice, 0);
    cudaMemcpyAsync(d_kernel, h_kernel, filterSize * filterSize * inputDepth * outputDepth * sizeof(float), cudaMemcpyHostToDevice, 0);

    // Define grid and block sizes
    dim3 blockSize(16, 16, 1);
    dim3 gridSize((outputWidth + blockSize.x - 1) / blockSize.x, (outputHeight + blockSize.y - 1) / blockSize.y, (outputDepth + blockSize.z - 1) / blockSize.z);

    // Launch kernel
    convBackpropKernel<<<gridSize, blockSize>>>(d_input, d_output, d_kernel, inputWidth, inputHeight, inputDepth, filterSize, outputWidth, outputHeight, outputDepth);
    checkCudaError(cudaGetLastError(), "Kernel launch failed");

    // Asynchronous memory copy for output
    cudaMemcpyAsync(h_output, d_output, outputWidth * outputHeight * outputDepth * sizeof(float), cudaMemcpyDeviceToHost, 0);

    // Synchronize to ensure all operations are complete
    cudaDeviceSynchronize();

    // Free device memory
    cudaFree(d_input);
    cudaFree(d_output);
    cudaFree(d_kernel);

    // Free host memory
    delete[] h_input;
    delete[] h_output;
    delete[] h_kernel;

    std::cout << "Backpropagation completed successfully." << std::endl;

    return 0;
}
	.file	"tmpxft_00020711_00000000-6_cuda_code_009899.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA Error: "
.LC1:
	.string	" ("
.LC2:
	.string	")"
	.text
	.globl	_Z14checkCudaError9cudaErrorPKc
	.type	_Z14checkCudaError9cudaErrorPKc, @function
_Z14checkCudaError9cudaErrorPKc:
.LFB3635:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	leaq	.LC0(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	leaq	_ZSt4cerr(%rip), %rdi
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z14checkCudaError9cudaErrorPKc, .-_Z14checkCudaError9cudaErrorPKc
	.globl	_Z49__device_stub__Z18convBackpropKernelPfS_S_iiiiiiiPfS_S_iiiiiii
	.type	_Z49__device_stub__Z18convBackpropKernelPfS_S_iiiiiiiPfS_S_iiiiiii, @function
_Z49__device_stub__Z18convBackpropKernelPfS_S_iiiiiiiPfS_S_iiiiiii:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	64(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z18convBackpropKernelPfS_S_iiiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 240
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L8:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z49__device_stub__Z18convBackpropKernelPfS_S_iiiiiiiPfS_S_iiiiiii, .-_Z49__device_stub__Z18convBackpropKernelPfS_S_iiiiiiiPfS_S_iiiiiii
	.globl	_Z18convBackpropKernelPfS_S_iiiiiii
	.type	_Z18convBackpropKernelPfS_S_iiiiiii, @function
_Z18convBackpropKernelPfS_S_iiiiiii:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z18convBackpropKernelPfS_S_iiiiiiiPfS_S_iiiiiii
	.cfi_endproc
.LFE3662:
	.size	_Z18convBackpropKernelPfS_S_iiiiiii, .-_Z18convBackpropKernelPfS_S_iiiiiii
	.section	.rodata.str1.1
.LC4:
	.string	"Failed to allocate d_input"
.LC5:
	.string	"Failed to allocate d_output"
.LC6:
	.string	"Failed to allocate d_kernel"
.LC7:
	.string	"Kernel launch failed"
.LC8:
	.string	"Backpropagation completed successfully."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$9408, %edi
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$43264, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$1728, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movq	%rax, %rbp
.L14:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC3(%rip), %xmm0
	movss	%xmm0, (%r12,%r13,4)
	incq	%r13
	cmpq	$2352, %r13
	jne	.L14
	movl	$10816, %ecx
	xorl	%eax, %eax
	movq	%rbx, %rdi
	xorl	%r13d, %r13d
	rep stosl
.L15:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC3(%rip), %xmm0
	movss	%xmm0, 0(%rbp,%r13,4)
	incq	%r13
	cmpq	$432, %r13
	jne	.L15
	leaq	8(%rsp), %rdi
	movl	$9408, %esi
	call	cudaMalloc@PLT
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	16(%rsp), %rdi
	movl	$43264, %esi
	call	cudaMalloc@PLT
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	24(%rsp), %rdi
	movl	$1728, %esi
	call	cudaMalloc@PLT
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	8(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%r12, %rsi
	movl	$1, %ecx
	movl	$9408, %edx
	call	cudaMemcpyAsync@PLT
	movq	24(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$1728, %edx
	call	cudaMemcpyAsync@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$16, %esi
	movabsq	$8589934594, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	$16
	.cfi_def_cfa_offset 120
	movl	$3, %r9d
	movl	$28, %r8d
	movl	$28, %ecx
	pushq	$26
	.cfi_def_cfa_offset 128
	pushq	$26
	.cfi_def_cfa_offset 136
	pushq	$3
	.cfi_def_cfa_offset 144
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z49__device_stub__Z18convBackpropKernelPfS_S_iiiiiiiPfS_S_iiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 112
.L16:
	call	cudaGetLastError@PLT
	leaq	.LC7(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	16(%rsp), %rsi
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$43264, %edx
	call	cudaMemcpyAsync@PLT
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	leaq	_ZSt4cout(%rip), %rdi
	leaq	.LC8(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z18convBackpropKernelPfS_S_iiiiiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18convBackpropKernelPfS_S_iiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

// Kernel to perform backpropagation for a single convolutional layer
__global__ void convBackpropKernel(float* d_input, float* d_output, float* d_kernel, int inputWidth, int inputHeight, int inputDepth, int filterSize, int outputWidth, int outputHeight, int outputDepth) {
    int ox = blockIdx.x * blockDim.x + threadIdx.x;
    int oy = blockIdx.y * blockDim.y + threadIdx.y;
    int oz = blockIdx.z * blockDim.z + threadIdx.z;

    if (ox < outputWidth && oy < outputHeight && oz < outputDepth) {
        float sum = 0.0f;
        for (int ky = 0; ky < filterSize; ky++) {
            for (int kx = 0; kx < filterSize; kx++) {
                for (int kd = 0; kd < inputDepth; kd++) {
                    int ix = ox + kx;
                    int iy = oy + ky;
                    if (ix >= 0 && ix < inputWidth && iy >= 0 && iy < inputHeight) {
                        sum += d_input[(iy * inputWidth + ix) * inputDepth + kd] * d_kernel[(ky * filterSize + kx) * inputDepth * outputDepth + kd * outputDepth + oz];
                    }
                }
            }
        }
        d_output[(oy * outputWidth + ox) * outputDepth + oz] = sum;
    }
}

void checkCudaError(hipError_t err, const char* msg) {
    if (err != hipSuccess) {
        std::cerr << "CUDA Error: " << msg << " (" << hipGetErrorString(err) << ")" << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    const int inputWidth = 28, inputHeight = 28, inputDepth = 3;
    const int filterSize = 3;
    const int outputWidth = 26, outputHeight = 26, outputDepth = 16;

    // Allocate host memory
    float* h_input = new float[inputWidth * inputHeight * inputDepth];
    float* h_output = new float[outputWidth * outputHeight * outputDepth];
    float* h_kernel = new float[filterSize * filterSize * inputDepth * outputDepth];

    // Initialize host memory
    for (int i = 0; i < inputWidth * inputHeight * inputDepth; i++) h_input[i] = static_cast<float>(rand()) / RAND_MAX;
    for (int i = 0; i < outputWidth * outputHeight * outputDepth; i++) h_output[i] = 0.0f;
    for (int i = 0; i < filterSize * filterSize * inputDepth * outputDepth; i++) h_kernel[i] = static_cast<float>(rand()) / RAND_MAX;

    // Allocate device memory
    float* d_input, *d_output, *d_kernel;
    checkCudaError(hipMalloc((void**)&d_input, inputWidth * inputHeight * inputDepth * sizeof(float)), "Failed to allocate d_input");
    checkCudaError(hipMalloc((void**)&d_output, outputWidth * outputHeight * outputDepth * sizeof(float)), "Failed to allocate d_output");
    checkCudaError(hipMalloc((void**)&d_kernel, filterSize * filterSize * inputDepth * outputDepth * sizeof(float)), "Failed to allocate d_kernel");

    // Asynchronous memory copies
    hipMemcpyAsync(d_input, h_input, inputWidth * inputHeight * inputDepth * sizeof(float), hipMemcpyHostToDevice, 0);
    hipMemcpyAsync(d_kernel, h_kernel, filterSize * filterSize * inputDepth * outputDepth * sizeof(float), hipMemcpyHostToDevice, 0);

    // Define grid and block sizes
    dim3 blockSize(16, 16, 1);
    dim3 gridSize((outputWidth + blockSize.x - 1) / blockSize.x, (outputHeight + blockSize.y - 1) / blockSize.y, (outputDepth + blockSize.z - 1) / blockSize.z);

    // Launch kernel
    convBackpropKernel<<<gridSize, blockSize>>>(d_input, d_output, d_kernel, inputWidth, inputHeight, inputDepth, filterSize, outputWidth, outputHeight, outputDepth);
    checkCudaError(hipGetLastError(), "Kernel launch failed");

    // Asynchronous memory copy for output
    hipMemcpyAsync(h_output, d_output, outputWidth * outputHeight * outputDepth * sizeof(float), hipMemcpyDeviceToHost, 0);

    // Synchronize to ensure all operations are complete
    hipDeviceSynchronize();

    // Free device memory
    hipFree(d_input);
    hipFree(d_output);
    hipFree(d_kernel);

    // Free host memory
    delete[] h_input;
    delete[] h_output;
    delete[] h_kernel;

    std::cout << "Backpropagation completed successfully." << std::endl;

    return 0;
}
	.text
	.file	"cuda_code_009899.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__convBackpropKernelPfS_S_iiiiiii # -- Begin function _Z33__device_stub__convBackpropKernelPfS_S_iiiiiii
	.type	_Z33__device_stub__convBackpropKernelPfS_S_iiiiiii,@function
_Z33__device_stub__convBackpropKernelPfS_S_iiiiiii: # @_Z33__device_stub__convBackpropKernelPfS_S_iiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18convBackpropKernelPfS_S_iiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__convBackpropKernelPfS_S_iiiiiii, .Lfunc_end0-_Z33__device_stub__convBackpropKernelPfS_S_iiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCudaError10hipError_tPKc # -- Begin function _Z14checkCudaError10hipError_tPKc
	.type	_Z14checkCudaError10hipError_tPKc,@function
_Z14checkCudaError10hipError_tPKc:      # @_Z14checkCudaError10hipError_tPKc
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB1_2
# %bb.1:
	retq
.LBB1_2:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %r14
	movl	%edi, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z14checkCudaError10hipError_tPKc, .Lfunc_end1-_Z14checkCudaError10hipError_tPKc
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$9408, %edi                     # imm = 0x24C0
	callq	_Znam
	movq	%rax, %rbx
	movl	$43264, %edi                    # imm = 0xA900
	callq	_Znam
	movq	%rax, %r14
	movl	$1728, %edi                     # imm = 0x6C0
	callq	_Znam
	movq	%rax, %r15
	xorl	%r12d, %r12d
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	incq	%r12
	cmpq	$2352, %r12                     # imm = 0x930
	jne	.LBB2_1
# %bb.2:                                # %.preheader28.preheader
	xorl	%r12d, %r12d
	movl	$43264, %edx                    # imm = 0xA900
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB2_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpq	$432, %r12                      # imm = 0x1B0
	jne	.LBB2_3
# %bb.4:
	leaq	24(%rsp), %r12
	movl	$9408, %esi                     # imm = 0x24C0
	movq	%r12, %rdi
	callq	hipMalloc
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	leaq	8(%rsp), %rdi
	movl	$43264, %esi                    # imm = 0xA900
	callq	hipMalloc
	movl	$.L.str.4, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	leaq	16(%rsp), %r13
	movl	$1728, %esi                     # imm = 0x6C0
	movq	%r13, %rdi
	callq	hipMalloc
	movl	$.L.str.5, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	(%r12), %rdi
	movl	$9408, %edx                     # imm = 0x24C0
	movq	%rbx, %rsi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movq	(%r13), %rdi
	movl	$1728, %edx                     # imm = 0x6C0
	movq	%r15, %rsi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movabsq	$8589934594, %rdi               # imm = 0x200000002
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$16, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	24(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$26, %eax
	movl	$28, %ecx
	movl	$28, %r8d
	movl	$3, %r9d
	pushq	$16
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	$3
	.cfi_adjust_cfa_offset 8
	callq	_Z33__device_stub__convBackpropKernelPfS_S_iiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB2_6:
	callq	hipGetLastError
	movl	$.L.str.6, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	8(%rsp), %rsi
	movl	$43264, %edx                    # imm = 0xA900
	movq	%r14, %rdi
	movl	$2, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$39, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18convBackpropKernelPfS_S_iiiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18convBackpropKernelPfS_S_iiiiiii,@object # @_Z18convBackpropKernelPfS_S_iiiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z18convBackpropKernelPfS_S_iiiiiii
	.p2align	3, 0x0
_Z18convBackpropKernelPfS_S_iiiiiii:
	.quad	_Z33__device_stub__convBackpropKernelPfS_S_iiiiiii
	.size	_Z18convBackpropKernelPfS_S_iiiiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA Error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" ("
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	")"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate d_input"
	.size	.L.str.3, 27

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to allocate d_output"
	.size	.L.str.4, 28

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to allocate d_kernel"
	.size	.L.str.5, 28

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Kernel launch failed"
	.size	.L.str.6, 21

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Backpropagation completed successfully."
	.size	.L.str.7, 40

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18convBackpropKernelPfS_S_iiiiiii"
	.size	.L__unnamed_1, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__convBackpropKernelPfS_S_iiiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18convBackpropKernelPfS_S_iiiiiii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18convBackpropKernelPfS_S_iiiiiii ; -- Begin function _Z18convBackpropKernelPfS_S_iiiiiii
	.globl	_Z18convBackpropKernelPfS_S_iiiiiii
	.p2align	8
	.type	_Z18convBackpropKernelPfS_S_iiiiiii,@function
_Z18convBackpropKernelPfS_S_iiiiiii:    ; @_Z18convBackpropKernelPfS_S_iiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x44
	s_load_b128 s[4:7], s[0:1], 0x28
	v_bfe_u32 v2, v0, 10, 10
	v_bfe_u32 v5, v0, 20, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	s_mul_i32 s7, s13, s7
	v_mad_u64_u32 v[1:2], null, s15, s3, v[5:6]
	v_add_nc_u32_e32 v3, s7, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s2, s5, v0
	v_cmp_gt_i32_e32 vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e64 s3, s6, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_13
; %bb.1:                                ; %.preheader70
	s_clause 0x2
	s_load_b128 s[12:15], s[0:1], 0x18
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[16:17], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s15, 1
	s_cbranch_scc1 .LBB0_11
; %bb.2:                                ; %.preheader69.lr.ph
	v_mul_lo_u32 v2, s12, v0
	s_cmp_gt_i32 s14, 0
	s_mov_b32 s3, 0
	s_cselect_b32 s5, -1, 0
	s_mul_i32 s18, s14, s12
	v_mov_b32_e32 v9, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add3_u32 v2, v4, v2, s7
	s_mul_i32 s7, s6, s14
	s_mul_i32 s19, s7, s15
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v8, s14, v2
	v_mov_b32_e32 v2, 0
.LBB0_3:                                ; %.preheader69
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_6 Depth 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v11, v8 :: v_dual_add_nc_u32 v4, s3, v0
	v_mov_b32_e32 v10, v9
	s_mov_b32 s20, 0
	v_cmp_gt_i32_e64 s0, 0, v4
	v_cmp_le_i32_e64 s1, s13, v4
.LBB0_4:                                ; %.preheader
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_6 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_9
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v4, s20, v3
	v_mov_b32_e32 v6, v11
	s_mov_b32 s21, s14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, 0, v4
	v_cmp_le_i32_e64 s2, s12, v4
	v_mov_b32_e32 v4, v10
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s2, s0
	s_or_b32 s2, s2, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, s2, -1
.LBB0_6:                                ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s22, s2
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=3
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[12:13], 2, v[6:7]
	v_lshlrev_b64 v[14:15], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v12, vcc_lo, s8, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v14, vcc_lo, s16, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s17, v15, vcc_lo
	global_load_b32 v5, v[12:13], off
	global_load_b32 v7, v[14:15], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v2, v5, v7
.LBB0_8:                                ;   in Loop: Header=BB0_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v6, 1, v6
	v_add_nc_u32_e32 v4, s6, v4
	s_add_i32 s21, s21, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s21, 0
	s_cbranch_scc0 .LBB0_6
.LBB0_9:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v11, s14, v11
	v_add_nc_u32_e32 v10, s7, v10
	s_add_i32 s20, s20, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s20, s15
	s_cbranch_scc0 .LBB0_4
; %bb.10:                               ; %._crit_edge75
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_add_nc_u32_e32 v8, s18, v8
	v_add_nc_u32_e32 v9, s19, v9
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, s15
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_12
.LBB0_11:
	v_mov_b32_e32 v2, 0
.LBB0_12:                               ; %._crit_edge79
	v_mad_u64_u32 v[4:5], null, v0, s4, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v4, s6, v[1:2]
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[5:6]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_13:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18convBackpropKernelPfS_S_iiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 23
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18convBackpropKernelPfS_S_iiiiiii, .Lfunc_end0-_Z18convBackpropKernelPfS_S_iiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 600
; NumSgprs: 25
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 25
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18convBackpropKernelPfS_S_iiiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     25
    .sgpr_spill_count: 0
    .symbol:         _Z18convBackpropKernelPfS_S_iiiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
