// genetic_algorithm.cu
#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>

#define POPULATION_SIZE 32
#define CHROMOSOME_LENGTH 16
#define GENERATIONS 1000

// Kernel to initialize the population with random values
__global__ void initializePopulation(curandState *state, unsigned int *population) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        unsigned int chromosome = 0;
        for (int i = 0; i < CHROMOSOME_LENGTH; ++i) {
            chromosome = (chromosome << 1) | (curand(&state[idx]) & 1);
        }
        population[idx] = chromosome;
    }
}

// Kernel to evaluate fitness (simple example: count number of 1s)
__global__ void evaluateFitness(unsigned int *population, float *fitness) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        unsigned int chromosome = population[idx];
        float score = 0.0f;
        for (int i = 0; i < CHROMOSOME_LENGTH; ++i) {
            score += (chromosome >> i) & 1;
        }
        fitness[idx] = score;
    }
}

// Kernel to perform crossover and mutation
__global__ void crossoverAndMutate(curandState *state, unsigned int *population, float *fitness) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        // Select two parents using fitness-proportional selection
        float totalFitness = 0.0f;
        for (int i = 0; i < POPULATION_SIZE; ++i) {
            totalFitness += fitness[i];
        }
        float r1 = curand_uniform(&state[idx]) * totalFitness;
        float r2 = curand_uniform(&state[idx]) * totalFitness;
        int parent1 = 0, parent2 = 0;
        float sumFitness = 0.0f;
        for (int i = 0; i < POPULATION_SIZE; ++i) {
            sumFitness += fitness[i];
            if (sumFitness >= r1 && parent1 == 0) parent1 = i;
            if (sumFitness >= r2 && parent2 == 0) parent2 = i;
        }

        // Perform crossover
        unsigned int parent1Chromosome = population[parent1];
        unsigned int parent2Chromosome = population[parent2];
        unsigned int crossoverPoint = curand(&state[idx]) % CHROMOSOME_LENGTH;
        unsigned int mask = (1 << crossoverPoint) - 1;
        unsigned int childChromosome = (parent1Chromosome & ~mask) | (parent2Chromosome & mask);

        // Perform mutation
        for (int i = 0; i < CHROMOSOME_LENGTH; ++i) {
            if (curand_uniform(&state[idx]) < 0.01f) { // Mutation rate of 1%
                childChromosome ^= (1 << i);
            }
        }

        population[idx] = childChromosome;
    }
}

int main() {
    unsigned int *d_population;
    float *d_fitness;
    curandState *d_state;

    // Allocate memory on the device
    cudaError_t err = cudaMalloc((void **)&d_population, POPULATION_SIZE * sizeof(unsigned int));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate population memory: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMalloc((void **)&d_fitness, POPULATION_SIZE * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate fitness memory: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMalloc((void **)&d_state, POPULATION_SIZE * sizeof(curandState));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate state memory: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Initialize the random number generator states
    unsigned int seed = 1234;
    int blockSize = 256;
    int numBlocks = (POPULATION_SIZE + blockSize - 1) / blockSize;
    initializePopulation<<<numBlocks, blockSize>>>(d_state, d_population);
    cudaDeviceSynchronize();

    // Main genetic algorithm loop
    for (int generation = 0; generation < GENERATIONS; ++generation) {
        evaluateFitness<<<numBlocks, blockSize>>>(d_population, d_fitness);
        cudaDeviceSynchronize();
        crossoverAndMutate<<<numBlocks, blockSize>>>(d_state, d_population, d_fitness);
        cudaDeviceSynchronize();
    }

    // Copy the final population back to the host
    unsigned int *h_population = new unsigned int[POPULATION_SIZE];
    err = cudaMemcpy(h_population, d_population, POPULATION_SIZE * sizeof(unsigned int), cudaMemcpyDeviceToHost);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy population back to host: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Print the final population
    std::cout << "Final population:" << std::endl;
    for (int i = 0; i < POPULATION_SIZE; ++i) {
        std::cout << "Individual " << i << ": " << h_population[i] << std::endl;
    }

    // Free device memory
    cudaFree(d_population);
    cudaFree(d_fitness);
    cudaFree(d_state);
    delete[] h_population;

    return 0;
}
	.file	"tmpxft_001d00a1_00000000-6_cuda_code_041604.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3852:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3852:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4511:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4511:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPjP17curandStateXORWOWPj
	.type	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPjP17curandStateXORWOWPj, @function
_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPjP17curandStateXORWOWPj:
.LFB3874:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20initializePopulationP17curandStateXORWOWPj(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L3:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3874:
	.size	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPjP17curandStateXORWOWPj, .-_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPjP17curandStateXORWOWPj
	.globl	_Z20initializePopulationP17curandStateXORWOWPj
	.type	_Z20initializePopulationP17curandStateXORWOWPj, @function
_Z20initializePopulationP17curandStateXORWOWPj:
.LFB3875:
	.cfi_startproc
	endbr64
	jmp	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPjP17curandStateXORWOWPj
	.cfi_endproc
.LFE3875:
	.size	_Z20initializePopulationP17curandStateXORWOWPj, .-_Z20initializePopulationP17curandStateXORWOWPj
	.globl	_Z37__device_stub__Z15evaluateFitnessPjPfPjPf
	.type	_Z37__device_stub__Z15evaluateFitnessPjPfPjPf, @function
_Z37__device_stub__Z15evaluateFitnessPjPfPjPf:
.LFB3876:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z15evaluateFitnessPjPf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L9:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3876:
	.size	_Z37__device_stub__Z15evaluateFitnessPjPfPjPf, .-_Z37__device_stub__Z15evaluateFitnessPjPfPjPf
	.globl	_Z15evaluateFitnessPjPf
	.type	_Z15evaluateFitnessPjPf, @function
_Z15evaluateFitnessPjPf:
.LFB3877:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z15evaluateFitnessPjPfPjPf
	.cfi_endproc
.LFE3877:
	.size	_Z15evaluateFitnessPjPf, .-_Z15evaluateFitnessPjPf
	.globl	_Z60__device_stub__Z18crossoverAndMutateP17curandStateXORWOWPjPfP17curandStateXORWOWPjPf
	.type	_Z60__device_stub__Z18crossoverAndMutateP17curandStateXORWOWPjPfP17curandStateXORWOWPjPf, @function
_Z60__device_stub__Z18crossoverAndMutateP17curandStateXORWOWPjPfP17curandStateXORWOWPjPf:
.LFB3878:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z18crossoverAndMutateP17curandStateXORWOWPjPf(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L14:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3878:
	.size	_Z60__device_stub__Z18crossoverAndMutateP17curandStateXORWOWPjPfP17curandStateXORWOWPjPf, .-_Z60__device_stub__Z18crossoverAndMutateP17curandStateXORWOWPjPfP17curandStateXORWOWPjPf
	.globl	_Z18crossoverAndMutateP17curandStateXORWOWPjPf
	.type	_Z18crossoverAndMutateP17curandStateXORWOWPjPf, @function
_Z18crossoverAndMutateP17curandStateXORWOWPjPf:
.LFB3879:
	.cfi_startproc
	endbr64
	jmp	_Z60__device_stub__Z18crossoverAndMutateP17curandStateXORWOWPjPfP17curandStateXORWOWPjPf
	.cfi_endproc
.LFE3879:
	.size	_Z18crossoverAndMutateP17curandStateXORWOWPjPf, .-_Z18crossoverAndMutateP17curandStateXORWOWPjPf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Failed to allocate population memory: "
.LC1:
	.string	"Failed to allocate fitness memory: "
.LC2:
	.string	"Failed to allocate state memory: "
.LC3:
	.string	"Failed to copy population back to host: "
.LC4:
	.string	"Final population:"
.LC5:
	.string	"Individual "
.LC6:
	.string	": "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3849:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$128, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC0(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L35
	leaq	16(%rsp), %rdi
	movl	$128, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L22
	leaq	.LC1(%rip), %rsi
.L35:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
.L36:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	orl	$-1, %eax
	jmp	.L19
.L22:
	movl	$1536, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC2(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L35
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$8, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPjP17curandStateXORWOWPj
.L25:
	call	cudaDeviceSynchronize@PLT
	movl	$16777217, %ebx
	movl	$1000, %r12d
	movabsq	$4294967297, %rbp
	salq	$8, %rbx
.L28:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, 44(%rsp)
	movl	$1, 52(%rsp)
	movq	%rbp, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z37__device_stub__Z15evaluateFitnessPjPfPjPf
.L26:
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, 44(%rsp)
	movl	$1, 52(%rsp)
	movq	%rbp, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z60__device_stub__Z18crossoverAndMutateP17curandStateXORWOWPjPfP17curandStateXORWOWPjPf
.L27:
	call	cudaDeviceSynchronize@PLT
	decl	%r12d
	jne	.L28
	movl	$128, %edi
	call	_Znam@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$128, %edx
	movq	%rax, %rdi
	movq	%rax, %rbx
	call	cudaMemcpy@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L29
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	jmp	.L36
.L29:
	leaq	_ZSt4cout(%rip), %r12
	leaq	.LC4(%rip), %rsi
	xorl	%ebp, %ebp
	movq	%r12, %rdi
	leaq	.LC5(%rip), %r13
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L30:
	movq	%r13, %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	(%rbx,%rbp,4), %esi
	incq	%rbp
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	cmpq	$32, %rbp
	jne	.L30
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	xorl	%eax, %eax
.L19:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3849:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z18crossoverAndMutateP17curandStateXORWOWPjPf"
.LC8:
	.string	"_Z15evaluateFitnessPjPf"
.LC9:
	.string	"_Z20initializePopulationP17curandStateXORWOWPj"
.LC10:
	.string	"precalc_xorwow_matrix"
.LC11:
	.string	"precalc_xorwow_offset_matrix"
.LC12:
	.string	"mrg32k3aM1"
.LC13:
	.string	"mrg32k3aM2"
.LC14:
	.string	"mrg32k3aM1SubSeq"
.LC15:
	.string	"mrg32k3aM2SubSeq"
.LC16:
	.string	"mrg32k3aM1Seq"
.LC17:
	.string	"mrg32k3aM2Seq"
.LC18:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3881:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z18crossoverAndMutateP17curandStateXORWOWPjPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15evaluateFitnessPjPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z20initializePopulationP17curandStateXORWOWPj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3881:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// genetic_algorithm.cu
#include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>

#define POPULATION_SIZE 32
#define CHROMOSOME_LENGTH 16
#define GENERATIONS 1000

// Kernel to initialize the population with random values
__global__ void initializePopulation(hiprandState *state, unsigned int *population) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        unsigned int chromosome = 0;
        for (int i = 0; i < CHROMOSOME_LENGTH; ++i) {
            chromosome = (chromosome << 1) | (hiprand(&state[idx]) & 1);
        }
        population[idx] = chromosome;
    }
}

// Kernel to evaluate fitness (simple example: count number of 1s)
__global__ void evaluateFitness(unsigned int *population, float *fitness) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        unsigned int chromosome = population[idx];
        float score = 0.0f;
        for (int i = 0; i < CHROMOSOME_LENGTH; ++i) {
            score += (chromosome >> i) & 1;
        }
        fitness[idx] = score;
    }
}

// Kernel to perform crossover and mutation
__global__ void crossoverAndMutate(hiprandState *state, unsigned int *population, float *fitness) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        // Select two parents using fitness-proportional selection
        float totalFitness = 0.0f;
        for (int i = 0; i < POPULATION_SIZE; ++i) {
            totalFitness += fitness[i];
        }
        float r1 = hiprand_uniform(&state[idx]) * totalFitness;
        float r2 = hiprand_uniform(&state[idx]) * totalFitness;
        int parent1 = 0, parent2 = 0;
        float sumFitness = 0.0f;
        for (int i = 0; i < POPULATION_SIZE; ++i) {
            sumFitness += fitness[i];
            if (sumFitness >= r1 && parent1 == 0) parent1 = i;
            if (sumFitness >= r2 && parent2 == 0) parent2 = i;
        }

        // Perform crossover
        unsigned int parent1Chromosome = population[parent1];
        unsigned int parent2Chromosome = population[parent2];
        unsigned int crossoverPoint = hiprand(&state[idx]) % CHROMOSOME_LENGTH;
        unsigned int mask = (1 << crossoverPoint) - 1;
        unsigned int childChromosome = (parent1Chromosome & ~mask) | (parent2Chromosome & mask);

        // Perform mutation
        for (int i = 0; i < CHROMOSOME_LENGTH; ++i) {
            if (hiprand_uniform(&state[idx]) < 0.01f) { // Mutation rate of 1%
                childChromosome ^= (1 << i);
            }
        }

        population[idx] = childChromosome;
    }
}

int main() {
    unsigned int *d_population;
    float *d_fitness;
    hiprandState *d_state;

    // Allocate memory on the device
    hipError_t err = hipMalloc((void **)&d_population, POPULATION_SIZE * sizeof(unsigned int));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate population memory: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMalloc((void **)&d_fitness, POPULATION_SIZE * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate fitness memory: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMalloc((void **)&d_state, POPULATION_SIZE * sizeof(hiprandState));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate state memory: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Initialize the random number generator states
    unsigned int seed = 1234;
    int blockSize = 256;
    int numBlocks = (POPULATION_SIZE + blockSize - 1) / blockSize;
    initializePopulation<<<numBlocks, blockSize>>>(d_state, d_population);
    hipDeviceSynchronize();

    // Main genetic algorithm loop
    for (int generation = 0; generation < GENERATIONS; ++generation) {
        evaluateFitness<<<numBlocks, blockSize>>>(d_population, d_fitness);
        hipDeviceSynchronize();
        crossoverAndMutate<<<numBlocks, blockSize>>>(d_state, d_population, d_fitness);
        hipDeviceSynchronize();
    }

    // Copy the final population back to the host
    unsigned int *h_population = new unsigned int[POPULATION_SIZE];
    err = hipMemcpy(h_population, d_population, POPULATION_SIZE * sizeof(unsigned int), hipMemcpyDeviceToHost);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy population back to host: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Print the final population
    std::cout << "Final population:" << std::endl;
    for (int i = 0; i < POPULATION_SIZE; ++i) {
        std::cout << "Individual " << i << ": " << h_population[i] << std::endl;
    }

    // Free device memory
    hipFree(d_population);
    hipFree(d_fitness);
    hipFree(d_state);
    delete[] h_population;

    return 0;
}
	.text
	.file	"cuda_code_041604.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z35__device_stub__initializePopulationP12hiprandStatePj # -- Begin function _Z35__device_stub__initializePopulationP12hiprandStatePj
	.type	_Z35__device_stub__initializePopulationP12hiprandStatePj,@function
_Z35__device_stub__initializePopulationP12hiprandStatePj: # @_Z35__device_stub__initializePopulationP12hiprandStatePj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20initializePopulationP12hiprandStatePj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z35__device_stub__initializePopulationP12hiprandStatePj, .Lfunc_end0-_Z35__device_stub__initializePopulationP12hiprandStatePj
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__evaluateFitnessPjPf # -- Begin function _Z30__device_stub__evaluateFitnessPjPf
	.type	_Z30__device_stub__evaluateFitnessPjPf,@function
_Z30__device_stub__evaluateFitnessPjPf: # @_Z30__device_stub__evaluateFitnessPjPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15evaluateFitnessPjPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z30__device_stub__evaluateFitnessPjPf, .Lfunc_end1-_Z30__device_stub__evaluateFitnessPjPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__crossoverAndMutateP12hiprandStatePjPf # -- Begin function _Z33__device_stub__crossoverAndMutateP12hiprandStatePjPf
	.type	_Z33__device_stub__crossoverAndMutateP12hiprandStatePjPf,@function
_Z33__device_stub__crossoverAndMutateP12hiprandStatePjPf: # @_Z33__device_stub__crossoverAndMutateP12hiprandStatePjPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18crossoverAndMutateP12hiprandStatePjPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z33__device_stub__crossoverAndMutateP12hiprandStatePjPf, .Lfunc_end2-_Z33__device_stub__crossoverAndMutateP12hiprandStatePjPf
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsp, %rdi
	movl	$128, %esi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB3_7
# %bb.1:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$38, %edx
	jmp	.LBB3_2
.LBB3_7:
	leaq	16(%rsp), %rdi
	movl	$128, %esi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB3_9
# %bb.8:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	movl	$35, %edx
	jmp	.LBB3_2
.LBB3_9:
	leaq	8(%rsp), %rdi
	movl	$1536, %esi                     # imm = 0x600
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB3_11
# %bb.10:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	movl	$33, %edx
.LBB3_2:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
.LBB3_3:
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB3_4
# %bb.5:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB3_6
.LBB3_4:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB3_6:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB3_24:
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_11:
	.cfi_def_cfa_offset 64
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	leaq	255(%rbx), %r14
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_13
# %bb.12:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	callq	_Z35__device_stub__initializePopulationP12hiprandStatePj
.LBB3_13:
	callq	hipDeviceSynchronize
	movl	$1000, %ebp                     # imm = 0x3E8
.LBB3_14:                               # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_16
# %bb.15:                               #   in Loop: Header=BB3_14 Depth=1
	movq	(%rsp), %rdi
	movq	16(%rsp), %rsi
	callq	_Z30__device_stub__evaluateFitnessPjPf
.LBB3_16:                               #   in Loop: Header=BB3_14 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_18
# %bb.17:                               #   in Loop: Header=BB3_14 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z33__device_stub__crossoverAndMutateP12hiprandStatePjPf
.LBB3_18:                               #   in Loop: Header=BB3_14 Depth=1
	callq	hipDeviceSynchronize
	decl	%ebp
	jne	.LBB3_14
# %bb.19:
	movl	$128, %edi
	callq	_Znam
	movq	%rax, %rbx
	movq	(%rsp), %rsi
	movl	$128, %edx
	movq	%rax, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB3_21
# %bb.20:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$40, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	jmp	.LBB3_3
.LBB3_21:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	xorl	%r14d, %r14d
.LBB3_22:                               # =>This Inner Loop Header: Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.6, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%rbx,%r14,4), %esi
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r14
	cmpq	$32, %r14
	jne	.LBB3_22
# %bb.23:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	jmp	.LBB3_24
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20initializePopulationP12hiprandStatePj, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15evaluateFitnessPjPf, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18crossoverAndMutateP12hiprandStatePjPf, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z20initializePopulationP12hiprandStatePj,@object # @_Z20initializePopulationP12hiprandStatePj
	.section	.rodata,"a",@progbits
	.globl	_Z20initializePopulationP12hiprandStatePj
	.p2align	3, 0x0
_Z20initializePopulationP12hiprandStatePj:
	.quad	_Z35__device_stub__initializePopulationP12hiprandStatePj
	.size	_Z20initializePopulationP12hiprandStatePj, 8

	.type	_Z15evaluateFitnessPjPf,@object # @_Z15evaluateFitnessPjPf
	.globl	_Z15evaluateFitnessPjPf
	.p2align	3, 0x0
_Z15evaluateFitnessPjPf:
	.quad	_Z30__device_stub__evaluateFitnessPjPf
	.size	_Z15evaluateFitnessPjPf, 8

	.type	_Z18crossoverAndMutateP12hiprandStatePjPf,@object # @_Z18crossoverAndMutateP12hiprandStatePjPf
	.globl	_Z18crossoverAndMutateP12hiprandStatePjPf
	.p2align	3, 0x0
_Z18crossoverAndMutateP12hiprandStatePjPf:
	.quad	_Z33__device_stub__crossoverAndMutateP12hiprandStatePjPf
	.size	_Z18crossoverAndMutateP12hiprandStatePjPf, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to allocate population memory: "
	.size	.L.str, 39

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Failed to allocate fitness memory: "
	.size	.L.str.1, 36

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate state memory: "
	.size	.L.str.2, 34

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to copy population back to host: "
	.size	.L.str.3, 41

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Final population:"
	.size	.L.str.4, 18

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Individual "
	.size	.L.str.5, 12

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	": "
	.size	.L.str.6, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20initializePopulationP12hiprandStatePj"
	.size	.L__unnamed_1, 42

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15evaluateFitnessPjPf"
	.size	.L__unnamed_2, 24

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z18crossoverAndMutateP12hiprandStatePjPf"
	.size	.L__unnamed_3, 42

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__initializePopulationP12hiprandStatePj
	.addrsig_sym _Z30__device_stub__evaluateFitnessPjPf
	.addrsig_sym _Z33__device_stub__crossoverAndMutateP12hiprandStatePjPf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z20initializePopulationP12hiprandStatePj
	.addrsig_sym _Z15evaluateFitnessPjPf
	.addrsig_sym _Z18crossoverAndMutateP12hiprandStatePjPf
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20initializePopulationP12hiprandStatePj ; -- Begin function _Z20initializePopulationP12hiprandStatePj
	.globl	_Z20initializePopulationP12hiprandStatePj
	.p2align	8
	.type	_Z20initializePopulationP12hiprandStatePj,@function
_Z20initializePopulationP12hiprandStatePj: ; @_Z20initializePopulationP12hiprandStatePj
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 32, v7
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v8, 31, v7
	v_mov_b32_e32 v13, 0
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[9:10], null, v7, 48, s[0:1]
	s_mov_b32 s0, 0x587c5
	s_clause 0x2
	global_load_b32 v11, v[9:10], off offset:40
	global_load_b128 v[0:3], v[9:10], off offset:24
	global_load_b32 v12, v[9:10], off
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(1)
	v_lshrrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v13, 1, v13
	v_xor_b32_e32 v0, v4, v0
	v_mov_b32_e32 v6, v3
	v_mov_b32_e32 v3, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v5, 1, v0
	v_lshlrev_b32_e32 v4, 4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v5, v4
	v_mov_b32_e32 v5, v2
	v_xor3_b32 v11, v4, v0, v3
	v_mov_b32_e32 v4, v1
	v_dual_mov_b32 v0, v1 :: v_dual_mov_b32 v1, v2
	v_mov_b32_e32 v2, v6
	s_waitcnt vmcnt(0)
	v_add3_u32 v14, v12, s0, v11
	s_add_i32 s0, s0, 0x587c5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s0, 0x5e0415
	v_and_or_b32 v13, v14, 1, v13
	s_cbranch_scc0 .LBB0_2
; %bb.3:
	v_lshlrev_b64 v[0:1], 2, v[7:8]
	v_dual_mov_b32 v7, v3 :: v_dual_add_nc_u32 v2, 0x587c50, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_clause 0x2
	global_store_b32 v[9:10], v11, off offset:40
	global_store_b128 v[9:10], v[4:7], off offset:24
	global_store_b32 v[9:10], v2, off
	global_store_b32 v[0:1], v13, off
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20initializePopulationP12hiprandStatePj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20initializePopulationP12hiprandStatePj, .Lfunc_end0-_Z20initializePopulationP12hiprandStatePj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 312
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15evaluateFitnessPjPf ; -- Begin function _Z15evaluateFitnessPjPf
	.globl	_Z15evaluateFitnessPjPf
	.p2align	8
	.type	_Z15evaluateFitnessPjPf,@function
_Z15evaluateFitnessPjPf:                ; @_Z15evaluateFitnessPjPf
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 32, v1
	s_cbranch_execz .LBB1_4
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	s_mov_b32 s0, 0
	global_load_b32 v3, v[2:3], off
	v_mov_b32_e32 v2, 0
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_bfe_u32 v4, v3, s0, 1
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s0, 16
	v_cvt_f32_ubyte0_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v4
	s_cbranch_scc0 .LBB1_2
; %bb.3:
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15evaluateFitnessPjPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15evaluateFitnessPjPf, .Lfunc_end1-_Z15evaluateFitnessPjPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z18crossoverAndMutateP12hiprandStatePjPf ; -- Begin function _Z18crossoverAndMutateP12hiprandStatePjPf
	.globl	_Z18crossoverAndMutateP12hiprandStatePjPf
	.p2align	8
	.type	_Z18crossoverAndMutateP12hiprandStatePjPf,@function
_Z18crossoverAndMutateP12hiprandStatePjPf: ; @_Z18crossoverAndMutateP12hiprandStatePjPf
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 32, v10
	s_cbranch_execz .LBB2_8
; %bb.1:                                ; %.preheader.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	v_mov_b32_e32 v5, 0
	s_mov_b64 s[0:1], 0
.LBB2_2:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s8, s0
	s_addc_u32 s3, s9, s1
	s_add_u32 s0, s0, 4
	s_load_b32 s2, s[2:3], 0x0
	s_addc_u32 s1, s1, 0
	s_cmpk_eq_i32 s0, 0x80
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v5, s2, v5
	s_cbranch_scc0 .LBB2_2
; %bb.3:
	v_mad_i64_i32 v[12:13], null, v10, 48, s[4:5]
	v_ashrrev_i32_e32 v11, 31, v10
	s_mov_b32 s3, 0
	s_clause 0x2
	global_load_b128 v[6:9], v[12:13], off offset:24
	global_load_b32 v2, v[12:13], off offset:40
	global_load_b32 v16, v[12:13], off
	s_waitcnt vmcnt(2)
	v_lshrrev_b32_e32 v0, 2, v6
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v1, 4, v2
	v_lshrrev_b32_e32 v4, 2, v7
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v17, 0xb0f8a, v16
	v_xor_b32_e32 v0, v0, v6
	v_mov_b32_e32 v6, 0
	v_xor_b32_e32 v4, v4, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 1, v0
	v_xor_b32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor3_b32 v3, v1, v0, v2
	v_lshlrev_b32_e32 v0, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 4, v3
	v_xor_b32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor3_b32 v7, v0, v4, v3
	v_add3_u32 v0, v16, v3, 0x587c5
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v1, v7, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_cvt_f32_u32_e32 v0, v0
	global_store_b32 v[12:13], v7, off offset:40
	v_fmaak_f32 v14, 0x2f800000, v0, 0x2f800000
	v_mov_b32_e32 v0, v8
	v_cvt_f32_u32_e32 v1, v1
	v_dual_mul_f32 v15, v5, v14 :: v_dual_mov_b32 v14, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_fmaak_f32 v18, 0x2f800000, v1, 0x2f800000 :: v_dual_mov_b32 v1, v9
	s_clause 0x1
	global_store_b128 v[12:13], v[0:3], off offset:24
	global_store_b32 v[12:13], v17, off
	v_mul_f32_e32 v5, v5, v18
.LBB2_4:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s1, s[8:9], 0x0
	v_cmp_eq_u32_e32 vcc_lo, 0, v4
	v_cmp_eq_u32_e64 s0, 0, v14
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, s1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_ge_f32_e64 s1, v6, v15
	v_cmp_ge_f32_e64 s2, v6, v5
	s_and_b32 s1, s1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s0, s2, s0
	v_cndmask_b32_e64 v4, v4, s3, s1
	v_cndmask_b32_e64 v14, v14, s3, s0
	s_add_i32 s3, s3, 1
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s3, 32
	s_cbranch_scc0 .LBB2_4
; %bb.5:
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v15, 31, v14
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	v_lshlrev_b64 v[4:5], 2, v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[0:1], off
	global_load_b32 v4, v[4:5], off
	v_lshrrev_b32_e32 v1, 2, v8
	v_lshlrev_b32_e32 v5, 4, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v1, v8
	v_add_nc_u32_e32 v8, 0x161f14, v16
	v_lshlrev_b32_e32 v6, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v6, v5
	v_xor3_b32 v1, v5, v1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v5, v16, v1, -1
	v_and_b32_e32 v5, 15, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e64 v5, v5, -1
	s_waitcnt vmcnt(0)
	v_bfi_b32 v0, v5, v0, v4
.LBB2_6:                                ; =>This Inner Loop Header: Depth=1
	v_lshrrev_b32_e32 v4, 2, v9
	v_dual_mov_b32 v6, v7 :: v_dual_mov_b32 v7, v1
	s_lshl_b32 s1, 1, s0
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v4, v9
	s_cmp_eq_u32 s0, 16
	v_dual_mov_b32 v9, v2 :: v_dual_lshlrev_b32 v4, 4, v7
	v_lshlrev_b32_e32 v5, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v5, v4
	v_mov_b32_e32 v5, v3
	v_xor3_b32 v1, v4, v1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v8, v1
	v_add_nc_u32_e32 v8, 0x587c5, v8
	v_cvt_f32_u32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmaak_f32 v3, 0x2f800000, v4, 0x2f800000 :: v_dual_mov_b32 v4, v2
	v_mov_b32_e32 v2, v5
	v_cmp_gt_f32_e32 vcc_lo, 0x3c23d70a, v3
	v_mov_b32_e32 v3, v6
	v_cndmask_b32_e64 v14, 0, s1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_xor_b32_e32 v0, v14, v0
	s_cbranch_scc0 .LBB2_6
; %bb.7:
	v_lshlrev_b64 v[2:3], 2, v[10:11]
	v_add_nc_u32_e32 v8, 0x69139f, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_clause 0x2
	global_store_b32 v[12:13], v1, off offset:40
	global_store_b128 v[12:13], v[4:7], off offset:24
	global_store_b32 v[12:13], v8, off
	global_store_b32 v[2:3], v0, off
.LBB2_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18crossoverAndMutateP12hiprandStatePjPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z18crossoverAndMutateP12hiprandStatePjPf, .Lfunc_end2-_Z18crossoverAndMutateP12hiprandStatePjPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 836
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20initializePopulationP12hiprandStatePj
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20initializePopulationP12hiprandStatePj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
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    .language_version:
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    .max_flat_workgroup_size: 1024
    .name:           _Z15evaluateFitnessPjPf
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
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  - 2
...

	.end_amdgpu_metadata
