#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>

#define POPULATION_SIZE 64
#define GENES_PER_INDIVIDUAL 32
#define NUM_GENERATIONS 100

// Kernel to initialize random population
__global__ void initializePopulation(curandState *states, int *population) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        curand_init((unsigned long long)clock() + idx, 0, 0, &states[idx]);
        for (int i = 0; i < GENES_PER_INDIVIDUAL; ++i) {
            population[idx * GENES_PER_INDIVIDUAL + i] = curand(&states[idx]) % 2;
        }
    }
}

// Kernel to evaluate fitness of individuals
__global__ void evaluateFitness(int *population, int *fitness) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        int fit = 0;
        for (int i = 0; i < GENES_PER_INDIVIDUAL; ++i) {
            fit += population[idx * GENES_PER_INDIVIDUAL + i];
        }
        fitness[idx] = fit;
    }
}

// Kernel to perform selection and crossover
__global__ void selectionAndCrossover(int *population, int *fitness, curandState *states, int *newPopulation) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        curandState localState = states[idx];
        int parent1 = curand(&localState) % POPULATION_SIZE;
        int parent2 = curand(&localState) % POPULATION_SIZE;
        int crossoverPoint = curand(&localState) % GENES_PER_INDIVIDUAL;

        for (int i = 0; i < GENES_PER_INDIVIDUAL; ++i) {
            if (i < crossoverPoint) {
                newPopulation[idx * GENES_PER_INDIVIDUAL + i] = population[parent1 * GENES_PER_INDIVIDUAL + i];
            } else {
                newPopulation[idx * GENES_PER_INDIVIDUAL + i] = population[parent2 * GENES_PER_INDIVIDUAL + i];
            }
        }
        states[idx] = localState;
    }
}

// Kernel to perform mutation
__global__ void mutate(int *population, curandState *states, float mutationRate) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        curandState localState = states[idx];
        for (int i = 0; i < GENES_PER_INDIVIDUAL; ++i) {
            if (curand_uniform(&localState) < mutationRate) {
                population[idx * GENES_PER_INDIVIDUAL + i] = 1 - population[idx * GENES_PER_INDIVIDUAL + i];
            }
        }
        states[idx] = localState;
    }
}

// Kernel to find the best fitness
__global__ void findBestFitness(int *fitness, int *bestFitness) {
    extern __shared__ int sharedFitness[];
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    sharedFitness[threadIdx.x] = fitness[idx];
    __syncthreads();

    for (int s = blockDim.x / 2; s > 0; s >>= 1) {
        if (threadIdx.x < s) {
            sharedFitness[threadIdx.x] = max(sharedFitness[threadIdx.x], sharedFitness[threadIdx.x + s]);
        }
        __syncthreads();
    }

    if (threadIdx.x == 0) {
        atomicMax(bestFitness, sharedFitness[0]);
    }
}

int main() {
    int *d_population, *d_newPopulation, *d_fitness, *d_bestFitness;
    curandState *d_states;
    int *h_population = new int[POPULATION_SIZE * GENES_PER_INDIVIDUAL];
    int *h_fitness = new int[POPULATION_SIZE];
    int h_bestFitness = 0;

    cudaError_t err;

    // Allocate memory on device
    err = cudaMalloc((void**)&d_population, POPULATION_SIZE * GENES_PER_INDIVIDUAL * sizeof(int));
    if (err != cudaSuccess) { std::cerr << "Error allocating memory for population"; return -1; }
    err = cudaMalloc((void**)&d_newPopulation, POPULATION_SIZE * GENES_PER_INDIVIDUAL * sizeof(int));
    if (err != cudaSuccess) { std::cerr << "Error allocating memory for new population"; return -1; }
    err = cudaMalloc((void**)&d_fitness, POPULATION_SIZE * sizeof(int));
    if (err != cudaSuccess) { std::cerr << "Error allocating memory for fitness"; return -1; }
    err = cudaMalloc((void**)&d_bestFitness, sizeof(int));
    if (err != cudaSuccess) { std::cerr << "Error allocating memory for best fitness"; return -1; }
    err = cudaMalloc((void**)&d_states, POPULATION_SIZE * sizeof(curandState));
    if (err != cudaSuccess) { std::cerr << "Error allocating memory for states"; return -1; }

    // Initialize population
    int blockSize = 32;
    int numBlocks = (POPULATION_SIZE + blockSize - 1) / blockSize;
    initializePopulation<<<numBlocks, blockSize>>>(d_states, d_population);
    err = cudaGetLastError();
    if (err != cudaSuccess) { std::cerr << "Error in initializePopulation"; return -1; }

    // Genetic Algorithm loop
    for (int generation = 0; generation < NUM_GENERATIONS; ++generation) {
        // Evaluate fitness
        evaluateFitness<<<numBlocks, blockSize>>>(d_population, d_fitness);
        err = cudaGetLastError();
        if (err != cudaSuccess) { std::cerr << "Error in evaluateFitness"; return -1; }

        // Find best fitness
        cudaMemset(d_bestFitness, 0, sizeof(int));
        findBestFitness<<<numBlocks, blockSize, blockSize * sizeof(int)>>>(d_fitness, d_bestFitness);
        err = cudaGetLastError();
        if (err != cudaSuccess) { std::cerr << "Error in findBestFitness"; return -1; }
        cudaMemcpy(&h_bestFitness, d_bestFitness, sizeof(int), cudaMemcpyDeviceToHost);
        std::cout << "Generation " << generation << ": Best Fitness = " << h_bestFitness << std::endl;

        // Selection and crossover
        selectionAndCrossover<<<numBlocks, blockSize>>>(d_population, d_fitness, d_states, d_newPopulation);
        err = cudaGetLastError();
        if (err != cudaSuccess) { std::cerr << "Error in selectionAndCrossover"; return -1; }

        // Mutation
        mutate<<<numBlocks, blockSize>>>(d_newPopulation, d_states, 0.01f);
        err = cudaGetLastError();
        if (err != cudaSuccess) { std::cerr << "Error in mutate"; return -1; }

        // Swap populations
        int *temp = d_population;
        d_population = d_newPopulation;
        d_newPopulation = temp;
    }

    // Copy final population back to host
    cudaMemcpy(h_population, d_population, POPULATION_SIZE * GENES_PER_INDIVIDUAL * sizeof(int), cudaMemcpyDeviceToHost);
    cudaMemcpy(h_fitness, d_fitness, POPULATION_SIZE * sizeof(int), cudaMemcpyDeviceToHost);

    // Print best individual
    int bestIdx = 0;
    for (int i = 1; i < POPULATION_SIZE; ++i) {
        if (h_fitness[i] > h_fitness[bestIdx]) {
            bestIdx = i;
        }
    }
    std::cout << "Best individual: ";
    for (int i = 0; i < GENES_PER_INDIVIDUAL; ++i) {
        std::cout << h_population[bestIdx * GENES_PER_INDIVIDUAL + i];
    }
    std::cout << " with fitness " << h_fitness[bestIdx] << std::endl;

    // Free device memory
    cudaFree(d_population);
    cudaFree(d_newPopulation);
    cudaFree(d_fitness);
    cudaFree(d_bestFitness);
    cudaFree(d_states);

    // Free host memory
    delete[] h_population;
    delete[] h_fitness;

    return 0;
}
	.file	"tmpxft_000519d4_00000000-6_cuda_code_025227.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3852:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3852:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPiP17curandStateXORWOWPi
	.type	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPiP17curandStateXORWOWPi, @function
_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPiP17curandStateXORWOWPi:
.LFB3874:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20initializePopulationP17curandStateXORWOWPi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3874:
	.size	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPiP17curandStateXORWOWPi, .-_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPiP17curandStateXORWOWPi
	.globl	_Z20initializePopulationP17curandStateXORWOWPi
	.type	_Z20initializePopulationP17curandStateXORWOWPi, @function
_Z20initializePopulationP17curandStateXORWOWPi:
.LFB3875:
	.cfi_startproc
	endbr64
	jmp	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPiP17curandStateXORWOWPi
	.cfi_endproc
.LFE3875:
	.size	_Z20initializePopulationP17curandStateXORWOWPi, .-_Z20initializePopulationP17curandStateXORWOWPi
	.globl	_Z37__device_stub__Z15evaluateFitnessPiS_PiS_
	.type	_Z37__device_stub__Z15evaluateFitnessPiS_PiS_, @function
_Z37__device_stub__Z15evaluateFitnessPiS_PiS_:
.LFB3876:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z15evaluateFitnessPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3876:
	.size	_Z37__device_stub__Z15evaluateFitnessPiS_PiS_, .-_Z37__device_stub__Z15evaluateFitnessPiS_PiS_
	.globl	_Z15evaluateFitnessPiS_
	.type	_Z15evaluateFitnessPiS_, @function
_Z15evaluateFitnessPiS_:
.LFB3877:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z15evaluateFitnessPiS_PiS_
	.cfi_endproc
.LFE3877:
	.size	_Z15evaluateFitnessPiS_, .-_Z15evaluateFitnessPiS_
	.globl	_Z65__device_stub__Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_PiS_P17curandStateXORWOWS_
	.type	_Z65__device_stub__Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_PiS_P17curandStateXORWOWS_, @function
_Z65__device_stub__Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_PiS_P17curandStateXORWOWS_:
.LFB3878:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L13:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3878:
	.size	_Z65__device_stub__Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_PiS_P17curandStateXORWOWS_, .-_Z65__device_stub__Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_PiS_P17curandStateXORWOWS_
	.globl	_Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_
	.type	_Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_, @function
_Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_:
.LFB3879:
	.cfi_startproc
	endbr64
	jmp	_Z65__device_stub__Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_PiS_P17curandStateXORWOWS_
	.cfi_endproc
.LFE3879:
	.size	_Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_, .-_Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_
	.globl	_Z46__device_stub__Z6mutatePiP17curandStateXORWOWfPiP17curandStateXORWOWf
	.type	_Z46__device_stub__Z6mutatePiP17curandStateXORWOWfPiP17curandStateXORWOWf, @function
_Z46__device_stub__Z6mutatePiP17curandStateXORWOWfPiP17curandStateXORWOWf:
.LFB3880:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	32(%rsp), %rdx
	movq	%rsi, 16(%rsp)
	leaq	48(%rsp), %rdi
	leaq	60(%rsp), %rsi
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6mutatePiP17curandStateXORWOWf(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L18:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3880:
	.size	_Z46__device_stub__Z6mutatePiP17curandStateXORWOWfPiP17curandStateXORWOWf, .-_Z46__device_stub__Z6mutatePiP17curandStateXORWOWfPiP17curandStateXORWOWf
	.globl	_Z6mutatePiP17curandStateXORWOWf
	.type	_Z6mutatePiP17curandStateXORWOWf, @function
_Z6mutatePiP17curandStateXORWOWf:
.LFB3881:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z6mutatePiP17curandStateXORWOWfPiP17curandStateXORWOWf
	.cfi_endproc
.LFE3881:
	.size	_Z6mutatePiP17curandStateXORWOWf, .-_Z6mutatePiP17curandStateXORWOWf
	.globl	_Z37__device_stub__Z15findBestFitnessPiS_PiS_
	.type	_Z37__device_stub__Z15findBestFitnessPiS_PiS_, @function
_Z37__device_stub__Z15findBestFitnessPiS_PiS_:
.LFB3882:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z15findBestFitnessPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L23:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3882:
	.size	_Z37__device_stub__Z15findBestFitnessPiS_PiS_, .-_Z37__device_stub__Z15findBestFitnessPiS_PiS_
	.globl	_Z15findBestFitnessPiS_
	.type	_Z15findBestFitnessPiS_, @function
_Z15findBestFitnessPiS_:
.LFB3883:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z15findBestFitnessPiS_PiS_
	.cfi_endproc
.LFE3883:
	.size	_Z15findBestFitnessPiS_, .-_Z15findBestFitnessPiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error allocating memory for population"
.LC1:
	.string	"Error allocating memory for new population"
.LC2:
	.string	"Error allocating memory for fitness"
.LC3:
	.string	"Error allocating memory for best fitness"
.LC4:
	.string	"Error allocating memory for states"
.LC5:
	.string	"Error in initializePopulation"
.LC6:
	.string	"Error in evaluateFitness"
.LC7:
	.string	"Error in findBestFitness"
.LC8:
	.string	"Generation "
.LC9:
	.string	": Best Fitness = "
.LC10:
	.string	"Error in selectionAndCrossover"
.LC12:
	.string	"Error in mutate"
.LC13:
	.string	"Best individual: "
.LC14:
	.string	" with fitness "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3849:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$8192, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$256, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$8192, %esi
	leaq	8(%rsp), %rdi
	movq	%rax, %rbp
	xorl	%eax, %eax
	movl	%eax, 4(%rsp)
	call	cudaMalloc@PLT
	leaq	.LC0(%rip), %rsi
	testl	%eax, %eax
	jne	.L56
	leaq	16(%rsp), %rdi
	movl	$8192, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L31
	leaq	.LC1(%rip), %rsi
.L56:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	orl	$-1, %eax
	jmp	.L28
.L31:
	movl	$256, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC2(%rip), %rsi
	testl	%eax, %eax
	jne	.L56
	movl	$4, %esi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC3(%rip), %rsi
	testl	%eax, %eax
	jne	.L56
	movl	$3072, %esi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC4(%rip), %rsi
	testl	%eax, %eax
	jne	.L56
	movl	$134217729, %edx
	movl	$2147483649, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	movq	8(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z60__device_stub__Z20initializePopulationP17curandStateXORWOWPiP17curandStateXORWOWPi
.L36:
	call	cudaGetLastError@PLT
	movl	$134217729, %ebx
	xorl	%r14d, %r14d
	leaq	.LC5(%rip), %rsi
	salq	$5, %rbx
	testl	%eax, %eax
	jne	.L56
.L37:
	movl	$2147483649, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z37__device_stub__Z15evaluateFitnessPiS_PiS_
.L38:
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L39
	leaq	.LC6(%rip), %rsi
	jmp	.L56
.L39:
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	call	cudaMemset@PLT
	movl	$2147483649, %edi
	xorl	%r9d, %r9d
	movq	%rbx, %rdx
	addq	%rdi, %rdi
	movl	$128, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z37__device_stub__Z15findBestFitnessPiS_PiS_
.L40:
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L41
	leaq	.LC7(%rip), %rsi
	jmp	.L56
.L41:
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	leaq	4(%rsp), %rdi
	leaq	_ZSt4cout(%rip), %r13
	call	cudaMemcpy@PLT
	leaq	.LC8(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	4(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$2147483649, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	addq	%rdi, %rdi
	movq	%rbx, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	movq	16(%rsp), %rcx
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z65__device_stub__Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_PiS_P17curandStateXORWOWS_
.L42:
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L43
	leaq	.LC10(%rip), %rsi
	jmp	.L56
.L43:
	movl	$2147483649, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	movss	.LC11(%rip), %xmm0
	movq	40(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z46__device_stub__Z6mutatePiP17curandStateXORWOWfPiP17curandStateXORWOWf
.L44:
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L45
	leaq	.LC12(%rip), %rsi
	jmp	.L56
.L45:
	movq	8(%rsp), %rax
	movq	16(%rsp), %rsi
	incl	%r14d
	movq	%rsi, 8(%rsp)
	movq	%rax, 16(%rsp)
	cmpl	$100, %r14d
	jne	.L37
	movl	$2, %ecx
	movl	$8192, %edx
	movq	%r12, %rdi
	xorl	%r14d, %r14d
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$256, %edx
	call	cudaMemcpy@PLT
	movl	$1, %eax
.L47:
	movslq	%r14d, %rdx
	movl	0(%rbp,%rdx,4), %ecx
	cmpl	%ecx, 0(%rbp,%rax,4)
	cmovg	%eax, %r14d
	incq	%rax
	cmpq	$64, %rax
	jne	.L47
	movslq	%r14d, %r14
	leaq	.LC13(%rip), %rsi
	movq	%r13, %rdi
	xorl	%ebx, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r14, %r15
	salq	$7, %r15
	addq	%r12, %r15
.L48:
	movl	(%r15,%rbx,4), %esi
	movq	%r13, %rdi
	incq	%rbx
	call	_ZNSolsEi@PLT
	cmpq	$32, %rbx
	jne	.L48
	leaq	.LC14(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	0(%rbp,%r14,4), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	xorl	%eax, %eax
.L28:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3849:
	.size	main, .-main
	.section	.rodata.str1.1
.LC15:
	.string	"_Z15findBestFitnessPiS_"
.LC16:
	.string	"_Z6mutatePiP17curandStateXORWOWf"
.LC17:
	.string	"_Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_"
.LC18:
	.string	"_Z15evaluateFitnessPiS_"
.LC19:
	.string	"_Z20initializePopulationP17curandStateXORWOWPi"
.LC20:
	.string	"precalc_xorwow_matrix"
.LC21:
	.string	"precalc_xorwow_offset_matrix"
.LC22:
	.string	"mrg32k3aM1"
.LC23:
	.string	"mrg32k3aM2"
.LC24:
	.string	"mrg32k3aM1SubSeq"
.LC25:
	.string	"mrg32k3aM2SubSeq"
.LC26:
	.string	"mrg32k3aM1Seq"
.LC27:
	.string	"mrg32k3aM2Seq"
.LC28:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3885:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15findBestFitnessPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z6mutatePiP17curandStateXORWOWf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21selectionAndCrossoverPiS_P17curandStateXORWOWS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15evaluateFitnessPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20initializePopulationP17curandStateXORWOWPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC22(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC23(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC24(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC25(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC26(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC27(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC28(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3885:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC11:
	.long	1008981770
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>

#define POPULATION_SIZE 64
#define GENES_PER_INDIVIDUAL 32
#define NUM_GENERATIONS 100

// Kernel to initialize random population
__global__ void initializePopulation(hiprandState *states, int *population) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        hiprand_init((unsigned long long)clock() + idx, 0, 0, &states[idx]);
        for (int i = 0; i < GENES_PER_INDIVIDUAL; ++i) {
            population[idx * GENES_PER_INDIVIDUAL + i] = hiprand(&states[idx]) % 2;
        }
    }
}

// Kernel to evaluate fitness of individuals
__global__ void evaluateFitness(int *population, int *fitness) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        int fit = 0;
        for (int i = 0; i < GENES_PER_INDIVIDUAL; ++i) {
            fit += population[idx * GENES_PER_INDIVIDUAL + i];
        }
        fitness[idx] = fit;
    }
}

// Kernel to perform selection and crossover
__global__ void selectionAndCrossover(int *population, int *fitness, hiprandState *states, int *newPopulation) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        hiprandState localState = states[idx];
        int parent1 = hiprand(&localState) % POPULATION_SIZE;
        int parent2 = hiprand(&localState) % POPULATION_SIZE;
        int crossoverPoint = hiprand(&localState) % GENES_PER_INDIVIDUAL;

        for (int i = 0; i < GENES_PER_INDIVIDUAL; ++i) {
            if (i < crossoverPoint) {
                newPopulation[idx * GENES_PER_INDIVIDUAL + i] = population[parent1 * GENES_PER_INDIVIDUAL + i];
            } else {
                newPopulation[idx * GENES_PER_INDIVIDUAL + i] = population[parent2 * GENES_PER_INDIVIDUAL + i];
            }
        }
        states[idx] = localState;
    }
}

// Kernel to perform mutation
__global__ void mutate(int *population, hiprandState *states, float mutationRate) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < POPULATION_SIZE) {
        hiprandState localState = states[idx];
        for (int i = 0; i < GENES_PER_INDIVIDUAL; ++i) {
            if (hiprand_uniform(&localState) < mutationRate) {
                population[idx * GENES_PER_INDIVIDUAL + i] = 1 - population[idx * GENES_PER_INDIVIDUAL + i];
            }
        }
        states[idx] = localState;
    }
}

// Kernel to find the best fitness
__global__ void findBestFitness(int *fitness, int *bestFitness) {
    extern __shared__ int sharedFitness[];
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    sharedFitness[threadIdx.x] = fitness[idx];
    __syncthreads();

    for (int s = blockDim.x / 2; s > 0; s >>= 1) {
        if (threadIdx.x < s) {
            sharedFitness[threadIdx.x] = max(sharedFitness[threadIdx.x], sharedFitness[threadIdx.x + s]);
        }
        __syncthreads();
    }

    if (threadIdx.x == 0) {
        atomicMax(bestFitness, sharedFitness[0]);
    }
}

int main() {
    int *d_population, *d_newPopulation, *d_fitness, *d_bestFitness;
    hiprandState *d_states;
    int *h_population = new int[POPULATION_SIZE * GENES_PER_INDIVIDUAL];
    int *h_fitness = new int[POPULATION_SIZE];
    int h_bestFitness = 0;

    hipError_t err;

    // Allocate memory on device
    err = hipMalloc((void**)&d_population, POPULATION_SIZE * GENES_PER_INDIVIDUAL * sizeof(int));
    if (err != hipSuccess) { std::cerr << "Error allocating memory for population"; return -1; }
    err = hipMalloc((void**)&d_newPopulation, POPULATION_SIZE * GENES_PER_INDIVIDUAL * sizeof(int));
    if (err != hipSuccess) { std::cerr << "Error allocating memory for new population"; return -1; }
    err = hipMalloc((void**)&d_fitness, POPULATION_SIZE * sizeof(int));
    if (err != hipSuccess) { std::cerr << "Error allocating memory for fitness"; return -1; }
    err = hipMalloc((void**)&d_bestFitness, sizeof(int));
    if (err != hipSuccess) { std::cerr << "Error allocating memory for best fitness"; return -1; }
    err = hipMalloc((void**)&d_states, POPULATION_SIZE * sizeof(hiprandState));
    if (err != hipSuccess) { std::cerr << "Error allocating memory for states"; return -1; }

    // Initialize population
    int blockSize = 32;
    int numBlocks = (POPULATION_SIZE + blockSize - 1) / blockSize;
    initializePopulation<<<numBlocks, blockSize>>>(d_states, d_population);
    err = hipGetLastError();
    if (err != hipSuccess) { std::cerr << "Error in initializePopulation"; return -1; }

    // Genetic Algorithm loop
    for (int generation = 0; generation < NUM_GENERATIONS; ++generation) {
        // Evaluate fitness
        evaluateFitness<<<numBlocks, blockSize>>>(d_population, d_fitness);
        err = hipGetLastError();
        if (err != hipSuccess) { std::cerr << "Error in evaluateFitness"; return -1; }

        // Find best fitness
        hipMemset(d_bestFitness, 0, sizeof(int));
        findBestFitness<<<numBlocks, blockSize, blockSize * sizeof(int)>>>(d_fitness, d_bestFitness);
        err = hipGetLastError();
        if (err != hipSuccess) { std::cerr << "Error in findBestFitness"; return -1; }
        hipMemcpy(&h_bestFitness, d_bestFitness, sizeof(int), hipMemcpyDeviceToHost);
        std::cout << "Generation " << generation << ": Best Fitness = " << h_bestFitness << std::endl;

        // Selection and crossover
        selectionAndCrossover<<<numBlocks, blockSize>>>(d_population, d_fitness, d_states, d_newPopulation);
        err = hipGetLastError();
        if (err != hipSuccess) { std::cerr << "Error in selectionAndCrossover"; return -1; }

        // Mutation
        mutate<<<numBlocks, blockSize>>>(d_newPopulation, d_states, 0.01f);
        err = hipGetLastError();
        if (err != hipSuccess) { std::cerr << "Error in mutate"; return -1; }

        // Swap populations
        int *temp = d_population;
        d_population = d_newPopulation;
        d_newPopulation = temp;
    }

    // Copy final population back to host
    hipMemcpy(h_population, d_population, POPULATION_SIZE * GENES_PER_INDIVIDUAL * sizeof(int), hipMemcpyDeviceToHost);
    hipMemcpy(h_fitness, d_fitness, POPULATION_SIZE * sizeof(int), hipMemcpyDeviceToHost);

    // Print best individual
    int bestIdx = 0;
    for (int i = 1; i < POPULATION_SIZE; ++i) {
        if (h_fitness[i] > h_fitness[bestIdx]) {
            bestIdx = i;
        }
    }
    std::cout << "Best individual: ";
    for (int i = 0; i < GENES_PER_INDIVIDUAL; ++i) {
        std::cout << h_population[bestIdx * GENES_PER_INDIVIDUAL + i];
    }
    std::cout << " with fitness " << h_fitness[bestIdx] << std::endl;

    // Free device memory
    hipFree(d_population);
    hipFree(d_newPopulation);
    hipFree(d_fitness);
    hipFree(d_bestFitness);
    hipFree(d_states);

    // Free host memory
    delete[] h_population;
    delete[] h_fitness;

    return 0;
}
	.text
	.file	"cuda_code_025227.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z35__device_stub__initializePopulationP12hiprandStatePi # -- Begin function _Z35__device_stub__initializePopulationP12hiprandStatePi
	.type	_Z35__device_stub__initializePopulationP12hiprandStatePi,@function
_Z35__device_stub__initializePopulationP12hiprandStatePi: # @_Z35__device_stub__initializePopulationP12hiprandStatePi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20initializePopulationP12hiprandStatePi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z35__device_stub__initializePopulationP12hiprandStatePi, .Lfunc_end0-_Z35__device_stub__initializePopulationP12hiprandStatePi
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__evaluateFitnessPiS_ # -- Begin function _Z30__device_stub__evaluateFitnessPiS_
	.type	_Z30__device_stub__evaluateFitnessPiS_,@function
_Z30__device_stub__evaluateFitnessPiS_: # @_Z30__device_stub__evaluateFitnessPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15evaluateFitnessPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z30__device_stub__evaluateFitnessPiS_, .Lfunc_end1-_Z30__device_stub__evaluateFitnessPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z36__device_stub__selectionAndCrossoverPiS_P12hiprandStateS_ # -- Begin function _Z36__device_stub__selectionAndCrossoverPiS_P12hiprandStateS_
	.type	_Z36__device_stub__selectionAndCrossoverPiS_P12hiprandStateS_,@function
_Z36__device_stub__selectionAndCrossoverPiS_P12hiprandStateS_: # @_Z36__device_stub__selectionAndCrossoverPiS_P12hiprandStateS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21selectionAndCrossoverPiS_P12hiprandStateS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z36__device_stub__selectionAndCrossoverPiS_P12hiprandStateS_, .Lfunc_end2-_Z36__device_stub__selectionAndCrossoverPiS_P12hiprandStateS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__mutatePiP12hiprandStatef # -- Begin function _Z21__device_stub__mutatePiP12hiprandStatef
	.type	_Z21__device_stub__mutatePiP12hiprandStatef,@function
_Z21__device_stub__mutatePiP12hiprandStatef: # @_Z21__device_stub__mutatePiP12hiprandStatef
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6mutatePiP12hiprandStatef, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z21__device_stub__mutatePiP12hiprandStatef, .Lfunc_end3-_Z21__device_stub__mutatePiP12hiprandStatef
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__findBestFitnessPiS_ # -- Begin function _Z30__device_stub__findBestFitnessPiS_
	.type	_Z30__device_stub__findBestFitnessPiS_,@function
_Z30__device_stub__findBestFitnessPiS_: # @_Z30__device_stub__findBestFitnessPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15findBestFitnessPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z30__device_stub__findBestFitnessPiS_, .Lfunc_end4-_Z30__device_stub__findBestFitnessPiS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI5_0:
	.long	0x3c23d70a                      # float 0.00999999977
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$8192, %edi                     # imm = 0x2000
	callq	_Znam
	movq	%rax, %rbx
	movl	$256, %edi                      # imm = 0x100
	callq	_Znam
	movq	%rax, %r14
	movl	$0, 36(%rsp)
	leaq	8(%rsp), %rdi
	movl	$8192, %esi                     # imm = 0x2000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB5_2
# %bb.1:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$38, %edx
	jmp	.LBB5_19
.LBB5_2:
	leaq	24(%rsp), %rdi
	movl	$8192, %esi                     # imm = 0x2000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB5_4
# %bb.3:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	movl	$42, %edx
	jmp	.LBB5_19
.LBB5_4:
	leaq	16(%rsp), %rdi
	movl	$256, %esi                      # imm = 0x100
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB5_6
# %bb.5:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	movl	$35, %edx
	jmp	.LBB5_19
.LBB5_6:
	leaq	48(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB5_8
# %bb.7:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$40, %edx
	jmp	.LBB5_19
.LBB5_8:
	leaq	40(%rsp), %rdi
	movl	$3072, %esi                     # imm = 0xC00
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB5_10
# %bb.9:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.4, %esi
	movl	$34, %edx
	jmp	.LBB5_19
.LBB5_10:
	movabsq	$4294967298, %r15               # imm = 0x100000002
	leaq	30(%r15), %r12
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_12
# %bb.11:
	movq	40(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z35__device_stub__initializePopulationP12hiprandStatePi
.LBB5_12:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB5_13
# %bb.41:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	movl	$29, %edx
	jmp	.LBB5_19
.LBB5_13:                               # %.preheader.preheader
	xorl	%r13d, %r13d
.LBB5_14:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_16
# %bb.15:                               #   in Loop: Header=BB5_14 Depth=1
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	callq	_Z30__device_stub__evaluateFitnessPiS_
.LBB5_16:                               #   in Loop: Header=BB5_14 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB5_17
# %bb.20:                               #   in Loop: Header=BB5_14 Depth=1
	movq	48(%rsp), %rdi
	movl	$4, %edx
	xorl	%esi, %esi
	callq	hipMemset
	movl	$128, %r8d
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_22
# %bb.21:                               #   in Loop: Header=BB5_14 Depth=1
	movq	16(%rsp), %rdi
	movq	48(%rsp), %rsi
	callq	_Z30__device_stub__findBestFitnessPiS_
.LBB5_22:                               #   in Loop: Header=BB5_14 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB5_23
# %bb.24:                               #   in Loop: Header=BB5_14 Depth=1
	movq	48(%rsp), %rsi
	movl	$4, %edx
	leaq	36(%rsp), %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r13d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbp
	movl	$.L.str.9, %esi
	movl	$17, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	36(%rsp), %esi
	movq	%rbp, %rdi
	callq	_ZNSolsEi
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_26
# %bb.25:                               #   in Loop: Header=BB5_14 Depth=1
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rcx
	callq	_Z36__device_stub__selectionAndCrossoverPiS_P12hiprandStateS_
.LBB5_26:                               #   in Loop: Header=BB5_14 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB5_27
# %bb.28:                               #   in Loop: Header=BB5_14 Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_30
# %bb.29:                               #   in Loop: Header=BB5_14 Depth=1
	movq	24(%rsp), %rdi
	movq	40(%rsp), %rsi
	movss	.LCPI5_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z21__device_stub__mutatePiP12hiprandStatef
.LBB5_30:                               #   in Loop: Header=BB5_14 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB5_31
# %bb.32:                               #   in Loop: Header=BB5_14 Depth=1
	movq	8(%rsp), %rax
	movq	24(%rsp), %rsi
	movq	%rsi, 8(%rsp)
	movq	%rax, 24(%rsp)
	incl	%r13d
	cmpl	$100, %r13d
	jne	.LBB5_14
# %bb.33:
	movl	$8192, %edx                     # imm = 0x2000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%ecx, %ecx
	movl	$1, %eax
.LBB5_34:                               # =>This Inner Loop Header: Depth=1
	movl	(%r14,%rax,4), %edx
	movslq	%ecx, %rsi
	movl	%eax, %ebp
	cmpl	(%r14,%rsi,4), %edx
	jg	.LBB5_36
# %bb.35:                               #   in Loop: Header=BB5_34 Depth=1
	movl	%ecx, %ebp
.LBB5_36:                               #   in Loop: Header=BB5_34 Depth=1
	incq	%rax
	movl	%ebp, %ecx
	cmpq	$64, %rax
	jne	.LBB5_34
# %bb.37:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.12, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %eax
	shll	$5, %eax
	cltq
	leaq	(%rbx,%rax,4), %r15
	xorl	%r12d, %r12d
.LBB5_38:                               # =>This Inner Loop Header: Depth=1
	movl	(%r15,%r12,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	incq	%r12
	cmpq	$32, %r12
	jne	.LBB5_38
# %bb.39:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movslq	%ebp, %rax
	movl	(%r14,%rax,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	jmp	.LBB5_40
.LBB5_17:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.6, %esi
	jmp	.LBB5_18
.LBB5_23:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.7, %esi
.LBB5_18:                               # %.thread
	movl	$24, %edx
	jmp	.LBB5_19
.LBB5_27:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.10, %esi
	movl	$30, %edx
	jmp	.LBB5_19
.LBB5_31:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.11, %esi
	movl	$15, %edx
.LBB5_19:                               # %.thread
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$-1, %eax
.LBB5_40:                               # %.thread
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20initializePopulationP12hiprandStatePi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15evaluateFitnessPiS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21selectionAndCrossoverPiS_P12hiprandStateS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6mutatePiP12hiprandStatef, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15findBestFitnessPiS_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z20initializePopulationP12hiprandStatePi,@object # @_Z20initializePopulationP12hiprandStatePi
	.section	.rodata,"a",@progbits
	.globl	_Z20initializePopulationP12hiprandStatePi
	.p2align	3, 0x0
_Z20initializePopulationP12hiprandStatePi:
	.quad	_Z35__device_stub__initializePopulationP12hiprandStatePi
	.size	_Z20initializePopulationP12hiprandStatePi, 8

	.type	_Z15evaluateFitnessPiS_,@object # @_Z15evaluateFitnessPiS_
	.globl	_Z15evaluateFitnessPiS_
	.p2align	3, 0x0
_Z15evaluateFitnessPiS_:
	.quad	_Z30__device_stub__evaluateFitnessPiS_
	.size	_Z15evaluateFitnessPiS_, 8

	.type	_Z21selectionAndCrossoverPiS_P12hiprandStateS_,@object # @_Z21selectionAndCrossoverPiS_P12hiprandStateS_
	.globl	_Z21selectionAndCrossoverPiS_P12hiprandStateS_
	.p2align	3, 0x0
_Z21selectionAndCrossoverPiS_P12hiprandStateS_:
	.quad	_Z36__device_stub__selectionAndCrossoverPiS_P12hiprandStateS_
	.size	_Z21selectionAndCrossoverPiS_P12hiprandStateS_, 8

	.type	_Z6mutatePiP12hiprandStatef,@object # @_Z6mutatePiP12hiprandStatef
	.globl	_Z6mutatePiP12hiprandStatef
	.p2align	3, 0x0
_Z6mutatePiP12hiprandStatef:
	.quad	_Z21__device_stub__mutatePiP12hiprandStatef
	.size	_Z6mutatePiP12hiprandStatef, 8

	.type	_Z15findBestFitnessPiS_,@object # @_Z15findBestFitnessPiS_
	.globl	_Z15findBestFitnessPiS_
	.p2align	3, 0x0
_Z15findBestFitnessPiS_:
	.quad	_Z30__device_stub__findBestFitnessPiS_
	.size	_Z15findBestFitnessPiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error allocating memory for population"
	.size	.L.str, 39

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Error allocating memory for new population"
	.size	.L.str.1, 43

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Error allocating memory for fitness"
	.size	.L.str.2, 36

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Error allocating memory for best fitness"
	.size	.L.str.3, 41

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Error allocating memory for states"
	.size	.L.str.4, 35

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Error in initializePopulation"
	.size	.L.str.5, 30

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Error in evaluateFitness"
	.size	.L.str.6, 25

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Error in findBestFitness"
	.size	.L.str.7, 25

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Generation "
	.size	.L.str.8, 12

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	": Best Fitness = "
	.size	.L.str.9, 18

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Error in selectionAndCrossover"
	.size	.L.str.10, 31

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Error in mutate"
	.size	.L.str.11, 16

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Best individual: "
	.size	.L.str.12, 18

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	" with fitness "
	.size	.L.str.13, 15

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20initializePopulationP12hiprandStatePi"
	.size	.L__unnamed_1, 42

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15evaluateFitnessPiS_"
	.size	.L__unnamed_2, 24

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z21selectionAndCrossoverPiS_P12hiprandStateS_"
	.size	.L__unnamed_3, 47

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z6mutatePiP12hiprandStatef"
	.size	.L__unnamed_4, 28

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z15findBestFitnessPiS_"
	.size	.L__unnamed_5, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__initializePopulationP12hiprandStatePi
	.addrsig_sym _Z30__device_stub__evaluateFitnessPiS_
	.addrsig_sym _Z36__device_stub__selectionAndCrossoverPiS_P12hiprandStateS_
	.addrsig_sym _Z21__device_stub__mutatePiP12hiprandStatef
	.addrsig_sym _Z30__device_stub__findBestFitnessPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z20initializePopulationP12hiprandStatePi
	.addrsig_sym _Z15evaluateFitnessPiS_
	.addrsig_sym _Z21selectionAndCrossoverPiS_P12hiprandStateS_
	.addrsig_sym _Z6mutatePiP12hiprandStatef
	.addrsig_sym _Z15findBestFitnessPiS_
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20initializePopulationP12hiprandStatePi ; -- Begin function _Z20initializePopulationP12hiprandStatePi
	.globl	_Z20initializePopulationP12hiprandStatePi
	.p2align	8
	.type	_Z20initializePopulationP12hiprandStatePi,@function
_Z20initializePopulationP12hiprandStatePi: ; @_Z20initializePopulationP12hiprandStatePi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 64, v2
	s_cbranch_execz .LBB0_3
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v0, 31, v2
	s_getreg_b32 s4, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	v_mov_b32_e32 v9, 0
	v_add_co_u32 v1, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v0, vcc_lo
	v_lshlrev_b32_e32 v0, 5, v2
	v_xor_b32_e32 v4, 0x2c7f967f, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v3, 0xa03697cb, v3
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v8, 0x493c4aa1, v4
	v_mov_b32_e32 v10, v9
	v_mul_lo_u32 v3, 0x7b99840d, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[11:12], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[0:1], null, v2, 48, s[0:1]
	v_add_nc_u32_e32 v13, 0x583f19, v8
	v_add_nc_u32_e32 v4, 0x75bcd15, v8
	v_add_co_u32 v2, vcc_lo, s2, v11
	v_xor_b32_e32 v5, 0x159a55e5, v8
	v_add_nc_u32_e32 v6, 0x1f123bb5, v3
	v_xor_b32_e32 v7, 0x5491333, v3
	v_add3_u32 v8, v8, v3, 0x64f0c9
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_mov_b64 s[0:1], 0
	s_clause 0x2
	global_store_b96 v[0:1], v[8:10], off
	global_store_b128 v[0:1], v[4:7], off offset:24
	global_store_b32 v[0:1], v13, off offset:40
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_clause 0x2
	global_load_b128 v[4:7], v[0:1], off offset:24
	global_load_b32 v8, v[0:1], off offset:40
	global_load_b32 v10, v[0:1], off
	s_waitcnt vmcnt(2)
	v_lshrrev_b32_e32 v9, 2, v4
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v12, 0x587c5, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v9, v4
	v_lshlrev_b32_e32 v9, 4, v8
	v_lshlrev_b32_e32 v11, 1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v11, v11, v9
	v_add_co_u32 v9, vcc_lo, v2, s0
	s_add_u32 s0, s0, 4
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v3, vcc_lo
	v_xor3_b32 v4, v11, v4, v8
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x80
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v11, v12, v4
	v_and_b32_e32 v11, 1, v11
	s_clause 0x2
	global_store_b32 v[0:1], v12, off
	global_store_b128 v[0:1], v[5:8], off offset:24
	global_store_b32 v[0:1], v4, off offset:40
	global_store_b32 v[9:10], v11, off
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20initializePopulationP12hiprandStatePi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20initializePopulationP12hiprandStatePi, .Lfunc_end0-_Z20initializePopulationP12hiprandStatePi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 428
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15evaluateFitnessPiS_ ; -- Begin function _Z15evaluateFitnessPiS_
	.globl	_Z15evaluateFitnessPiS_
	.p2align	8
	.type	_Z15evaluateFitnessPiS_,@function
_Z15evaluateFitnessPiS_:                ; @_Z15evaluateFitnessPiS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 64, v1
	s_cbranch_execz .LBB1_4
; %bb.1:                                ; %.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v2, 5, v1
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_mov_b64 s[0:1], 0
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_co_u32 v4, vcc_lo, v2, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_eq_i32 s0, 0x80
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v4, v0
	s_cbranch_scc0 .LBB1_2
; %bb.3:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB1_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15evaluateFitnessPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15evaluateFitnessPiS_, .Lfunc_end1-_Z15evaluateFitnessPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 204
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z21selectionAndCrossoverPiS_P12hiprandStateS_ ; -- Begin function _Z21selectionAndCrossoverPiS_P12hiprandStateS_
	.globl	_Z21selectionAndCrossoverPiS_P12hiprandStateS_
	.p2align	8
	.type	_Z21selectionAndCrossoverPiS_P12hiprandStateS_,@function
_Z21selectionAndCrossoverPiS_P12hiprandStateS_: ; @_Z21selectionAndCrossoverPiS_P12hiprandStateS_
; %bb.0:
	s_load_b32 s4, s[2:3], 0x2c
	v_and_b32_e32 v9, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[10:11], null, s15, s4, v[9:10]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 64, v10
	s_cbranch_execz .LBB2_4
; %bb.1:
	s_load_b128 s[4:7], s[2:3], 0x10
	s_load_b64 s[0:1], s[0:1], 0x4
	v_bfe_u32 v16, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[5:6], null, v10, 48, s[4:5]
	s_lshr_b32 s0, s0, 16
	v_lshlrev_b32_e32 v10, 5, v10
	s_mul_i32 s0, s0, s1
	s_clause 0x4
	global_load_b128 v[1:4], v[5:6], off offset:24
	global_load_b64 v[7:8], v[5:6], off offset:40
	global_load_b32 v13, v[5:6], off
	global_load_b128 v[19:22], v[5:6], off offset:4
	global_load_b32 v23, v[5:6], off offset:20
	v_mul_lo_u32 v9, s0, v9
	s_waitcnt vmcnt(4)
	v_lshrrev_b32_e32 v11, 2, v1
	v_lshrrev_b32_e32 v14, 2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v11, v1
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v11, 4, v7
	v_lshlrev_b32_e32 v12, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v11, v12, v11
	v_xor_b32_e32 v12, v14, v2
	v_lshrrev_b32_e32 v14, 2, v3
	v_xor3_b32 v2, v11, v1, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v1, 1, v12
	v_xor_b32_e32 v14, v14, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v11, 4, v2
	v_xor_b32_e32 v1, v1, v11
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor3_b32 v3, v1, v12, v2
	v_bfe_u32 v1, v0, 10, 10
	v_lshlrev_b32_e32 v12, 1, v14
	v_lshlrev_b32_e32 v15, 4, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_u32_u24_e32 v17, s1, v1
	s_load_b64 s[0:1], s[2:3], 0x0
	v_lshlrev_b64 v[0:1], 2, v[10:11]
	s_mov_b32 s2, 0
	v_xor_b32_e32 v12, v12, v15
	v_add3_u32 v10, v9, v17, v16
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v15, 0x10974f, v13
	v_add3_u32 v16, v13, v2, 5
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_xor3_b32 v9, v12, v14, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	v_mul_lo_u32 v10, v10, 20
	v_add_co_u32 v11, vcc_lo, v5, 4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v14, v9, v15
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v6, vcc_lo
	v_add3_u32 v17, v13, v3, 10
	v_and_b32_e32 v18, 31, v14
	v_mov_b32_e32 v14, 0
	s_waitcnt vmcnt(1)
	ds_store_2addr_b32 v10, v19, v20 offset1:1
	ds_store_2addr_b32 v10, v21, v22 offset0:2 offset1:3
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v23 offset:16
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	v_cmp_lt_u32_e32 vcc_lo, s2, v18
	v_cndmask_b32_e32 v13, v17, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v13, 5, v13
	v_and_b32_e32 v13, 0x7e0, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v13, s2, v13
	s_add_i32 s2, s2, 1
	s_cmp_eq_u32 s2, 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 2, v[13:14]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v19, vcc_lo, s0, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v20, vcc_lo, s1, v20, vcc_lo
	global_load_b32 v13, v[19:20], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v13, off
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_cbranch_scc0 .LBB2_2
; %bb.3:
	ds_load_b32 v13, v10 offset:16
	ds_load_2addr_b32 v[18:19], v10 offset0:2 offset1:3
	ds_load_2addr_b32 v[16:17], v10 offset1:1
	v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v7
	v_mov_b32_e32 v10, v8
	s_clause 0x1
	global_store_b32 v[5:6], v15, off
	global_store_b128 v[5:6], v[0:3], off offset:24
	s_waitcnt lgkmcnt(2)
	global_store_b32 v[11:12], v13, off offset:16
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b128 v[11:12], v[16:19], off
	global_store_b64 v[5:6], v[9:10], off offset:40
.LBB2_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21selectionAndCrossoverPiS_P12hiprandStateS_
		.amdhsa_group_segment_fixed_size 20480
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 1
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z21selectionAndCrossoverPiS_P12hiprandStateS_, .Lfunc_end2-_Z21selectionAndCrossoverPiS_P12hiprandStateS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 636
; NumSgprs: 18
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 20480 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z6mutatePiP12hiprandStatef ; -- Begin function _Z6mutatePiP12hiprandStatef
	.globl	_Z6mutatePiP12hiprandStatef
	.p2align	8
	.type	_Z6mutatePiP12hiprandStatef,@function
_Z6mutatePiP12hiprandStatef:            ; @_Z6mutatePiP12hiprandStatef
; %bb.0:
	s_load_b32 s4, s[2:3], 0x24
	v_and_b32_e32 v11, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[11:12]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 64, v1
	s_cbranch_execz .LBB3_7
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[2:3], 0x0
	s_load_b32 s2, s[2:3], 0x10
	s_load_b64 s[0:1], s[0:1], 0x4
	v_bfe_u32 v12, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[9:10], null, v1, 48, s[6:7]
	s_lshr_b32 s0, s0, 16
	v_mul_u32_u24_e32 v12, s1, v12
	s_mul_i32 s0, s0, s1
	s_clause 0x4
	global_load_b32 v2, v[9:10], off
	global_load_b128 v[16:19], v[9:10], off offset:4
	global_load_b32 v20, v[9:10], off offset:20
	global_load_b64 v[3:4], v[9:10], off offset:40
	global_load_b128 v[5:8], v[9:10], off offset:24
	v_mul_lo_u32 v13, s0, v11
	v_lshlrev_b32_e32 v11, 5, v1
	s_mov_b64 s[0:1], 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v0, v13, v12, v0
	v_ashrrev_i32_e32 v12, 31, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v0, v0, 20
	v_lshlrev_b64 v[13:14], 2, v[11:12]
	v_add_co_u32 v11, vcc_lo, v9, 4
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s4, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
	s_waitcnt vmcnt(4)
	v_add_nc_u32_e32 v15, 0x587c5, v2
	s_waitcnt vmcnt(3)
	ds_store_2addr_b32 v0, v16, v17 offset1:1
	ds_store_2addr_b32 v0, v18, v19 offset0:2 offset1:3
	s_waitcnt vmcnt(2)
	ds_store_b32 v0, v20 offset:16
.LBB3_2:                                ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v13, 2, v5
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v5, v13, v5
	v_lshlrev_b32_e32 v13, 4, v3
	v_lshlrev_b32_e32 v16, 1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v13, v13, v16
	v_xor3_b32 v13, v13, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v15, v13
	v_cvt_f32_u32_e32 v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v5, 0x2f800000, v5, 0x2f800000
	v_cmpx_gt_f32_e32 s2, v5
	s_cbranch_execz .LBB3_4
; %bb.3:                                ;   in Loop: Header=BB3_2 Depth=1
	v_add_co_u32 v16, vcc_lo, v1, s0
	v_add_co_ci_u32_e32 v17, vcc_lo, s1, v14, vcc_lo
	global_load_b32 v5, v[16:17], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v5, 1, v5
	global_store_b32 v[16:17], v5, off
.LBB3_4:                                ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v15, 0x587c5, v15
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmpk_eq_i32 s0, 0x80
	s_cbranch_scc1 .LBB3_6
; %bb.5:                                ;   in Loop: Header=BB3_2 Depth=1
	v_dual_mov_b32 v5, v6 :: v_dual_mov_b32 v6, v7
	v_dual_mov_b32 v7, v8 :: v_dual_mov_b32 v8, v3
	v_mov_b32_e32 v3, v13
	s_branch .LBB3_2
.LBB3_6:
	ds_load_b32 v5, v0 offset:16
	ds_load_2addr_b32 v[17:18], v0 offset0:2 offset1:3
	ds_load_2addr_b32 v[15:16], v0 offset1:1
	v_dual_mov_b32 v0, v6 :: v_dual_add_nc_u32 v19, 0xb0f8a0, v2
	v_dual_mov_b32 v1, v7 :: v_dual_mov_b32 v2, v8
	v_mov_b32_e32 v14, v4
	s_clause 0x1
	global_store_b32 v[9:10], v19, off
	global_store_b128 v[9:10], v[0:3], off offset:24
	s_waitcnt lgkmcnt(2)
	global_store_b32 v[11:12], v5, off offset:16
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b128 v[11:12], v[15:18], off
	global_store_b64 v[9:10], v[13:14], off offset:40
.LBB3_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6mutatePiP12hiprandStatef
		.amdhsa_group_segment_fixed_size 20480
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 1
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 21
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z6mutatePiP12hiprandStatef, .Lfunc_end3-_Z6mutatePiP12hiprandStatef
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 572
; NumSgprs: 18
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 20480 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 21
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z15findBestFitnessPiS_ ; -- Begin function _Z15findBestFitnessPiS_
	.globl	_Z15findBestFitnessPiS_
	.p2align	8
	.type	_Z15findBestFitnessPiS_,@function
_Z15findBestFitnessPiS_:                ; @_Z15findBestFitnessPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_cmp_lt_u32 s4, 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB4_1:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB4_5
; %bb.2:                                ; %.lr.ph
                                        ;   in Loop: Header=BB4_1 Depth=1
	s_lshr_b32 s0, s4, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB4_4
; %bb.3:                                ;   in Loop: Header=BB4_1 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v3, v1
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_max_i32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB4_4:                                ;   in Loop: Header=BB4_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s4, 4
	s_mov_b32 s4, s0
	s_branch .LBB4_1
.LBB4_5:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB4_8
; %bb.6:
	v_mbcnt_lo_u32_b32 v0, exec_lo, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB4_8
; %bb.7:
	v_mov_b32_e32 v0, 0
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_atomic_max_i32 v0, v1, s[2:3]
.LBB4_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15findBestFitnessPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z15findBestFitnessPiS_, .Lfunc_end4-_Z15findBestFitnessPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 284
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20initializePopulationP12hiprandStatePi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20initializePopulationP12hiprandStatePi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15evaluateFitnessPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15evaluateFitnessPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
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...

	.end_amdgpu_metadata
