#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>

using namespace cooperative_groups;

#define N 64
#define DT 0.001f
#define EPSILON 1e-6f

// Kernel to perform the velocity Verlet integration step
__global__ void velocityVerlet(float4* pos, float4* vel, float4* acc, float4* force, float mass) {
    extern __shared__ float4 shared_pos[];

    int idx = threadIdx.x + blockIdx.x * blockDim.x;

    // Load positions into shared memory
    shared_pos[threadIdx.x] = pos[idx];
    __syncthreads();

    // Calculate new positions
    float4 newPos;
    newPos.x = shared_pos[threadIdx.x].x + vel[idx].x * DT + 0.5f * acc[idx].x * DT * DT;
    newPos.y = shared_pos[threadIdx.x].y + vel[idx].y * DT + 0.5f * acc[idx].y * DT * DT;
    newPos.z = shared_pos[threadIdx.x].z + vel[idx].z * DT + 0.5f * acc[idx].z * DT * DT;
    newPos.w = shared_pos[threadIdx.x].w;

    // Apply periodic boundary conditions (assuming a unit cube for simplicity)
    newPos.x -= floor(newPos.x);
    newPos.y -= floor(newPos.y);
    newPos.z -= floor(newPos.z);

    // Store new positions back to global memory
    pos[idx] = newPos;
    __syncthreads();

    // Reset forces
    force[idx] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    __syncthreads();

    // Compute forces and accelerations using shared memory for positions
    for (int j = 0; j < blockDim.x; ++j) {
        if (idx != j) {
            float4 r = make_float4(shared_pos[j].x - newPos.x,
                                   shared_pos[j].y - newPos.y,
                                   shared_pos[j].z - newPos.z,
                                   0.0f);

            // Apply periodic boundary conditions to the distance vector
            r.x -= roundf(r.x);
            r.y -= roundf(r.y);
            r.z -= roundf(r.z);

            float r2 = r.x * r.x + r.y * r.y + r.z * r.z + EPSILON;
            float inv_r = rsqrtf(r2);
            float inv_r3 = inv_r * inv_r * inv_r;
            float f = inv_r3 - 3.0f * inv_r * inv_r3 * r2;

            atomicAdd(&force[idx].x, f * r.x);
            atomicAdd(&force[idx].y, f * r.y);
            atomicAdd(&force[idx].z, f * r.z);
        }
    }
    __syncthreads();

    // Update accelerations
    acc[idx] = make_float4(force[idx].x / mass,
                           force[idx].y / mass,
                           force[idx].z / mass,
                           0.0f);

    // Calculate new velocities
    vel[idx] = make_float4(vel[idx].x + 0.5f * (acc[idx].x + acc[idx].x) * DT,
                           vel[idx].y + 0.5f * (acc[idx].y + acc[idx].y) * DT,
                           vel[idx].z + 0.5f * (acc[idx].z + acc[idx].z) * DT,
                           0.0f);
}

int main() {
    // Initialize device and allocate memory
    float4* d_pos, *d_vel, *d_acc, *d_force;
    float4* h_pos = new float4[N];
    float4* h_vel = new float4[N];
    float4* h_acc = new float4[N];
    float4* h_force = new float4[N];
    float mass = 1.0f;

    // Initialize positions and velocities
    for (int i = 0; i < N; ++i) {
        h_pos[i] = make_float4((float)i / N, 0.0f, 0.0f, 0.0f);
        h_vel[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
        h_acc[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
        h_force[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    }

    cudaError_t err = cudaMalloc((void**)&d_pos, N * sizeof(float4));
    if (err != cudaSuccess) { std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl; return -1; }
    err = cudaMalloc((void**)&d_vel, N * sizeof(float4));
    if (err != cudaSuccess) { std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl; return -1; }
    err = cudaMalloc((void**)&d_acc, N * sizeof(float4));
    if (err != cudaSuccess) { std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl; return -1; }
    err = cudaMalloc((void**)&d_force, N * sizeof(float4));
    if (err != cudaSuccess) { std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl; return -1; }

    // Copy data to device
    cudaMemcpy(d_pos, h_pos, N * sizeof(float4), cudaMemcpyHostToDevice);
    cudaMemcpy(d_vel, h_vel, N * sizeof(float4), cudaMemcpyHostToDevice);
    cudaMemcpy(d_acc, h_acc, N * sizeof(float4), cudaMemcpyHostToDevice);
    cudaMemcpy(d_force, h_force, N * sizeof(float4), cudaMemcpyHostToDevice);

    // Launch kernel
    int blockSize = 64;
    int numBlocks = (N + blockSize - 1) / blockSize;
    size_t sharedMemSize = blockSize * sizeof(float4);
    velocityVerlet<<<numBlocks, blockSize, sharedMemSize>>>(d_pos, d_vel, d_acc, d_force, mass);
    err = cudaGetLastError();
    if (err != cudaSuccess) { std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl; return -1; }

    // Copy results back to host
    cudaMemcpy(h_pos, d_pos, N * sizeof(float4), cudaMemcpyDeviceToHost);
    cudaMemcpy(h_vel, d_vel, N * sizeof(float4), cudaMemcpyDeviceToHost);
    cudaMemcpy(h_acc, d_acc, N * sizeof(float4), cudaMemcpyDeviceToHost);
    cudaMemcpy(h_force, d_force, N * sizeof(float4), cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_pos);
    cudaFree(d_vel);
    cudaFree(d_acc);
    cudaFree(d_force);

    // Free host memory
    delete[] h_pos;
    delete[] h_vel;
    delete[] h_acc;
    delete[] h_force;

    return 0;
}
	.file	"tmpxft_00156be1_00000000-6_cuda_code_054777.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6835:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6835:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB7717:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE7717:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z50__device_stub__Z14velocityVerletP6float4S0_S0_S0_fP6float4S0_S0_S0_f
	.type	_Z50__device_stub__Z14velocityVerletP6float4S0_S0_S0_fP6float4S0_S0_S0_f, @function
_Z50__device_stub__Z14velocityVerletP6float4S0_S0_S0_fP6float4S0_S0_S0_f:
.LFB6857:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z14velocityVerletP6float4S0_S0_S0_f(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L3:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6857:
	.size	_Z50__device_stub__Z14velocityVerletP6float4S0_S0_S0_fP6float4S0_S0_S0_f, .-_Z50__device_stub__Z14velocityVerletP6float4S0_S0_S0_fP6float4S0_S0_S0_f
	.globl	_Z14velocityVerletP6float4S0_S0_S0_f
	.type	_Z14velocityVerletP6float4S0_S0_S0_f, @function
_Z14velocityVerletP6float4S0_S0_S0_f:
.LFB6858:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z14velocityVerletP6float4S0_S0_S0_fP6float4S0_S0_S0_f
	.cfi_endproc
.LFE6858:
	.size	_Z14velocityVerletP6float4S0_S0_S0_f, .-_Z14velocityVerletP6float4S0_S0_S0_f
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"CUDA error: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6832:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$1024, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$1024, %edi
	movq	%rax, %r13
	call	_Znam@PLT
	movl	$1024, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$1024, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movss	.LC0(%rip), %xmm1
	xorl	%edx, %edx
	movq	%rax, %rbx
	xorl	%eax, %eax
.L10:
	cvtsi2ssl	%edx, %xmm0
	incl	%edx
	movl	$0x00000000, 4(%r13,%rax)
	movl	$0x00000000, 8(%r13,%rax)
	movl	$0x00000000, 12(%r13,%rax)
	movl	$0x00000000, (%r12,%rax)
	mulss	%xmm1, %xmm0
	movl	$0x00000000, (%rbx,%rax)
	movl	$0x00000000, 4(%r12,%rax)
	movl	$0x00000000, 8(%r12,%rax)
	movl	$0x00000000, 12(%r12,%rax)
	movl	$0x00000000, 0(%rbp,%rax)
	movl	$0x00000000, 4(%rbp,%rax)
	movl	$0x00000000, 8(%rbp,%rax)
	movl	$0x00000000, 12(%rbp,%rax)
	movl	$0x00000000, 4(%rbx,%rax)
	movl	$0x00000000, 8(%rbx,%rax)
	movl	$0x00000000, 12(%rbx,%rax)
	movss	%xmm0, 0(%r13,%rax)
	addq	$16, %rax
	cmpl	$64, %edx
	jne	.L10
	movq	%rsp, %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L22
	leaq	8(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r14d
	testl	%eax, %eax
	je	.L13
.L22:
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	orl	$-1, %eax
	jmp	.L9
.L13:
	leaq	16(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L22
	leaq	24(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L22
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$1024, %edx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	movl	$67108865, %edx
	xorl	%r9d, %r9d
	movl	$1024, %r8d
	salq	$6, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movss	.LC3(%rip), %xmm0
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z50__device_stub__Z14velocityVerletP6float4S0_S0_S0_fP6float4S0_S0_S0_f
.L17:
	call	cudaGetLastError@PLT
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L22
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movl	$1024, %edx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	xorl	%eax, %eax
.L9:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6832:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z14velocityVerletP6float4S0_S0_S0_f"
.LC5:
	.string	"_ZN50_INTERNAL_d05e6d29_19_cuda_code_054777_cu_191e3c4c4cuda3std3__419piecewise_constructE"
.LC6:
	.string	"_ZN50_INTERNAL_d05e6d29_19_cuda_code_054777_cu_191e3c4c4cuda3std6ranges3__45__cpo4swapE"
.LC7:
	.string	"_ZN50_INTERNAL_d05e6d29_19_cuda_code_054777_cu_191e3c4c4cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6860:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14velocityVerletP6float4S0_S0_S0_f(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6860:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1015021568
	.align 4
.LC3:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>

using namespace cooperative_groups;

#define N 64
#define DT 0.001f
#define EPSILON 1e-6f

// Kernel to perform the velocity Verlet integration step
__global__ void velocityVerlet(float4* pos, float4* vel, float4* acc, float4* force, float mass) {
    extern __shared__ float4 shared_pos[];

    int idx = threadIdx.x + blockIdx.x * blockDim.x;

    // Load positions into shared memory
    shared_pos[threadIdx.x] = pos[idx];
    __syncthreads();

    // Calculate new positions
    float4 newPos;
    newPos.x = shared_pos[threadIdx.x].x + vel[idx].x * DT + 0.5f * acc[idx].x * DT * DT;
    newPos.y = shared_pos[threadIdx.x].y + vel[idx].y * DT + 0.5f * acc[idx].y * DT * DT;
    newPos.z = shared_pos[threadIdx.x].z + vel[idx].z * DT + 0.5f * acc[idx].z * DT * DT;
    newPos.w = shared_pos[threadIdx.x].w;

    // Apply periodic boundary conditions (assuming a unit cube for simplicity)
    newPos.x -= floor(newPos.x);
    newPos.y -= floor(newPos.y);
    newPos.z -= floor(newPos.z);

    // Store new positions back to global memory
    pos[idx] = newPos;
    __syncthreads();

    // Reset forces
    force[idx] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    __syncthreads();

    // Compute forces and accelerations using shared memory for positions
    for (int j = 0; j < blockDim.x; ++j) {
        if (idx != j) {
            float4 r = make_float4(shared_pos[j].x - newPos.x,
                                   shared_pos[j].y - newPos.y,
                                   shared_pos[j].z - newPos.z,
                                   0.0f);

            // Apply periodic boundary conditions to the distance vector
            r.x -= roundf(r.x);
            r.y -= roundf(r.y);
            r.z -= roundf(r.z);

            float r2 = r.x * r.x + r.y * r.y + r.z * r.z + EPSILON;
            float inv_r = rsqrtf(r2);
            float inv_r3 = inv_r * inv_r * inv_r;
            float f = inv_r3 - 3.0f * inv_r * inv_r3 * r2;

            atomicAdd(&force[idx].x, f * r.x);
            atomicAdd(&force[idx].y, f * r.y);
            atomicAdd(&force[idx].z, f * r.z);
        }
    }
    __syncthreads();

    // Update accelerations
    acc[idx] = make_float4(force[idx].x / mass,
                           force[idx].y / mass,
                           force[idx].z / mass,
                           0.0f);

    // Calculate new velocities
    vel[idx] = make_float4(vel[idx].x + 0.5f * (acc[idx].x + acc[idx].x) * DT,
                           vel[idx].y + 0.5f * (acc[idx].y + acc[idx].y) * DT,
                           vel[idx].z + 0.5f * (acc[idx].z + acc[idx].z) * DT,
                           0.0f);
}

int main() {
    // Initialize device and allocate memory
    float4* d_pos, *d_vel, *d_acc, *d_force;
    float4* h_pos = new float4[N];
    float4* h_vel = new float4[N];
    float4* h_acc = new float4[N];
    float4* h_force = new float4[N];
    float mass = 1.0f;

    // Initialize positions and velocities
    for (int i = 0; i < N; ++i) {
        h_pos[i] = make_float4((float)i / N, 0.0f, 0.0f, 0.0f);
        h_vel[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
        h_acc[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
        h_force[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    }

    hipError_t err = hipMalloc((void**)&d_pos, N * sizeof(float4));
    if (err != hipSuccess) { std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl; return -1; }
    err = hipMalloc((void**)&d_vel, N * sizeof(float4));
    if (err != hipSuccess) { std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl; return -1; }
    err = hipMalloc((void**)&d_acc, N * sizeof(float4));
    if (err != hipSuccess) { std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl; return -1; }
    err = hipMalloc((void**)&d_force, N * sizeof(float4));
    if (err != hipSuccess) { std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl; return -1; }

    // Copy data to device
    hipMemcpy(d_pos, h_pos, N * sizeof(float4), hipMemcpyHostToDevice);
    hipMemcpy(d_vel, h_vel, N * sizeof(float4), hipMemcpyHostToDevice);
    hipMemcpy(d_acc, h_acc, N * sizeof(float4), hipMemcpyHostToDevice);
    hipMemcpy(d_force, h_force, N * sizeof(float4), hipMemcpyHostToDevice);

    // Launch kernel
    int blockSize = 64;
    int numBlocks = (N + blockSize - 1) / blockSize;
    size_t sharedMemSize = blockSize * sizeof(float4);
    velocityVerlet<<<numBlocks, blockSize, sharedMemSize>>>(d_pos, d_vel, d_acc, d_force, mass);
    err = hipGetLastError();
    if (err != hipSuccess) { std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl; return -1; }

    // Copy results back to host
    hipMemcpy(h_pos, d_pos, N * sizeof(float4), hipMemcpyDeviceToHost);
    hipMemcpy(h_vel, d_vel, N * sizeof(float4), hipMemcpyDeviceToHost);
    hipMemcpy(h_acc, d_acc, N * sizeof(float4), hipMemcpyDeviceToHost);
    hipMemcpy(h_force, d_force, N * sizeof(float4), hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_pos);
    hipFree(d_vel);
    hipFree(d_acc);
    hipFree(d_force);

    // Free host memory
    delete[] h_pos;
    delete[] h_vel;
    delete[] h_acc;
    delete[] h_force;

    return 0;
}
	.text
	.file	"cuda_code_054777.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z29__device_stub__velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f # -- Begin function _Z29__device_stub__velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
	.type	_Z29__device_stub__velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f,@function
_Z29__device_stub__velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f: # @_Z29__device_stub__velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f, .Lfunc_end0-_Z29__device_stub__velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3c800000                      # float 0.015625
.LCPI1_1:
	.long	0x3f800000                      # float 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1024, %edi                     # imm = 0x400
	callq	_Znam
	movq	%rax, %rbx
	movl	$1024, %edi                     # imm = 0x400
	callq	_Znam
	movq	%rax, %r14
	movl	$1024, %edi                     # imm = 0x400
	callq	_Znam
	movq	%rax, %r15
	movl	$1024, %edi                     # imm = 0x400
	callq	_Znam
	movq	%rax, %r12
	xorl	%r13d, %r13d
	movl	$1024, %edx                     # imm = 0x400
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$1024, %edx                     # imm = 0x400
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$1024, %edx                     # imm = 0x400
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%rbx, %rax
	addq	$8, %rax
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r13d, %xmm1
	mulss	%xmm0, %xmm1
	xorps	%xmm2, %xmm2
	movss	%xmm1, %xmm2                    # xmm2 = xmm1[0],xmm2[1,2,3]
	movlps	%xmm2, -8(%rax)
	movq	$0, (%rax)
	incq	%r13
	addq	$16, %rax
	cmpq	$64, %r13
	jne	.LBB1_1
# %bb.2:
	leaq	32(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.3:
	leaq	24(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.4:
	leaq	16(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	leaq	8(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_12
.LBB1_6:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_8
# %bb.7:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_9
.LBB1_8:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_9:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_10:
	movl	$-1, %eax
.LBB1_11:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_12:
	.cfi_def_cfa_offset 96
	movq	32(%rsp), %rdi
	movl	$1024, %edx                     # imm = 0x400
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movl	$1024, %edx                     # imm = 0x400
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movl	$1024, %edx                     # imm = 0x400
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$1024, %edx                     # imm = 0x400
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	63(%rdi), %rdx
	movl	$1024, %r8d                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.13:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movss	.LCPI1_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z29__device_stub__velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
.LBB1_14:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_16
# %bb.15:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	movl	$_ZSt4cerr, %edi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	jmp	.LBB1_10
.LBB1_16:
	movq	32(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	%r12, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	jmp	.LBB1_11
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f,@object # @_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
	.section	.rodata,"a",@progbits
	.globl	_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
	.p2align	3, 0x0
_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f:
	.quad	_Z29__device_stub__velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
	.size	_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f"
	.size	.L__unnamed_1, 54

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f ; -- Begin function _Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
	.globl	_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
	.p2align	8
	.type	_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f,@function
_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f: ; @_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b256 s[4:11], s[0:1], 0x0
	v_lshl_add_u32 v5, v0, 4, 0
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[12:13], null, s15, s2, v[0:1]
	s_cmp_eq_u32 s2, 0
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], 4, v[12:13]
	v_add_co_u32 v18, vcc_lo, s4, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v17, vcc_lo
	v_add_co_u32 v8, vcc_lo, s6, v16
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v17, vcc_lo
	global_load_b128 v[1:4], v[18:19], off
	v_add_co_u32 v10, vcc_lo, s8, v16
	v_add_co_ci_u32_e32 v11, vcc_lo, s9, v17, vcc_lo
	s_waitcnt vmcnt(0)
	ds_store_b128 v5, v[1:4]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	global_load_b96 v[0:2], v[8:9], off
	global_load_b96 v[13:15], v[10:11], off
	ds_load_b128 v[4:7], v5
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_fmamk_f32 v4, v0, 0x3a83126f, v4 :: v_dual_mul_f32 v3, 0.5, v14
	v_dual_mul_f32 v0, 0.5, v13 :: v_dual_mul_f32 v13, 0.5, v15
	v_dual_fmamk_f32 v5, v1, 0x3a83126f, v5 :: v_dual_fmamk_f32 v6, v2, 0x3a83126f, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v2, 0x3a83126f, v3 :: v_dual_mul_f32 v1, 0x3a83126f, v0
	v_dual_mul_f32 v3, 0x3a83126f, v13 :: v_dual_mov_b32 v0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v5, 0x3a83126f, v2 :: v_dual_fmac_f32 v4, 0x3a83126f, v1
	v_dual_fmac_f32 v6, 0x3a83126f, v3 :: v_dual_mov_b32 v1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_floor_f32_e32 v14, v5
	v_floor_f32_e32 v13, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_floor_f32_e32 v15, v6
	v_mov_b32_e32 v2, v0
	v_mov_b32_e32 v3, v0
	v_dual_sub_f32 v5, v5, v14 :: v_dual_sub_f32 v4, v4, v13
	s_delay_alu instid0(VALU_DEP_4)
	v_sub_f32_e32 v6, v6, v15
	v_add_co_u32 v13, vcc_lo, s10, v16
	v_add_co_ci_u32_e32 v14, vcc_lo, s11, v17, vcc_lo
	global_store_b128 v[18:19], v[4:7], off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_store_b128 v[13:14], v[0:3], off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_9
.LBB0_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;     Child Loop BB0_5 Depth 2
                                        ;     Child Loop BB0_7 Depth 2
	s_mov_b32 s4, exec_lo
	v_cmpx_ne_u32_e64 s3, v12
	s_cbranch_execz .LBB0_8
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	global_load_b32 v2, v[13:14], off
	s_lshl_b32 s5, s3, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s5, s5, 0
	v_mov_b32_e32 v1, s5
	ds_load_b96 v[15:17], v1
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e32 v3, v15, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v15, v3
	v_dual_sub_f32 v1, v16, v5 :: v_dual_sub_f32 v16, v17, v6
	v_trunc_f32_e32 v19, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v20, v16, v19
	v_sub_f32_e32 v18, v3, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v7, v1
	v_sub_f32_e32 v17, v1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s5, |v17|, 0.5
	v_cndmask_b32_e64 v17, 0, 1.0, s5
	v_cmp_ge_f32_e64 s5, |v18|, 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfi_b32 v17, 0x7fffffff, v17, v1
	v_cndmask_b32_e64 v18, 0, 1.0, s5
	v_cmp_ge_f32_e64 s5, |v20|, 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v7, v7, v17
	v_bfi_b32 v18, 0x7fffffff, v18, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v20, 0, 1.0, s5
	s_mov_b32 s5, 0
	v_add_f32_e32 v17, v15, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_bfi_b32 v18, 0x7fffffff, v20, v16
	v_sub_f32_e32 v15, v1, v7
	v_sub_f32_e32 v1, v3, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v3, v19, v18
	v_mul_f32_e32 v7, v15, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v3, v16, v3
	v_fmac_f32_e32 v7, v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v3, v3
	v_add_f32_e32 v16, 0x358637bd, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v7, 0x4b800000, v16
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16
	v_cndmask_b32_e32 v7, v16, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rsq_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v17, 0x45800000, v7
	v_cndmask_b32_e32 v17, v7, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v17, v17
	v_mul_f32_e32 v7, v17, v7
	v_mul_f32_e32 v17, 0xc0400000, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, v17, v7
	v_fmac_f32_e32 v7, v16, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v16, v1, v7
.LBB0_3:                                ; %atomicrmw.start
                                        ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v1, v2, v16
	global_atomic_cmpswap_b32 v1, v[13:14], v[1:2], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v1, v2
	v_mov_b32_e32 v2, v1
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_3
; %bb.4:                                ; %atomicrmw.end
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b32 v2, v[13:14], off offset:4
	v_mul_f32_e32 v15, v15, v7
	s_mov_b32 s5, 0
.LBB0_5:                                ; %atomicrmw.start122
                                        ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v1, v2, v15
	global_atomic_cmpswap_b32 v1, v[13:14], v[1:2], off offset:4 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v1, v2
	v_mov_b32_e32 v2, v1
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_5
; %bb.6:                                ; %atomicrmw.end121
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b32 v2, v[13:14], off offset:8
	v_mul_f32_e32 v3, v3, v7
	s_mov_b32 s5, 0
.LBB0_7:                                ; %atomicrmw.start128
                                        ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v1, v2, v3
	global_atomic_cmpswap_b32 v1, v[13:14], v[1:2], off offset:8 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v1, v2
	v_mov_b32_e32 v2, v1
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_7
.LBB0_8:                                ; %Flow151
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, s2
	s_cbranch_scc0 .LBB0_1
.LBB0_9:                                ; %._crit_edge
	s_barrier
	buffer_gl0_inv
	global_load_b96 v[1:3], v[13:14], off
	s_load_b32 s2, s[0:1], 0x20
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_div_scale_f32 v4, null, s2, s2, v1
	v_div_scale_f32 v5, null, s2, s2, v2
	v_div_scale_f32 v6, null, s2, s2, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v7, v4
	v_rcp_f32_e32 v12, v5
	v_div_scale_f32 v14, vcc_lo, v1, s2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(TRANS32_DEP_3)
	v_rcp_f32_e32 v13, v6
	v_div_scale_f32 v15, s0, v2, s2, v2
	v_div_scale_f32 v19, s1, v3, s2, v3
	v_fma_f32 v16, -v4, v7, 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v17, -v5, v12, 1.0
	v_fma_f32 v18, -v6, v13, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v7, v16, v7 :: v_dual_fmac_f32 v12, v17, v12
	v_dual_mul_f32 v16, v14, v7 :: v_dual_mul_f32 v17, v15, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v20, -v4, v16, v14
	v_fmac_f32_e32 v13, v18, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v21, -v5, v17, v15
	v_fmac_f32_e32 v16, v20, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v18, v19, v13 :: v_dual_fmac_f32 v17, v21, v12
	v_fma_f32 v4, -v4, v16, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v22, -v6, v18, v19
	v_fma_f32 v5, -v5, v17, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v7, v4, v7, v16
	v_fmac_f32_e32 v18, v22, v13
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v5, v5, v12, v17
	s_mov_b32 vcc_lo, s1
	v_fma_f32 v6, -v6, v18, v19
	v_div_fixup_f32 v1, v7, s2, v1
	v_mov_b32_e32 v4, v0
	v_div_fixup_f32 v2, v5, s2, v2
	v_mov_b32_e32 v7, v0
	v_div_fmas_f32 v6, v6, v13, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v3, v6, s2, v3
	global_store_b128 v[10:11], v[1:4], off
	v_add_f32_e32 v1, v1, v1
	global_load_b96 v[4:6], v[8:9], off
	v_dual_add_f32 v2, v2, v2 :: v_dual_add_f32 v3, v3, v3
	v_dual_mul_f32 v1, 0.5, v1 :: v_dual_mul_f32 v2, 0.5, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v3, 0.5, v3 :: v_dual_fmamk_f32 v4, v1, 0x3a83126f, v4
	v_dual_fmamk_f32 v5, v2, 0x3a83126f, v5 :: v_dual_fmac_f32 v6, 0x3a83126f, v3
	global_store_b128 v[8:9], v[4:7], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f, .Lfunc_end0-_Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1328
; NumSgprs: 18
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         160
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14velocityVerletP15HIP_vector_typeIfLj4EES1_S1_S1_f.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     23
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
