#include <iostream>
#include <cuda_runtime.h>

#define N 8192
#define MAX_VAL 256

__global__ void countingSortKernel(int *input, int *output, int *histogram, int *scan, int n) {
    extern __shared__ int s_histogram[];

    // Initialize shared memory histogram to zero
    int idx = threadIdx.x;
    while (idx < MAX_VAL) {
        s_histogram[idx] = 0;
        idx += blockDim.x;
    }
    __syncthreads();

    // Load input into shared memory histogram
    idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < n) {
        atomicAdd(&s_histogram[input[idx]], 1);
    }
    __syncthreads();

    // Write shared histogram to global memory
    idx = threadIdx.x;
    while (idx < MAX_VAL) {
        atomicAdd(&histogram[idx], s_histogram[idx]);
        idx += blockDim.x;
    }
    __syncthreads();

    // Use global scan to calculate offsets
    if (threadIdx.x == 0) {
        int sum = 0;
        for (int i = 0; i < MAX_VAL; ++i) {
            int old = histogram[i];
            histogram[i] = sum;
            sum += old;
        }
    }
    __syncthreads();

    // Write sorted output
    idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < n) {
        int val = input[idx];
        int pos = atomicAdd(&histogram[val], 1);
        output[pos] = val;
    }
}

void checkCudaError(cudaError_t err, const char *message) {
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << message << " - " << cudaGetErrorString(err) << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    int *h_input, *h_output, *h_histogram, *h_scan;
    int *d_input, *d_output, *d_histogram, *d_scan;

    // Allocate host memory
    h_input = (int *)malloc(N * sizeof(int));
    h_output = (int *)malloc(N * sizeof(int));
    h_histogram = (int *)malloc(MAX_VAL * sizeof(int));
    h_scan = (int *)malloc(MAX_VAL * sizeof(int));

    // Initialize input array with random values
    for (int i = 0; i < N; ++i) {
        h_input[i] = rand() % MAX_VAL;
    }

    // Allocate device memory
    checkCudaError(cudaMalloc((void **)&d_input, N * sizeof(int)), "cudaMalloc d_input");
    checkCudaError(cudaMalloc((void **)&d_output, N * sizeof(int)), "cudaMalloc d_output");
    checkCudaError(cudaMalloc((void **)&d_histogram, MAX_VAL * sizeof(int)), "cudaMalloc d_histogram");
    checkCudaError(cudaMalloc((void **)&d_scan, MAX_VAL * sizeof(int)), "cudaMalloc d_scan");

    // Copy input data from host to device
    checkCudaError(cudaMemcpy(d_input, h_input, N * sizeof(int), cudaMemcpyHostToDevice), "cudaMemcpy d_input");

    // Set up execution configuration
    dim3 blockSize(256);
    dim3 gridSize((N + blockSize.x - 1) / blockSize.x);

    // Launch kernel
    countingSortKernel<<<gridSize, blockSize, MAX_VAL * sizeof(int)>>>(d_input, d_output, d_histogram, d_scan, N);
    checkCudaError(cudaGetLastError(), "countingSortKernel launch failed");
    checkCudaError(cudaDeviceSynchronize(), "cudaDeviceSynchronize failed");

    // Copy output data from device to host
    checkCudaError(cudaMemcpy(h_output, d_output, N * sizeof(int), cudaMemcpyDeviceToHost), "cudaMemcpy d_output");

    // Verify the sorted output
    bool isSorted = true;
    for (int i = 0; i < N - 1; ++i) {
        if (h_output[i] > h_output[i + 1]) {
            isSorted = false;
            break;
        }
    }

    std::cout << "Sorting " << (isSorted ? "successful" : "failed") << std::endl;

    // Free device memory
    cudaFree(d_input);
    cudaFree(d_output);
    cudaFree(d_histogram);
    cudaFree(d_scan);

    // Free host memory
    free(h_input);
    free(h_output);
    free(h_histogram);
    free(h_scan);

    return 0;
}
	.file	"tmpxft_0003ae65_00000000-6_cuda_code_060429.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error: "
.LC1:
	.string	" - "
	.text
	.globl	_Z14checkCudaError9cudaErrorPKc
	.type	_Z14checkCudaError9cudaErrorPKc, @function
_Z14checkCudaError9cudaErrorPKc:
.LFB3635:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	leaq	.LC0(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	leaq	_ZSt4cerr(%rip), %rdi
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z14checkCudaError9cudaErrorPKc, .-_Z14checkCudaError9cudaErrorPKc
	.globl	_Z45__device_stub__Z18countingSortKernelPiS_S_S_iPiS_S_S_i
	.type	_Z45__device_stub__Z18countingSortKernelPiS_S_S_iPiS_S_S_i, @function
_Z45__device_stub__Z18countingSortKernelPiS_S_S_iPiS_S_S_i:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z18countingSortKernelPiS_S_S_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L8:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z45__device_stub__Z18countingSortKernelPiS_S_S_iPiS_S_S_i, .-_Z45__device_stub__Z18countingSortKernelPiS_S_S_iPiS_S_S_i
	.globl	_Z18countingSortKernelPiS_S_S_i
	.type	_Z18countingSortKernelPiS_S_S_i, @function
_Z18countingSortKernelPiS_S_S_i:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z18countingSortKernelPiS_S_S_iPiS_S_S_i
	.cfi_endproc
.LFE3662:
	.size	_Z18countingSortKernelPiS_S_S_i, .-_Z18countingSortKernelPiS_S_S_i
	.section	.rodata.str1.1
.LC2:
	.string	"successful"
.LC3:
	.string	"failed"
.LC4:
	.string	"cudaMalloc d_input"
.LC5:
	.string	"cudaMalloc d_output"
.LC6:
	.string	"cudaMalloc d_histogram"
.LC7:
	.string	"cudaMalloc d_scan"
.LC8:
	.string	"cudaMemcpy d_input"
.LC9:
	.string	"countingSortKernel launch failed"
.LC10:
	.string	"cudaDeviceSynchronize failed"
.LC11:
	.string	"cudaMemcpy d_output"
.LC12:
	.string	"Sorting "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$32768, %edi
	movl	$256, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$32768, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rax, %rbx
.L14:
	call	rand@PLT
	cltd
	idivl	%r13d
	movl	%edx, 0(%rbp,%r12,4)
	incq	%r12
	cmpq	$8192, %r12
	jne	.L14
	movq	%rsp, %rdi
	movl	$32768, %esi
	call	cudaMalloc@PLT
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	8(%rsp), %rdi
	movl	$32768, %esi
	call	cudaMalloc@PLT
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	16(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	24(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	leaq	.LC7(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$32768, %edx
	call	cudaMemcpy@PLT
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movl	$16777217, %edx
	movl	$134217729, %edi
	xorl	%r9d, %r9d
	salq	$8, %rdx
	salq	$5, %rdi
	movl	$1024, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movl	$8192, %r8d
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z45__device_stub__Z18countingSortKernelPiS_S_S_iPiS_S_S_i
.L15:
	call	cudaGetLastError@PLT
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	call	cudaDeviceSynchronize@PLT
	leaq	.LC10(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$32768, %edx
	call	cudaMemcpy@PLT
	leaq	.LC11(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	xorl	%eax, %eax
.L17:
	movl	4(%rbx,%rax), %ecx
	cmpl	%ecx, (%rbx,%rax)
	jg	.L20
	addq	$4, %rax
	cmpq	$32764, %rax
	jne	.L17
	movb	$1, %r12b
	jmp	.L16
.L20:
	xorl	%r12d, %r12d
.L16:
	leaq	.LC12(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	testb	%r12b, %r12b
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	leaq	.LC2(%rip), %rax
	cmovne	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC13:
	.string	"_Z18countingSortKernelPiS_S_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18countingSortKernelPiS_S_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

#define N 8192
#define MAX_VAL 256

__global__ void countingSortKernel(int *input, int *output, int *histogram, int *scan, int n) {
    extern __shared__ int s_histogram[];

    // Initialize shared memory histogram to zero
    int idx = threadIdx.x;
    while (idx < MAX_VAL) {
        s_histogram[idx] = 0;
        idx += blockDim.x;
    }
    __syncthreads();

    // Load input into shared memory histogram
    idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < n) {
        atomicAdd(&s_histogram[input[idx]], 1);
    }
    __syncthreads();

    // Write shared histogram to global memory
    idx = threadIdx.x;
    while (idx < MAX_VAL) {
        atomicAdd(&histogram[idx], s_histogram[idx]);
        idx += blockDim.x;
    }
    __syncthreads();

    // Use global scan to calculate offsets
    if (threadIdx.x == 0) {
        int sum = 0;
        for (int i = 0; i < MAX_VAL; ++i) {
            int old = histogram[i];
            histogram[i] = sum;
            sum += old;
        }
    }
    __syncthreads();

    // Write sorted output
    idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < n) {
        int val = input[idx];
        int pos = atomicAdd(&histogram[val], 1);
        output[pos] = val;
    }
}

void checkCudaError(hipError_t err, const char *message) {
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << message << " - " << hipGetErrorString(err) << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    int *h_input, *h_output, *h_histogram, *h_scan;
    int *d_input, *d_output, *d_histogram, *d_scan;

    // Allocate host memory
    h_input = (int *)malloc(N * sizeof(int));
    h_output = (int *)malloc(N * sizeof(int));
    h_histogram = (int *)malloc(MAX_VAL * sizeof(int));
    h_scan = (int *)malloc(MAX_VAL * sizeof(int));

    // Initialize input array with random values
    for (int i = 0; i < N; ++i) {
        h_input[i] = rand() % MAX_VAL;
    }

    // Allocate device memory
    checkCudaError(hipMalloc((void **)&d_input, N * sizeof(int)), "hipMalloc d_input");
    checkCudaError(hipMalloc((void **)&d_output, N * sizeof(int)), "hipMalloc d_output");
    checkCudaError(hipMalloc((void **)&d_histogram, MAX_VAL * sizeof(int)), "hipMalloc d_histogram");
    checkCudaError(hipMalloc((void **)&d_scan, MAX_VAL * sizeof(int)), "hipMalloc d_scan");

    // Copy input data from host to device
    checkCudaError(hipMemcpy(d_input, h_input, N * sizeof(int), hipMemcpyHostToDevice), "hipMemcpy d_input");

    // Set up execution configuration
    dim3 blockSize(256);
    dim3 gridSize((N + blockSize.x - 1) / blockSize.x);

    // Launch kernel
    countingSortKernel<<<gridSize, blockSize, MAX_VAL * sizeof(int)>>>(d_input, d_output, d_histogram, d_scan, N);
    checkCudaError(hipGetLastError(), "countingSortKernel launch failed");
    checkCudaError(hipDeviceSynchronize(), "hipDeviceSynchronize failed");

    // Copy output data from device to host
    checkCudaError(hipMemcpy(h_output, d_output, N * sizeof(int), hipMemcpyDeviceToHost), "hipMemcpy d_output");

    // Verify the sorted output
    bool isSorted = true;
    for (int i = 0; i < N - 1; ++i) {
        if (h_output[i] > h_output[i + 1]) {
            isSorted = false;
            break;
        }
    }

    std::cout << "Sorting " << (isSorted ? "successful" : "failed") << std::endl;

    // Free device memory
    hipFree(d_input);
    hipFree(d_output);
    hipFree(d_histogram);
    hipFree(d_scan);

    // Free host memory
    free(h_input);
    free(h_output);
    free(h_histogram);
    free(h_scan);

    return 0;
}
	.text
	.file	"cuda_code_060429.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__countingSortKernelPiS_S_S_i # -- Begin function _Z33__device_stub__countingSortKernelPiS_S_S_i
	.type	_Z33__device_stub__countingSortKernelPiS_S_S_i,@function
_Z33__device_stub__countingSortKernelPiS_S_S_i: # @_Z33__device_stub__countingSortKernelPiS_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18countingSortKernelPiS_S_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__countingSortKernelPiS_S_S_i, .Lfunc_end0-_Z33__device_stub__countingSortKernelPiS_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCudaError10hipError_tPKc # -- Begin function _Z14checkCudaError10hipError_tPKc
	.type	_Z14checkCudaError10hipError_tPKc,@function
_Z14checkCudaError10hipError_tPKc:      # @_Z14checkCudaError10hipError_tPKc
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB1_2
# %bb.1:
	retq
.LBB1_2:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %r14
	movl	%edi, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z14checkCudaError10hipError_tPKc, .Lfunc_end1-_Z14checkCudaError10hipError_tPKc
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$32768, %edi                    # imm = 0x8000
	callq	malloc
	movq	%rax, %rbx
	movl	$32768, %edi                    # imm = 0x8000
	callq	malloc
	movq	%rax, %r14
	xorl	%r15d, %r15d
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	255(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-256, %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	$8192, %r15                     # imm = 0x2000
	jne	.LBB2_1
# %bb.2:
	leaq	32(%rsp), %r15
	movl	$32768, %esi                    # imm = 0x8000
	movq	%r15, %rdi
	callq	hipMalloc
	movl	$.L.str.2, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	leaq	8(%rsp), %rdi
	movl	$32768, %esi                    # imm = 0x8000
	callq	hipMalloc
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	leaq	24(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	movl	$.L.str.4, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	leaq	16(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	movl	$.L.str.5, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	(%r15), %rdi
	movl	$32768, %edx                    # imm = 0x8000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.6, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movabsq	$4294967328, %rdi               # imm = 0x100000020
	leaq	224(%rdi), %rdx
	movl	$1024, %r8d                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	32(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	movl	$8192, %r8d                     # imm = 0x2000
	callq	_Z33__device_stub__countingSortKernelPiS_S_S_i
.LBB2_4:
	callq	hipGetLastError
	movl	$.L.str.7, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	callq	hipDeviceSynchronize
	movl	$.L.str.8, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	8(%rsp), %rsi
	movl	$32768, %edx                    # imm = 0x8000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.9, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movl	$1, %eax
.LBB2_5:                                # =>This Inner Loop Header: Depth=1
	cmpq	$8192, %rax                     # imm = 0x2000
	je	.LBB2_6
# %bb.7:                                #   in Loop: Header=BB2_5 Depth=1
	movl	-4(%r14,%rax,4), %ecx
	leaq	1(%rax), %rdx
	cmpl	(%r14,%rax,4), %ecx
	movq	%rdx, %rax
	jle	.LBB2_5
# %bb.8:
	movl	$.L.str.12, %r15d
	jmp	.LBB2_9
.LBB2_6:
	movl	$.L.str.11, %r15d
.LBB2_9:
	movl	$_ZSt4cout, %r12d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$8, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r15, %rdi
	callq	strlen
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18countingSortKernelPiS_S_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18countingSortKernelPiS_S_S_i,@object # @_Z18countingSortKernelPiS_S_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z18countingSortKernelPiS_S_S_i
	.p2align	3, 0x0
_Z18countingSortKernelPiS_S_S_i:
	.quad	_Z33__device_stub__countingSortKernelPiS_S_S_i
	.size	_Z18countingSortKernelPiS_S_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" - "
	.size	.L.str.1, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"hipMalloc d_input"
	.size	.L.str.2, 18

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"hipMalloc d_output"
	.size	.L.str.3, 19

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"hipMalloc d_histogram"
	.size	.L.str.4, 22

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"hipMalloc d_scan"
	.size	.L.str.5, 17

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"hipMemcpy d_input"
	.size	.L.str.6, 18

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"countingSortKernel launch failed"
	.size	.L.str.7, 33

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"hipDeviceSynchronize failed"
	.size	.L.str.8, 28

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"hipMemcpy d_output"
	.size	.L.str.9, 19

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Sorting "
	.size	.L.str.10, 9

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"successful"
	.size	.L.str.11, 11

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"failed"
	.size	.L.str.12, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18countingSortKernelPiS_S_S_i"
	.size	.L__unnamed_1, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__countingSortKernelPiS_S_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18countingSortKernelPiS_S_S_i
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18countingSortKernelPiS_S_S_i ; -- Begin function _Z18countingSortKernelPiS_S_S_i
	.globl	_Z18countingSortKernelPiS_S_S_i
	.p2align	8
	.type	_Z18countingSortKernelPiS_S_S_i,@function
_Z18countingSortKernelPiS_S_S_i:        ; @_Z18countingSortKernelPiS_S_S_i
; %bb.0:
	v_cmp_gt_u32_e64 s2, 0x100, v0
	s_add_u32 s4, s0, 40
	s_addc_u32 s5, s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s6, s[4:5], 0xc
	v_lshl_add_u32 v1, v0, 2, 0
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, v0
	s_mov_b32 s7, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s6, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s8, s6, 2
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v3, s6, v3
	ds_store_b32 v1, v2
	v_add_nc_u32_e32 v1, s8, v1
	v_cmp_lt_u32_e32 vcc_lo, 0xff, v3
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow67
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_load_b32 s3, s[4:5], 0xc
	s_clause 0x2
	s_load_b32 s10, s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s10, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.4:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_co_u32 v3, s0, s4, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s5, v4, s0
	global_load_b32 v3, v[3:4], off
	v_mov_b32_e32 v4, 1
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v3, v3, 2, 0
	ds_add_u32 v3, v4
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s10, s2
	s_cbranch_execz .LBB0_8
; %bb.6:                                ; %.lr.ph40.preheader
	v_dual_mov_b32 v6, v0 :: v_dual_lshlrev_b32 v5, 2, v0
	s_mov_b32 s2, 0
	s_lshl_b32 s11, s3, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s0, s8, v5
	v_add_co_ci_u32_e64 v4, null, s9, 0, s0
	v_add_nc_u32_e32 v5, 0, v5
.LBB0_7:                                ; %.lr.ph40
                                        ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v7, v5
	v_add_nc_u32_e32 v6, s3, v6
	v_add_nc_u32_e32 v5, s11, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e64 s0, 0xff, v6
	s_or_b32 s2, s0, s2
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u32 v[3:4], v7, off
	v_add_co_u32 v3, s1, v3, s11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s1, 0, v4, s1
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_7
.LBB0_8:                                ; %Flow65
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s2, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_11
; %bb.9:                                ; %.preheader.preheader
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v3, 0
	s_mov_b64 s[0:1], 0
.LBB0_10:                               ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s10, s8, s0
	s_addc_u32 s11, s9, s1
	s_add_u32 s0, s0, 4
	global_load_b32 v4, v0, s[10:11]
	global_store_b32 v0, v3, s[10:11]
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x400
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	s_cbranch_scc1 .LBB0_10
.LBB0_11:                               ; %Flow63
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_13
; %bb.12:
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_mov_b32_e32 v3, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	global_atomic_add_u32 v1, v[1:2], v3, off glc
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB0_13:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18countingSortKernelPiS_S_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18countingSortKernelPiS_S_S_i, .Lfunc_end0-_Z18countingSortKernelPiS_S_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 684
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym s_histogram
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         160
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18countingSortKernelPiS_S_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18countingSortKernelPiS_S_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
