#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>

namespace cg = cooperative_groups;

// Define a simple structure to represent a sparse matrix entry
struct SparseEntry {
    int row;
    int col;
    float value;
};

// Kernel to perform sparse convolution
__global__ void sparseConvolutionKernel(const SparseEntry* __restrict__ input,
                                       const float* __restrict__ filter,
                                       float* __restrict__ output,
                                       int inputSize,
                                       int filterSize) {
    extern __shared__ float sharedFilter[];

    // Calculate the thread's position in the output matrix
    int outputRow = blockIdx.y * blockDim.y + threadIdx.y;
    int outputCol = blockIdx.x * blockDim.x + threadIdx.x;

    // Load filter into shared memory
    int filterIndex = threadIdx.y * blockDim.x + threadIdx.x;
    if (filterIndex < filterSize * filterSize) {
        sharedFilter[filterIndex] = filter[filterIndex];
    }
    __syncthreads();

    // Initialize output value
    float sum = 0.0f;

    // Iterate over all non-zero entries in the input matrix
    for (int i = 0; i < inputSize; ++i) {
        int inputRow = input[i].row;
        int inputCol = input[i].col;
        float inputValue = input[i].value;

        // Check if the input entry is within the convolution window
        if (inputRow >= outputRow && inputRow < outputRow + filterSize &&
            inputCol >= outputCol && inputCol < outputCol + filterSize) {
            int filterRow = inputRow - outputRow;
            int filterCol = inputCol - outputCol;
            int filterIndex = filterRow * filterSize + filterCol;
            sum += inputValue * sharedFilter[filterIndex];
        }
    }

    // Write the result to the output matrix
    if (outputRow < 512 && outputCol < 512) {
        output[outputRow * 512 + outputCol] = sum;
    }
}

int main() {
    // Example sparse input matrix
    SparseEntry input[] = {
        {0, 0, 1.0f}, {0, 1, 2.0f}, {1, 0, 3.0f}, {1, 1, 4.0f}
    };
    int inputSize = sizeof(input) / sizeof(SparseEntry);

    // Example filter matrix
    float filter[512 * 512];
    for (int i = 0; i < 512 * 512; ++i) {
        filter[i] = 0.1f; // Simple example filter
    }

    // Allocate memory on the device
    SparseEntry* d_input;
    float* d_filter;
    float* d_output;
    cudaMalloc(&d_input, inputSize * sizeof(SparseEntry));
    cudaMalloc(&d_filter, 512 * 512 * sizeof(float));
    cudaMalloc(&d_output, 512 * 512 * sizeof(float));

    // Copy data to the device
    cudaMemcpy(d_input, input, inputSize * sizeof(SparseEntry), cudaMemcpyHostToDevice);
    cudaMemcpy(d_filter, filter, 512 * 512 * sizeof(float), cudaMemcpyHostToDevice);

    // Define block and grid dimensions
    dim3 blockSize(16, 16);
    dim3 gridSize(32, 32); // 512x512 / 16x16

    // Launch the kernel
    size_t sharedMemSize = 512 * 512 * sizeof(float);
    sparseConvolutionKernel<<<gridSize, blockSize, sharedMemSize>>>(d_input, d_filter, d_output, inputSize, 512);

    // Check for errors in kernel launch
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy the result back to the host
    float output[512 * 512];
    cudaMemcpy(output, d_output, 512 * 512 * sizeof(float), cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_input);
    cudaFree(d_filter);
    cudaFree(d_output);

    // Print a small part of the output to verify
    for (int i = 0; i < 16; ++i) {
        for (int j = 0; j < 16; ++j) {
            std::cout << output[i * 512 + j] << " ";
        }
        std::cout << std::endl;
    }

    return 0;
}
	.file	"tmpxft_000c97d9_00000000-6_cuda_code_046969.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6835:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6835:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z63__device_stub__Z23sparseConvolutionKernelPK11SparseEntryPKfPfiiPK11SparseEntryPKfPfii
	.type	_Z63__device_stub__Z23sparseConvolutionKernelPK11SparseEntryPKfPfiiPK11SparseEntryPKfPfii, @function
_Z63__device_stub__Z23sparseConvolutionKernelPK11SparseEntryPKfPfiiPK11SparseEntryPKfPfii:
.LFB6857:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%ecx, 12(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rdi, 24(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6857:
	.size	_Z63__device_stub__Z23sparseConvolutionKernelPK11SparseEntryPKfPfiiPK11SparseEntryPKfPfii, .-_Z63__device_stub__Z23sparseConvolutionKernelPK11SparseEntryPKfPfiiPK11SparseEntryPKfPfii
	.globl	_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii
	.type	_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii, @function
_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii:
.LFB6858:
	.cfi_startproc
	endbr64
	jmp	_Z63__device_stub__Z23sparseConvolutionKernelPK11SparseEntryPKfPfiiPK11SparseEntryPKfPfii
	.cfi_endproc
.LFE6858:
	.size	_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii, .-_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"CUDA error: "
.LC3:
	.string	" "
	.section	.rodata
	.align 32
.LC0:
	.long	0
	.long	0
	.long	1065353216
	.long	0
	.long	1
	.long	1073741824
	.long	1
	.long	0
	.long	1077936128
	.long	1
	.long	1
	.long	1082130432
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6832:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leaq	-2097152(%rsp), %r11
	.cfi_def_cfa 11, 2097192
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$120, %rsp
	.cfi_def_cfa_offset 2097312
	leaq	.LC0(%rip), %rsi
	movl	$12, %ecx
	movss	.LC1(%rip), %xmm0
	movq	%fs:40, %rax
	movq	%rax, 2097256(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rdi
	rep movsl
.L9:
	leaq	104(%rsp), %rbx
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$262144, %rax
	jne	.L9
	leaq	8(%rsp), %rdi
	movl	$48, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$1048576, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$1048576, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$48, %edx
	leaq	56(%rsp), %rsi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$1048576, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	movl	$1048576, %r8d
	movabsq	$68719476752, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$137438953504, %rdi
	movq	%rdx, 32(%rsp)
	movl	$1, 40(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$4, %ecx
	movl	$512, %r8d
	movq	8(%rsp), %rdi
	call	_Z63__device_stub__Z23sparseConvolutionKernelPK11SparseEntryPKfPfiiPK11SparseEntryPKfPfii
.L10:
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L11
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L8
.L11:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	leaq	1048680(%rsp), %rbp
	movl	$1048576, %edx
	movq	%rbp, %rdi
	leaq	_ZSt4cout(%rip), %r13
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
.L13:
	xorl	%r12d, %r12d
.L14:
	movq	%r13, %rdi
	cvtss2sd	0(%rbp,%r12,4), %xmm0
	incq	%r12
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$16, %r12
	jne	.L14
	movq	%r13, %rdi
	addl	$512, %ebx
	addq	$2048, %rbp
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpl	$8192, %ebx
	jne	.L13
	xorl	%eax, %eax
.L8:
	movq	2097256(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$2097272, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6832:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii"
.LC6:
	.string	"_ZN50_INTERNAL_6cde436d_19_cuda_code_046969_cu_7da358284cuda3std3__419piecewise_constructE"
.LC7:
	.string	"_ZN50_INTERNAL_6cde436d_19_cuda_code_046969_cu_7da358284cuda3std6ranges3__45__cpo4swapE"
.LC8:
	.string	"_ZN50_INTERNAL_6cde436d_19_cuda_code_046969_cu_7da358284cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6860:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6860:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1036831949
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>

namespace cg = cooperative_groups;

// Define a simple structure to represent a sparse matrix entry
struct SparseEntry {
    int row;
    int col;
    float value;
};

// Kernel to perform sparse convolution
__global__ void sparseConvolutionKernel(const SparseEntry* __restrict__ input,
                                       const float* __restrict__ filter,
                                       float* __restrict__ output,
                                       int inputSize,
                                       int filterSize) {
    extern __shared__ float sharedFilter[];

    // Calculate the thread's position in the output matrix
    int outputRow = blockIdx.y * blockDim.y + threadIdx.y;
    int outputCol = blockIdx.x * blockDim.x + threadIdx.x;

    // Load filter into shared memory
    int filterIndex = threadIdx.y * blockDim.x + threadIdx.x;
    if (filterIndex < filterSize * filterSize) {
        sharedFilter[filterIndex] = filter[filterIndex];
    }
    __syncthreads();

    // Initialize output value
    float sum = 0.0f;

    // Iterate over all non-zero entries in the input matrix
    for (int i = 0; i < inputSize; ++i) {
        int inputRow = input[i].row;
        int inputCol = input[i].col;
        float inputValue = input[i].value;

        // Check if the input entry is within the convolution window
        if (inputRow >= outputRow && inputRow < outputRow + filterSize &&
            inputCol >= outputCol && inputCol < outputCol + filterSize) {
            int filterRow = inputRow - outputRow;
            int filterCol = inputCol - outputCol;
            int filterIndex = filterRow * filterSize + filterCol;
            sum += inputValue * sharedFilter[filterIndex];
        }
    }

    // Write the result to the output matrix
    if (outputRow < 512 && outputCol < 512) {
        output[outputRow * 512 + outputCol] = sum;
    }
}

int main() {
    // Example sparse input matrix
    SparseEntry input[] = {
        {0, 0, 1.0f}, {0, 1, 2.0f}, {1, 0, 3.0f}, {1, 1, 4.0f}
    };
    int inputSize = sizeof(input) / sizeof(SparseEntry);

    // Example filter matrix
    float filter[512 * 512];
    for (int i = 0; i < 512 * 512; ++i) {
        filter[i] = 0.1f; // Simple example filter
    }

    // Allocate memory on the device
    SparseEntry* d_input;
    float* d_filter;
    float* d_output;
    hipMalloc(&d_input, inputSize * sizeof(SparseEntry));
    hipMalloc(&d_filter, 512 * 512 * sizeof(float));
    hipMalloc(&d_output, 512 * 512 * sizeof(float));

    // Copy data to the device
    hipMemcpy(d_input, input, inputSize * sizeof(SparseEntry), hipMemcpyHostToDevice);
    hipMemcpy(d_filter, filter, 512 * 512 * sizeof(float), hipMemcpyHostToDevice);

    // Define block and grid dimensions
    dim3 blockSize(16, 16);
    dim3 gridSize(32, 32); // 512x512 / 16x16

    // Launch the kernel
    size_t sharedMemSize = 512 * 512 * sizeof(float);
    sparseConvolutionKernel<<<gridSize, blockSize, sharedMemSize>>>(d_input, d_filter, d_output, inputSize, 512);

    // Check for errors in kernel launch
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy the result back to the host
    float output[512 * 512];
    hipMemcpy(output, d_output, 512 * 512 * sizeof(float), hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_input);
    hipFree(d_filter);
    hipFree(d_output);

    // Print a small part of the output to verify
    for (int i = 0; i < 16; ++i) {
        for (int j = 0; j < 16; ++j) {
            std::cout << output[i * 512 + j] << " ";
        }
        std::cout << std::endl;
    }

    return 0;
}
	.text
	.file	"cuda_code_046969.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z38__device_stub__sparseConvolutionKernelPK11SparseEntryPKfPfii # -- Begin function _Z38__device_stub__sparseConvolutionKernelPK11SparseEntryPKfPfii
	.type	_Z38__device_stub__sparseConvolutionKernelPK11SparseEntryPKfPfii,@function
_Z38__device_stub__sparseConvolutionKernelPK11SparseEntryPKfPfii: # @_Z38__device_stub__sparseConvolutionKernelPK11SparseEntryPKfPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z38__device_stub__sparseConvolutionKernelPK11SparseEntryPKfPfii, .Lfunc_end0-_Z38__device_stub__sparseConvolutionKernelPK11SparseEntryPKfPfii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0                               # 0x0
	.long	0                               # 0x0
	.long	1065353216                      # 0x3f800000
	.long	0                               # 0x0
.LCPI1_1:
	.long	1                               # 0x1
	.long	1073741824                      # 0x40000000
	.long	1                               # 0x1
	.long	0                               # 0x0
.LCPI1_2:
	.long	1077936128                      # 0x40400000
	.long	1                               # 0x1
	.long	1                               # 0x1
	.long	1082130432                      # 0x40800000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$2097240, %rsp                  # imm = 0x200058
	.cfi_def_cfa_offset 2097280
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movaps	.LCPI1_0(%rip), %xmm0           # xmm0 = [0,0,1065353216,0]
	movaps	%xmm0, 32(%rsp)
	movaps	.LCPI1_1(%rip), %xmm0           # xmm0 = [1,1073741824,1,0]
	movaps	%xmm0, 48(%rsp)
	movaps	.LCPI1_2(%rip), %xmm0           # xmm0 = [1077936128,1,1,1082130432]
	movaps	%xmm0, 64(%rsp)
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1036831949, 80(%rsp,%rax,4)    # imm = 0x3DCCCCCD
	incq	%rax
	cmpq	$262144, %rax                   # imm = 0x40000
	jne	.LBB1_1
# %bb.2:
	leaq	24(%rsp), %rbx
	movl	$48, %esi
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r14
	movl	$1048576, %esi                  # imm = 0x100000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	callq	hipMalloc
	movq	(%rbx), %rdi
	leaq	32(%rsp), %rsi
	movl	$48, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	leaq	80(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$137438953504, %rdi             # imm = 0x2000000020
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1048576, %r8d                  # imm = 0x100000
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$4, %ecx
	movl	$512, %r8d                      # imm = 0x200
	callq	_Z38__device_stub__sparseConvolutionKernelPK11SparseEntryPKfPfii
.LBB1_4:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_9
# %bb.5:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_6
# %bb.7:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_8
.LBB1_9:
	movq	8(%rsp), %rsi
	leaq	1048656(%rsp), %rbx
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%r14d, %r14d
	movl	$_ZSt4cout, %r15d
.LBB1_10:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_11 Depth 2
	xorl	%r12d, %r12d
.LBB1_11:                               #   Parent Loop BB1_10 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r12,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r12
	cmpq	$16, %r12
	jne	.LBB1_11
# %bb.12:                               #   in Loop: Header=BB1_10 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r14
	addq	$2048, %rbx                     # imm = 0x800
	cmpq	$16, %r14
	jne	.LBB1_10
# %bb.13:
	xorl	%eax, %eax
	jmp	.LBB1_14
.LBB1_6:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_8:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB1_14:
	addq	$2097240, %rsp                  # imm = 0x200058
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii,@object # @_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii
	.section	.rodata,"a",@progbits
	.globl	_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii
	.p2align	3, 0x0
_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii:
	.quad	_Z38__device_stub__sparseConvolutionKernelPK11SparseEntryPKfPfii
	.size	_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" "
	.size	.L.str.1, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii"
	.size	.L__unnamed_1, 50

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z38__device_stub__sparseConvolutionKernelPK11SparseEntryPKfPfii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z23sparseConvolutionKernelPK11SparseEntryPKfPfii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii ; -- Begin function _Z23sparseConvolutionKernelPK11SparseEntryPKfPfii
	.globl	_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii
	.p2align	8
	.type	_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii,@function
_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii: ; @_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[6:7], s[0:1], 0x18
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_mul_i32 s4, s7, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u32_u24 v0, v2, s3, v3
	v_cmp_gt_u32_e32 vcc_lo, s4, v0
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b64 s[8:9], s[0:1], 0x8
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_load_b32 v1, v0, s[8:9]
	v_add_nc_u32_e32 v0, 0, v0
	s_waitcnt vmcnt(0)
	ds_store_b32 v0, v1
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s4
	s_load_b64 s[4:5], s[0:1], 0x10
	s_lshr_b32 s2, s2, 16
	s_cmp_lt_i32 s6, 1
	v_mad_u64_u32 v[0:1], null, s15, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s3, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_7
; %bb.3:                                ; %.lr.ph
	s_load_b64 s[0:1], s[0:1], 0x0
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, s7, v0
	v_add_nc_u32_e32 v4, s7, v1
	s_waitcnt lgkmcnt(0)
	s_add_u32 s8, s0, 4
	s_addc_u32 s9, s1, 0
.LBB0_4:                                ; =>This Inner Loop Header: Depth=1
	s_add_u32 s0, s8, -4
	s_addc_u32 s1, s9, -1
	s_load_b64 s[10:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s10, v0
	v_cmp_ge_i32_e64 s0, s11, v1
	v_cmp_lt_i32_e64 s1, s10, v3
	v_cmp_lt_i32_e64 s2, s11, v4
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	v_sub_nc_u32_e32 v8, s10, v0
	v_sub_nc_u32_e32 v5, s11, v1
	s_load_b32 s1, s[8:9], 0x4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v8, s7, v[5:6]
	v_lshl_add_u32 v5, v6, 2, 0
	ds_load_b32 v5, v5
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v2, s1, v5
.LBB0_6:                                ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s6, s6, -1
	s_add_u32 s8, s8, 12
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc0 .LBB0_4
	s_branch .LBB0_8
.LBB0_7:
	v_mov_b32_e32 v2, 0
.LBB0_8:                                ; %Flow75
	v_max_i32_e32 v3, v0, v1
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0x200, v3
	s_cbranch_execz .LBB0_10
; %bb.9:
	v_lshl_add_u32 v0, v0, 9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23sparseConvolutionKernelPK11SparseEntryPKfPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii, .Lfunc_end0-_Z23sparseConvolutionKernelPK11SparseEntryPKfPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 456
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .actual_access:  read_only
        .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  write_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23sparseConvolutionKernelPK11SparseEntryPKfPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z23sparseConvolutionKernelPK11SparseEntryPKfPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
