#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>

namespace cg = cooperative_groups;

// Define the structure for a B-tree node
struct BTreeNode {
    int keys[10]; // Assuming a max degree of 10 for simplicity
    int children[11]; // Pointers to children
    int n; // Number of keys in this node
};

// Kernel function to initialize B-tree nodes
__global__ void initBTreeNodes(BTreeNode* nodes, int numNodes) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < numNodes) {
        // Initialize each node with default values
        BTreeNode node;
        node.n = 0;
        for (int i = 0; i < 10; ++i) {
            node.keys[i] = 0;
            node.children[i] = -1;
        }
        node.children[10] = -1;
        nodes[idx] = node;
    }
}

// Kernel function to insert a key into the B-tree node
__global__ void insertKey(BTreeNode* nodes, int numNodes, int key, int nodeIdx) {
    cg::grid_group grid = cg::this_grid();
    if (nodeIdx >= numNodes) return;

    // Load the node into shared memory for better coalesced access
    __shared__ BTreeNode s_node;
    if (threadIdx.x == 0) {
        s_node = nodes[nodeIdx];
    }
    cg::sync(grid);

    // Insert the key into the node
    if (s_node.n < 10) {
        int i = s_node.n - 1;
        while (i >= 0 && s_node.keys[i] > key) {
            s_node.keys[i + 1] = s_node.keys[i];
            i--;
        }
        s_node.keys[i + 1] = key;
        s_node.n++;
    }

    // Write the updated node back to global memory
    if (threadIdx.x == 0) {
        nodes[nodeIdx] = s_node;
    }
}

int main() {
    const int numNodes = 512;
    BTreeNode* d_nodes;

    // Allocate memory on the device
    cudaError_t err = cudaMalloc(&d_nodes, numNodes * sizeof(BTreeNode));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate memory on device: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Initialize nodes on the device
    int blockSize = 256;
    int numBlocks = (numNodes + blockSize - 1) / blockSize;
    initBTreeNodes<<<numBlocks, blockSize>>>(d_nodes, numNodes);
    err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Kernel execution failed: " << cudaGetErrorString(err) << std::endl;
        cudaFree(d_nodes);
        return -1;
    }
    cudaDeviceSynchronize();

    // Insert keys into the B-tree
    int key = 42;
    int nodeIdx = 0;
    insertKey<<<1, 1>>>(d_nodes, numNodes, key, nodeIdx);
    err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Kernel execution failed: " << cudaGetErrorString(err) << std::endl;
        cudaFree(d_nodes);
        return -1;
    }
    cudaDeviceSynchronize();

    // Free device memory
    cudaFree(d_nodes);

    std::cout << "B-tree operations completed successfully." << std::endl;
    return 0;
}
	.file	"tmpxft_0007327c_00000000-6_cuda_code_007101.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6835:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6835:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z44__device_stub__Z14initBTreeNodesP9BTreeNodeiP9BTreeNodei
	.type	_Z44__device_stub__Z14initBTreeNodesP9BTreeNodeiP9BTreeNodei, @function
_Z44__device_stub__Z14initBTreeNodesP9BTreeNodeiP9BTreeNodei:
.LFB6857:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14initBTreeNodesP9BTreeNodei(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6857:
	.size	_Z44__device_stub__Z14initBTreeNodesP9BTreeNodeiP9BTreeNodei, .-_Z44__device_stub__Z14initBTreeNodesP9BTreeNodeiP9BTreeNodei
	.globl	_Z14initBTreeNodesP9BTreeNodei
	.type	_Z14initBTreeNodesP9BTreeNodei, @function
_Z14initBTreeNodesP9BTreeNodei:
.LFB6858:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z14initBTreeNodesP9BTreeNodeiP9BTreeNodei
	.cfi_endproc
.LFE6858:
	.size	_Z14initBTreeNodesP9BTreeNodei, .-_Z14initBTreeNodesP9BTreeNodei
	.globl	_Z40__device_stub__Z9insertKeyP9BTreeNodeiiiP9BTreeNodeiii
	.type	_Z40__device_stub__Z9insertKeyP9BTreeNodeiiiP9BTreeNodeiii, @function
_Z40__device_stub__Z9insertKeyP9BTreeNodeiiiP9BTreeNodeiii:
.LFB6859:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9insertKeyP9BTreeNodeiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6859:
	.size	_Z40__device_stub__Z9insertKeyP9BTreeNodeiiiP9BTreeNodeiii, .-_Z40__device_stub__Z9insertKeyP9BTreeNodeiiiP9BTreeNodeiii
	.globl	_Z9insertKeyP9BTreeNodeiii
	.type	_Z9insertKeyP9BTreeNodeiii, @function
_Z9insertKeyP9BTreeNodeiii:
.LFB6860:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z9insertKeyP9BTreeNodeiiiP9BTreeNodeiii
	.cfi_endproc
.LFE6860:
	.size	_Z9insertKeyP9BTreeNodeiii, .-_Z9insertKeyP9BTreeNodeiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Failed to allocate memory on device: "
.LC1:
	.string	"Kernel execution failed: "
.LC2:
	.string	"B-tree operations completed successfully."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6832:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$45056, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L14
	movl	%eax, %ebx
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L15
.L14:
	movl	$16777217, %edx
	movl	$2147483649, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	8(%rsp), %rdi
	movl	$512, %esi
	call	_Z44__device_stub__Z14initBTreeNodesP9BTreeNodeiP9BTreeNodei
.L16:
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L17
.L23:
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
.L15:
	orl	$-1, %eax
	jmp	.L13
.L17:
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movl	$1, 36(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 28(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	8(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	$42, %edx
	movl	$512, %esi
	call	_Z40__device_stub__Z9insertKeyP9BTreeNodeiiiP9BTreeNodeiii
.L19:
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L23
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	xorl	%eax, %eax
.L13:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6832:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z9insertKeyP9BTreeNodeiii"
.LC4:
	.string	"_Z14initBTreeNodesP9BTreeNodei"
.LC5:
	.string	"_ZN50_INTERNAL_e8441901_19_cuda_code_007101_cu_ce54a41a4cuda3std3__419piecewise_constructE"
.LC6:
	.string	"_ZN50_INTERNAL_e8441901_19_cuda_code_007101_cu_ce54a41a4cuda3std6ranges3__45__cpo4swapE"
.LC7:
	.string	"_ZN50_INTERNAL_e8441901_19_cuda_code_007101_cu_ce54a41a4cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6862:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9insertKeyP9BTreeNodeiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14initBTreeNodesP9BTreeNodei(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6862:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>

namespace cg = cooperative_groups;

// Define the structure for a B-tree node
struct BTreeNode {
    int keys[10]; // Assuming a max degree of 10 for simplicity
    int children[11]; // Pointers to children
    int n; // Number of keys in this node
};

// Kernel function to initialize B-tree nodes
__global__ void initBTreeNodes(BTreeNode* nodes, int numNodes) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < numNodes) {
        // Initialize each node with default values
        BTreeNode node;
        node.n = 0;
        for (int i = 0; i < 10; ++i) {
            node.keys[i] = 0;
            node.children[i] = -1;
        }
        node.children[10] = -1;
        nodes[idx] = node;
    }
}

// Kernel function to insert a key into the B-tree node
__global__ void insertKey(BTreeNode* nodes, int numNodes, int key, int nodeIdx) {
    cg::grid_group grid = cg::this_grid();
    if (nodeIdx >= numNodes) return;

    // Load the node into shared memory for better coalesced access
    __shared__ BTreeNode s_node;
    if (threadIdx.x == 0) {
        s_node = nodes[nodeIdx];
    }
    cg::sync(grid);

    // Insert the key into the node
    if (s_node.n < 10) {
        int i = s_node.n - 1;
        while (i >= 0 && s_node.keys[i] > key) {
            s_node.keys[i + 1] = s_node.keys[i];
            i--;
        }
        s_node.keys[i + 1] = key;
        s_node.n++;
    }

    // Write the updated node back to global memory
    if (threadIdx.x == 0) {
        nodes[nodeIdx] = s_node;
    }
}

int main() {
    const int numNodes = 512;
    BTreeNode* d_nodes;

    // Allocate memory on the device
    hipError_t err = hipMalloc(&d_nodes, numNodes * sizeof(BTreeNode));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate memory on device: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Initialize nodes on the device
    int blockSize = 256;
    int numBlocks = (numNodes + blockSize - 1) / blockSize;
    initBTreeNodes<<<numBlocks, blockSize>>>(d_nodes, numNodes);
    err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Kernel execution failed: " << hipGetErrorString(err) << std::endl;
        hipFree(d_nodes);
        return -1;
    }
    hipDeviceSynchronize();

    // Insert keys into the B-tree
    int key = 42;
    int nodeIdx = 0;
    insertKey<<<1, 1>>>(d_nodes, numNodes, key, nodeIdx);
    err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Kernel execution failed: " << hipGetErrorString(err) << std::endl;
        hipFree(d_nodes);
        return -1;
    }
    hipDeviceSynchronize();

    // Free device memory
    hipFree(d_nodes);

    std::cout << "B-tree operations completed successfully." << std::endl;
    return 0;
}
	.text
	.file	"cuda_code_007101.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z29__device_stub__initBTreeNodesP9BTreeNodei # -- Begin function _Z29__device_stub__initBTreeNodesP9BTreeNodei
	.type	_Z29__device_stub__initBTreeNodesP9BTreeNodei,@function
_Z29__device_stub__initBTreeNodesP9BTreeNodei: # @_Z29__device_stub__initBTreeNodesP9BTreeNodei
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14initBTreeNodesP9BTreeNodei, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__initBTreeNodesP9BTreeNodei, .Lfunc_end0-_Z29__device_stub__initBTreeNodesP9BTreeNodei
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__insertKeyP9BTreeNodeiii # -- Begin function _Z24__device_stub__insertKeyP9BTreeNodeiii
	.type	_Z24__device_stub__insertKeyP9BTreeNodeiii,@function
_Z24__device_stub__insertKeyP9BTreeNodeiii: # @_Z24__device_stub__insertKeyP9BTreeNodeiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9insertKeyP9BTreeNodeiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__insertKeyP9BTreeNodeiii, .Lfunc_end1-_Z24__device_stub__insertKeyP9BTreeNodeiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	movq	%rsp, %rdi
	movl	$45056, %esi                    # imm = 0xB000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB2_3
# %bb.1:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$37, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB2_7
# %bb.2:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_8
.LBB2_3:
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	leaq	1(%rbx), %rdi
	leaq	255(%rbx), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_5
# %bb.4:
	movq	(%rsp), %rdi
	movl	$512, %esi                      # imm = 0x200
	callq	_Z29__device_stub__initBTreeNodesP9BTreeNodei
.LBB2_5:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB2_9
# %bb.6:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	movl	$25, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	jmp	.LBB2_13
.LBB2_7:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_8:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	jmp	.LBB2_17
.LBB2_9:
	callq	hipDeviceSynchronize
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_11
# %bb.10:
	movq	(%rsp), %rdi
	movl	$512, %esi                      # imm = 0x200
	movl	$42, %edx
	xorl	%ecx, %ecx
	callq	_Z24__device_stub__insertKeyP9BTreeNodeiii
.LBB2_11:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB2_19
# %bb.12:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	movl	$25, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
.LBB2_13:
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB2_15
# %bb.14:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_16
.LBB2_15:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_16:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit27
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rdi
	callq	hipFree
.LBB2_17:
	movl	$-1, %eax
.LBB2_18:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_19:
	.cfi_def_cfa_offset 32
	callq	hipDeviceSynchronize
	movq	(%rsp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$41, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	jmp	.LBB2_18
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14initBTreeNodesP9BTreeNodei, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9insertKeyP9BTreeNodeiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14initBTreeNodesP9BTreeNodei,@object # @_Z14initBTreeNodesP9BTreeNodei
	.section	.rodata,"a",@progbits
	.globl	_Z14initBTreeNodesP9BTreeNodei
	.p2align	3, 0x0
_Z14initBTreeNodesP9BTreeNodei:
	.quad	_Z29__device_stub__initBTreeNodesP9BTreeNodei
	.size	_Z14initBTreeNodesP9BTreeNodei, 8

	.type	_Z9insertKeyP9BTreeNodeiii,@object # @_Z9insertKeyP9BTreeNodeiii
	.globl	_Z9insertKeyP9BTreeNodeiii
	.p2align	3, 0x0
_Z9insertKeyP9BTreeNodeiii:
	.quad	_Z24__device_stub__insertKeyP9BTreeNodeiii
	.size	_Z9insertKeyP9BTreeNodeiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to allocate memory on device: "
	.size	.L.str, 38

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Kernel execution failed: "
	.size	.L.str.1, 26

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"B-tree operations completed successfully."
	.size	.L.str.2, 42

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14initBTreeNodesP9BTreeNodei"
	.size	.L__unnamed_1, 31

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9insertKeyP9BTreeNodeiii"
	.size	.L__unnamed_2, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__initBTreeNodesP9BTreeNodei
	.addrsig_sym _Z24__device_stub__insertKeyP9BTreeNodeiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14initBTreeNodesP9BTreeNodei
	.addrsig_sym _Z9insertKeyP9BTreeNodeiii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14initBTreeNodesP9BTreeNodei ; -- Begin function _Z14initBTreeNodesP9BTreeNodei
	.globl	_Z14initBTreeNodesP9BTreeNodei
	.p2align	8
	.type	_Z14initBTreeNodesP9BTreeNodei,@function
_Z14initBTreeNodesP9BTreeNodei:         ; @_Z14initBTreeNodesP9BTreeNodei
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_4
; %bb.1:
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v2, -1
	s_mov_b32 s2, 0
	scratch_store_b32 off, v0, off offset:88
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e64 v3, s2, 4
	s_add_i32 s3, s2, 4
	s_add_i32 s2, s2, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s2, 40
	v_add_nc_u32_e32 v3, 40, v3
	s_clause 0x1
	scratch_store_b32 off, v0, s3
	scratch_store_b32 v3, v2, off
	s_cbranch_scc0 .LBB0_2
; %bb.3:
	v_mov_b32_e32 v0, -1
	s_clause 0x3
	scratch_load_b128 v[2:5], off, off offset:4
	scratch_load_b128 v[6:9], off, off offset:20
	scratch_load_b128 v[10:13], off, off offset:36
	scratch_load_b128 v[14:17], off, off offset:52
	s_load_b64 s[0:1], s[0:1], 0x0
	scratch_store_b32 off, v0, off offset:84
	s_clause 0x1
	scratch_load_b128 v[18:21], off, off offset:68
	scratch_load_b128 v[22:25], off, off offset:76
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[26:27], null, 0x58, v1, s[0:1]
	s_waitcnt vmcnt(5)
	global_store_b128 v[26:27], v[2:5], off
	s_waitcnt vmcnt(4)
	global_store_b128 v[26:27], v[6:9], off offset:16
	s_waitcnt vmcnt(3)
	global_store_b128 v[26:27], v[10:13], off offset:32
	s_waitcnt vmcnt(2)
	global_store_b128 v[26:27], v[14:17], off offset:48
	s_waitcnt vmcnt(1)
	global_store_b128 v[26:27], v[18:21], off offset:64
	s_waitcnt vmcnt(0)
	global_store_b128 v[26:27], v[22:25], off offset:72
.LBB0_4:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14initBTreeNodesP9BTreeNodei
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 92
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 28
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14initBTreeNodesP9BTreeNodei, .Lfunc_end0-_Z14initBTreeNodesP9BTreeNodei
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 300
; NumSgprs: 16
; NumVgprs: 28
; ScratchSize: 92
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 28
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9insertKeyP9BTreeNodeiii ; -- Begin function _Z9insertKeyP9BTreeNodeiii
	.globl	_Z9insertKeyP9BTreeNodeiii
	.p2align	8
	.type	_Z9insertKeyP9BTreeNodeiii,@function
_Z9insertKeyP9BTreeNodeiii:             ; @_Z9insertKeyP9BTreeNodeiii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s6, s4
	s_cbranch_scc1 .LBB1_24
; %bb.1:
	s_load_b64 s[8:9], s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	s_mul_hi_i32 s3, s6, 0x58
	s_mul_i32 s4, s6, 0x58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s2, 0, v1
	s_and_saveexec_b32 s6, s2
	s_cbranch_execz .LBB1_3
; %bb.2:
	v_mov_b32_e32 v26, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s10, s8, s4
	s_addc_u32 s11, s9, s3
	s_clause 0x5
	global_load_b128 v[2:5], v26, s[10:11] offset:72
	global_load_b128 v[6:9], v26, s[10:11] offset:64
	global_load_b128 v[10:13], v26, s[10:11] offset:48
	global_load_b128 v[14:17], v26, s[10:11] offset:32
	global_load_b128 v[18:21], v26, s[10:11] offset:16
	global_load_b128 v[22:25], v26, s[10:11]
	s_waitcnt vmcnt(5)
	ds_store_2addr_b64 v26, v[2:3], v[4:5] offset0:9 offset1:10
	s_waitcnt vmcnt(4)
	ds_store_b128 v26, v[6:9] offset:64
	s_waitcnt vmcnt(3)
	ds_store_b128 v26, v[10:13] offset:48
	s_waitcnt vmcnt(2)
	ds_store_b128 v26, v[14:17] offset:32
	s_waitcnt vmcnt(1)
	ds_store_b128 v26, v[18:21] offset:16
	s_waitcnt vmcnt(0)
	ds_store_b128 v26, v[22:25]
.LBB1_3:
	s_or_b32 exec_lo, exec_lo, s6
	v_bfe_u32 v2, v0, 20, 10
	v_bfe_u32 v0, v0, 10, 10
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_barrier
	v_or3_b32 v0, v0, v2, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_13
; %bb.4:
	s_load_b64 s[0:1], s[0:1], 0x70
	s_mov_b32 s11, exec_lo
	s_mov_b32 s10, exec_lo
	v_mbcnt_lo_u32_b32 v0, s11, 0
                                        ; implicit-def: $vgpr1
	s_waitcnt lgkmcnt(0)
	s_load_b32 s7, s[0:1], 0x28
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_6
; %bb.5:
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, s11
	global_atomic_add_u32 v1, v1, v2, s[0:1] offset:32 glc
.LBB1_6:
	s_or_b32 exec_lo, exec_lo, s10
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s10, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, s10, v0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s10, s7, -1
	v_and_b32_e32 v1, 0xffff, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s10, v1
	s_and_saveexec_b32 s10, vcc_lo
	s_xor_b32 s10, exec_lo, s10
	s_cbranch_execz .LBB1_10
; %bb.7:                                ; %.preheader.i.i.i.i.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b32 s11, 0
.LBB1_8:                                ; %.preheader.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_load_b32 v2, v1, s[0:1] offset:32 glc
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v2, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_u32_e32 vcc_lo, 0xffff, v2
	s_or_b32 s11, vcc_lo, s11
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB1_8
; %bb.9:                                ; %Flow45
	s_or_b32 exec_lo, exec_lo, s11
.LBB1_10:                               ; %Flow47
	s_and_not1_saveexec_b32 s10, s10
	s_cbranch_execz .LBB1_13
; %bb.11:
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s10, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s11, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s11
	s_cbranch_execz .LBB1_13
; %bb.12:
	s_sub_i32 s7, 0x10000, s7
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s7, s10
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s7
	global_atomic_add_u32 v0, v1, s[0:1] offset:32
.LBB1_13:                               ; %Flow49
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v0, 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	ds_load_b32 v0, v0 offset:84
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, 9, v0
	v_readfirstlane_b32 s0, v0
	s_cbranch_vccnz .LBB1_22
; %bb.14:                               ; %.preheader
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lt_i32 s0, 1
	s_cbranch_scc1 .LBB1_20
; %bb.15:                               ; %.lr.ph.preheader
	s_lshl_b32 s1, s0, 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s1, s1, -4
.LBB1_16:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v0, s1
	ds_load_b32 v0, v0
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s5, v0
	s_cbranch_vccnz .LBB1_18
; %bb.17:                               ;   in Loop: Header=BB1_16 Depth=1
	s_add_i32 s10, s0, -1
	v_mov_b32_e32 v1, s1
	s_add_i32 s1, s1, -4
	s_cmp_lt_u32 s0, 2
	s_mov_b32 s6, 0
	s_cselect_b32 s7, -1, 0
	s_mov_b32 s0, s10
	ds_store_b32 v1, v0 offset:4
	s_branch .LBB1_19
.LBB1_18:                               ;   in Loop: Header=BB1_16 Depth=1
	s_mov_b32 s6, s0
	s_mov_b32 s7, -1
                                        ; implicit-def: $sgpr0
                                        ; implicit-def: $sgpr1
.LBB1_19:                               ; %Flow41
                                        ;   in Loop: Header=BB1_16 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB1_16
	s_branch .LBB1_21
.LBB1_20:
	s_mov_b32 s6, s0
.LBB1_21:                               ; %.critedge
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s0, s6, 2
	v_mov_b32_e32 v2, 0
	v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s5
	ds_store_b32 v0, v1
	ds_load_b32 v0, v2 offset:84
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	ds_store_b32 v2, v0 offset:84
.LBB1_22:
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB1_24
; %bb.23:
	v_mov_b32_e32 v24, 0
	s_add_u32 s0, s8, s4
	s_addc_u32 s1, s9, s3
	ds_load_2addr_b64 v[0:3], v24 offset0:9 offset1:10
	ds_load_b128 v[4:7], v24 offset:64
	ds_load_b128 v[8:11], v24 offset:48
	ds_load_b128 v[12:15], v24 offset:32
	ds_load_b128 v[16:19], v24 offset:16
	ds_load_b128 v[20:23], v24
	s_waitcnt lgkmcnt(5)
	global_store_b128 v24, v[0:3], s[0:1] offset:72
	s_waitcnt lgkmcnt(4)
	global_store_b128 v24, v[4:7], s[0:1] offset:64
	s_waitcnt lgkmcnt(3)
	global_store_b128 v24, v[8:11], s[0:1] offset:48
	s_waitcnt lgkmcnt(2)
	global_store_b128 v24, v[12:15], s[0:1] offset:32
	s_waitcnt lgkmcnt(1)
	global_store_b128 v24, v[16:19], s[0:1] offset:16
	s_waitcnt lgkmcnt(0)
	global_store_b128 v24, v[20:23], s[0:1]
.LBB1_24:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9insertKeyP9BTreeNodeiii
		.amdhsa_group_segment_fixed_size 88
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 27
		.amdhsa_next_free_sgpr 12
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9insertKeyP9BTreeNodeiii, .Lfunc_end1-_Z9insertKeyP9BTreeNodeiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 908
; NumSgprs: 14
; NumVgprs: 27
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 88 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 14
; NumVGPRsForWavesPerEU: 27
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14initBTreeNodesP9BTreeNodei
    .private_segment_fixed_size: 92
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z14initBTreeNodesP9BTreeNodei.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     28
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         112
        .size:           8
        .value_kind:     hidden_multigrid_sync_arg
    .group_segment_fixed_size: 88
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9insertKeyP9BTreeNodeiii
    .private_segment_fixed_size: 0
    .sgpr_count:     14
    .sgpr_spill_count: 0
    .symbol:         _Z9insertKeyP9BTreeNodeiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     27
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
