#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>

#define N 4096
#define DT 0.001f
#define G 6.67430e-11f

__global__ void leapfrog_kernel(float4 *pos, float4 *vel, float4 *acc, float4 *new_acc, float mass, int n) {
    extern __shared__ float4 shared_pos[];

    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= n) return;

    // Load position data into shared memory
    shared_pos[threadIdx.x] = pos[idx];
    __syncthreads();

    // Calculate new acceleration
    float4 new_acc_val = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    for (int j = 0; j < blockDim.x; ++j) {
        if (j != threadIdx.x) {
            float4 r_ji = make_float4(shared_pos[j].x - shared_pos[threadIdx.x].x,
                                     shared_pos[j].y - shared_pos[threadIdx.x].y,
                                     shared_pos[j].z - shared_pos[threadIdx.x].z,
                                     0.0f);
            float dist_sq = r_ji.x * r_ji.x + r_ji.y * r_ji.y + r_ji.z * r_ji.z;
            float dist_inv = rsqrtf(dist_sq);
            float dist_inv3 = dist_inv * dist_inv * dist_inv;
            float force = G * mass * mass * dist_inv3;
            new_acc_val.x += force * r_ji.x;
            new_acc_val.y += force * r_ji.y;
            new_acc_val.z += force * r_ji.z;
        }
    }
    __syncthreads();

    // Store new acceleration
    new_acc[idx] = new_acc_val;
    __syncthreads();

    // Update velocity and position
    vel[idx].x += 0.5f * DT * (acc[idx].x + new_acc_val.x);
    vel[idx].y += 0.5f * DT * (acc[idx].y + new_acc_val.y);
    vel[idx].z += 0.5f * DT * (acc[idx].z + new_acc_val.z);

    pos[idx].x += DT * vel[idx].x;
    pos[idx].y += DT * vel[idx].y;
    pos[idx].z += DT * vel[idx].z;
}

int main() {
    float4 *d_pos, *d_vel, *d_acc, *d_new_acc;
    float4 *h_pos, *h_vel, *h_acc, *h_new_acc;
    float mass = 1.0f;
    int blockSize = 256;
    int numBlocks = (N + blockSize - 1) / blockSize;

    // Allocate host memory
    h_pos = (float4 *)malloc(N * sizeof(float4));
    h_vel = (float4 *)malloc(N * sizeof(float4));
    h_acc = (float4 *)malloc(N * sizeof(float4));
    h_new_acc = (float4 *)malloc(N * sizeof(float4));

    // Initialize host data
    curandGenerator_t gen;
    curandCreateGenerator(&gen, CURAND_RNG_PSEUDO_DEFAULT);
    curandSetPseudoRandomGeneratorSeed(gen, 1234ULL);
    curandGenerateUniform(gen, (float *)h_pos, 4 * N);
    curandGenerateUniform(gen, (float *)h_vel, 4 * N);
    curandDestroyGenerator(gen);

    for (int i = 0; i < N; ++i) {
        h_acc[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    }

    // Allocate device memory
    cudaMalloc((void **)&d_pos, N * sizeof(float4));
    cudaMalloc((void **)&d_vel, N * sizeof(float4));
    cudaMalloc((void **)&d_acc, N * sizeof(float4));
    cudaMalloc((void **)&d_new_acc, N * sizeof(float4));

    // Copy data from host to device
    cudaMemcpy(d_pos, h_pos, N * sizeof(float4), cudaMemcpyHostToDevice);
    cudaMemcpy(d_vel, h_vel, N * sizeof(float4), cudaMemcpyHostToDevice);
    cudaMemcpy(d_acc, h_acc, N * sizeof(float4), cudaMemcpyHostToDevice);

    // Launch kernel
    leapfrog_kernel<<<numBlocks, blockSize, blockSize * sizeof(float4)>>>(d_pos, d_vel, d_acc, d_new_acc, mass, N);
    cudaDeviceSynchronize();

    // Check for errors
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy data from device to host
    cudaMemcpy(h_pos, d_pos, N * sizeof(float4), cudaMemcpyDeviceToHost);
    cudaMemcpy(h_vel, d_vel, N * sizeof(float4), cudaMemcpyDeviceToHost);
    cudaMemcpy(h_acc, d_acc, N * sizeof(float4), cudaMemcpyDeviceToHost);
    cudaMemcpy(h_new_acc, d_new_acc, N * sizeof(float4), cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_pos);
    cudaFree(d_vel);
    cudaFree(d_acc);
    cudaFree(d_new_acc);

    // Free host memory
    free(h_pos);
    free(h_vel);
    free(h_acc);
    free(h_new_acc);

    return 0;
}
	.file	"tmpxft_0017fced_00000000-6_cuda_code_007290.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3852:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3852:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z52__device_stub__Z15leapfrog_kernelP6float4S0_S0_S0_fiP6float4S0_S0_S0_fi
	.type	_Z52__device_stub__Z15leapfrog_kernelP6float4S0_S0_S0_fiP6float4S0_S0_S0_fi, @function
_Z52__device_stub__Z15leapfrog_kernelP6float4S0_S0_S0_fiP6float4S0_S0_S0_fi:
.LFB3874:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15leapfrog_kernelP6float4S0_S0_S0_fi(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3874:
	.size	_Z52__device_stub__Z15leapfrog_kernelP6float4S0_S0_S0_fiP6float4S0_S0_S0_fi, .-_Z52__device_stub__Z15leapfrog_kernelP6float4S0_S0_S0_fiP6float4S0_S0_S0_fi
	.globl	_Z15leapfrog_kernelP6float4S0_S0_S0_fi
	.type	_Z15leapfrog_kernelP6float4S0_S0_S0_fi, @function
_Z15leapfrog_kernelP6float4S0_S0_S0_fi:
.LFB3875:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z15leapfrog_kernelP6float4S0_S0_S0_fiP6float4S0_S0_S0_fi
	.cfi_endproc
.LFE3875:
	.size	_Z15leapfrog_kernelP6float4S0_S0_S0_fi, .-_Z15leapfrog_kernelP6float4S0_S0_S0_fi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"CUDA error: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3849:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$65536, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$65536, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$65536, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$65536, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	leaq	40(%rsp), %rdi
	movl	$100, %esi
	movq	%rax, %r13
	call	curandCreateGenerator@PLT
	movq	40(%rsp), %rdi
	movl	$1234, %esi
	call	curandSetPseudoRandomGeneratorSeed@PLT
	movq	40(%rsp), %rdi
	movl	$16384, %edx
	movq	%r12, %rsi
	call	curandGenerateUniform@PLT
	movq	40(%rsp), %rdi
	movl	$16384, %edx
	movq	%rbp, %rsi
	call	curandGenerateUniform@PLT
	movq	40(%rsp), %rdi
	call	curandDestroyGenerator@PLT
	movq	%rbx, %rax
	leaq	65536(%rbx), %rdx
.L9:
	movl	$0x00000000, (%rax)
	addq	$16, %rax
	movl	$0x00000000, -12(%rax)
	movl	$0x00000000, -8(%rax)
	movl	$0x00000000, -4(%rax)
	cmpq	%rdx, %rax
	jne	.L9
	leaq	8(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	movl	$268435457, %edi
	xorl	%r9d, %r9d
	salq	$8, %rdx
	salq	$4, %rdi
	movl	$4096, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rdx
	movl	$4096, %r8d
	movss	.LC1(%rip), %xmm0
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z52__device_stub__Z15leapfrog_kernelP6float4S0_S0_S0_fiP6float4S0_S0_S0_fi
.L10:
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %r14d
	testl	%eax, %eax
	je	.L11
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L8
.L11:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$65536, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	xorl	%eax, %eax
.L8:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3849:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z15leapfrog_kernelP6float4S0_S0_S0_fi"
.LC4:
	.string	"precalc_xorwow_matrix"
.LC5:
	.string	"precalc_xorwow_offset_matrix"
.LC6:
	.string	"mrg32k3aM1"
.LC7:
	.string	"mrg32k3aM2"
.LC8:
	.string	"mrg32k3aM1SubSeq"
.LC9:
	.string	"mrg32k3aM2SubSeq"
.LC10:
	.string	"mrg32k3aM1Seq"
.LC11:
	.string	"mrg32k3aM2Seq"
.LC12:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3877:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15leapfrog_kernelP6float4S0_S0_S0_fi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3877:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>

#define N 4096
#define DT 0.001f
#define G 6.67430e-11f

__global__ void leapfrog_kernel(float4 *pos, float4 *vel, float4 *acc, float4 *new_acc, float mass, int n) {
    extern __shared__ float4 shared_pos[];

    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= n) return;

    // Load position data into shared memory
    shared_pos[threadIdx.x] = pos[idx];
    __syncthreads();

    // Calculate new acceleration
    float4 new_acc_val = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    for (int j = 0; j < blockDim.x; ++j) {
        if (j != threadIdx.x) {
            float4 r_ji = make_float4(shared_pos[j].x - shared_pos[threadIdx.x].x,
                                     shared_pos[j].y - shared_pos[threadIdx.x].y,
                                     shared_pos[j].z - shared_pos[threadIdx.x].z,
                                     0.0f);
            float dist_sq = r_ji.x * r_ji.x + r_ji.y * r_ji.y + r_ji.z * r_ji.z;
            float dist_inv = rsqrtf(dist_sq);
            float dist_inv3 = dist_inv * dist_inv * dist_inv;
            float force = G * mass * mass * dist_inv3;
            new_acc_val.x += force * r_ji.x;
            new_acc_val.y += force * r_ji.y;
            new_acc_val.z += force * r_ji.z;
        }
    }
    __syncthreads();

    // Store new acceleration
    new_acc[idx] = new_acc_val;
    __syncthreads();

    // Update velocity and position
    vel[idx].x += 0.5f * DT * (acc[idx].x + new_acc_val.x);
    vel[idx].y += 0.5f * DT * (acc[idx].y + new_acc_val.y);
    vel[idx].z += 0.5f * DT * (acc[idx].z + new_acc_val.z);

    pos[idx].x += DT * vel[idx].x;
    pos[idx].y += DT * vel[idx].y;
    pos[idx].z += DT * vel[idx].z;
}

int main() {
    float4 *d_pos, *d_vel, *d_acc, *d_new_acc;
    float4 *h_pos, *h_vel, *h_acc, *h_new_acc;
    float mass = 1.0f;
    int blockSize = 256;
    int numBlocks = (N + blockSize - 1) / blockSize;

    // Allocate host memory
    h_pos = (float4 *)malloc(N * sizeof(float4));
    h_vel = (float4 *)malloc(N * sizeof(float4));
    h_acc = (float4 *)malloc(N * sizeof(float4));
    h_new_acc = (float4 *)malloc(N * sizeof(float4));

    // Initialize host data
    hiprandGenerator_t gen;
    hiprandCreateGenerator(&gen, HIPRAND_RNG_PSEUDO_DEFAULT);
    hiprandSetPseudoRandomGeneratorSeed(gen, 1234ULL);
    hiprandGenerateUniform(gen, (float *)h_pos, 4 * N);
    hiprandGenerateUniform(gen, (float *)h_vel, 4 * N);
    hiprandDestroyGenerator(gen);

    for (int i = 0; i < N; ++i) {
        h_acc[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    }

    // Allocate device memory
    hipMalloc((void **)&d_pos, N * sizeof(float4));
    hipMalloc((void **)&d_vel, N * sizeof(float4));
    hipMalloc((void **)&d_acc, N * sizeof(float4));
    hipMalloc((void **)&d_new_acc, N * sizeof(float4));

    // Copy data from host to device
    hipMemcpy(d_pos, h_pos, N * sizeof(float4), hipMemcpyHostToDevice);
    hipMemcpy(d_vel, h_vel, N * sizeof(float4), hipMemcpyHostToDevice);
    hipMemcpy(d_acc, h_acc, N * sizeof(float4), hipMemcpyHostToDevice);

    // Launch kernel
    leapfrog_kernel<<<numBlocks, blockSize, blockSize * sizeof(float4)>>>(d_pos, d_vel, d_acc, d_new_acc, mass, N);
    hipDeviceSynchronize();

    // Check for errors
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy data from device to host
    hipMemcpy(h_pos, d_pos, N * sizeof(float4), hipMemcpyDeviceToHost);
    hipMemcpy(h_vel, d_vel, N * sizeof(float4), hipMemcpyDeviceToHost);
    hipMemcpy(h_acc, d_acc, N * sizeof(float4), hipMemcpyDeviceToHost);
    hipMemcpy(h_new_acc, d_new_acc, N * sizeof(float4), hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_pos);
    hipFree(d_vel);
    hipFree(d_acc);
    hipFree(d_new_acc);

    // Free host memory
    free(h_pos);
    free(h_vel);
    free(h_acc);
    free(h_new_acc);

    return 0;
}
	.text
	.file	"cuda_code_007290.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z30__device_stub__leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi # -- Begin function _Z30__device_stub__leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
	.type	_Z30__device_stub__leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi,@function
_Z30__device_stub__leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi: # @_Z30__device_stub__leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	8(%rsp), %r9
	movl	%r8d, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r9, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi, .Lfunc_end0-_Z30__device_stub__leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, %rbx
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, %r14
	movl	$1, %edi
	movl	$65536, %esi                    # imm = 0x10000
	callq	calloc@PLT
	movq	%rax, %r15
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	leaq	48(%rsp), %r13
	movq	%r13, %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hiprandCreateGenerator
	movq	(%r13), %rdi
	movl	$1234, %esi                     # imm = 0x4D2
	callq	hiprandSetPseudoRandomGeneratorSeed
	movq	(%r13), %rdi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%rbx, %rsi
	callq	hiprandGenerateUniform
	movq	(%r13), %rdi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%r14, %rsi
	callq	hiprandGenerateUniform
	movq	(%r13), %rdi
	callq	hiprandDestroyGenerator
	leaq	32(%rsp), %r12
	movl	$65536, %esi                    # imm = 0x10000
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %rbp
	movl	$65536, %esi                    # imm = 0x10000
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r13
	movl	$65536, %esi                    # imm = 0x10000
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967312, %rdi               # imm = 0x100000010
	leaq	240(%rdi), %rdx
	movl	$4096, %r8d                     # imm = 0x1000
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$4096, %r8d                     # imm = 0x1000
	callq	_Z30__device_stub__leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
.LBB1_2:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_7
# %bb.3:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_4
# %bb.5:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_6
.LBB1_7:
	movq	32(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movq	40(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	xorl	%eax, %eax
	jmp	.LBB1_8
.LBB1_4:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_6:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB1_8:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi,@object # @_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
	.section	.rodata,"a",@progbits
	.globl	_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
	.p2align	3, 0x0
_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi:
	.quad	_Z30__device_stub__leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
	.size	_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi"
	.size	.L__unnamed_1, 56

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi ; -- Begin function _Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
	.globl	_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
	.p2align	8
	.type	_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi,@function
_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi: ; @_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[8:9], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s2, 0xffff
	s_mov_b32 s2, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s9, v1
	s_cbranch_execz .LBB0_7
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshl_add_u32 v4, v0, 4, 0
	v_mov_b32_e32 v3, 0
	s_cmp_eq_u32 s10, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 4, v[1:2]
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s0, v7
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v8, vcc_lo
	s_mov_b32 s0, 0
	global_load_b128 v[9:12], v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_b128 v4, v[9:12]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_6
; %bb.2:                                ; %.lr.ph
	v_mul_f32_e64 v3, 0x2e92c4f8, s8
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f32_e32 v9, s8, v3
	v_mov_b32_e32 v3, 0
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u32_e32 0, v0
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_mov_b32_e32 v13, s0
	ds_load_b96 v[10:12], v4
	ds_load_b96 v[13:15], v13
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v12, v15, v12 :: v_dual_sub_f32 v11, v14, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v10, v13, v10 :: v_dual_mul_f32 v13, v11, v11
	v_fmac_f32_e32 v13, v10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v12, v12
	v_mul_f32_e32 v14, 0x4b800000, v13
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v13, v13, v14, vcc_lo
	v_rsq_f32_e32 v13, v13
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v14, 0x45800000, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v13, v13, v14, vcc_lo
	v_mul_f32_e32 v14, v13, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v13, v13, v14
	v_mul_f32_e32 v13, v9, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v1, v10, v13
	v_fmac_f32_e32 v2, v11, v13
	v_fmac_f32_e32 v3, v12, v13
.LBB0_5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v0, -1, v0
	s_add_i32 s10, s10, -1
	s_add_i32 s0, s0, 16
	s_cmp_eq_u32 s10, 0
	s_cbranch_scc0 .LBB0_3
.LBB0_6:                                ; %Flow119
	v_add_co_u32 v9, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v8, vcc_lo
	v_add_co_u32 v11, vcc_lo, s4, v7
	v_mov_b32_e32 v4, 0
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v8, vcc_lo
	v_add_co_u32 v13, vcc_lo, s2, v7
	s_barrier
	buffer_gl0_inv
	global_store_b128 v[9:10], v[1:4], off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v0, v[11:12], off
	v_add_co_ci_u32_e32 v14, vcc_lo, s3, v8, vcc_lo
	global_load_b96 v[7:9], v[13:14], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v1, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmamk_f32 v4, v0, 0x3a03126f, v7
	global_store_b32 v[13:14], v4, off
	global_load_b32 v0, v[11:12], off offset:4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v2, v0
	v_fmamk_f32 v0, v0, 0x3a03126f, v8
	global_store_b32 v[13:14], v0, off offset:4
	global_load_b32 v0, v[11:12], off offset:8
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v9, 0x3a03126f, v0
	global_store_b32 v[13:14], v9, off offset:8
	global_load_b96 v[0:2], v[5:6], off
	s_waitcnt vmcnt(0)
	v_fmamk_f32 v0, v4, 0x3a83126f, v0
	global_store_b32 v[5:6], v0, off
	global_load_b32 v0, v[13:14], off offset:4
	s_waitcnt vmcnt(0)
	v_fmamk_f32 v0, v0, 0x3a83126f, v1
	global_store_b32 v[5:6], v0, off offset:4
	global_load_b32 v0, v[13:14], off offset:8
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v2, 0x3a83126f, v0
	global_store_b32 v[5:6], v2, off offset:8
.LBB0_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi, .Lfunc_end0-_Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 664
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         160
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15leapfrog_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_fi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
