#include <iostream>
#include <cuda_runtime.h>
#include <cassert>

// Define the size of the input image and filter
#define IMAGE_WIDTH 32
#define IMAGE_HEIGHT 32
#define FILTER_WIDTH 3
#define FILTER_HEIGHT 3
#define NUM_FILTERS 16
#define BATCH_SIZE 32
#define NUM_LAYERS 5

// Kernel to perform backpropagation in a convolutional layer
__global__ void convBackpropKernel(float* input, float* gradOutput, float* gradInput, float* gradWeights, 
                                   int imageWidth, int imageHeight, int filterWidth, int filterHeight, int numFilters, int batchSize) {
    extern __shared__ float sharedData[];

    int n = blockIdx.x;
    int f = blockIdx.y;
    int w = threadIdx.x;
    int h = threadIdx.y;

    int outputWidth = imageWidth - filterWidth + 1;
    int outputHeight = imageHeight - filterHeight + 1;

    float gradInputValue = 0.0f;
    float gradWeightsValue = 0.0f;

    for (int i = 0; i < outputHeight; ++i) {
        for (int j = 0; j < outputWidth; ++j) {
            int inputRow = i + h;
            int inputCol = j + w;

            if (inputRow < imageHeight && inputCol < imageWidth) {
                int gradOutputIdx = n * numFilters * outputHeight * outputWidth + f * outputHeight * outputWidth + i * outputWidth + j;
                int inputIdx = n * imageHeight * imageWidth + inputRow * imageWidth + inputCol;
                int filterIdx = f * filterHeight * filterWidth + h * filterWidth + w;

                gradInputValue += gradOutput[gradOutputIdx] * input[inputIdx];
                gradWeightsValue += gradOutput[gradOutputIdx] * input[inputIdx];
            }
        }
    }

    // Store the accumulated values in shared memory
    int sharedIdx = threadIdx.y * blockDim.x + threadIdx.x;
    sharedData[sharedIdx] = gradInputValue;
    sharedData[sharedIdx + blockDim.x * blockDim.y] = gradWeightsValue;

    __syncthreads();

    // Reduce the values in shared memory
    for (int s = blockDim.x * blockDim.y / 2; s > 0; s >>= 1) {
        if (sharedIdx < s) {
            sharedData[sharedIdx] += sharedData[sharedIdx + s];
            sharedData[sharedIdx + blockDim.x * blockDim.y] += sharedData[sharedIdx + blockDim.x * blockDim.y + s];
        }
        __syncthreads();
    }

    // Write the result to global memory
    if (sharedIdx == 0) {
        int gradInputIdx = n * imageHeight * imageWidth + h * imageWidth + w;
        int gradWeightsIdx = f * filterHeight * filterWidth + h * filterWidth + w;
        atomicAdd(&gradInput[gradInputIdx], sharedData[sharedIdx]);
        atomicAdd(&gradWeights[gradWeightsIdx], sharedData[sharedIdx + blockDim.x * blockDim.y]);
    }
}

int main() {
    // Allocate memory on the host
    int inputSize = BATCH_SIZE * IMAGE_HEIGHT * IMAGE_WIDTH;
    int gradOutputSize = BATCH_SIZE * NUM_FILTERS * (IMAGE_HEIGHT - FILTER_HEIGHT + 1) * (IMAGE_WIDTH - FILTER_WIDTH + 1);
    int gradInputSize = inputSize;
    int gradWeightsSize = NUM_FILTERS * FILTER_HEIGHT * FILTER_WIDTH;

    float* h_input = new float[inputSize];
    float* h_gradOutput = new float[gradOutputSize];
    float* h_gradInput = new float[gradInputSize];
    float* h_gradWeights = new float[gradWeightsSize];

    // Initialize host memory
    for (int i = 0; i < inputSize; ++i) h_input[i] = 1.0f;
    for (int i = 0; i < gradOutputSize; ++i) h_gradOutput[i] = 1.0f;
    for (int i = 0; i < gradInputSize; ++i) h_gradInput[i] = 0.0f;
    for (int i = 0; i < gradWeightsSize; ++i) h_gradWeights[i] = 0.0f;

    // Allocate memory on the device
    float* d_input, *d_gradOutput, *d_gradInput, *d_gradWeights;
    cudaMalloc(&d_input, inputSize * sizeof(float));
    cudaMalloc(&d_gradOutput, gradOutputSize * sizeof(float));
    cudaMalloc(&d_gradInput, gradInputSize * sizeof(float));
    cudaMalloc(&d_gradWeights, gradWeightsSize * sizeof(float));

    // Copy data from host to device
    cudaMemcpy(d_input, h_input, inputSize * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_gradOutput, h_gradOutput, gradOutputSize * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_gradInput, h_gradInput, gradInputSize * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_gradWeights, h_gradWeights, gradWeightsSize * sizeof(float), cudaMemcpyHostToDevice);

    // Define grid and block dimensions
    dim3 blockSize(FILTER_WIDTH, FILTER_HEIGHT);
    dim3 gridSize(BATCH_SIZE, NUM_FILTERS);

    // Launch the kernel for each layer
    for (int layer = 0; layer < NUM_LAYERS; ++layer) {
        convBackpropKernel<<<gridSize, blockSize, (FILTER_WIDTH * FILTER_HEIGHT + FILTER_WIDTH * FILTER_HEIGHT * blockSize.x * blockSize.y) * sizeof(float)>>>(
            d_input, d_gradOutput, d_gradInput, d_gradWeights, IMAGE_WIDTH, IMAGE_HEIGHT, FILTER_WIDTH, FILTER_HEIGHT, NUM_FILTERS, BATCH_SIZE);
        cudaDeviceSynchronize();

        // Check for errors
        cudaError_t err = cudaGetLastError();
        if (err != cudaSuccess) {
            std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
            return -1;
        }
    }

    // Copy results back to host
    cudaMemcpy(h_gradInput, d_gradInput, gradInputSize * sizeof(float), cudaMemcpyDeviceToHost);
    cudaMemcpy(h_gradWeights, d_gradWeights, gradWeightsSize * sizeof(float), cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_input);
    cudaFree(d_gradOutput);
    cudaFree(d_gradInput);
    cudaFree(d_gradWeights);

    // Free host memory
    delete[] h_input;
    delete[] h_gradOutput;
    delete[] h_gradInput;
    delete[] h_gradWeights;

    return 0;
}
	.file	"tmpxft_000a4250_00000000-6_cuda_code_081880.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z50__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiiPfS_S_S_iiiiii
	.type	_Z50__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiiPfS_S_S_iiiiii, @function
_Z50__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiiPfS_S_S_iiiiii:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z18convBackpropKernelPfS_S_S_iiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 240
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L2:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z50__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiiPfS_S_S_iiiiii, .-_Z50__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiiPfS_S_S_iiiiii
	.globl	_Z18convBackpropKernelPfS_S_S_iiiiii
	.type	_Z18convBackpropKernelPfS_S_S_iiiiii, @function
_Z18convBackpropKernelPfS_S_S_iiiiii:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiiPfS_S_S_iiiiii
	.cfi_endproc
.LFE3661:
	.size	_Z18convBackpropKernelPfS_S_S_iiiiii, .-_Z18convBackpropKernelPfS_S_S_iiiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"CUDA error: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$131072, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$1843200, %edi
	movq	%rax, %r13
	call	_Znam@PLT
	movl	$131072, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$576, %edi
	movq	%rax, 8(%rsp)
	call	_Znam@PLT
	movss	.LC0(%rip), %xmm0
	movq	%rax, %rbx
	xorl	%eax, %eax
.L9:
	movss	%xmm0, 0(%r13,%rax,4)
	incq	%rax
	cmpq	$32768, %rax
	jne	.L9
	xorl	%eax, %eax
.L10:
	movss	%xmm0, (%r12,%rax,4)
	incq	%rax
	cmpq	$460800, %rax
	jne	.L10
	movq	8(%rsp), %rdi
	xorl	%eax, %eax
	movl	$32768, %ecx
	movl	$131072, %esi
	movabsq	$12884901891, %r15
	movl	$5, %r14d
	rep stosl
	movl	$144, %ecx
	movq	%rbx, %rdi
	rep stosl
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$1843200, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$131072, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$576, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$131072, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$1843200, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$131072, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$576, %edx
	call	cudaMemcpy@PLT
	movl	$2147483649, %eax
	movl	$1, 56(%rsp)
	salq	$5, %rax
	movl	$1, 68(%rsp)
	movq	%rax, 60(%rsp)
.L14:
	movl	56(%rsp), %ecx
	movq	60(%rsp), %rdi
	xorl	%r9d, %r9d
	movq	%r15, %rdx
	movl	68(%rsp), %esi
	movl	$360, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	$32
	.cfi_def_cfa_offset 152
	movl	$32, %r9d
	movl	$32, %r8d
	pushq	$16
	.cfi_def_cfa_offset 160
	pushq	$3
	.cfi_def_cfa_offset 168
	pushq	$3
	.cfi_def_cfa_offset 176
	movq	72(%rsp), %rcx
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z50__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiiPfS_S_S_iiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 144
.L11:
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L12
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L8
.L12:
	decl	%r14d
	jne	.L14
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$131072, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$576, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	8(%rsp), %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	xorl	%eax, %eax
.L8:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z18convBackpropKernelPfS_S_S_iiiiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18convBackpropKernelPfS_S_S_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <cassert>

// Define the size of the input image and filter
#define IMAGE_WIDTH 32
#define IMAGE_HEIGHT 32
#define FILTER_WIDTH 3
#define FILTER_HEIGHT 3
#define NUM_FILTERS 16
#define BATCH_SIZE 32
#define NUM_LAYERS 5

// Kernel to perform backpropagation in a convolutional layer
__global__ void convBackpropKernel(float* input, float* gradOutput, float* gradInput, float* gradWeights, 
                                   int imageWidth, int imageHeight, int filterWidth, int filterHeight, int numFilters, int batchSize) {
    extern __shared__ float sharedData[];

    int n = blockIdx.x;
    int f = blockIdx.y;
    int w = threadIdx.x;
    int h = threadIdx.y;

    int outputWidth = imageWidth - filterWidth + 1;
    int outputHeight = imageHeight - filterHeight + 1;

    float gradInputValue = 0.0f;
    float gradWeightsValue = 0.0f;

    for (int i = 0; i < outputHeight; ++i) {
        for (int j = 0; j < outputWidth; ++j) {
            int inputRow = i + h;
            int inputCol = j + w;

            if (inputRow < imageHeight && inputCol < imageWidth) {
                int gradOutputIdx = n * numFilters * outputHeight * outputWidth + f * outputHeight * outputWidth + i * outputWidth + j;
                int inputIdx = n * imageHeight * imageWidth + inputRow * imageWidth + inputCol;
                int filterIdx = f * filterHeight * filterWidth + h * filterWidth + w;

                gradInputValue += gradOutput[gradOutputIdx] * input[inputIdx];
                gradWeightsValue += gradOutput[gradOutputIdx] * input[inputIdx];
            }
        }
    }

    // Store the accumulated values in shared memory
    int sharedIdx = threadIdx.y * blockDim.x + threadIdx.x;
    sharedData[sharedIdx] = gradInputValue;
    sharedData[sharedIdx + blockDim.x * blockDim.y] = gradWeightsValue;

    __syncthreads();

    // Reduce the values in shared memory
    for (int s = blockDim.x * blockDim.y / 2; s > 0; s >>= 1) {
        if (sharedIdx < s) {
            sharedData[sharedIdx] += sharedData[sharedIdx + s];
            sharedData[sharedIdx + blockDim.x * blockDim.y] += sharedData[sharedIdx + blockDim.x * blockDim.y + s];
        }
        __syncthreads();
    }

    // Write the result to global memory
    if (sharedIdx == 0) {
        int gradInputIdx = n * imageHeight * imageWidth + h * imageWidth + w;
        int gradWeightsIdx = f * filterHeight * filterWidth + h * filterWidth + w;
        atomicAdd(&gradInput[gradInputIdx], sharedData[sharedIdx]);
        atomicAdd(&gradWeights[gradWeightsIdx], sharedData[sharedIdx + blockDim.x * blockDim.y]);
    }
}

int main() {
    // Allocate memory on the host
    int inputSize = BATCH_SIZE * IMAGE_HEIGHT * IMAGE_WIDTH;
    int gradOutputSize = BATCH_SIZE * NUM_FILTERS * (IMAGE_HEIGHT - FILTER_HEIGHT + 1) * (IMAGE_WIDTH - FILTER_WIDTH + 1);
    int gradInputSize = inputSize;
    int gradWeightsSize = NUM_FILTERS * FILTER_HEIGHT * FILTER_WIDTH;

    float* h_input = new float[inputSize];
    float* h_gradOutput = new float[gradOutputSize];
    float* h_gradInput = new float[gradInputSize];
    float* h_gradWeights = new float[gradWeightsSize];

    // Initialize host memory
    for (int i = 0; i < inputSize; ++i) h_input[i] = 1.0f;
    for (int i = 0; i < gradOutputSize; ++i) h_gradOutput[i] = 1.0f;
    for (int i = 0; i < gradInputSize; ++i) h_gradInput[i] = 0.0f;
    for (int i = 0; i < gradWeightsSize; ++i) h_gradWeights[i] = 0.0f;

    // Allocate memory on the device
    float* d_input, *d_gradOutput, *d_gradInput, *d_gradWeights;
    hipMalloc(&d_input, inputSize * sizeof(float));
    hipMalloc(&d_gradOutput, gradOutputSize * sizeof(float));
    hipMalloc(&d_gradInput, gradInputSize * sizeof(float));
    hipMalloc(&d_gradWeights, gradWeightsSize * sizeof(float));

    // Copy data from host to device
    hipMemcpy(d_input, h_input, inputSize * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_gradOutput, h_gradOutput, gradOutputSize * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_gradInput, h_gradInput, gradInputSize * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_gradWeights, h_gradWeights, gradWeightsSize * sizeof(float), hipMemcpyHostToDevice);

    // Define grid and block dimensions
    dim3 blockSize(FILTER_WIDTH, FILTER_HEIGHT);
    dim3 gridSize(BATCH_SIZE, NUM_FILTERS);

    // Launch the kernel for each layer
    for (int layer = 0; layer < NUM_LAYERS; ++layer) {
        convBackpropKernel<<<gridSize, blockSize, (FILTER_WIDTH * FILTER_HEIGHT + FILTER_WIDTH * FILTER_HEIGHT * blockSize.x * blockSize.y) * sizeof(float)>>>(
            d_input, d_gradOutput, d_gradInput, d_gradWeights, IMAGE_WIDTH, IMAGE_HEIGHT, FILTER_WIDTH, FILTER_HEIGHT, NUM_FILTERS, BATCH_SIZE);
        hipDeviceSynchronize();

        // Check for errors
        hipError_t err = hipGetLastError();
        if (err != hipSuccess) {
            std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
            return -1;
        }
    }

    // Copy results back to host
    hipMemcpy(h_gradInput, d_gradInput, gradInputSize * sizeof(float), hipMemcpyDeviceToHost);
    hipMemcpy(h_gradWeights, d_gradWeights, gradWeightsSize * sizeof(float), hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_input);
    hipFree(d_gradOutput);
    hipFree(d_gradInput);
    hipFree(d_gradWeights);

    // Free host memory
    delete[] h_input;
    delete[] h_gradOutput;
    delete[] h_gradInput;
    delete[] h_gradWeights;

    return 0;
}
	.text
	.file	"cuda_code_081880.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii # -- Begin function _Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii
	.type	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii,@function
_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii: # @_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18convBackpropKernelPfS_S_S_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii, .Lfunc_end0-_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$131072, %edi                   # imm = 0x20000
	callq	_Znam
	movq	%rax, %rbx
	movl	$1843200, %edi                  # imm = 0x1C2000
	callq	_Znam
	movq	%rax, %r14
	movl	$131072, %edi                   # imm = 0x20000
	callq	_Znam
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	$576, %edi                      # imm = 0x240
	callq	_Znam
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rbx,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$32768, %rax                    # imm = 0x8000
	jne	.LBB1_1
# %bb.2:                                # %.preheader74.preheader
	xorl	%eax, %eax
.LBB1_3:                                # %.preheader74
                                        # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%r14,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$460800, %rax                   # imm = 0x70800
	jne	.LBB1_3
# %bb.4:                                # %.preheader73.preheader
	movl	$131072, %edx                   # imm = 0x20000
	movq	32(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$576, %edx                      # imm = 0x240
	movq	24(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	leaq	48(%rsp), %r12
	movl	$131072, %esi                   # imm = 0x20000
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	40(%rsp), %r15
	movl	$1843200, %esi                  # imm = 0x1C2000
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$131072, %esi                   # imm = 0x20000
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$576, %esi                      # imm = 0x240
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$131072, %edx                   # imm = 0x20000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movl	$1843200, %edx                  # imm = 0x1C2000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movl	$131072, %edx                   # imm = 0x20000
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	movl	$576, %edx                      # imm = 0x240
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$5, %r12d
	movabsq	$68719476768, %r13              # imm = 0x1000000020
	movabsq	$12884901891, %rbp              # imm = 0x300000003
.LBB1_6:                                # =>This Inner Loop Header: Depth=1
	movl	$360, %r8d                      # imm = 0x168
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.7:                                #   in Loop: Header=BB1_6 Depth=1
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	$32, %r8d
	movl	$32, %r9d
	pushq	$32
	.cfi_adjust_cfa_offset 8
	pushq	$16
	.cfi_adjust_cfa_offset 8
	movl	$3, %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB1_8:                                #   in Loop: Header=BB1_6 Depth=1
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.5:                                #   in Loop: Header=BB1_6 Depth=1
	decl	%r12d
	jne	.LBB1_6
# %bb.13:
	movq	16(%rsp), %rsi
	movl	$131072, %edx                   # imm = 0x20000
	movq	32(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movl	$576, %edx                      # imm = 0x240
	movq	24(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	%r12, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	jmp	.LBB1_14
.LBB1_9:
	movl	%eax, %r15d
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r15d, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_10
# %bb.11:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_12
.LBB1_10:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_12:
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB1_14:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18convBackpropKernelPfS_S_S_iiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18convBackpropKernelPfS_S_S_iiiiii,@object # @_Z18convBackpropKernelPfS_S_S_iiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z18convBackpropKernelPfS_S_S_iiiiii
	.p2align	3, 0x0
_Z18convBackpropKernelPfS_S_S_iiiiii:
	.quad	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii
	.size	_Z18convBackpropKernelPfS_S_S_iiiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18convBackpropKernelPfS_S_S_iiiiii"
	.size	.L__unnamed_1, 37

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18convBackpropKernelPfS_S_S_iiiiii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18convBackpropKernelPfS_S_S_iiiiii ; -- Begin function _Z18convBackpropKernelPfS_S_S_iiiiii
	.globl	_Z18convBackpropKernelPfS_S_S_iiiiii
	.p2align	8
	.type	_Z18convBackpropKernelPfS_S_S_iiiiii,@function
_Z18convBackpropKernelPfS_S_S_iiiiii:   ; @_Z18convBackpropKernelPfS_S_S_iiiiii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[16:19], s[0:1], 0x20
	s_load_b256 s[4:11], s[0:1], 0x0
	v_dual_mov_b32 v2, 0 :: v_dual_and_b32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	v_mov_b32_e32 v3, 0
	s_mov_b32 s20, 0
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s3, s17, s19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s3, 0
	s_cbranch_scc1 .LBB0_9
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b32 s2, s[0:1], 0x30
	v_mad_u64_u32 v[4:5], null, s14, s17, v[0:1]
	s_sub_i32 s12, s16, s18
	s_add_i32 s13, s3, 1
	s_add_i32 s21, s12, 1
	s_cmp_gt_i32 s12, -1
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v4, s16, v4
	s_cselect_b32 s22, -1, 0
	s_mul_i32 s12, s13, s21
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s14, s2
	s_add_i32 s2, s2, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s23, s12, s2
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s22
	s_cbranch_vccnz .LBB0_7
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v5, s20, v0
	s_mov_b32 s12, s23
	s_mov_b32 s24, s21
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s17, v5
	v_mov_b32_e32 v5, v1
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s16, v5
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s25, s2
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v6, v4, v5
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[26:27], s[12:13], 2
	s_add_u32 s26, s6, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	s_addc_u32 s27, s7, s27
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, s2, s4, v6
	v_add_co_ci_u32_e64 v7, s2, s5, v7, s2
	s_load_b32 s2, s[26:27], 0x0
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v2, s2, v6
	v_fmac_f32_e32 v3, s2, v6
.LBB0_6:                                ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s25
	v_add_nc_u32_e32 v5, 1, v5
	s_add_i32 s24, s24, -1
	s_add_i32 s12, s12, 1
	s_cmp_eq_u32 s24, 0
	s_cbranch_scc0 .LBB0_4
.LBB0_7:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v4, s16, v4
	s_add_i32 s2, s20, 1
	s_add_i32 s23, s23, s21
	s_cmp_eq_u32 s20, s3
	s_cbranch_scc1 .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s20, s2
	s_branch .LBB0_2
.LBB0_9:                                ; %._crit_edge121
	s_load_b32 s0, s[0:1], 0x44
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s0, 0xffff
	s_lshr_b32 s0, s0, 16
	v_mad_u32_u24 v5, v0, s1, v1
	s_mul_i32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lt_u32 s0, 2
	v_lshl_add_u32 v4, v5, 2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v6, s0, 2, v4
	ds_store_b32 v4, v2
	ds_store_b32 v6, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_14
; %bb.10:
	s_mov_b32 s1, s0
.LBB0_11:                               ; %.lr.ph128
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshr_b32 s2, s1, 1
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_u32_e64 s2, v5
	s_cbranch_execz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=1
	s_lshl_b32 s4, s2, 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v2, s4, v4
	ds_load_b32 v2, v2
	ds_load_b32 v3, v4
	s_waitcnt lgkmcnt(0)
	v_dual_add_f32 v2, v2, v3 :: v_dual_add_nc_u32 v3, s4, v6
	ds_store_b32 v4, v2
	ds_load_b32 v2, v3
	ds_load_b32 v3, v6
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v6, v2
.LBB0_13:                               ;   in Loop: Header=BB0_11 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_cmp_lt_u32 s1, 4
	s_mov_b32 s1, s2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_11
.LBB0_14:                               ; %._crit_edge129
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v5
	s_cbranch_execz .LBB0_19
; %bb.15:
	v_mad_u64_u32 v[2:3], null, s14, s17, v[0:1]
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v2, s16, v[1:2]
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	ds_load_b32 v6, v4
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v5, v[2:3], off
.LBB0_16:                               ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v4, v5, v6
	global_atomic_cmpswap_b32 v4, v[2:3], v[4:5], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v4, v5
	v_mov_b32_e32 v5, v4
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_16
; %bb.17:                               ; %atomicrmw.end
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[2:3], null, s15, s19, v[0:1]
	s_lshl_b32 s0, s0, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s0, s0, 0
	v_mad_u64_u32 v[3:4], null, v2, s18, v[1:2]
	v_mov_b32_e32 v2, s0
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	ds_load_b32 v4, v2
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_load_b32 v3, v[0:1], off
.LBB0_18:                               ; %atomicrmw.start132
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v2, v3, v4
	global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v2, v3
	v_mov_b32_e32 v3, v2
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_18
.LBB0_19:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18convBackpropKernelPfS_S_S_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18convBackpropKernelPfS_S_S_iiiiii, .Lfunc_end0-_Z18convBackpropKernelPfS_S_S_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 844
; NumSgprs: 30
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         176
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18convBackpropKernelPfS_S_S_iiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     30
    .sgpr_spill_count: 0
    .symbol:         _Z18convBackpropKernelPfS_S_S_iiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
