#include <iostream>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>

// Define the number of nodes in the graph
#define NUM_NODES 512

// Kernel to initialize the labels and adjacency list
__global__ void initLabelsAndAdjList(int *labels, int *adjList, int *adjListSize) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < NUM_NODES) {
        labels[idx] = idx; // Initialize each node's label to itself
        adjList[idx * NUM_NODES] = -1; // Initialize adjacency list
        adjListSize[idx] = 0; // Initialize adjacency list size
    }
}

// Kernel to update labels based on adjacency list
__global__ void updateLabels(int *labels, int *adjList, int *adjListSize) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < NUM_NODES) {
        int minLabel = labels[idx];
        for (int i = 0; i < adjListSize[idx]; ++i) {
            int neighbor = adjList[idx * NUM_NODES + i];
            minLabel = min(minLabel, labels[neighbor]);
        }
        labels[idx] = minLabel;
    }
}

// Kernel to compress labels
__global__ void compressLabels(int *labels) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < NUM_NODES) {
        int root = idx;
        while (labels[root] != root) {
            root = labels[root];
        }
        labels[idx] = root;
    }
}

// Kernel to compress labels path compression
__global__ void pathCompression(int *labels) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < NUM_NODES) {
        int root = idx;
        while (labels[root] != root) {
            root = labels[root];
        }
        int current = idx;
        while (labels[current] != root) {
            int temp = labels[current];
            labels[current] = root;
            current = temp;
        }
    }
}

int main() {
    // Initialize host data
    int *h_labels = new int[NUM_NODES];
    int *h_adjList = new int[NUM_NODES * NUM_NODES];
    int *h_adjListSize = new int[NUM_NODES];

    // Initialize adjacency list for demonstration (randomly connect nodes)
    for (int i = 0; i < NUM_NODES; ++i) {
        h_adjListSize[i] = 0;
        for (int j = 0; j < NUM_NODES; ++j) {
            if (rand() % 10 < 3) { // Randomly connect nodes with 30% probability
                h_adjList[i * NUM_NODES + h_adjListSize[i]++] = j;
            }
        }
    }

    // Allocate device memory
    int *d_labels, *d_adjList, *d_adjListSize;
    cudaMalloc((void**)&d_labels, NUM_NODES * sizeof(int));
    cudaMalloc((void**)&d_adjList, NUM_NODES * NUM_NODES * sizeof(int));
    cudaMalloc((void**)&d_adjListSize, NUM_NODES * sizeof(int));

    // Copy data from host to device
    cudaMemcpy(d_labels, h_labels, NUM_NODES * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_adjList, h_adjList, NUM_NODES * NUM_NODES * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_adjListSize, h_adjListSize, NUM_NODES * sizeof(int), cudaMemcpyHostToDevice);

    // Define block and grid sizes
    dim3 blockSize(256);
    dim3 gridSize((NUM_NODES + blockSize.x - 1) / blockSize.x);

    // Initialize labels and adjacency list
    initLabelsAndAdjList<<<gridSize, blockSize>>>(d_labels, d_adjList, d_adjListSize);
    cudaDeviceSynchronize();

    // Perform SCC computation
    bool changed = true;
    while (changed) {
        changed = false;
        updateLabels<<<gridSize, blockSize>>>(d_labels, d_adjList, d_adjListSize);
        cudaDeviceSynchronize();

        compressLabels<<<gridSize, blockSize>>>(d_labels);
        cudaDeviceSynchronize();

        pathCompression<<<gridSize, blockSize>>>(d_labels);
        cudaDeviceSynchronize();

        // Check for changes in labels
        int *h_labelsPrev = new int[NUM_NODES];
        cudaMemcpy(h_labelsPrev, d_labels, NUM_NODES * sizeof(int), cudaMemcpyDeviceToHost);
        updateLabels<<<gridSize, blockSize>>>(d_labels, d_adjList, d_adjListSize);
        cudaDeviceSynchronize();
        cudaMemcpy(h_labels, d_labels, NUM_NODES * sizeof(int), cudaMemcpyDeviceToHost);

        for (int i = 0; i < NUM_NODES; ++i) {
            if (h_labels[i] != h_labelsPrev[i]) {
                changed = true;
                break;
            }
        }
        delete[] h_labelsPrev;
    }

    // Copy results back to host
    cudaMemcpy(h_labels, d_labels, NUM_NODES * sizeof(int), cudaMemcpyDeviceToHost);

    // Output the labels for demonstration
    std::cout << "Strongly Connected Components:" << std::endl;
    for (int i = 0; i < NUM_NODES; ++i) {
        std::cout << "Node " << i << " -> Component " << h_labels[i] << std::endl;
    }

    // Free device memory
    cudaFree(d_labels);
    cudaFree(d_adjList);
    cudaFree(d_adjListSize);

    // Free host memory
    delete[] h_labels;
    delete[] h_adjList;
    delete[] h_adjListSize;

    return 0;
}
	.file	"tmpxft_0017eb29_00000000-6_cuda_code_026219.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z44__device_stub__Z20initLabelsAndAdjListPiS_S_PiS_S_
	.type	_Z44__device_stub__Z20initLabelsAndAdjListPiS_S_PiS_S_, @function
_Z44__device_stub__Z20initLabelsAndAdjListPiS_S_PiS_S_:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z20initLabelsAndAdjListPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z44__device_stub__Z20initLabelsAndAdjListPiS_S_PiS_S_, .-_Z44__device_stub__Z20initLabelsAndAdjListPiS_S_PiS_S_
	.globl	_Z20initLabelsAndAdjListPiS_S_
	.type	_Z20initLabelsAndAdjListPiS_S_, @function
_Z20initLabelsAndAdjListPiS_S_:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z20initLabelsAndAdjListPiS_S_PiS_S_
	.cfi_endproc
.LFE3661:
	.size	_Z20initLabelsAndAdjListPiS_S_, .-_Z20initLabelsAndAdjListPiS_S_
	.globl	_Z36__device_stub__Z12updateLabelsPiS_S_PiS_S_
	.type	_Z36__device_stub__Z12updateLabelsPiS_S_PiS_S_, @function
_Z36__device_stub__Z12updateLabelsPiS_S_PiS_S_:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12updateLabelsPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z36__device_stub__Z12updateLabelsPiS_S_PiS_S_, .-_Z36__device_stub__Z12updateLabelsPiS_S_PiS_S_
	.globl	_Z12updateLabelsPiS_S_
	.type	_Z12updateLabelsPiS_S_, @function
_Z12updateLabelsPiS_S_:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z12updateLabelsPiS_S_PiS_S_
	.cfi_endproc
.LFE3663:
	.size	_Z12updateLabelsPiS_S_, .-_Z12updateLabelsPiS_S_
	.globl	_Z34__device_stub__Z14compressLabelsPiPi
	.type	_Z34__device_stub__Z14compressLabelsPiPi, @function
_Z34__device_stub__Z14compressLabelsPiPi:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z14compressLabelsPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L13:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z34__device_stub__Z14compressLabelsPiPi, .-_Z34__device_stub__Z14compressLabelsPiPi
	.globl	_Z14compressLabelsPi
	.type	_Z14compressLabelsPi, @function
_Z14compressLabelsPi:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z14compressLabelsPiPi
	.cfi_endproc
.LFE3665:
	.size	_Z14compressLabelsPi, .-_Z14compressLabelsPi
	.globl	_Z35__device_stub__Z15pathCompressionPiPi
	.type	_Z35__device_stub__Z15pathCompressionPiPi, @function
_Z35__device_stub__Z15pathCompressionPiPi:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z15pathCompressionPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L18:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z35__device_stub__Z15pathCompressionPiPi, .-_Z35__device_stub__Z15pathCompressionPiPi
	.globl	_Z15pathCompressionPi
	.type	_Z15pathCompressionPi, @function
_Z15pathCompressionPi:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z15pathCompressionPiPi
	.cfi_endproc
.LFE3667:
	.size	_Z15pathCompressionPi, .-_Z15pathCompressionPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Strongly Connected Components:"
.LC1:
	.string	"Node "
.LC2:
	.string	" -> Component "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$2048, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$1048576, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movl	$2048, %edi
	movq	%rax, %r13
	call	_Znam@PLT
	movq	%rax, %rbp
.L26:
	xorl	%eax, %eax
	movl	%r12d, %r15d
	xorl	%r14d, %r14d
	movl	%eax, 0(%rbp,%r12,4)
	sall	$9, %r15d
.L25:
	call	rand@PLT
	movl	$10, %ecx
	cltd
	idivl	%ecx
	cmpl	$2, %edx
	jg	.L24
	movl	0(%rbp,%r12,4), %eax
	leal	1(%rax), %edx
	addl	%r15d, %eax
	cltq
	movl	%edx, 0(%rbp,%r12,4)
	movl	%r14d, 0(%r13,%rax,4)
.L24:
	incl	%r14d
	cmpl	$512, %r14d
	jne	.L25
	incq	%r12
	cmpq	$512, %r12
	jne	.L26
	leaq	8(%rsp), %rdi
	movl	$2048, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$1048576, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$2048, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$2048, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$1048576, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$2048, %edx
	call	cudaMemcpy@PLT
	movl	$2147483649, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$16777217, %edx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	salq	$8, %rdx
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	movq	%rdx, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z44__device_stub__Z20initLabelsAndAdjListPiS_S_PiS_S_
.L27:
	call	cudaDeviceSynchronize@PLT
.L34:
	movl	40(%rsp), %ecx
	movq	32(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	44(%rsp), %rdi
	movl	52(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z36__device_stub__Z12updateLabelsPiS_S_PiS_S_
.L28:
	call	cudaDeviceSynchronize@PLT
	movl	40(%rsp), %ecx
	movl	52(%rsp), %esi
	xorl	%r9d, %r9d
	movq	32(%rsp), %rdx
	movq	44(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	8(%rsp), %rdi
	call	_Z34__device_stub__Z14compressLabelsPiPi
.L29:
	call	cudaDeviceSynchronize@PLT
	movl	40(%rsp), %ecx
	movl	52(%rsp), %esi
	xorl	%r9d, %r9d
	movq	32(%rsp), %rdx
	movq	44(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	movq	8(%rsp), %rdi
	call	_Z35__device_stub__Z15pathCompressionPiPi
.L30:
	call	cudaDeviceSynchronize@PLT
	movl	$2048, %edi
	call	_Znam@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$2048, %edx
	movq	%rax, %rdi
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movl	40(%rsp), %ecx
	movl	52(%rsp), %esi
	xorl	%r9d, %r9d
	movq	32(%rsp), %rdx
	movq	44(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z36__device_stub__Z12updateLabelsPiS_S_PiS_S_
.L31:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$2048, %edx
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
.L33:
	movl	(%r12,%rax), %edx
	cmpl	%edx, (%rbx,%rax)
	jne	.L37
	addq	$4, %rax
	cmpq	$2048, %rax
	jne	.L33
	xorl	%r14d, %r14d
	jmp	.L32
.L37:
	movb	$1, %r14b
.L32:
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	testb	%r14b, %r14b
	jne	.L34
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	xorl	%r12d, %r12d
	movl	$2048, %edx
	leaq	_ZSt4cout(%rip), %r14
	leaq	.LC1(%rip), %r15
	call	cudaMemcpy@PLT
	leaq	.LC0(%rip), %rsi
	movq	%r14, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L35:
	movq	%r15, %rsi
	movq	%r14, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	(%rbx,%r12,4), %esi
	incq	%r12
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpq	$512, %r12
	jne	.L35
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z15pathCompressionPi"
.LC4:
	.string	"_Z14compressLabelsPi"
.LC5:
	.string	"_Z12updateLabelsPiS_S_"
.LC6:
	.string	"_Z20initLabelsAndAdjListPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3669:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15pathCompressionPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14compressLabelsPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12updateLabelsPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z20initLabelsAndAdjListPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3669:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>


// Define the number of nodes in the graph
#define NUM_NODES 512

// Kernel to initialize the labels and adjacency list
__global__ void initLabelsAndAdjList(int *labels, int *adjList, int *adjListSize) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < NUM_NODES) {
        labels[idx] = idx; // Initialize each node's label to itself
        adjList[idx * NUM_NODES] = -1; // Initialize adjacency list
        adjListSize[idx] = 0; // Initialize adjacency list size
    }
}

// Kernel to update labels based on adjacency list
__global__ void updateLabels(int *labels, int *adjList, int *adjListSize) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < NUM_NODES) {
        int minLabel = labels[idx];
        for (int i = 0; i < adjListSize[idx]; ++i) {
            int neighbor = adjList[idx * NUM_NODES + i];
            minLabel = min(minLabel, labels[neighbor]);
        }
        labels[idx] = minLabel;
    }
}

// Kernel to compress labels
__global__ void compressLabels(int *labels) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < NUM_NODES) {
        int root = idx;
        while (labels[root] != root) {
            root = labels[root];
        }
        labels[idx] = root;
    }
}

// Kernel to compress labels path compression
__global__ void pathCompression(int *labels) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < NUM_NODES) {
        int root = idx;
        while (labels[root] != root) {
            root = labels[root];
        }
        int current = idx;
        while (labels[current] != root) {
            int temp = labels[current];
            labels[current] = root;
            current = temp;
        }
    }
}

int main() {
    // Initialize host data
    int *h_labels = new int[NUM_NODES];
    int *h_adjList = new int[NUM_NODES * NUM_NODES];
    int *h_adjListSize = new int[NUM_NODES];

    // Initialize adjacency list for demonstration (randomly connect nodes)
    for (int i = 0; i < NUM_NODES; ++i) {
        h_adjListSize[i] = 0;
        for (int j = 0; j < NUM_NODES; ++j) {
            if (rand() % 10 < 3) { // Randomly connect nodes with 30% probability
                h_adjList[i * NUM_NODES + h_adjListSize[i]++] = j;
            }
        }
    }

    // Allocate device memory
    int *d_labels, *d_adjList, *d_adjListSize;
    hipMalloc((void**)&d_labels, NUM_NODES * sizeof(int));
    hipMalloc((void**)&d_adjList, NUM_NODES * NUM_NODES * sizeof(int));
    hipMalloc((void**)&d_adjListSize, NUM_NODES * sizeof(int));

    // Copy data from host to device
    hipMemcpy(d_labels, h_labels, NUM_NODES * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_adjList, h_adjList, NUM_NODES * NUM_NODES * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_adjListSize, h_adjListSize, NUM_NODES * sizeof(int), hipMemcpyHostToDevice);

    // Define block and grid sizes
    dim3 blockSize(256);
    dim3 gridSize((NUM_NODES + blockSize.x - 1) / blockSize.x);

    // Initialize labels and adjacency list
    initLabelsAndAdjList<<<gridSize, blockSize>>>(d_labels, d_adjList, d_adjListSize);
    hipDeviceSynchronize();

    // Perform SCC computation
    bool changed = true;
    while (changed) {
        changed = false;
        updateLabels<<<gridSize, blockSize>>>(d_labels, d_adjList, d_adjListSize);
        hipDeviceSynchronize();

        compressLabels<<<gridSize, blockSize>>>(d_labels);
        hipDeviceSynchronize();

        pathCompression<<<gridSize, blockSize>>>(d_labels);
        hipDeviceSynchronize();

        // Check for changes in labels
        int *h_labelsPrev = new int[NUM_NODES];
        hipMemcpy(h_labelsPrev, d_labels, NUM_NODES * sizeof(int), hipMemcpyDeviceToHost);
        updateLabels<<<gridSize, blockSize>>>(d_labels, d_adjList, d_adjListSize);
        hipDeviceSynchronize();
        hipMemcpy(h_labels, d_labels, NUM_NODES * sizeof(int), hipMemcpyDeviceToHost);

        for (int i = 0; i < NUM_NODES; ++i) {
            if (h_labels[i] != h_labelsPrev[i]) {
                changed = true;
                break;
            }
        }
        delete[] h_labelsPrev;
    }

    // Copy results back to host
    hipMemcpy(h_labels, d_labels, NUM_NODES * sizeof(int), hipMemcpyDeviceToHost);

    // Output the labels for demonstration
    std::cout << "Strongly Connected Components:" << std::endl;
    for (int i = 0; i < NUM_NODES; ++i) {
        std::cout << "Node " << i << " -> Component " << h_labels[i] << std::endl;
    }

    // Free device memory
    hipFree(d_labels);
    hipFree(d_adjList);
    hipFree(d_adjListSize);

    // Free host memory
    delete[] h_labels;
    delete[] h_adjList;
    delete[] h_adjListSize;

    return 0;
}
	.text
	.file	"cuda_code_026219.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z35__device_stub__initLabelsAndAdjListPiS_S_ # -- Begin function _Z35__device_stub__initLabelsAndAdjListPiS_S_
	.type	_Z35__device_stub__initLabelsAndAdjListPiS_S_,@function
_Z35__device_stub__initLabelsAndAdjListPiS_S_: # @_Z35__device_stub__initLabelsAndAdjListPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20initLabelsAndAdjListPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z35__device_stub__initLabelsAndAdjListPiS_S_, .Lfunc_end0-_Z35__device_stub__initLabelsAndAdjListPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__updateLabelsPiS_S_ # -- Begin function _Z27__device_stub__updateLabelsPiS_S_
	.type	_Z27__device_stub__updateLabelsPiS_S_,@function
_Z27__device_stub__updateLabelsPiS_S_:  # @_Z27__device_stub__updateLabelsPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12updateLabelsPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__updateLabelsPiS_S_, .Lfunc_end1-_Z27__device_stub__updateLabelsPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__compressLabelsPi # -- Begin function _Z29__device_stub__compressLabelsPi
	.type	_Z29__device_stub__compressLabelsPi,@function
_Z29__device_stub__compressLabelsPi:    # @_Z29__device_stub__compressLabelsPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14compressLabelsPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z29__device_stub__compressLabelsPi, .Lfunc_end2-_Z29__device_stub__compressLabelsPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__pathCompressionPi # -- Begin function _Z30__device_stub__pathCompressionPi
	.type	_Z30__device_stub__pathCompressionPi,@function
_Z30__device_stub__pathCompressionPi:   # @_Z30__device_stub__pathCompressionPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15pathCompressionPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z30__device_stub__pathCompressionPi, .Lfunc_end3-_Z30__device_stub__pathCompressionPi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$2048, %edi                     # imm = 0x800
	callq	_Znam
	movq	%rax, %rbx
	movl	$1048576, %edi                  # imm = 0x100000
	callq	_Znam
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	$2048, %edi                     # imm = 0x800
	callq	_Znam
	movq	%rax, %r15
	xorl	%r12d, %r12d
.LBB4_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
	movl	$0, (%r15,%r12,4)
	movq	%r12, %r13
	shlq	$11, %r13
	addq	32(%rsp), %r13                  # 8-byte Folded Reload
	xorl	%r14d, %r14d
	xorl	%ebp, %ebp
.LBB4_2:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	cmpl	$2, %eax
	jg	.LBB4_4
# %bb.3:                                #   in Loop: Header=BB4_2 Depth=2
	movslq	%r14d, %rax
	leal	1(%r14), %ecx
	movl	%ecx, (%r15,%r12,4)
	movl	%ebp, (%r13,%rax,4)
	movl	%ecx, %r14d
.LBB4_4:                                #   in Loop: Header=BB4_2 Depth=2
	incl	%ebp
	cmpl	$512, %ebp                      # imm = 0x200
	jne	.LBB4_2
# %bb.5:                                #   in Loop: Header=BB4_1 Depth=1
	incq	%r12
	cmpq	$512, %r12                      # imm = 0x200
	jne	.LBB4_1
# %bb.6:
	movabsq	$4294967298, %r14               # imm = 0x100000002
	leaq	8(%rsp), %r13
	movl	$2048, %esi                     # imm = 0x800
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %rbp
	movl	$1048576, %esi                  # imm = 0x100000
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r12
	movl	$2048, %esi                     # imm = 0x800
	movq	%r12, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$2048, %edx                     # imm = 0x800
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$2048, %edx                     # imm = 0x800
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	254(%r14), %r13
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_8
# %bb.7:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z35__device_stub__initLabelsAndAdjListPiS_S_
.LBB4_8:                                # %.critedge
	callq	hipDeviceSynchronize
.LBB4_9:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_19 Depth 2
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_11
# %bb.10:                               #   in Loop: Header=BB4_9 Depth=1
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z27__device_stub__updateLabelsPiS_S_
.LBB4_11:                               #   in Loop: Header=BB4_9 Depth=1
	callq	hipDeviceSynchronize
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_13
# %bb.12:                               #   in Loop: Header=BB4_9 Depth=1
	movq	8(%rsp), %rdi
	callq	_Z29__device_stub__compressLabelsPi
.LBB4_13:                               #   in Loop: Header=BB4_9 Depth=1
	callq	hipDeviceSynchronize
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_15
# %bb.14:                               #   in Loop: Header=BB4_9 Depth=1
	movq	8(%rsp), %rdi
	callq	_Z30__device_stub__pathCompressionPi
.LBB4_15:                               #   in Loop: Header=BB4_9 Depth=1
	callq	hipDeviceSynchronize
	movl	$2048, %edi                     # imm = 0x800
	callq	_Znam
	movq	%rax, %rbp
	movq	8(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	movq	%rax, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_17
# %bb.16:                               #   in Loop: Header=BB4_9 Depth=1
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z27__device_stub__updateLabelsPiS_S_
.LBB4_17:                               #   in Loop: Header=BB4_9 Depth=1
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
.LBB4_19:                               #   Parent Loop BB4_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%rax,4), %ecx
	cmpl	(%rbp,%rax,4), %ecx
	jne	.LBB4_20
# %bb.18:                               #   in Loop: Header=BB4_19 Depth=2
	incq	%rax
	cmpq	$512, %rax                      # imm = 0x200
	jne	.LBB4_19
	jmp	.LBB4_21
.LBB4_20:                               #   in Loop: Header=BB4_9 Depth=1
	movq	%rbp, %rdi
	callq	_ZdaPv
	jmp	.LBB4_9
.LBB4_21:
	movq	%rbp, %rdi
	callq	_ZdaPv
	movq	8(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %r14d
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$30, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%r12d, %r12d
.LBB4_22:                               # =>This Inner Loop Header: Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r12d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r13
	movl	$.L.str.2, %esi
	movl	$14, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%rbx,%r12,4), %esi
	movq	%r13, %rdi
	callq	_ZNSolsEi
	movq	%rax, %r13
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r12
	cmpq	$512, %r12                      # imm = 0x200
	jne	.LBB4_22
# %bb.23:
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20initLabelsAndAdjListPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12updateLabelsPiS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14compressLabelsPi, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15pathCompressionPi, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z20initLabelsAndAdjListPiS_S_,@object # @_Z20initLabelsAndAdjListPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z20initLabelsAndAdjListPiS_S_
	.p2align	3, 0x0
_Z20initLabelsAndAdjListPiS_S_:
	.quad	_Z35__device_stub__initLabelsAndAdjListPiS_S_
	.size	_Z20initLabelsAndAdjListPiS_S_, 8

	.type	_Z12updateLabelsPiS_S_,@object  # @_Z12updateLabelsPiS_S_
	.globl	_Z12updateLabelsPiS_S_
	.p2align	3, 0x0
_Z12updateLabelsPiS_S_:
	.quad	_Z27__device_stub__updateLabelsPiS_S_
	.size	_Z12updateLabelsPiS_S_, 8

	.type	_Z14compressLabelsPi,@object    # @_Z14compressLabelsPi
	.globl	_Z14compressLabelsPi
	.p2align	3, 0x0
_Z14compressLabelsPi:
	.quad	_Z29__device_stub__compressLabelsPi
	.size	_Z14compressLabelsPi, 8

	.type	_Z15pathCompressionPi,@object   # @_Z15pathCompressionPi
	.globl	_Z15pathCompressionPi
	.p2align	3, 0x0
_Z15pathCompressionPi:
	.quad	_Z30__device_stub__pathCompressionPi
	.size	_Z15pathCompressionPi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Strongly Connected Components:"
	.size	.L.str, 31

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Node "
	.size	.L.str.1, 6

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" -> Component "
	.size	.L.str.2, 15

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20initLabelsAndAdjListPiS_S_"
	.size	.L__unnamed_1, 31

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12updateLabelsPiS_S_"
	.size	.L__unnamed_2, 23

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z14compressLabelsPi"
	.size	.L__unnamed_3, 21

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z15pathCompressionPi"
	.size	.L__unnamed_4, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__initLabelsAndAdjListPiS_S_
	.addrsig_sym _Z27__device_stub__updateLabelsPiS_S_
	.addrsig_sym _Z29__device_stub__compressLabelsPi
	.addrsig_sym _Z30__device_stub__pathCompressionPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z20initLabelsAndAdjListPiS_S_
	.addrsig_sym _Z12updateLabelsPiS_S_
	.addrsig_sym _Z14compressLabelsPi
	.addrsig_sym _Z15pathCompressionPi
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20initLabelsAndAdjListPiS_S_ ; -- Begin function _Z20initLabelsAndAdjListPiS_S_
	.globl	_Z20initLabelsAndAdjListPiS_S_
	.p2align	8
	.type	_Z20initLabelsAndAdjListPiS_S_,@function
_Z20initLabelsAndAdjListPiS_S_:         ; @_Z20initLabelsAndAdjListPiS_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x200, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_dual_mov_b32 v0, -1 :: v_dual_lshlrev_b32 v3, 9, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v9, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v6, vcc_lo
	global_store_b32 v[7:8], v1, off
	global_store_b32 v[2:3], v0, off
	global_store_b32 v[4:5], v9, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20initLabelsAndAdjListPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20initLabelsAndAdjListPiS_S_, .Lfunc_end0-_Z20initLabelsAndAdjListPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12updateLabelsPiS_S_  ; -- Begin function _Z12updateLabelsPiS_S_
	.globl	_Z12updateLabelsPiS_S_
	.p2align	8
	.type	_Z12updateLabelsPiS_S_,@function
_Z12updateLabelsPiS_S_:                 ; @_Z12updateLabelsPiS_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x200, v2
	s_cbranch_execz .LBB1_6
; %bb.1:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v3, 31, v2
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_mov_b32 s2, 0
	global_load_b32 v5, v[3:4], off
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(1)
	v_cmpx_lt_i32_e32 0, v5
	s_cbranch_execz .LBB1_5
; %bb.2:                                ; %.lr.ph
	v_lshlrev_b32_e32 v2, 9, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v[2:3], off
	v_add_nc_u32_e32 v5, -1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, 0, v5
	s_or_b32 s2, s0, s2
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0)
	v_min_i32_e32 v4, v4, v6
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB1_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_5:                                ; %Flow32
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off
.LBB1_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12updateLabelsPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12updateLabelsPiS_S_, .Lfunc_end1-_Z12updateLabelsPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 324
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14compressLabelsPi    ; -- Begin function _Z14compressLabelsPi
	.globl	_Z14compressLabelsPi
	.p2align	8
	.type	_Z14compressLabelsPi,@function
_Z14compressLabelsPi:                   ; @_Z14compressLabelsPi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x200, v1
	s_cbranch_execz .LBB2_4
; %bb.1:                                ; %.preheader.preheader
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v0, v1
	s_mov_b32 s2, 0
.LBB2_2:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v3, v0
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	global_load_b32 v0, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v3
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB2_2
; %bb.3:
	s_or_b32 exec_lo, exec_lo, s2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v3, off
.LBB2_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14compressLabelsPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z14compressLabelsPi, .Lfunc_end2-_Z14compressLabelsPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 192
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15pathCompressionPi   ; -- Begin function _Z15pathCompressionPi
	.globl	_Z15pathCompressionPi
	.p2align	8
	.type	_Z15pathCompressionPi,@function
_Z15pathCompressionPi:                  ; @_Z15pathCompressionPi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x200, v2
	s_cbranch_execz .LBB3_6
; %bb.1:                                ; %.preheader22.preheader
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v1, v2
	s_mov_b32 s2, 0
.LBB3_2:                                ; %.preheader22
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v0, v1
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v1, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v1, v0
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB3_2
; %bb.3:                                ; %.preheader
	s_or_b32 exec_lo, exec_lo, s2
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[2:3]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v3, v[1:2], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v3, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_6
; %bb.4:                                ; %.lr.ph.preheader
	s_mov_b32 s2, 0
.LBB3_5:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	global_store_b32 v[1:2], v0, off
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v3, v[1:2], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v3, v0
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB3_5
.LBB3_6:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15pathCompressionPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z15pathCompressionPi, .Lfunc_end3-_Z15pathCompressionPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
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amdhsa.version:
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...

	.end_amdgpu_metadata
