#include <iostream>
#include <cuda_runtime.h>

#define MAX_QUEUE_SIZE 128

// Structure to represent a node in the priority queue
struct Node {
    int priority;
    int value;
};

// Kernel to insert elements into the priority queue
__global__ void insertIntoPriorityQueue(Node *queue, int *size, Node element) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= *size) return;

    // Use shared memory to reduce global memory access latency
    __shared__ Node sharedQueue[MAX_QUEUE_SIZE];
    if (threadIdx.x < *size) {
        sharedQueue[threadIdx.x] = queue[threadIdx.x];
    }
    __syncthreads();

    // Insert the new element
    if (threadIdx.x == 0) {
        int i = *size - 1;
        while (i >= 0 && sharedQueue[i].priority < element.priority) {
            sharedQueue[i + 1] = sharedQueue[i];
            i--;
        }
        sharedQueue[i + 1] = element;
    }
    __syncthreads();

    // Write back to global memory
    if (threadIdx.x < *size) {
        queue[threadIdx.x] = sharedQueue[threadIdx.x];
    }
    if (threadIdx.x == 0) {
        queue[*size] = element;
        (*size)++;
    }
}

// Kernel to extract the maximum element from the priority queue
__global__ void extractMax(Node *queue, int *size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= *size) return;

    // Use shared memory to reduce global memory access latency
    __shared__ Node sharedQueue[MAX_QUEUE_SIZE];
    if (threadIdx.x < *size) {
        sharedQueue[threadIdx.x] = queue[threadIdx.x];
    }
    __syncthreads();

    // Extract the maximum element (first element in the queue)
    if (threadIdx.x == 0) {
        for (int i = 0; i < *size - 1; i++) {
            sharedQueue[i] = sharedQueue[i + 1];
        }
        (*size)--;
    }
    __syncthreads();

    // Write back to global memory
    if (threadIdx.x < *size) {
        queue[threadIdx.x] = sharedQueue[threadIdx.x];
    }
}

int main() {
    // Initialize host variables
    Node h_queue[MAX_QUEUE_SIZE];
    int h_size = 0;

    // Initialize device variables
    Node *d_queue;
    int *d_size;
    cudaMalloc((void**)&d_queue, MAX_QUEUE_SIZE * sizeof(Node));
    cudaMalloc((void**)&d_size, sizeof(int));
    cudaMemcpy(d_size, &h_size, sizeof(int), cudaMemcpyHostToDevice);

    // Define block and grid sizes
    dim3 blockSize(128);
    dim3 gridSize(1);

    // Insert elements into the priority queue
    for (int i = 0; i < 10; i++) {
        Node element = {rand() % 100, i};
        cudaMemcpy(d_queue + h_size, &element, sizeof(Node), cudaMemcpyHostToDevice);
        insertIntoPriorityQueue<<<gridSize, blockSize>>>(d_queue, d_size, element);
        cudaDeviceSynchronize();
        cudaMemcpy(&h_size, d_size, sizeof(int), cudaMemcpyDeviceToHost);
    }

    // Extract elements from the priority queue
    for (int i = 0; i < 5; i++) {
        extractMax<<<gridSize, blockSize>>>(d_queue, d_size);
        cudaDeviceSynchronize();
        cudaMemcpy(&h_size, d_size, sizeof(int), cudaMemcpyDeviceToHost);
    }

    // Copy results back to host
    cudaMemcpy(h_queue, d_queue, h_size * sizeof(Node), cudaMemcpyDeviceToHost);

    // Print the remaining elements in the priority queue
    std::cout << "Remaining elements in the priority queue:" << std::endl;
    for (int i = 0; i < h_size; i++) {
        std::cout << "Priority: " << h_queue[i].priority << ", Value: " << h_queue[i].value << std::endl;
    }

    // Free device memory
    cudaFree(d_queue);
    cudaFree(d_size);

    return 0;
}
	.file	"tmpxft_001d0c18_00000000-6_cuda_code_020620.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z51__device_stub__Z23insertIntoPriorityQueueP4NodePiS_P4NodePiRS_
	.type	_Z51__device_stub__Z23insertIntoPriorityQueueP4NodePiS_P4NodePiRS_, @function
_Z51__device_stub__Z23insertIntoPriorityQueueP4NodePiS_P4NodePiRS_:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rsp)
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdx, 96(%rsp)
	leaq	16(%rsp), %rdx
	movq	%rax, 80(%rsp)
	movq	%rsp, %rax
	movq	%rax, 88(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movl	$1, 40(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z23insertIntoPriorityQueueP4NodePiS_(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z51__device_stub__Z23insertIntoPriorityQueueP4NodePiS_P4NodePiRS_, .-_Z51__device_stub__Z23insertIntoPriorityQueueP4NodePiS_P4NodePiRS_
	.globl	_Z23insertIntoPriorityQueueP4NodePiS_
	.type	_Z23insertIntoPriorityQueueP4NodePiS_, @function
_Z23insertIntoPriorityQueueP4NodePiS_:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdx, 8(%rsp)
	leaq	8(%rsp), %rdx
	call	_Z51__device_stub__Z23insertIntoPriorityQueueP4NodePiS_P4NodePiRS_
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z23insertIntoPriorityQueueP4NodePiS_, .-_Z23insertIntoPriorityQueueP4NodePiS_
	.globl	_Z36__device_stub__Z10extractMaxP4NodePiP4NodePi
	.type	_Z36__device_stub__Z10extractMaxP4NodePiP4NodePi, @function
_Z36__device_stub__Z10extractMaxP4NodePiP4NodePi:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10extractMaxP4NodePi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L9:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z36__device_stub__Z10extractMaxP4NodePiP4NodePi, .-_Z36__device_stub__Z10extractMaxP4NodePiP4NodePi
	.globl	_Z10extractMaxP4NodePi
	.type	_Z10extractMaxP4NodePi, @function
_Z10extractMaxP4NodePi:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z10extractMaxP4NodePiP4NodePi
	.cfi_endproc
.LFE3663:
	.size	_Z10extractMaxP4NodePi, .-_Z10extractMaxP4NodePi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Remaining elements in the priority queue:"
.LC1:
	.string	"Priority: "
.LC2:
	.string	", Value: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$1024, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	$100, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	subq	$1112, %rsp
	.cfi_def_cfa_offset 1152
	movq	%fs:40, %rax
	movq	%rax, 1096(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	xorl	%eax, %eax
	leaq	12(%rsp), %rbp
	movl	%eax, 12(%rsp)
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	$33554433, %eax
	movl	$1, 56(%rsp)
	salq	$7, %rax
	movl	$1, 68(%rsp)
	movq	%rax, 48(%rsp)
	subq	$127, %rax
	movq	%rax, 60(%rsp)
.L16:
	call	rand@PLT
	leaq	32(%rsp), %rsi
	movl	$1, %ecx
	movl	%ebx, 36(%rsp)
	cltd
	idivl	%r12d
	movq	16(%rsp), %rax
	movl	%edx, 32(%rsp)
	movslq	12(%rsp), %rdx
	leaq	(%rax,%rdx,8), %rdi
	movl	$8, %edx
	call	cudaMemcpy@PLT
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	48(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	32(%rsp), %rax
	movq	24(%rsp), %rsi
	leaq	40(%rsp), %rdx
	movq	16(%rsp), %rdi
	movq	%rax, 40(%rsp)
	call	_Z51__device_stub__Z23insertIntoPriorityQueueP4NodePiS_P4NodePiRS_
.L15:
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %rsi
	movq	%rbp, %rdi
	incl	%ebx
	movl	$2, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	cmpl	$10, %ebx
	jne	.L16
	movl	$5, %ebx
.L18:
	movl	56(%rsp), %ecx
	movq	48(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	60(%rsp), %rdi
	movl	68(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z36__device_stub__Z10extractMaxP4NodePiP4NodePi
.L17:
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	decl	%ebx
	jne	.L18
	movslq	12(%rsp), %rdx
	movq	16(%rsp), %rsi
	xorl	%ebx, %ebx
	leaq	72(%rsp), %rbp
	movl	$2, %ecx
	movq	%rbp, %rdi
	leaq	_ZSt4cout(%rip), %r12
	salq	$3, %rdx
	leaq	.LC1(%rip), %r13
	call	cudaMemcpy@PLT
	leaq	.LC0(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L19:
	cmpl	%ebx, 12(%rsp)
	jle	.L25
	movq	%r13, %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	0(%rbp,%rbx,8), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	4(%rbp,%rbx,8), %esi
	incq	%rbx
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L19
.L25:
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	1096(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$1112, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z10extractMaxP4NodePi"
.LC4:
	.string	"_Z23insertIntoPriorityQueueP4NodePiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10extractMaxP4NodePi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z23insertIntoPriorityQueueP4NodePiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

#define MAX_QUEUE_SIZE 128

// Structure to represent a node in the priority queue
struct Node {
    int priority;
    int value;
};

// Kernel to insert elements into the priority queue
__global__ void insertIntoPriorityQueue(Node *queue, int *size, Node element) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= *size) return;

    // Use shared memory to reduce global memory access latency
    __shared__ Node sharedQueue[MAX_QUEUE_SIZE];
    if (threadIdx.x < *size) {
        sharedQueue[threadIdx.x] = queue[threadIdx.x];
    }
    __syncthreads();

    // Insert the new element
    if (threadIdx.x == 0) {
        int i = *size - 1;
        while (i >= 0 && sharedQueue[i].priority < element.priority) {
            sharedQueue[i + 1] = sharedQueue[i];
            i--;
        }
        sharedQueue[i + 1] = element;
    }
    __syncthreads();

    // Write back to global memory
    if (threadIdx.x < *size) {
        queue[threadIdx.x] = sharedQueue[threadIdx.x];
    }
    if (threadIdx.x == 0) {
        queue[*size] = element;
        (*size)++;
    }
}

// Kernel to extract the maximum element from the priority queue
__global__ void extractMax(Node *queue, int *size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= *size) return;

    // Use shared memory to reduce global memory access latency
    __shared__ Node sharedQueue[MAX_QUEUE_SIZE];
    if (threadIdx.x < *size) {
        sharedQueue[threadIdx.x] = queue[threadIdx.x];
    }
    __syncthreads();

    // Extract the maximum element (first element in the queue)
    if (threadIdx.x == 0) {
        for (int i = 0; i < *size - 1; i++) {
            sharedQueue[i] = sharedQueue[i + 1];
        }
        (*size)--;
    }
    __syncthreads();

    // Write back to global memory
    if (threadIdx.x < *size) {
        queue[threadIdx.x] = sharedQueue[threadIdx.x];
    }
}

int main() {
    // Initialize host variables
    Node h_queue[MAX_QUEUE_SIZE];
    int h_size = 0;

    // Initialize device variables
    Node *d_queue;
    int *d_size;
    hipMalloc((void**)&d_queue, MAX_QUEUE_SIZE * sizeof(Node));
    hipMalloc((void**)&d_size, sizeof(int));
    hipMemcpy(d_size, &h_size, sizeof(int), hipMemcpyHostToDevice);

    // Define block and grid sizes
    dim3 blockSize(128);
    dim3 gridSize(1);

    // Insert elements into the priority queue
    for (int i = 0; i < 10; i++) {
        Node element = {rand() % 100, i};
        hipMemcpy(d_queue + h_size, &element, sizeof(Node), hipMemcpyHostToDevice);
        insertIntoPriorityQueue<<<gridSize, blockSize>>>(d_queue, d_size, element);
        hipDeviceSynchronize();
        hipMemcpy(&h_size, d_size, sizeof(int), hipMemcpyDeviceToHost);
    }

    // Extract elements from the priority queue
    for (int i = 0; i < 5; i++) {
        extractMax<<<gridSize, blockSize>>>(d_queue, d_size);
        hipDeviceSynchronize();
        hipMemcpy(&h_size, d_size, sizeof(int), hipMemcpyDeviceToHost);
    }

    // Copy results back to host
    hipMemcpy(h_queue, d_queue, h_size * sizeof(Node), hipMemcpyDeviceToHost);

    // Print the remaining elements in the priority queue
    std::cout << "Remaining elements in the priority queue:" << std::endl;
    for (int i = 0; i < h_size; i++) {
        std::cout << "Priority: " << h_queue[i].priority << ", Value: " << h_queue[i].value << std::endl;
    }

    // Free device memory
    hipFree(d_queue);
    hipFree(d_size);

    return 0;
}
	.text
	.file	"cuda_code_020620.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z38__device_stub__insertIntoPriorityQueueP4NodePiS_ # -- Begin function _Z38__device_stub__insertIntoPriorityQueueP4NodePiS_
	.type	_Z38__device_stub__insertIntoPriorityQueueP4NodePiS_,@function
_Z38__device_stub__insertIntoPriorityQueueP4NodePiS_: # @_Z38__device_stub__insertIntoPriorityQueueP4NodePiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdx, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rax, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23insertIntoPriorityQueueP4NodePiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z38__device_stub__insertIntoPriorityQueueP4NodePiS_, .Lfunc_end0-_Z38__device_stub__insertIntoPriorityQueueP4NodePiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__extractMaxP4NodePi # -- Begin function _Z25__device_stub__extractMaxP4NodePi
	.type	_Z25__device_stub__extractMaxP4NodePi,@function
_Z25__device_stub__extractMaxP4NodePi:  # @_Z25__device_stub__extractMaxP4NodePi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10extractMaxP4NodePi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__extractMaxP4NodePi, .Lfunc_end1-_Z25__device_stub__extractMaxP4NodePi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1064, %rsp                     # imm = 0x428
	.cfi_def_cfa_offset 1120
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	leaq	12(%rsp), %r15
	movl	$0, (%r15)
	leaq	24(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	leaq	16(%rsp), %r14
	movl	$4, %esi
	movq	%r14, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$4, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%r13d, %r13d
	leaq	32(%rsp), %r12
	leaq	127(%rbx), %r14
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movl	%eax, 32(%rsp)
	movl	%r13d, 36(%rsp)
	movslq	12(%rsp), %rdi
	shlq	$3, %rdi
	addq	24(%rsp), %rdi
	movl	$8, %edx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_3
# %bb.2:                                #   in Loop: Header=BB2_1 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	32(%rsp), %rdx
	callq	_Z38__device_stub__insertIntoPriorityQueueP4NodePiS_
.LBB2_3:                                #   in Loop: Header=BB2_1 Depth=1
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movl	$4, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	incl	%r13d
	cmpl	$10, %r13d
	jne	.LBB2_1
# %bb.4:                                # %.preheader.preheader
	movl	$5, %ebp
	leaq	12(%rsp), %r15
.LBB2_5:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_7
# %bb.6:                                #   in Loop: Header=BB2_5 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	callq	_Z25__device_stub__extractMaxP4NodePi
.LBB2_7:                                #   in Loop: Header=BB2_5 Depth=1
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movl	$4, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	decl	%ebp
	jne	.LBB2_5
# %bb.8:
	movq	24(%rsp), %rsi
	movslq	12(%rsp), %rdx
	shlq	$3, %rdx
	leaq	32(%rsp), %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$41, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	cmpl	$0, 12(%rsp)
	jle	.LBB2_11
# %bb.9:                                # %.lr.ph.preheader
	xorl	%r14d, %r14d
.LBB2_10:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	32(%rsp,%r14,8), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.2, %esi
	movl	$9, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	36(%rsp,%r14,8), %esi
	movq	%rbx, %rdi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r14
	movslq	12(%rsp), %rax
	cmpq	%rax, %r14
	jl	.LBB2_10
.LBB2_11:                               # %._crit_edge
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$1064, %rsp                     # imm = 0x428
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23insertIntoPriorityQueueP4NodePiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10extractMaxP4NodePi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z23insertIntoPriorityQueueP4NodePiS_,@object # @_Z23insertIntoPriorityQueueP4NodePiS_
	.section	.rodata,"a",@progbits
	.globl	_Z23insertIntoPriorityQueueP4NodePiS_
	.p2align	3, 0x0
_Z23insertIntoPriorityQueueP4NodePiS_:
	.quad	_Z38__device_stub__insertIntoPriorityQueueP4NodePiS_
	.size	_Z23insertIntoPriorityQueueP4NodePiS_, 8

	.type	_Z10extractMaxP4NodePi,@object  # @_Z10extractMaxP4NodePi
	.globl	_Z10extractMaxP4NodePi
	.p2align	3, 0x0
_Z10extractMaxP4NodePi:
	.quad	_Z25__device_stub__extractMaxP4NodePi
	.size	_Z10extractMaxP4NodePi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Remaining elements in the priority queue:"
	.size	.L.str, 42

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Priority: "
	.size	.L.str.1, 11

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	", Value: "
	.size	.L.str.2, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z23insertIntoPriorityQueueP4NodePiS_"
	.size	.L__unnamed_1, 38

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10extractMaxP4NodePi"
	.size	.L__unnamed_2, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z38__device_stub__insertIntoPriorityQueueP4NodePiS_
	.addrsig_sym _Z25__device_stub__extractMaxP4NodePi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z23insertIntoPriorityQueueP4NodePiS_
	.addrsig_sym _Z10extractMaxP4NodePi
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z23insertIntoPriorityQueueP4NodePiS_ ; -- Begin function _Z23insertIntoPriorityQueueP4NodePiS_
	.globl	_Z23insertIntoPriorityQueueP4NodePiS_
	.p2align	8
	.type	_Z23insertIntoPriorityQueueP4NodePiS_,@function
_Z23insertIntoPriorityQueueP4NodePiS_:  ; @_Z23insertIntoPriorityQueueP4NodePiS_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s2, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_load_b32 s8, s[6:7], 0x0
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB0_16
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x10
	v_lshlrev_b32_e32 v1, 3, v0
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e64 s8, v0
	s_cbranch_execz .LBB0_3
; %bb.2:
	global_load_b64 v[2:3], v1, s[4:5]
	s_waitcnt vmcnt(0)
	ds_store_b64 v1, v[2:3]
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_eq_u32_e64 s0, 0, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_12
; %bb.4:
	s_load_b32 s8, s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s8, 1
	s_cbranch_scc1 .LBB0_10
; %bb.5:                                ; %.lr.ph.preheader
	s_lshl_b32 s9, s8, 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s9, s9, -8
.LBB0_6:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s9
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, s2, v2
	s_cbranch_vccnz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	v_mov_b32_e32 v4, s9
	s_add_i32 s12, s8, -1
	s_add_i32 s9, s9, -8
	s_cmp_lt_u32 s8, 2
	s_mov_b32 s10, 0
	ds_load_b64 v[2:3], v4
	s_cselect_b32 s11, -1, 0
	s_mov_b32 s8, s12
	s_waitcnt lgkmcnt(0)
	ds_store_b64 v4, v[2:3] offset:8
	s_branch .LBB0_9
.LBB0_8:                                ;   in Loop: Header=BB0_6 Depth=1
	s_mov_b32 s10, s8
	s_mov_b32 s11, -1
                                        ; implicit-def: $sgpr8
                                        ; implicit-def: $sgpr9
.LBB0_9:                                ; %Flow38
                                        ;   in Loop: Header=BB0_6 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s11
	s_cbranch_vccnz .LBB0_6
	s_branch .LBB0_11
.LBB0_10:
	s_mov_b32 s10, s8
.LBB0_11:                               ; %.critedge
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s8, s10, 3
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	v_mov_b32_e32 v4, s8
	ds_store_b64 v4, v[2:3]
.LBB0_12:                               ; %Flow41
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_load_b32 s1, s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, s1, v0
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB0_14
; %bb.13:
	ds_load_b64 v[2:3], v1
	s_waitcnt lgkmcnt(0)
	global_store_b64 v1, v[2:3], s[4:5]
.LBB0_14:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_16
; %bb.15:
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v3, s3
	v_mov_b32_e32 v2, s2
	global_load_b32 v0, v4, s[6:7]
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
	global_load_b32 v0, v4, s[6:7]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	global_store_b32 v4, v0, s[6:7]
.LBB0_16:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23insertIntoPriorityQueueP4NodePiS_
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z23insertIntoPriorityQueueP4NodePiS_, .Lfunc_end0-_Z23insertIntoPriorityQueueP4NodePiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 504
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10extractMaxP4NodePi  ; -- Begin function _Z10extractMaxP4NodePi
	.globl	_Z10extractMaxP4NodePi
	.p2align	8
	.type	_Z10extractMaxP4NodePi,@function
_Z10extractMaxP4NodePi:                 ; @_Z10extractMaxP4NodePi
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s1, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_load_b32 s0, s[6:7], 0x0
	s_and_b32 s1, s1, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s1, v[0:1]
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s0, v1
	s_cbranch_execz .LBB1_10
; %bb.1:
	v_cmp_gt_u32_e32 vcc_lo, s0, v0
	v_lshlrev_b32_e32 v1, 3, v0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB1_3
; %bb.2:
	global_load_b64 v[2:3], v1, s[4:5]
	s_waitcnt vmcnt(0)
	ds_store_b64 v1, v[2:3]
.LBB1_3:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_8
; %bb.4:                                ; %.preheader
	s_load_b32 s2, s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s1, s2, -1
	s_cmp_lt_i32 s2, 2
	s_cbranch_scc1 .LBB1_7
; %bb.5:                                ; %.lr.ph.preheader
	s_mov_b32 s3, 0
	s_mov_b32 s2, s1
.LBB1_6:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v4, s3
	s_add_i32 s2, s2, -1
	s_add_i32 s3, s3, 8
	s_cmp_eq_u32 s2, 0
	ds_load_b64 v[2:3], v4 offset:8
	s_waitcnt lgkmcnt(0)
	ds_store_b64 v4, v[2:3]
	s_cbranch_scc0 .LBB1_6
.LBB1_7:                                ; %._crit_edge
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v2, v3, s[6:7]
.LBB1_8:                                ; %Flow23
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v2, 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v2, v2, s[6:7]
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v0, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_10
; %bb.9:
	ds_load_b64 v[2:3], v1
	s_waitcnt lgkmcnt(0)
	global_store_b64 v1, v[2:3], s[4:5]
.LBB1_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10extractMaxP4NodePi
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10extractMaxP4NodePi, .Lfunc_end1-_Z10extractMaxP4NodePi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 316
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23insertIntoPriorityQueueP4NodePiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z23insertIntoPriorityQueueP4NodePiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10extractMaxP4NodePi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10extractMaxP4NodePi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
