// Include necessary headers
#include <iostream>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>

// Define the resolution of the 1440p frame
#define WIDTH 2560
#define HEIGHT 1440

// Kernel to process a block of the frame
__global__ void processFrameKernel(unsigned char* frame, int width, int height) {
    int x = blockIdx.x * blockDim.x + threadIdx.x;
    int y = blockIdx.y * blockDim.y + threadIdx.y;

    if (x < width && y < height) {
        int index = y * width + x;
        // Simple grayscale conversion for demonstration
        unsigned char r = frame[index * 3];
        unsigned char g = frame[index * 3 + 1];
        unsigned char b = frame[index * 3 + 2];
        unsigned char gray = (unsigned char)(0.299f * r + 0.587f * g + 0.114f * b);
        frame[index * 3] = gray;
        frame[index * 3 + 1] = gray;
        frame[index * 3 + 2] = gray;
    }
}

// Main function to demonstrate the kernel's usage
int main() {
    int numDevices;
    cudaGetDeviceCount(&numDevices);

    if (numDevices < 1) {
        std::cerr << "No CUDA devices found!" << std::endl;
        return -1;
    }

    // Allocate memory for the frame on the host
    size_t frameSize = WIDTH * HEIGHT * 3 * sizeof(unsigned char);
    unsigned char* h_frame = new unsigned char[frameSize];

    // Initialize the frame with some data (random or predefined)
    for (size_t i = 0; i < frameSize; ++i) {
        h_frame[i] = rand() % 256;
    }

    // Allocate memory for the frame on each device
    unsigned char** d_frames = new unsigned char*[numDevices];
    for (int i = 0; i < numDevices; ++i) {
        cudaSetDevice(i);
        cudaMalloc(&d_frames[i], frameSize);
        cudaMemcpy(d_frames[i], h_frame, frameSize, cudaMemcpyHostToDevice);
    }

    // Define block and grid sizes
    dim3 blockSize(16, 16);
    dim3 gridSize((WIDTH + blockSize.x - 1) / blockSize.x, (HEIGHT + blockSize.y - 1) / blockSize.y);

    // Launch the kernel on each device
    for (int i = 0; i < numDevices; ++i) {
        cudaSetDevice(i);
        processFrameKernel<<<gridSize, blockSize>>>(d_frames[i], WIDTH, HEIGHT);
        cudaDeviceSynchronize();

        // Check for errors
        cudaError_t err = cudaGetLastError();
        if (err != cudaSuccess) {
            std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
            return -1;
        }
    }

    // Copy the processed frame back to the host from the first device for demonstration
    cudaSetDevice(0);
    cudaMemcpy(h_frame, d_frames[0], frameSize, cudaMemcpyDeviceToHost);

    // Free device memory
    for (int i = 0; i < numDevices; ++i) {
        cudaSetDevice(i);
        cudaFree(d_frames[i]);
    }
    delete[] d_frames;

    // Free host memory
    delete[] h_frame;

    std::cout << "Frame processed successfully on " << numDevices << " devices." << std::endl;
    return 0;
}
	.file	"tmpxft_00029f79_00000000-6_cuda_code_060367.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z40__device_stub__Z18processFrameKernelPhiiPhii
	.type	_Z40__device_stub__Z18processFrameKernelPhiiPhii, @function
_Z40__device_stub__Z18processFrameKernelPhiiPhii:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18processFrameKernelPhii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z40__device_stub__Z18processFrameKernelPhiiPhii, .-_Z40__device_stub__Z18processFrameKernelPhiiPhii
	.globl	_Z18processFrameKernelPhii
	.type	_Z18processFrameKernelPhii, @function
_Z18processFrameKernelPhii:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z18processFrameKernelPhiiPhii
	.cfi_endproc
.LFE3661:
	.size	_Z18processFrameKernelPhii, .-_Z18processFrameKernelPhii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"No CUDA devices found!"
.LC1:
	.string	"CUDA error: "
.LC2:
	.string	"Frame processed successfully on "
.LC3:
	.string	" devices."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	cmpl	$0, 12(%rsp)
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	jle	.L27
	movl	$11059200, %edi
	xorl	%ebx, %ebx
	movl	$256, %r12d
	call	_Znam@PLT
	movq	%rax, %rbp
.L11:
	call	rand@PLT
	cltd
	idivl	%r12d
	movb	%dl, 0(%rbp,%rbx)
	incq	%rbx
	cmpq	$11059200, %rbx
	jne	.L11
	movabsq	$1152921504606846975, %rax
	movslq	12(%rsp), %rdi
	cmpq	%rdi, %rax
	jb	.L12
	salq	$3, %rdi
	xorl	%r12d, %r12d
	call	_Znam@PLT
	movq	%rax, %rbx
	movq	%rax, %r13
	jmp	.L13
.L12:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L28
	call	__cxa_throw_bad_array_new_length@PLT
.L13:
	cmpl	%r12d, 12(%rsp)
	jle	.L29
	movl	%r12d, %edi
	incl	%r12d
	call	cudaSetDevice@PLT
	movq	%r13, %rdi
	movl	$11059200, %esi
	addq	$8, %r13
	call	cudaMalloc@PLT
	movq	-8(%r13), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$11059200, %edx
	call	cudaMemcpy@PLT
	jmp	.L13
.L29:
	movabsq	$386547056800, %rax
	movl	$1, 24(%rsp)
	xorl	%r12d, %r12d
	movabsq	$68719476752, %r14
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
.L16:
	movl	%r12d, %edi
	cmpl	%r12d, 12(%rsp)
	jle	.L30
	call	cudaSetDevice@PLT
	movl	24(%rsp), %ecx
	movl	36(%rsp), %esi
	xorl	%r9d, %r9d
	movq	28(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	(%rbx,%r12,8), %rdi
	movl	$1440, %edx
	movl	$2560, %esi
	call	_Z40__device_stub__Z18processFrameKernelPhiiPhii
.L17:
	call	cudaDeviceSynchronize@PLT
	incq	%r12
	call	cudaGetLastError@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	je	.L16
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r13d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
.L27:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L8
.L30:
	xorl	%edi, %edi
	xorl	%r12d, %r12d
	call	cudaSetDevice@PLT
	movq	(%rbx), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$11059200, %edx
	call	cudaMemcpy@PLT
.L20:
	movl	%r12d, %edi
	cmpl	%r12d, 12(%rsp)
	jle	.L31
	call	cudaSetDevice@PLT
	movq	(%rbx,%r12,8), %rdi
	incq	%r12
	call	cudaFree@PLT
	jmp	.L20
.L31:
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	12(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	xorl	%eax, %eax
.L8:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L22
.L28:
	call	__stack_chk_fail@PLT
.L22:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z18processFrameKernelPhii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18processFrameKernelPhii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Include necessary headers
#include <iostream>
#include <hip/hip_runtime.h>


// Define the resolution of the 1440p frame
#define WIDTH 2560
#define HEIGHT 1440

// Kernel to process a block of the frame
__global__ void processFrameKernel(unsigned char* frame, int width, int height) {
    int x = blockIdx.x * blockDim.x + threadIdx.x;
    int y = blockIdx.y * blockDim.y + threadIdx.y;

    if (x < width && y < height) {
        int index = y * width + x;
        // Simple grayscale conversion for demonstration
        unsigned char r = frame[index * 3];
        unsigned char g = frame[index * 3 + 1];
        unsigned char b = frame[index * 3 + 2];
        unsigned char gray = (unsigned char)(0.299f * r + 0.587f * g + 0.114f * b);
        frame[index * 3] = gray;
        frame[index * 3 + 1] = gray;
        frame[index * 3 + 2] = gray;
    }
}

// Main function to demonstrate the kernel's usage
int main() {
    int numDevices;
    hipGetDeviceCount(&numDevices);

    if (numDevices < 1) {
        std::cerr << "No CUDA devices found!" << std::endl;
        return -1;
    }

    // Allocate memory for the frame on the host
    size_t frameSize = WIDTH * HEIGHT * 3 * sizeof(unsigned char);
    unsigned char* h_frame = new unsigned char[frameSize];

    // Initialize the frame with some data (random or predefined)
    for (size_t i = 0; i < frameSize; ++i) {
        h_frame[i] = rand() % 256;
    }

    // Allocate memory for the frame on each device
    unsigned char** d_frames = new unsigned char*[numDevices];
    for (int i = 0; i < numDevices; ++i) {
        hipSetDevice(i);
        hipMalloc(&d_frames[i], frameSize);
        hipMemcpy(d_frames[i], h_frame, frameSize, hipMemcpyHostToDevice);
    }

    // Define block and grid sizes
    dim3 blockSize(16, 16);
    dim3 gridSize((WIDTH + blockSize.x - 1) / blockSize.x, (HEIGHT + blockSize.y - 1) / blockSize.y);

    // Launch the kernel on each device
    for (int i = 0; i < numDevices; ++i) {
        hipSetDevice(i);
        processFrameKernel<<<gridSize, blockSize>>>(d_frames[i], WIDTH, HEIGHT);
        hipDeviceSynchronize();

        // Check for errors
        hipError_t err = hipGetLastError();
        if (err != hipSuccess) {
            std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
            return -1;
        }
    }

    // Copy the processed frame back to the host from the first device for demonstration
    hipSetDevice(0);
    hipMemcpy(h_frame, d_frames[0], frameSize, hipMemcpyDeviceToHost);

    // Free device memory
    for (int i = 0; i < numDevices; ++i) {
        hipSetDevice(i);
        hipFree(d_frames[i]);
    }
    delete[] d_frames;

    // Free host memory
    delete[] h_frame;

    std::cout << "Frame processed successfully on " << numDevices << " devices." << std::endl;
    return 0;
}
	.text
	.file	"cuda_code_060367.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__processFrameKernelPhii # -- Begin function _Z33__device_stub__processFrameKernelPhii
	.type	_Z33__device_stub__processFrameKernelPhii,@function
_Z33__device_stub__processFrameKernelPhii: # @_Z33__device_stub__processFrameKernelPhii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18processFrameKernelPhii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__processFrameKernelPhii, .Lfunc_end0-_Z33__device_stub__processFrameKernelPhii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	4(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	cmpl	$0, (%rbx)
	jle	.LBB1_16
# %bb.1:
	movl	$11059200, %edi                 # imm = 0xA8C000
	callq	_Znam
	movq	%rax, %rbx
	xorl	%r14d, %r14d
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	movb	%al, (%rbx,%r14)
	incq	%r14
	cmpq	$11059200, %r14                 # imm = 0xA8C000
	jne	.LBB1_2
# %bb.3:
	movslq	4(%rsp), %r15
	leaq	(,%r15,8), %rax
	testq	%r15, %r15
	movq	$-1, %rdi
	cmovnsq	%rax, %rdi
	callq	_Znam
	movq	%rax, %r14
	testq	%r15, %r15
	jle	.LBB1_12
# %bb.4:                                # %.lr.ph.preheader
	xorl	%r15d, %r15d
	movq	%r14, %r12
.LBB1_5:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%r15d, %edi
	callq	hipSetDevice
	movl	$11059200, %esi                 # imm = 0xA8C000
	movq	%r12, %rdi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$11059200, %edx                 # imm = 0xA8C000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	incq	%r15
	movslq	4(%rsp), %rax
	addq	$8, %r12
	cmpq	%rax, %r15
	jl	.LBB1_5
# %bb.6:                                # %.preheader
	testl	%eax, %eax
	jle	.LBB1_12
# %bb.7:                                # %.lr.ph61.preheader
	xorl	%r15d, %r15d
	movabsq	$386547056800, %r12             # imm = 0x5A000000A0
	movabsq	$68719476752, %r13              # imm = 0x1000000010
.LBB1_8:                                # %.lr.ph61
                                        # =>This Inner Loop Header: Depth=1
	movl	%r15d, %edi
	callq	hipSetDevice
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.9:                                #   in Loop: Header=BB1_8 Depth=1
	movq	(%r14,%r15,8), %rdi
	movl	$2560, %esi                     # imm = 0xA00
	movl	$1440, %edx                     # imm = 0x5A0
	callq	_Z33__device_stub__processFrameKernelPhii
.LBB1_10:                               #   in Loop: Header=BB1_8 Depth=1
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_20
# %bb.11:                               #   in Loop: Header=BB1_8 Depth=1
	incq	%r15
	movslq	4(%rsp), %rax
	cmpq	%rax, %r15
	jl	.LBB1_8
.LBB1_12:                               # %._crit_edge
	xorl	%ebp, %ebp
	xorl	%edi, %edi
	callq	hipSetDevice
	movq	(%r14), %rsi
	movl	$11059200, %edx                 # imm = 0xA8C000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$0, 4(%rsp)
	jle	.LBB1_15
# %bb.13:                               # %.lr.ph64.preheader
	xorl	%r15d, %r15d
.LBB1_14:                               # %.lr.ph64
                                        # =>This Inner Loop Header: Depth=1
	movl	%r15d, %edi
	callq	hipSetDevice
	movq	(%r14,%r15,8), %rdi
	callq	hipFree
	incq	%r15
	movslq	4(%rsp), %rax
	cmpq	%rax, %r15
	jl	.LBB1_14
.LBB1_15:                               # %._crit_edge65
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%rbx, %rdi
	callq	_ZdaPv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	4(%rsp), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.3, %esi
	movl	$9, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_19
.LBB1_16:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$22, %edx
.LBB1_17:                               # %.thread55
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB1_18:                               # %.thread55
	movl	$-1, %ebp
.LBB1_19:                               # %.thread55
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	%ebp, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_20:
	.cfi_def_cfa_offset 64
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_22
# %bb.21:
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%r14, %rsi
	movq	%rax, %rdx
	jmp	.LBB1_17
.LBB1_22:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
	jmp	.LBB1_18
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18processFrameKernelPhii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18processFrameKernelPhii,@object # @_Z18processFrameKernelPhii
	.section	.rodata,"a",@progbits
	.globl	_Z18processFrameKernelPhii
	.p2align	3, 0x0
_Z18processFrameKernelPhii:
	.quad	_Z33__device_stub__processFrameKernelPhii
	.size	_Z18processFrameKernelPhii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"No CUDA devices found!"
	.size	.L.str, 23

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"CUDA error: "
	.size	.L.str.1, 13

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Frame processed successfully on "
	.size	.L.str.2, 33

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" devices."
	.size	.L.str.3, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18processFrameKernelPhii"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__processFrameKernelPhii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18processFrameKernelPhii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18processFrameKernelPhii ; -- Begin function _Z18processFrameKernelPhii
	.globl	_Z18processFrameKernelPhii
	.p2align	8
	.type	_Z18processFrameKernelPhii,@function
_Z18processFrameKernelPhii:             ; @_Z18processFrameKernelPhii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b64 s[4:5], s[0:1], 0x8
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v0, v2, 1, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_clause 0x1
	global_load_u16 v2, v[0:1], off
	global_load_u8 v3, v[0:1], off offset:2
	s_waitcnt vmcnt(1)
	v_cvt_f32_ubyte1_e32 v4, v2
	v_cvt_f32_ubyte0_e32 v2, v2
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, 0x3f1645a2, v4
	v_fmamk_f32 v2, v2, 0x3e991687, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v2, v3, 0x3de978d5, v2
	v_cvt_i32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b16 v3, 8, v2
	v_or_b32_e32 v3, v2, v3
	s_clause 0x1
	global_store_b8 v[0:1], v2, off offset:2
	global_store_b16 v[0:1], v3, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18processFrameKernelPhii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18processFrameKernelPhii, .Lfunc_end0-_Z18processFrameKernelPhii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18processFrameKernelPhii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18processFrameKernelPhii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
