#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>

#define NUM_LAYERS 12
#define NUM_NEURONS 2048
#define BATCH_SIZE 256
#define LEARNING_RATE 0.01f

__global__ void initializeWeights(float *weights, int numWeights) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < numWeights) {
        curandState state;
        curand_init((unsigned long long)clock() + idx, 0, 0, &state);
        weights[idx] = curand_uniform(&state) * 0.01f;
    }
}

__global__ void forwardPass(float *inputs, float *weights, float *outputs, int numLayers, int numNeurons, int batchSize) {
    extern __shared__ float sharedMem[];
    int neuronIdx = threadIdx.x;
    int batchIdx = blockIdx.x;

    for (int layer = 0; layer < numLayers; ++layer) {
        float sum = 0.0f;
        for (int i = 0; i < numNeurons; ++i) {
            int weightIdx = layer * numNeurons * numNeurons + neuronIdx * numNeurons + i;
            int inputIdx = (layer == 0) ? i * batchSize + batchIdx : (layer - 1) * numNeurons * batchSize + i * batchSize + batchIdx;
            sum += weights[weightIdx] * inputs[inputIdx];
        }
        sharedMem[neuronIdx] = 1.0f / (1.0f + expf(-sum)); // Sigmoid activation
        __syncthreads();

        if (neuronIdx < numNeurons) {
            outputs[layer * numNeurons * batchSize + neuronIdx * batchSize + batchIdx] = sharedMem[neuronIdx];
        }
        __syncthreads();
    }
}

__global__ void backwardPass(float *outputs, float *weights, float *deltas, float *errors, int numLayers, int numNeurons, int batchSize) {
    extern __shared__ float sharedMem[];
    int neuronIdx = threadIdx.x;
    int batchIdx = blockIdx.x;

    for (int layer = numLayers - 1; layer >= 0; --layer) {
        float delta = 0.0f;
        if (layer == numLayers - 1) {
            int outputIdx = layer * numNeurons * batchSize + neuronIdx * batchSize + batchIdx;
            delta = (outputs[outputIdx] - errors[batchIdx]) * outputs[outputIdx] * (1.0f - outputs[outputIdx]);
        } else {
            float sum = 0.0f;
            for (int i = 0; i < numNeurons; ++i) {
                int weightIdx = (layer + 1) * numNeurons * numNeurons + i * numNeurons + neuronIdx;
                int deltaIdx = (layer + 1) * numNeurons * batchSize + i * batchSize + batchIdx;
                sum += weights[weightIdx] * deltas[deltaIdx];
            }
            int outputIdx = layer * numNeurons * batchSize + neuronIdx * batchSize + batchIdx;
            delta = sum * outputs[outputIdx] * (1.0f - outputs[outputIdx]);
        }
        sharedMem[neuronIdx] = delta;
        __syncthreads();

        if (neuronIdx < numNeurons) {
            deltas[layer * numNeurons * batchSize + neuronIdx * batchSize + batchIdx] = sharedMem[neuronIdx];
        }
        __syncthreads();
    }
}

__global__ void updateWeights(float *weights, float *outputs, float *deltas, int numLayers, int numNeurons, int batchSize, float learningRate) {
    int neuronIdx = threadIdx.x;
    int batchIdx = blockIdx.x;

    for (int layer = 0; layer < numLayers; ++layer) {
        for (int i = 0; i < numNeurons; ++i) {
            int weightIdx = layer * numNeurons * numNeurons + neuronIdx * numNeurons + i;
            int outputIdx = (layer == 0) ? i * batchSize + batchIdx : (layer - 1) * numNeurons * batchSize + i * batchSize + batchIdx;
            int deltaIdx = layer * numNeurons * batchSize + neuronIdx * batchSize + batchIdx;
            atomicAdd(&weights[weightIdx], -learningRate * outputs[outputIdx] * deltas[deltaIdx]);
        }
    }
}

int main() {
    float *d_inputs, *d_weights, *d_outputs, *d_deltas, *d_errors;
    int numWeights = NUM_LAYERS * NUM_NEURONS * NUM_NEURONS;
    int numOutputs = NUM_LAYERS * NUM_NEURONS * BATCH_SIZE;

    cudaError_t err = cudaMalloc((void**)&d_inputs, NUM_NEURONS * BATCH_SIZE * sizeof(float));
    if (err != cudaSuccess) { std::cerr << "Error allocating d_inputs: " << cudaGetErrorString(err) << std::endl; return -1; }

    err = cudaMalloc((void**)&d_weights, numWeights * sizeof(float));
    if (err != cudaSuccess) { std::cerr << "Error allocating d_weights: " << cudaGetErrorString(err) << std::endl; return -1; }

    err = cudaMalloc((void**)&d_outputs, numOutputs * sizeof(float));
    if (err != cudaSuccess) { std::cerr << "Error allocating d_outputs: " << cudaGetErrorString(err) << std::endl; return -1; }

    err = cudaMalloc((void**)&d_deltas, numOutputs * sizeof(float));
    if (err != cudaSuccess) { std::cerr << "Error allocating d_deltas: " << cudaGetErrorString(err) << std::endl; return -1; }

    err = cudaMalloc((void**)&d_errors, BATCH_SIZE * sizeof(float));
    if (err != cudaSuccess) { std::cerr << "Error allocating d_errors: " << cudaGetErrorString(err) << std::endl; return -1; }

    initializeWeights<<<(numWeights + 255) / 256, 256>>>(d_weights, numWeights);
    err = cudaGetLastError();
    if (err != cudaSuccess) { std::cerr << "Error in initializeWeights: " << cudaGetErrorString(err) << std::endl; return -1; }

    for (int epoch = 0; epoch < 100; ++epoch) {
        forwardPass<<<BATCH_SIZE, NUM_NEURONS, NUM_NEURONS * sizeof(float)>>>(d_inputs, d_weights, d_outputs, NUM_LAYERS, NUM_NEURONS, BATCH_SIZE);
        err = cudaGetLastError();
        if (err != cudaSuccess) { std::cerr << "Error in forwardPass: " << cudaGetErrorString(err) << std::endl; return -1; }

        backwardPass<<<BATCH_SIZE, NUM_NEURONS, NUM_NEURONS * sizeof(float)>>>(d_outputs, d_weights, d_deltas, d_errors, NUM_LAYERS, NUM_NEURONS, BATCH_SIZE);
        err = cudaGetLastError();
        if (err != cudaSuccess) { std::cerr << "Error in backwardPass: " << cudaGetErrorString(err) << std::endl; return -1; }

        updateWeights<<<BATCH_SIZE, NUM_NEURONS>>>(d_weights, d_outputs, d_deltas, NUM_LAYERS, NUM_NEURONS, BATCH_SIZE, LEARNING_RATE);
        err = cudaGetLastError();
        if (err != cudaSuccess) { std::cerr << "Error in updateWeights: " << cudaGetErrorString(err) << std::endl; return -1; }
    }

    cudaFree(d_inputs);
    cudaFree(d_weights);
    cudaFree(d_outputs);
    cudaFree(d_deltas);
    cudaFree(d_errors);

    return 0;
}
	.file	"tmpxft_000a5055_00000000-6_cuda_code_056860.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3852:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3852:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4512:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4512:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z38__device_stub__Z17initializeWeightsPfiPfi
	.type	_Z38__device_stub__Z17initializeWeightsPfiPfi, @function
_Z38__device_stub__Z17initializeWeightsPfiPfi:
.LFB3874:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17initializeWeightsPfi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L3:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3874:
	.size	_Z38__device_stub__Z17initializeWeightsPfiPfi, .-_Z38__device_stub__Z17initializeWeightsPfiPfi
	.globl	_Z17initializeWeightsPfi
	.type	_Z17initializeWeightsPfi, @function
_Z17initializeWeightsPfi:
.LFB3875:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z17initializeWeightsPfiPfi
	.cfi_endproc
.LFE3875:
	.size	_Z17initializeWeightsPfi, .-_Z17initializeWeightsPfi
	.globl	_Z38__device_stub__Z11forwardPassPfS_S_iiiPfS_S_iii
	.type	_Z38__device_stub__Z11forwardPassPfS_S_iiiPfS_S_iii, @function
_Z38__device_stub__Z11forwardPassPfS_S_iiiPfS_S_iii:
.LFB3876:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z11forwardPassPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L9:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3876:
	.size	_Z38__device_stub__Z11forwardPassPfS_S_iiiPfS_S_iii, .-_Z38__device_stub__Z11forwardPassPfS_S_iiiPfS_S_iii
	.globl	_Z11forwardPassPfS_S_iii
	.type	_Z11forwardPassPfS_S_iii, @function
_Z11forwardPassPfS_S_iii:
.LFB3877:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z11forwardPassPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE3877:
	.size	_Z11forwardPassPfS_S_iii, .-_Z11forwardPassPfS_S_iii
	.globl	_Z41__device_stub__Z12backwardPassPfS_S_S_iiiPfS_S_S_iii
	.type	_Z41__device_stub__Z12backwardPassPfS_S_S_iiiPfS_S_S_iii, @function
_Z41__device_stub__Z12backwardPassPfS_S_S_iiiPfS_S_S_iii:
.LFB3878:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z12backwardPassPfS_S_S_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L14:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3878:
	.size	_Z41__device_stub__Z12backwardPassPfS_S_S_iiiPfS_S_S_iii, .-_Z41__device_stub__Z12backwardPassPfS_S_S_iiiPfS_S_S_iii
	.globl	_Z12backwardPassPfS_S_S_iii
	.type	_Z12backwardPassPfS_S_S_iii, @function
_Z12backwardPassPfS_S_S_iii:
.LFB3879:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z12backwardPassPfS_S_S_iiiPfS_S_S_iii
	.cfi_endproc
.LFE3879:
	.size	_Z12backwardPassPfS_S_S_iii, .-_Z12backwardPassPfS_S_S_iii
	.globl	_Z41__device_stub__Z13updateWeightsPfS_S_iiifPfS_S_iiif
	.type	_Z41__device_stub__Z13updateWeightsPfS_S_iiifPfS_S_iiif, @function
_Z41__device_stub__Z13updateWeightsPfS_S_iiifPfS_S_iiif:
.LFB3880:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movss	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13updateWeightsPfS_S_iiif(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L19:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3880:
	.size	_Z41__device_stub__Z13updateWeightsPfS_S_iiifPfS_S_iiif, .-_Z41__device_stub__Z13updateWeightsPfS_S_iiifPfS_S_iiif
	.globl	_Z13updateWeightsPfS_S_iiif
	.type	_Z13updateWeightsPfS_S_iiif, @function
_Z13updateWeightsPfS_S_iiif:
.LFB3881:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z13updateWeightsPfS_S_iiifPfS_S_iiif
	.cfi_endproc
.LFE3881:
	.size	_Z13updateWeightsPfS_S_iiif, .-_Z13updateWeightsPfS_S_iiif
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error allocating d_inputs: "
.LC1:
	.string	"Error allocating d_weights: "
.LC2:
	.string	"Error allocating d_outputs: "
.LC3:
	.string	"Error allocating d_deltas: "
.LC4:
	.string	"Error allocating d_errors: "
.LC5:
	.string	"Error in initializeWeights: "
.LC6:
	.string	"Error in forwardPass: "
.LC7:
	.string	"Error in backwardPass: "
.LC9:
	.string	"Error in updateWeights: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3849:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$2097152, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC0(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L45
	leaq	16(%rsp), %rdi
	movl	$201326592, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L27
	leaq	.LC1(%rip), %rsi
.L45:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
.L46:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	orl	$-1, %eax
	jmp	.L24
.L27:
	movl	$25165824, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC2(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L45
	movl	$25165824, %esi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC3(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L45
	movl	$1024, %esi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC4(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L45
	movl	$16777217, %edx
	movl	$65539, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	salq	$16, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	16(%rsp), %rdi
	movl	$50331648, %esi
	call	_Z38__device_stub__Z17initializeWeightsPfiPfi
.L32:
	call	cudaGetLastError@PLT
	movl	$2097153, %ebx
	movl	$100, %r12d
	leaq	.LC5(%rip), %rsi
	movl	%eax, %ebp
	salq	$11, %rbx
	testl	%eax, %eax
	jne	.L47
.L33:
	movl	$16777217, %edi
	xorl	%r9d, %r9d
	movq	%rbx, %rdx
	movl	$1, %ecx
	salq	$8, %rdi
	movl	$8192, %r8d
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$256, %r9d
	movl	$2048, %r8d
	movq	8(%rsp), %rdi
	movl	$12, %ecx
	call	_Z38__device_stub__Z11forwardPassPfS_S_iiiPfS_S_iii
.L34:
	call	cudaGetLastError@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L35
	leaq	.LC6(%rip), %rsi
	jmp	.L47
.L35:
	movl	$16777217, %edi
	xorl	%r9d, %r9d
	movq	%rbx, %rdx
	movl	$1, %ecx
	salq	$8, %rdi
	movl	$8192, %r8d
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	$2048, %r9d
	movl	$12, %r8d
	pushq	$256
	.cfi_def_cfa_offset 128
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z41__device_stub__Z12backwardPassPfS_S_S_iiiPfS_S_S_iii
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L36:
	call	cudaGetLastError@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L37
	leaq	.LC7(%rip), %rsi
	jmp	.L47
.L37:
	movl	$16777217, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	salq	$8, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$12, %ecx
	movl	$256, %r9d
	movss	.LC8(%rip), %xmm0
	movq	16(%rsp), %rdi
	movl	$2048, %r8d
	call	_Z41__device_stub__Z13updateWeightsPfS_S_iiifPfS_S_iiif
.L38:
	call	cudaGetLastError@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L39
	leaq	.LC9(%rip), %rsi
.L47:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	jmp	.L46
.L39:
	decl	%r12d
	jne	.L33
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L24:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3849:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z13updateWeightsPfS_S_iiif"
.LC11:
	.string	"_Z12backwardPassPfS_S_S_iii"
.LC12:
	.string	"_Z11forwardPassPfS_S_iii"
.LC13:
	.string	"_Z17initializeWeightsPfi"
.LC14:
	.string	"precalc_xorwow_matrix"
.LC15:
	.string	"precalc_xorwow_offset_matrix"
.LC16:
	.string	"mrg32k3aM1"
.LC17:
	.string	"mrg32k3aM2"
.LC18:
	.string	"mrg32k3aM1SubSeq"
.LC19:
	.string	"mrg32k3aM2SubSeq"
.LC20:
	.string	"mrg32k3aM1Seq"
.LC21:
	.string	"mrg32k3aM2Seq"
.LC22:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3883:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13updateWeightsPfS_S_iiif(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12backwardPassPfS_S_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11forwardPassPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17initializeWeightsPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC22(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3883:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC8:
	.long	1008981770
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>

#define NUM_LAYERS 12
#define NUM_NEURONS 2048
#define BATCH_SIZE 256
#define LEARNING_RATE 0.01f

__global__ void initializeWeights(float *weights, int numWeights) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < numWeights) {
        hiprandState state;
        hiprand_init((unsigned long long)clock() + idx, 0, 0, &state);
        weights[idx] = hiprand_uniform(&state) * 0.01f;
    }
}

__global__ void forwardPass(float *inputs, float *weights, float *outputs, int numLayers, int numNeurons, int batchSize) {
    extern __shared__ float sharedMem[];
    int neuronIdx = threadIdx.x;
    int batchIdx = blockIdx.x;

    for (int layer = 0; layer < numLayers; ++layer) {
        float sum = 0.0f;
        for (int i = 0; i < numNeurons; ++i) {
            int weightIdx = layer * numNeurons * numNeurons + neuronIdx * numNeurons + i;
            int inputIdx = (layer == 0) ? i * batchSize + batchIdx : (layer - 1) * numNeurons * batchSize + i * batchSize + batchIdx;
            sum += weights[weightIdx] * inputs[inputIdx];
        }
        sharedMem[neuronIdx] = 1.0f / (1.0f + expf(-sum)); // Sigmoid activation
        __syncthreads();

        if (neuronIdx < numNeurons) {
            outputs[layer * numNeurons * batchSize + neuronIdx * batchSize + batchIdx] = sharedMem[neuronIdx];
        }
        __syncthreads();
    }
}

__global__ void backwardPass(float *outputs, float *weights, float *deltas, float *errors, int numLayers, int numNeurons, int batchSize) {
    extern __shared__ float sharedMem[];
    int neuronIdx = threadIdx.x;
    int batchIdx = blockIdx.x;

    for (int layer = numLayers - 1; layer >= 0; --layer) {
        float delta = 0.0f;
        if (layer == numLayers - 1) {
            int outputIdx = layer * numNeurons * batchSize + neuronIdx * batchSize + batchIdx;
            delta = (outputs[outputIdx] - errors[batchIdx]) * outputs[outputIdx] * (1.0f - outputs[outputIdx]);
        } else {
            float sum = 0.0f;
            for (int i = 0; i < numNeurons; ++i) {
                int weightIdx = (layer + 1) * numNeurons * numNeurons + i * numNeurons + neuronIdx;
                int deltaIdx = (layer + 1) * numNeurons * batchSize + i * batchSize + batchIdx;
                sum += weights[weightIdx] * deltas[deltaIdx];
            }
            int outputIdx = layer * numNeurons * batchSize + neuronIdx * batchSize + batchIdx;
            delta = sum * outputs[outputIdx] * (1.0f - outputs[outputIdx]);
        }
        sharedMem[neuronIdx] = delta;
        __syncthreads();

        if (neuronIdx < numNeurons) {
            deltas[layer * numNeurons * batchSize + neuronIdx * batchSize + batchIdx] = sharedMem[neuronIdx];
        }
        __syncthreads();
    }
}

__global__ void updateWeights(float *weights, float *outputs, float *deltas, int numLayers, int numNeurons, int batchSize, float learningRate) {
    int neuronIdx = threadIdx.x;
    int batchIdx = blockIdx.x;

    for (int layer = 0; layer < numLayers; ++layer) {
        for (int i = 0; i < numNeurons; ++i) {
            int weightIdx = layer * numNeurons * numNeurons + neuronIdx * numNeurons + i;
            int outputIdx = (layer == 0) ? i * batchSize + batchIdx : (layer - 1) * numNeurons * batchSize + i * batchSize + batchIdx;
            int deltaIdx = layer * numNeurons * batchSize + neuronIdx * batchSize + batchIdx;
            atomicAdd(&weights[weightIdx], -learningRate * outputs[outputIdx] * deltas[deltaIdx]);
        }
    }
}

int main() {
    float *d_inputs, *d_weights, *d_outputs, *d_deltas, *d_errors;
    int numWeights = NUM_LAYERS * NUM_NEURONS * NUM_NEURONS;
    int numOutputs = NUM_LAYERS * NUM_NEURONS * BATCH_SIZE;

    hipError_t err = hipMalloc((void**)&d_inputs, NUM_NEURONS * BATCH_SIZE * sizeof(float));
    if (err != hipSuccess) { std::cerr << "Error allocating d_inputs: " << hipGetErrorString(err) << std::endl; return -1; }

    err = hipMalloc((void**)&d_weights, numWeights * sizeof(float));
    if (err != hipSuccess) { std::cerr << "Error allocating d_weights: " << hipGetErrorString(err) << std::endl; return -1; }

    err = hipMalloc((void**)&d_outputs, numOutputs * sizeof(float));
    if (err != hipSuccess) { std::cerr << "Error allocating d_outputs: " << hipGetErrorString(err) << std::endl; return -1; }

    err = hipMalloc((void**)&d_deltas, numOutputs * sizeof(float));
    if (err != hipSuccess) { std::cerr << "Error allocating d_deltas: " << hipGetErrorString(err) << std::endl; return -1; }

    err = hipMalloc((void**)&d_errors, BATCH_SIZE * sizeof(float));
    if (err != hipSuccess) { std::cerr << "Error allocating d_errors: " << hipGetErrorString(err) << std::endl; return -1; }

    initializeWeights<<<(numWeights + 255) / 256, 256>>>(d_weights, numWeights);
    err = hipGetLastError();
    if (err != hipSuccess) { std::cerr << "Error in initializeWeights: " << hipGetErrorString(err) << std::endl; return -1; }

    for (int epoch = 0; epoch < 100; ++epoch) {
        forwardPass<<<BATCH_SIZE, NUM_NEURONS, NUM_NEURONS * sizeof(float)>>>(d_inputs, d_weights, d_outputs, NUM_LAYERS, NUM_NEURONS, BATCH_SIZE);
        err = hipGetLastError();
        if (err != hipSuccess) { std::cerr << "Error in forwardPass: " << hipGetErrorString(err) << std::endl; return -1; }

        backwardPass<<<BATCH_SIZE, NUM_NEURONS, NUM_NEURONS * sizeof(float)>>>(d_outputs, d_weights, d_deltas, d_errors, NUM_LAYERS, NUM_NEURONS, BATCH_SIZE);
        err = hipGetLastError();
        if (err != hipSuccess) { std::cerr << "Error in backwardPass: " << hipGetErrorString(err) << std::endl; return -1; }

        updateWeights<<<BATCH_SIZE, NUM_NEURONS>>>(d_weights, d_outputs, d_deltas, NUM_LAYERS, NUM_NEURONS, BATCH_SIZE, LEARNING_RATE);
        err = hipGetLastError();
        if (err != hipSuccess) { std::cerr << "Error in updateWeights: " << hipGetErrorString(err) << std::endl; return -1; }
    }

    hipFree(d_inputs);
    hipFree(d_weights);
    hipFree(d_outputs);
    hipFree(d_deltas);
    hipFree(d_errors);

    return 0;
}
	.text
	.file	"cuda_code_056860.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z32__device_stub__initializeWeightsPfi # -- Begin function _Z32__device_stub__initializeWeightsPfi
	.type	_Z32__device_stub__initializeWeightsPfi,@function
_Z32__device_stub__initializeWeightsPfi: # @_Z32__device_stub__initializeWeightsPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17initializeWeightsPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__initializeWeightsPfi, .Lfunc_end0-_Z32__device_stub__initializeWeightsPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__forwardPassPfS_S_iii # -- Begin function _Z26__device_stub__forwardPassPfS_S_iii
	.type	_Z26__device_stub__forwardPassPfS_S_iii,@function
_Z26__device_stub__forwardPassPfS_S_iii: # @_Z26__device_stub__forwardPassPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11forwardPassPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z26__device_stub__forwardPassPfS_S_iii, .Lfunc_end1-_Z26__device_stub__forwardPassPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__backwardPassPfS_S_S_iii # -- Begin function _Z27__device_stub__backwardPassPfS_S_S_iii
	.type	_Z27__device_stub__backwardPassPfS_S_S_iii,@function
_Z27__device_stub__backwardPassPfS_S_S_iii: # @_Z27__device_stub__backwardPassPfS_S_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12backwardPassPfS_S_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z27__device_stub__backwardPassPfS_S_S_iii, .Lfunc_end2-_Z27__device_stub__backwardPassPfS_S_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__updateWeightsPfS_S_iiif # -- Begin function _Z28__device_stub__updateWeightsPfS_S_iiif
	.type	_Z28__device_stub__updateWeightsPfS_S_iiif,@function
_Z28__device_stub__updateWeightsPfS_S_iiif: # @_Z28__device_stub__updateWeightsPfS_S_iiif
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	8(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13updateWeightsPfS_S_iiif, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z28__device_stub__updateWeightsPfS_S_iiif, .Lfunc_end3-_Z28__device_stub__updateWeightsPfS_S_iiif
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI4_0:
	.long	0x3c23d70a                      # float 0.00999999977
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	48(%rsp), %rdi
	movl	$2097152, %esi                  # imm = 0x200000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB4_3
# %bb.1:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
.LBB4_2:
	movl	$27, %edx
	jmp	.LBB4_8
.LBB4_3:
	leaq	16(%rsp), %rdi
	movl	$201326592, %esi                # imm = 0xC000000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB4_5
# %bb.4:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	jmp	.LBB4_7
.LBB4_5:
	leaq	24(%rsp), %rdi
	movl	$25165824, %esi                 # imm = 0x1800000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB4_14
# %bb.6:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
.LBB4_7:
	movl	$28, %edx
.LBB4_8:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB4_10
# %bb.9:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB4_11
.LBB4_10:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB4_11:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB4_12:                               # %.thread
	movl	$-1, %eax
.LBB4_13:                               # %.thread
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_14:
	.cfi_def_cfa_offset 96
	leaq	32(%rsp), %rdi
	movl	$25165824, %esi                 # imm = 0x1800000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB4_16
# %bb.15:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	jmp	.LBB4_2
.LBB4_16:
	leaq	40(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB4_18
# %bb.17:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.4, %esi
	movl	$27, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	jmp	.LBB4_23
.LBB4_18:
	movabsq	$4294967552, %rbx               # imm = 0x100000100
	leaq	196352(%rbx), %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_20
# %bb.19:
	movq	16(%rsp), %rdi
	movl	$50331648, %esi                 # imm = 0x3000000
	callq	_Z32__device_stub__initializeWeightsPfi
.LBB4_20:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB4_24
# %bb.21:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	movl	$28, %edx
.LBB4_22:                               # %.thread
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
.LBB4_23:                               # %.thread
	callq	hipGetErrorString
	movl	$_ZSt4cerr, %edi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	jmp	.LBB4_12
.LBB4_24:                               # %.preheader.preheader
	movl	$100, %r15d
	leaq	1792(%rbx), %r14
.LBB4_25:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	$8192, %r8d                     # imm = 0x2000
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_27
# %bb.26:                               #   in Loop: Header=BB4_25 Depth=1
	movq	48(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	$12, %ecx
	movl	$2048, %r8d                     # imm = 0x800
	movl	$256, %r9d                      # imm = 0x100
	callq	_Z26__device_stub__forwardPassPfS_S_iii
.LBB4_27:                               #   in Loop: Header=BB4_25 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_36
# %bb.28:                               #   in Loop: Header=BB4_25 Depth=1
	movl	$8192, %r8d                     # imm = 0x2000
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_30
# %bb.29:                               #   in Loop: Header=BB4_25 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	32(%rsp), %rdx
	movq	40(%rsp), %rcx
	movl	$256, (%rsp)                    # imm = 0x100
	movl	$12, %r8d
	movl	$2048, %r9d                     # imm = 0x800
	callq	_Z27__device_stub__backwardPassPfS_S_S_iii
.LBB4_30:                               #   in Loop: Header=BB4_25 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_37
# %bb.31:                               #   in Loop: Header=BB4_25 Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_33
# %bb.32:                               #   in Loop: Header=BB4_25 Depth=1
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdx
	movl	$12, %ecx
	movl	$2048, %r8d                     # imm = 0x800
	movl	$256, %r9d                      # imm = 0x100
	movss	.LCPI4_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z28__device_stub__updateWeightsPfS_S_iiif
.LBB4_33:                               #   in Loop: Header=BB4_25 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_38
# %bb.34:                               #   in Loop: Header=BB4_25 Depth=1
	decl	%r15d
	jne	.LBB4_25
# %bb.35:
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	jmp	.LBB4_13
.LBB4_36:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.6, %esi
	movl	$22, %edx
	jmp	.LBB4_22
.LBB4_37:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.7, %esi
	movl	$23, %edx
	jmp	.LBB4_22
.LBB4_38:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.8, %esi
	movl	$24, %edx
	jmp	.LBB4_22
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17initializeWeightsPfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11forwardPassPfS_S_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12backwardPassPfS_S_S_iii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13updateWeightsPfS_S_iiif, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17initializeWeightsPfi,@object # @_Z17initializeWeightsPfi
	.section	.rodata,"a",@progbits
	.globl	_Z17initializeWeightsPfi
	.p2align	3, 0x0
_Z17initializeWeightsPfi:
	.quad	_Z32__device_stub__initializeWeightsPfi
	.size	_Z17initializeWeightsPfi, 8

	.type	_Z11forwardPassPfS_S_iii,@object # @_Z11forwardPassPfS_S_iii
	.globl	_Z11forwardPassPfS_S_iii
	.p2align	3, 0x0
_Z11forwardPassPfS_S_iii:
	.quad	_Z26__device_stub__forwardPassPfS_S_iii
	.size	_Z11forwardPassPfS_S_iii, 8

	.type	_Z12backwardPassPfS_S_S_iii,@object # @_Z12backwardPassPfS_S_S_iii
	.globl	_Z12backwardPassPfS_S_S_iii
	.p2align	3, 0x0
_Z12backwardPassPfS_S_S_iii:
	.quad	_Z27__device_stub__backwardPassPfS_S_S_iii
	.size	_Z12backwardPassPfS_S_S_iii, 8

	.type	_Z13updateWeightsPfS_S_iiif,@object # @_Z13updateWeightsPfS_S_iiif
	.globl	_Z13updateWeightsPfS_S_iiif
	.p2align	3, 0x0
_Z13updateWeightsPfS_S_iiif:
	.quad	_Z28__device_stub__updateWeightsPfS_S_iiif
	.size	_Z13updateWeightsPfS_S_iiif, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error allocating d_inputs: "
	.size	.L.str, 28

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Error allocating d_weights: "
	.size	.L.str.1, 29

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Error allocating d_outputs: "
	.size	.L.str.2, 29

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Error allocating d_deltas: "
	.size	.L.str.3, 28

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Error allocating d_errors: "
	.size	.L.str.4, 28

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Error in initializeWeights: "
	.size	.L.str.5, 29

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Error in forwardPass: "
	.size	.L.str.6, 23

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Error in backwardPass: "
	.size	.L.str.7, 24

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Error in updateWeights: "
	.size	.L.str.8, 25

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17initializeWeightsPfi"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11forwardPassPfS_S_iii"
	.size	.L__unnamed_2, 25

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z12backwardPassPfS_S_S_iii"
	.size	.L__unnamed_3, 28

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z13updateWeightsPfS_S_iiif"
	.size	.L__unnamed_4, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__initializeWeightsPfi
	.addrsig_sym _Z26__device_stub__forwardPassPfS_S_iii
	.addrsig_sym _Z27__device_stub__backwardPassPfS_S_S_iii
	.addrsig_sym _Z28__device_stub__updateWeightsPfS_S_iiif
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17initializeWeightsPfi
	.addrsig_sym _Z11forwardPassPfS_S_iii
	.addrsig_sym _Z12backwardPassPfS_S_S_iii
	.addrsig_sym _Z13updateWeightsPfS_S_iiif
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17initializeWeightsPfi ; -- Begin function _Z17initializeWeightsPfi
	.globl	_Z17initializeWeightsPfi
	.p2align	8
	.type	_Z17initializeWeightsPfi,@function
_Z17initializeWeightsPfi:               ; @_Z17initializeWeightsPfi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_getreg_b32 s2, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_co_u32 v0, vcc_lo, s2, v1
	s_load_b64 s[0:1], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v2, vcc_lo
	v_xor_b32_e32 v0, 0x2c7f967f, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v8, 0xa03697cb, v3
	v_mul_lo_u32 v0, 0x493c4aa1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, 0x75bcd15, v0
	v_add_nc_u32_e32 v6, 0x583f19, v0
	v_lshrrev_b32_e32 v5, 2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v5, v5, v4
	v_lshlrev_b32_e32 v4, 4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v7, 1, v5
	v_xor_b32_e32 v7, v4, v7
	v_mad_u64_u32 v[3:4], null, 0x7b99840d, v8, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v0, v7, v6, v5
	v_add3_u32 v0, v3, v0, 0x6a788e
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, v0
	v_fmaak_f32 v3, 0x2f800000, v0, 0x2f800000
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v2, 0x3c23d70a, v3
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17initializeWeightsPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17initializeWeightsPfi, .Lfunc_end0-_Z17initializeWeightsPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 284
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11forwardPassPfS_S_iii ; -- Begin function _Z11forwardPassPfS_S_iii
	.globl	_Z11forwardPassPfS_S_iii
	.p2align	8
	.type	_Z11forwardPassPfS_S_iii,@function
_Z11forwardPassPfS_S_iii:               ; @_Z11forwardPassPfS_S_iii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB1_8
; %bb.1:                                ; %.preheader.lr.ph
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x10
	v_mul_lo_u32 v1, v0, s5
	v_lshl_add_u32 v4, v0, 2, 0
	v_cmp_gt_i32_e64 s0, s5, v0
	v_mov_b32_e32 v5, 0
	s_cmp_gt_i32 s5, 0
	s_mov_b32 s2, s15
	s_cselect_b32 s1, -1, 0
	s_mov_b32 s3, 0
	s_mul_i32 s7, s5, s5
.LBB1_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
	v_mov_b32_e32 v6, 0
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_mul_i32 s14, s3, s5
	v_mov_b32_e32 v6, 0
	s_sub_i32 s14, s14, s5
	s_cmp_lg_u32 s3, 0
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_cselect_b32 s14, s14, 0
	s_mov_b32 s16, s5
	s_mul_i32 s14, s6, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s14, s2, s14
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
.LBB1_4:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_ashr_i32 s15, s14, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[18:19], s[14:15], 2
	s_add_u32 s18, s8, s18
	s_addc_u32 s19, s9, s19
	global_load_b32 v7, v[2:3], off
	global_load_b32 v8, v5, s[18:19]
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_i32 s16, s16, -1
	s_add_i32 s14, s14, s6
	s_cmp_eq_u32 s16, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v7, v8
	s_cbranch_scc0 .LBB1_4
.LBB1_5:                                ; %Flow73
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v2, 0xbfb8aa3b, v6
	v_cmp_nlt_f32_e32 vcc_lo, 0x42ce8ed0, v6
	v_rndne_f32_e32 v3, v2
	v_fma_f32 v7, 0xbfb8aa3b, v6, -v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v2, v2, v3 :: v_dual_fmac_f32 v7, 0xb2a5705f, v6
	v_cvt_i32_f32_e32 v3, v3
	v_add_f32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v2, v2, v3
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2b17218, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, 0x7f800000, v2, vcc_lo
	v_add_f32_e32 v2, 1.0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v3, null, v2, v2, 1.0
	v_div_scale_f32 v8, vcc_lo, 1.0, v2, 1.0
	v_rcp_f32_e32 v6, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v3, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v6
	v_mul_f32_e32 v7, v8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v3, v7, v8
	v_fmac_f32_e32 v7, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, -v3, v7, v8
	v_div_fmas_f32 v3, v3, v6, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v2, v3, v2, 1.0
	ds_store_b32 v4, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB1_7
; %bb.6:                                ;   in Loop: Header=BB1_2 Depth=1
	v_mad_u64_u32 v[2:3], null, s3, s5, v[0:1]
	ds_load_b32 v8, v4
	v_mad_u64_u32 v[6:7], null, v2, s6, s[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[2:3], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s12, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[2:3], v8, off
.LBB1_7:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_add_nc_u32_e32 v1, s7, v1
	s_add_i32 s3, s3, 1
	s_waitcnt_vscnt null, 0x0
	s_cmp_eq_u32 s3, s4
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
.LBB1_8:                                ; %._crit_edge48
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11forwardPassPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11forwardPassPfS_S_iii, .Lfunc_end1-_Z11forwardPassPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 580
; NumSgprs: 22
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12backwardPassPfS_S_S_iii ; -- Begin function _Z12backwardPassPfS_S_S_iii
	.globl	_Z12backwardPassPfS_S_S_iii
	.p2align	8
	.type	_Z12backwardPassPfS_S_S_iii,@function
_Z12backwardPassPfS_S_S_iii:            ; @_Z12backwardPassPfS_S_S_iii
; %bb.0:
	s_mov_b32 s2, s15
	s_load_b128 s[12:15], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s12, 1
	s_cbranch_scc1 .LBB2_13
; %bb.1:                                ; %.lr.ph74
	s_add_i32 s15, s12, -1
	s_cmp_gt_i32 s13, 0
	v_mad_u64_u32 v[1:2], null, s15, s13, v[0:1]
	s_load_b256 s[4:11], s[0:1], 0x0
	s_cselect_b32 s1, -1, 0
	s_ashr_i32 s3, s2, 31
	s_mul_i32 s19, s13, s13
	s_mul_i32 s18, s14, s13
	v_lshl_add_u32 v6, v0, 2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[2:3], null, v1, s14, s[2:3]
	v_cmp_gt_i32_e64 s0, s13, v0
	s_lshl_b64 s[16:17], s[2:3], 2
	v_mov_b32_e32 v7, 0
	s_mul_i32 s20, s18, s12
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s19, s12, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_add_u32 s10, s10, s16
	s_addc_u32 s11, s11, s17
	s_add_i32 s3, s2, s20
	v_add_co_u32 v2, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s12, s15
.LBB2_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_5 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s12, s15
	s_cbranch_scc1 .LBB2_7
; %bb.3:                                ; %.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v8, 0
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_6
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v4, v1
	s_mov_b32 s16, s3
	s_mov_b32 s20, s13
.LBB2_5:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v5, 31, v4
	s_ashr_i32 s17, s16, 31
	s_lshl_b64 s[22:23], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_u32 s22, s8, s22
	v_lshlrev_b64 v[9:10], 2, v[4:5]
	s_addc_u32 s23, s9, s23
	v_add_nc_u32_e32 v4, s13, v4
	s_add_i32 s20, s20, -1
	s_add_i32 s16, s16, s14
	s_cmp_eq_u32 s20, 0
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	global_load_b32 v5, v7, s[22:23]
	global_load_b32 v9, v[9:10], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v8, v9, v5
	s_cbranch_scc0 .LBB2_5
.LBB2_6:                                ; %Flow105
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_mad_u64_u32 v[4:5], null, s12, s13, v[0:1]
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v4, s14, s[2:3]
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[9:10]
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v5, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v4, v8, v5
	v_sub_f32_e32 v5, 1.0, v5
	s_branch .LBB2_8
.LBB2_7:                                ;   in Loop: Header=BB2_2 Depth=1
	s_mov_b32 s16, -1
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr5
.LBB2_8:                                ; %Flow106
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB2_10
; %bb.9:                                ;   in Loop: Header=BB2_2 Depth=1
	global_load_b32 v4, v[2:3], off
	global_load_b32 v5, v7, s[10:11]
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v5, v4, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mul_f32 v5, v4, v5 :: v_dual_sub_f32 v4, 1.0, v4
.LBB2_10:                               ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v4, v4, v5
	ds_store_b32 v6, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB2_12
; %bb.11:                               ;   in Loop: Header=BB2_2 Depth=1
	v_mad_u64_u32 v[4:5], null, s12, s13, v[0:1]
	ds_load_b32 v10, v6
	v_mad_u64_u32 v[8:9], null, v4, s14, s[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[4:5], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[4:5], v10, off
.LBB2_12:                               ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_subrev_nc_u32_e32 v1, s19, v1
	s_add_i32 s16, s12, -1
	s_sub_i32 s3, s3, s18
	s_cmp_lt_i32 s12, 1
	s_mov_b32 s12, s16
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_2
.LBB2_13:                               ; %._crit_edge75
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12backwardPassPfS_S_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z12backwardPassPfS_S_S_iii, .Lfunc_end2-_Z12backwardPassPfS_S_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 576
; NumSgprs: 26
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13updateWeightsPfS_S_iiif ; -- Begin function _Z13updateWeightsPfS_S_iiif
	.globl	_Z13updateWeightsPfS_S_iiif
	.p2align	8
	.type	_Z13updateWeightsPfS_S_iiif,@function
_Z13updateWeightsPfS_S_iiif:            ; @_Z13updateWeightsPfS_S_iiif
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB3_8
; %bb.1:                                ; %.preheader.lr.ph
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v7, 0
	s_cmp_gt_i32 s5, 0
	s_mov_b32 s2, s15
	s_cselect_b32 s3, -1, 0
	s_mov_b32 s12, 0
.LBB3_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_4 Depth 2
                                        ;       Child Loop BB3_5 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB3_7
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_mul_i32 s13, s12, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v3, s13, v0
	s_sub_i32 s14, s13, s5
	s_cmp_lg_u32 s12, 0
	s_mov_b32 s13, 0
	s_cselect_b32 s14, s14, 0
	v_mad_u64_u32 v[1:2], null, v3, s6, s[2:3]
	v_mul_lo_u32 v8, v3, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
.LBB3_4:                                ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_5 Depth 3
	v_add_nc_u32_e32 v3, s13, v8
	s_add_i32 s15, s13, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s6
	s_add_i32 s16, s15, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	s_ashr_i32 s17, s16, 31
	s_mov_b32 s15, 0
	s_lshl_b64 s[16:17], s[16:17], 2
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_add_u32 s16, s10, s16
	s_addc_u32 s17, s11, s17
	global_load_b32 v5, v7, s[16:17]
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	global_load_b32 v9, v[1:2], off
	global_load_b32 v6, v[3:4], off
	s_waitcnt vmcnt(2)
	v_mul_f32_e64 v5, v5, -s7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v9, v5, v9
.LBB3_5:                                ; %atomicrmw.start
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v5, v6, v9
	global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v5, v6
	v_mov_b32_e32 v6, v5
	s_or_b32 s15, vcc_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB3_5
; %bb.6:                                ; %atomicrmw.end
                                        ;   in Loop: Header=BB3_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s15
	s_add_i32 s13, s13, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s13, s5
	s_cbranch_scc0 .LBB3_4
.LBB3_7:                                ; %._crit_edge
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_add_i32 s12, s12, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s12, s4
	s_cbranch_scc0 .LBB3_2
.LBB3_8:                                ; %._crit_edge41
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13updateWeightsPfS_S_iiif
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 40
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z13updateWeightsPfS_S_iiif, .Lfunc_end3-_Z13updateWeightsPfS_S_iiif
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 352
; NumSgprs: 20
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17initializeWeightsPfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17initializeWeightsPfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11forwardPassPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z11forwardPassPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 44
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12backwardPassPfS_S_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z12backwardPassPfS_S_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 40
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13updateWeightsPfS_S_iiif
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z13updateWeightsPfS_S_iiif.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
