#include <iostream>
#include <cuda_runtime.h>

#define N 16384
#define BLOCK_SIZE 256

// Kernel to solve the 1D heat equation using implicit method
__global__ void implicitHeatKernel(float* u_new, float* u_old, float* a, float* b, float* c, float* d, float dx, float dt, float alpha) {
    __shared__ float s_u_old[BLOCK_SIZE + 2]; // Shared memory for old values with halo cells

    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    int tid = threadIdx.x;

    // Load data into shared memory including halo cells
    if (idx > 0 && idx < N - 1) {
        s_u_old[tid + 1] = u_old[idx];
    } else if (idx == 0) {
        s_u_old[tid + 1] = u_old[idx];
        s_u_old[tid] = u_old[idx]; // Left boundary condition
    } else if (idx == N - 1) {
        s_u_old[tid + 1] = u_old[idx];
        s_u_old[tid + 2] = u_old[idx]; // Right boundary condition
    }

    __syncthreads();

    // Solve the tridiagonal system using Thomas algorithm
    if (idx > 0 && idx < N - 1) {
        float w = a[idx] / b[idx - 1];
        b[idx] = b[idx] - w * c[idx - 1];
        d[idx] = d[idx] - w * d[idx - 1];
    }

    __syncthreads();

    // Back substitution
    if (idx > 0 && idx < N - 1) {
        u_new[idx] = (d[idx] - c[idx] * u_new[idx + 1]) / b[idx];
    }
}

int main() {
    float *u_old, *u_new, *a, *b, *c, *d;
    float *d_u_old, *d_u_new, *d_a, *d_b, *d_c, *d_d;
    float dx = 1.0f / (N - 1);
    float dt = 0.01f;
    float alpha = 0.01f;

    // Allocate memory for host
    u_old = (float*)malloc(N * sizeof(float));
    u_new = (float*)malloc(N * sizeof(float));
    a = (float*)malloc(N * sizeof(float));
    b = (float*)malloc(N * sizeof(float));
    c = (float*)malloc(N * sizeof(float));
    d = (float*)malloc(N * sizeof(float));

    // Initialize u_old with some values, e.g., initial condition
    for (int i = 0; i < N; i++) {
        u_old[i] = sin(2 * M_PI * i * dx); // Example initial condition
    }

    // Initialize coefficients a, b, c, d for tridiagonal system
    for (int i = 1; i < N - 1; i++) {
        a[i] = -alpha * dt / (dx * dx);
        b[i] = 1 + 2 * alpha * dt / (dx * dx);
        c[i] = -alpha * dt / (dx * dx);
        d[i] = u_old[i];
    }

    // Allocate memory for device
    cudaMalloc((void**)&d_u_old, N * sizeof(float));
    cudaMalloc((void**)&d_u_new, N * sizeof(float));
    cudaMalloc((void**)&d_a, N * sizeof(float));
    cudaMalloc((void**)&d_b, N * sizeof(float));
    cudaMalloc((void**)&d_c, N * sizeof(float));
    cudaMalloc((void**)&d_d, N * sizeof(float));

    // Copy data from host to device
    cudaMemcpy(d_u_old, u_old, N * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_u_new, u_new, N * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_a, a, N * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_b, b, N * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_c, c, N * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_d, d, N * sizeof(float), cudaMemcpyHostToDevice);

    // Launch kernel
    dim3 threadsPerBlock(BLOCK_SIZE);
    dim3 blocksPerGrid((N + threadsPerBlock.x - 1) / threadsPerBlock.x);
    implicitHeatKernel<<<blocksPerGrid, threadsPerBlock>>>(d_u_new, d_u_old, d_a, d_b, d_c, d_d, dx, dt, alpha);

    // Check for any errors launching the kernel
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        fprintf(stderr, "Failed to launch implicitHeatKernel (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    // Copy result back to host
    cudaMemcpy(u_new, d_u_new, N * sizeof(float), cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_u_old);
    cudaFree(d_u_new);
    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_c);
    cudaFree(d_d);

    // Free host memory
    free(u_old);
    free(u_new);
    free(a);
    free(b);
    free(c);
    free(d);

    std::cout << "Heat equation solved successfully on GPU." << std::endl;
    return 0;
}
	.file	"tmpxft_001c197a_00000000-6_cuda_code_030360.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z51__device_stub__Z18implicitHeatKernelPfS_S_S_S_S_fffPfS_S_S_S_S_fff
	.type	_Z51__device_stub__Z18implicitHeatKernelPfS_S_S_S_S_fffPfS_S_S_S_S_fff, @function
_Z51__device_stub__Z18implicitHeatKernelPfS_S_S_S_S_fffPfS_S_S_S_S_fff:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movss	%xmm0, 12(%rsp)
	movss	%xmm1, 8(%rsp)
	movss	%xmm2, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	72(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z18implicitHeatKernelPfS_S_S_S_S_fff(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 240
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L2:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z51__device_stub__Z18implicitHeatKernelPfS_S_S_S_S_fffPfS_S_S_S_S_fff, .-_Z51__device_stub__Z18implicitHeatKernelPfS_S_S_S_S_fffPfS_S_S_S_S_fff
	.globl	_Z18implicitHeatKernelPfS_S_S_S_S_fff
	.type	_Z18implicitHeatKernelPfS_S_S_S_S_fff, @function
_Z18implicitHeatKernelPfS_S_S_S_S_fff:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z18implicitHeatKernelPfS_S_S_S_S_fffPfS_S_S_S_S_fff
	.cfi_endproc
.LFE3661:
	.size	_Z18implicitHeatKernelPfS_S_S_S_S_fff, .-_Z18implicitHeatKernelPfS_S_S_S_S_fff
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC6:
	.string	"Failed to launch implicitHeatKernel (error code %s)!\n"
.LC7:
	.string	"Heat equation solved successfully on GPU."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$65536, %edi
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$65536, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$65536, %edi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movl	$65536, %edi
	movq	%rax, %r14
	call	malloc@PLT
	movl	$65536, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$65536, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movq	%rax, %rbp
.L9:
	cvtsi2sdl	%r15d, %xmm0
	mulsd	.LC0(%rip), %xmm0
	mulsd	.LC1(%rip), %xmm0
	call	sin@PLT
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	$16384, %r15
	jne	.L9
	movss	.LC2(%rip), %xmm0
	movss	.LC3(%rip), %xmm1
	movl	$4, %eax
.L10:
	movss	%xmm0, (%r14,%rax)
	movss	%xmm1, 0(%r13,%rax)
	movss	%xmm0, (%r12,%rax)
	addq	$4, %rax
	cmpq	$65532, %rax
	jne	.L10
	leaq	4(%rbp), %rax
	leaq	4(%rbx), %rsi
	movl	$16382, %ecx
	movq	%rax, %rdi
	rep movsl
	leaq	16(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$67108865, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$6, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	movss	.LC4(%rip), %xmm2
	movss	.LC5(%rip), %xmm0
	movq	56(%rsp), %r9
	movq	48(%rsp), %r8
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movaps	%xmm2, %xmm1
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z51__device_stub__Z18implicitHeatKernelPfS_S_S_S_S_fffPfS_S_S_S_S_fff
.L11:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L12
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L12:
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	leaq	_ZSt4cout(%rip), %rdi
	leaq	.LC7(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z18implicitHeatKernelPfS_S_S_S_S_fff"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18implicitHeatKernelPfS_S_S_S_S_fff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	1413754136
	.long	1075388923
	.align 8
.LC1:
	.long	0
	.long	1058013248
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	-959336311
	.align 4
.LC3:
	.long	1196536201
	.align 4
.LC4:
	.long	1008981770
	.align 4
.LC5:
	.long	947913216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

#define N 16384
#define BLOCK_SIZE 256

// Kernel to solve the 1D heat equation using implicit method
__global__ void implicitHeatKernel(float* u_new, float* u_old, float* a, float* b, float* c, float* d, float dx, float dt, float alpha) {
    __shared__ float s_u_old[BLOCK_SIZE + 2]; // Shared memory for old values with halo cells

    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    int tid = threadIdx.x;

    // Load data into shared memory including halo cells
    if (idx > 0 && idx < N - 1) {
        s_u_old[tid + 1] = u_old[idx];
    } else if (idx == 0) {
        s_u_old[tid + 1] = u_old[idx];
        s_u_old[tid] = u_old[idx]; // Left boundary condition
    } else if (idx == N - 1) {
        s_u_old[tid + 1] = u_old[idx];
        s_u_old[tid + 2] = u_old[idx]; // Right boundary condition
    }

    __syncthreads();

    // Solve the tridiagonal system using Thomas algorithm
    if (idx > 0 && idx < N - 1) {
        float w = a[idx] / b[idx - 1];
        b[idx] = b[idx] - w * c[idx - 1];
        d[idx] = d[idx] - w * d[idx - 1];
    }

    __syncthreads();

    // Back substitution
    if (idx > 0 && idx < N - 1) {
        u_new[idx] = (d[idx] - c[idx] * u_new[idx + 1]) / b[idx];
    }
}

int main() {
    float *u_old, *u_new, *a, *b, *c, *d;
    float *d_u_old, *d_u_new, *d_a, *d_b, *d_c, *d_d;
    float dx = 1.0f / (N - 1);
    float dt = 0.01f;
    float alpha = 0.01f;

    // Allocate memory for host
    u_old = (float*)malloc(N * sizeof(float));
    u_new = (float*)malloc(N * sizeof(float));
    a = (float*)malloc(N * sizeof(float));
    b = (float*)malloc(N * sizeof(float));
    c = (float*)malloc(N * sizeof(float));
    d = (float*)malloc(N * sizeof(float));

    // Initialize u_old with some values, e.g., initial condition
    for (int i = 0; i < N; i++) {
        u_old[i] = sin(2 * M_PI * i * dx); // Example initial condition
    }

    // Initialize coefficients a, b, c, d for tridiagonal system
    for (int i = 1; i < N - 1; i++) {
        a[i] = -alpha * dt / (dx * dx);
        b[i] = 1 + 2 * alpha * dt / (dx * dx);
        c[i] = -alpha * dt / (dx * dx);
        d[i] = u_old[i];
    }

    // Allocate memory for device
    hipMalloc((void**)&d_u_old, N * sizeof(float));
    hipMalloc((void**)&d_u_new, N * sizeof(float));
    hipMalloc((void**)&d_a, N * sizeof(float));
    hipMalloc((void**)&d_b, N * sizeof(float));
    hipMalloc((void**)&d_c, N * sizeof(float));
    hipMalloc((void**)&d_d, N * sizeof(float));

    // Copy data from host to device
    hipMemcpy(d_u_old, u_old, N * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_u_new, u_new, N * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_a, a, N * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_b, b, N * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_c, c, N * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_d, d, N * sizeof(float), hipMemcpyHostToDevice);

    // Launch kernel
    dim3 threadsPerBlock(BLOCK_SIZE);
    dim3 blocksPerGrid((N + threadsPerBlock.x - 1) / threadsPerBlock.x);
    implicitHeatKernel<<<blocksPerGrid, threadsPerBlock>>>(d_u_new, d_u_old, d_a, d_b, d_c, d_d, dx, dt, alpha);

    // Check for any errors launching the kernel
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        fprintf(stderr, "Failed to launch implicitHeatKernel (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    // Copy result back to host
    hipMemcpy(u_new, d_u_new, N * sizeof(float), hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_u_old);
    hipFree(d_u_new);
    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_c);
    hipFree(d_d);

    // Free host memory
    free(u_old);
    free(u_new);
    free(a);
    free(b);
    free(c);
    free(d);

    std::cout << "Heat equation solved successfully on GPU." << std::endl;
    return 0;
}
	.text
	.file	"cuda_code_030360.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__implicitHeatKernelPfS_S_S_S_S_fff # -- Begin function _Z33__device_stub__implicitHeatKernelPfS_S_S_S_S_fff
	.type	_Z33__device_stub__implicitHeatKernelPfS_S_S_S_S_fff,@function
_Z33__device_stub__implicitHeatKernelPfS_S_S_S_S_fff: # @_Z33__device_stub__implicitHeatKernelPfS_S_S_S_S_fff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	12(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	8(%rsp), %r10
	movss	%xmm1, (%r10)
	leaq	4(%rsp), %r11
	movss	%xmm2, (%r11)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	movq	%r10, 56(%rbx)
	movq	%r11, 64(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18implicitHeatKernelPfS_S_S_S_S_fff, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__implicitHeatKernelPfS_S_S_S_S_fff, .Lfunc_end0-_Z33__device_stub__implicitHeatKernelPfS_S_S_S_S_fff
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x401921fb54442d18              # double 6.2831853071795862
.LCPI1_1:
	.quad	0x3f10004000000000              # double 6.1038881540298462E-5
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI1_2:
	.long	0x38800200                      # float 6.10388815E-5
.LCPI1_3:
	.long	0x3c23d70a                      # float 0.00999999977
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, %rbx
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, %r15
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, %r12
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, %r13
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, %rbp
	xorl	%r14d, %r14d
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r14d, %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	mulsd	.LCPI1_1(%rip), %xmm0
	callq	sin
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r14,4)
	incq	%r14
	cmpq	$16384, %r14                    # imm = 0x4000
	jne	.LBB1_1
# %bb.2:                                # %.preheader.preheader
	movq	%rbp, 56(%rsp)                  # 8-byte Spill
	addq	$4, %rbp
	movq	%rbx, %rsi
	addq	$4, %rsi
	movl	$65528, %edx                    # imm = 0xFFF8
	movq	%rbp, %rdi
	callq	memcpy@PLT
	movl	$1, %eax
	movl	$-959336311, %ecx               # imm = 0xC6D1B089
.LBB1_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	%ecx, (%r15,%rax,4)
	movl	$1196536201, (%r12,%rax,4)      # imm = 0x4751B189
	movl	%ecx, (%r13,%rax,4)
	incq	%rax
	cmpq	$16383, %rax                    # imm = 0x3FFF
	jne	.LBB1_3
# %bb.4:
	leaq	48(%rsp), %rbp
	movl	$65536, %esi                    # imm = 0x10000
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	40(%rsp), %r14
	movl	$65536, %esi                    # imm = 0x10000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	64(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %rax
	movq	(%rax), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	56(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967360, %rdi               # imm = 0x100000040
	leaq	192(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rcx
	movq	16(%rsp), %r8
	movq	8(%rsp), %r9
	movss	.LCPI1_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI1_3(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movaps	%xmm1, %xmm2
	callq	_Z33__device_stub__implicitHeatKernelPfS_S_S_S_S_fff
.LBB1_6:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.7:
	movq	40(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	%rbp, %rdi
	callq	free
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$41, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_8:
	.cfi_def_cfa_offset 128
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18implicitHeatKernelPfS_S_S_S_S_fff, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18implicitHeatKernelPfS_S_S_S_S_fff,@object # @_Z18implicitHeatKernelPfS_S_S_S_S_fff
	.section	.rodata,"a",@progbits
	.globl	_Z18implicitHeatKernelPfS_S_S_S_S_fff
	.p2align	3, 0x0
_Z18implicitHeatKernelPfS_S_S_S_S_fff:
	.quad	_Z33__device_stub__implicitHeatKernelPfS_S_S_S_S_fff
	.size	_Z18implicitHeatKernelPfS_S_S_S_S_fff, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to launch implicitHeatKernel (error code %s)!\n"
	.size	.L.str, 54

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Heat equation solved successfully on GPU."
	.size	.L.str.1, 42

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18implicitHeatKernelPfS_S_S_S_S_fff"
	.size	.L__unnamed_1, 38

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__implicitHeatKernelPfS_S_S_S_S_fff
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18implicitHeatKernelPfS_S_S_S_S_fff
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18implicitHeatKernelPfS_S_S_S_S_fff ; -- Begin function _Z18implicitHeatKernelPfS_S_S_S_S_fff
	.globl	_Z18implicitHeatKernelPfS_S_S_S_S_fff
	.p2align	8
	.type	_Z18implicitHeatKernelPfS_S_S_S_S_fff,@function
_Z18implicitHeatKernelPfS_S_S_S_S_fff:  ; @_Z18implicitHeatKernelPfS_S_S_S_S_fff
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b256 s[4:11], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_add_nc_u32_e32 v3, -1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s2, 0x3ffe, v3
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v2
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v0, v[7:8], off
	global_load_b32 v4, v[9:10], off
	v_add_co_u32 v7, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v9, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v11, v[7:8], off
	global_load_b32 v9, v[9:10], off
	s_waitcnt vmcnt(2)
	v_div_scale_f32 v10, null, v4, v4, v0
	v_div_scale_f32 v14, vcc_lo, v0, v4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v12, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v10, v12, 1.0
	v_fmac_f32_e32 v12, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v13, v14, v12
	v_fma_f32 v15, -v10, v13, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v15, v12
	v_fma_f32 v10, -v10, v13, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v10, v10, v12, v13
	v_div_fixup_f32 v0, v10, v4, v0
	v_add_co_u32 v4, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v6, vcc_lo
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f32 v6, -v0, v9, v11
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	global_store_b32 v[7:8], v6, off
	s_clause 0x1
	global_load_b32 v6, v[4:5], off
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_fma_f32 v0, -v0, v2, v6
	global_store_b32 v[4:5], v0, off
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_4
; %bb.3:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	global_load_b32 v4, v[6:7], off offset:4
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(1)
	v_fma_f32 v1, -v3, v4, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v2, null, v0, v0, v1
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v2, v3, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v4, v3
	v_div_scale_f32 v4, vcc_lo, v1, v0, v1
	v_mul_f32_e32 v5, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, -v2, v5, v4
	v_fmac_f32_e32 v5, v8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, -v2, v5, v4
	v_div_fmas_f32 v2, v2, v3, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v0, v2, v0, v1
	global_store_b32 v[6:7], v0, off
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18implicitHeatKernelPfS_S_S_S_S_fff
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18implicitHeatKernelPfS_S_S_S_S_fff, .Lfunc_end0-_Z18implicitHeatKernelPfS_S_S_S_S_fff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 656
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18implicitHeatKernelPfS_S_S_S_S_fff
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18implicitHeatKernelPfS_S_S_S_S_fff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
