#include <iostream>
#include <cuda_runtime.h>

#define N 512

// Kernel to build a simple suffix tree structure
// This is a simplified version for demonstration purposes
__global__ void buildSuffixTreeKernel(char *text, int *suffixArray, int *lcpArray, int n) {
    extern __shared__ char sharedText[];
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    // Load text into shared memory
    if (idx < n) {
        sharedText[threadIdx.x] = text[idx];
    }
    __syncthreads();

    // Example: Each thread computes LCP with its previous suffix
    if (idx > 0 && idx < n) {
        int lcp = 0;
        int i = suffixArray[idx - 1];
        int j = suffixArray[idx];
        while (i < n && j < n && sharedText[i % blockDim.x] == sharedText[j % blockDim.x]) {
            i++;
            j++;
            lcp++;
        }
        lcpArray[idx] = lcp;
    }
}

int main() {
    // Example text
    const char *text = "banana$";
    int n = strlen(text);

    // Host memory
    char *h_text = new char[n];
    int *h_suffixArray = new int[n];
    int *h_lcpArray = new int[n];

    // Initialize host memory
    memcpy(h_text, text, n);
    for (int i = 0; i < n; i++) h_suffixArray[i] = i;
    for (int i = 0; i < n; i++) h_lcpArray[i] = 0;

    // Device memory
    char *d_text;
    int *d_suffixArray, *d_lcpArray;
    cudaMalloc((void **)&d_text, n * sizeof(char));
    cudaMalloc((void **)&d_suffixArray, n * sizeof(int));
    cudaMalloc((void **)&d_lcpArray, n * sizeof(int));

    // Copy data to device
    cudaMemcpy(d_text, h_text, n * sizeof(char), cudaMemcpyHostToDevice);
    cudaMemcpy(d_suffixArray, h_suffixArray, n * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_lcpArray, h_lcpArray, n * sizeof(int), cudaMemcpyHostToDevice);

    // Kernel configuration
    int blockSize = 256;
    int numBlocks = (n + blockSize - 1) / blockSize;

    // Launch kernel
    buildSuffixTreeKernel<<<numBlocks, blockSize, blockSize * sizeof(char)>>>(d_text, d_suffixArray, d_lcpArray, n);

    // Check for errors
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy results back to host
    cudaMemcpy(h_lcpArray, d_lcpArray, n * sizeof(int), cudaMemcpyDeviceToHost);

    // Print results
    std::cout << "LCP Array: ";
    for (int i = 0; i < n; i++) {
        std::cout << h_lcpArray[i] << " ";
    }
    std::cout << std::endl;

    // Free memory
    delete[] h_text;
    delete[] h_suffixArray;
    delete[] h_lcpArray;
    cudaFree(d_text);
    cudaFree(d_suffixArray);
    cudaFree(d_lcpArray);

    return 0;
}
	.file	"tmpxft_000be15d_00000000-6_cuda_code_119527.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z47__device_stub__Z21buildSuffixTreeKernelPcPiS0_iPcPiS0_i
	.type	_Z47__device_stub__Z21buildSuffixTreeKernelPcPiS0_iPcPiS0_i, @function
_Z47__device_stub__Z21buildSuffixTreeKernelPcPiS0_iPcPiS0_i:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z21buildSuffixTreeKernelPcPiS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z47__device_stub__Z21buildSuffixTreeKernelPcPiS0_iPcPiS0_i, .-_Z47__device_stub__Z21buildSuffixTreeKernelPcPiS0_iPcPiS0_i
	.globl	_Z21buildSuffixTreeKernelPcPiS0_i
	.type	_Z21buildSuffixTreeKernelPcPiS0_i, @function
_Z21buildSuffixTreeKernelPcPiS0_i:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z21buildSuffixTreeKernelPcPiS0_iPcPiS0_i
	.cfi_endproc
.LFE3661:
	.size	_Z21buildSuffixTreeKernelPcPiS0_i, .-_Z21buildSuffixTreeKernelPcPiS0_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error: "
.LC1:
	.string	"LCP Array: "
.LC2:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$7, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$28, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movl	$28, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$1634623842, 0(%rbp)
	xorl	%ecx, %ecx
	movl	$610365025, 3(%rbp)
	movq	%rax, %rbx
.L9:
	movl	%ecx, (%r12,%rcx,4)
	incq	%rcx
	cmpq	$7, %rcx
	jne	.L9
	xorl	%eax, %eax
	movq	%rbx, %rdi
	movl	$7, %esi
	rep stosl
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$28, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$28, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$7, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$28, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$28, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	movl	$256, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$7, %ecx
	movq	8(%rsp), %rdi
	call	_Z47__device_stub__Z21buildSuffixTreeKernelPcPiS0_iPcPiS0_i
.L10:
	call	cudaGetLastError@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	je	.L11
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r13d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L8
.L11:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	xorl	%r13d, %r13d
	movl	$28, %edx
	leaq	_ZSt4cout(%rip), %r14
	leaq	.LC2(%rip), %r15
	call	cudaMemcpy@PLT
	leaq	.LC1(%rip), %rsi
	movq	%r14, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L13:
	movl	(%rbx,%r13,4), %esi
	movq	%r14, %rdi
	incq	%r13
	call	_ZNSolsEi@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$7, %r13
	jne	.L13
	movq	%r14, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L8:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z21buildSuffixTreeKernelPcPiS0_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z21buildSuffixTreeKernelPcPiS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

#define N 512

// Kernel to build a simple suffix tree structure
// This is a simplified version for demonstration purposes
__global__ void buildSuffixTreeKernel(char *text, int *suffixArray, int *lcpArray, int n) {
    extern __shared__ char sharedText[];
    int idx = blockIdx.x * blockDim.x + threadIdx.x;

    // Load text into shared memory
    if (idx < n) {
        sharedText[threadIdx.x] = text[idx];
    }
    __syncthreads();

    // Example: Each thread computes LCP with its previous suffix
    if (idx > 0 && idx < n) {
        int lcp = 0;
        int i = suffixArray[idx - 1];
        int j = suffixArray[idx];
        while (i < n && j < n && sharedText[i % blockDim.x] == sharedText[j % blockDim.x]) {
            i++;
            j++;
            lcp++;
        }
        lcpArray[idx] = lcp;
    }
}

int main() {
    // Example text
    const char *text = "banana$";
    int n = strlen(text);

    // Host memory
    char *h_text = new char[n];
    int *h_suffixArray = new int[n];
    int *h_lcpArray = new int[n];

    // Initialize host memory
    memcpy(h_text, text, n);
    for (int i = 0; i < n; i++) h_suffixArray[i] = i;
    for (int i = 0; i < n; i++) h_lcpArray[i] = 0;

    // Device memory
    char *d_text;
    int *d_suffixArray, *d_lcpArray;
    hipMalloc((void **)&d_text, n * sizeof(char));
    hipMalloc((void **)&d_suffixArray, n * sizeof(int));
    hipMalloc((void **)&d_lcpArray, n * sizeof(int));

    // Copy data to device
    hipMemcpy(d_text, h_text, n * sizeof(char), hipMemcpyHostToDevice);
    hipMemcpy(d_suffixArray, h_suffixArray, n * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_lcpArray, h_lcpArray, n * sizeof(int), hipMemcpyHostToDevice);

    // Kernel configuration
    int blockSize = 256;
    int numBlocks = (n + blockSize - 1) / blockSize;

    // Launch kernel
    buildSuffixTreeKernel<<<numBlocks, blockSize, blockSize * sizeof(char)>>>(d_text, d_suffixArray, d_lcpArray, n);

    // Check for errors
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy results back to host
    hipMemcpy(h_lcpArray, d_lcpArray, n * sizeof(int), hipMemcpyDeviceToHost);

    // Print results
    std::cout << "LCP Array: ";
    for (int i = 0; i < n; i++) {
        std::cout << h_lcpArray[i] << " ";
    }
    std::cout << std::endl;

    // Free memory
    delete[] h_text;
    delete[] h_suffixArray;
    delete[] h_lcpArray;
    hipFree(d_text);
    hipFree(d_suffixArray);
    hipFree(d_lcpArray);

    return 0;
}
	.text
	.file	"cuda_code_119527.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z36__device_stub__buildSuffixTreeKernelPcPiS0_i # -- Begin function _Z36__device_stub__buildSuffixTreeKernelPcPiS0_i
	.type	_Z36__device_stub__buildSuffixTreeKernelPcPiS0_i,@function
_Z36__device_stub__buildSuffixTreeKernelPcPiS0_i: # @_Z36__device_stub__buildSuffixTreeKernelPcPiS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21buildSuffixTreeKernelPcPiS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z36__device_stub__buildSuffixTreeKernelPcPiS0_i, .Lfunc_end0-_Z36__device_stub__buildSuffixTreeKernelPcPiS0_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$7, %edi
	callq	_Znam
	movq	%rax, %rbx
	movl	$28, %edi
	callq	_Znam
	movq	%rax, %r14
	movl	$28, %edi
	callq	_Znam
	movq	%rax, %r15
	movl	$1634623842, (%rbx)             # imm = 0x616E6162
	movl	$610365025, 3(%rbx)             # imm = 0x24616E61
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, (%r14,%rax,4)
	incq	%rax
	cmpq	$7, %rax
	jne	.LBB1_1
# %bb.2:                                # %.preheader.preheader
	xorps	%xmm0, %xmm0
	movups	%xmm0, 12(%r15)
	movups	%xmm0, (%r15)
	leaq	16(%rsp), %r12
	movl	$7, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r13
	movl	$28, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	movq	%rsp, %rbp
	movl	$28, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$7, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$28, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$28, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	255(%rdi), %rdx
	movl	$256, %r8d                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$7, %ecx
	callq	_Z36__device_stub__buildSuffixTreeKernelPcPiS0_i
.LBB1_4:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_9
# %bb.5:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_6
# %bb.7:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_8
.LBB1_9:
	movq	(%rsp), %rsi
	movl	$28, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%r12d, %r12d
.LBB1_10:                               # =>This Inner Loop Header: Depth=1
	movl	(%r15,%r12,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str.3, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r12
	cmpq	$7, %r12
	jne	.LBB1_10
# %bb.11:
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	jmp	.LBB1_12
.LBB1_6:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_8:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB1_12:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21buildSuffixTreeKernelPcPiS0_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z21buildSuffixTreeKernelPcPiS0_i,@object # @_Z21buildSuffixTreeKernelPcPiS0_i
	.section	.rodata,"a",@progbits
	.globl	_Z21buildSuffixTreeKernelPcPiS0_i
	.p2align	3, 0x0
_Z21buildSuffixTreeKernelPcPiS0_i:
	.quad	_Z36__device_stub__buildSuffixTreeKernelPcPiS0_i
	.size	_Z21buildSuffixTreeKernelPcPiS0_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"banana$"
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"CUDA error: "
	.size	.L.str.1, 13

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"LCP Array: "
	.size	.L.str.2, 12

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" "
	.size	.L.str.3, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z21buildSuffixTreeKernelPcPiS0_i"
	.size	.L__unnamed_1, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z36__device_stub__buildSuffixTreeKernelPcPiS0_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z21buildSuffixTreeKernelPcPiS0_i
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z21buildSuffixTreeKernelPcPiS0_i ; -- Begin function _Z21buildSuffixTreeKernelPcPiS0_i
	.globl	_Z21buildSuffixTreeKernelPcPiS0_i
	.p2align	8
	.type	_Z21buildSuffixTreeKernelPcPiS0_i,@function
_Z21buildSuffixTreeKernelPcPiS0_i:      ; @_Z21buildSuffixTreeKernelPcPiS0_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s9, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s9, 0xffff
	s_mov_b32 s9, exec_lo
	v_mad_u64_u32 v[3:4], null, s15, s1, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_le_i32_e32 vcc_lo, s8, v3
	v_cmpx_gt_i32_e64 s8, v3
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v3
	v_add_co_u32 v1, s0, s4, v3
	v_add_nc_u32_e32 v0, 0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e64 v2, s0, s5, v2, s0
	global_load_u8 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	ds_store_b8 v0, v1
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s9
	v_cmp_lt_i32_e64 s0, 0, v3
	s_xor_b32 s4, vcc_lo, -1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 s0, s0, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB0_10
; %bb.3:
	v_mov_b32_e32 v4, 0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off offset:-4
	s_waitcnt vmcnt(0)
	v_max_i32_e32 v5, v2, v3
	v_cmpx_gt_i32_e64 s8, v5
	s_cbranch_execz .LBB0_9
; %bb.4:                                ; %.lr.ph.preheader
	v_cvt_f32_u32_e32 v4, s1
	s_sub_i32 s4, 0, s1
	s_mov_b32 s5, 0
                                        ; implicit-def: $sgpr6
	v_mov_b32_e32 v7, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, s4, v4
	s_mov_b32 s4, 0
	v_mul_hi_u32 v6, v4, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v5, v3 :: v_dual_add_nc_u32 v6, v4, v6
.LBB0_5:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v8, v6, v7
	v_mul_hi_u32 v4, v6, v5
	s_or_b32 s6, s6, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, s1, v8
	v_mul_lo_u32 v9, s1, v4
	v_not_b32_e32 v8, v8
	v_not_b32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v8, s1, v8
	v_sub_nc_u32_e32 v10, v2, v10
	v_sub_nc_u32_e32 v9, v3, v9
	v_mul_lo_u32 v4, s1, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v10, s5, v10
	v_add3_u32 v8, v2, v8, s5
	v_add3_u32 v4, v3, v4, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s1, v10
	v_dual_cndmask_b32 v8, v10, v8 :: v_dual_add_nc_u32 v9, s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_le_u32_e32 vcc_lo, s1, v9
	v_cndmask_b32_e32 v4, v9, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v9, s1, v8
	v_cmp_le_u32_e32 vcc_lo, s1, v8
	v_subrev_nc_u32_e32 v10, s1, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v8, v8, v9, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s1, v4
	v_add_nc_u32_e32 v8, 0, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, v4, v10, vcc_lo
	v_add_nc_u32_e32 v4, 0, v4
	ds_load_u8 v8, v8
	ds_load_u8 v4, v4
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, v8, v4
	v_mov_b32_e32 v4, s5
	s_and_saveexec_b32 s7, vcc_lo
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	s_add_i32 s5, s5, 1
	v_add_nc_u32_e32 v7, 1, v7
	v_add_nc_u32_e32 v4, s5, v3
	v_add_nc_u32_e32 v8, s5, v2
	v_add_nc_u32_e32 v5, 1, v5
	s_and_not1_b32 s6, s6, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v4, v8, v4
	v_cmp_le_i32_e32 vcc_lo, s8, v4
	v_mov_b32_e32 v4, s5
	s_and_b32 s9, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s6, s6, s9
; %bb.7:                                ; %Flow
                                        ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s7, exec_lo, s6
	s_or_b32 s4, s7, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_5
; %bb.8:                                ; %Flow47
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_9:                                ; %Flow48
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21buildSuffixTreeKernelPcPiS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z21buildSuffixTreeKernelPcPiS0_i, .Lfunc_end0-_Z21buildSuffixTreeKernelPcPiS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 648
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21buildSuffixTreeKernelPcPiS0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21buildSuffixTreeKernelPcPiS0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
