#include <iostream>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>

#define NUM_NODES 64
#define WARP_SIZE 32

// Structure to represent a node in the graph
struct Node {
    int start; // Start index of the adjacency list
    int degree; // Degree of the node
};

// CUDA kernel to find strongly connected components
__global__ void findSCC(Node* nodes, int* edges, int* labels, int* changed) {
    extern __shared__ int s_labels[];

    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    if (tid >= NUM_NODES) return;

    int label = labels[tid];
    s_labels[threadIdx.x] = label;
    __syncthreads();

    int start = nodes[tid].start;
    int degree = nodes[tid].degree;

    for (int i = 0; i < degree; ++i) {
        int neighbor = edges[start + i];
        int neighbor_label = labels[neighbor];
        if (neighbor_label < label) {
            label = neighbor_label;
        }
    }

    s_labels[threadIdx.x] = label;
    __syncthreads();

    if (s_labels[threadIdx.x] < labels[tid]) {
        labels[tid] = s_labels[threadIdx.x];
        *changed = 1;
    }
}

// Function to initialize the graph
void initializeGraph(Node* nodes, int* edges) {
    // Example graph initialization
    // This is a placeholder and should be replaced with actual graph data
    for (int i = 0; i < NUM_NODES; ++i) {
        nodes[i].start = i * 4; // Each node has 4 edges for simplicity
        nodes[i].degree = 4;
    }

    for (int i = 0; i < NUM_NODES * 4; ++i) {
        edges[i] = (i + 1) % NUM_NODES; // Create a simple cycle for testing
    }
}

int main() {
    Node* d_nodes;
    int* d_edges;
    int* d_labels;
    int* d_changed;

    // Allocate memory on the device
    cudaMalloc(&d_nodes, NUM_NODES * sizeof(Node));
    cudaMalloc(&d_edges, NUM_NODES * 4 * sizeof(int)); // Each node has 4 edges
    cudaMalloc(&d_labels, NUM_NODES * sizeof(int));
    cudaMalloc(&d_changed, sizeof(int));

    // Initialize graph on the host
    Node h_nodes[NUM_NODES];
    int h_edges[NUM_NODES * 4];
    int h_labels[NUM_NODES];
    int h_changed;

    initializeGraph(h_nodes, h_edges);

    // Initialize labels
    for (int i = 0; i < NUM_NODES; ++i) {
        h_labels[i] = i;
    }

    // Copy data to the device
    cudaMemcpy(d_nodes, h_nodes, NUM_NODES * sizeof(Node), cudaMemcpyHostToDevice);
    cudaMemcpy(d_edges, h_edges, NUM_NODES * 4 * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_labels, h_labels, NUM_NODES * sizeof(int), cudaMemcpyHostToDevice);

    // Set up the execution configuration
    int blockSize = 256;
    int numBlocks = (NUM_NODES + blockSize - 1) / blockSize;
    size_t sharedMemSize = blockSize * sizeof(int);

    // Perform the SCC computation
    do {
        h_changed = 0;
        cudaMemcpy(d_changed, &h_changed, sizeof(int), cudaMemcpyHostToDevice);

        findSCC<<<numBlocks, blockSize, sharedMemSize>>>(d_nodes, d_edges, d_labels, d_changed);

        // Check for errors in kernel launch
        cudaError_t err = cudaGetLastError();
        if (err != cudaSuccess) {
            std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
            return -1;
        }

        // Copy changed flag back to host
        cudaMemcpy(&h_changed, d_changed, sizeof(int), cudaMemcpyDeviceToHost);
    } while (h_changed);

    // Copy the results back to the host
    cudaMemcpy(h_labels, d_labels, NUM_NODES * sizeof(int), cudaMemcpyDeviceToHost);

    // Output the results
    std::cout << "Strongly Connected Components:" << std::endl;
    for (int i = 0; i < NUM_NODES; ++i) {
        std::cout << "Node " << i << " -> Component " << h_labels[i] << std::endl;
    }

    // Free device memory
    cudaFree(d_nodes);
    cudaFree(d_edges);
    cudaFree(d_labels);
    cudaFree(d_changed);

    return 0;
}
	.file	"tmpxft_00043bde_00000000-6_cuda_code_050168.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z15initializeGraphP4NodePi
	.type	_Z15initializeGraphP4NodePi, @function
_Z15initializeGraphP4NodePi:
.LFB3635:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L3:
	leal	0(,%rax,4), %edx
	movl	$4, 4(%rdi,%rax,8)
	movl	%edx, (%rdi,%rax,8)
	incq	%rax
	cmpq	$64, %rax
	jne	.L3
	movl	$1, %eax
.L4:
	movl	%eax, %edx
	andl	$63, %edx
	movl	%edx, -4(%rsi,%rax,4)
	incq	%rax
	cmpq	$257, %rax
	jne	.L4
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z15initializeGraphP4NodePi, .-_Z15initializeGraphP4NodePi
	.globl	_Z38__device_stub__Z7findSCCP4NodePiS1_S1_P4NodePiS1_S1_
	.type	_Z38__device_stub__Z7findSCCP4NodePiS1_S1_P4NodePiS1_S1_, @function
_Z38__device_stub__Z7findSCCP4NodePiS1_S1_P4NodePiS1_S1_:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7findSCCP4NodePiS1_S1_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z38__device_stub__Z7findSCCP4NodePiS1_S1_P4NodePiS1_S1_, .-_Z38__device_stub__Z7findSCCP4NodePiS1_S1_P4NodePiS1_S1_
	.globl	_Z7findSCCP4NodePiS1_S1_
	.type	_Z7findSCCP4NodePiS1_S1_, @function
_Z7findSCCP4NodePiS1_S1_:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z7findSCCP4NodePiS1_S1_P4NodePiS1_S1_
	.cfi_endproc
.LFE3662:
	.size	_Z7findSCCP4NodePiS1_S1_, .-_Z7findSCCP4NodePiS1_S1_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error: "
.LC1:
	.string	"Strongly Connected Components:"
.LC2:
	.string	"Node "
.LC3:
	.string	" -> Component "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$512, %esi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$1872, %rsp
	.cfi_def_cfa_offset 1920
	movq	%fs:40, %rax
	movq	%rax, 1864(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	leaq	72(%rsp), %rbp
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$1024, %esi
	leaq	840(%rsp), %rbx
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$256, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	leaq	328(%rsp), %rdi
	movq	%rbx, %rsi
	call	_Z15initializeGraphP4NodePi
	xorl	%eax, %eax
.L14:
	movl	%eax, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$64, %rax
	jne	.L14
	movq	%rdi, %rsi
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$512, %edx
	movabsq	$4294967552, %r13
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$256, %edx
	call	cudaMemcpy@PLT
.L18:
	movq	40(%rsp), %rdi
	leaq	12(%rsp), %r12
	xorl	%eax, %eax
	movl	$1, %ecx
	movl	$4, %edx
	movq	%r12, %rsi
	movl	%eax, 12(%rsp)
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	movq	%r13, %rdx
	movl	$1, %ecx
	movl	$1024, %r8d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%r13, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z38__device_stub__Z7findSCCP4NodePiS1_S1_P4NodePiS1_S1_
.L15:
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L16
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	orl	$-1, %r12d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L13
.L16:
	movq	40(%rsp), %rsi
	movq	%r12, %rdi
	movl	$2, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	12(%rsp), %r12d
	testl	%r12d, %r12d
	jne	.L18
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	xorl	%ebx, %ebx
	movl	$256, %edx
	leaq	_ZSt4cout(%rip), %r13
	leaq	.LC2(%rip), %r14
	call	cudaMemcpy@PLT
	leaq	.LC1(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L19:
	movq	%r14, %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	0(%rbp,%rbx,4), %esi
	incq	%rbx
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpq	$64, %rbx
	jne	.L19
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
.L13:
	movq	1864(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$1872, %rsp
	.cfi_def_cfa_offset 48
	movl	%r12d, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z7findSCCP4NodePiS1_S1_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7findSCCP4NodePiS1_S1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>


#define NUM_NODES 64
#define WARP_SIZE 32

// Structure to represent a node in the graph
struct Node {
    int start; // Start index of the adjacency list
    int degree; // Degree of the node
};

// CUDA kernel to find strongly connected components
__global__ void findSCC(Node* nodes, int* edges, int* labels, int* changed) {
    extern __shared__ int s_labels[];

    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    if (tid >= NUM_NODES) return;

    int label = labels[tid];
    s_labels[threadIdx.x] = label;
    __syncthreads();

    int start = nodes[tid].start;
    int degree = nodes[tid].degree;

    for (int i = 0; i < degree; ++i) {
        int neighbor = edges[start + i];
        int neighbor_label = labels[neighbor];
        if (neighbor_label < label) {
            label = neighbor_label;
        }
    }

    s_labels[threadIdx.x] = label;
    __syncthreads();

    if (s_labels[threadIdx.x] < labels[tid]) {
        labels[tid] = s_labels[threadIdx.x];
        *changed = 1;
    }
}

// Function to initialize the graph
void initializeGraph(Node* nodes, int* edges) {
    // Example graph initialization
    // This is a placeholder and should be replaced with actual graph data
    for (int i = 0; i < NUM_NODES; ++i) {
        nodes[i].start = i * 4; // Each node has 4 edges for simplicity
        nodes[i].degree = 4;
    }

    for (int i = 0; i < NUM_NODES * 4; ++i) {
        edges[i] = (i + 1) % NUM_NODES; // Create a simple cycle for testing
    }
}

int main() {
    Node* d_nodes;
    int* d_edges;
    int* d_labels;
    int* d_changed;

    // Allocate memory on the device
    hipMalloc(&d_nodes, NUM_NODES * sizeof(Node));
    hipMalloc(&d_edges, NUM_NODES * 4 * sizeof(int)); // Each node has 4 edges
    hipMalloc(&d_labels, NUM_NODES * sizeof(int));
    hipMalloc(&d_changed, sizeof(int));

    // Initialize graph on the host
    Node h_nodes[NUM_NODES];
    int h_edges[NUM_NODES * 4];
    int h_labels[NUM_NODES];
    int h_changed;

    initializeGraph(h_nodes, h_edges);

    // Initialize labels
    for (int i = 0; i < NUM_NODES; ++i) {
        h_labels[i] = i;
    }

    // Copy data to the device
    hipMemcpy(d_nodes, h_nodes, NUM_NODES * sizeof(Node), hipMemcpyHostToDevice);
    hipMemcpy(d_edges, h_edges, NUM_NODES * 4 * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_labels, h_labels, NUM_NODES * sizeof(int), hipMemcpyHostToDevice);

    // Set up the execution configuration
    int blockSize = 256;
    int numBlocks = (NUM_NODES + blockSize - 1) / blockSize;
    size_t sharedMemSize = blockSize * sizeof(int);

    // Perform the SCC computation
    do {
        h_changed = 0;
        hipMemcpy(d_changed, &h_changed, sizeof(int), hipMemcpyHostToDevice);

        findSCC<<<numBlocks, blockSize, sharedMemSize>>>(d_nodes, d_edges, d_labels, d_changed);

        // Check for errors in kernel launch
        hipError_t err = hipGetLastError();
        if (err != hipSuccess) {
            std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
            return -1;
        }

        // Copy changed flag back to host
        hipMemcpy(&h_changed, d_changed, sizeof(int), hipMemcpyDeviceToHost);
    } while (h_changed);

    // Copy the results back to the host
    hipMemcpy(h_labels, d_labels, NUM_NODES * sizeof(int), hipMemcpyDeviceToHost);

    // Output the results
    std::cout << "Strongly Connected Components:" << std::endl;
    for (int i = 0; i < NUM_NODES; ++i) {
        std::cout << "Node " << i << " -> Component " << h_labels[i] << std::endl;
    }

    // Free device memory
    hipFree(d_nodes);
    hipFree(d_edges);
    hipFree(d_labels);
    hipFree(d_changed);

    return 0;
}
	.text
	.file	"cuda_code_050168.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z22__device_stub__findSCCP4NodePiS1_S1_ # -- Begin function _Z22__device_stub__findSCCP4NodePiS1_S1_
	.type	_Z22__device_stub__findSCCP4NodePiS1_S1_,@function
_Z22__device_stub__findSCCP4NodePiS1_S1_: # @_Z22__device_stub__findSCCP4NodePiS1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7findSCCP4NodePiS1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__findSCCP4NodePiS1_S1_, .Lfunc_end0-_Z22__device_stub__findSCCP4NodePiS1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z15initializeGraphP4NodePi     # -- Begin function _Z15initializeGraphP4NodePi
	.type	_Z15initializeGraphP4NodePi,@function
_Z15initializeGraphP4NodePi:            # @_Z15initializeGraphP4NodePi
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, (%rdi,%rax,2)
	movl	$4, 4(%rdi,%rax,2)
	addq	$4, %rax
	cmpq	$256, %rax                      # imm = 0x100
	jne	.LBB1_1
# %bb.2:                                # %.preheader.preheader
	xorl	%eax, %eax
.LBB1_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	leaq	1(%rax), %rcx
	movl	%ecx, %edx
	andl	$63, %edx
	movl	%edx, (%rsi,%rax,4)
	movq	%rcx, %rax
	cmpq	$256, %rcx                      # imm = 0x100
	jne	.LBB1_3
# %bb.4:
	retq
.Lfunc_end1:
	.size	_Z15initializeGraphP4NodePi, .Lfunc_end1-_Z15initializeGraphP4NodePi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$1848, %rsp                     # imm = 0x738
	.cfi_def_cfa_offset 1888
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	40(%rsp), %rdi
	movl	$512, %esi                      # imm = 0x200
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$256, %esi                      # imm = 0x100
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	xorl	%eax, %eax
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, 304(%rsp,%rax,2)
	movl	$4, 308(%rsp,%rax,2)
	addq	$4, %rax
	cmpq	$256, %rax                      # imm = 0x100
	jne	.LBB2_1
# %bb.2:                                # %.preheader.i.preheader
	xorl	%eax, %eax
.LBB2_3:                                # %.preheader.i
                                        # =>This Inner Loop Header: Depth=1
	leaq	1(%rax), %rcx
	movl	%ecx, %edx
	andl	$63, %edx
	movl	%edx, 816(%rsp,%rax,4)
	movq	%rcx, %rax
	cmpq	$256, %rcx                      # imm = 0x100
	jne	.LBB2_3
# %bb.4:                                # %_Z15initializeGraphP4NodePi.exit.preheader
	xorl	%eax, %eax
.LBB2_5:                                # %_Z15initializeGraphP4NodePi.exit
                                        # =>This Inner Loop Header: Depth=1
	movl	%eax, 48(%rsp,%rax,4)
	incq	%rax
	cmpq	$64, %rax
	jne	.LBB2_5
# %bb.6:
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	movq	40(%rsp), %rdi
	leaq	304(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	movl	$1, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	leaq	816(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	leaq	48(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	12(%rsp), %r14
	leaq	255(%rbx), %r15
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	movl	$0, 12(%rsp)
	movq	16(%rsp), %rdi
	movl	$4, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$1024, %r8d                     # imm = 0x400
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_9
# %bb.8:                                #   in Loop: Header=BB2_7 Depth=1
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	callq	_Z22__device_stub__findSCCP4NodePiS1_S1_
.LBB2_9:                                #   in Loop: Header=BB2_7 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.14:                               #   in Loop: Header=BB2_7 Depth=1
	movq	16(%rsp), %rsi
	movl	$4, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$0, 12(%rsp)
	jne	.LBB2_7
# %bb.15:
	movq	24(%rsp), %rsi
	leaq	48(%rsp), %rdi
	movl	$256, %edx                      # imm = 0x100
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$30, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%ebx, %ebx
.LBB2_16:                               # =>This Inner Loop Header: Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$14, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	48(%rsp,%rbx,4), %esi
	movq	%r14, %rdi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%rbx
	cmpq	$64, %rbx
	jne	.LBB2_16
# %bb.17:
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	jmp	.LBB2_18
.LBB2_10:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB2_11
# %bb.12:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_13
.LBB2_11:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_13:
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB2_18:
	addq	$1848, %rsp                     # imm = 0x738
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7findSCCP4NodePiS1_S1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7findSCCP4NodePiS1_S1_,@object # @_Z7findSCCP4NodePiS1_S1_
	.section	.rodata,"a",@progbits
	.globl	_Z7findSCCP4NodePiS1_S1_
	.p2align	3, 0x0
_Z7findSCCP4NodePiS1_S1_:
	.quad	_Z22__device_stub__findSCCP4NodePiS1_S1_
	.size	_Z7findSCCP4NodePiS1_S1_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Strongly Connected Components:"
	.size	.L.str.1, 31

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Node "
	.size	.L.str.2, 6

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" -> Component "
	.size	.L.str.3, 15

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7findSCCP4NodePiS1_S1_"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__findSCCP4NodePiS1_S1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7findSCCP4NodePiS1_S1_
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7findSCCP4NodePiS1_S1_ ; -- Begin function _Z7findSCCP4NodePiS1_S1_
	.globl	_Z7findSCCP4NodePiS1_S1_
	.p2align	8
	.type	_Z7findSCCP4NodePiS1_S1_,@function
_Z7findSCCP4NodePiS1_S1_:               ; @_Z7findSCCP4NodePiS1_S1_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x2c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 64, v3
	s_cbranch_execz .LBB0_7
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshl_add_u32 v0, v0, 2, 0
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v7, v[1:2], off
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	ds_store_b32 v0, v7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v4
	s_cbranch_execz .LBB0_5
; %bb.2:                                ; %.lr.ph.preheader
	v_ashrrev_i32_e32 v6, 31, v3
	v_mov_b32_e32 v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v5, vcc_lo, s2, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v8, v[5:6], off
	v_add_nc_u32_e32 v4, -1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, 0, v4
	s_or_b32 s8, s0, s8
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	v_add_co_u32 v5, vcc_lo, v5, 4
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	global_load_b32 v3, v[8:9], off
	s_waitcnt vmcnt(0)
	v_min_i32_e32 v7, v3, v7
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_3
; %bb.4:                                ; %Flow46
	s_or_b32 exec_lo, exec_lo, s8
.LBB0_5:                                ; %Flow47
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	ds_store_b32 v0, v7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	global_load_b32 v3, v[1:2], off
	ds_load_b32 v0, v0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v0, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_7
; %bb.6:
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, 1
	global_store_b32 v[1:2], v0, off
	global_store_b32 v3, v4, s[6:7]
.LBB0_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7findSCCP4NodePiS1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7findSCCP4NodePiS1_S1_, .Lfunc_end0-_Z7findSCCP4NodePiS1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 424
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7findSCCP4NodePiS1_S1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7findSCCP4NodePiS1_S1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
