#include <iostream>
#include <cuda_runtime.h>

// Constants for the simulation
#define NUM_PARTICLES 32
#define DT 0.001f
#define NUM_STEPS 100

// CUDA kernel for leapfrog integration
__global__ void leapfrogKernel(float4 *positions, float4 *velocities, float4 *forces, float mass) {
    int idx = threadIdx.x;

    // Load particle data into registers for faster access
    float4 pos = positions[idx];
    float4 vel = velocities[idx];
    float4 force = forces[idx];

    // Update position using half of the velocity
    pos.x += vel.x * DT * 0.5f;
    pos.y += vel.y * DT * 0.5f;
    pos.z += vel.z * DT * 0.5f;

    // Update velocity using the full force
    vel.x += (force.x / mass) * DT;
    vel.y += (force.y / mass) * DT;
    vel.z += (force.z / mass) * DT;

    // Update position using the rest of the velocity
    pos.x += vel.x * DT * 0.5f;
    pos.y += vel.y * DT * 0.5f;
    pos.z += vel.z * DT * 0.5f;

    // Store updated data back to global memory
    positions[idx] = pos;
    velocities[idx] = vel;
}

int main() {
    // Allocate memory for positions, velocities, and forces on host
    float4 *h_positions = new float4[NUM_PARTICLES];
    float4 *h_velocities = new float4[NUM_PARTICLES];
    float4 *h_forces = new float4[NUM_PARTICLES];

    // Initialize particles (for simplicity, setting to zero)
    for (int i = 0; i < NUM_PARTICLES; ++i) {
        h_positions[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
        h_velocities[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
        h_forces[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    }

    // Allocate memory for positions, velocities, and forces on device
    float4 *d_positions, *d_velocities, *d_forces;
    cudaMalloc((void**)&d_positions, NUM_PARTICLES * sizeof(float4));
    cudaMalloc((void**)&d_velocities, NUM_PARTICLES * sizeof(float4));
    cudaMalloc((void**)&d_forces, NUM_PARTICLES * sizeof(float4));

    // Copy data from host to device
    cudaMemcpy(d_positions, h_positions, NUM_PARTICLES * sizeof(float4), cudaMemcpyHostToDevice);
    cudaMemcpy(d_velocities, h_velocities, NUM_PARTICLES * sizeof(float4), cudaMemcpyHostToDevice);
    cudaMemcpy(d_forces, h_forces, NUM_PARTICLES * sizeof(float4), cudaMemcpyHostToDevice);

    // Define block and grid sizes
    dim3 blockSize(NUM_PARTICLES);
    dim3 gridSize(1);

    // Mass of each particle
    float mass = 1.0f;

    // Run leapfrog integration for a number of steps
    for (int step = 0; step < NUM_STEPS; ++step) {
        leapfrogKernel<<<gridSize, blockSize>>>(d_positions, d_velocities, d_forces, mass);

        // Check for errors in kernel execution
        cudaError_t err = cudaGetLastError();
        if (err != cudaSuccess) {
            std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
            return -1;
        }
    }

    // Copy results back to host
    cudaMemcpy(h_positions, d_positions, NUM_PARTICLES * sizeof(float4), cudaMemcpyDeviceToHost);
    cudaMemcpy(h_velocities, d_velocities, NUM_PARTICLES * sizeof(float4), cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_positions);
    cudaFree(d_velocities);
    cudaFree(d_forces);

    // Free host memory
    delete[] h_positions;
    delete[] h_velocities;
    delete[] h_forces;

    return 0;
}
	.file	"tmpxft_00131103_00000000-6_cuda_code_086035.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z47__device_stub__Z14leapfrogKernelP6float4S0_S0_fP6float4S0_S0_f
	.type	_Z47__device_stub__Z14leapfrogKernelP6float4S0_S0_fP6float4S0_S0_f, @function
_Z47__device_stub__Z14leapfrogKernelP6float4S0_S0_fP6float4S0_S0_f:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14leapfrogKernelP6float4S0_S0_f(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z47__device_stub__Z14leapfrogKernelP6float4S0_S0_fP6float4S0_S0_f, .-_Z47__device_stub__Z14leapfrogKernelP6float4S0_S0_fP6float4S0_S0_f
	.globl	_Z14leapfrogKernelP6float4S0_S0_f
	.type	_Z14leapfrogKernelP6float4S0_S0_f, @function
_Z14leapfrogKernelP6float4S0_S0_f:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z14leapfrogKernelP6float4S0_S0_fP6float4S0_S0_f
	.cfi_endproc
.LFE3661:
	.size	_Z14leapfrogKernelP6float4S0_S0_f, .-_Z14leapfrogKernelP6float4S0_S0_f
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"CUDA error: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$512, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$512, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movl	$512, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movq	%rax, %r12
	xorl	%eax, %eax
.L9:
	movl	$0x00000000, 0(%rbp,%rax)
	movl	$0x00000000, 4(%rbp,%rax)
	movl	$0x00000000, 8(%rbp,%rax)
	movl	$0x00000000, 12(%rbp,%rax)
	movl	$0x00000000, (%rbx,%rax)
	movl	$0x00000000, 4(%rbx,%rax)
	movl	$0x00000000, 8(%rbx,%rax)
	movl	$0x00000000, 12(%rbx,%rax)
	movl	$0x00000000, (%r12,%rax)
	movl	$0x00000000, 4(%r12,%rax)
	movl	$0x00000000, 8(%r12,%rax)
	movl	$0x00000000, 12(%r12,%rax)
	addq	$16, %rax
	cmpq	$512, %rax
	jne	.L9
	leaq	8(%rsp), %rdi
	movl	$512, %esi
	movl	$100, %r14d
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$512, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$512, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$512, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$512, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$512, %edx
	call	cudaMemcpy@PLT
	movl	$134217729, %eax
	movl	$1, 40(%rsp)
	salq	$5, %rax
	movl	$1, 52(%rsp)
	movq	%rax, 32(%rsp)
	subq	$31, %rax
	movq	%rax, 44(%rsp)
.L13:
	movl	40(%rsp), %ecx
	movq	32(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	44(%rsp), %rdi
	movl	52(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movss	.LC1(%rip), %xmm0
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z47__device_stub__Z14leapfrogKernelP6float4S0_S0_fP6float4S0_S0_f
.L10:
	call	cudaGetLastError@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	je	.L11
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r13d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L8
.L11:
	decl	%r14d
	jne	.L13
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$512, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$512, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	xorl	%eax, %eax
.L8:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z14leapfrogKernelP6float4S0_S0_f"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14leapfrogKernelP6float4S0_S0_f(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

// Constants for the simulation
#define NUM_PARTICLES 32
#define DT 0.001f
#define NUM_STEPS 100

// CUDA kernel for leapfrog integration
__global__ void leapfrogKernel(float4 *positions, float4 *velocities, float4 *forces, float mass) {
    int idx = threadIdx.x;

    // Load particle data into registers for faster access
    float4 pos = positions[idx];
    float4 vel = velocities[idx];
    float4 force = forces[idx];

    // Update position using half of the velocity
    pos.x += vel.x * DT * 0.5f;
    pos.y += vel.y * DT * 0.5f;
    pos.z += vel.z * DT * 0.5f;

    // Update velocity using the full force
    vel.x += (force.x / mass) * DT;
    vel.y += (force.y / mass) * DT;
    vel.z += (force.z / mass) * DT;

    // Update position using the rest of the velocity
    pos.x += vel.x * DT * 0.5f;
    pos.y += vel.y * DT * 0.5f;
    pos.z += vel.z * DT * 0.5f;

    // Store updated data back to global memory
    positions[idx] = pos;
    velocities[idx] = vel;
}

int main() {
    // Allocate memory for positions, velocities, and forces on host
    float4 *h_positions = new float4[NUM_PARTICLES];
    float4 *h_velocities = new float4[NUM_PARTICLES];
    float4 *h_forces = new float4[NUM_PARTICLES];

    // Initialize particles (for simplicity, setting to zero)
    for (int i = 0; i < NUM_PARTICLES; ++i) {
        h_positions[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
        h_velocities[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
        h_forces[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    }

    // Allocate memory for positions, velocities, and forces on device
    float4 *d_positions, *d_velocities, *d_forces;
    hipMalloc((void**)&d_positions, NUM_PARTICLES * sizeof(float4));
    hipMalloc((void**)&d_velocities, NUM_PARTICLES * sizeof(float4));
    hipMalloc((void**)&d_forces, NUM_PARTICLES * sizeof(float4));

    // Copy data from host to device
    hipMemcpy(d_positions, h_positions, NUM_PARTICLES * sizeof(float4), hipMemcpyHostToDevice);
    hipMemcpy(d_velocities, h_velocities, NUM_PARTICLES * sizeof(float4), hipMemcpyHostToDevice);
    hipMemcpy(d_forces, h_forces, NUM_PARTICLES * sizeof(float4), hipMemcpyHostToDevice);

    // Define block and grid sizes
    dim3 blockSize(NUM_PARTICLES);
    dim3 gridSize(1);

    // Mass of each particle
    float mass = 1.0f;

    // Run leapfrog integration for a number of steps
    for (int step = 0; step < NUM_STEPS; ++step) {
        leapfrogKernel<<<gridSize, blockSize>>>(d_positions, d_velocities, d_forces, mass);

        // Check for errors in kernel execution
        hipError_t err = hipGetLastError();
        if (err != hipSuccess) {
            std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
            return -1;
        }
    }

    // Copy results back to host
    hipMemcpy(h_positions, d_positions, NUM_PARTICLES * sizeof(float4), hipMemcpyDeviceToHost);
    hipMemcpy(h_velocities, d_velocities, NUM_PARTICLES * sizeof(float4), hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_positions);
    hipFree(d_velocities);
    hipFree(d_forces);

    // Free host memory
    delete[] h_positions;
    delete[] h_velocities;
    delete[] h_forces;

    return 0;
}
	.text
	.file	"cuda_code_086035.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z29__device_stub__leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f # -- Begin function _Z29__device_stub__leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
	.type	_Z29__device_stub__leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f,@function
_Z29__device_stub__leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f: # @_Z29__device_stub__leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f, .Lfunc_end0-_Z29__device_stub__leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967297, %r12               # imm = 0x100000001
	movl	$512, %edi                      # imm = 0x200
	callq	_Znam
	movq	%rax, %r14
	movl	$512, %edi                      # imm = 0x200
	callq	_Znam
	movq	%rax, %r15
	movl	$512, %edi                      # imm = 0x200
	callq	_Znam
	movq	%rax, %rbx
	movl	$512, %edx                      # imm = 0x200
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$512, %edx                      # imm = 0x200
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$512, %edx                      # imm = 0x200
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	leaq	16(%rsp), %r13
	movl	$512, %esi                      # imm = 0x200
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rbp
	movl	$512, %esi                      # imm = 0x200
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$512, %esi                      # imm = 0x200
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$512, %edx                      # imm = 0x200
	movq	%r14, 24(%rsp)                  # 8-byte Spill
	movq	%r14, %rsi
	movq	%r15, %r14
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$512, %edx                      # imm = 0x200
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rsp, %rax
	movq	(%rax), %rdi
	movl	$512, %edx                      # imm = 0x200
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$100, %r15d
	leaq	31(%r12), %r13
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:                                #   in Loop: Header=BB1_2 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z29__device_stub__leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
.LBB1_4:                                #   in Loop: Header=BB1_2 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_5
# %bb.1:                                #   in Loop: Header=BB1_2 Depth=1
	decl	%r15d
	jne	.LBB1_2
# %bb.9:
	movq	16(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	movq	24(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	_ZdaPv
	xorl	%eax, %eax
	jmp	.LBB1_10
.LBB1_5:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_6
# %bb.7:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_8
.LBB1_6:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_8:
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB1_10:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f,@object # @_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
	.section	.rodata,"a",@progbits
	.globl	_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
	.p2align	3, 0x0
_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f:
	.quad	_Z29__device_stub__leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
	.size	_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f"
	.size	.L__unnamed_1, 51

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f ; -- Begin function _Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
	.globl	_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
	.p2align	8
	.type	_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f,@function
_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f: ; @_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v10, 4, v0
	s_waitcnt lgkmcnt(0)
	global_load_b96 v[4:6], v10, s[2:3]
	s_load_b32 s2, s[0:1], 0x18
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_div_scale_f32 v12, null, s2, s2, v5
	v_div_scale_f32 v11, null, s2, s2, v4
	v_div_scale_f32 v13, null, s2, s2, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v15, v12
	v_rcp_f32_e32 v14, v11
	v_div_scale_f32 v17, vcc_lo, v4, s2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(TRANS32_DEP_3)
	v_rcp_f32_e32 v16, v13
	v_div_scale_f32 v22, s1, v6, s2, v6
	v_div_scale_f32 v18, s0, v5, s2, v5
	v_fma_f32 v20, -v12, v15, 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v19, -v11, v14, 1.0
	v_fma_f32 v21, -v13, v16, 1.0
	v_fmac_f32_e32 v15, v20, v15
	s_clause 0x1
	global_load_b128 v[0:3], v10, s[6:7]
	global_load_b96 v[7:9], v10, s[4:5]
	v_fmac_f32_e32 v16, v21, v16
	v_fmac_f32_e32 v14, v19, v14
	v_mul_f32_e32 v20, v18, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v21, v22, v16
	v_mul_f32_e32 v19, v17, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v24, -v12, v20, v18
	v_fma_f32 v25, -v13, v21, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v23, -v11, v19, v17
	v_dual_fmac_f32 v19, v23, v14 :: v_dual_fmac_f32 v20, v24, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v21, v25, v16
	v_fma_f32 v11, -v11, v19, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v12, -v12, v20, v18
	v_fma_f32 v13, -v13, v21, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v11, v11, v14, v19
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f32 v12, v12, v15, v20
	s_mov_b32 vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v4, v11, s2, v4
	v_div_fmas_f32 v13, v13, v16, v21
	v_div_fixup_f32 v5, v12, s2, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v6, v13, s2, v6
	s_waitcnt vmcnt(1)
	v_dual_mul_f32 v14, 0x3a83126f, v0 :: v_dual_mul_f32 v15, 0x3a83126f, v1
	v_dual_mul_f32 v11, 0x3a83126f, v2 :: v_dual_fmamk_f32 v0, v4, 0x3a83126f, v0
	v_dual_fmamk_f32 v1, v5, 0x3a83126f, v1 :: v_dual_fmamk_f32 v2, v6, 0x3a83126f, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fma_f32 v7, 0.5, v14, v7
	v_fma_f32 v8, 0.5, v15, v8
	v_dual_fmac_f32 v9, 0.5, v11 :: v_dual_mul_f32 v4, 0x3a83126f, v0
	v_dual_mul_f32 v5, 0x3a83126f, v1 :: v_dual_mul_f32 v6, 0x3a83126f, v2
	v_dual_fmac_f32 v7, 0.5, v4 :: v_dual_fmac_f32 v8, 0.5, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_fmac_f32_e32 v9, 0.5, v6
	s_clause 0x1
	global_store_b96 v10, v[7:9], s[4:5]
	global_store_b128 v10, v[0:3], s[6:7]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f, .Lfunc_end0-_Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 472
; NumSgprs: 10
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f
    .private_segment_fixed_size: 0
    .sgpr_count:     10
    .sgpr_spill_count: 0
    .symbol:         _Z14leapfrogKernelP15HIP_vector_typeIfLj4EES1_S1_f.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     26
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
