#include <iostream>
#include <cuda_runtime.h>

// Define constants
#define NUM_TOKENS 64
#define HIDDEN_SIZE 256
#define HEADS 8
#define SEQ_LENGTH NUM_TOKENS
#define FLOAT_SIZE sizeof(float)

// Kernel to compute attention mechanism
__global__ void attentionKernel(float* Q, float* K, float* V, float* output, float* QK, float* softmax, int numTokens, int hiddenSize, int heads) {
    // Calculate thread and block indices
    int tid = threadIdx.x;
    int bid = blockIdx.x;
    int stride = blockDim.x;

    // Shared memory allocation
    extern __shared__ float sharedMem[];

    // Pointers to shared memory
    float* sharedQ = sharedMem;
    float* sharedK = sharedMem + hiddenSize;

    // Load Q and K into shared memory
    for (int i = tid; i < hiddenSize; i += stride) {
        sharedQ[i] = Q[bid * hiddenSize + i];
        sharedK[i] = K[bid * hiddenSize + i];
    }
    __syncthreads();

    // Compute QK for a single token
    float qkSum = 0.0f;
    for (int i = tid; i < hiddenSize; i += stride) {
        qkSum += sharedQ[i] * sharedK[i];
    }
    // Reduce sum across threads
    for (int s = stride / 2; s > 0; s >>= 1) {
        if (tid < s) qkSum += sharedMem[tid + s];
        __syncthreads();
    }

    // Normalize QK and write to global memory
    if (tid == 0) {
        QK[bid] = qkSum / sqrtf(hiddenSize);
    }
    __syncthreads();

    // Softmax normalization (simplified for demonstration)
    if (tid == 0) {
        softmax[bid] = expf(QK[bid]);
    }
    __syncthreads();

    // Compute weighted sum of V
    float weightedSum = 0.0f;
    for (int i = tid; i < hiddenSize; i += stride) {
        weightedSum += softmax[bid] * V[bid * hiddenSize + i];
    }
    // Reduce sum across threads
    for (int s = stride / 2; s > 0; s >>= 1) {
        if (tid < s) weightedSum += sharedMem[tid + s];
        __syncthreads();
    }

    // Write output
    if (tid == 0) {
        output[bid] = weightedSum;
    }
}

int main() {
    // Allocate host memory
    float* h_Q = new float[NUM_TOKENS * HIDDEN_SIZE];
    float* h_K = new float[NUM_TOKENS * HIDDEN_SIZE];
    float* h_V = new float[NUM_TOKENS * HIDDEN_SIZE];
    float* h_output = new float[NUM_TOKENS];

    // Initialize host data (simplified)
    for (int i = 0; i < NUM_TOKENS * HIDDEN_SIZE; i++) {
        h_Q[i] = 1.0f;
        h_K[i] = 1.0f;
        h_V[i] = 1.0f;
    }

    // Allocate device memory
    float* d_Q, *d_K, *d_V, *d_output, *d_QK, *d_softmax;
    cudaMalloc((void**)&d_Q, NUM_TOKENS * HIDDEN_SIZE * FLOAT_SIZE);
    cudaMalloc((void**)&d_K, NUM_TOKENS * HIDDEN_SIZE * FLOAT_SIZE);
    cudaMalloc((void**)&d_V, NUM_TOKENS * HIDDEN_SIZE * FLOAT_SIZE);
    cudaMalloc((void**)&d_output, NUM_TOKENS * FLOAT_SIZE);
    cudaMalloc((void**)&d_QK, NUM_TOKENS * FLOAT_SIZE);
    cudaMalloc((void**)&d_softmax, NUM_TOKENS * FLOAT_SIZE);

    // Copy data from host to device
    cudaMemcpy(d_Q, h_Q, NUM_TOKENS * HIDDEN_SIZE * FLOAT_SIZE, cudaMemcpyHostToDevice);
    cudaMemcpy(d_K, h_K, NUM_TOKENS * HIDDEN_SIZE * FLOAT_SIZE, cudaMemcpyHostToDevice);
    cudaMemcpy(d_V, h_V, NUM_TOKENS * HIDDEN_SIZE * FLOAT_SIZE, cudaMemcpyHostToDevice);

    // Define block and grid sizes
    dim3 blockSize(HIDDEN_SIZE);
    dim3 gridSize(NUM_TOKENS);

    // Launch kernel
    attentionKernel<<<gridSize, blockSize, (HIDDEN_SIZE * 2) * FLOAT_SIZE>>>(d_Q, d_K, d_V, d_output, d_QK, d_softmax, NUM_TOKENS, HIDDEN_SIZE, HEADS);

    // Check for errors in kernel launch
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy result back to host
    cudaMemcpy(h_output, d_output, NUM_TOKENS * FLOAT_SIZE, cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_Q);
    cudaFree(d_K);
    cudaFree(d_V);
    cudaFree(d_output);
    cudaFree(d_QK);
    cudaFree(d_softmax);

    // Free host memory
    delete[] h_Q;
    delete[] h_K;
    delete[] h_V;
    delete[] h_output;

    std::cout << "Attention computation completed successfully." << std::endl;

    return 0;
}
	.file	"tmpxft_0016d3f9_00000000-6_cuda_code_066051.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z48__device_stub__Z15attentionKernelPfS_S_S_S_S_iiiPfS_S_S_S_S_iii
	.type	_Z48__device_stub__Z15attentionKernelPfS_S_S_S_S_iiiPfS_S_S_S_S_iii, @function
_Z48__device_stub__Z15attentionKernelPfS_S_S_S_S_iiiPfS_S_S_S_S_iii:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movq	%rsp, %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z15attentionKernelPfS_S_S_S_S_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z48__device_stub__Z15attentionKernelPfS_S_S_S_S_iiiPfS_S_S_S_S_iii, .-_Z48__device_stub__Z15attentionKernelPfS_S_S_S_S_iiiPfS_S_S_S_S_iii
	.globl	_Z15attentionKernelPfS_S_S_S_S_iii
	.type	_Z15attentionKernelPfS_S_S_S_S_iii, @function
_Z15attentionKernelPfS_S_S_S_S_iii:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z15attentionKernelPfS_S_S_S_S_iiiPfS_S_S_S_S_iii
	.cfi_endproc
.LFE3661:
	.size	_Z15attentionKernelPfS_S_S_S_S_iii, .-_Z15attentionKernelPfS_S_S_S_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"CUDA error: "
.LC2:
	.string	"Attention computation completed successfully."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$65536, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$65536, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$65536, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movl	$256, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movss	.LC0(%rip), %xmm0
	movq	%rax, %r13
	xorl	%eax, %eax
.L9:
	movss	%xmm0, (%r12,%rax)
	movss	%xmm0, 0(%rbp,%rax)
	movss	%xmm0, (%rbx,%rax)
	addq	$4, %rax
	cmpq	$65536, %rax
	jne	.L9
	movq	%rsp, %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$256, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$256, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$256, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	movl	$67108865, %edi
	xorl	%r9d, %r9d
	salq	$8, %rdx
	salq	$6, %rdi
	movl	$2048, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	%rax
	.cfi_def_cfa_offset 136
	pushq	$8
	.cfi_def_cfa_offset 144
	pushq	$256
	.cfi_def_cfa_offset 152
	pushq	$64
	.cfi_def_cfa_offset 160
	movq	72(%rsp), %r9
	movq	64(%rsp), %r8
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z48__device_stub__Z15attentionKernelPfS_S_S_S_S_iiiPfS_S_S_S_S_iii
	addq	$32, %rsp
	.cfi_def_cfa_offset 128
.L10:
	call	cudaGetLastError@PLT
	movl	%eax, %r14d
	testl	%eax, %eax
	je	.L11
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L8
.L11:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$256, %edx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	xorl	%eax, %eax
.L8:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z15attentionKernelPfS_S_S_S_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15attentionKernelPfS_S_S_S_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

// Define constants
#define NUM_TOKENS 64
#define HIDDEN_SIZE 256
#define HEADS 8
#define SEQ_LENGTH NUM_TOKENS
#define FLOAT_SIZE sizeof(float)

// Kernel to compute attention mechanism
__global__ void attentionKernel(float* Q, float* K, float* V, float* output, float* QK, float* softmax, int numTokens, int hiddenSize, int heads) {
    // Calculate thread and block indices
    int tid = threadIdx.x;
    int bid = blockIdx.x;
    int stride = blockDim.x;

    // Shared memory allocation
    extern __shared__ float sharedMem[];

    // Pointers to shared memory
    float* sharedQ = sharedMem;
    float* sharedK = sharedMem + hiddenSize;

    // Load Q and K into shared memory
    for (int i = tid; i < hiddenSize; i += stride) {
        sharedQ[i] = Q[bid * hiddenSize + i];
        sharedK[i] = K[bid * hiddenSize + i];
    }
    __syncthreads();

    // Compute QK for a single token
    float qkSum = 0.0f;
    for (int i = tid; i < hiddenSize; i += stride) {
        qkSum += sharedQ[i] * sharedK[i];
    }
    // Reduce sum across threads
    for (int s = stride / 2; s > 0; s >>= 1) {
        if (tid < s) qkSum += sharedMem[tid + s];
        __syncthreads();
    }

    // Normalize QK and write to global memory
    if (tid == 0) {
        QK[bid] = qkSum / sqrtf(hiddenSize);
    }
    __syncthreads();

    // Softmax normalization (simplified for demonstration)
    if (tid == 0) {
        softmax[bid] = expf(QK[bid]);
    }
    __syncthreads();

    // Compute weighted sum of V
    float weightedSum = 0.0f;
    for (int i = tid; i < hiddenSize; i += stride) {
        weightedSum += softmax[bid] * V[bid * hiddenSize + i];
    }
    // Reduce sum across threads
    for (int s = stride / 2; s > 0; s >>= 1) {
        if (tid < s) weightedSum += sharedMem[tid + s];
        __syncthreads();
    }

    // Write output
    if (tid == 0) {
        output[bid] = weightedSum;
    }
}

int main() {
    // Allocate host memory
    float* h_Q = new float[NUM_TOKENS * HIDDEN_SIZE];
    float* h_K = new float[NUM_TOKENS * HIDDEN_SIZE];
    float* h_V = new float[NUM_TOKENS * HIDDEN_SIZE];
    float* h_output = new float[NUM_TOKENS];

    // Initialize host data (simplified)
    for (int i = 0; i < NUM_TOKENS * HIDDEN_SIZE; i++) {
        h_Q[i] = 1.0f;
        h_K[i] = 1.0f;
        h_V[i] = 1.0f;
    }

    // Allocate device memory
    float* d_Q, *d_K, *d_V, *d_output, *d_QK, *d_softmax;
    hipMalloc((void**)&d_Q, NUM_TOKENS * HIDDEN_SIZE * FLOAT_SIZE);
    hipMalloc((void**)&d_K, NUM_TOKENS * HIDDEN_SIZE * FLOAT_SIZE);
    hipMalloc((void**)&d_V, NUM_TOKENS * HIDDEN_SIZE * FLOAT_SIZE);
    hipMalloc((void**)&d_output, NUM_TOKENS * FLOAT_SIZE);
    hipMalloc((void**)&d_QK, NUM_TOKENS * FLOAT_SIZE);
    hipMalloc((void**)&d_softmax, NUM_TOKENS * FLOAT_SIZE);

    // Copy data from host to device
    hipMemcpy(d_Q, h_Q, NUM_TOKENS * HIDDEN_SIZE * FLOAT_SIZE, hipMemcpyHostToDevice);
    hipMemcpy(d_K, h_K, NUM_TOKENS * HIDDEN_SIZE * FLOAT_SIZE, hipMemcpyHostToDevice);
    hipMemcpy(d_V, h_V, NUM_TOKENS * HIDDEN_SIZE * FLOAT_SIZE, hipMemcpyHostToDevice);

    // Define block and grid sizes
    dim3 blockSize(HIDDEN_SIZE);
    dim3 gridSize(NUM_TOKENS);

    // Launch kernel
    attentionKernel<<<gridSize, blockSize, (HIDDEN_SIZE * 2) * FLOAT_SIZE>>>(d_Q, d_K, d_V, d_output, d_QK, d_softmax, NUM_TOKENS, HIDDEN_SIZE, HEADS);

    // Check for errors in kernel launch
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy result back to host
    hipMemcpy(h_output, d_output, NUM_TOKENS * FLOAT_SIZE, hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_Q);
    hipFree(d_K);
    hipFree(d_V);
    hipFree(d_output);
    hipFree(d_QK);
    hipFree(d_softmax);

    // Free host memory
    delete[] h_Q;
    delete[] h_K;
    delete[] h_V;
    delete[] h_output;

    std::cout << "Attention computation completed successfully." << std::endl;

    return 0;
}
	.text
	.file	"cuda_code_066051.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z30__device_stub__attentionKernelPfS_S_S_S_S_iii # -- Begin function _Z30__device_stub__attentionKernelPfS_S_S_S_S_iii
	.type	_Z30__device_stub__attentionKernelPfS_S_S_S_S_iii,@function
_Z30__device_stub__attentionKernelPfS_S_S_S_S_iii: # @_Z30__device_stub__attentionKernelPfS_S_S_S_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15attentionKernelPfS_S_S_S_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__attentionKernelPfS_S_S_S_S_iii, .Lfunc_end0-_Z30__device_stub__attentionKernelPfS_S_S_S_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$65536, %edi                    # imm = 0x10000
	callq	_Znam
	movq	%rax, %rbx
	movl	$65536, %edi                    # imm = 0x10000
	callq	_Znam
	movq	%rax, %r14
	movl	$65536, %edi                    # imm = 0x10000
	callq	_Znam
	movq	%rax, %r15
	movl	$256, %edi                      # imm = 0x100
	callq	_Znam
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	xorl	%eax, %eax
	movl	$1065353216, %ecx               # imm = 0x3F800000
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%ecx, (%rbx,%rax,4)
	movl	%ecx, (%r14,%rax,4)
	movl	%ecx, (%r15,%rax,4)
	incq	%rax
	cmpq	$16384, %rax                    # imm = 0x4000
	jne	.LBB1_1
# %bb.2:
	leaq	40(%rsp), %r12
	movl	$65536, %esi                    # imm = 0x10000
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %rbp
	movl	$65536, %esi                    # imm = 0x10000
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %r13
	movl	$65536, %esi                    # imm = 0x10000
	movq	%r13, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$256, %esi                      # imm = 0x100
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$256, %esi                      # imm = 0x100
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$256, %esi                      # imm = 0x100
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967360, %rdi               # imm = 0x100000040
	leaq	192(%rdi), %rdx
	movl	$2048, %r8d                     # imm = 0x800
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	(%rsp), %rcx
	movq	16(%rsp), %r8
	movq	8(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	$8
	.cfi_adjust_cfa_offset 8
	pushq	$256                            # imm = 0x100
	.cfi_adjust_cfa_offset 8
	pushq	$64
	.cfi_adjust_cfa_offset 8
	callq	_Z30__device_stub__attentionKernelPfS_S_S_S_S_iii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB1_4:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_7
# %bb.5:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_8
# %bb.6:
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%r14, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_9
.LBB1_7:
	movq	(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movq	48(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	%r12, %rdi
	callq	_ZdaPv
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%ebp, %ebp
	jmp	.LBB1_10
.LBB1_8:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_9:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movl	$-1, %ebp
.LBB1_10:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	%ebp, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15attentionKernelPfS_S_S_S_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15attentionKernelPfS_S_S_S_S_iii,@object # @_Z15attentionKernelPfS_S_S_S_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z15attentionKernelPfS_S_S_S_S_iii
	.p2align	3, 0x0
_Z15attentionKernelPfS_S_S_S_S_iii:
	.quad	_Z30__device_stub__attentionKernelPfS_S_S_S_S_iii
	.size	_Z15attentionKernelPfS_S_S_S_S_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Attention computation completed successfully."
	.size	.L.str.1, 46

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15attentionKernelPfS_S_S_S_S_iii"
	.size	.L__unnamed_1, 35

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__attentionKernelPfS_S_S_S_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15attentionKernelPfS_S_S_S_S_iii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15attentionKernelPfS_S_S_S_S_iii ; -- Begin function _Z15attentionKernelPfS_S_S_S_S_iii
	.globl	_Z15attentionKernelPfS_S_S_S_S_iii
	.p2align	8
	.type	_Z15attentionKernelPfS_S_S_S_S_iii,@function
_Z15attentionKernelPfS_S_S_S_S_iii:     ; @_Z15attentionKernelPfS_S_S_S_S_iii
; %bb.0:
	s_mov_b32 s16, s15
	s_clause 0x3
	s_load_b32 s3, s[0:1], 0x34
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b128 s[12:15], s[0:1], 0x20
	s_load_b256 s[4:11], s[0:1], 0x0
	v_lshl_add_u32 v3, v0, 2, 0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e64 s0, s3, v0
	s_and_b32 s18, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	v_mad_u64_u32 v[1:2], null, s16, s3, v[0:1]
	v_lshl_add_u32 v4, v0, 2, 0
	v_mov_b32_e32 v5, v0
	s_mov_b32 s17, 0
	s_lshl_b32 s19, s18, 2
	s_lshl_b32 s20, s3, 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v8, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v2, vcc_lo
	v_add_nc_u32_e32 v5, s18, v5
	global_load_b32 v6, v[6:7], off
	global_load_b32 v7, v[8:9], off
	v_add_co_u32 v1, vcc_lo, v1, s19
	v_cmp_le_i32_e64 s1, s3, v5
	v_add_nc_u32_e32 v8, s20, v4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	s_or_b32 s17, s1, s17
	s_waitcnt vmcnt(1)
	ds_store_b32 v4, v6
	v_add_nc_u32_e32 v4, s19, v4
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v7
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow158
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v1, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_7
; %bb.4:                                ; %.lr.ph92.preheader
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, v0
	s_mov_b32 s2, 0
	s_lshl_b32 s4, s18, 2
	s_lshl_b32 s5, s3, 2
.LBB0_5:                                ; %.lr.ph92
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v4, s5, v3
	ds_load_b32 v5, v3
	ds_load_b32 v4, v4
	v_add_nc_u32_e32 v2, s18, v2
	v_add_nc_u32_e32 v3, s4, v3
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v1, v5, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s3, v2
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_5
; %bb.6:                                ; %Flow155
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_7:                                ; %Flow156
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_lshr_b32 s4, s18, 1
	s_cmp_gt_u32 s18, 1
	s_cselect_b32 s5, -1, 0
	s_cmp_lt_u32 s18, 2
	s_cbranch_scc1 .LBB0_13
; %bb.8:
	s_mov_b32 s1, s4
.LBB0_9:                                ; %.lr.ph98
                                        ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=1
	v_add_nc_u32_e32 v2, s1, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v2, v2, 2, 0
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
.LBB0_11:                               ;   in Loop: Header=BB0_9 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_lshr_b32 s2, s1, 1
	s_cmp_lt_u32 s1, 2
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_9 Depth=1
	s_mov_b32 s1, s2
	s_branch .LBB0_9
.LBB0_13:                               ; %Flow154
	v_cmp_eq_u32_e64 s1, 0, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_15
; %bb.14:
	v_cvt_f32_i32_e32 v2, s3
	s_ashr_i32 s17, s16, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[20:21], s[16:17], 2
	s_add_u32 s20, s12, s20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v3, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	s_addc_u32 s21, s13, s21
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v4, -1, v3
	v_add_nc_u32_e32 v5, 1, v3
	v_fma_f32 v6, -v4, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v5, v3, v2
	v_cmp_ge_f32_e64 s2, 0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, v3, v4, s2
	v_cmp_lt_f32_e64 s2, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v3, v5, s2
	v_mul_f32_e32 v4, 0x37800000, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	v_cndmask_b32_e32 v2, v3, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v3, null, v2, v2, v1
	v_div_scale_f32 v6, vcc_lo, v1, v2, v1
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v3, v4, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v5, v4
	v_mul_f32_e32 v5, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, -v3, v5, v6
	v_fmac_f32_e32 v5, v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, -v3, v5, v6
	v_div_fmas_f32 v3, v3, v4, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v1, v3, v2, v1
	v_mov_b32_e32 v2, 0
	global_store_b32 v2, v1, s[20:21]
.LBB0_15:
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_17
; %bb.16:
	s_ashr_i32 s17, s16, 31
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[6:7], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s20, s14, s6
	s_addc_u32 s21, s15, s7
	s_add_u32 s6, s12, s6
	s_addc_u32 s7, s13, s7
	global_load_b32 v2, v1, s[6:7]
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v3, 0x3fb8aa3b, v2
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v4, 0x3fb8aa3b, v2, -v3
	v_rndne_f32_e32 v5, v3
	v_dual_fmamk_f32 v4, v2, 0x32a5705f, v4 :: v_dual_sub_f32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v3, v3, v4
	v_cvt_i32_f32_e32 v4, v5
	v_exp_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v2
	v_cndmask_b32_e32 v2, 0x7f800000, v3, vcc_lo
	global_store_b32 v1, v2, s[20:21]
.LBB0_17:
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v3, 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB0_21
; %bb.18:                               ; %.lr.ph104
	s_ashr_i32 s17, s16, 31
	v_mov_b32_e32 v3, 0
	s_lshl_b64 s[6:7], s[16:17], 2
	v_mad_u64_u32 v[1:2], null, s16, s3, v[0:1]
	s_add_u32 s6, s14, s6
	s_addc_u32 s7, s15, s7
	v_mov_b32_e32 v5, v0
	global_load_b32 v4, v3, s[6:7]
	s_lshl_b32 s7, s18, 2
	s_mov_b32 s6, 0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
.LBB0_19:                               ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v[1:2], off
	v_add_nc_u32_e32 v5, s18, v5
	v_add_co_u32 v1, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s3, v5
	s_or_b32 s6, s0, s6
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v3, v4, v6
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_19
; %bb.20:                               ; %Flow151
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_21:                               ; %Flow152
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_26
.LBB0_22:                               ; %.lr.ph109
                                        ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e64 s4, v0
	s_cbranch_execz .LBB0_24
; %bb.23:                               ;   in Loop: Header=BB0_22 Depth=1
	v_add_nc_u32_e32 v1, s4, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 2, 0
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v3, v3, v1
.LBB0_24:                               ;   in Loop: Header=BB0_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_lshr_b32 s0, s4, 1
	s_cmp_lt_u32 s4, 2
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_26
; %bb.25:                               ;   in Loop: Header=BB0_22 Depth=1
	s_mov_b32 s4, s0
	s_branch .LBB0_22
.LBB0_26:                               ; %Flow149
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_28
; %bb.27:
	s_ashr_i32 s17, s16, 31
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	global_store_b32 v0, v3, s[0:1]
.LBB0_28:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15attentionKernelPfS_S_S_S_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15attentionKernelPfS_S_S_S_S_iii, .Lfunc_end0-_Z15attentionKernelPfS_S_S_S_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1268
; NumSgprs: 24
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         184
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15attentionKernelPfS_S_S_S_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z15attentionKernelPfS_S_S_S_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
