#include <iostream>
#include <cuda_runtime.h>

// Define the size of the matrices
#define N 128

// Kernel for matrix multiplication using shared memory and warp-level optimizations
__global__ void matrixMulSharedWarp(float* A, float* B, float* C) {
    // Define shared memory for sub-matrices of A and B
    __shared__ float sA[32][32];
    __shared__ float sB[32][32];

    // Calculate the row and column index in the block
    int bx = blockIdx.x, by = blockIdx.y;
    int tx = threadIdx.x, ty = threadIdx.y;

    // Calculate the row and column index in the matrix
    int row = by * 32 + ty;
    int col = bx * 32 + tx;

    float Csub = 0;

    // Loop over the A and B sub-matrices required to compute the C sub-matrix
    for (int m = 0; m < (N / 32); ++m) {
        // Load the matrices from device memory to shared memory
        // Each thread loads one element of A and one element of B
        sA[ty][tx] = A[row * N + (m * 32 + tx)];
        sB[ty][tx] = B[(m * 32 + ty) * N + col];

        // Synchronize to make sure the sub-matrices are loaded
        __syncthreads();

        // Multiply the two matrices together;
        // each thread computes one element of the block sub-matrix
        #pragma unroll
        for (int k = 0; k < 32; ++k) {
            Csub += sA[ty][k] * sB[k][tx];
        }

        // Synchronize to make sure that the preceding computation is done before loading two new sub-matrices of A and B in the next iteration
        __syncthreads();
    }

    // Write the block sub-matrix to device memory;
    // each thread writes one element
    C[row * N + col] = Csub;
}

// Helper function to check for CUDA errors
void checkCudaError(cudaError_t error, const char* file, int line) {
    if (error != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(error) << " in " << file << " at line " << line << std::endl;
        exit(EXIT_FAILURE);
    }
}

#define CHECK_CUDA_ERROR(call) checkCudaError((call), __FILE__, __LINE__)

int main() {
    // Allocate host memory for matrices A, B, and C
    float* h_A = new float[N * N];
    float* h_B = new float[N * N];
    float* h_C = new float[N * N];

    // Initialize matrices A and B with random values
    for (int i = 0; i < N * N; ++i) {
        h_A[i] = static_cast<float>(rand()) / RAND_MAX;
        h_B[i] = static_cast<float>(rand()) / RAND_MAX;
    }

    // Allocate device memory for matrices A, B, and C
    float* d_A, *d_B, *d_C;
    CHECK_CUDA_ERROR(cudaMalloc(&d_A, N * N * sizeof(float)));
    CHECK_CUDA_ERROR(cudaMalloc(&d_B, N * N * sizeof(float)));
    CHECK_CUDA_ERROR(cudaMalloc(&d_C, N * N * sizeof(float)));

    // Copy matrices A and B from host memory to device memory
    CHECK_CUDA_ERROR(cudaMemcpy(d_A, h_A, N * N * sizeof(float), cudaMemcpyHostToDevice));
    CHECK_CUDA_ERROR(cudaMemcpy(d_B, h_B, N * N * sizeof(float), cudaMemcpyHostToDevice));

    // Define the block size and grid size
    dim3 dimBlock(32, 32);
    dim3 dimGrid(N / dimBlock.x, N / dimBlock.y);

    // Launch the kernel
    matrixMulSharedWarp<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);
    CHECK_CUDA_ERROR(cudaGetLastError());

    // Copy the result matrix C from device memory to host memory
    CHECK_CUDA_ERROR(cudaMemcpy(h_C, d_C, N * N * sizeof(float), cudaMemcpyDeviceToHost));

    // Free device memory
    CHECK_CUDA_ERROR(cudaFree(d_A));
    CHECK_CUDA_ERROR(cudaFree(d_B));
    CHECK_CUDA_ERROR(cudaFree(d_C));

    // Free host memory
    delete[] h_A;
    delete[] h_B;
    delete[] h_C;

    return 0;
}
	.file	"tmpxft_001850b4_00000000-6_cuda_code_007519.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error: "
.LC1:
	.string	" in "
.LC2:
	.string	" at line "
	.text
	.globl	_Z14checkCudaError9cudaErrorPKci
	.type	_Z14checkCudaError9cudaErrorPKci, @function
_Z14checkCudaError9cudaErrorPKci:
.LFB3635:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	leaq	.LC0(%rip), %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%edi, %ebx
	leaq	_ZSt4cerr(%rip), %rdi
	pushq	%rax
	.cfi_def_cfa_offset 48
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %r13
	call	cudaGetErrorString@PLT
	movq	%r13, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	.cfi_restore 13
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z14checkCudaError9cudaErrorPKci, .-_Z14checkCudaError9cudaErrorPKci
	.globl	_Z43__device_stub__Z19matrixMulSharedWarpPfS_S_PfS_S_
	.type	_Z43__device_stub__Z19matrixMulSharedWarpPfS_S_PfS_S_, @function
_Z43__device_stub__Z19matrixMulSharedWarpPfS_S_PfS_S_:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z19matrixMulSharedWarpPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z43__device_stub__Z19matrixMulSharedWarpPfS_S_PfS_S_, .-_Z43__device_stub__Z19matrixMulSharedWarpPfS_S_PfS_S_
	.globl	_Z19matrixMulSharedWarpPfS_S_
	.type	_Z19matrixMulSharedWarpPfS_S_, @function
_Z19matrixMulSharedWarpPfS_S_:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z19matrixMulSharedWarpPfS_S_PfS_S_
	.cfi_endproc
.LFE3662:
	.size	_Z19matrixMulSharedWarpPfS_S_, .-_Z19matrixMulSharedWarpPfS_S_
	.section	.rodata.str1.1
.LC4:
	.string	"/home/ubuntu/Datasets/cuda-codes-80k-from-llm-dedup/cuda_code_007519.cu"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$65536, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$65536, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$65536, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movq	%rax, %r13
.L14:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC3(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC3(%rip), %xmm0
	movss	%xmm0, 0(%rbp,%rbx)
	addq	$4, %rbx
	cmpq	$65536, %rbx
	jne	.L14
	leaq	8(%rsp), %rdi
	movl	$65536, %esi
	leaq	.LC4(%rip), %rbx
	call	cudaMalloc@PLT
	movl	$73, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	leaq	16(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	movl	$74, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	leaq	24(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	movl	$75, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movl	$78, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movl	$79, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	movl	$1, %esi
	movabsq	$17179869188, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z43__device_stub__Z19matrixMulSharedWarpPfS_S_PfS_S_
.L15:
	call	cudaGetLastError@PLT
	movl	$87, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movl	$90, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movl	$93, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	$94, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	$95, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKci
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z19matrixMulSharedWarpPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z19matrixMulSharedWarpPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

// Define the size of the matrices
#define N 128

// Kernel for matrix multiplication using shared memory and warp-level optimizations
__global__ void matrixMulSharedWarp(float* A, float* B, float* C) {
    // Define shared memory for sub-matrices of A and B
    __shared__ float sA[32][32];
    __shared__ float sB[32][32];

    // Calculate the row and column index in the block
    int bx = blockIdx.x, by = blockIdx.y;
    int tx = threadIdx.x, ty = threadIdx.y;

    // Calculate the row and column index in the matrix
    int row = by * 32 + ty;
    int col = bx * 32 + tx;

    float Csub = 0;

    // Loop over the A and B sub-matrices required to compute the C sub-matrix
    for (int m = 0; m < (N / 32); ++m) {
        // Load the matrices from device memory to shared memory
        // Each thread loads one element of A and one element of B
        sA[ty][tx] = A[row * N + (m * 32 + tx)];
        sB[ty][tx] = B[(m * 32 + ty) * N + col];

        // Synchronize to make sure the sub-matrices are loaded
        __syncthreads();

        // Multiply the two matrices together;
        // each thread computes one element of the block sub-matrix
        #pragma unroll
        for (int k = 0; k < 32; ++k) {
            Csub += sA[ty][k] * sB[k][tx];
        }

        // Synchronize to make sure that the preceding computation is done before loading two new sub-matrices of A and B in the next iteration
        __syncthreads();
    }

    // Write the block sub-matrix to device memory;
    // each thread writes one element
    C[row * N + col] = Csub;
}

// Helper function to check for CUDA errors
void checkCudaError(hipError_t error, const char* file, int line) {
    if (error != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(error) << " in " << file << " at line " << line << std::endl;
        exit(EXIT_FAILURE);
    }
}

#define CHECK_CUDA_ERROR(call) checkCudaError((call), __FILE__, __LINE__)

int main() {
    // Allocate host memory for matrices A, B, and C
    float* h_A = new float[N * N];
    float* h_B = new float[N * N];
    float* h_C = new float[N * N];

    // Initialize matrices A and B with random values
    for (int i = 0; i < N * N; ++i) {
        h_A[i] = static_cast<float>(rand()) / RAND_MAX;
        h_B[i] = static_cast<float>(rand()) / RAND_MAX;
    }

    // Allocate device memory for matrices A, B, and C
    float* d_A, *d_B, *d_C;
    CHECK_CUDA_ERROR(hipMalloc(&d_A, N * N * sizeof(float)));
    CHECK_CUDA_ERROR(hipMalloc(&d_B, N * N * sizeof(float)));
    CHECK_CUDA_ERROR(hipMalloc(&d_C, N * N * sizeof(float)));

    // Copy matrices A and B from host memory to device memory
    CHECK_CUDA_ERROR(hipMemcpy(d_A, h_A, N * N * sizeof(float), hipMemcpyHostToDevice));
    CHECK_CUDA_ERROR(hipMemcpy(d_B, h_B, N * N * sizeof(float), hipMemcpyHostToDevice));

    // Define the block size and grid size
    dim3 dimBlock(32, 32);
    dim3 dimGrid(N / dimBlock.x, N / dimBlock.y);

    // Launch the kernel
    matrixMulSharedWarp<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);
    CHECK_CUDA_ERROR(hipGetLastError());

    // Copy the result matrix C from device memory to host memory
    CHECK_CUDA_ERROR(hipMemcpy(h_C, d_C, N * N * sizeof(float), hipMemcpyDeviceToHost));

    // Free device memory
    CHECK_CUDA_ERROR(hipFree(d_A));
    CHECK_CUDA_ERROR(hipFree(d_B));
    CHECK_CUDA_ERROR(hipFree(d_C));

    // Free host memory
    delete[] h_A;
    delete[] h_B;
    delete[] h_C;

    return 0;
}
	.text
	.file	"cuda_code_007519.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z34__device_stub__matrixMulSharedWarpPfS_S_ # -- Begin function _Z34__device_stub__matrixMulSharedWarpPfS_S_
	.type	_Z34__device_stub__matrixMulSharedWarpPfS_S_,@function
_Z34__device_stub__matrixMulSharedWarpPfS_S_: # @_Z34__device_stub__matrixMulSharedWarpPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19matrixMulSharedWarpPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z34__device_stub__matrixMulSharedWarpPfS_S_, .Lfunc_end0-_Z34__device_stub__matrixMulSharedWarpPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCudaError10hipError_tPKci # -- Begin function _Z14checkCudaError10hipError_tPKci
	.type	_Z14checkCudaError10hipError_tPKci,@function
_Z14checkCudaError10hipError_tPKci:     # @_Z14checkCudaError10hipError_tPKci
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB1_2
# %bb.1:
	retq
.LBB1_2:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movq	%rsi, %r14
	movl	%edi, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r15
	movl	%ebp, %edi
	callq	hipGetErrorString
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z14checkCudaError10hipError_tPKci, .Lfunc_end1-_Z14checkCudaError10hipError_tPKci
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$65536, %edi                    # imm = 0x10000
	callq	_Znam
	movq	%rax, %rbx
	movl	$65536, %edi                    # imm = 0x10000
	callq	_Znam
	movq	%rax, %r14
	movl	$65536, %edi                    # imm = 0x10000
	callq	_Znam
	movq	%rax, %r15
	xorl	%r12d, %r12d
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	%xmm0, (%r14,%r12,4)
	incq	%r12
	cmpq	$16384, %r12                    # imm = 0x4000
	jne	.LBB2_1
# %bb.2:
	leaq	24(%rsp), %r13
	movl	$65536, %esi                    # imm = 0x10000
	movq	%r13, %rdi
	callq	hipMalloc
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$73, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	leaq	16(%rsp), %r12
	movl	$65536, %esi                    # imm = 0x10000
	movq	%r12, %rdi
	callq	hipMalloc
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$74, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	leaq	8(%rsp), %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$75, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	(%r13), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$78, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	(%r12), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$79, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movabsq	$17179869188, %rdi              # imm = 0x400000004
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z34__device_stub__matrixMulSharedWarpPfS_S_
.LBB2_4:
	callq	hipGetLastError
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$87, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	8(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$90, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	24(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$93, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$94, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	movl	$95, %edx
	callq	_Z14checkCudaError10hipError_tPKci
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19matrixMulSharedWarpPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z19matrixMulSharedWarpPfS_S_,@object # @_Z19matrixMulSharedWarpPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z19matrixMulSharedWarpPfS_S_
	.p2align	3, 0x0
_Z19matrixMulSharedWarpPfS_S_:
	.quad	_Z34__device_stub__matrixMulSharedWarpPfS_S_
	.size	_Z19matrixMulSharedWarpPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" in "
	.size	.L.str.1, 5

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" at line "
	.size	.L.str.2, 10

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"/home/ubuntu/Datasets/hip-codes-80k-from-llm-dedup-disassemble-sm89/cuda_code_007519.hip"
	.size	.L.str.3, 89

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z19matrixMulSharedWarpPfS_S_"
	.size	.L__unnamed_1, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z34__device_stub__matrixMulSharedWarpPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z19matrixMulSharedWarpPfS_S_
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z19matrixMulSharedWarpPfS_S_ ; -- Begin function _Z19matrixMulSharedWarpPfS_S_
	.globl	_Z19matrixMulSharedWarpPfS_S_
	.p2align	8
	.type	_Z19matrixMulSharedWarpPfS_S_,@function
_Z19matrixMulSharedWarpPfS_S_:          ; @_Z19matrixMulSharedWarpPfS_S_
; %bb.0:
	v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v2, 0x3ff, v0
	v_lshrrev_b32_e32 v0, 3, v0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_lshl_b32 s2, s14, 5
	v_lshlrev_b32_e32 v1, 2, v2
	s_lshl_b32 s3, s15, 12
	v_and_b32_e32 v4, 0x1ff80, v0
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v5, 0x1000, v1
	v_add_nc_u32_e32 v0, v2, v4
	v_add_nc_u32_e32 v6, v4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v7, v5, v4
	v_add_nc_u32_e32 v9, 0x400, v5
	v_add_nc_u32_e32 v8, s3, v0
	v_add_nc_u32_e32 v0, s2, v0
	v_add_nc_u32_e32 v10, 0x800, v5
	v_add_nc_u32_e32 v11, 0xc00, v5
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v12, s8, v8
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s8, s8, 32
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmpk_eq_i32 s8, 0x80
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[14:15], 2, v[0:1]
	v_add_nc_u32_e32 v0, 0x1000, v0
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v14, vcc_lo, s6, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s7, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s4, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
	global_load_b32 v1, v[14:15], off
	global_load_b32 v12, v[12:13], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v12
	ds_store_b32 v7, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[20:21], v5 offset1:32
	ds_load_b128 v[12:15], v4
	ds_load_2addr_b32 v[22:23], v5 offset0:64 offset1:96
	ds_load_b128 v[16:19], v4 offset:16
	ds_load_2addr_b32 v[24:25], v5 offset0:128 offset1:160
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v3, v12, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v13, v21
	ds_load_2addr_b32 v[20:21], v5 offset0:192 offset1:224
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v3, v14, v22
	v_fmac_f32_e32 v3, v15, v23
	ds_load_2addr_b32 v[22:23], v9 offset1:32
	ds_load_b128 v[12:15], v4 offset:32
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v3, v16, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v17, v25
	ds_load_2addr_b32 v[24:25], v9 offset0:64 offset1:96
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v3, v18, v20
	v_fmac_f32_e32 v3, v19, v21
	ds_load_b128 v[16:19], v4 offset:48
	ds_load_2addr_b32 v[20:21], v9 offset0:128 offset1:160
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v3, v12, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v13, v23
	ds_load_2addr_b32 v[22:23], v9 offset0:192 offset1:224
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v3, v14, v24
	v_fmac_f32_e32 v3, v15, v25
	ds_load_2addr_b32 v[24:25], v10 offset1:32
	ds_load_b128 v[12:15], v4 offset:64
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v3, v16, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v17, v21
	ds_load_2addr_b32 v[20:21], v10 offset0:64 offset1:96
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v3, v18, v22
	v_fmac_f32_e32 v3, v19, v23
	ds_load_b128 v[16:19], v4 offset:80
	ds_load_2addr_b32 v[22:23], v10 offset0:128 offset1:160
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v3, v12, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v13, v25
	ds_load_2addr_b32 v[24:25], v10 offset0:192 offset1:224
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v3, v14, v20
	v_fmac_f32_e32 v3, v15, v21
	ds_load_2addr_b32 v[20:21], v11 offset1:32
	ds_load_b128 v[12:15], v4 offset:96
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v3, v16, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v17, v23
	ds_load_2addr_b32 v[22:23], v11 offset0:64 offset1:96
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v3, v18, v24
	v_fmac_f32_e32 v3, v19, v25
	ds_load_b128 v[16:19], v4 offset:112
	ds_load_2addr_b32 v[24:25], v11 offset0:128 offset1:160
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v3, v12, v20
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v3, v13, v21
	ds_load_2addr_b32 v[12:13], v11 offset0:192 offset1:224
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_fmac_f32_e32 v3, v14, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v15, v23
	v_fmac_f32_e32 v3, v16, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v17, v25
	v_fmac_f32_e32 v3, v18, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v3, v19, v13
	s_cbranch_scc0 .LBB0_1
; %bb.2:
	v_add_nc_u32_e32 v0, s2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, s3, v4, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19matrixMulSharedWarpPfS_S_
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z19matrixMulSharedWarpPfS_S_, .Lfunc_end0-_Z19matrixMulSharedWarpPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 764
; NumSgprs: 18
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19matrixMulSharedWarpPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19matrixMulSharedWarpPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     26
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
