#include <iostream>
#include <vector>
#include <cuda_runtime.h>

#define WARP_SIZE 32
#define MAX_EDGES 1024

// Kernel function for breadth-first traversal
__global__ void bfsKernel(const int *rowPtr, const int *colInd, int *dist, int *queue, int *queueSize, int numNodes) {
    extern __shared__ int s_queue[];

    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    int warp_id = tid / WARP_SIZE;
    int lane_id = tid % WARP_SIZE;

    // Load queue into shared memory
    int start = lane_id;
    int end = *queueSize;
    while (start < end) {
        s_queue[start] = queue[start];
        start += WARP_SIZE;
    }
    __syncthreads();

    // Process each node in the queue
    start = lane_id;
    while (start < *queueSize) {
        int node = s_queue[start];
        int rowStart = rowPtr[node];
        int rowEnd = rowPtr[node + 1];
        for (int offset = rowStart; offset < rowEnd; ++offset) {
            int neighbor = colInd[offset];
            if (dist[neighbor] == -1) {
                atomicExch(&dist[neighbor], dist[node] + 1);
                int index = atomicAdd(queueSize, 1);
                queue[index] = neighbor;
            }
        }
        start += WARP_SIZE;
    }
    __syncthreads();
}

int main() {
    // Example graph with 128 nodes and an adjacency list representation
    int numNodes = 128;
    int rowPtr[MAX_EDGES + 1];
    int colInd[MAX_EDGES];
    int dist[numNodes];
    int queue[numNodes];
    int queueSize = 0;

    // Initialize graph (example values)
    for (int i = 0; i < numNodes; ++i) {
        rowPtr[i] = i * 2; // Each node has 2 edges for simplicity
        colInd[i * 2] = (i + 1) % numNodes;
        colInd[i * 2 + 1] = (i + 2) % numNodes;
        dist[i] = -1;
    }
    rowPtr[numNodes] = numNodes * 2;

    // Set the source node
    queue[0] = 0;
    queueSize = 1;
    dist[0] = 0;

    // Allocate device memory
    int *d_rowPtr, *d_colInd, *d_dist, *d_queue, *d_queueSize;
    cudaMalloc(&d_rowPtr, (numNodes + 1) * sizeof(int));
    cudaMalloc(&d_colInd, MAX_EDGES * sizeof(int));
    cudaMalloc(&d_dist, numNodes * sizeof(int));
    cudaMalloc(&d_queue, numNodes * sizeof(int));
    cudaMalloc(&d_queueSize, sizeof(int));

    // Copy data to device
    cudaMemcpy(d_rowPtr, rowPtr, (numNodes + 1) * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_colInd, colInd, MAX_EDGES * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_dist, dist, numNodes * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_queue, queue, numNodes * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_queueSize, &queueSize, sizeof(int), cudaMemcpyHostToDevice);

    // Launch kernel
    int blockSize = 256;
    int numBlocks = (numNodes + blockSize - 1) / blockSize;
    int sharedMemSize = numNodes * sizeof(int);
    bfsKernel<<<numBlocks, blockSize, sharedMemSize>>>(d_rowPtr, d_colInd, d_dist, d_queue, d_queueSize, numNodes);

    // Check for errors
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy result back to host
    cudaMemcpy(dist, d_dist, numNodes * sizeof(int), cudaMemcpyDeviceToHost);
    cudaMemcpy(&queueSize, d_queueSize, sizeof(int), cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_rowPtr);
    cudaFree(d_colInd);
    cudaFree(d_dist);
    cudaFree(d_queue);
    cudaFree(d_queueSize);

    // Print distances
    std::cout << "Distances from source node 0:" << std::endl;
    for (int i = 0; i < numNodes; ++i) {
        std::cout << "Node " << i << ": " << dist[i] << std::endl;
    }

    return 0;
}
	.file	"tmpxft_0019b70d_00000000-6_cuda_code_068184.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4001:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4001:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z41__device_stub__Z9bfsKernelPKiS0_PiS1_S1_iPKiS0_PiS1_S1_i
	.type	_Z41__device_stub__Z9bfsKernelPKiS0_PiS1_S1_iPKiS0_PiS1_S1_i, @function
_Z41__device_stub__Z9bfsKernelPKiS0_PiS1_S1_iPKiS0_PiS1_S1_i:
.LFB4023:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z9bfsKernelPKiS0_PiS1_S1_i(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4023:
	.size	_Z41__device_stub__Z9bfsKernelPKiS0_PiS1_S1_iPKiS0_PiS1_S1_i, .-_Z41__device_stub__Z9bfsKernelPKiS0_PiS1_S1_iPKiS0_PiS1_S1_i
	.globl	_Z9bfsKernelPKiS0_PiS1_S1_i
	.type	_Z9bfsKernelPKiS0_PiS1_S1_i, @function
_Z9bfsKernelPKiS0_PiS1_S1_i:
.LFB4024:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z9bfsKernelPKiS0_PiS1_S1_iPKiS0_PiS1_S1_i
	.cfi_endproc
.LFE4024:
	.size	_Z9bfsKernelPKiS0_PiS1_S1_i, .-_Z9bfsKernelPKiS0_PiS1_S1_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error: "
.LC1:
	.string	"Distances from source node 0:"
.LC2:
	.string	"Node "
.LC3:
	.string	": "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3998:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$4096, %rsp
	orq	$0, (%rsp)
	subq	$4096, %rsp
	orq	$0, (%rsp)
	subq	$96, %rsp
	.cfi_offset 14, -24
	.cfi_offset 13, -32
	.cfi_offset 12, -40
	.cfi_offset 3, -48
	movq	%fs:40, %rax
	movq	%rax, -40(%rbp)
	movq	%rsp, %rax
.L9:
	cmpq	%rax, %rsp
	je	.L10
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L9
.L10:
	subq	$512, %rsp
	orq	$0, 504(%rsp)
	leaq	3(%rsp), %rbx
	movq	%rsp, %rax
	movq	%rbx, %rsi
	andq	$-4, %rbx
	shrq	$2, %rsi
.L12:
	cmpq	%rax, %rsp
	je	.L13
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L12
.L13:
	subq	$512, %rsp
	orq	$0, 504(%rsp)
	xorl	%eax, %eax
	leaq	3(%rsp), %r12
	movq	%r12, %r8
	andq	$-4, %r12
	shrq	$2, %r8
.L15:
	leal	(%rax,%rax), %edx
	leaq	-4140(%rbp), %r14
	movl	%edx, (%r14,%rax,4)
	leal	1(%rax), %edx
	leaq	-8236(%rbp), %r13
	andl	$127, %edx
	movl	%edx, 0(%r13,%rax,8)
	leal	2(%rax), %edx
	andl	$127, %edx
	movl	%edx, -8232(%rbp,%rax,8)
	incq	%rax
	cmpq	$128, %rax
	jne	.L15
	movb	$-1, %al
	movl	$512, %ecx
	movq	%rbx, %rdi
	xorl	%edx, %edx
	rep stosb
	xorl	%eax, %eax
	movl	%edx, 0(,%rsi,4)
	leaq	-8304(%rbp), %rdi
	movl	%eax, 0(,%r8,4)
	movl	$516, %esi
	movl	$256, -3628(%rbp)
	movl	$1, -8308(%rbp)
	call	cudaMalloc@PLT
	leaq	-8296(%rbp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	leaq	-8288(%rbp), %rdi
	movl	$512, %esi
	call	cudaMalloc@PLT
	leaq	-8280(%rbp), %rdi
	movl	$512, %esi
	call	cudaMalloc@PLT
	leaq	-8272(%rbp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	-8304(%rbp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	movl	$516, %edx
	call	cudaMemcpy@PLT
	movq	-8296(%rbp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	movl	$4096, %edx
	leaq	-8308(%rbp), %r13
	call	cudaMemcpy@PLT
	movq	-8288(%rbp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$512, %edx
	call	cudaMemcpy@PLT
	movq	-8280(%rbp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$512, %edx
	call	cudaMemcpy@PLT
	movq	-8272(%rbp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rdi
	salq	$8, %rdx
	movl	$512, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, -8248(%rbp)
	movl	$1, -8240(%rbp)
	movq	%rdi, -8260(%rbp)
	movl	$1, -8252(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	-8272(%rbp), %r8
	movq	-8280(%rbp), %rcx
	movl	$128, %r9d
	movq	-8288(%rbp), %rdx
	movq	-8296(%rbp), %rsi
	movq	-8304(%rbp), %rdi
	call	_Z41__device_stub__Z9bfsKernelPKiS0_PiS1_S1_iPKiS0_PiS1_S1_i
.L16:
	call	cudaGetLastError@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L17
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L8
.L17:
	movl	$2, %ecx
	movl	$512, %edx
	movq	%rbx, %rdi
	xorl	%r12d, %r12d
	movq	-8288(%rbp), %rsi
	leaq	.LC2(%rip), %r14
	call	cudaMemcpy@PLT
	movq	-8272(%rbp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	movl	$4, %edx
	leaq	_ZSt4cout(%rip), %r13
	call	cudaMemcpy@PLT
	movq	-8304(%rbp), %rdi
	call	cudaFree@PLT
	movq	-8296(%rbp), %rdi
	call	cudaFree@PLT
	movq	-8288(%rbp), %rdi
	call	cudaFree@PLT
	movq	-8280(%rbp), %rdi
	call	cudaFree@PLT
	movq	-8272(%rbp), %rdi
	call	cudaFree@PLT
	leaq	.LC1(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L19:
	movq	%r14, %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	(%rbx,%r12,4), %esi
	incq	%r12
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpq	$128, %r12
	jne	.L19
	xorl	%eax, %eax
.L8:
	movq	-40(%rbp), %rdx
	subq	%fs:40, %rdx
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	leaq	-32(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3998:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z9bfsKernelPKiS0_PiS1_S1_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4026:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9bfsKernelPKiS0_PiS1_S1_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4026:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <vector>
#include <hip/hip_runtime.h>

#define WARP_SIZE 32
#define MAX_EDGES 1024

// Kernel function for breadth-first traversal
__global__ void bfsKernel(const int *rowPtr, const int *colInd, int *dist, int *queue, int *queueSize, int numNodes) {
    extern __shared__ int s_queue[];

    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    int warp_id = tid / WARP_SIZE;
    int lane_id = tid % WARP_SIZE;

    // Load queue into shared memory
    int start = lane_id;
    int end = *queueSize;
    while (start < end) {
        s_queue[start] = queue[start];
        start += WARP_SIZE;
    }
    __syncthreads();

    // Process each node in the queue
    start = lane_id;
    while (start < *queueSize) {
        int node = s_queue[start];
        int rowStart = rowPtr[node];
        int rowEnd = rowPtr[node + 1];
        for (int offset = rowStart; offset < rowEnd; ++offset) {
            int neighbor = colInd[offset];
            if (dist[neighbor] == -1) {
                atomicExch(&dist[neighbor], dist[node] + 1);
                int index = atomicAdd(queueSize, 1);
                queue[index] = neighbor;
            }
        }
        start += WARP_SIZE;
    }
    __syncthreads();
}

int main() {
    // Example graph with 128 nodes and an adjacency list representation
    int numNodes = 128;
    int rowPtr[MAX_EDGES + 1];
    int colInd[MAX_EDGES];
    int dist[numNodes];
    int queue[numNodes];
    int queueSize = 0;

    // Initialize graph (example values)
    for (int i = 0; i < numNodes; ++i) {
        rowPtr[i] = i * 2; // Each node has 2 edges for simplicity
        colInd[i * 2] = (i + 1) % numNodes;
        colInd[i * 2 + 1] = (i + 2) % numNodes;
        dist[i] = -1;
    }
    rowPtr[numNodes] = numNodes * 2;

    // Set the source node
    queue[0] = 0;
    queueSize = 1;
    dist[0] = 0;

    // Allocate device memory
    int *d_rowPtr, *d_colInd, *d_dist, *d_queue, *d_queueSize;
    hipMalloc(&d_rowPtr, (numNodes + 1) * sizeof(int));
    hipMalloc(&d_colInd, MAX_EDGES * sizeof(int));
    hipMalloc(&d_dist, numNodes * sizeof(int));
    hipMalloc(&d_queue, numNodes * sizeof(int));
    hipMalloc(&d_queueSize, sizeof(int));

    // Copy data to device
    hipMemcpy(d_rowPtr, rowPtr, (numNodes + 1) * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_colInd, colInd, MAX_EDGES * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_dist, dist, numNodes * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_queue, queue, numNodes * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_queueSize, &queueSize, sizeof(int), hipMemcpyHostToDevice);

    // Launch kernel
    int blockSize = 256;
    int numBlocks = (numNodes + blockSize - 1) / blockSize;
    int sharedMemSize = numNodes * sizeof(int);
    bfsKernel<<<numBlocks, blockSize, sharedMemSize>>>(d_rowPtr, d_colInd, d_dist, d_queue, d_queueSize, numNodes);

    // Check for errors
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy result back to host
    hipMemcpy(dist, d_dist, numNodes * sizeof(int), hipMemcpyDeviceToHost);
    hipMemcpy(&queueSize, d_queueSize, sizeof(int), hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_rowPtr);
    hipFree(d_colInd);
    hipFree(d_dist);
    hipFree(d_queue);
    hipFree(d_queueSize);

    // Print distances
    std::cout << "Distances from source node 0:" << std::endl;
    for (int i = 0; i < numNodes; ++i) {
        std::cout << "Node " << i << ": " << dist[i] << std::endl;
    }

    return 0;
}
	.text
	.file	"cuda_code_068184.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z24__device_stub__bfsKernelPKiS0_PiS1_S1_i # -- Begin function _Z24__device_stub__bfsKernelPKiS0_PiS1_S1_i
	.type	_Z24__device_stub__bfsKernelPKiS0_PiS1_S1_i,@function
_Z24__device_stub__bfsKernelPKiS0_PiS1_S1_i: # @_Z24__device_stub__bfsKernelPKiS0_PiS1_S1_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9bfsKernelPKiS0_PiS1_S1_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__bfsKernelPKiS0_PiS1_S1_i, .Lfunc_end0-_Z24__device_stub__bfsKernelPKiS0_PiS1_S1_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$9288, %rsp                     # imm = 0x2448
	.cfi_def_cfa_offset 9344
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsp, 56(%rsp)                  # 8-byte Spill
	leaq	64(%rsp), %rdi
	movl	$512, %edx                      # imm = 0x200
	movl	$255, %esi
	callq	memset@PLT
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, 5184(%rsp,%rcx,4)
	leaq	1(%rcx), %rdx
	movl	%edx, %esi
	andl	$127, %esi
	movl	%esi, 1088(%rsp,%rcx,8)
	leal	2(%rcx), %esi
	andl	$127, %esi
	movl	%esi, 1092(%rsp,%rcx,8)
	addl	$2, %eax
	movq	%rdx, %rcx
	cmpq	$128, %rdx
	jne	.LBB1_1
# %bb.2:
	leaq	5184(%rsp), %r13
	movl	$256, 512(%r13)                 # imm = 0x100
	xorl	%eax, %eax
	leaq	576(%rsp), %rcx
	movl	%eax, (%rcx)
	leaq	12(%rsp), %rcx
	movl	$1, (%rcx)
	leaq	64(%rsp), %rcx
	movl	%eax, (%rcx)
	leaq	48(%rsp), %r12
	movl	$516, %esi                      # imm = 0x204
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	40(%rsp), %r15
	movl	$4096, %esi                     # imm = 0x1000
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %r14
	movl	$512, %esi                      # imm = 0x200
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %rbx
	movl	$512, %esi                      # imm = 0x200
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rbp
	movl	$4, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$516, %edx                      # imm = 0x204
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	leaq	1088(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movl	$512, %edx                      # imm = 0x200
	leaq	64(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movl	$512, %edx                      # imm = 0x200
	leaq	576(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$4, %edx
	leaq	12(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	255(%rdi), %rdx
	movl	$512, %r8d                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	32(%rsp), %rcx
	movq	16(%rsp), %r8
	movl	$128, %r9d
	callq	_Z24__device_stub__bfsKernelPKiS0_PiS1_S1_i
.LBB1_4:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_9
# %bb.5:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_6
# %bb.7:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_8
.LBB1_9:
	movq	24(%rsp), %rsi
	leaq	64(%rsp), %rdi
	movl	$512, %edx                      # imm = 0x200
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	leaq	12(%rsp), %rdi
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$29, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB1_10:                               # =>This Inner Loop Header: Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.3, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	64(%rsp,%r14,4), %esi
	movq	%r15, %rdi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r14
	cmpq	$128, %r14
	jne	.LBB1_10
	jmp	.LBB1_11
.LBB1_6:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_8:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %ebx
.LBB1_11:                               # %.loopexit
	movq	56(%rsp), %rsp                  # 8-byte Reload
	movl	%ebx, %eax
	addq	$9288, %rsp                     # imm = 0x2448
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9bfsKernelPKiS0_PiS1_S1_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9bfsKernelPKiS0_PiS1_S1_i,@object # @_Z9bfsKernelPKiS0_PiS1_S1_i
	.section	.rodata,"a",@progbits
	.globl	_Z9bfsKernelPKiS0_PiS1_S1_i
	.p2align	3, 0x0
_Z9bfsKernelPKiS0_PiS1_S1_i:
	.quad	_Z24__device_stub__bfsKernelPKiS0_PiS1_S1_i
	.size	_Z9bfsKernelPKiS0_PiS1_S1_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Distances from source node 0:"
	.size	.L.str.1, 30

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Node "
	.size	.L.str.2, 6

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	": "
	.size	.L.str.3, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9bfsKernelPKiS0_PiS1_S1_i"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__bfsKernelPKiS0_PiS1_S1_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9bfsKernelPKiS0_PiS1_S1_i
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9bfsKernelPKiS0_PiS1_S1_i ; -- Begin function _Z9bfsKernelPKiS0_PiS1_S1_i
	.globl	_Z9bfsKernelPKiS0_PiS1_S1_i
	.p2align	8
	.type	_Z9bfsKernelPKiS0_PiS1_S1_i,@function
_Z9bfsKernelPKiS0_PiS1_S1_i:            ; @_Z9bfsKernelPKiS0_PiS1_S1_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b64 s[2:3], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_load_b32 s12, s[2:3], 0x0
	s_load_b256 s[4:11], s[0:1], 0x0
	s_mov_b32 s1, exec_lo
	v_ashrrev_i32_e32 v0, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v0, 27, v0
	v_add_nc_u32_e32 v0, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, 0xffffffe0, v0
	v_sub_nc_u32_e32 v0, v1, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v0
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshl_add_u32 v3, v0, 2, 0
	v_mov_b32_e32 v4, v0
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v1, vcc_lo, s10, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[1:2], off
	v_add_nc_u32_e32 v4, 32, v4
	v_add_co_u32 v1, vcc_lo, 0x80, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s12, v4
	s_or_b32 s13, s0, s13
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v5
	v_add_nc_u32_e32 v3, 0x80, v3
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow74
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_load_b32 s0, s[2:3], 0x0
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s0, v0
	s_cbranch_execz .LBB0_14
; %bb.4:                                ; %.lr.ph47.preheader
	v_dual_mov_b32 v5, s0 :: v_dual_mov_b32 v10, 0
	s_mov_b32 s12, 0
.LBB0_5:                                ; %.lr.ph47
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_7 Depth 2
	v_lshl_add_u32 v1, v0, 2, 0
	s_mov_b32 s13, exec_lo
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v4, vcc_lo
	global_load_b64 v[1:2], v[1:2], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v1, v2
	s_cbranch_execz .LBB0_13
; %bb.6:                                ; %.lr.ph43
                                        ;   in Loop: Header=BB0_5 Depth=1
	v_ashrrev_i32_e32 v6, 31, v1
	v_mov_b32_e32 v5, v1
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_mov_b32 s14, 0
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
.LBB0_7:                                ;   Parent Loop BB0_5 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v7, v[5:6], off
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[7:8]
	v_add_co_u32 v8, vcc_lo, s8, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v9, vcc_lo
	global_load_b32 v11, v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 -1, v11
	s_cbranch_execz .LBB0_11
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=2
	global_load_b32 v11, v[3:4], off
	s_mov_b32 s15, exec_lo
	s_mov_b32 s16, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v11, 1, v11
	global_atomic_swap_b32 v[8:9], v11, off
	v_mbcnt_lo_u32_b32 v8, s15, 0
                                        ; implicit-def: $vgpr9
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v8
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_7 Depth=2
	s_bcnt1_i32_b32 s15, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v9, s15
	global_atomic_add_u32 v9, v10, v9, s[2:3] glc
.LBB0_10:                               ;   in Loop: Header=BB0_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s16
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s15, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, s15, v8
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v8, vcc_lo, s10, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
	global_store_b32 v[8:9], v7, off
.LBB0_11:                               ; %Flow
                                        ;   in Loop: Header=BB0_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v1, 1, v1
	v_add_co_u32 v5, s0, v5, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v6, s0, 0, v6, s0
	v_cmp_ge_i32_e32 vcc_lo, v1, v2
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB0_7
; %bb.12:                               ; %._crit_edge44.loopexit
                                        ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	global_load_b32 v5, v10, s[2:3]
.LBB0_13:                               ; %Flow70
                                        ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v0, 32, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v0, v5
	s_or_b32 s12, vcc_lo, s12
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB0_5
.LBB0_14:                               ; %Flow72
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9bfsKernelPKiS0_PiS1_S1_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9bfsKernelPKiS0_PiS1_S1_i, .Lfunc_end0-_Z9bfsKernelPKiS0_PiS1_S1_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 744
; NumSgprs: 19
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         168
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9bfsKernelPKiS0_PiS1_S1_i
    .private_segment_fixed_size: 0
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _Z9bfsKernelPKiS0_PiS1_S1_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
