#include <iostream>
#include <cuda_runtime.h>
#include <vector>

// Define a simple structure for sparse matrix storage
struct SparseMatrix {
    int* row_indices;
    int* col_indices;
    float* values;
    int num_nonzeros;
};

// Kernel for sparse convolution
__global__ void sparseConvolutionKernel(const SparseMatrix input, const float* filter, float* output, int filter_size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    int stride = blockDim.x * gridDim.x;

    for (int i = idx; i < input.num_nonzeros; i += stride) {
        int row = input.row_indices[i];
        int col = input.col_indices[i];
        float value = input.values[i];

        // Perform convolution for each non-zero element
        for (int j = 0; j < filter_size; ++j) {
            for (int k = 0; k < filter_size; ++k) {
                int out_row = row + j - filter_size / 2;
                int out_col = col + k - filter_size / 2;

                if (out_row >= 0 && out_row < 1024 && out_col >= 0 && out_col < 1024) {
                    atomicAdd(&output[out_row * 1024 + out_col], value * filter[j * filter_size + k]);
                }
            }
        }
    }
}

int main() {
    // Initialize CUDA
    cudaError_t err = cudaSetDevice(0);
    if (err != cudaSuccess) {
        std::cerr << "Failed to set CUDA device: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Define filter size
    const int filter_size = 1024;

    // Allocate and initialize filter
    float* filter;
    err = cudaMallocManaged(&filter, filter_size * filter_size * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate filter: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    for (int i = 0; i < filter_size * filter_size; ++i) {
        filter[i] = 1.0f / (filter_size * filter_size); // Simple averaging filter
    }

    // Create a simple sparse input matrix (for demonstration)
    SparseMatrix input;
    input.num_nonzeros = 10000; // Example number of non-zero elements
    err = cudaMallocManaged(&input.row_indices, input.num_nonzeros * sizeof(int));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate row indices: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMallocManaged(&input.col_indices, input.num_nonzeros * sizeof(int));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate col indices: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMallocManaged(&input.values, input.num_nonzeros * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate values: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Initialize sparse input matrix (random non-zero positions and values)
    for (int i = 0; i < input.num_nonzeros; ++i) {
        input.row_indices[i] = rand() % 1024;
        input.col_indices[i] = rand() % 1024;
        input.values[i] = static_cast<float>(rand()) / RAND_MAX;
    }

    // Allocate output matrix
    float* output;
    err = cudaMallocManaged(&output, 1024 * 1024 * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate output: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    cudaMemset(output, 0, 1024 * 1024 * sizeof(float));

    // Launch kernel
    int threadsPerBlock = 256;
    int blocksPerGrid = (input.num_nonzeros + threadsPerBlock - 1) / threadsPerBlock;
    sparseConvolutionKernel<<<blocksPerGrid, threadsPerBlock>>>(input, filter, output, filter_size);

    // Check for errors in kernel launch
    err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Kernel launch failed: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Synchronize and check for errors during execution
    err = cudaDeviceSynchronize();
    if (err != cudaSuccess) {
        std::cerr << "Device synchronization failed: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Free allocated memory
    cudaFree(input.row_indices);
    cudaFree(input.col_indices);
    cudaFree(input.values);
    cudaFree(filter);
    cudaFree(output);

    return 0;
}
	.file	"tmpxft_000bfe5c_00000000-6_cuda_code_060060.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4001:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4001:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4658:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4658:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z61__device_stub__Z23sparseConvolutionKernel12SparseMatrixPKfPfiRK12SparseMatrixPKfPfi
	.type	_Z61__device_stub__Z23sparseConvolutionKernel12SparseMatrixPKfPfiRK12SparseMatrixPKfPfi, @function
_Z61__device_stub__Z23sparseConvolutionKernel12SparseMatrixPKfPfiRK12SparseMatrixPKfPfi:
.LFB4023:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rsi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rdi, 104(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z23sparseConvolutionKernel12SparseMatrixPKfPfi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L3:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4023:
	.size	_Z61__device_stub__Z23sparseConvolutionKernel12SparseMatrixPKfPfiRK12SparseMatrixPKfPfi, .-_Z61__device_stub__Z23sparseConvolutionKernel12SparseMatrixPKfPfiRK12SparseMatrixPKfPfi
	.globl	_Z23sparseConvolutionKernel12SparseMatrixPKfPfi
	.type	_Z23sparseConvolutionKernel12SparseMatrixPKfPfi, @function
_Z23sparseConvolutionKernel12SparseMatrixPKfPfi:
.LFB4024:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	%edx, %ecx
	movq	%rsi, %rdx
	movq	%rdi, %rsi
	leaq	16(%rsp), %rdi
	call	_Z61__device_stub__Z23sparseConvolutionKernel12SparseMatrixPKfPfiRK12SparseMatrixPKfPfi
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4024:
	.size	_Z23sparseConvolutionKernel12SparseMatrixPKfPfi, .-_Z23sparseConvolutionKernel12SparseMatrixPKfPfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Failed to set CUDA device: "
.LC1:
	.string	"Failed to allocate filter: "
.LC3:
	.string	"Failed to allocate row indices: "
.LC4:
	.string	"Failed to allocate col indices: "
.LC5:
	.string	"Failed to allocate values: "
.LC7:
	.string	"Failed to allocate output: "
.LC8:
	.string	"Kernel launch failed: "
.LC9:
	.string	"Device synchronization failed: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3998:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%edi, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$120, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	cudaSetDevice@PLT
	leaq	.LC0(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L29
	movq	%rsp, %rdi
	movl	$1, %edx
	movl	$4194304, %esi
	call	cudaMallocManaged@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L13
	leaq	.LC1(%rip), %rsi
.L29:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
.L30:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	orl	$-1, %eax
	jmp	.L10
.L13:
	movq	(%rsp), %rdx
	movss	.LC2(%rip), %xmm0
	xorl	%eax, %eax
.L15:
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	cmpq	$1048576, %rax
	jne	.L15
	movl	$40000, %esi
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	movl	$10000, 64(%rsp)
	call	cudaMallocManaged@PLT
	leaq	.LC3(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L29
	movslq	64(%rsp), %rsi
	leaq	48(%rsp), %rdi
	movl	$1, %edx
	salq	$2, %rsi
	call	cudaMallocManaged@PLT
	leaq	.LC4(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L29
	movslq	64(%rsp), %rsi
	leaq	56(%rsp), %rdi
	movl	$1, %edx
	xorl	%ebx, %ebx
	salq	$2, %rsi
	call	cudaMallocManaged@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L18
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	jmp	.L30
.L18:
	cmpl	%ebx, 64(%rsp)
	jle	.L31
	call	rand@PLT
	movl	$1024, %ebp
	cltd
	idivl	%ebp
	movq	40(%rsp), %rax
	movl	%edx, (%rax,%rbx,4)
	call	rand@PLT
	cltd
	idivl	%ebp
	movq	48(%rsp), %rax
	movl	%edx, (%rax,%rbx,4)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC6(%rip), %xmm0
	movq	56(%rsp), %rax
	movss	%xmm0, (%rax,%rbx,4)
	incq	%rbx
	jmp	.L18
.L31:
	movl	$4194304, %esi
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	call	cudaMallocManaged@PLT
	leaq	.LC7(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L29
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4194304, %edx
	call	cudaMemset@PLT
	movl	64(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$256, %ecx
	addl	$255, %eax
	cltd
	idivl	%ecx
	movl	$16777217, %edx
	movl	$1, %ecx
	salq	$8, %rdx
	movl	%eax, 16(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 20(%rsp)
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movups	40(%rsp), %xmm1
	movups	56(%rsp), %xmm2
	leaq	72(%rsp), %rdi
	movl	$1024, %ecx
	movq	8(%rsp), %rdx
	movq	(%rsp), %rsi
	movups	%xmm1, 72(%rsp)
	movups	%xmm2, 88(%rsp)
	call	_Z61__device_stub__Z23sparseConvolutionKernel12SparseMatrixPKfPfiRK12SparseMatrixPKfPfi
.L21:
	call	cudaGetLastError@PLT
	leaq	.LC8(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L29
	call	cudaDeviceSynchronize@PLT
	leaq	.LC9(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L29
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L10:
	movq	104(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$120, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3998:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z23sparseConvolutionKernel12SparseMatrixPKfPfi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4026:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z23sparseConvolutionKernel12SparseMatrixPKfPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4026:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	897581056
	.align 4
.LC6:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <vector>

// Define a simple structure for sparse matrix storage
struct SparseMatrix {
    int* row_indices;
    int* col_indices;
    float* values;
    int num_nonzeros;
};

// Kernel for sparse convolution
__global__ void sparseConvolutionKernel(const SparseMatrix input, const float* filter, float* output, int filter_size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    int stride = blockDim.x * gridDim.x;

    for (int i = idx; i < input.num_nonzeros; i += stride) {
        int row = input.row_indices[i];
        int col = input.col_indices[i];
        float value = input.values[i];

        // Perform convolution for each non-zero element
        for (int j = 0; j < filter_size; ++j) {
            for (int k = 0; k < filter_size; ++k) {
                int out_row = row + j - filter_size / 2;
                int out_col = col + k - filter_size / 2;

                if (out_row >= 0 && out_row < 1024 && out_col >= 0 && out_col < 1024) {
                    atomicAdd(&output[out_row * 1024 + out_col], value * filter[j * filter_size + k]);
                }
            }
        }
    }
}

int main() {
    // Initialize CUDA
    hipError_t err = hipSetDevice(0);
    if (err != hipSuccess) {
        std::cerr << "Failed to set CUDA device: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Define filter size
    const int filter_size = 1024;

    // Allocate and initialize filter
    float* filter;
    err = hipMallocManaged(&filter, filter_size * filter_size * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate filter: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    for (int i = 0; i < filter_size * filter_size; ++i) {
        filter[i] = 1.0f / (filter_size * filter_size); // Simple averaging filter
    }

    // Create a simple sparse input matrix (for demonstration)
    SparseMatrix input;
    input.num_nonzeros = 10000; // Example number of non-zero elements
    err = hipMallocManaged(&input.row_indices, input.num_nonzeros * sizeof(int));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate row indices: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMallocManaged(&input.col_indices, input.num_nonzeros * sizeof(int));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate col indices: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMallocManaged(&input.values, input.num_nonzeros * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate values: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Initialize sparse input matrix (random non-zero positions and values)
    for (int i = 0; i < input.num_nonzeros; ++i) {
        input.row_indices[i] = rand() % 1024;
        input.col_indices[i] = rand() % 1024;
        input.values[i] = static_cast<float>(rand()) / RAND_MAX;
    }

    // Allocate output matrix
    float* output;
    err = hipMallocManaged(&output, 1024 * 1024 * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate output: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    hipMemset(output, 0, 1024 * 1024 * sizeof(float));

    // Launch kernel
    int threadsPerBlock = 256;
    int blocksPerGrid = (input.num_nonzeros + threadsPerBlock - 1) / threadsPerBlock;
    sparseConvolutionKernel<<<blocksPerGrid, threadsPerBlock>>>(input, filter, output, filter_size);

    // Check for errors in kernel launch
    err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Kernel launch failed: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Synchronize and check for errors during execution
    err = hipDeviceSynchronize();
    if (err != hipSuccess) {
        std::cerr << "Device synchronization failed: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Free allocated memory
    hipFree(input.row_indices);
    hipFree(input.col_indices);
    hipFree(input.values);
    hipFree(filter);
    hipFree(output);

    return 0;
}
	.text
	.file	"cuda_code_060060.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z38__device_stub__sparseConvolutionKernel12SparseMatrixPKfPfi # -- Begin function _Z38__device_stub__sparseConvolutionKernel12SparseMatrixPKfPfi
	.type	_Z38__device_stub__sparseConvolutionKernel12SparseMatrixPKfPfi,@function
_Z38__device_stub__sparseConvolutionKernel12SparseMatrixPKfPfi: # @_Z38__device_stub__sparseConvolutionKernel12SparseMatrixPKfPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	160(%rsp), %rdx
	leaq	80(%rsp), %rbx
	movq	%rdx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rcx, 16(%rbx)
	movq	%rsi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23sparseConvolutionKernel12SparseMatrixPKfPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z38__device_stub__sparseConvolutionKernel12SparseMatrixPKfPfi, .Lfunc_end0-_Z38__device_stub__sparseConvolutionKernel12SparseMatrixPKfPfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	je	.LBB1_2
# %bb.1:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	jmp	.LBB1_4
.LBB1_2:
	leaq	40(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	je	.LBB1_11
# %bb.3:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
.LBB1_4:
	movl	$27, %edx
.LBB1_5:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_7
# %bb.6:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_8
.LBB1_7:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_8:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_9:
	movl	$-1, %eax
.LBB1_10:
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_11:                               # %.preheader58
	.cfi_def_cfa_offset 112
	movq	40(%rsp), %rax
	xorl	%ecx, %ecx
.LBB1_12:                               # =>This Inner Loop Header: Depth=1
	movl	$897581056, (%rax,%rcx,4)       # imm = 0x35800000
	incq	%rcx
	cmpq	$1048576, %rcx                  # imm = 0x100000
	jne	.LBB1_12
# %bb.13:
	leaq	48(%rsp), %rdi
	movl	$10000, 24(%rdi)                # imm = 0x2710
	movl	$40000, %esi                    # imm = 0x9C40
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	je	.LBB1_15
# %bb.14:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	jmp	.LBB1_17
.LBB1_15:
	leaq	56(%rsp), %rdi
	movslq	16(%rdi), %rsi
	shlq	$2, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	je	.LBB1_18
# %bb.16:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
.LBB1_17:
	movl	$32, %edx
	jmp	.LBB1_5
.LBB1_18:
	leaq	64(%rsp), %rdi
	movslq	8(%rdi), %rsi
	shlq	$2, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	je	.LBB1_20
# %bb.19:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.4, %esi
	jmp	.LBB1_25
.LBB1_20:                               # %.preheader
	cmpl	$0, 72(%rsp)
	jle	.LBB1_23
# %bb.21:                               # %.lr.ph.preheader
	xorl	%ebx, %ebx
	movl	$1023, %r14d                    # imm = 0x3FF
	movl	$-1024, %ebp                    # imm = 0xFC00
.LBB1_22:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	(%rax,%r14), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	%ebp, %ecx
	subl	%ecx, %eax
	movq	48(%rsp), %rcx
	movl	%eax, (%rcx,%rbx,4)
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	(%rax,%r14), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	%ebp, %ecx
	subl	%ecx, %eax
	movq	56(%rsp), %rcx
	movl	%eax, (%rcx,%rbx,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movq	64(%rsp), %rax
	movss	%xmm0, (%rax,%rbx,4)
	incq	%rbx
	movslq	72(%rsp), %rax
	cmpq	%rax, %rbx
	jl	.LBB1_22
.LBB1_23:                               # %._crit_edge
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	je	.LBB1_27
# %bb.24:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
.LBB1_25:
	movl	$27, %edx
.LBB1_26:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$_ZSt4cerr, %edi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	jmp	.LBB1_9
.LBB1_27:
	movq	32(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	xorl	%esi, %esi
	callq	hipMemset
	movl	72(%rsp), %edi
	leal	255(%rdi), %eax
	addl	$510, %edi                      # imm = 0x1FE
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$8, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_29
# %bb.28:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movups	48(%rsp), %xmm0
	movups	64(%rsp), %xmm1
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$1024, %edx                     # imm = 0x400
	callq	_Z38__device_stub__sparseConvolutionKernel12SparseMatrixPKfPfi
.LBB1_29:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_31
# %bb.30:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.6, %esi
	movl	$22, %edx
	jmp	.LBB1_26
.LBB1_31:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	je	.LBB1_33
# %bb.32:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.7, %esi
	movl	$31, %edx
	jmp	.LBB1_26
.LBB1_33:
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	jmp	.LBB1_10
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23sparseConvolutionKernel12SparseMatrixPKfPfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z23sparseConvolutionKernel12SparseMatrixPKfPfi,@object # @_Z23sparseConvolutionKernel12SparseMatrixPKfPfi
	.section	.rodata,"a",@progbits
	.globl	_Z23sparseConvolutionKernel12SparseMatrixPKfPfi
	.p2align	3, 0x0
_Z23sparseConvolutionKernel12SparseMatrixPKfPfi:
	.quad	_Z38__device_stub__sparseConvolutionKernel12SparseMatrixPKfPfi
	.size	_Z23sparseConvolutionKernel12SparseMatrixPKfPfi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to set CUDA device: "
	.size	.L.str, 28

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Failed to allocate filter: "
	.size	.L.str.1, 28

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate row indices: "
	.size	.L.str.2, 33

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate col indices: "
	.size	.L.str.3, 33

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to allocate values: "
	.size	.L.str.4, 28

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to allocate output: "
	.size	.L.str.5, 28

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Kernel launch failed: "
	.size	.L.str.6, 23

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Device synchronization failed: "
	.size	.L.str.7, 32

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z23sparseConvolutionKernel12SparseMatrixPKfPfi"
	.size	.L__unnamed_1, 48

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z38__device_stub__sparseConvolutionKernel12SparseMatrixPKfPfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z23sparseConvolutionKernel12SparseMatrixPKfPfi
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z23sparseConvolutionKernel12SparseMatrixPKfPfi ; -- Begin function _Z23sparseConvolutionKernel12SparseMatrixPKfPfi
	.globl	_Z23sparseConvolutionKernel12SparseMatrixPKfPfi
	.p2align	8
	.type	_Z23sparseConvolutionKernel12SparseMatrixPKfPfi,@function
_Z23sparseConvolutionKernel12SparseMatrixPKfPfi: ; @_Z23sparseConvolutionKernel12SparseMatrixPKfPfi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x44
	s_load_b32 s14, s[0:1], 0x18
	s_add_u32 s2, s0, 56
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s14, v1
	s_cbranch_execz .LBB0_11
; %bb.1:                                ; %.lr.ph47
	s_load_b32 s15, s[0:1], 0x30
	s_load_b32 s17, s[2:3], 0x0
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x20
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mov_b32_e32 v3, 0
	s_mov_b32 s13, 0
	s_mov_b32 s19, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s15, 0
	s_mul_i32 s17, s17, s12
	s_cselect_b32 s16, -1, 0
	s_lshr_b32 s0, s15, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s15, s0
	s_ashr_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s18, 0, s0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
                                        ;         Child Loop BB0_7 Depth 4
	v_ashrrev_i32_e32 v2, 31, v1
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_10
; %bb.3:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_mov_b32 s20, 0
	v_add_co_u32 v6, vcc_lo, s10, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v2, v[8:9], off
	global_load_b32 v6, v[6:7], off
	global_load_b32 v0, v[4:5], off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v8, s18, v2
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v9, s18, v6
.LBB0_4:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
                                        ;         Child Loop BB0_7 Depth 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, s20, v8
	s_mul_i32 s21, s20, s15
	s_mov_b32 s22, 0
	v_cmp_gt_u32_e32 vcc_lo, 0x400, v2
	v_lshlrev_b32_e32 v10, 10, v2
.LBB0_5:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_7 Depth 4
	v_add_nc_u32_e32 v2, s22, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e64 s0, -1, v2
	v_cmp_gt_i32_e64 s1, 0x400, v2
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_8
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=3
	v_add_nc_u32_e32 v2, v2, v10
	s_add_i32 s12, s22, s21
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_lshl_b64 s[24:25], s[12:13], 2
	s_mov_b32 s12, 0
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_add_u32 s24, s4, s24
	s_addc_u32 s25, s5, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, s0, s6, v4
	v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
	global_load_b32 v2, v3, s[24:25]
	global_load_b32 v7, v[4:5], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v2, v0, v2
.LBB0_7:                                ; %atomicrmw.start
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_f32_e32 v6, v7, v2
	global_atomic_cmpswap_b32 v6, v[4:5], v[6:7], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, v6, v7
	v_mov_b32_e32 v7, v6
	s_or_b32 s12, s0, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB0_7
.LBB0_8:                                ; %Flow61
                                        ;   in Loop: Header=BB0_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s22, s22, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s22, s15
	s_cbranch_scc0 .LBB0_5
; %bb.9:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_add_i32 s20, s20, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s20, s15
	s_cbranch_scc0 .LBB0_4
.LBB0_10:                               ; %._crit_edge44
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v1, s17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s14, v1
	s_or_b32 s19, vcc_lo, s19
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB0_2
.LBB0_11:                               ; %Flow65
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23sparseConvolutionKernel12SparseMatrixPKfPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 26
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z23sparseConvolutionKernel12SparseMatrixPKfPfi, .Lfunc_end0-_Z23sparseConvolutionKernel12SparseMatrixPKfPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 548
; NumSgprs: 28
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 28
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           32
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23sparseConvolutionKernel12SparseMatrixPKfPfi
    .private_segment_fixed_size: 0
    .sgpr_count:     28
    .sgpr_spill_count: 0
    .symbol:         _Z23sparseConvolutionKernel12SparseMatrixPKfPfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
