#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>

// Kernel parameters
#define FILTER_WIDTH 3
#define FILTER_HEIGHT 3
#define INPUT_CHANNELS 3
#define OUTPUT_CHANNELS 16
#define BATCH_SIZE 64
#define IMAGE_WIDTH 32
#define IMAGE_HEIGHT 32

// Shared memory size per block
#define SHARED_MEM_SIZE (FILTER_WIDTH * FILTER_HEIGHT * INPUT_CHANNELS * sizeof(float))

// Persistent threads design pattern
__global__ void backpropConvolutionKernel(
    const float* input, const float* filter, const float* output_grad, float* input_grad, float* filter_grad,
    int batch_size, int input_channels, int output_channels, int image_width, int image_height, int filter_width, int filter_height) {

    extern __shared__ float shared_memory[];

    int bx = blockIdx.x;
    int by = blockIdx.y;
    int bz = blockIdx.z;

    int tx = threadIdx.x;
    int ty = threadIdx.y;

    int output_x = bx * blockDim.x + tx;
    int output_y = by * blockDim.y + ty;
    int output_channel = bz;

    if (output_x >= image_width || output_y >= image_height) return;

    // Load filter into shared memory
    int filter_idx = output_channel * filter_height * filter_width * input_channels + 
                     (ty * filter_width + tx) * input_channels;
    for (int c = 0; c < input_channels; ++c) {
        shared_memory[(ty * filter_width + tx) * input_channels + c] = filter[filter_idx + c];
    }
    __syncthreads();

    // Initialize gradients
    float input_grad_shared = 0.0f;
    float filter_grad_shared[FILTER_HEIGHT * FILTER_WIDTH * INPUT_CHANNELS] = {0.0f};

    // Compute gradients for each input channel
    for (int c = 0; c < input_channels; ++c) {
        int input_idx = (bz * input_channels + c) * image_height * image_width + 
                        (output_y * image_width + output_x);
        float input_value = input[input_idx];

        for (int fy = 0; fy < filter_height; ++fy) {
            for (int fx = 0; fx < filter_width; ++fx) {
                int filter_shared_idx = (fy * filter_width + fx) * input_channels + c;
                int output_idx = (output_channel * image_height * image_width + 
                                  (output_y * image_width + output_x));
                float output_grad_value = output_grad[output_idx];

                // Compute input gradient
                input_grad_shared += output_grad_value * shared_memory[filter_shared_idx];

                // Compute filter gradient
                int input_x = output_x - fx;
                int input_y = output_y - fy;
                if (input_x >= 0 && input_x < image_width && input_y >= 0 && input_y < image_height) {
                    int input_idx = (bz * input_channels + c) * image_height * image_width + 
                                    (input_y * image_width + input_x);
                    float input_value = input[input_idx];
                    filter_grad_shared[filter_shared_idx] += output_grad_value * input_value;
                }
            }
        }
    }

    // Write input gradient to global memory
    int input_grad_idx = (bz * input_channels) * image_height * image_width + 
                         (output_y * image_width + output_x);
    atomicAdd(&input_grad[input_grad_idx], input_grad_shared);

    // Write filter gradient to global memory
    for (int c = 0; c < input_channels; ++c) {
        for (int fy = 0; fy < filter_height; ++fy) {
            for (int fx = 0; fx < filter_width; ++fx) {
                int filter_shared_idx = (fy * filter_width + fx) * input_channels + c;
                int filter_grad_idx = (output_channel * filter_height * filter_width * input_channels + 
                                       (fy * filter_width + fx) * input_channels + c);
                atomicAdd(&filter_grad[filter_grad_idx], filter_grad_shared[filter_shared_idx]);
            }
        }
    }
}

void checkCudaError(cudaError_t err, const char* msg) {
    if (err != cudaSuccess) {
        std::cerr << msg << ": " << cudaGetErrorString(err) << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    // Allocate memory for input, filter, output_grad, input_grad, filter_grad
    float* d_input;
    float* d_filter;
    float* d_output_grad;
    float* d_input_grad;
    float* d_filter_grad;

    size_t input_size = BATCH_SIZE * INPUT_CHANNELS * IMAGE_HEIGHT * IMAGE_WIDTH * sizeof(float);
    size_t filter_size = OUTPUT_CHANNELS * FILTER_HEIGHT * FILTER_WIDTH * INPUT_CHANNELS * sizeof(float);
    size_t output_grad_size = BATCH_SIZE * OUTPUT_CHANNELS * IMAGE_HEIGHT * IMAGE_WIDTH * sizeof(float);
    size_t input_grad_size = input_size;
    size_t filter_grad_size = filter_size;

    checkCudaError(cudaMalloc(&d_input, input_size), "Failed to allocate d_input");
    checkCudaError(cudaMalloc(&d_filter, filter_size), "Failed to allocate d_filter");
    checkCudaError(cudaMalloc(&d_output_grad, output_grad_size), "Failed to allocate d_output_grad");
    checkCudaError(cudaMalloc(&d_input_grad, input_grad_size), "Failed to allocate d_input_grad");
    checkCudaError(cudaMalloc(&d_filter_grad, filter_grad_size), "Failed to allocate d_filter_grad");

    // Initialize input, filter, output_grad with random values
    curandGenerator_t gen;
    curandCreateGenerator(&gen, CURAND_RNG_PSEUDO_DEFAULT);
    curandSetPseudoRandomGeneratorSeed(gen, 1234ULL);
    curandGenerateUniform(gen, d_input, input_size / sizeof(float));
    curandGenerateUniform(gen, d_filter, filter_size / sizeof(float));
    curandGenerateUniform(gen, d_output_grad, output_grad_size / sizeof(float));
    curandDestroyGenerator(gen);

    // Initialize input_grad and filter_grad to zero
    checkCudaError(cudaMemset(d_input_grad, 0, input_grad_size), "Failed to initialize d_input_grad");
    checkCudaError(cudaMemset(d_filter_grad, 0, filter_grad_size), "Failed to initialize d_filter_grad");

    // Define grid and block dimensions
    dim3 blockDim(16, 16, 1);
    dim3 gridDim((IMAGE_WIDTH + blockDim.x - 1) / blockDim.x, (IMAGE_HEIGHT + blockDim.y - 1) / blockDim.y, OUTPUT_CHANNELS);

    // Launch kernel
    backpropConvolutionKernel<<<gridDim, blockDim, SHARED_MEM_SIZE>>>(
        d_input, d_filter, d_output_grad, d_input_grad, d_filter_grad,
        BATCH_SIZE, INPUT_CHANNELS, OUTPUT_CHANNELS, IMAGE_WIDTH, IMAGE_HEIGHT, FILTER_WIDTH, FILTER_HEIGHT);

    // Check for kernel launch errors
    checkCudaError(cudaGetLastError(), "Kernel launch failed");

    // Copy results back to host
    float* h_input_grad = new float[input_grad_size / sizeof(float)];
    float* h_filter_grad = new float[filter_grad_size / sizeof(float)];
    checkCudaError(cudaMemcpy(h_input_grad, d_input_grad, input_grad_size, cudaMemcpyDeviceToHost), "Failed to copy d_input_grad to host");
    checkCudaError(cudaMemcpy(h_filter_grad, d_filter_grad, filter_grad_size, cudaMemcpyDeviceToHost), "Failed to copy d_filter_grad to host");

    // Free device memory
    cudaFree(d_input);
    cudaFree(d_filter);
    cudaFree(d_output_grad);
    cudaFree(d_input_grad);
    cudaFree(d_filter_grad);

    // Free host memory
    delete[] h_input_grad;
    delete[] h_filter_grad;

    std::cout << "Backpropagation completed successfully." << std::endl;

    return 0;
}
	.file	"tmpxft_0007df18_00000000-6_cuda_code_048113.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3853:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3853:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	": "
	.text
	.globl	_Z14checkCudaError9cudaErrorPKc
	.type	_Z14checkCudaError9cudaErrorPKc, @function
_Z14checkCudaError9cudaErrorPKc:
.LFB3849:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	leaq	_ZSt4cerr(%rip), %rdi
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE3849:
	.size	_Z14checkCudaError9cudaErrorPKc, .-_Z14checkCudaError9cudaErrorPKc
	.globl	_Z64__device_stub__Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiiiPKfS0_S0_PfS1_iiiiiii
	.type	_Z64__device_stub__Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiiiPKfS0_S0_PfS1_iiiiiii, @function
_Z64__device_stub__Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiiiPKfS0_S0_PfS1_iiiiiii:
.LFB3875:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	264(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	280(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	64(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 256
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L8:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3875:
	.size	_Z64__device_stub__Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiiiPKfS0_S0_PfS1_iiiiiii, .-_Z64__device_stub__Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiiiPKfS0_S0_PfS1_iiiiiii
	.globl	_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
	.type	_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii, @function
_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii:
.LFB3876:
	.cfi_startproc
	endbr64
	jmp	_Z64__device_stub__Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiiiPKfS0_S0_PfS1_iiiiiii
	.cfi_endproc
.LFE3876:
	.size	_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii, .-_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
	.section	.rodata.str1.1
.LC1:
	.string	"Failed to allocate d_input"
.LC2:
	.string	"Failed to allocate d_filter"
.LC3:
	.string	"Failed to allocate d_output_grad"
.LC4:
	.string	"Failed to allocate d_input_grad"
.LC5:
	.string	"Failed to allocate d_filter_grad"
.LC6:
	.string	"Failed to initialize d_input_grad"
.LC7:
	.string	"Failed to initialize d_filter_grad"
.LC8:
	.string	"Kernel launch failed"
.LC9:
	.string	"Failed to copy d_input_grad to host"
.LC10:
	.string	"Failed to copy d_filter_grad to host"
.LC11:
	.string	"Backpropagation completed successfully."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3850:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$786432, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$88, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	8(%rsp), %rdi
	movl	$1728, %esi
	call	cudaMalloc@PLT
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	24(%rsp), %rdi
	movl	$786432, %esi
	call	cudaMalloc@PLT
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	32(%rsp), %rdi
	movl	$1728, %esi
	call	cudaMalloc@PLT
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	40(%rsp), %rdi
	movl	$100, %esi
	call	curandCreateGenerator@PLT
	movq	40(%rsp), %rdi
	movl	$1234, %esi
	call	curandSetPseudoRandomGeneratorSeed@PLT
	movq	(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$196608, %edx
	call	curandGenerateUniform@PLT
	movq	8(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$432, %edx
	call	curandGenerateUniform@PLT
	movq	16(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$1048576, %edx
	call	curandGenerateUniform@PLT
	movq	40(%rsp), %rdi
	call	curandDestroyGenerator@PLT
	movq	24(%rsp), %rdi
	movl	$786432, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	32(%rsp), %rdi
	movl	$1728, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	leaq	.LC7(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	xorl	%r9d, %r9d
	movl	$108, %r8d
	movabsq	$68719476752, %rdx
	movl	$1, %ecx
	movl	$16, %esi
	movabsq	$8589934594, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	$3
	.cfi_def_cfa_offset 120
	movl	$64, %r9d
	pushq	$3
	.cfi_def_cfa_offset 128
	pushq	$32
	.cfi_def_cfa_offset 136
	pushq	$32
	.cfi_def_cfa_offset 144
	pushq	$16
	.cfi_def_cfa_offset 152
	pushq	$3
	.cfi_def_cfa_offset 160
	movq	80(%rsp), %r8
	movq	72(%rsp), %rcx
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z64__device_stub__Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiiiPKfS0_S0_PfS1_iiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 112
.L14:
	call	cudaGetLastError@PLT
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movl	$786432, %edi
	call	_Znam@PLT
	movl	$1728, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$786432, %edx
	movq	%rax, %rbx
	call	cudaMemcpy@PLT
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$1728, %edx
	call	cudaMemcpy@PLT
	leaq	.LC10(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	leaq	_ZSt4cout(%rip), %rdi
	leaq	.LC11(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$88, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3850:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii"
.LC13:
	.string	"precalc_xorwow_matrix"
.LC14:
	.string	"precalc_xorwow_offset_matrix"
.LC15:
	.string	"mrg32k3aM1"
.LC16:
	.string	"mrg32k3aM2"
.LC17:
	.string	"mrg32k3aM1SubSeq"
.LC18:
	.string	"mrg32k3aM2SubSeq"
.LC19:
	.string	"mrg32k3aM1Seq"
.LC20:
	.string	"mrg32k3aM2Seq"
.LC21:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3878:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3878:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>

// Kernel parameters
#define FILTER_WIDTH 3
#define FILTER_HEIGHT 3
#define INPUT_CHANNELS 3
#define OUTPUT_CHANNELS 16
#define BATCH_SIZE 64
#define IMAGE_WIDTH 32
#define IMAGE_HEIGHT 32

// Shared memory size per block
#define SHARED_MEM_SIZE (FILTER_WIDTH * FILTER_HEIGHT * INPUT_CHANNELS * sizeof(float))

// Persistent threads design pattern
__global__ void backpropConvolutionKernel(
    const float* input, const float* filter, const float* output_grad, float* input_grad, float* filter_grad,
    int batch_size, int input_channels, int output_channels, int image_width, int image_height, int filter_width, int filter_height) {

    extern __shared__ float shared_memory[];

    int bx = blockIdx.x;
    int by = blockIdx.y;
    int bz = blockIdx.z;

    int tx = threadIdx.x;
    int ty = threadIdx.y;

    int output_x = bx * blockDim.x + tx;
    int output_y = by * blockDim.y + ty;
    int output_channel = bz;

    if (output_x >= image_width || output_y >= image_height) return;

    // Load filter into shared memory
    int filter_idx = output_channel * filter_height * filter_width * input_channels + 
                     (ty * filter_width + tx) * input_channels;
    for (int c = 0; c < input_channels; ++c) {
        shared_memory[(ty * filter_width + tx) * input_channels + c] = filter[filter_idx + c];
    }
    __syncthreads();

    // Initialize gradients
    float input_grad_shared = 0.0f;
    float filter_grad_shared[FILTER_HEIGHT * FILTER_WIDTH * INPUT_CHANNELS] = {0.0f};

    // Compute gradients for each input channel
    for (int c = 0; c < input_channels; ++c) {
        int input_idx = (bz * input_channels + c) * image_height * image_width + 
                        (output_y * image_width + output_x);
        float input_value = input[input_idx];

        for (int fy = 0; fy < filter_height; ++fy) {
            for (int fx = 0; fx < filter_width; ++fx) {
                int filter_shared_idx = (fy * filter_width + fx) * input_channels + c;
                int output_idx = (output_channel * image_height * image_width + 
                                  (output_y * image_width + output_x));
                float output_grad_value = output_grad[output_idx];

                // Compute input gradient
                input_grad_shared += output_grad_value * shared_memory[filter_shared_idx];

                // Compute filter gradient
                int input_x = output_x - fx;
                int input_y = output_y - fy;
                if (input_x >= 0 && input_x < image_width && input_y >= 0 && input_y < image_height) {
                    int input_idx = (bz * input_channels + c) * image_height * image_width + 
                                    (input_y * image_width + input_x);
                    float input_value = input[input_idx];
                    filter_grad_shared[filter_shared_idx] += output_grad_value * input_value;
                }
            }
        }
    }

    // Write input gradient to global memory
    int input_grad_idx = (bz * input_channels) * image_height * image_width + 
                         (output_y * image_width + output_x);
    atomicAdd(&input_grad[input_grad_idx], input_grad_shared);

    // Write filter gradient to global memory
    for (int c = 0; c < input_channels; ++c) {
        for (int fy = 0; fy < filter_height; ++fy) {
            for (int fx = 0; fx < filter_width; ++fx) {
                int filter_shared_idx = (fy * filter_width + fx) * input_channels + c;
                int filter_grad_idx = (output_channel * filter_height * filter_width * input_channels + 
                                       (fy * filter_width + fx) * input_channels + c);
                atomicAdd(&filter_grad[filter_grad_idx], filter_grad_shared[filter_shared_idx]);
            }
        }
    }
}

void checkCudaError(hipError_t err, const char* msg) {
    if (err != hipSuccess) {
        std::cerr << msg << ": " << hipGetErrorString(err) << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    // Allocate memory for input, filter, output_grad, input_grad, filter_grad
    float* d_input;
    float* d_filter;
    float* d_output_grad;
    float* d_input_grad;
    float* d_filter_grad;

    size_t input_size = BATCH_SIZE * INPUT_CHANNELS * IMAGE_HEIGHT * IMAGE_WIDTH * sizeof(float);
    size_t filter_size = OUTPUT_CHANNELS * FILTER_HEIGHT * FILTER_WIDTH * INPUT_CHANNELS * sizeof(float);
    size_t output_grad_size = BATCH_SIZE * OUTPUT_CHANNELS * IMAGE_HEIGHT * IMAGE_WIDTH * sizeof(float);
    size_t input_grad_size = input_size;
    size_t filter_grad_size = filter_size;

    checkCudaError(hipMalloc(&d_input, input_size), "Failed to allocate d_input");
    checkCudaError(hipMalloc(&d_filter, filter_size), "Failed to allocate d_filter");
    checkCudaError(hipMalloc(&d_output_grad, output_grad_size), "Failed to allocate d_output_grad");
    checkCudaError(hipMalloc(&d_input_grad, input_grad_size), "Failed to allocate d_input_grad");
    checkCudaError(hipMalloc(&d_filter_grad, filter_grad_size), "Failed to allocate d_filter_grad");

    // Initialize input, filter, output_grad with random values
    hiprandGenerator_t gen;
    hiprandCreateGenerator(&gen, HIPRAND_RNG_PSEUDO_DEFAULT);
    hiprandSetPseudoRandomGeneratorSeed(gen, 1234ULL);
    hiprandGenerateUniform(gen, d_input, input_size / sizeof(float));
    hiprandGenerateUniform(gen, d_filter, filter_size / sizeof(float));
    hiprandGenerateUniform(gen, d_output_grad, output_grad_size / sizeof(float));
    hiprandDestroyGenerator(gen);

    // Initialize input_grad and filter_grad to zero
    checkCudaError(hipMemset(d_input_grad, 0, input_grad_size), "Failed to initialize d_input_grad");
    checkCudaError(hipMemset(d_filter_grad, 0, filter_grad_size), "Failed to initialize d_filter_grad");

    // Define grid and block dimensions
    dim3 blockDim(16, 16, 1);
    dim3 gridDim((IMAGE_WIDTH + blockDim.x - 1) / blockDim.x, (IMAGE_HEIGHT + blockDim.y - 1) / blockDim.y, OUTPUT_CHANNELS);

    // Launch kernel
    backpropConvolutionKernel<<<gridDim, blockDim, SHARED_MEM_SIZE>>>(
        d_input, d_filter, d_output_grad, d_input_grad, d_filter_grad,
        BATCH_SIZE, INPUT_CHANNELS, OUTPUT_CHANNELS, IMAGE_WIDTH, IMAGE_HEIGHT, FILTER_WIDTH, FILTER_HEIGHT);

    // Check for kernel launch errors
    checkCudaError(hipGetLastError(), "Kernel launch failed");

    // Copy results back to host
    float* h_input_grad = new float[input_grad_size / sizeof(float)];
    float* h_filter_grad = new float[filter_grad_size / sizeof(float)];
    checkCudaError(hipMemcpy(h_input_grad, d_input_grad, input_grad_size, hipMemcpyDeviceToHost), "Failed to copy d_input_grad to host");
    checkCudaError(hipMemcpy(h_filter_grad, d_filter_grad, filter_grad_size, hipMemcpyDeviceToHost), "Failed to copy d_filter_grad to host");

    // Free device memory
    hipFree(d_input);
    hipFree(d_filter);
    hipFree(d_output_grad);
    hipFree(d_input_grad);
    hipFree(d_filter_grad);

    // Free host memory
    delete[] h_input_grad;
    delete[] h_filter_grad;

    std::cout << "Backpropagation completed successfully." << std::endl;

    return 0;
}
	.text
	.file	"cuda_code_048113.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z40__device_stub__backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii # -- Begin function _Z40__device_stub__backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
	.type	_Z40__device_stub__backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii,@function
_Z40__device_stub__backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii: # @_Z40__device_stub__backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z40__device_stub__backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii, .Lfunc_end0-_Z40__device_stub__backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCudaError10hipError_tPKc # -- Begin function _Z14checkCudaError10hipError_tPKc
	.type	_Z14checkCudaError10hipError_tPKc,@function
_Z14checkCudaError10hipError_tPKc:      # @_Z14checkCudaError10hipError_tPKc
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB1_2
# %bb.1:
	retq
.LBB1_2:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%edi, %ebx
	movl	$_ZSt4cerr, %edi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z14checkCudaError10hipError_tPKc, .Lfunc_end1-_Z14checkCudaError10hipError_tPKc
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	40(%rsp), %rbx
	movl	$786432, %esi                   # imm = 0xC0000
	movq	%rbx, %rdi
	callq	hipMalloc
	movl	$.L.str.1, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	leaq	32(%rsp), %r14
	movl	$1728, %esi                     # imm = 0x6C0
	movq	%r14, %rdi
	callq	hipMalloc
	movl	$.L.str.2, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	leaq	24(%rsp), %r12
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%r12, %rdi
	callq	hipMalloc
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	leaq	16(%rsp), %r13
	movl	$786432, %esi                   # imm = 0xC0000
	movq	%r13, %rdi
	callq	hipMalloc
	movl	$.L.str.4, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	leaq	8(%rsp), %r15
	movl	$1728, %esi                     # imm = 0x6C0
	movq	%r15, %rdi
	callq	hipMalloc
	movl	$.L.str.5, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	leaq	48(%rsp), %rbp
	movq	%rbp, %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hiprandCreateGenerator
	movq	(%rbp), %rdi
	movl	$1234, %esi                     # imm = 0x4D2
	callq	hiprandSetPseudoRandomGeneratorSeed
	movq	(%rbp), %rdi
	movq	(%rbx), %rsi
	movl	$196608, %edx                   # imm = 0x30000
	callq	hiprandGenerateUniform
	movq	(%rbp), %rdi
	movq	(%r14), %rsi
	movl	$432, %edx                      # imm = 0x1B0
	callq	hiprandGenerateUniform
	movq	(%rbp), %rdi
	movq	(%r12), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	hiprandGenerateUniform
	movq	(%rbp), %rdi
	callq	hiprandDestroyGenerator
	movq	(%r13), %rdi
	movl	$786432, %edx                   # imm = 0xC0000
	xorl	%esi, %esi
	callq	hipMemset
	movl	$.L.str.6, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	(%r15), %rdi
	movl	$1728, %edx                     # imm = 0x6C0
	xorl	%esi, %esi
	callq	hipMemset
	movl	$.L.str.7, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movabsq	$8589934594, %rdi               # imm = 0x200000002
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$108, %r8d
	movl	$16, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	movq	8(%rsp), %r8
	movl	$3, %eax
	movl	$32, %r10d
	movl	$64, %r9d
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	$16
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z40__device_stub__backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB2_2:
	callq	hipGetLastError
	movl	$.L.str.8, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movl	$786432, %edi                   # imm = 0xC0000
	callq	_Znam
	movq	%rax, %rbx
	movl	$1728, %edi                     # imm = 0x6C0
	callq	_Znam
	movq	%rax, %r14
	movq	16(%rsp), %rsi
	movl	$786432, %edx                   # imm = 0xC0000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.9, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	8(%rsp), %rsi
	movl	$1728, %edx                     # imm = 0x6C0
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.10, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$39, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii,@object # @_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
	.p2align	3, 0x0
_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii:
	.quad	_Z40__device_stub__backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
	.size	_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	": "
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Failed to allocate d_input"
	.size	.L.str.1, 27

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate d_filter"
	.size	.L.str.2, 28

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate d_output_grad"
	.size	.L.str.3, 33

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to allocate d_input_grad"
	.size	.L.str.4, 32

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to allocate d_filter_grad"
	.size	.L.str.5, 33

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to initialize d_input_grad"
	.size	.L.str.6, 34

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to initialize d_filter_grad"
	.size	.L.str.7, 35

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Kernel launch failed"
	.size	.L.str.8, 21

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to copy d_input_grad to host"
	.size	.L.str.9, 36

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Failed to copy d_filter_grad to host"
	.size	.L.str.10, 37

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Backpropagation completed successfully."
	.size	.L.str.11, 40

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii"
	.size	.L__unnamed_1, 51

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z40__device_stub__backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii ; -- Begin function _Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
	.globl	_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
	.p2align	8
	.type	_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii,@function
_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii: ; @_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x54
	s_load_b128 s[16:19], s[0:1], 0x34
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v7, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s22, s14, s3
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_add_nc_u32_e32 v1, s22, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e64 s2, s17, v1
	v_cmp_gt_i32_e32 vcc_lo, s16, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_35
; %bb.1:
	s_clause 0x2
	s_load_b32 s14, s[0:1], 0x2c
	s_load_b64 s[12:13], s[0:1], 0x20
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s14, 1
	s_mul_i32 s21, s15, s14
	s_cselect_b32 s23, -1, 0
	s_mul_i32 s20, s21, s18
	s_and_b32 vcc_lo, exec_lo, s23
	s_mul_i32 s20, s20, s19
	s_cbranch_vccnz .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	v_mad_u64_u32 v[3:4], null, v7, s18, v[2:3]
	s_mov_b32 s0, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v3, s14
	v_add_nc_u32_e32 v2, s20, v4
	v_lshl_add_u32 v4, v4, 2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[2:3], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v5
	v_add_nc_u32_e32 v4, 4, v4
	s_cbranch_scc0 .LBB0_3
.LBB0_4:                                ; %._crit_edge
	s_mov_b32 s0, 0
	s_and_b32 vcc_lo, exec_lo, s23
	s_mov_b32 s1, s0
	s_mov_b32 s2, s0
	s_mov_b32 s3, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v5, s3
	v_dual_mov_b32 v4, s2 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v9, v8
	v_mov_b32_e32 v10, v8
	s_mov_b32 s1, -1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_clause 0x6
	scratch_store_b96 off, v[8:10], off offset:112
	scratch_store_b128 off, v[2:5], off offset:96
	scratch_store_b128 off, v[2:5], off offset:80
	scratch_store_b128 off, v[2:5], off offset:64
	scratch_store_b128 off, v[2:5], off offset:48
	scratch_store_b128 off, v[2:5], off offset:32
	scratch_store_b128 off, v[2:5], off offset:16
	s_cbranch_vccz .LBB0_8
; %bb.5:                                ; %._crit_edge174.critedge
	v_mad_u64_u32 v[2:3], null, s21, s17, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v2, s16, v[0:1]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	v_add_co_u32 v2, vcc_lo, s10, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	global_load_b32 v5, v[2:3], off
.LBB0_6:                                ; %atomicrmw.start182
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v4, 0, v5
	global_atomic_cmpswap_b32 v4, v[2:3], v[4:5], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v4, v5
	v_mov_b32_e32 v5, v4
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_6
; %bb.7:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s1, 0
.LBB0_8:                                ; %Flow260
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_35
; %bb.9:                                ; %.lr.ph165
	s_mul_i32 s0, s15, s17
	s_cmp_gt_i32 s19, 0
	v_add_nc_u32_e32 v4, s0, v1
	s_mul_i32 s0, s0, s14
	s_cselect_b32 s7, -1, 0
	v_add3_u32 v5, s22, s0, v7
	s_cmp_gt_i32 s18, 0
	v_mad_u64_u32 v[2:3], null, v4, s16, v[0:1]
	s_mul_i32 s1, s18, s14
	s_cselect_b32 s15, -1, 0
	s_mov_b32 s3, 0
	s_mul_i32 s6, s17, s16
	v_mov_b32_e32 v6, 0
	v_cndmask_b32_e64 v4, 0, 1, s7
	s_delay_alu instid0(VALU_DEP_3)
	v_ashrrev_i32_e32 v3, 31, v2
	s_lshl_b32 s22, s1, 2
	v_mul_lo_u32 v7, s16, v5
	v_cndmask_b32_e64 v5, 0, 1, s15
	s_mov_b32 s23, 0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	s_lshl_b32 s8, s14, 2
	s_mov_b32 s9, 16
.LBB0_10:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_12 Depth 2
                                        ;       Child Loop BB0_14 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB0_18
; %bb.11:                               ; %.preheader152.preheader
                                        ;   in Loop: Header=BB0_10 Depth=1
	v_mov_b32_e32 v8, v7
	s_mov_b32 s24, 0
	s_mov_b32 s25, s3
	s_mov_b32 s26, s9
.LBB0_12:                               ; %.preheader152
                                        ;   Parent Loop BB0_10 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_14 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s15
	s_cbranch_vccnz .LBB0_17
; %bb.13:                               ; %.lr.ph156
                                        ;   in Loop: Header=BB0_12 Depth=2
	global_load_b32 v9, v[2:3], off
	v_subrev_nc_u32_e32 v10, s24, v1
	s_mov_b32 s27, 0
	s_mov_b32 s28, s18
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v10
	v_cmp_gt_i32_e64 s0, s17, v10
	v_mov_b32_e32 v10, v0
.LBB0_14:                               ;   Parent Loop BB0_10 Depth=1
                                        ;     Parent Loop BB0_12 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s1, s25, s27
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_cmp_lt_i32_e64 s2, -1, v10
	v_mov_b32_e32 v11, s1
	v_cmp_gt_i32_e64 s1, s16, v10
	ds_load_b32 v11, v11
	s_and_b32 s1, s1, vcc_lo
	s_and_b32 s1, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s2, s1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_16
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=3
	v_add_nc_u32_e32 v12, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v12, s1, s4, v12
	v_add_co_ci_u32_e64 v13, s1, s5, v13, s1
	s_add_i32 s1, s26, s27
	global_load_b32 v12, v[12:13], off
	scratch_load_b32 v13, off, s1
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v13, v9, v12
	scratch_store_b32 off, v13, s1
.LBB0_16:                               ;   in Loop: Header=BB0_14 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v6, v9, v11
	v_add_nc_u32_e32 v10, -1, v10
	s_add_i32 s28, s28, -1
	s_add_i32 s27, s27, s8
	s_cmp_eq_u32 s28, 0
	s_cbranch_scc0 .LBB0_14
.LBB0_17:                               ; %._crit_edge157
                                        ;   in Loop: Header=BB0_12 Depth=2
	v_subrev_nc_u32_e32 v8, s16, v8
	s_add_i32 s24, s24, 1
	s_add_i32 s26, s26, s22
	s_add_i32 s25, s25, s22
	s_cmp_eq_u32 s24, s19
	s_cbranch_scc0 .LBB0_12
.LBB0_18:                               ; %._crit_edge160
                                        ;   in Loop: Header=BB0_10 Depth=1
	v_add_nc_u32_e32 v7, s6, v7
	s_add_i32 s23, s23, 1
	s_add_i32 s9, s9, 4
	s_add_i32 s3, s3, 4
	s_cmp_eq_u32 s23, s14
	s_cbranch_scc0 .LBB0_10
; %bb.19:                               ; %._crit_edge166
	v_mad_u64_u32 v[2:3], null, s21, s17, v[1:2]
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v2, s16, v[0:1]
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[7:8]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_load_b32 v3, v[0:1], off
.LBB0_20:                               ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v3, v6
	global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v2, v3
	v_mov_b32_e32 v3, v2
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_20
; %bb.21:                               ; %atomicrmw.end
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s2, 0
.LBB0_22:                               ; %.preheader151
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_24 Depth 2
                                        ;       Child Loop BB0_26 Depth 3
                                        ;         Child Loop BB0_27 Depth 4
                                        ;         Child Loop BB0_30 Depth 4
	v_cmp_ne_u32_e32 vcc_lo, 1, v4
	s_cbranch_vccnz .LBB0_34
; %bb.23:                               ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB0_22 Depth=1
	s_mov_b32 s3, 0
.LBB0_24:                               ; %.preheader
                                        ;   Parent Loop BB0_22 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_26 Depth 3
                                        ;         Child Loop BB0_27 Depth 4
                                        ;         Child Loop BB0_30 Depth 4
	v_cmp_ne_u32_e32 vcc_lo, 1, v5
	s_cbranch_vccnz .LBB0_33
; %bb.25:                               ; %.lr.ph169
                                        ;   in Loop: Header=BB0_24 Depth=2
	s_mul_i32 s4, s3, s18
	s_mov_b32 s5, 0
.LBB0_26:                               ;   Parent Loop BB0_22 Depth=1
                                        ;     Parent Loop BB0_24 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_27 Depth 4
                                        ;         Child Loop BB0_30 Depth 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s5, s4
	v_bfrev_b32_e32 v3, 1
	s_mul_i32 s0, s0, s14
	s_mov_b32 s1, exec_lo
	s_add_i32 s0, s0, s2
	s_lshl_b32 s6, s0, 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s6, s6, 16
	scratch_load_b32 v0, off, s6
.LBB0_27:                               ; %ComputeLoop
                                        ;   Parent Loop BB0_22 Depth=1
                                        ;     Parent Loop BB0_24 Depth=2
                                        ;       Parent Loop BB0_26 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_ctz_i32_b32 s6, s1
	s_waitcnt vmcnt(0)
	v_readlane_b32 s7, v0, s6
	s_lshl_b32 s6, 1, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s1, s6
	s_cmp_lg_u32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v3, s7, v3
	s_cbranch_scc1 .LBB0_27
; %bb.28:                               ; %ComputeEnd
                                        ;   in Loop: Header=BB0_26 Depth=3
	v_mbcnt_lo_u32_b32 v0, exec_lo, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_xor_b32 s6, exec_lo, s1
	s_cbranch_execz .LBB0_32
; %bb.29:                               ;   in Loop: Header=BB0_26 Depth=3
	s_add_i32 s0, s0, s20
	s_mov_b32 s7, 0
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_add_u32 s0, s12, s0
	s_addc_u32 s1, s13, s1
	global_load_b32 v1, v2, s[0:1]
.LBB0_30:                               ; %atomicrmw.start188
                                        ;   Parent Loop BB0_22 Depth=1
                                        ;     Parent Loop BB0_24 Depth=2
                                        ;       Parent Loop BB0_26 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v1, v3
	global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_30
; %bb.31:                               ; %Flow249
                                        ;   in Loop: Header=BB0_26 Depth=3
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_32:                               ; %Flow250
                                        ;   in Loop: Header=BB0_26 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s5, s5, 1
	s_cmp_eq_u32 s5, s18
	s_cbranch_scc0 .LBB0_26
.LBB0_33:                               ; %._crit_edge170
                                        ;   in Loop: Header=BB0_24 Depth=2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, s19
	s_cbranch_scc0 .LBB0_24
.LBB0_34:                               ; %._crit_edge172
                                        ;   in Loop: Header=BB0_22 Depth=1
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, s14
	s_cbranch_scc0 .LBB0_22
.LBB0_35:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 128
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 29
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii, .Lfunc_end0-_Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1364
; NumSgprs: 31
; NumVgprs: 14
; ScratchSize: 128
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 31
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         60
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     by_value
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         76
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         84
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         86
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         88
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         90
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         92
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         94
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         136
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         192
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 328
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii
    .private_segment_fixed_size: 128
    .sgpr_count:     31
    .sgpr_spill_count: 0
    .symbol:         _Z25backpropConvolutionKernelPKfS0_S0_PfS1_iiiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
