#include <iostream>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>

#define MAX_THREADS_PER_BLOCK 1024
#define NUM_ELEMENTS 8192

__global__ void priorityQueueKernel(int *d_data, int *d_indices) {
    extern __shared__ int s_data[];

    int tid = threadIdx.x;
    int bid = blockIdx.x;
    int i = bid * blockDim.x + tid;

    // Load data into shared memory
    if (i < NUM_ELEMENTS) {
        s_data[tid] = d_data[i];
        d_indices[i] = i; // Initialize indices
    }
    __syncthreads();

    // Build max heap in shared memory
    for (int s = blockDim.x / 2 - 1; s >= 0; --s) {
        int root = s;
        while (root * 2 + 1 < blockDim.x) {
            int child = root * 2 + 1;
            if (child + 1 < blockDim.x && s_data[child] < s_data[child + 1]) {
                child++;
            }
            if (s_data[root] < s_data[child]) {
                int temp = s_data[root];
                s_data[root] = s_data[child];
                s_data[child] = temp;

                int tempIdx = d_indices[bid * blockDim.x + root];
                d_indices[bid * blockDim.x + root] = d_indices[bid * blockDim.x + child];
                d_indices[bid * blockDim.x + child] = tempIdx;

                root = child;
            } else {
                break;
            }
        }
    }
    __syncthreads();

    // Extract the maximum element and maintain heap property
    if (tid == 0) {
        int maxElement = s_data[0];
        int maxIndex = d_indices[bid * blockDim.x];
        s_data[0] = s_data[blockDim.x - 1];
        d_indices[bid * blockDim.x] = d_indices[bid * blockDim.x + blockDim.x - 1];

        int root = 0;
        while (root * 2 + 1 < blockDim.x) {
            int child = root * 2 + 1;
            if (child + 1 < blockDim.x && s_data[child] < s_data[child + 1]) {
                child++;
            }
            if (s_data[root] < s_data[child]) {
                int temp = s_data[root];
                s_data[root] = s_data[child];
                s_data[child] = temp;

                int tempIdx = d_indices[bid * blockDim.x + root];
                d_indices[bid * blockDim.x + root] = d_indices[bid * blockDim.x + child];
                d_indices[bid * blockDim.x + child] = tempIdx;

                root = child;
            } else {
                break;
            }
        }
        __syncthreads();

        // Store the max element and its index in global memory
        d_data[bid] = maxElement;
        d_indices[bid] = maxIndex;
    }
}

int main() {
    int *h_data = new int[NUM_ELEMENTS];
    int *h_indices = new int[NUM_ELEMENTS];

    // Initialize data with random values
    for (int i = 0; i < NUM_ELEMENTS; ++i) {
        h_data[i] = rand() % 10000;
    }

    int *d_data, *d_indices;
    size_t size = NUM_ELEMENTS * sizeof(int);

    // Allocate memory on device
    cudaError_t err = cudaMalloc((void**)&d_data, size);
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device data (error code " << err << ")" << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_indices, size);
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device indices (error code " << err << ")" << std::endl;
        cudaFree(d_data);
        return -1;
    }

    // Copy data from host to device
    err = cudaMemcpy(d_data, h_data, size, cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy data from host to device (error code " << err << ")" << std::endl;
        cudaFree(d_data);
        cudaFree(d_indices);
        return -1;
    }

    // Launch kernel
    int numBlocks = (NUM_ELEMENTS + MAX_THREADS_PER_BLOCK - 1) / MAX_THREADS_PER_BLOCK;
    priorityQueueKernel<<<numBlocks, MAX_THREADS_PER_BLOCK, MAX_THREADS_PER_BLOCK * sizeof(int)>>>(d_data, d_indices);
    err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Failed to launch kernel (error code " << err << ")" << std::endl;
        cudaFree(d_data);
        cudaFree(d_indices);
        return -1;
    }

    // Copy results back to host
    err = cudaMemcpy(h_data, d_data, numBlocks * sizeof(int), cudaMemcpyDeviceToHost);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy data from device to host (error code " << err << ")" << std::endl;
        cudaFree(d_data);
        cudaFree(d_indices);
        return -1;
    }
    err = cudaMemcpy(h_indices, d_indices, numBlocks * sizeof(int), cudaMemcpyDeviceToHost);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy indices from device to host (error code " << err << ")" << std::endl;
        cudaFree(d_data);
        cudaFree(d_indices);
        return -1;
    }

    // Free device memory
    cudaFree(d_data);
    cudaFree(d_indices);

    // Output the results
    std::cout << "Top " << numBlocks << " elements and their indices:" << std::endl;
    for (int i = 0; i < numBlocks; ++i) {
        std::cout << "Element: " << h_data[i] << ", Index: " << h_indices[i] << std::endl;
    }

    // Free host memory
    delete[] h_data;
    delete[] h_indices;

    return 0;
}
	.file	"tmpxft_00152ae7_00000000-6_cuda_code_080366.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4292:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4292:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z41__device_stub__Z19priorityQueueKernelPiS_PiS_
	.type	_Z41__device_stub__Z19priorityQueueKernelPiS_PiS_, @function
_Z41__device_stub__Z19priorityQueueKernelPiS_PiS_:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z19priorityQueueKernelPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L3:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z41__device_stub__Z19priorityQueueKernelPiS_PiS_, .-_Z41__device_stub__Z19priorityQueueKernelPiS_PiS_
	.globl	_Z19priorityQueueKernelPiS_
	.type	_Z19priorityQueueKernelPiS_, @function
_Z19priorityQueueKernelPiS_:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z19priorityQueueKernelPiS_PiS_
	.cfi_endproc
.LFE3661:
	.size	_Z19priorityQueueKernelPiS_, .-_Z19priorityQueueKernelPiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Failed to allocate device data (error code "
.LC1:
	.string	")"
.LC2:
	.string	"Failed to allocate device indices (error code "
.LC3:
	.string	"Failed to copy data from host to device (error code "
.LC4:
	.string	"Failed to launch kernel (error code "
.LC5:
	.string	"Failed to copy data from device to host (error code "
.LC6:
	.string	"Failed to copy indices from device to host (error code "
.LC7:
	.string	"Top "
.LC8:
	.string	" elements and their indices:"
.LC9:
	.string	"Element: "
.LC10:
	.string	", Index: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$32768, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	$10000, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$32768, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movq	%rax, %rbp
.L10:
	call	rand@PLT
	cltd
	idivl	%r13d
	movl	%edx, (%rbx,%r12,4)
	incq	%r12
	cmpq	$8192, %r12
	jne	.L10
	movq	%rsp, %rdi
	movl	$32768, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L11
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L12
.L11:
	leaq	8(%rsp), %rdi
	movl	$32768, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L13
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
.L25:
	call	cudaFree@PLT
.L12:
	orl	$-1, %eax
	jmp	.L9
.L13:
	movq	(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$32768, %edx
	call	cudaMemcpy@PLT
	leaq	.LC3(%rip), %rsi
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L26
	movl	$4194305, %edx
	movl	$536870913, %edi
	xorl	%r9d, %r9d
	movl	$4096, %r8d
	salq	$10, %rdx
	salq	$3, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z41__device_stub__Z19priorityQueueKernelPiS_PiS_
.L16:
	call	cudaGetLastError@PLT
	leaq	.LC4(%rip), %rsi
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L26
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movl	$32, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC5(%rip), %rsi
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L26
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$32, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L19
	leaq	.LC6(%rip), %rsi
.L26:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	jmp	.L25
.L19:
	movq	(%rsp), %rdi
	leaq	_ZSt4cout(%rip), %r13
	xorl	%r12d, %r12d
	leaq	.LC9(%rip), %r14
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC7(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$8, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC8(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L20:
	movq	%r14, %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	(%rbx,%r12), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC10(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	0(%rbp,%r12), %esi
	addq	$4, %r12
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	cmpq	$32, %r12
	jne	.L20
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	xorl	%eax, %eax
.L9:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z19priorityQueueKernelPiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z19priorityQueueKernelPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>


#define MAX_THREADS_PER_BLOCK 1024
#define NUM_ELEMENTS 8192

__global__ void priorityQueueKernel(int *d_data, int *d_indices) {
    extern __shared__ int s_data[];

    int tid = threadIdx.x;
    int bid = blockIdx.x;
    int i = bid * blockDim.x + tid;

    // Load data into shared memory
    if (i < NUM_ELEMENTS) {
        s_data[tid] = d_data[i];
        d_indices[i] = i; // Initialize indices
    }
    __syncthreads();

    // Build max heap in shared memory
    for (int s = blockDim.x / 2 - 1; s >= 0; --s) {
        int root = s;
        while (root * 2 + 1 < blockDim.x) {
            int child = root * 2 + 1;
            if (child + 1 < blockDim.x && s_data[child] < s_data[child + 1]) {
                child++;
            }
            if (s_data[root] < s_data[child]) {
                int temp = s_data[root];
                s_data[root] = s_data[child];
                s_data[child] = temp;

                int tempIdx = d_indices[bid * blockDim.x + root];
                d_indices[bid * blockDim.x + root] = d_indices[bid * blockDim.x + child];
                d_indices[bid * blockDim.x + child] = tempIdx;

                root = child;
            } else {
                break;
            }
        }
    }
    __syncthreads();

    // Extract the maximum element and maintain heap property
    if (tid == 0) {
        int maxElement = s_data[0];
        int maxIndex = d_indices[bid * blockDim.x];
        s_data[0] = s_data[blockDim.x - 1];
        d_indices[bid * blockDim.x] = d_indices[bid * blockDim.x + blockDim.x - 1];

        int root = 0;
        while (root * 2 + 1 < blockDim.x) {
            int child = root * 2 + 1;
            if (child + 1 < blockDim.x && s_data[child] < s_data[child + 1]) {
                child++;
            }
            if (s_data[root] < s_data[child]) {
                int temp = s_data[root];
                s_data[root] = s_data[child];
                s_data[child] = temp;

                int tempIdx = d_indices[bid * blockDim.x + root];
                d_indices[bid * blockDim.x + root] = d_indices[bid * blockDim.x + child];
                d_indices[bid * blockDim.x + child] = tempIdx;

                root = child;
            } else {
                break;
            }
        }
        __syncthreads();

        // Store the max element and its index in global memory
        d_data[bid] = maxElement;
        d_indices[bid] = maxIndex;
    }
}

int main() {
    int *h_data = new int[NUM_ELEMENTS];
    int *h_indices = new int[NUM_ELEMENTS];

    // Initialize data with random values
    for (int i = 0; i < NUM_ELEMENTS; ++i) {
        h_data[i] = rand() % 10000;
    }

    int *d_data, *d_indices;
    size_t size = NUM_ELEMENTS * sizeof(int);

    // Allocate memory on device
    hipError_t err = hipMalloc((void**)&d_data, size);
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device data (error code " << err << ")" << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_indices, size);
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device indices (error code " << err << ")" << std::endl;
        hipFree(d_data);
        return -1;
    }

    // Copy data from host to device
    err = hipMemcpy(d_data, h_data, size, hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy data from host to device (error code " << err << ")" << std::endl;
        hipFree(d_data);
        hipFree(d_indices);
        return -1;
    }

    // Launch kernel
    int numBlocks = (NUM_ELEMENTS + MAX_THREADS_PER_BLOCK - 1) / MAX_THREADS_PER_BLOCK;
    priorityQueueKernel<<<numBlocks, MAX_THREADS_PER_BLOCK, MAX_THREADS_PER_BLOCK * sizeof(int)>>>(d_data, d_indices);
    err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Failed to launch kernel (error code " << err << ")" << std::endl;
        hipFree(d_data);
        hipFree(d_indices);
        return -1;
    }

    // Copy results back to host
    err = hipMemcpy(h_data, d_data, numBlocks * sizeof(int), hipMemcpyDeviceToHost);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy data from device to host (error code " << err << ")" << std::endl;
        hipFree(d_data);
        hipFree(d_indices);
        return -1;
    }
    err = hipMemcpy(h_indices, d_indices, numBlocks * sizeof(int), hipMemcpyDeviceToHost);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy indices from device to host (error code " << err << ")" << std::endl;
        hipFree(d_data);
        hipFree(d_indices);
        return -1;
    }

    // Free device memory
    hipFree(d_data);
    hipFree(d_indices);

    // Output the results
    std::cout << "Top " << numBlocks << " elements and their indices:" << std::endl;
    for (int i = 0; i < numBlocks; ++i) {
        std::cout << "Element: " << h_data[i] << ", Index: " << h_indices[i] << std::endl;
    }

    // Free host memory
    delete[] h_data;
    delete[] h_indices;

    return 0;
}
	.text
	.file	"cuda_code_080366.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z34__device_stub__priorityQueueKernelPiS_ # -- Begin function _Z34__device_stub__priorityQueueKernelPiS_
	.type	_Z34__device_stub__priorityQueueKernelPiS_,@function
_Z34__device_stub__priorityQueueKernelPiS_: # @_Z34__device_stub__priorityQueueKernelPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19priorityQueueKernelPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z34__device_stub__priorityQueueKernelPiS_, .Lfunc_end0-_Z34__device_stub__priorityQueueKernelPiS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$32768, %edi                    # imm = 0x8000
	callq	_Znam
	movq	%rax, %rbx
	movl	$32768, %edi                    # imm = 0x8000
	callq	_Znam
	movq	%rax, %r14
	xorl	%r15d, %r15d
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1759218605, %rax, %rcx         # imm = 0x68DB8BAD
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$44, %rcx
	addl	%edx, %ecx
	imull	$10000, %ecx, %ecx              # imm = 0x2710
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	$8192, %r15                     # imm = 0x2000
	jne	.LBB1_1
# %bb.2:
	movq	%rsp, %rdi
	movl	$32768, %esi                    # imm = 0x8000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_4
# %bb.3:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$43, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cerr, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	jmp	.LBB1_15
.LBB1_4:
	leaq	8(%rsp), %rdi
	movl	$32768, %esi                    # imm = 0x8000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_6
# %bb.5:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	movl	$46, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cerr, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rdi
	jmp	.LBB1_14
.LBB1_6:
	movq	(%rsp), %rdi
	movl	$32768, %edx                    # imm = 0x8000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_8
# %bb.7:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$52, %edx
	jmp	.LBB1_12
.LBB1_8:
	movabsq	$4294967304, %rdi               # imm = 0x100000008
	leaq	1016(%rdi), %rdx
	movl	$4096, %r8d                     # imm = 0x1000
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.9:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z34__device_stub__priorityQueueKernelPiS_
.LBB1_10:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_17
# %bb.11:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.4, %esi
	movl	$36, %edx
.LBB1_12:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cerr, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_13:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
.LBB1_14:
	callq	hipFree
.LBB1_15:
	movl	$-1, %eax
.LBB1_16:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_17:
	.cfi_def_cfa_offset 64
	movq	(%rsp), %rsi
	movl	$32, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_19
# %bb.18:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	movl	$52, %edx
	jmp	.LBB1_21
.LBB1_19:
	movq	8(%rsp), %rsi
	movl	$32, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_22
# %bb.20:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.6, %esi
	movl	$55, %edx
.LBB1_21:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cerr, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	jmp	.LBB1_13
.LBB1_22:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$4, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$8, %esi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.8, %esi
	movl	$28, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r15, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	xorl	%r12d, %r12d
.LBB1_23:                               # =>This Inner Loop Header: Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%rbx,%r12,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.10, %esi
	movl	$9, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%r14,%r12,4), %esi
	movq	%r15, %rdi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r12
	cmpq	$8, %r12
	jne	.LBB1_23
# %bb.24:
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	jmp	.LBB1_16
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19priorityQueueKernelPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z19priorityQueueKernelPiS_,@object # @_Z19priorityQueueKernelPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z19priorityQueueKernelPiS_
	.p2align	3, 0x0
_Z19priorityQueueKernelPiS_:
	.quad	_Z34__device_stub__priorityQueueKernelPiS_
	.size	_Z19priorityQueueKernelPiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to allocate device data (error code "
	.size	.L.str, 44

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	")"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate device indices (error code "
	.size	.L.str.2, 47

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to copy data from host to device (error code "
	.size	.L.str.3, 53

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to launch kernel (error code "
	.size	.L.str.4, 37

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to copy data from device to host (error code "
	.size	.L.str.5, 53

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to copy indices from device to host (error code "
	.size	.L.str.6, 56

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Top "
	.size	.L.str.7, 5

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	" elements and their indices:"
	.size	.L.str.8, 29

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Element: "
	.size	.L.str.9, 10

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	", Index: "
	.size	.L.str.10, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z19priorityQueueKernelPiS_"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z34__device_stub__priorityQueueKernelPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z19priorityQueueKernelPiS_
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z19priorityQueueKernelPiS_ ; -- Begin function _Z19priorityQueueKernelPiS_
	.globl	_Z19priorityQueueKernelPiS_
	.p2align	8
	.type	_Z19priorityQueueKernelPiS_,@function
_Z19priorityQueueKernelPiS_:            ; @_Z19priorityQueueKernelPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_mov_b32 s7, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s6, s15, s5
	v_add_nc_u32_e32 v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0x2000, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v4, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v4, v[4:5], off
	v_lshl_add_u32 v5, v0, 2, 0
	global_store_b32 v[2:3], v1, off
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v4
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s7
	s_cmp_lt_u32 s5, 2
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_12
; %bb.3:                                ; %.preheader.preheader
	v_mov_b32_e32 v1, 0
	s_lshr_b32 s7, s5, 1
	s_mov_b32 s9, 0
.LBB0_4:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
	s_add_i32 s10, s7, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s8, s10
.LBB0_5:                                ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s13, s8, 1
	s_mov_b32 s12, -1
	s_or_b32 s11, s13, 1
	s_cmp_ge_u32 s11, s5
	s_cbranch_scc1 .LBB0_10
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=2
	s_add_i32 s12, s13, 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s12, s5
	s_cbranch_scc1 .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_5 Depth=2
	s_lshl_b32 s13, s13, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s13, s13, 0
	v_mov_b32_e32 v2, s13
	ds_load_2addr_b32 v[2:3], v2 offset0:1 offset1:2
	s_waitcnt lgkmcnt(0)
	v_readfirstlane_b32 s13, v2
	v_readfirstlane_b32 s14, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lt_i32 s13, s14
	s_cselect_b32 s11, s12, s11
.LBB0_8:                                ;   in Loop: Header=BB0_5 Depth=2
	s_lshl_b32 s12, s8, 2
	s_lshl_b32 s14, s11, 2
	s_add_i32 s13, s12, 0
	s_add_i32 s14, s14, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, s13 :: v_dual_mov_b32 v3, s14
	ds_load_b32 v2, v2
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e64 s12, v2, v3
	s_and_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_5 Depth=2
	s_add_i32 s8, s8, s6
	v_dual_mov_b32 v6, s13 :: v_dual_mov_b32 v7, s14
	s_lshl_b64 s[16:17], s[8:9], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s16, s2, s16
	s_addc_u32 s17, s3, s17
	s_add_i32 s8, s11, s6
	s_lshl_b64 s[18:19], s[8:9], 2
	s_mov_b32 s8, s11
	s_add_u32 s18, s2, s18
	s_addc_u32 s19, s3, s19
	s_clause 0x1
	global_load_b32 v4, v1, s[18:19]
	global_load_b32 v5, v1, s[16:17]
	ds_store_b32 v6, v3
	ds_store_b32 v7, v2
	s_waitcnt vmcnt(1)
	global_store_b32 v1, v4, s[16:17]
	s_waitcnt vmcnt(0)
	global_store_b32 v1, v5, s[18:19]
.LBB0_10:                               ; %Flow110
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_and_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccz .LBB0_5
; %bb.11:                               ;   in Loop: Header=BB0_4 Depth=1
	s_cmp_lt_i32 s7, 2
	s_mov_b32 s7, s10
	s_cbranch_scc0 .LBB0_4
.LBB0_12:                               ; %._crit_edge
	s_mov_b32 s9, 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s7, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_21
; %bb.13:
	s_mov_b32 s7, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[6:7], 2
	s_add_u32 s10, s2, s10
	s_addc_u32 s11, s3, s11
	s_add_i32 s7, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_add_i32 s8, s7, s6
	s_lshl_b32 s7, s7, 2
	s_lshl_b64 s[12:13], s[8:9], 2
	s_add_i32 s7, s7, 0
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, s7
	s_add_u32 s12, s2, s12
	s_addc_u32 s13, s3, s13
	s_clause 0x1
	global_load_b32 v3, v1, s[12:13]
	global_load_b32 v0, v1, s[10:11]
	ds_load_b32 v4, v2
	ds_load_b32 v2, v1
	s_mov_b32 s7, 0
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v1, v4
	s_waitcnt vmcnt(1)
	global_store_b32 v1, v3, s[10:11]
.LBB0_14:                               ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s8, s7, 1
	s_mov_b32 s11, -1
	s_or_b32 s10, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s10, s5
	s_cbranch_scc1 .LBB0_19
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=1
	s_add_i32 s11, s8, 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s11, s5
	s_cbranch_scc1 .LBB0_17
; %bb.16:                               ;   in Loop: Header=BB0_14 Depth=1
	s_lshl_b32 s8, s8, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s8, s8, 0
	v_mov_b32_e32 v3, s8
	ds_load_2addr_b32 v[3:4], v3 offset0:1 offset1:2
	s_waitcnt lgkmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s12, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lt_i32 s8, s12
	s_cselect_b32 s10, s11, s10
.LBB0_17:                               ;   in Loop: Header=BB0_14 Depth=1
	s_lshl_b32 s8, s7, 2
	s_lshl_b32 s11, s10, 2
	s_add_i32 s12, s8, 0
	s_add_i32 s13, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, s12 :: v_dual_mov_b32 v4, s13
	ds_load_b32 v3, v3
	ds_load_b32 v4, v4
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e64 s11, v3, v4
	s_and_b32 vcc_lo, exec_lo, s11
	s_cbranch_vccnz .LBB0_19
; %bb.18:                               ;   in Loop: Header=BB0_14 Depth=1
	s_add_i32 s8, s7, s6
	v_dual_mov_b32 v7, s12 :: v_dual_mov_b32 v8, s13
	s_lshl_b64 s[14:15], s[8:9], 2
	s_mov_b32 s7, s10
	s_add_u32 s14, s2, s14
	s_addc_u32 s15, s3, s15
	s_add_i32 s8, s10, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[16:17], s[8:9], 2
	s_add_u32 s16, s2, s16
	s_addc_u32 s17, s3, s17
	s_clause 0x1
	global_load_b32 v5, v1, s[16:17]
	global_load_b32 v6, v1, s[14:15]
	ds_store_b32 v7, v4
	ds_store_b32 v8, v3
	s_waitcnt vmcnt(1)
	global_store_b32 v1, v5, s[14:15]
	s_waitcnt vmcnt(0)
	global_store_b32 v1, v6, s[16:17]
.LBB0_19:                               ; %Flow
                                        ;   in Loop: Header=BB0_14 Depth=1
	s_and_b32 vcc_lo, exec_lo, s11
	s_cbranch_vccz .LBB0_14
; %bb.20:
	s_ashr_i32 s5, s4, 31
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[4:5], s[4:5], 2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_add_u32 s0, s0, s4
	s_addc_u32 s1, s1, s5
	s_add_u32 s2, s2, s4
	s_addc_u32 s3, s3, s5
	s_barrier
	buffer_gl0_inv
	s_clause 0x1
	global_store_b32 v1, v2, s[0:1]
	global_store_b32 v1, v0, s[2:3]
.LBB0_21:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19priorityQueueKernelPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z19priorityQueueKernelPiS_, .Lfunc_end0-_Z19priorityQueueKernelPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 992
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19priorityQueueKernelPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z19priorityQueueKernelPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
