#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>

#define BLOCK_SIZE 16
#define GRID_SIZE 4

__constant__ float c_dt;
__constant__ float c_dx;
__constant__ float c_dy;
__constant__ float c_dz;
__constant__ float c_alpha;

__global__ void fluidSimulationStep(float* u, float* u_new, int nx, int ny, int nz) {
    int ix = blockIdx.x * blockDim.x + threadIdx.x;
    int iy = blockIdx.y * blockDim.y + threadIdx.y;
    int iz = blockIdx.z * blockDim.z + threadIdx.z;

    if (ix > 0 && ix < nx - 1 && iy > 0 && iy < ny - 1 && iz > 0 && iz < nz - 1) {
        int idx = ix + iy * nx + iz * nx * ny;

        float laplacian = (u[idx + 1] + u[idx - 1] + u[idx + nx] + u[idx - nx] + u[idx + nx * ny] + u[idx - nx * ny] - 6 * u[idx]) / (c_dx * c_dx);

        u_new[idx] = u[idx] + c_dt * (c_alpha * laplacian);
    }
}

__global__ void updateGrid(float* u, float* u_new, int nx, int ny, int nz) {
    int ix = blockIdx.x * blockDim.x + threadIdx.x;
    int iy = blockIdx.y * blockDim.y + threadIdx.y;
    int iz = blockIdx.z * blockDim.z + threadIdx.z;

    if (ix > 0 && ix < nx - 1 && iy > 0 && iy < ny - 1 && iz > 0 && iz < nz - 1) {
        int idx = ix + iy * nx + iz * nx * ny;
        atomicExch(&u[idx], u_new[idx]);
    }
}

int main() {
    int nx = 64, ny = 64, nz = 64;
    int numElements = nx * ny * nz;
    size_t size = numElements * sizeof(float);

    float* h_u = (float*)malloc(size);
    float* h_u_new = (float*)malloc(size);

    // Initialize random values for the grid
    curandGenerator_t gen;
    curandCreateGenerator(&gen, CURAND_RNG_PSEUDO_DEFAULT);
    curandSetPseudoRandomGeneratorSeed(gen, 1234ULL);
    curandGenerateUniform(gen, h_u, numElements);
    curandGenerateUniform(gen, h_u_new, numElements);
    curandDestroyGenerator(gen);

    float* d_u, * d_u_new;
    cudaMalloc((void**)&d_u, size);
    cudaMalloc((void**)&d_u_new, size);

    cudaMemcpy(d_u, h_u, size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_u_new, h_u_new, size, cudaMemcpyHostToDevice);

    dim3 blockSize(BLOCK_SIZE, BLOCK_SIZE, BLOCK_SIZE);
    dim3 gridSize(GRID_SIZE, GRID_SIZE, GRID_SIZE);

    float dt = 0.01f, dx = 0.1f, dy = 0.1f, dz = 0.1f, alpha = 0.01f;

    cudaMemcpyToSymbol(c_dt, &dt, sizeof(float));
    cudaMemcpyToSymbol(c_dx, &dx, sizeof(float));
    cudaMemcpyToSymbol(c_dy, &dy, sizeof(float));
    cudaMemcpyToSymbol(c_dz, &dz, sizeof(float));
    cudaMemcpyToSymbol(c_alpha, &alpha, sizeof(float));

    int numSteps = 100;
    for (int step = 0; step < numSteps; ++step) {
        fluidSimulationStep<<<gridSize, blockSize>>>(d_u, d_u_new, nx, ny, nz);
        cudaDeviceSynchronize();

        updateGrid<<<gridSize, blockSize>>>(d_u, d_u_new, nx, ny, nz);
        cudaDeviceSynchronize();
    }

    cudaMemcpy(h_u, d_u, size, cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_u);
    cudaFree(d_u_new);

    // Free host memory
    free(h_u);
    free(h_u_new);

    // Check for any errors launching the kernel
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Failed to launch fluidSimulationStep kernel (error code " << err << " : " << cudaGetErrorString(err) << ")" << std::endl;
        exit(EXIT_FAILURE);
    }

    std::cout << "Simulation completed successfully." << std::endl;

    return 0;
}
	.file	"tmpxft_00061a59_00000000-6_cuda_code_010221.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3852:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3852:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z44__device_stub__Z19fluidSimulationStepPfS_iiiPfS_iii
	.type	_Z44__device_stub__Z19fluidSimulationStepPfS_iiiPfS_iii, @function
_Z44__device_stub__Z19fluidSimulationStepPfS_iiiPfS_iii:
.LFB3874:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z19fluidSimulationStepPfS_iii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3874:
	.size	_Z44__device_stub__Z19fluidSimulationStepPfS_iiiPfS_iii, .-_Z44__device_stub__Z19fluidSimulationStepPfS_iiiPfS_iii
	.globl	_Z19fluidSimulationStepPfS_iii
	.type	_Z19fluidSimulationStepPfS_iii, @function
_Z19fluidSimulationStepPfS_iii:
.LFB3875:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z19fluidSimulationStepPfS_iiiPfS_iii
	.cfi_endproc
.LFE3875:
	.size	_Z19fluidSimulationStepPfS_iii, .-_Z19fluidSimulationStepPfS_iii
	.globl	_Z35__device_stub__Z10updateGridPfS_iiiPfS_iii
	.type	_Z35__device_stub__Z10updateGridPfS_iiiPfS_iii, @function
_Z35__device_stub__Z10updateGridPfS_iiiPfS_iii:
.LFB3876:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10updateGridPfS_iii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3876:
	.size	_Z35__device_stub__Z10updateGridPfS_iiiPfS_iii, .-_Z35__device_stub__Z10updateGridPfS_iiiPfS_iii
	.globl	_Z10updateGridPfS_iii
	.type	_Z10updateGridPfS_iii, @function
_Z10updateGridPfS_iii:
.LFB3877:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10updateGridPfS_iiiPfS_iii
	.cfi_endproc
.LFE3877:
	.size	_Z10updateGridPfS_iii, .-_Z10updateGridPfS_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Failed to launch fluidSimulationStep kernel (error code "
.LC3:
	.string	" : "
.LC4:
	.string	")"
.LC5:
	.string	"Simulation completed successfully."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3849:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$1048576, %edi
	movl	$100, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$1048576, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	leaq	24(%rsp), %rdi
	movl	$100, %esi
	movq	%rax, %rbp
	call	curandCreateGenerator@PLT
	movq	24(%rsp), %rdi
	movl	$1234, %esi
	call	curandSetPseudoRandomGeneratorSeed@PLT
	movq	24(%rsp), %rdi
	movl	$262144, %edx
	movq	%rbx, %rsi
	call	curandGenerateUniform@PLT
	movq	24(%rsp), %rdi
	movl	$262144, %edx
	movq	%rbp, %rsi
	call	curandGenerateUniform@PLT
	movq	24(%rsp), %rdi
	call	curandDestroyGenerator@PLT
	leaq	32(%rsp), %rdi
	movl	$1048576, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$1048576, %esi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$1048576, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$1048576, %edx
	call	cudaMemcpy@PLT
	movss	.LC1(%rip), %xmm0
	leaq	4(%rsp), %rsi
	movss	.LC0(%rip), %xmm1
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movabsq	$68719476752, %rax
	movl	$4, %edx
	movq	%rax, 48(%rsp)
	leaq	_ZL4c_dt(%rip), %rdi
	movabsq	$17179869188, %rax
	movss	%xmm1, 4(%rsp)
	movss	%xmm0, 8(%rsp)
	movss	%xmm0, 12(%rsp)
	movss	%xmm0, 16(%rsp)
	movss	%xmm1, 20(%rsp)
	movl	$16, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$4, 68(%rsp)
	call	cudaMemcpyToSymbol@PLT
	leaq	8(%rsp), %rsi
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$4, %edx
	leaq	_ZL4c_dx(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	leaq	12(%rsp), %rsi
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$4, %edx
	leaq	_ZL4c_dy(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	leaq	16(%rsp), %rsi
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$4, %edx
	leaq	_ZL4c_dz(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	leaq	20(%rsp), %rsi
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$4, %edx
	leaq	_ZL7c_alpha(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
.L16:
	movl	56(%rsp), %ecx
	movq	48(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	60(%rsp), %rdi
	movl	68(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$64, %r8d
	movl	$64, %ecx
	movl	$64, %edx
	call	_Z44__device_stub__Z19fluidSimulationStepPfS_iiiPfS_iii
.L14:
	call	cudaDeviceSynchronize@PLT
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	48(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$64, %r8d
	movl	$64, %ecx
	movl	$64, %edx
	call	_Z35__device_stub__Z10updateGridPfS_iiiPfS_iii
.L15:
	call	cudaDeviceSynchronize@PLT
	decl	%r12d
	jne	.L16
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movl	$1048576, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L17
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %edi
	call	exit@PLT
.L17:
	leaq	_ZSt4cout(%rip), %rdi
	leaq	.LC5(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3849:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z10updateGridPfS_iii"
.LC7:
	.string	"_Z19fluidSimulationStepPfS_iii"
.LC8:
	.string	"precalc_xorwow_matrix"
.LC9:
	.string	"precalc_xorwow_offset_matrix"
.LC10:
	.string	"mrg32k3aM1"
.LC11:
	.string	"mrg32k3aM2"
.LC12:
	.string	"mrg32k3aM1SubSeq"
.LC13:
	.string	"mrg32k3aM2SubSeq"
.LC14:
	.string	"mrg32k3aM1Seq"
.LC15:
	.string	"mrg32k3aM2Seq"
.LC16:
	.string	"__cr_lgamma_table"
.LC17:
	.string	"c_dt"
.LC18:
	.string	"c_dx"
.LC19:
	.string	"c_dy"
.LC20:
	.string	"c_dz"
.LC21:
	.string	"c_alpha"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3879:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10updateGridPfS_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z19fluidSimulationStepPfS_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$72, %r9d
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL4c_dt(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL4c_dx(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL4c_dy(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL4c_dz(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$4, %r9d
	movq	%rdx, %rcx
	leaq	_ZL7c_alpha(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3879:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL7c_alpha
	.comm	_ZL7c_alpha,4,4
	.local	_ZL4c_dz
	.comm	_ZL4c_dz,4,4
	.local	_ZL4c_dy
	.comm	_ZL4c_dy,4,4
	.local	_ZL4c_dx
	.comm	_ZL4c_dx,4,4
	.local	_ZL4c_dt
	.comm	_ZL4c_dt,4,4
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1008981770
	.align 4
.LC1:
	.long	1036831949
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>

#define BLOCK_SIZE 16
#define GRID_SIZE 4

__constant__ float c_dt;
__constant__ float c_dx;
__constant__ float c_dy;
__constant__ float c_dz;
__constant__ float c_alpha;

__global__ void fluidSimulationStep(float* u, float* u_new, int nx, int ny, int nz) {
    int ix = blockIdx.x * blockDim.x + threadIdx.x;
    int iy = blockIdx.y * blockDim.y + threadIdx.y;
    int iz = blockIdx.z * blockDim.z + threadIdx.z;

    if (ix > 0 && ix < nx - 1 && iy > 0 && iy < ny - 1 && iz > 0 && iz < nz - 1) {
        int idx = ix + iy * nx + iz * nx * ny;

        float laplacian = (u[idx + 1] + u[idx - 1] + u[idx + nx] + u[idx - nx] + u[idx + nx * ny] + u[idx - nx * ny] - 6 * u[idx]) / (c_dx * c_dx);

        u_new[idx] = u[idx] + c_dt * (c_alpha * laplacian);
    }
}

__global__ void updateGrid(float* u, float* u_new, int nx, int ny, int nz) {
    int ix = blockIdx.x * blockDim.x + threadIdx.x;
    int iy = blockIdx.y * blockDim.y + threadIdx.y;
    int iz = blockIdx.z * blockDim.z + threadIdx.z;

    if (ix > 0 && ix < nx - 1 && iy > 0 && iy < ny - 1 && iz > 0 && iz < nz - 1) {
        int idx = ix + iy * nx + iz * nx * ny;
        atomicExch(&u[idx], u_new[idx]);
    }
}

int main() {
    int nx = 64, ny = 64, nz = 64;
    int numElements = nx * ny * nz;
    size_t size = numElements * sizeof(float);

    float* h_u = (float*)malloc(size);
    float* h_u_new = (float*)malloc(size);

    // Initialize random values for the grid
    hiprandGenerator_t gen;
    hiprandCreateGenerator(&gen, HIPRAND_RNG_PSEUDO_DEFAULT);
    hiprandSetPseudoRandomGeneratorSeed(gen, 1234ULL);
    hiprandGenerateUniform(gen, h_u, numElements);
    hiprandGenerateUniform(gen, h_u_new, numElements);
    hiprandDestroyGenerator(gen);

    float* d_u, * d_u_new;
    hipMalloc((void**)&d_u, size);
    hipMalloc((void**)&d_u_new, size);

    hipMemcpy(d_u, h_u, size, hipMemcpyHostToDevice);
    hipMemcpy(d_u_new, h_u_new, size, hipMemcpyHostToDevice);

    dim3 blockSize(BLOCK_SIZE, BLOCK_SIZE, BLOCK_SIZE);
    dim3 gridSize(GRID_SIZE, GRID_SIZE, GRID_SIZE);

    float dt = 0.01f, dx = 0.1f, dy = 0.1f, dz = 0.1f, alpha = 0.01f;

    hipMemcpyToSymbol(HIP_SYMBOL(c_dt), &dt, sizeof(float));
    hipMemcpyToSymbol(HIP_SYMBOL(c_dx), &dx, sizeof(float));
    hipMemcpyToSymbol(HIP_SYMBOL(c_dy), &dy, sizeof(float));
    hipMemcpyToSymbol(HIP_SYMBOL(c_dz), &dz, sizeof(float));
    hipMemcpyToSymbol(HIP_SYMBOL(c_alpha), &alpha, sizeof(float));

    int numSteps = 100;
    for (int step = 0; step < numSteps; ++step) {
        fluidSimulationStep<<<gridSize, blockSize>>>(d_u, d_u_new, nx, ny, nz);
        hipDeviceSynchronize();

        updateGrid<<<gridSize, blockSize>>>(d_u, d_u_new, nx, ny, nz);
        hipDeviceSynchronize();
    }

    hipMemcpy(h_u, d_u, size, hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_u);
    hipFree(d_u_new);

    // Free host memory
    free(h_u);
    free(h_u_new);

    // Check for any errors launching the kernel
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Failed to launch fluidSimulationStep kernel (error code " << err << " : " << hipGetErrorString(err) << ")" << std::endl;
        exit(EXIT_FAILURE);
    }

    std::cout << "Simulation completed successfully." << std::endl;

    return 0;
}
	.text
	.file	"cuda_code_010221.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z34__device_stub__fluidSimulationStepPfS_iii # -- Begin function _Z34__device_stub__fluidSimulationStepPfS_iii
	.type	_Z34__device_stub__fluidSimulationStepPfS_iii,@function
_Z34__device_stub__fluidSimulationStepPfS_iii: # @_Z34__device_stub__fluidSimulationStepPfS_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19fluidSimulationStepPfS_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z34__device_stub__fluidSimulationStepPfS_iii, .Lfunc_end0-_Z34__device_stub__fluidSimulationStepPfS_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__updateGridPfS_iii # -- Begin function _Z25__device_stub__updateGridPfS_iii
	.type	_Z25__device_stub__updateGridPfS_iii,@function
_Z25__device_stub__updateGridPfS_iii:   # @_Z25__device_stub__updateGridPfS_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10updateGridPfS_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__updateGridPfS_iii, .Lfunc_end1-_Z25__device_stub__updateGridPfS_iii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$68719476752, %r15              # imm = 0x1000000010
	movabsq	$17179869188, %r12              # imm = 0x400000004
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	movq	%rax, %rbx
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	movq	%rax, %rbp
	leaq	64(%rsp), %r14
	movq	%r14, %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hiprandCreateGenerator
	movq	(%r14), %rdi
	movl	$1234, %esi                     # imm = 0x4D2
	callq	hiprandSetPseudoRandomGeneratorSeed
	movq	(%r14), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%rbx, %rsi
	callq	hiprandGenerateUniform
	movq	(%r14), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%rbp, %rsi
	callq	hiprandGenerateUniform
	movq	(%r14), %rdi
	callq	hiprandDestroyGenerator
	leaq	8(%rsp), %r14
	movl	$1048576, %esi                  # imm = 0x100000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r13
	movl	$1048576, %esi                  # imm = 0x100000
	movq	%r13, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%rbp, 24(%rsp)                  # 8-byte Spill
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$1008981770, %eax               # imm = 0x3C23D70A
	leaq	60(%rsp), %rsi
	movl	%eax, (%rsi)
	movl	$1036831949, %ecx               # imm = 0x3DCCCCCD
	leaq	56(%rsp), %rbx
	movl	%ecx, (%rbx)
	leaq	52(%rsp), %r14
	movl	%ecx, (%r14)
	leaq	48(%rsp), %rbp
	movl	%ecx, (%rbp)
	leaq	44(%rsp), %r13
	movl	%eax, (%r13)
	movl	$c_dt, %edi
	movl	$4, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movl	$c_dx, %edi
	movl	$4, %edx
	movq	%rbx, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movl	$c_dy, %edi
	movl	$4, %edx
	movq	%r14, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movl	$c_dz, %edi
	movl	$4, %edx
	movq	%rbp, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movl	$c_alpha, %edi
	movl	$4, %edx
	movq	%r13, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movl	$100, %ebx
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$4, %esi
	movq	%r15, %rdx
	movl	$16, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_3
# %bb.2:                                #   in Loop: Header=BB2_1 Depth=1
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$64, %edx
	movl	$64, %ecx
	movl	$64, %r8d
	callq	_Z34__device_stub__fluidSimulationStepPfS_iii
.LBB2_3:                                #   in Loop: Header=BB2_1 Depth=1
	callq	hipDeviceSynchronize
	movq	%r12, %rdi
	movl	$4, %esi
	movq	%r15, %rdx
	movl	$16, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_5
# %bb.4:                                #   in Loop: Header=BB2_1 Depth=1
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$64, %edx
	movl	$64, %ecx
	movl	$64, %r8d
	callq	_Z25__device_stub__updateGridPfS_iii
.LBB2_5:                                #   in Loop: Header=BB2_1 Depth=1
	callq	hipDeviceSynchronize
	decl	%ebx
	jne	.LBB2_1
# %bb.6:
	movq	8(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	32(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	24(%rsp), %rdi                  # 8-byte Reload
	callq	free
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_8:
	.cfi_def_cfa_offset 128
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	subq	$32, %rsp
	.cfi_adjust_cfa_offset 32
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19fluidSimulationStepPfS_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10updateGridPfS_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$c_dt, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$c_dx, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$c_dy, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$c_dz, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$c_alpha, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$__hip_module_dtor, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	c_dt,@object                    # @c_dt
	.local	c_dt
	.comm	c_dt,4,4
	.type	c_dx,@object                    # @c_dx
	.local	c_dx
	.comm	c_dx,4,4
	.type	c_dy,@object                    # @c_dy
	.local	c_dy
	.comm	c_dy,4,4
	.type	c_dz,@object                    # @c_dz
	.local	c_dz
	.comm	c_dz,4,4
	.type	c_alpha,@object                 # @c_alpha
	.local	c_alpha
	.comm	c_alpha,4,4
	.type	_Z19fluidSimulationStepPfS_iii,@object # @_Z19fluidSimulationStepPfS_iii
	.section	.rodata,"a",@progbits
	.globl	_Z19fluidSimulationStepPfS_iii
	.p2align	3, 0x0
_Z19fluidSimulationStepPfS_iii:
	.quad	_Z34__device_stub__fluidSimulationStepPfS_iii
	.size	_Z19fluidSimulationStepPfS_iii, 8

	.type	_Z10updateGridPfS_iii,@object   # @_Z10updateGridPfS_iii
	.globl	_Z10updateGridPfS_iii
	.p2align	3, 0x0
_Z10updateGridPfS_iii:
	.quad	_Z25__device_stub__updateGridPfS_iii
	.size	_Z10updateGridPfS_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to launch fluidSimulationStep kernel (error code "
	.size	.L.str, 57

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" : "
	.size	.L.str.1, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	")"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Simulation completed successfully."
	.size	.L.str.3, 35

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z19fluidSimulationStepPfS_iii"
	.size	.L__unnamed_1, 31

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10updateGridPfS_iii"
	.size	.L__unnamed_2, 22

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"c_dt"
	.size	.L__unnamed_3, 5

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"c_dx"
	.size	.L__unnamed_4, 5

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"c_dy"
	.size	.L__unnamed_5, 5

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"c_dz"
	.size	.L__unnamed_6, 5

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"c_alpha"
	.size	.L__unnamed_7, 8

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z34__device_stub__fluidSimulationStepPfS_iii
	.addrsig_sym _Z25__device_stub__updateGridPfS_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym c_dt
	.addrsig_sym c_dx
	.addrsig_sym c_dy
	.addrsig_sym c_dz
	.addrsig_sym c_alpha
	.addrsig_sym _Z19fluidSimulationStepPfS_iii
	.addrsig_sym _Z10updateGridPfS_iii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z19fluidSimulationStepPfS_iii ; -- Begin function _Z19fluidSimulationStepPfS_iii
	.globl	_Z19fluidSimulationStepPfS_iii
	.p2align	8
	.type	_Z19fluidSimulationStepPfS_iii,@function
_Z19fluidSimulationStepPfS_iii:         ; @_Z19fluidSimulationStepPfS_iii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x2c
	s_load_b128 s[8:11], s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s4, v[3:4]
	s_and_b32 s2, s3, 0xffff
	s_add_i32 s3, s9, -1
	v_mad_u64_u32 v[2:3], null, s15, s2, v[4:5]
	s_add_i32 s2, s8, -1
	s_add_i32 s4, s10, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_min_i32_e32 v3, v1, v0
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	v_cmp_gt_i32_e64 s2, s3, v1
	v_cmp_gt_i32_e64 s3, s4, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_lt_i32_e64 s4, 0, v3
	v_cmp_lt_i32_e64 s5, 0, v2
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 s3, s4, vcc_lo
	s_and_b32 s2, s2, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mad_u64_u32 v[3:4], null, v2, s9, v[1:2]
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s6, s9, s8
	s_ashr_i32 s5, s8, 31
	s_mov_b32 s4, s8
	s_ashr_i32 s7, s6, 31
	s_lshl_b64 s[4:5], s[4:5], 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v3, s8, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	v_subrev_nc_u32_e32 v0, s8, v1
	v_subrev_nc_u32_e32 v3, s6, v1
	s_lshl_b64 s[6:7], s[6:7], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[9:10], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v6, vcc_lo
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v11, vcc_lo, v7, s4
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v8, vcc_lo
	global_load_b96 v[0:2], v[7:8], off offset:-4
	v_add_co_u32 v9, vcc_lo, s0, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v10, vcc_lo
	s_clause 0x1
	global_load_b32 v11, v[11:12], off
	global_load_b32 v9, v[9:10], off
	v_add_co_u32 v7, vcc_lo, v7, s6
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_clause 0x1
	global_load_b32 v7, v[7:8], off
	global_load_b32 v3, v[3:4], off
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, c_dx@rel32@lo+4
	s_addc_u32 s1, s1, c_dx@rel32@hi+12
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt vmcnt(4)
	v_add_f32_e32 v0, v2, v0
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v2, s0, s0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, c_alpha@rel32@lo+4
	s_addc_u32 s1, s1, c_alpha@rel32@hi+12
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_dt@rel32@lo+4
	s_addc_u32 s5, s5, c_dt@rel32@hi+12
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt vmcnt(3)
	v_add_f32_e32 v0, v0, v11
	s_load_b32 s1, s[4:5], 0x0
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v9
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v0, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v3
	v_fmamk_f32 v0, v1, 0xc0c00000, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v3, null, v2, v2, v0
	v_div_scale_f32 v8, vcc_lo, v0, v2, v0
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v3, v4, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v7, v4
	v_mul_f32_e32 v7, v8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v3, v7, v8
	v_fmac_f32_e32 v7, v9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, -v3, v7, v8
	v_div_fmas_f32 v3, v3, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v0, v3, v2, v0
	v_add_co_u32 v2, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v0, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v1, s1, v0
	global_store_b32 v[2:3], v1, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19fluidSimulationStepPfS_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z19fluidSimulationStepPfS_iii, .Lfunc_end0-_Z19fluidSimulationStepPfS_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 708
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z10updateGridPfS_iii   ; -- Begin function _Z10updateGridPfS_iii
	.globl	_Z10updateGridPfS_iii
	.p2align	8
	.type	_Z10updateGridPfS_iii,@function
_Z10updateGridPfS_iii:                  ; @_Z10updateGridPfS_iii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x2c
	s_load_b128 s[8:11], s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s4, v[3:4]
	s_and_b32 s2, s3, 0xffff
	s_add_i32 s3, s9, -1
	v_mad_u64_u32 v[2:3], null, s15, s2, v[4:5]
	s_add_i32 s2, s8, -1
	s_add_i32 s4, s10, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_min_i32_e32 v3, v1, v0
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	v_cmp_gt_i32_e64 s2, s3, v1
	v_cmp_gt_i32_e64 s3, s4, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_lt_i32_e64 s4, 0, v3
	v_cmp_lt_i32_e64 s5, 0, v2
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 s3, s4, vcc_lo
	s_and_b32 s2, s2, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_mad_u64_u32 v[3:4], null, v2, s9, v[1:2]
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v3, s8, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_atomic_swap_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10updateGridPfS_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10updateGridPfS_iii, .Lfunc_end1-_Z10updateGridPfS_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 296
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	c_dt                    ; @c_dt
	.type	c_dt,@object
	.section	.bss,"aw",@nobits
	.globl	c_dt
	.p2align	2, 0x0
c_dt:
	.long	0x00000000                      ; float 0
	.size	c_dt, 4

	.protected	c_dx                    ; @c_dx
	.type	c_dx,@object
	.globl	c_dx
	.p2align	2, 0x0
c_dx:
	.long	0x00000000                      ; float 0
	.size	c_dx, 4

	.protected	c_dy                    ; @c_dy
	.type	c_dy,@object
	.globl	c_dy
	.p2align	2, 0x0
c_dy:
	.long	0x00000000                      ; float 0
	.size	c_dy, 4

	.protected	c_dz                    ; @c_dz
	.type	c_dz,@object
	.globl	c_dz
	.p2align	2, 0x0
c_dz:
	.long	0x00000000                      ; float 0
	.size	c_dz, 4

	.protected	c_alpha                 ; @c_alpha
	.type	c_alpha,@object
	.globl	c_alpha
	.p2align	2, 0x0
c_alpha:
	.long	0x00000000                      ; float 0
	.size	c_alpha, 4

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym c_dt
	.addrsig_sym c_dx
	.addrsig_sym c_dy
	.addrsig_sym c_dz
	.addrsig_sym c_alpha
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19fluidSimulationStepPfS_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19fluidSimulationStepPfS_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10updateGridPfS_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10updateGridPfS_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
