#include <iostream>
#include <cuda_runtime.h>
#include <cuda_fp16.h>

#define BLOCK_SIZE 16
#define FILTER_SIZE 3
#define CHANNELS 3
#define BATCH_SIZE 64
#define WIDTH 32
#define HEIGHT 32
#define OUT_CHANNELS 16

__global__ void convBackwardKernel(
    const float* d_output, float* d_input, const float* d_kernel, 
    int in_channels, int out_channels, int width, int height, int filter_size) 
{
    __shared__ float shared_input[BLOCK_SIZE + FILTER_SIZE - 1][BLOCK_SIZE + FILTER_SIZE - 1];
    __shared__ float shared_kernel[FILTER_SIZE][FILTER_SIZE];

    int bx = blockIdx.x;
    int by = blockIdx.y;
    int tx = threadIdx.x;
    int ty = threadIdx.y;

    int in_width = width + filter_size - 1;
    int in_height = height + filter_size - 1;

    int input_idx = (by * blockDim.y + ty) * in_width + (bx * blockDim.x + tx);
    int kernel_idx = (ty * filter_size + tx);

    // Load input and kernel into shared memory
    if (input_idx < in_height * in_width) {
        for (int c = 0; c < in_channels; ++c) {
            int global_input_idx = c * in_height * in_width + input_idx;
            shared_input[ty][tx] = d_input[global_input_idx];
        }
    }

    if (kernel_idx < filter_size * filter_size) {
        for (int oc = 0; oc < out_channels; ++oc) {
            int global_kernel_idx = oc * in_channels * filter_size * filter_size + kernel_idx;
            shared_kernel[ty][tx] = d_kernel[global_kernel_idx];
        }
    }

    __syncthreads();

    // Calculate gradient for input
    float d_input_value = 0.0f;
    int out_x = bx * blockDim.x + tx - filter_size + 1;
    int out_y = by * blockDim.y + ty - filter_size + 1;

    if (out_x >= 0 && out_x < width && out_y >= 0 && out_y < height) {
        int output_idx = (out_y * width + out_x) * out_channels;
        for (int oc = 0; oc < out_channels; ++oc) {
            float d_output_value = d_output[output_idx + oc];
            for (int c = 0; c < in_channels; ++c) {
                for (int ky = 0; ky < filter_size; ++ky) {
                    for (int kx = 0; kx < filter_size; ++kx) {
                        d_input_value += d_output_value * shared_kernel[ky][kx];
                    }
                }
            }
        }
    }

    // Store the result
    if (input_idx < in_height * in_width) {
        for (int c = 0; c < in_channels; ++c) {
            int global_input_idx = c * in_height * in_width + input_idx;
            atomicAdd(&d_input[global_input_idx], d_input_value);
        }
    }
}

int main() {
    // Allocate and initialize host memory
    int input_size = BATCH_SIZE * CHANNELS * HEIGHT * WIDTH;
    int output_size = BATCH_SIZE * OUT_CHANNELS * (HEIGHT - FILTER_SIZE + 1) * (WIDTH - FILTER_SIZE + 1);
    int kernel_size = OUT_CHANNELS * CHANNELS * FILTER_SIZE * FILTER_SIZE;

    float* h_d_input = new float[input_size];
    float* h_d_output = new float[output_size];
    float* h_d_kernel = new float[kernel_size];

    // Initialize with some values
    for (int i = 0; i < input_size; ++i) h_d_input[i] = 1.0f;
    for (int i = 0; i < output_size; ++i) h_d_output[i] = 1.0f;
    for (int i = 0; i < kernel_size; ++i) h_d_kernel[i] = 1.0f;

    // Allocate device memory
    float* d_d_input, *d_d_output, *d_d_kernel;
    cudaMalloc(&d_d_input, input_size * sizeof(float));
    cudaMalloc(&d_d_output, output_size * sizeof(float));
    cudaMalloc(&d_d_kernel, kernel_size * sizeof(float));

    // Copy data from host to device
    cudaMemcpy(d_d_input, h_d_input, input_size * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_d_output, h_d_output, output_size * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_d_kernel, h_d_kernel, kernel_size * sizeof(float), cudaMemcpyHostToDevice);

    // Set up execution configuration
    dim3 blockSize(BLOCK_SIZE, BLOCK_SIZE);
    dim3 gridSize((WIDTH + BLOCK_SIZE - 1) / BLOCK_SIZE, (HEIGHT + BLOCK_SIZE - 1) / BLOCK_SIZE);

    // Launch kernel
    convBackwardKernel<<<gridSize, blockSize>>>(d_d_output, d_d_input, d_d_kernel, CHANNELS, OUT_CHANNELS, WIDTH, HEIGHT, FILTER_SIZE);

    // Check for errors in kernel launch
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy result back to host
    cudaMemcpy(h_d_input, d_d_input, input_size * sizeof(float), cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_d_input);
    cudaFree(d_d_output);
    cudaFree(d_d_kernel);

    // Free host memory
    delete[] h_d_input;
    delete[] h_d_output;
    delete[] h_d_kernel;

    std::cout << "Convolution backpropagation completed successfully." << std::endl;
    return 0;
}
	.file	"tmpxft_000b4938_00000000-6_cuda_code_031461.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4012:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4012:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z49__device_stub__Z18convBackwardKernelPKfPfS0_iiiiiPKfPfS0_iiiii
	.type	_Z49__device_stub__Z18convBackwardKernelPKfPfS0_iiiiiPKfPfS0_iiiii, @function
_Z49__device_stub__Z18convBackwardKernelPKfPfS0_iiiiiPKfPfS0_iiiii:
.LFB4034:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z18convBackwardKernelPKfPfS0_iiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4034:
	.size	_Z49__device_stub__Z18convBackwardKernelPKfPfS0_iiiiiPKfPfS0_iiiii, .-_Z49__device_stub__Z18convBackwardKernelPKfPfS0_iiiiiPKfPfS0_iiiii
	.globl	_Z18convBackwardKernelPKfPfS0_iiiii
	.type	_Z18convBackwardKernelPKfPfS0_iiiii, @function
_Z18convBackwardKernelPKfPfS0_iiiii:
.LFB4035:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z18convBackwardKernelPKfPfS0_iiiiiPKfPfS0_iiiii
	.cfi_endproc
.LFE4035:
	.size	_Z18convBackwardKernelPKfPfS0_iiiii, .-_Z18convBackwardKernelPKfPfS0_iiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"CUDA error: "
.LC2:
	.string	"Convolution backpropagation completed successfully."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4009:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$786432, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$3686400, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movl	$1728, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movss	.LC0(%rip), %xmm0
	movq	%rax, %rbp
	xorl	%eax, %eax
.L9:
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$196608, %rax
	jne	.L9
	xorl	%eax, %eax
.L10:
	movss	%xmm0, (%r12,%rax,4)
	incq	%rax
	cmpq	$921600, %rax
	jne	.L10
	xorl	%eax, %eax
.L11:
	movss	%xmm0, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$432, %rax
	jne	.L11
	leaq	8(%rsp), %rdi
	movl	$786432, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$3686400, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$1728, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$786432, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$3686400, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$1728, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movabsq	$8589934594, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	$3
	.cfi_def_cfa_offset 120
	movl	$32, %r9d
	movl	$16, %r8d
	movl	$3, %ecx
	pushq	$32
	.cfi_def_cfa_offset 128
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z49__device_stub__Z18convBackwardKernelPKfPfS0_iiiiiPKfPfS0_iiiii
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L12:
	call	cudaGetLastError@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	je	.L13
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r13d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L8
.L13:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$786432, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	xorl	%eax, %eax
.L8:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4009:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z18convBackwardKernelPKfPfS0_iiiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4037:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18convBackwardKernelPKfPfS0_iiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4037:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_fp16.h>

#define BLOCK_SIZE 16
#define FILTER_SIZE 3
#define CHANNELS 3
#define BATCH_SIZE 64
#define WIDTH 32
#define HEIGHT 32
#define OUT_CHANNELS 16

__global__ void convBackwardKernel(
    const float* d_output, float* d_input, const float* d_kernel, 
    int in_channels, int out_channels, int width, int height, int filter_size) 
{
    __shared__ float shared_input[BLOCK_SIZE + FILTER_SIZE - 1][BLOCK_SIZE + FILTER_SIZE - 1];
    __shared__ float shared_kernel[FILTER_SIZE][FILTER_SIZE];

    int bx = blockIdx.x;
    int by = blockIdx.y;
    int tx = threadIdx.x;
    int ty = threadIdx.y;

    int in_width = width + filter_size - 1;
    int in_height = height + filter_size - 1;

    int input_idx = (by * blockDim.y + ty) * in_width + (bx * blockDim.x + tx);
    int kernel_idx = (ty * filter_size + tx);

    // Load input and kernel into shared memory
    if (input_idx < in_height * in_width) {
        for (int c = 0; c < in_channels; ++c) {
            int global_input_idx = c * in_height * in_width + input_idx;
            shared_input[ty][tx] = d_input[global_input_idx];
        }
    }

    if (kernel_idx < filter_size * filter_size) {
        for (int oc = 0; oc < out_channels; ++oc) {
            int global_kernel_idx = oc * in_channels * filter_size * filter_size + kernel_idx;
            shared_kernel[ty][tx] = d_kernel[global_kernel_idx];
        }
    }

    __syncthreads();

    // Calculate gradient for input
    float d_input_value = 0.0f;
    int out_x = bx * blockDim.x + tx - filter_size + 1;
    int out_y = by * blockDim.y + ty - filter_size + 1;

    if (out_x >= 0 && out_x < width && out_y >= 0 && out_y < height) {
        int output_idx = (out_y * width + out_x) * out_channels;
        for (int oc = 0; oc < out_channels; ++oc) {
            float d_output_value = d_output[output_idx + oc];
            for (int c = 0; c < in_channels; ++c) {
                for (int ky = 0; ky < filter_size; ++ky) {
                    for (int kx = 0; kx < filter_size; ++kx) {
                        d_input_value += d_output_value * shared_kernel[ky][kx];
                    }
                }
            }
        }
    }

    // Store the result
    if (input_idx < in_height * in_width) {
        for (int c = 0; c < in_channels; ++c) {
            int global_input_idx = c * in_height * in_width + input_idx;
            atomicAdd(&d_input[global_input_idx], d_input_value);
        }
    }
}

int main() {
    // Allocate and initialize host memory
    int input_size = BATCH_SIZE * CHANNELS * HEIGHT * WIDTH;
    int output_size = BATCH_SIZE * OUT_CHANNELS * (HEIGHT - FILTER_SIZE + 1) * (WIDTH - FILTER_SIZE + 1);
    int kernel_size = OUT_CHANNELS * CHANNELS * FILTER_SIZE * FILTER_SIZE;

    float* h_d_input = new float[input_size];
    float* h_d_output = new float[output_size];
    float* h_d_kernel = new float[kernel_size];

    // Initialize with some values
    for (int i = 0; i < input_size; ++i) h_d_input[i] = 1.0f;
    for (int i = 0; i < output_size; ++i) h_d_output[i] = 1.0f;
    for (int i = 0; i < kernel_size; ++i) h_d_kernel[i] = 1.0f;

    // Allocate device memory
    float* d_d_input, *d_d_output, *d_d_kernel;
    hipMalloc(&d_d_input, input_size * sizeof(float));
    hipMalloc(&d_d_output, output_size * sizeof(float));
    hipMalloc(&d_d_kernel, kernel_size * sizeof(float));

    // Copy data from host to device
    hipMemcpy(d_d_input, h_d_input, input_size * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_d_output, h_d_output, output_size * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_d_kernel, h_d_kernel, kernel_size * sizeof(float), hipMemcpyHostToDevice);

    // Set up execution configuration
    dim3 blockSize(BLOCK_SIZE, BLOCK_SIZE);
    dim3 gridSize((WIDTH + BLOCK_SIZE - 1) / BLOCK_SIZE, (HEIGHT + BLOCK_SIZE - 1) / BLOCK_SIZE);

    // Launch kernel
    convBackwardKernel<<<gridSize, blockSize>>>(d_d_output, d_d_input, d_d_kernel, CHANNELS, OUT_CHANNELS, WIDTH, HEIGHT, FILTER_SIZE);

    // Check for errors in kernel launch
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy result back to host
    hipMemcpy(h_d_input, d_d_input, input_size * sizeof(float), hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_d_input);
    hipFree(d_d_output);
    hipFree(d_d_kernel);

    // Free host memory
    delete[] h_d_input;
    delete[] h_d_output;
    delete[] h_d_kernel;

    std::cout << "Convolution backpropagation completed successfully." << std::endl;
    return 0;
}
	.text
	.file	"cuda_code_031461.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__convBackwardKernelPKfPfS0_iiiii # -- Begin function _Z33__device_stub__convBackwardKernelPKfPfS0_iiiii
	.type	_Z33__device_stub__convBackwardKernelPKfPfS0_iiiii,@function
_Z33__device_stub__convBackwardKernelPKfPfS0_iiiii: # @_Z33__device_stub__convBackwardKernelPKfPfS0_iiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18convBackwardKernelPKfPfS0_iiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__convBackwardKernelPKfPfS0_iiiii, .Lfunc_end0-_Z33__device_stub__convBackwardKernelPKfPfS0_iiiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$786432, %edi                   # imm = 0xC0000
	callq	_Znam
	movq	%rax, %rbx
	movl	$3686400, %edi                  # imm = 0x384000
	callq	_Znam
	movq	%rax, %r14
	movl	$1728, %edi                     # imm = 0x6C0
	callq	_Znam
	movq	%rax, %r15
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rbx,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$196608, %rax                   # imm = 0x30000
	jne	.LBB1_1
# %bb.2:                                # %.preheader47.preheader
	xorl	%eax, %eax
.LBB1_3:                                # %.preheader47
                                        # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%r14,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$921600, %rax                   # imm = 0xE1000
	jne	.LBB1_3
# %bb.4:                                # %.preheader.preheader
	xorl	%eax, %eax
.LBB1_5:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%r15,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$432, %rax                      # imm = 0x1B0
	jne	.LBB1_5
# %bb.6:
	movq	%rsp, %r12
	movl	$786432, %esi                   # imm = 0xC0000
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r13
	movl	$3686400, %esi                  # imm = 0x384000
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rbp
	movl	$1728, %esi                     # imm = 0x6C0
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$786432, %edx                   # imm = 0xC0000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$3686400, %edx                  # imm = 0x384000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$1728, %edx                     # imm = 0x6C0
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$8589934594, %rdi               # imm = 0x200000002
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.7:
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$3, %ecx
	movl	$16, %r8d
	movl	$32, %r9d
	pushq	$3
	.cfi_adjust_cfa_offset 8
	pushq	$32
	.cfi_adjust_cfa_offset 8
	callq	_Z33__device_stub__convBackwardKernelPKfPfS0_iiiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB1_8:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_11
# %bb.9:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_12
# %bb.10:
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%r14, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_13
.LBB1_11:
	movq	(%rsp), %rsi
	movl	$786432, %edx                   # imm = 0xC0000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$51, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%ebp, %ebp
	jmp	.LBB1_14
.LBB1_12:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_13:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movl	$-1, %ebp
.LBB1_14:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	%ebp, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18convBackwardKernelPKfPfS0_iiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18convBackwardKernelPKfPfS0_iiiii,@object # @_Z18convBackwardKernelPKfPfS0_iiiii
	.section	.rodata,"a",@progbits
	.globl	_Z18convBackwardKernelPKfPfS0_iiiii
	.p2align	3, 0x0
_Z18convBackwardKernelPKfPfS0_iiiii:
	.quad	_Z33__device_stub__convBackwardKernelPKfPfS0_iiiii
	.size	_Z18convBackwardKernelPKfPfS0_iiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Convolution backpropagation completed successfully."
	.size	.L.str.1, 52

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18convBackwardKernelPKfPfS0_iiiii"
	.size	.L__unnamed_1, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__convBackwardKernelPKfPfS0_iiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18convBackwardKernelPKfPfS0_iiiii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18convBackwardKernelPKfPfS0_iiiii ; -- Begin function _Z18convBackwardKernelPKfPfS0_iiiii
	.globl	_Z18convBackwardKernelPKfPfS0_iiiii
	.p2align	8
	.type	_Z18convBackwardKernelPKfPfS0_iiiii,@function
_Z18convBackwardKernelPKfPfS0_iiiii:    ; @_Z18convBackwardKernelPKfPfS0_iiiii
; %bb.0:                                ; %.loopexit116
	s_clause 0x4
	s_load_b32 s12, s[0:1], 0x28
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b32 s0, s[0:1], 0x3c
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v3, s12, v[2:3]
	s_mul_i32 s16, s12, s12
	s_cmp_gt_i32 s5, 0
	s_cselect_b32 s13, -1, 0
	v_cmp_gt_i32_e32 vcc_lo, s16, v0
	s_and_b32 s17, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s17
	s_cbranch_execz .LBB0_2
; %bb.1:                                ; %.lr.ph
	s_mul_i32 s16, s16, s4
	s_add_i32 s17, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s16, s17, v[0:1]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v0, v[0:1], off
	v_lshlrev_b32_e32 v1, 2, v2
	v_mad_u32_u24 v1, v3, 12, v1
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v0
.LBB0_2:                                ; %.loopexit114
	s_or_b32 exec_lo, exec_lo, s1
	s_and_b32 s1, s0, 0xffff
	s_lshr_b32 s0, s0, 16
	v_mad_u64_u32 v[0:1], null, s14, s1, v[2:3]
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_mov_b32_e32 v5, 0
	v_subrev_nc_u32_e32 v1, s12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, 1, v1
	v_mad_u64_u32 v[1:2], null, s15, s0, v[3:4]
	v_cmpx_lt_i32_e32 -1, v4
	s_cbranch_execz .LBB0_17
; %bb.3:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v2, s12, v1
	v_cmp_gt_i32_e32 vcc_lo, s6, v4
	v_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s0, s7, v2
	v_cmp_lt_i32_e64 s1, -1, v2
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_16
; %bb.4:
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB0_15
; %bb.5:                                ; %.lr.ph132
	v_mad_u64_u32 v[5:6], null, v2, s6, v[4:5]
	s_cmp_gt_i32 s4, 0
	s_mov_b32 s13, 0
	s_cselect_b32 s1, -1, 0
	s_cmp_gt_i32 s12, 0
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v2, v5, s5
	v_mov_b32_e32 v5, 0
.LBB0_6:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_8 Depth 2
                                        ;       Child Loop BB0_10 Depth 3
                                        ;         Child Loop BB0_11 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_14
; %bb.7:                                ; %.preheader111.preheader
                                        ;   in Loop: Header=BB0_6 Depth=1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, s13, v2
	s_mov_b32 s14, 0
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s8, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
.LBB0_8:                                ; %.preheader111
                                        ;   Parent Loop BB0_6 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_10 Depth 3
                                        ;         Child Loop BB0_11 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_13
; %bb.9:                                ; %.preheader110.preheader
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_mov_b32 s15, 0
	s_mov_b32 s16, 0
.LBB0_10:                               ; %.preheader110
                                        ;   Parent Loop BB0_6 Depth=1
                                        ;     Parent Loop BB0_8 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_11 Depth 4
	s_mov_b32 s17, s15
	s_mov_b32 s18, s12
.LBB0_11:                               ;   Parent Loop BB0_6 Depth=1
                                        ;     Parent Loop BB0_8 Depth=2
                                        ;       Parent Loop BB0_10 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_mov_b32_e32 v4, s17
	s_add_i32 s18, s18, -1
	s_add_i32 s17, s17, 4
	s_cmp_eq_u32 s18, 0
	ds_load_b32 v4, v4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v5, v3, v4
	s_cbranch_scc0 .LBB0_11
; %bb.12:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_10 Depth=3
	s_add_i32 s16, s16, 1
	s_add_i32 s15, s15, 12
	s_cmp_eq_u32 s16, s12
	s_cbranch_scc0 .LBB0_10
.LBB0_13:                               ; %._crit_edge123
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_add_i32 s14, s14, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s14, s4
	s_cbranch_scc0 .LBB0_8
.LBB0_14:                               ; %._crit_edge127
                                        ;   in Loop: Header=BB0_6 Depth=1
	s_add_i32 s13, s13, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s13, s5
	s_cbranch_scc0 .LBB0_6
	s_branch .LBB0_16
.LBB0_15:
	v_mov_b32_e32 v5, 0
.LBB0_16:                               ; %Flow177
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_17:                               ; %.loopexit112
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s0, s12, -1
	s_add_i32 s1, s0, s6
	s_add_i32 s0, s0, s7
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v1, s1, v[0:1]
	s_mul_i32 s0, s0, s1
	s_cmp_gt_i32 s4, 0
	s_mov_b32 s1, 0
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s0, v2
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_21
.LBB0_18:                               ; %.lr.ph135
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_19 Depth 2
	v_mad_u64_u32 v[0:1], null, s0, s1, v[2:3]
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_load_b32 v4, v[0:1], off
.LBB0_19:                               ; %atomicrmw.start
                                        ;   Parent Loop BB0_18 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v4, v5
	global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v3, v4
	v_mov_b32_e32 v4, v3
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_19
; %bb.20:                               ; %atomicrmw.end
                                        ;   in Loop: Header=BB0_18 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s1, s1, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s1, s4
	s_cbranch_scc1 .LBB0_18
.LBB0_21:                               ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18convBackwardKernelPKfPfS0_iiiii
		.amdhsa_group_segment_fixed_size 36
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18convBackwardKernelPKfPfS0_iiiii, .Lfunc_end0-_Z18convBackwardKernelPKfPfS0_iiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 756
; NumSgprs: 21
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 36 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 36
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18convBackwardKernelPKfPfS0_iiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     21
    .sgpr_spill_count: 0
    .symbol:         _Z18convBackwardKernelPKfPfS0_iiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
