#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>

using namespace cooperative_groups;

// Kernel for sparse matrix-matrix multiplication in CSR format
__global__ void csrSpMMKernel(
    const int* rowPtrA, const int* colIndA, const float* valA,
    const int* rowPtrB, const int* colIndB, const float* valB,
    float* valC, int num_rows_A, int num_cols_B, int num_cols_A)
{
    grid_group grid = this_grid();
    int row = blockIdx.x * blockDim.x + threadIdx.x;

    if (row >= num_rows_A) return;

    // Shared memory for storing values of B
    extern __shared__ float sharedB[];

    int row_start_A = rowPtrA[row];
    int row_end_A = rowPtrA[row + 1];

    // Initialize the result row to zero
    float sum = 0.0f;

    // Iterate over non-zero elements of row in A
    for (int jj = row_start_A; jj < row_end_A; ++jj) {
        int colA = colIndA[jj];
        float valA_elem = valA[jj];

        // Load row of B into shared memory
        int row_start_B = rowPtrB[colA];
        int row_end_B = rowPtrB[colA + 1];

        int num_elements = row_end_B - row_start_B;
        int num_threads = blockDim.x;
        int num_blocks = (num_elements + num_threads - 1) / num_threads;

        for (int block = 0; block < num_blocks; ++block) {
            int idx = block * num_threads + threadIdx.x;
            float b_elem = 0.0f;
            if (idx < num_elements) {
                int colB = colIndB[row_start_B + idx];
                b_elem = valB[row_start_B + idx];
                sharedB[threadIdx.x] = b_elem;
            } else {
                sharedB[threadIdx.x] = 0.0f;
            }
            __syncthreads();

            // Perform dot product
            for (int k = 0; k < blockDim.x; ++k) {
                sum += valA_elem * sharedB[k];
            }
            __syncthreads();
        }
    }

    // Write result to C
    int row_start_C = row * num_cols_B;
    for (int col = 0; col < num_cols_B; ++col) {
        valC[row_start_C + col] = sum;
    }
}

int main() {
    // Example matrices in CSR format
    // Matrix A (3x4)
    int rowPtrA[] = {0, 2, 5, 7};
    int colIndA[] = {0, 2, 0, 1, 2, 3, 1, 3};
    float valA[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f};

    // Matrix B (4x2)
    int rowPtrB[] = {0, 1, 2, 4, 5};
    int colIndB[] = {0, 0, 1, 1, 0};
    float valB[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f};

    int num_rows_A = 3;
    int num_cols_A = 4;
    int num_cols_B = 2;

    // Result matrix C (3x2)
    float* valC = new float[num_rows_A * num_cols_B];
    for (int i = 0; i < num_rows_A * num_cols_B; ++i) valC[i] = 0.0f;

    // Device pointers
    int* d_rowPtrA, *d_colIndA;
    float* d_valA;
    int* d_rowPtrB, *d_colIndB;
    float* d_valB;
    float* d_valC;

    // Allocate device memory
    cudaMalloc(&d_rowPtrA, (num_rows_A + 1) * sizeof(int));
    cudaMalloc(&d_colIndA, 7 * sizeof(int));
    cudaMalloc(&d_valA, 8 * sizeof(float));
    cudaMalloc(&d_rowPtrB, (num_cols_A + 1) * sizeof(int));
    cudaMalloc(&d_colIndB, 5 * sizeof(int));
    cudaMalloc(&d_valB, 5 * sizeof(float));
    cudaMalloc(&d_valC, num_rows_A * num_cols_B * sizeof(float));

    // Copy data to device
    cudaMemcpy(d_rowPtrA, rowPtrA, (num_rows_A + 1) * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_colIndA, colIndA, 7 * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_valA, valA, 8 * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_rowPtrB, rowPtrB, (num_cols_A + 1) * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_colIndB, colIndB, 5 * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_valB, valB, 5 * sizeof(float), cudaMemcpyHostToDevice);

    // Kernel launch configuration
    int blockSize = 128;
    int numBlocks = (num_rows_A + blockSize - 1) / blockSize;
    size_t sharedMemSize = blockSize * sizeof(float);

    // Launch kernel
    csrSpMMKernel<<<numBlocks, blockSize, sharedMemSize>>>(
        d_rowPtrA, d_colIndA, d_valA,
        d_rowPtrB, d_colIndB, d_valB,
        d_valC, num_rows_A, num_cols_B, num_cols_A);

    // Check for errors
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Kernel error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy result back to host
    cudaMemcpy(valC, d_valC, num_rows_A * num_cols_B * sizeof(float), cudaMemcpyDeviceToHost);

    // Print result matrix C
    std::cout << "Result matrix C:" << std::endl;
    for (int i = 0; i < num_rows_A; ++i) {
        for (int j = 0; j < num_cols_B; ++j) {
            std::cout << valC[i * num_cols_B + j] << " ";
        }
        std::cout << std::endl;
    }

    // Free device memory
    cudaFree(d_rowPtrA);
    cudaFree(d_colIndA);
    cudaFree(d_valA);
    cudaFree(d_rowPtrB);
    cudaFree(d_colIndB);
    cudaFree(d_valB);
    cudaFree(d_valC);

    // Free host memory
    delete[] valC;

    return 0;
}
	.file	"tmpxft_000ffe19_00000000-6_cuda_code_036180.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6835:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6835:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z54__device_stub__Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_PfiiiPKiS0_PKfS0_S0_S2_Pfiii
	.type	_Z54__device_stub__Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_PfiiiPKiS0_PKfS0_S0_S2_Pfiii, @function
_Z54__device_stub__Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_PfiiiPKiS0_PKfS0_S0_S2_Pfiii:
.LFB6857:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	240(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	264(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	80(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 256
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L2:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6857:
	.size	_Z54__device_stub__Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_PfiiiPKiS0_PKfS0_S0_S2_Pfiii, .-_Z54__device_stub__Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_PfiiiPKiS0_PKfS0_S0_S2_Pfiii
	.globl	_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
	.type	_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii, @function
_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii:
.LFB6858:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_PfiiiPKiS0_PKfS0_S0_S2_Pfiii
	.cfi_endproc
.LFE6858:
	.size	_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii, .-_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Kernel error: "
.LC2:
	.string	"Result matrix C:"
.LC3:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6832:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$1, %ecx
	xorl	%esi, %esi
	movl	$24, %edi
	movabsq	$4611686019492741120, %rdx
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	salq	$32, %rcx
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movabsq	$4294967297, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movabsq	$30064771077, %rbx
	subq	$248, %rsp
	.cfi_def_cfa_offset 288
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	movabsq	$8589934592, %rax
	movq	%rbx, 100(%rsp)
	movabsq	$4665729215040061440, %rbx
	movq	%rcx, 176(%rsp)
	movq	%rcx, 108(%rsp)
	movabsq	$17179869186, %rcx
	movq	%rbx, 216(%rsp)
	movabsq	$4683743613553737728, %rbx
	movq	%rcx, 116(%rsp)
	xorl	%ecx, %ecx
	movq	%rdx, 200(%rsp)
	movq	%rax, 92(%rsp)
	movq	%rax, 168(%rsp)
	movabsq	$12884901890, %rax
	movq	%rax, 184(%rsp)
	decq	%rax
	movq	%rax, 192(%rsp)
	movabsq	$4647714816524288000, %rax
	movq	%rdx, 148(%rsp)
	movq	%rbx, 224(%rsp)
	movq	%rcx, 128(%rsp)
	movl	%esi, 144(%rsp)
	movq	%rax, 208(%rsp)
	movl	$5, 124(%rsp)
	movq	%rbp, 136(%rsp)
	movq	%rax, 156(%rsp)
	movl	$0x40a00000, 164(%rsp)
	call	_Znam@PLT
	movl	$6, %ecx
	movl	$16, %esi
	movq	%rax, %rbx
	xorl	%eax, %eax
	movq	%rbx, %rdi
	rep stosl
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$28, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$32, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$20, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$20, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$20, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$24, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	leaq	92(%rsp), %rsi
	movl	$1, %ecx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	leaq	168(%rsp), %rsi
	movl	$28, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	leaq	200(%rsp), %rsi
	movl	$32, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	leaq	108(%rsp), %rsi
	movl	$1, %ecx
	movl	$20, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	leaq	128(%rsp), %rsi
	movl	$20, %edx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	leaq	148(%rsp), %rsi
	movl	$20, %edx
	call	cudaMemcpy@PLT
	movl	$33554433, %edx
	xorl	%r9d, %r9d
	movq	%rbp, %rdi
	salq	$7, %rdx
	movl	$512, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	$4
	.cfi_def_cfa_offset 296
	pushq	$2
	.cfi_def_cfa_offset 304
	pushq	$3
	.cfi_def_cfa_offset 312
	pushq	80(%rsp)
	.cfi_def_cfa_offset 320
	movq	80(%rsp), %r9
	movq	72(%rsp), %r8
	movq	64(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z54__device_stub__Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_PfiiiPKiS0_PKfS0_S0_S2_Pfiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 288
.L9:
	call	cudaGetLastError@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L10
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L8
.L10:
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	xorl	%ebp, %ebp
	movl	$24, %edx
	leaq	_ZSt4cout(%rip), %r12
	leaq	.LC3(%rip), %r13
	call	cudaMemcpy@PLT
	leaq	.LC2(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L12:
	movq	%r12, %rdi
	cvtss2sd	(%rbx,%rbp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rdi
	cvtss2sd	4(%rbx,%rbp), %xmm0
	addq	$8, %rbp
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpq	$24, %rbp
	jne	.L12
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	xorl	%eax, %eax
.L8:
	movq	232(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$248, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6832:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii"
.LC5:
	.string	"_ZN50_INTERNAL_487039f2_19_cuda_code_036180_cu_951e75dd4cuda3std3__419piecewise_constructE"
.LC6:
	.string	"_ZN50_INTERNAL_487039f2_19_cuda_code_036180_cu_951e75dd4cuda3std6ranges3__45__cpo4swapE"
.LC7:
	.string	"_ZN50_INTERNAL_487039f2_19_cuda_code_036180_cu_951e75dd4cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6860:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6860:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>

using namespace cooperative_groups;

// Kernel for sparse matrix-matrix multiplication in CSR format
__global__ void csrSpMMKernel(
    const int* rowPtrA, const int* colIndA, const float* valA,
    const int* rowPtrB, const int* colIndB, const float* valB,
    float* valC, int num_rows_A, int num_cols_B, int num_cols_A)
{
    grid_group grid = this_grid();
    int row = blockIdx.x * blockDim.x + threadIdx.x;

    if (row >= num_rows_A) return;

    // Shared memory for storing values of B
    extern __shared__ float sharedB[];

    int row_start_A = rowPtrA[row];
    int row_end_A = rowPtrA[row + 1];

    // Initialize the result row to zero
    float sum = 0.0f;

    // Iterate over non-zero elements of row in A
    for (int jj = row_start_A; jj < row_end_A; ++jj) {
        int colA = colIndA[jj];
        float valA_elem = valA[jj];

        // Load row of B into shared memory
        int row_start_B = rowPtrB[colA];
        int row_end_B = rowPtrB[colA + 1];

        int num_elements = row_end_B - row_start_B;
        int num_threads = blockDim.x;
        int num_blocks = (num_elements + num_threads - 1) / num_threads;

        for (int block = 0; block < num_blocks; ++block) {
            int idx = block * num_threads + threadIdx.x;
            float b_elem = 0.0f;
            if (idx < num_elements) {
                int colB = colIndB[row_start_B + idx];
                b_elem = valB[row_start_B + idx];
                sharedB[threadIdx.x] = b_elem;
            } else {
                sharedB[threadIdx.x] = 0.0f;
            }
            __syncthreads();

            // Perform dot product
            for (int k = 0; k < blockDim.x; ++k) {
                sum += valA_elem * sharedB[k];
            }
            __syncthreads();
        }
    }

    // Write result to C
    int row_start_C = row * num_cols_B;
    for (int col = 0; col < num_cols_B; ++col) {
        valC[row_start_C + col] = sum;
    }
}

int main() {
    // Example matrices in CSR format
    // Matrix A (3x4)
    int rowPtrA[] = {0, 2, 5, 7};
    int colIndA[] = {0, 2, 0, 1, 2, 3, 1, 3};
    float valA[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f};

    // Matrix B (4x2)
    int rowPtrB[] = {0, 1, 2, 4, 5};
    int colIndB[] = {0, 0, 1, 1, 0};
    float valB[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f};

    int num_rows_A = 3;
    int num_cols_A = 4;
    int num_cols_B = 2;

    // Result matrix C (3x2)
    float* valC = new float[num_rows_A * num_cols_B];
    for (int i = 0; i < num_rows_A * num_cols_B; ++i) valC[i] = 0.0f;

    // Device pointers
    int* d_rowPtrA, *d_colIndA;
    float* d_valA;
    int* d_rowPtrB, *d_colIndB;
    float* d_valB;
    float* d_valC;

    // Allocate device memory
    hipMalloc(&d_rowPtrA, (num_rows_A + 1) * sizeof(int));
    hipMalloc(&d_colIndA, 7 * sizeof(int));
    hipMalloc(&d_valA, 8 * sizeof(float));
    hipMalloc(&d_rowPtrB, (num_cols_A + 1) * sizeof(int));
    hipMalloc(&d_colIndB, 5 * sizeof(int));
    hipMalloc(&d_valB, 5 * sizeof(float));
    hipMalloc(&d_valC, num_rows_A * num_cols_B * sizeof(float));

    // Copy data to device
    hipMemcpy(d_rowPtrA, rowPtrA, (num_rows_A + 1) * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_colIndA, colIndA, 7 * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_valA, valA, 8 * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_rowPtrB, rowPtrB, (num_cols_A + 1) * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_colIndB, colIndB, 5 * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_valB, valB, 5 * sizeof(float), hipMemcpyHostToDevice);

    // Kernel launch configuration
    int blockSize = 128;
    int numBlocks = (num_rows_A + blockSize - 1) / blockSize;
    size_t sharedMemSize = blockSize * sizeof(float);

    // Launch kernel
    csrSpMMKernel<<<numBlocks, blockSize, sharedMemSize>>>(
        d_rowPtrA, d_colIndA, d_valA,
        d_rowPtrB, d_colIndB, d_valB,
        d_valC, num_rows_A, num_cols_B, num_cols_A);

    // Check for errors
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Kernel error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy result back to host
    hipMemcpy(valC, d_valC, num_rows_A * num_cols_B * sizeof(float), hipMemcpyDeviceToHost);

    // Print result matrix C
    std::cout << "Result matrix C:" << std::endl;
    for (int i = 0; i < num_rows_A; ++i) {
        for (int j = 0; j < num_cols_B; ++j) {
            std::cout << valC[i * num_cols_B + j] << " ";
        }
        std::cout << std::endl;
    }

    // Free device memory
    hipFree(d_rowPtrA);
    hipFree(d_colIndA);
    hipFree(d_valA);
    hipFree(d_rowPtrB);
    hipFree(d_colIndB);
    hipFree(d_valB);
    hipFree(d_valC);

    // Free host memory
    delete[] valC;

    return 0;
}
	.text
	.file	"cuda_code_036180.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z28__device_stub__csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii # -- Begin function _Z28__device_stub__csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
	.type	_Z28__device_stub__csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii,@function
_Z28__device_stub__csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii: # @_Z28__device_stub__csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii, .Lfunc_end0-_Z28__device_stub__csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0                               # 0x0
	.long	2                               # 0x2
	.long	5                               # 0x5
	.long	7                               # 0x7
.LCPI1_1:
	.long	0                               # 0x0
	.long	2                               # 0x2
	.long	0                               # 0x0
	.long	1                               # 0x1
.LCPI1_2:
	.long	2                               # 0x2
	.long	3                               # 0x3
	.long	1                               # 0x1
	.long	3                               # 0x3
.LCPI1_3:
	.long	0x3f800000                      # float 1
	.long	0x40000000                      # float 2
	.long	0x40400000                      # float 3
	.long	0x40800000                      # float 4
.LCPI1_4:
	.long	0x40a00000                      # float 5
	.long	0x40c00000                      # float 6
	.long	0x40e00000                      # float 7
	.long	0x41000000                      # float 8
.LCPI1_5:
	.long	0                               # 0x0
	.long	1                               # 0x1
	.long	2                               # 0x2
	.long	4                               # 0x4
.LCPI1_6:
	.long	0                               # 0x0
	.long	0                               # 0x0
	.long	1                               # 0x1
	.long	1                               # 0x1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$248, %rsp
	.cfi_def_cfa_offset 304
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movaps	.LCPI1_0(%rip), %xmm0           # xmm0 = [0,2,5,7]
	leaq	64(%rsp), %rax
	movaps	%xmm0, (%rax)
	movaps	.LCPI1_1(%rip), %xmm0           # xmm0 = [0,2,0,1]
	leaq	208(%rsp), %rax
	movaps	%xmm0, (%rax)
	movaps	.LCPI1_2(%rip), %xmm0           # xmm0 = [2,3,1,3]
	movaps	%xmm0, 16(%rax)
	movaps	.LCPI1_3(%rip), %xmm0           # xmm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0]
	leaq	176(%rsp), %rax
	movaps	%xmm0, (%rax)
	movaps	.LCPI1_4(%rip), %xmm1           # xmm1 = [5.0E+0,6.0E+0,7.0E+0,8.0E+0]
	movaps	%xmm1, 16(%rax)
	movaps	.LCPI1_5(%rip), %xmm1           # xmm1 = [0,1,2,4]
	leaq	144(%rsp), %rax
	movaps	%xmm1, (%rax)
	movl	$5, 16(%rax)
	movaps	.LCPI1_6(%rip), %xmm1           # xmm1 = [0,0,1,1]
	leaq	112(%rsp), %rax
	movaps	%xmm1, (%rax)
	movl	$0, 16(%rax)
	leaq	80(%rsp), %rax
	movaps	%xmm0, (%rax)
	movl	$1084227584, 16(%rax)           # imm = 0x40A00000
	movl	$24, %edi
	callq	_Znam
	movq	%rax, %rbx
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rax)
	movq	$0, 16(%rax)
	leaq	56(%rsp), %r14
	movl	$16, %esi
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	48(%rsp), %rbp
	movl	$28, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	40(%rsp), %r13
	movl	$32, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %r12
	movl	$20, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %r15
	movl	$20, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$20, %esi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$24, %esi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$16, %edx
	leaq	64(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$28, %edx
	leaq	208(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$32, %edx
	leaq	176(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$20, %edx
	leaq	144(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movl	$20, %edx
	leaq	112(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movl	$20, %edx
	leaq	80(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	127(%rdi), %rdx
	movl	$512, %r8d                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	56(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rcx
	movq	24(%rsp), %r8
	movq	16(%rsp), %r9
	pushq	$4
	.cfi_adjust_cfa_offset 8
	pushq	$2
	.cfi_adjust_cfa_offset 8
	pushq	$3
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB1_2:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_7
# %bb.3:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_4
# %bb.5:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_6
.LBB1_7:
	movq	8(%rsp), %rsi
	movl	$24, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %r14d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%r15d, %r15d
.LBB1_8:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r15,8), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rbx,%r15,8), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r15
	cmpq	$3, %r15
	jne	.LBB1_8
# %bb.9:
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	jmp	.LBB1_10
.LBB1_4:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_6:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB1_10:
	addq	$248, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii,@object # @_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
	.section	.rodata,"a",@progbits
	.globl	_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
	.p2align	3, 0x0
_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii:
	.quad	_Z28__device_stub__csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
	.size	_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Kernel error: "
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Result matrix C:"
	.size	.L.str.1, 17

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" "
	.size	.L.str.2, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii"
	.size	.L__unnamed_1, 41

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii ; -- Begin function _Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
	.globl	_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
	.p2align	8
	.type	_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii,@function
_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii: ; @_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x54
	s_load_b64 s[12:13], s[0:1], 0x38
	s_waitcnt lgkmcnt(0)
	s_and_b32 s14, s2, 0xffff
	s_mov_b32 s2, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s14, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB0_16
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b128 s[0:3], s[0:1], 0x28
	v_mov_b32_e32 v9, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s4, exec_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v2, v3
	s_cbranch_execz .LBB0_13
; %bb.2:                                ; %.lr.ph73
	v_cvt_f32_u32_e32 v4, s14
	s_sub_i32 s5, 0, s14
	v_lshl_add_u32 v10, v0, 2, 0
	s_add_i32 s12, s14, -1
	s_max_u32 s15, s14, 1
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_dual_mov_b32 v9, 0 :: v_dual_mul_f32 v4, 0x4f7ffffe, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v4
	v_mul_lo_u32 v5, s5, v4
	s_mov_b32 s5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v4, v5
	v_dual_mov_b32 v4, v2 :: v_dual_add_nc_u32 v11, v4, v5
.LBB0_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;       Child Loop BB0_8 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	s_mov_b32 s16, exec_lo
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v5, vcc_lo, s10, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v6, v5
	v_add_nc_u32_e32 v6, s12, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v12, 31, v6
	v_add_nc_u32_e32 v6, v6, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v6, v6, v12
	v_mul_hi_u32 v13, v6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v14, v13, s14
	v_sub_nc_u32_e32 v6, v6, v14
	v_add_nc_u32_e32 v14, 1, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v15, s14, v6
	v_cmp_le_u32_e32 vcc_lo, s14, v6
	v_dual_cndmask_b32 v13, v13, v14 :: v_dual_cndmask_b32 v6, v6, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v14, 1, v13
	v_cmp_le_u32_e32 vcc_lo, s14, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v6, v13, v14, vcc_lo
	v_xor_b32_e32 v6, v6, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v12, v6, v12
	v_cmpx_lt_i32_e32 0, v12
	s_cbranch_execz .LBB0_11
; %bb.4:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_add_co_u32 v6, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v8, vcc_lo
	s_mov_b32 s17, 0
	s_mov_b32 s18, 0
	global_load_b32 v8, v[6:7], off
.LBB0_5:                                ; %.lr.ph
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_8 Depth 3
	v_mad_u64_u32 v[6:7], null, s18, s14, v[0:1]
	v_mov_b32_e32 v7, 0
	s_mov_b32 s19, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_lt_i32_e64 v6, v2
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=2
	v_add_nc_u32_e32 v6, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	global_load_b32 v7, v[6:7], off
.LBB0_7:                                ;   in Loop: Header=BB0_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
	s_mov_b32 s19, 0
	s_mov_b32 s20, s15
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_8:                                ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v6, s19
	s_add_i32 s20, s20, -1
	s_add_i32 s19, s19, 4
	s_cmp_eq_u32 s20, 0
	ds_load_b32 v6, v6
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v9, v8, v6
	s_cbranch_scc0 .LBB0_8
; %bb.9:                                ;   in Loop: Header=BB0_5 Depth=2
	s_add_i32 s18, s18, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, s18, v12
	s_barrier
	buffer_gl0_inv
	s_or_b32 s17, vcc_lo, s17
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB0_5
; %bb.10:                               ; %Flow111
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
.LBB0_11:                               ; %Flow112
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v4, 1, v4
	v_cmp_ge_i32_e32 vcc_lo, v4, v3
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_3
; %bb.12:                               ; %Flow113
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_13:                               ; %Flow114
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	s_cmp_lt_i32 s13, 1
	s_cbranch_scc1 .LBB0_16
; %bb.14:                               ; %.lr.ph78.preheader
	v_mul_lo_u32 v0, v1, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
.LBB0_15:                               ; %.lr.ph78
                                        ; =>This Inner Loop Header: Depth=1
	global_store_b32 v[0:1], v9, off
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s13, s13, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s13, 0
	s_cbranch_scc1 .LBB0_15
.LBB0_16:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 21
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii, .Lfunc_end0-_Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 796
; NumSgprs: 23
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 23
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
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        .value_kind:     global_buffer
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        .value_kind:     by_value
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        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 328
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii
    .private_segment_fixed_size: 0
    .sgpr_count:     23
    .sgpr_spill_count: 0
    .symbol:         _Z13csrSpMMKernelPKiS0_PKfS0_S0_S2_Pfiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
