#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>
#include <cuda_fp16.h>

using namespace cooperative_groups;

// Kernel configuration
#define BLOCK_SIZE 256
#define FILTER_SIZE 3
#define INPUT_CHANNELS 3
#define OUTPUT_CHANNELS 64
#define IMAGE_SIZE 28
#define OUTPUT_SIZE (IMAGE_SIZE - FILTER_SIZE + 1)

// Device function to perform matrix multiplication for backpropagation
__device__ void matrixMultiply(float* A, float* B, float* C, int numARows, int numACols, int numBCols) {
    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    float Cvalue = 0.0;

    if (row < numARows && col < numBCols) {
        for (int e = 0; e < numACols; ++e) {
            Cvalue += A[row * numACols + e] * B[e * numBCols + col];
        }
        C[row * numBCols + col] = Cvalue;
    }
}

// Kernel for backpropagation in a convolutional layer
__global__ void convBackpropKernel(float* input, float* gradOutput, float* gradInput, float* gradWeights,
                                   int batchSize, int inputChannels, int outputChannels, int imageSize, int filterSize) {
    extern __shared__ float sharedMem[];

    int bx = blockIdx.x;
    int by = blockIdx.y;
    int tx = threadIdx.x;
    int ty = threadIdx.y;

    int outputRow = by * blockDim.y + ty;
    int outputCol = bx * blockDim.x + tx;

    int inputRow = outputRow;
    int inputCol = outputCol;

    if (outputRow < (imageSize - filterSize + 1) && outputCol < (imageSize - filterSize + 1)) {
        grid_group grid = this_grid();
        for (int c = 0; c < outputChannels; ++c) {
            float gradWeight[INPUT_CHANNELS * FILTER_SIZE * FILTER_SIZE] = {0.0f};
            float gradInputPatch[INPUT_CHANNELS * FILTER_SIZE * FILTER_SIZE] = {0.0f};

            for (int n = 0; n < batchSize; ++n) {
                float gradOutputVal = gradOutput[n * OUTPUT_CHANNELS * OUTPUT_SIZE * OUTPUT_SIZE +
                                                 c * OUTPUT_SIZE * OUTPUT_SIZE +
                                                 outputRow * OUTPUT_SIZE +
                                                 outputCol];

                for (int ic = 0; ic < inputChannels; ++ic) {
                    for (int fr = 0; fr < filterSize; ++fr) {
                        for (int fc = 0; fc < filterSize; ++fc) {
                            int inputR = inputRow + fr;
                            int inputC = inputCol + fc;
                            float inputValue = input[n * inputChannels * imageSize * imageSize +
                                                   ic * imageSize * imageSize +
                                                   inputR * imageSize +
                                                   inputC];

                            gradWeight[ic * FILTER_SIZE * FILTER_SIZE + fr * FILTER_SIZE + fc] += inputValue * gradOutputVal;
                            gradInputPatch[ic * FILTER_SIZE * FILTER_SIZE + fr * FILTER_SIZE + fc] += gradOutputVal;
                        }
                    }
                }

                // Accumulate gradients for weights
                for (int i = 0; i < INPUT_CHANNELS * FILTER_SIZE * FILTER_SIZE; ++i) {
                    atomicAdd(&gradWeights[c * INPUT_CHANNELS * FILTER_SIZE * FILTER_SIZE + i], gradWeight[i]);
                }

                // Accumulate gradients for input
                for (int ic = 0; ic < inputChannels; ++ic) {
                    for (int fr = 0; fr < filterSize; ++fr) {
                        for (int fc = 0; fc < filterSize; ++fc) {
                            int inputR = inputRow + fr;
                            int inputC = inputCol + fc;
                            atomicAdd(&gradInput[n * inputChannels * imageSize * imageSize +
                                                  ic * imageSize * imageSize +
                                                  inputR * imageSize +
                                                  inputC], gradInputPatch[ic * FILTER_SIZE * FILTER_SIZE + fr * FILTER_SIZE + fc]);
                        }
                    }
                }
            }
        }
    }
}

int main() {
    int batchSize = 4;
    int inputChannels = INPUT_CHANNELS;
    int outputChannels = OUTPUT_CHANNELS;
    int imageSize = IMAGE_SIZE;
    int filterSize = FILTER_SIZE;

    size_t inputSize = batchSize * inputChannels * imageSize * imageSize * sizeof(float);
    size_t outputSize = batchSize * outputChannels * OUTPUT_SIZE * OUTPUT_SIZE * sizeof(float);
    size_t gradInputSize = inputSize;
    size_t gradWeightsSize = outputChannels * inputChannels * filterSize * filterSize * sizeof(float);

    float* d_input;
    float* d_gradOutput;
    float* d_gradInput;
    float* d_gradWeights;

    cudaError_t err;

    // Allocate memory on device
    err = cudaMalloc((void**)&d_input, inputSize);
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate memory for d_input: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_gradOutput, outputSize);
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate memory for d_gradOutput: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_gradInput, gradInputSize);
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate memory for d_gradInput: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_gradWeights, gradWeightsSize);
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate memory for d_gradWeights: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Initialize device memory with zeros
    err = cudaMemset(d_input, 0, inputSize);
    if (err != cudaSuccess) {
        std::cerr << "Failed to initialize d_input: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMemset(d_gradOutput, 0, outputSize);
    if (err != cudaSuccess) {
        std::cerr << "Failed to initialize d_gradOutput: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMemset(d_gradInput, 0, gradInputSize);
    if (err != cudaSuccess) {
        std::cerr << "Failed to initialize d_gradInput: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMemset(d_gradWeights, 0, gradWeightsSize);
    if (err != cudaSuccess) {
        std::cerr << "Failed to initialize d_gradWeights: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Define grid and block dimensions
    dim3 blockSize(BLOCK_SIZE, BLOCK_SIZE);
    dim3 gridSize((OUTPUT_SIZE + blockSize.x - 1) / blockSize.x, (OUTPUT_SIZE + blockSize.y - 1) / blockSize.y);

    // Launch kernel
    convBackpropKernel<<<gridSize, blockSize, 0>>>(d_input, d_gradOutput, d_gradInput, d_gradWeights,
                                                  batchSize, inputChannels, outputChannels, imageSize, filterSize);

    // Check for kernel launch errors
    err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Kernel launch failed: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Wait for the GPU to finish all operations
    err = cudaDeviceSynchronize();
    if (err != cudaSuccess) {
        std::cerr << "Failed to synchronize device: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Free device memory
    cudaFree(d_input);
    cudaFree(d_gradOutput);
    cudaFree(d_gradInput);
    cudaFree(d_gradWeights);

    std::cout << "Backpropagation kernel executed successfully." << std::endl;
    return 0;
}
	.file	"tmpxft_000864ec_00000000-6_cuda_code_037747.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6836:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6836:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB7718:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE7718:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z14matrixMultiplyPfS_S_iii
	.type	_Z14matrixMultiplyPfS_S_iii, @function
_Z14matrixMultiplyPfS_S_iii:
.LFB6832:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE6832:
	.size	_Z14matrixMultiplyPfS_S_iii, .-_Z14matrixMultiplyPfS_S_iii
	.globl	_Z49__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiPfS_S_S_iiiii
	.type	_Z49__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiPfS_S_S_iiiii, @function
_Z49__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiPfS_S_S_iiiii:
.LFB6858:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L5
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z18convBackpropKernelPfS_S_S_iiiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L5:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6858:
	.size	_Z49__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiPfS_S_S_iiiii, .-_Z49__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiPfS_S_S_iiiii
	.globl	_Z18convBackpropKernelPfS_S_S_iiiii
	.type	_Z18convBackpropKernelPfS_S_S_iiiii, @function
_Z18convBackpropKernelPfS_S_S_iiiii:
.LFB6859:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiPfS_S_S_iiiii
	.cfi_endproc
.LFE6859:
	.size	_Z18convBackpropKernelPfS_S_S_iiiii, .-_Z18convBackpropKernelPfS_S_S_iiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Failed to allocate memory for d_input: "
.LC1:
	.string	"Failed to allocate memory for d_gradOutput: "
.LC2:
	.string	"Failed to allocate memory for d_gradInput: "
.LC3:
	.string	"Failed to allocate memory for d_gradWeights: "
.LC4:
	.string	"Failed to initialize d_input: "
.LC5:
	.string	"Failed to initialize d_gradOutput: "
.LC6:
	.string	"Failed to initialize d_gradInput: "
.LC7:
	.string	"Failed to initialize d_gradWeights: "
.LC8:
	.string	"Kernel launch failed: "
.LC9:
	.string	"Failed to synchronize device: "
.LC10:
	.string	"Backpropagation kernel executed successfully."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6833:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$37632, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$72, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	leaq	.LC0(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L27
	leaq	8(%rsp), %rdi
	movl	$692224, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L14
	leaq	.LC1(%rip), %rsi
.L27:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	orl	$-1, %eax
	jmp	.L11
.L14:
	movl	$37632, %esi
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC2(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L27
	movl	$6912, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC3(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L27
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	movl	$37632, %edx
	call	cudaMemset@PLT
	leaq	.LC4(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L27
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	movl	$692224, %edx
	call	cudaMemset@PLT
	leaq	.LC5(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L27
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	movl	$37632, %edx
	call	cudaMemset@PLT
	leaq	.LC6(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L27
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	movl	$6912, %edx
	call	cudaMemset@PLT
	leaq	.LC7(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L27
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$1099511628032, %rdx
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	%rax
	.cfi_def_cfa_offset 104
	movl	$3, %r9d
	movl	$4, %r8d
	pushq	$3
	.cfi_def_cfa_offset 112
	pushq	$28
	.cfi_def_cfa_offset 120
	pushq	$64
	.cfi_def_cfa_offset 128
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z49__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiPfS_S_S_iiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 96
.L22:
	call	cudaGetLastError@PLT
	leaq	.LC8(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L27
	call	cudaDeviceSynchronize@PLT
	leaq	.LC9(%rip), %rsi
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L27
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC10(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%eax, %eax
.L11:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6833:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z18convBackpropKernelPfS_S_S_iiiii"
.LC12:
	.string	"_ZN50_INTERNAL_607904e3_19_cuda_code_037747_cu_a35ea9fe4cuda3std3__419piecewise_constructE"
.LC13:
	.string	"_ZN50_INTERNAL_607904e3_19_cuda_code_037747_cu_a35ea9fe4cuda3std6ranges3__45__cpo4swapE"
.LC14:
	.string	"_ZN50_INTERNAL_607904e3_19_cuda_code_037747_cu_a35ea9fe4cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6861:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z18convBackpropKernelPfS_S_S_iiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6861:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>
#include <hip/hip_fp16.h>

using namespace cooperative_groups;

// Kernel configuration
#define BLOCK_SIZE 256
#define FILTER_SIZE 3
#define INPUT_CHANNELS 3
#define OUTPUT_CHANNELS 64
#define IMAGE_SIZE 28
#define OUTPUT_SIZE (IMAGE_SIZE - FILTER_SIZE + 1)

// Device function to perform matrix multiplication for backpropagation
__device__ void matrixMultiply(float* A, float* B, float* C, int numARows, int numACols, int numBCols) {
    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    float Cvalue = 0.0;

    if (row < numARows && col < numBCols) {
        for (int e = 0; e < numACols; ++e) {
            Cvalue += A[row * numACols + e] * B[e * numBCols + col];
        }
        C[row * numBCols + col] = Cvalue;
    }
}

// Kernel for backpropagation in a convolutional layer
__global__ void convBackpropKernel(float* input, float* gradOutput, float* gradInput, float* gradWeights,
                                   int batchSize, int inputChannels, int outputChannels, int imageSize, int filterSize) {
    extern __shared__ float sharedMem[];

    int bx = blockIdx.x;
    int by = blockIdx.y;
    int tx = threadIdx.x;
    int ty = threadIdx.y;

    int outputRow = by * blockDim.y + ty;
    int outputCol = bx * blockDim.x + tx;

    int inputRow = outputRow;
    int inputCol = outputCol;

    if (outputRow < (imageSize - filterSize + 1) && outputCol < (imageSize - filterSize + 1)) {
        grid_group grid = this_grid();
        for (int c = 0; c < outputChannels; ++c) {
            float gradWeight[INPUT_CHANNELS * FILTER_SIZE * FILTER_SIZE] = {0.0f};
            float gradInputPatch[INPUT_CHANNELS * FILTER_SIZE * FILTER_SIZE] = {0.0f};

            for (int n = 0; n < batchSize; ++n) {
                float gradOutputVal = gradOutput[n * OUTPUT_CHANNELS * OUTPUT_SIZE * OUTPUT_SIZE +
                                                 c * OUTPUT_SIZE * OUTPUT_SIZE +
                                                 outputRow * OUTPUT_SIZE +
                                                 outputCol];

                for (int ic = 0; ic < inputChannels; ++ic) {
                    for (int fr = 0; fr < filterSize; ++fr) {
                        for (int fc = 0; fc < filterSize; ++fc) {
                            int inputR = inputRow + fr;
                            int inputC = inputCol + fc;
                            float inputValue = input[n * inputChannels * imageSize * imageSize +
                                                   ic * imageSize * imageSize +
                                                   inputR * imageSize +
                                                   inputC];

                            gradWeight[ic * FILTER_SIZE * FILTER_SIZE + fr * FILTER_SIZE + fc] += inputValue * gradOutputVal;
                            gradInputPatch[ic * FILTER_SIZE * FILTER_SIZE + fr * FILTER_SIZE + fc] += gradOutputVal;
                        }
                    }
                }

                // Accumulate gradients for weights
                for (int i = 0; i < INPUT_CHANNELS * FILTER_SIZE * FILTER_SIZE; ++i) {
                    atomicAdd(&gradWeights[c * INPUT_CHANNELS * FILTER_SIZE * FILTER_SIZE + i], gradWeight[i]);
                }

                // Accumulate gradients for input
                for (int ic = 0; ic < inputChannels; ++ic) {
                    for (int fr = 0; fr < filterSize; ++fr) {
                        for (int fc = 0; fc < filterSize; ++fc) {
                            int inputR = inputRow + fr;
                            int inputC = inputCol + fc;
                            atomicAdd(&gradInput[n * inputChannels * imageSize * imageSize +
                                                  ic * imageSize * imageSize +
                                                  inputR * imageSize +
                                                  inputC], gradInputPatch[ic * FILTER_SIZE * FILTER_SIZE + fr * FILTER_SIZE + fc]);
                        }
                    }
                }
            }
        }
    }
}

int main() {
    int batchSize = 4;
    int inputChannels = INPUT_CHANNELS;
    int outputChannels = OUTPUT_CHANNELS;
    int imageSize = IMAGE_SIZE;
    int filterSize = FILTER_SIZE;

    size_t inputSize = batchSize * inputChannels * imageSize * imageSize * sizeof(float);
    size_t outputSize = batchSize * outputChannels * OUTPUT_SIZE * OUTPUT_SIZE * sizeof(float);
    size_t gradInputSize = inputSize;
    size_t gradWeightsSize = outputChannels * inputChannels * filterSize * filterSize * sizeof(float);

    float* d_input;
    float* d_gradOutput;
    float* d_gradInput;
    float* d_gradWeights;

    hipError_t err;

    // Allocate memory on device
    err = hipMalloc((void**)&d_input, inputSize);
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate memory for d_input: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_gradOutput, outputSize);
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate memory for d_gradOutput: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_gradInput, gradInputSize);
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate memory for d_gradInput: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_gradWeights, gradWeightsSize);
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate memory for d_gradWeights: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Initialize device memory with zeros
    err = hipMemset(d_input, 0, inputSize);
    if (err != hipSuccess) {
        std::cerr << "Failed to initialize d_input: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMemset(d_gradOutput, 0, outputSize);
    if (err != hipSuccess) {
        std::cerr << "Failed to initialize d_gradOutput: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMemset(d_gradInput, 0, gradInputSize);
    if (err != hipSuccess) {
        std::cerr << "Failed to initialize d_gradInput: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMemset(d_gradWeights, 0, gradWeightsSize);
    if (err != hipSuccess) {
        std::cerr << "Failed to initialize d_gradWeights: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Define grid and block dimensions
    dim3 blockSize(BLOCK_SIZE, BLOCK_SIZE);
    dim3 gridSize((OUTPUT_SIZE + blockSize.x - 1) / blockSize.x, (OUTPUT_SIZE + blockSize.y - 1) / blockSize.y);

    // Launch kernel
    convBackpropKernel<<<gridSize, blockSize, 0>>>(d_input, d_gradOutput, d_gradInput, d_gradWeights,
                                                  batchSize, inputChannels, outputChannels, imageSize, filterSize);

    // Check for kernel launch errors
    err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Kernel launch failed: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Wait for the GPU to finish all operations
    err = hipDeviceSynchronize();
    if (err != hipSuccess) {
        std::cerr << "Failed to synchronize device: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Free device memory
    hipFree(d_input);
    hipFree(d_gradOutput);
    hipFree(d_gradInput);
    hipFree(d_gradWeights);

    std::cout << "Backpropagation kernel executed successfully." << std::endl;
    return 0;
}
	.text
	.file	"cuda_code_037747.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiii # -- Begin function _Z33__device_stub__convBackpropKernelPfS_S_S_iiiii
	.type	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiii,@function
_Z33__device_stub__convBackpropKernelPfS_S_S_iiiii: # @_Z33__device_stub__convBackpropKernelPfS_S_S_iiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18convBackpropKernelPfS_S_S_iiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiii, .Lfunc_end0-_Z33__device_stub__convBackpropKernelPfS_S_S_iiiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	leaq	24(%rsp), %rdi
	movl	$37632, %esi                    # imm = 0x9300
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_2
# %bb.1:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$39, %edx
	jmp	.LBB1_8
.LBB1_2:
	leaq	16(%rsp), %rdi
	movl	$692224, %esi                   # imm = 0xA9000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_4
# %bb.3:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	movl	$44, %edx
	jmp	.LBB1_8
.LBB1_4:
	leaq	8(%rsp), %rdi
	movl	$37632, %esi                    # imm = 0x9300
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_6
# %bb.5:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	movl	$43, %edx
	jmp	.LBB1_8
.LBB1_6:
	movq	%rsp, %rdi
	movl	$6912, %esi                     # imm = 0x1B00
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_14
# %bb.7:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$45, %edx
.LBB1_8:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_10
# %bb.9:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_11
.LBB1_10:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_11:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_12:
	movl	$-1, %eax
.LBB1_13:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB1_14:
	.cfi_def_cfa_offset 48
	movq	24(%rsp), %rdi
	movl	$37632, %edx                    # imm = 0x9300
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	je	.LBB1_17
# %bb.15:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.4, %esi
.LBB1_16:
	movl	$30, %edx
	jmp	.LBB1_27
.LBB1_17:
	movq	16(%rsp), %rdi
	movl	$692224, %edx                   # imm = 0xA9000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	je	.LBB1_19
# %bb.18:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	movl	$35, %edx
	jmp	.LBB1_27
.LBB1_19:
	movq	8(%rsp), %rdi
	movl	$37632, %edx                    # imm = 0x9300
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	je	.LBB1_21
# %bb.20:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.6, %esi
	movl	$34, %edx
	jmp	.LBB1_27
.LBB1_21:
	movq	(%rsp), %rdi
	movl	$6912, %edx                     # imm = 0x1B00
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	je	.LBB1_23
# %bb.22:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.7, %esi
	movl	$36, %edx
	jmp	.LBB1_27
.LBB1_23:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$1099511628032, %rdx            # imm = 0x10000000100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_25
# %bb.24:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	(%rsp), %rcx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$4, %r8d
	movl	$3, %r9d
	pushq	$3
	.cfi_adjust_cfa_offset 8
	pushq	$28
	.cfi_adjust_cfa_offset 8
	pushq	$64
	.cfi_adjust_cfa_offset 8
	callq	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB1_25:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_28
# %bb.26:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.8, %esi
	movl	$22, %edx
.LBB1_27:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$_ZSt4cerr, %edi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	jmp	.LBB1_12
.LBB1_28:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	je	.LBB1_30
# %bb.29:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.9, %esi
	jmp	.LBB1_16
.LBB1_30:
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	xorl	%eax, %eax
	jmp	.LBB1_13
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18convBackpropKernelPfS_S_S_iiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18convBackpropKernelPfS_S_S_iiiii,@object # @_Z18convBackpropKernelPfS_S_S_iiiii
	.section	.rodata,"a",@progbits
	.globl	_Z18convBackpropKernelPfS_S_S_iiiii
	.p2align	3, 0x0
_Z18convBackpropKernelPfS_S_S_iiiii:
	.quad	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiii
	.size	_Z18convBackpropKernelPfS_S_S_iiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to allocate memory for d_input: "
	.size	.L.str, 40

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Failed to allocate memory for d_gradOutput: "
	.size	.L.str.1, 45

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate memory for d_gradInput: "
	.size	.L.str.2, 44

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate memory for d_gradWeights: "
	.size	.L.str.3, 46

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to initialize d_input: "
	.size	.L.str.4, 31

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to initialize d_gradOutput: "
	.size	.L.str.5, 36

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to initialize d_gradInput: "
	.size	.L.str.6, 35

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to initialize d_gradWeights: "
	.size	.L.str.7, 37

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Kernel launch failed: "
	.size	.L.str.8, 23

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to synchronize device: "
	.size	.L.str.9, 31

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Backpropagation kernel executed successfully."
	.size	.L.str.10, 46

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18convBackpropKernelPfS_S_S_iiiii"
	.size	.L__unnamed_1, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__convBackpropKernelPfS_S_S_iiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18convBackpropKernelPfS_S_S_iiiii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18convBackpropKernelPfS_S_S_iiiii ; -- Begin function _Z18convBackpropKernelPfS_S_S_iiiii
	.globl	_Z18convBackpropKernelPfS_S_S_iiiii
	.p2align	8
	.type	_Z18convBackpropKernelPfS_S_S_iiiii,@function
_Z18convBackpropKernelPfS_S_S_iiiii:    ; @_Z18convBackpropKernelPfS_S_S_iiiii
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x44
	s_load_b128 s[8:11], s[0:1], 0x20
	s_load_b32 s16, s[0:1], 0x30
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_mov_b32 s12, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	s_mul_i32 s14, s14, s2
	s_sub_i32 s2, s11, s16
	v_add_nc_u32_e32 v1, s14, v4
	s_cmp_gt_i32 s10, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmp_ge_i32_e32 vcc_lo, s2, v2
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_32
; %bb.1:                                ; %.lr.ph132
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mul_lo_u32 v5, s11, v0
	s_cmp_gt_i32 s8, 0
	v_mad_u64_u32 v[2:3], null, v0, 26, v[1:2]
	s_cselect_b32 s17, -1, 0
	s_cmp_gt_i32 s9, 0
	v_dual_mov_b32 v11, 0x80 :: v_dual_mov_b32 v12, 16
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v10, v4, v5, s14
	v_mov_b32_e32 v13, 0
	s_cselect_b32 s18, -1, 0
	s_cmp_gt_i32 s16, 0
	s_mul_i32 s19, s11, s11
	s_cselect_b32 s20, -1, 0
	s_mul_i32 s21, s19, s9
	s_mov_b32 s22, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_6 Depth 3
                                        ;         Child Loop BB0_8 Depth 4
                                        ;           Child Loop BB0_9 Depth 5
                                        ;       Child Loop BB0_13 Depth 3
                                        ;         Child Loop BB0_14 Depth 4
                                        ;         Child Loop BB0_17 Depth 4
                                        ;       Child Loop BB0_22 Depth 3
                                        ;         Child Loop BB0_24 Depth 4
                                        ;           Child Loop BB0_25 Depth 5
                                        ;             Child Loop BB0_26 Depth 6
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_dual_mov_b32 v7, s12 :: v_dual_mov_b32 v8, s13
	v_dual_mov_b32 v3, s12 :: v_dual_mov_b32 v6, s15
	v_dual_mov_b32 v9, s14 :: v_dual_mov_b32 v4, s13
	v_mov_b32_e32 v5, s14
	s_and_not1_b32 vcc_lo, exec_lo, s17
	s_clause 0xd
	scratch_store_b96 off, v[7:9], off offset:112
	scratch_store_b128 off, v[3:6], off offset:96
	scratch_store_b128 off, v[3:6], off offset:80
	scratch_store_b128 off, v[3:6], off offset:64
	scratch_store_b128 off, v[3:6], off offset:48
	scratch_store_b128 off, v[3:6], off offset:32
	scratch_store_b128 off, v[3:6], off offset:16
	scratch_store_b96 off, v[7:9], off offset:224
	scratch_store_b128 off, v[3:6], off offset:208
	scratch_store_b128 off, v[3:6], off offset:192
	scratch_store_b128 off, v[3:6], off offset:176
	scratch_store_b128 off, v[3:6], off offset:160
	scratch_store_b128 off, v[3:6], off offset:144
	scratch_store_b128 off, v[3:6], off offset:128
	s_cbranch_vccnz .LBB0_31
; %bb.3:                                ; %.lr.ph129
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mad_u64_u32 v[3:4], null, 0x2a4, s22, v[2:3]
	v_mov_b32_e32 v14, v10
	s_mul_i32 s13, s22, 27
	s_mov_b32 s23, 0
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_6 Depth 3
                                        ;         Child Loop BB0_8 Depth 4
                                        ;           Child Loop BB0_9 Depth 5
                                        ;       Child Loop BB0_13 Depth 3
                                        ;         Child Loop BB0_14 Depth 4
                                        ;         Child Loop BB0_17 Depth 4
                                        ;       Child Loop BB0_22 Depth 3
                                        ;         Child Loop BB0_24 Depth 4
                                        ;           Child Loop BB0_25 Depth 5
                                        ;             Child Loop BB0_26 Depth 6
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB0_12
; %bb.5:                                ; %.preheader111.lr.ph
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[4:5], null, 0xa900, s23, v[3:4]
	v_readfirstlane_b32 s14, v11
	v_readfirstlane_b32 s15, v12
	s_mov_b32 s24, 0
	s_mov_b32 s14, s14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	s_mov_b32 s15, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s2, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	v_mov_b32_e32 v5, v14
.LBB0_6:                                ; %.preheader111
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_8 Depth 4
                                        ;           Child Loop BB0_9 Depth 5
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB0_11
; %bb.7:                                ; %.preheader109.lr.ph
                                        ;   in Loop: Header=BB0_6 Depth=3
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v6, v5
	s_mov_b32 s25, 0
	s_mov_b32 s26, s15
	s_mov_b32 s27, s14
.LBB0_8:                                ; %.preheader109
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_6 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_9 Depth 5
	s_mov_b32 s28, s26
	s_mov_b32 s29, s27
	s_mov_b32 s30, 0
.LBB0_9:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_6 Depth=3
                                        ;         Parent Loop BB0_8 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v7, s30, v6
	s_add_i32 s30, s30, 1
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v7, vcc_lo, s0, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	scratch_load_b32 v9, off, s29
	scratch_load_b32 v15, off, s28
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v8, v4, v9
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v15, v4, v7
	scratch_store_b32 off, v8, s29
	s_add_i32 s29, s29, 4
	scratch_store_b32 off, v15, s28
	s_add_i32 s28, s28, 4
	s_cmp_eq_u32 s16, s30
	s_cbranch_scc0 .LBB0_9
; %bb.10:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_8 Depth=4
	v_add_nc_u32_e32 v6, s11, v6
	s_add_i32 s25, s25, 1
	s_add_i32 s27, s27, 12
	s_add_i32 s26, s26, 12
	s_cmp_eq_u32 s25, s16
	s_cbranch_scc0 .LBB0_8
.LBB0_11:                               ; %._crit_edge117
                                        ;   in Loop: Header=BB0_6 Depth=3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v5, s19, v5
	s_add_i32 s24, s24, 1
	s_add_i32 s14, s14, 36
	s_add_i32 s15, s15, 36
	s_cmp_eq_u32 s24, s9
	s_cbranch_scc0 .LBB0_6
.LBB0_12:                               ; %.preheader113.preheader
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_mov_b32 s24, 0
.LBB0_13:                               ; %.preheader113
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_14 Depth 4
                                        ;         Child Loop BB0_17 Depth 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s15, s24, 2
	v_bfrev_b32_e32 v6, 1
	s_add_i32 s15, s15, 16
	s_mov_b32 s14, exec_lo
	scratch_load_b32 v4, off, s15
.LBB0_14:                               ; %ComputeLoop
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_13 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_ctz_i32_b32 s15, s14
	s_waitcnt vmcnt(0)
	v_readlane_b32 s25, v4, s15
	s_lshl_b32 s15, 1, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s14, s14, s15
	s_cmp_lg_u32 s14, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v6, s25, v6
	s_cbranch_scc1 .LBB0_14
; %bb.15:                               ; %ComputeEnd
                                        ;   in Loop: Header=BB0_13 Depth=3
	v_mbcnt_lo_u32_b32 v4, exec_lo, 0
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_xor_b32 s25, exec_lo, s14
	s_cbranch_execz .LBB0_19
; %bb.16:                               ;   in Loop: Header=BB0_13 Depth=3
	s_add_i32 s14, s24, s13
	s_mov_b32 s26, 0
	s_ashr_i32 s15, s14, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[14:15], s[14:15], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s14, s6, s14
	s_addc_u32 s15, s7, s15
	global_load_b32 v5, v13, s[14:15]
.LBB0_17:                               ; %atomicrmw.start
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_13 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v4, v5, v6
	global_atomic_cmpswap_b32 v4, v13, v[4:5], s[14:15] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v4, v5
	v_mov_b32_e32 v5, v4
	s_or_b32 s26, vcc_lo, s26
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s26
	s_cbranch_execnz .LBB0_17
; %bb.18:                               ; %Flow195
                                        ;   in Loop: Header=BB0_13 Depth=3
	s_or_b32 exec_lo, exec_lo, s26
.LBB0_19:                               ; %Flow196
                                        ;   in Loop: Header=BB0_13 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s25
	s_add_i32 s24, s24, 1
	s_cmp_eq_u32 s24, 27
	s_cbranch_scc0 .LBB0_13
; %bb.20:                               ; %.preheader112
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_30
; %bb.21:                               ; %.preheader110.lr.ph
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_mul_i32 s14, s23, s9
	s_mov_b32 s15, 0
.LBB0_22:                               ; %.preheader110
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_24 Depth 4
                                        ;           Child Loop BB0_25 Depth 5
                                        ;             Child Loop BB0_26 Depth 6
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB0_29
; %bb.23:                               ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB0_22 Depth=3
	s_add_i32 s24, s15, s14
	s_mov_b32 s25, 0
	v_mad_u64_u32 v[4:5], null, s24, s11, v[0:1]
	s_mul_i32 s24, s15, 9
.LBB0_24:                               ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_22 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_25 Depth 5
                                        ;             Child Loop BB0_26 Depth 6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v7, s25, v4
	s_mul_i32 s26, s25, 3
	s_mov_b32 s27, 0
	s_add_i32 s26, s26, s24
	v_mad_u64_u32 v[5:6], null, v7, s11, v[1:2]
.LBB0_25:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_22 Depth=3
                                        ;         Parent Loop BB0_24 Depth=4
                                        ; =>        This Loop Header: Depth=5
                                        ;             Child Loop BB0_26 Depth 6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v6, s27, v5
	s_add_i32 s28, s26, s27
	s_lshl_b32 s28, s28, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_addk_i32 s28, 0x80
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	scratch_load_b32 v15, off, s28
	global_load_b32 v9, v[6:7], off
	s_mov_b32 s28, 0
.LBB0_26:                               ; %atomicrmw.start144
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_22 Depth=3
                                        ;         Parent Loop BB0_24 Depth=4
                                        ;           Parent Loop BB0_25 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v8, v9, v15
	global_atomic_cmpswap_b32 v8, v[6:7], v[8:9], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v8, v9
	v_mov_b32_e32 v9, v8
	s_or_b32 s28, vcc_lo, s28
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s28
	s_cbranch_execnz .LBB0_26
; %bb.27:                               ; %atomicrmw.end143
                                        ;   in Loop: Header=BB0_25 Depth=5
	s_or_b32 exec_lo, exec_lo, s28
	s_add_i32 s27, s27, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s27, s16
	s_cbranch_scc0 .LBB0_25
; %bb.28:                               ; %._crit_edge122
                                        ;   in Loop: Header=BB0_24 Depth=4
	s_add_i32 s25, s25, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s25, s16
	s_cbranch_scc0 .LBB0_24
.LBB0_29:                               ; %._crit_edge124
                                        ;   in Loop: Header=BB0_22 Depth=3
	s_add_i32 s15, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, s9
	s_cbranch_scc0 .LBB0_22
.LBB0_30:                               ; %._crit_edge126
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v14, s21, v14
	s_add_i32 s23, s23, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s23, s8
	s_cbranch_scc0 .LBB0_4
.LBB0_31:                               ; %._crit_edge130
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s22, s22, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s22, s10
	s_cbranch_scc0 .LBB0_2
.LBB0_32:                               ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18convBackpropKernelPfS_S_S_iiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 240
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 31
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18convBackpropKernelPfS_S_S_iiiii, .Lfunc_end0-_Z18convBackpropKernelPfS_S_S_iiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1200
; NumSgprs: 33
; NumVgprs: 16
; ScratchSize: 240
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 33
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18convBackpropKernelPfS_S_S_iiiii
    .private_segment_fixed_size: 240
    .sgpr_count:     33
    .sgpr_spill_count: 0
    .symbol:         _Z18convBackpropKernelPfS_S_S_iiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
