#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>

namespace cg = cooperative_groups;

// Kernel parameters
#define NUM_CONV_LAYERS 4
#define FILTER_SIZE 3
#define NUM_CHANNELS 3
#define OUTPUT_CHANNELS 64
#define IMAGE_WIDTH 32
#define IMAGE_HEIGHT 32
#define BATCH_SIZE 32

// Function to check CUDA errors
#define CUDA_CHECK(call) { \
    cudaError_t err = call; \
    if (err != cudaSuccess) { \
        std::cerr << "CUDA error at " << __FILE__ << ":" << __LINE__ << " - " << cudaGetErrorString(err) << std::endl; \
        exit(EXIT_FAILURE); \
    } \
}

// CUDA kernel for backpropagation in a convolutional layer
__global__ void convBackpropKernel(float* d_input, float* d_output, float* d_filters, float* d_grad_output, int num_channels, int output_channels, int image_width, int image_height, int filter_size, int batch_size) {
    int bx = blockIdx.x;
    int by = blockIdx.y;
    int bz = blockIdx.z;
    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int tz = threadIdx.z;

    cg::grid_group grid = cg::this_grid();

    int n = bz;
    int oc = by * blockDim.y + ty;
    int ic = tz;
    int ox = bx * blockDim.x + tx;

    if (oc >= output_channels || ic >= num_channels || ox >= image_width - filter_size + 1) return;

    float grad_input = 0.0f;

    // Compute the gradient for the input
    for (int ky = 0; ky < filter_size; ky++) {
        for (int kx = 0; kx < filter_size; kx++) {
            int ix = ox + kx;
            int iy = by * blockDim.x + tx + ky;
            if (iy < image_height) {
                int filter_idx = (oc * num_channels + ic) * filter_size * filter_size + ky * filter_size + kx;
                int grad_output_idx = (n * output_channels + oc) * (image_width - filter_size + 1) * (image_height - filter_size + 1) + (iy - ky) * (image_width - filter_size + 1) + ox;
                grad_input += d_filters[filter_idx] * d_grad_output[grad_output_idx];
            }
        }
    }

    // Reduce the gradient for the input across threads
    extern __shared__ float s_grad_input[];
    int shared_idx = ty * blockDim.x + tx;
    s_grad_input[shared_idx] = grad_input;
    cg::sync(grid);

    for (int s = blockDim.x * blockDim.y / 2; s > 0; s >>= 1) {
        if (shared_idx < s) {
            s_grad_input[shared_idx] += s_grad_input[shared_idx + s];
        }
        cg::sync(grid);
    }

    if (shared_idx == 0) {
        int input_idx = (n * num_channels + ic) * image_width * image_height + (by * blockDim.x + tx) * image_width + ox;
        atomicAdd(&d_input[input_idx], s_grad_input[0]);
    }
}

int main() {
    // Allocate and initialize device memory
    float* d_input, *d_output, *d_filters, *d_grad_output;
    size_t input_size = BATCH_SIZE * NUM_CHANNELS * IMAGE_WIDTH * IMAGE_HEIGHT * sizeof(float);
    size_t output_size = BATCH_SIZE * OUTPUT_CHANNELS * (IMAGE_WIDTH - FILTER_SIZE + 1) * (IMAGE_HEIGHT - FILTER_SIZE + 1) * sizeof(float);
    size_t filters_size = OUTPUT_CHANNELS * NUM_CHANNELS * FILTER_SIZE * FILTER_SIZE * sizeof(float);
    size_t grad_output_size = output_size;

    CUDA_CHECK(cudaMalloc(&d_input, input_size));
    CUDA_CHECK(cudaMalloc(&d_output, output_size));
    CUDA_CHECK(cudaMalloc(&d_filters, filters_size));
    CUDA_CHECK(cudaMalloc(&d_grad_output, grad_output_size));

    // Initialize device memory with random values
    CUDA_CHECK(cudaMemset(d_input, 0, input_size));
    CUDA_CHECK(cudaMemset(d_output, 0, output_size));
    CUDA_CHECK(cudaMemset(d_filters, 0, filters_size));
    CUDA_CHECK(cudaMemset(d_grad_output, 0, grad_output_size));

    // Define grid and block dimensions
    dim3 blockSize(8, 8, NUM_CHANNELS);
    dim3 gridSize((IMAGE_WIDTH - FILTER_SIZE + 1 + blockSize.x - 1) / blockSize.x, (IMAGE_HEIGHT - FILTER_SIZE + 1 + blockSize.y - 1) / blockSize.y, BATCH_SIZE);

    // Launch kernel for each convolutional layer
    for (int layer = 0; layer < NUM_CONV_LAYERS; layer++) {
        convBackpropKernel<<<gridSize, blockSize, blockSize.x * blockSize.y * sizeof(float)>>>(d_input, d_output, d_filters, d_grad_output, NUM_CHANNELS, OUTPUT_CHANNELS, IMAGE_WIDTH, IMAGE_HEIGHT, FILTER_SIZE, BATCH_SIZE);
        CUDA_CHECK(cudaGetLastError());
        CUDA_CHECK(cudaDeviceSynchronize());
    }

    // Free device memory
    CUDA_CHECK(cudaFree(d_input));
    CUDA_CHECK(cudaFree(d_output));
    CUDA_CHECK(cudaFree(d_filters));
    CUDA_CHECK(cudaFree(d_grad_output));

    std::cout << "Backpropagation completed successfully." << std::endl;
    return 0;
}
	.file	"tmpxft_0015d775_00000000-6_cuda_code_028492.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6835:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6835:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB7718:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE7718:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z50__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiiPfS_S_S_iiiiii
	.type	_Z50__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiiPfS_S_S_iiiiii, @function
_Z50__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiiPfS_S_S_iiiiii:
.LFB6857:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	64(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z18convBackpropKernelPfS_S_S_iiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 240
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L3:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6857:
	.size	_Z50__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiiPfS_S_S_iiiiii, .-_Z50__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiiPfS_S_S_iiiiii
	.globl	_Z18convBackpropKernelPfS_S_S_iiiiii
	.type	_Z18convBackpropKernelPfS_S_S_iiiiii, @function
_Z18convBackpropKernelPfS_S_S_iiiiii:
.LFB6858:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiiPfS_S_S_iiiiii
	.cfi_endproc
.LFE6858:
	.size	_Z18convBackpropKernelPfS_S_S_iiiiii, .-_Z18convBackpropKernelPfS_S_S_iiiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error at "
.LC1:
	.string	"/home/ubuntu/Datasets/cuda-codes-80k-from-llm-dedup/cuda_code_028492.cu"
.LC2:
	.string	":"
.LC3:
	.string	" - "
.LC4:
	.string	"Backpropagation completed successfully."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6832:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$393216, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L10
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	movl	%eax, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$85, %esi
	movq	%rax, %rdi
	jmp	.L29
.L10:
	leaq	8(%rsp), %rdi
	movl	$7372800, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L11
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$86, %esi
	movq	%rax, %rdi
.L29:
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$1, %edi
	call	exit@PLT
.L11:
	leaq	16(%rsp), %rdi
	movl	$6912, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L12
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$87, %esi
	movq	%rax, %rdi
	jmp	.L29
.L12:
	leaq	24(%rsp), %rdi
	movl	$7372800, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L13
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$88, %esi
	movq	%rax, %rdi
	jmp	.L29
.L13:
	movq	(%rsp), %rdi
	movl	$393216, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L14
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$91, %esi
	movq	%rax, %rdi
	jmp	.L29
.L14:
	movq	8(%rsp), %rdi
	movl	$7372800, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L15
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$92, %esi
	movq	%rax, %rdi
	jmp	.L29
.L15:
	movq	16(%rsp), %rdi
	movl	$6912, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L16
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$93, %esi
	movq	%rax, %rdi
	jmp	.L29
.L16:
	movq	24(%rsp), %rdi
	movl	$7372800, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L17
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$94, %esi
	movq	%rax, %rdi
	jmp	.L29
.L17:
	movabsq	$17179869188, %rax
	movl	$3, 40(%rsp)
	movl	$4, %ebp
	movabsq	$34359738376, %r12
	movq	%rax, 44(%rsp)
	movl	$32, 52(%rsp)
.L21:
	movl	40(%rsp), %ecx
	movq	44(%rsp), %rdi
	xorl	%r9d, %r9d
	movq	%r12, %rdx
	movl	52(%rsp), %esi
	movl	$256, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	$32
	.cfi_def_cfa_offset 104
	movl	$64, %r9d
	movl	$3, %r8d
	pushq	$3
	.cfi_def_cfa_offset 112
	pushq	$32
	.cfi_def_cfa_offset 120
	pushq	$32
	.cfi_def_cfa_offset 128
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z50__device_stub__Z18convBackpropKernelPfS_S_S_iiiiiiPfS_S_S_iiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 96
.L18:
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L19
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$103, %esi
	movq	%rax, %rdi
	jmp	.L29
.L19:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L20
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$104, %esi
	movq	%rax, %rdi
	jmp	.L29
.L20:
	decl	%ebp
	jne	.L21
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L22
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$108, %esi
	movq	%rax, %rdi
	jmp	.L29
.L22:
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L23
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$109, %esi
	movq	%rax, %rdi
	jmp	.L29
.L23:
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L24
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$110, %esi
	movq	%rax, %rdi
	jmp	.L29
.L24:
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L25
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$111, %esi
	movq	%rax, %rdi
	jmp	.L29
.L25:
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6832:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z18convBackpropKernelPfS_S_S_iiiiii"
.LC6:
	.string	"_ZN50_INTERNAL_134132b9_19_cuda_code_028492_cu_4d79d58b4cuda3std3__419piecewise_constructE"
.LC7:
	.string	"_ZN50_INTERNAL_134132b9_19_cuda_code_028492_cu_4d79d58b4cuda3std6ranges3__45__cpo4swapE"
.LC8:
	.string	"_ZN50_INTERNAL_134132b9_19_cuda_code_028492_cu_4d79d58b4cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6860:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z18convBackpropKernelPfS_S_S_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6860:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>

namespace cg = cooperative_groups;

// Kernel parameters
#define NUM_CONV_LAYERS 4
#define FILTER_SIZE 3
#define NUM_CHANNELS 3
#define OUTPUT_CHANNELS 64
#define IMAGE_WIDTH 32
#define IMAGE_HEIGHT 32
#define BATCH_SIZE 32

// Function to check CUDA errors
#define CUDA_CHECK(call) { \
    hipError_t err = call; \
    if (err != hipSuccess) { \
        std::cerr << "CUDA error at " << __FILE__ << ":" << __LINE__ << " - " << hipGetErrorString(err) << std::endl; \
        exit(EXIT_FAILURE); \
    } \
}

// CUDA kernel for backpropagation in a convolutional layer
__global__ void convBackpropKernel(float* d_input, float* d_output, float* d_filters, float* d_grad_output, int num_channels, int output_channels, int image_width, int image_height, int filter_size, int batch_size) {
    int bx = blockIdx.x;
    int by = blockIdx.y;
    int bz = blockIdx.z;
    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int tz = threadIdx.z;

    cg::grid_group grid = cg::this_grid();

    int n = bz;
    int oc = by * blockDim.y + ty;
    int ic = tz;
    int ox = bx * blockDim.x + tx;

    if (oc >= output_channels || ic >= num_channels || ox >= image_width - filter_size + 1) return;

    float grad_input = 0.0f;

    // Compute the gradient for the input
    for (int ky = 0; ky < filter_size; ky++) {
        for (int kx = 0; kx < filter_size; kx++) {
            int ix = ox + kx;
            int iy = by * blockDim.x + tx + ky;
            if (iy < image_height) {
                int filter_idx = (oc * num_channels + ic) * filter_size * filter_size + ky * filter_size + kx;
                int grad_output_idx = (n * output_channels + oc) * (image_width - filter_size + 1) * (image_height - filter_size + 1) + (iy - ky) * (image_width - filter_size + 1) + ox;
                grad_input += d_filters[filter_idx] * d_grad_output[grad_output_idx];
            }
        }
    }

    // Reduce the gradient for the input across threads
    extern __shared__ float s_grad_input[];
    int shared_idx = ty * blockDim.x + tx;
    s_grad_input[shared_idx] = grad_input;
    cg::sync(grid);

    for (int s = blockDim.x * blockDim.y / 2; s > 0; s >>= 1) {
        if (shared_idx < s) {
            s_grad_input[shared_idx] += s_grad_input[shared_idx + s];
        }
        cg::sync(grid);
    }

    if (shared_idx == 0) {
        int input_idx = (n * num_channels + ic) * image_width * image_height + (by * blockDim.x + tx) * image_width + ox;
        atomicAdd(&d_input[input_idx], s_grad_input[0]);
    }
}

int main() {
    // Allocate and initialize device memory
    float* d_input, *d_output, *d_filters, *d_grad_output;
    size_t input_size = BATCH_SIZE * NUM_CHANNELS * IMAGE_WIDTH * IMAGE_HEIGHT * sizeof(float);
    size_t output_size = BATCH_SIZE * OUTPUT_CHANNELS * (IMAGE_WIDTH - FILTER_SIZE + 1) * (IMAGE_HEIGHT - FILTER_SIZE + 1) * sizeof(float);
    size_t filters_size = OUTPUT_CHANNELS * NUM_CHANNELS * FILTER_SIZE * FILTER_SIZE * sizeof(float);
    size_t grad_output_size = output_size;

    CUDA_CHECK(hipMalloc(&d_input, input_size));
    CUDA_CHECK(hipMalloc(&d_output, output_size));
    CUDA_CHECK(hipMalloc(&d_filters, filters_size));
    CUDA_CHECK(hipMalloc(&d_grad_output, grad_output_size));

    // Initialize device memory with random values
    CUDA_CHECK(hipMemset(d_input, 0, input_size));
    CUDA_CHECK(hipMemset(d_output, 0, output_size));
    CUDA_CHECK(hipMemset(d_filters, 0, filters_size));
    CUDA_CHECK(hipMemset(d_grad_output, 0, grad_output_size));

    // Define grid and block dimensions
    dim3 blockSize(8, 8, NUM_CHANNELS);
    dim3 gridSize((IMAGE_WIDTH - FILTER_SIZE + 1 + blockSize.x - 1) / blockSize.x, (IMAGE_HEIGHT - FILTER_SIZE + 1 + blockSize.y - 1) / blockSize.y, BATCH_SIZE);

    // Launch kernel for each convolutional layer
    for (int layer = 0; layer < NUM_CONV_LAYERS; layer++) {
        convBackpropKernel<<<gridSize, blockSize, blockSize.x * blockSize.y * sizeof(float)>>>(d_input, d_output, d_filters, d_grad_output, NUM_CHANNELS, OUTPUT_CHANNELS, IMAGE_WIDTH, IMAGE_HEIGHT, FILTER_SIZE, BATCH_SIZE);
        CUDA_CHECK(hipGetLastError());
        CUDA_CHECK(hipDeviceSynchronize());
    }

    // Free device memory
    CUDA_CHECK(hipFree(d_input));
    CUDA_CHECK(hipFree(d_output));
    CUDA_CHECK(hipFree(d_filters));
    CUDA_CHECK(hipFree(d_grad_output));

    std::cout << "Backpropagation completed successfully." << std::endl;
    return 0;
}
	.text
	.file	"cuda_code_028492.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii # -- Begin function _Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii
	.type	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii,@function
_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii: # @_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18convBackpropKernelPfS_S_S_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii, .Lfunc_end0-_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	24(%rsp), %rdi
	movl	$393216, %esi                   # imm = 0x60000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_1
# %bb.4:
	leaq	16(%rsp), %rdi
	movl	$7372800, %esi                  # imm = 0x708000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_5
# %bb.6:
	leaq	8(%rsp), %rdi
	movl	$6912, %esi                     # imm = 0x1B00
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.8:
	movq	%rsp, %rdi
	movl	$7372800, %esi                  # imm = 0x708000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.10:
	movq	24(%rsp), %rdi
	movl	$393216, %edx                   # imm = 0x60000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.12:
	movq	16(%rsp), %rdi
	movl	$7372800, %edx                  # imm = 0x708000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB1_13
# %bb.14:
	movq	8(%rsp), %rdi
	movl	$6912, %edx                     # imm = 0x1B00
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB1_15
# %bb.16:
	movq	(%rsp), %rdi
	movl	$7372800, %edx                  # imm = 0x708000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB1_23
# %bb.17:                               # %.preheader.preheader
	movl	$4, %r15d
	movabsq	$17179869188, %rbx              # imm = 0x400000004
	movl	$32, %r12d
	movabsq	$34359738376, %r14              # imm = 0x800000008
.LBB1_18:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	$256, %r8d                      # imm = 0x100
	movq	%rbx, %rdi
	movl	$32, %esi
	movq	%r14, %rdx
	movl	$3, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_20
# %bb.19:                               #   in Loop: Header=BB1_18 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	(%rsp), %rcx
	movl	$3, %r8d
	movl	$64, %r9d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	$3
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	callq	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB1_20:                               #   in Loop: Header=BB1_18 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.27:                               #   in Loop: Header=BB1_18 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB1_28
# %bb.24:                               #   in Loop: Header=BB1_18 Depth=1
	decl	%r15d
	jne	.LBB1_18
# %bb.25:
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_26
# %bb.29:
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_30
# %bb.31:
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_32
# %bb.33:
	movq	(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_34
# %bb.35:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$39, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_28:
	.cfi_def_cfa_offset 80
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$104, %esi
	jmp	.LBB1_22
.LBB1_21:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$103, %esi
.LBB1_22:
	callq	_ZNSolsEi
	movl	$.L.str.3, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rbx
	movl	%ebp, %edi
	callq	hipGetErrorString
	movq	%rbx, %rdi
.LBB1_3:
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.LBB1_1:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$85, %esi
	jmp	.LBB1_2
.LBB1_5:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$86, %esi
	jmp	.LBB1_2
.LBB1_7:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$87, %esi
	jmp	.LBB1_2
.LBB1_9:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$88, %esi
	jmp	.LBB1_2
.LBB1_11:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$91, %esi
	jmp	.LBB1_2
.LBB1_13:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$92, %esi
	jmp	.LBB1_2
.LBB1_15:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$93, %esi
	jmp	.LBB1_2
.LBB1_23:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$94, %esi
	jmp	.LBB1_2
.LBB1_26:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$108, %esi
	jmp	.LBB1_2
.LBB1_30:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$109, %esi
	jmp	.LBB1_2
.LBB1_32:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$110, %esi
	jmp	.LBB1_2
.LBB1_34:
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$111, %esi
.LBB1_2:
	callq	_ZNSolsEi
	movl	$.L.str.3, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	jmp	.LBB1_3
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18convBackpropKernelPfS_S_S_iiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18convBackpropKernelPfS_S_S_iiiiii,@object # @_Z18convBackpropKernelPfS_S_S_iiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z18convBackpropKernelPfS_S_S_iiiiii
	.p2align	3, 0x0
_Z18convBackpropKernelPfS_S_S_iiiiii:
	.quad	_Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii
	.size	_Z18convBackpropKernelPfS_S_S_iiiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error at "
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/hip-codes-80k-from-llm-dedup-disassemble-sm89/cuda_code_028492.hip"
	.size	.L.str.1, 89

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	":"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" - "
	.size	.L.str.3, 4

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Backpropagation completed successfully."
	.size	.L.str.4, 40

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18convBackpropKernelPfS_S_S_iiiiii"
	.size	.L__unnamed_1, 37

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__convBackpropKernelPfS_S_S_iiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18convBackpropKernelPfS_S_S_iiiiii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18convBackpropKernelPfS_S_S_iiiiii ; -- Begin function _Z18convBackpropKernelPfS_S_S_iiiiii
	.globl	_Z18convBackpropKernelPfS_S_S_iiiiii
	.p2align	8
	.type	_Z18convBackpropKernelPfS_S_S_iiiiii,@function
_Z18convBackpropKernelPfS_S_S_iiiiii:   ; @_Z18convBackpropKernelPfS_S_S_iiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x44
	s_load_b128 s[4:7], s[0:1], 0x20
	v_bfe_u32 v4, v0, 10, 10
	s_add_u32 s16, s0, 56
	s_addc_u32 s17, s1, 0
	v_bfe_u32 v1, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s12, s3, 16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s4, v1
	v_mad_u64_u32 v[7:8], null, s14, s12, v[4:5]
	v_cmp_gt_i32_e32 vcc_lo, s5, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, vcc_lo
	s_and_saveexec_b32 s8, s2
	s_cbranch_execz .LBB0_38
; %bb.1:
	s_load_b32 s18, s[0:1], 0x30
	v_and_b32_e32 v0, 0x3ff, v0
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s13, s3, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s2, s6, s18
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, s2, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_38
; %bb.2:                                ; %.preheader103
	s_cmp_lt_i32 s18, 1
	s_cbranch_scc1 .LBB0_9
; %bb.3:                                ; %.preheader.lr.ph
	v_mad_u64_u32 v[8:9], null, s15, s5, v[7:8]
	s_sub_i32 s5, s7, s18
	v_mad_u64_u32 v[5:6], null, s14, s3, v[0:1]
	s_load_b128 s[8:11], s[0:1], 0x10
	v_mad_u64_u32 v[10:11], null, v7, s4, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v8, s5
	s_mov_b32 s5, 0
	v_add3_u32 v3, v3, v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, v3, s2
	s_mul_i32 s2, s18, s18
	v_add3_u32 v8, v6, v3, v2
	v_mul_lo_u32 v3, s2, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[6:7], 2, v[8:9]
	v_mov_b32_e32 v8, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
.LBB0_4:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
	v_add_nc_u32_e32 v9, s5, v5
	s_mov_b32 s10, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s7, v9
.LBB0_5:                                ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=2
	v_add_nc_u32_e32 v9, s10, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s2, s8, v9
	v_add_co_ci_u32_e64 v10, s2, s9, v10, s2
	global_load_b32 v9, v[9:10], off
	global_load_b32 v10, v[6:7], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v8, v9, v10
.LBB0_7:                                ;   in Loop: Header=BB0_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s11
	s_add_i32 s10, s10, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s18, s10
	s_cbranch_scc0 .LBB0_5
; %bb.8:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_4 Depth=1
	v_add_nc_u32_e32 v3, s18, v3
	s_add_i32 s5, s5, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, s18
	s_cbranch_scc0 .LBB0_4
	s_branch .LBB0_10
.LBB0_9:
	v_mov_b32_e32 v8, 0
.LBB0_10:                               ; %._crit_edge108
	v_mad_u32_u24 v3, v4, s3, v0
	v_or3_b32 v5, v0, v4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v4, v3, 2, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
	ds_store_b32 v4, v8
	s_waitcnt lgkmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_barrier
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB0_20
; %bb.11:
	s_load_b64 s[8:9], s[16:17], 0x58
	s_mov_b32 s13, exec_lo
	s_mov_b32 s11, exec_lo
	v_mbcnt_lo_u32_b32 v5, s13, 0
                                        ; implicit-def: $vgpr6
	s_waitcnt lgkmcnt(0)
	s_load_b32 s10, s[8:9], 0x28
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v5
	s_cbranch_execz .LBB0_13
; %bb.12:
	s_bcnt1_i32_b32 s2, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v7, s2
	global_atomic_add_u32 v6, v6, v7, s[8:9] offset:32 glc
.LBB0_13:
	s_or_b32 exec_lo, exec_lo, s11
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v6
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, s2, v5
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s10, -1
	v_and_b32_e32 v6, 0xffff, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 s2, v6
	s_xor_b32 s11, exec_lo, s11
	s_cbranch_execz .LBB0_17
; %bb.14:                               ; %.preheader.i.i.i.i.preheader
	v_mov_b32_e32 v6, 0
	s_mov_b32 s13, 0
.LBB0_15:                               ; %.preheader.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_load_b32 v7, v6, s[8:9] offset:32 glc
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v7, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e64 s2, 0xffff, v7
	s_or_b32 s13, s2, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_15
; %bb.16:                               ; %Flow160
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_17:                               ; %Flow162
	s_and_not1_saveexec_b32 s2, s11
	s_cbranch_execz .LBB0_20
; %bb.18:
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v5, s11, 0
	v_cmp_eq_u32_e64 s2, 0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, exec_lo, s2
	s_mov_b32 exec_lo, s2
	s_cbranch_execz .LBB0_20
; %bb.19:
	s_sub_i32 s2, 0x10000, s10
	s_bcnt1_i32_b32 s10, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s2, s2, s10
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v6, s2
	global_atomic_add_u32 v5, v6, s[8:9] offset:32
.LBB0_20:                               ; %Flow164
	s_or_b32 exec_lo, exec_lo, s5
	s_mul_i32 s5, s3, s12
	s_waitcnt_vscnt null, 0x0
	s_barrier
	s_cmp_lt_u32 s5, 2
	s_cbranch_scc1 .LBB0_35
; %bb.21:
	v_mov_b32_e32 v5, 0
.LBB0_22:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_29 Depth 2
	s_lshr_b32 s10, s5, 1
	s_mov_b32 s8, exec_lo
	v_cmpx_gt_u32_e64 s10, v3
	s_cbranch_execz .LBB0_24
; %bb.23:                               ;   in Loop: Header=BB0_22 Depth=1
	v_lshl_add_u32 v6, s10, 2, v4
	ds_load_b32 v6, v6
	ds_load_b32 v7, v4
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v6, v7
	ds_store_b32 v4, v6
.LBB0_24:                               ;   in Loop: Header=BB0_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_waitcnt lgkmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_barrier
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB0_34
; %bb.25:                               ;   in Loop: Header=BB0_22 Depth=1
	s_load_b64 s[8:9], s[16:17], 0x58
	s_mov_b32 s12, exec_lo
	s_mov_b32 s13, exec_lo
	v_mbcnt_lo_u32_b32 v7, s12, 0
                                        ; implicit-def: $vgpr8
	s_waitcnt lgkmcnt(0)
	global_load_b32 v6, v5, s[8:9] offset:40
	v_cmpx_eq_u32_e32 0, v7
	s_cbranch_execz .LBB0_27
; %bb.26:                               ;   in Loop: Header=BB0_22 Depth=1
	s_bcnt1_i32_b32 s2, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v8, s2
	global_atomic_add_u32 v8, v5, v8, s[8:9] offset:32 glc
.LBB0_27:                               ;   in Loop: Header=BB0_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v8
	v_add_nc_u32_e32 v9, -1, v6
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v7, s2, v7
	v_and_b32_e32 v8, 0xffff, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v8, v9
	s_xor_b32 s12, exec_lo, s12
	s_cbranch_execz .LBB0_31
; %bb.28:                               ; %.preheader.i.i.i.i97.preheader
                                        ;   in Loop: Header=BB0_22 Depth=1
	s_mov_b32 s13, 0
.LBB0_29:                               ; %.preheader.i.i.i.i97
                                        ;   Parent Loop BB0_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_load_b32 v6, v5, s[8:9] offset:32 glc
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e64 s2, 0xffff, v6
	s_or_b32 s13, s2, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_29
; %bb.30:                               ; %Flow153
                                        ;   in Loop: Header=BB0_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
                                        ; implicit-def: $vgpr6
.LBB0_31:                               ; %Flow155
                                        ;   in Loop: Header=BB0_22 Depth=1
	s_and_not1_saveexec_b32 s2, s12
	s_cbranch_execz .LBB0_34
; %bb.32:                               ;   in Loop: Header=BB0_22 Depth=1
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v7, s12, 0
	v_cmp_eq_u32_e64 s2, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, exec_lo, s2
	s_mov_b32 exec_lo, s2
	s_cbranch_execz .LBB0_34
; %bb.33:                               ;   in Loop: Header=BB0_22 Depth=1
	v_sub_nc_u32_e32 v6, 0x10000, v6
	s_bcnt1_i32_b32 s2, s12
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v6, v6, s2
	global_atomic_add_u32 v5, v6, s[8:9] offset:32
.LBB0_34:                               ; %Flow157
                                        ;   in Loop: Header=BB0_22 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s10
	s_waitcnt_vscnt null, 0x0
	s_barrier
	s_cbranch_scc0 .LBB0_22
.LBB0_35:                               ; %._crit_edge114
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_38
; %bb.36:
	v_mad_u64_u32 v[3:4], null, s15, s4, v[1:2]
	s_mul_i32 s14, s14, s3
	s_load_b64 s[0:1], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v3, s7
	v_add3_u32 v3, v1, v0, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v3, s6, v[2:3]
	v_mov_b32_e32 v2, 0
	ds_load_b32 v4, v2
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_mov_b32 s0, 0
	global_load_b32 v3, v[0:1], off
.LBB0_37:                               ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v3, v4
	global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v2, v3
	v_mov_b32_e32 v3, v2
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_37
.LBB0_38:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18convBackpropKernelPfS_S_S_iiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18convBackpropKernelPfS_S_S_iiiiii, .Lfunc_end0-_Z18convBackpropKernelPfS_S_S_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1356
; NumSgprs: 21
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           8
        .value_kind:     hidden_multigrid_sync_arg
      - .offset:         176
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18convBackpropKernelPfS_S_S_iiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     21
    .sgpr_spill_count: 0
    .symbol:         _Z18convBackpropKernelPfS_S_S_iiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
