#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>

using namespace cooperative_groups;

// Define the size of the image and filter
#define IMAGE_WIDTH 256
#define IMAGE_HEIGHT 256
#define FILTER_SIZE 32

// Kernel to perform convolution using atomic operations
__global__ void convolveKernel(const float* input, float* output, const float* filter) {
    grid_group grid = this_grid();
    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int bx = blockIdx.x;
    int by = blockIdx.y;

    // Shared memory to store the image tile
    __shared__ float tile[FILTER_SIZE][FILTER_SIZE];

    // Calculate the global row and column index
    int row = by * blockDim.y + ty;
    int col = bx * blockDim.x + tx;

    // Load the image tile into shared memory
    if (row < IMAGE_HEIGHT && col < IMAGE_WIDTH) {
        tile[ty][tx] = input[row * IMAGE_WIDTH + col];
    } else {
        tile[ty][tx] = 0.0f;
    }
    grid.sync();

    // Accumulate the result using atomic operations
    float result = 0.0f;
    for (int fRow = 0; fRow < FILTER_SIZE; ++fRow) {
        for (int fCol = 0; fCol < FILTER_SIZE; ++fCol) {
            if (row - fRow >= 0 && row - fRow < IMAGE_HEIGHT && col - fCol >= 0 && col - fCol < IMAGE_WIDTH) {
                atomicAdd(&output[(row - fRow) * IMAGE_WIDTH + (col - fCol)], tile[ty][tx] * filter[fRow * FILTER_SIZE + fCol]);
            }
        }
    }
}

int main() {
    // Allocate and initialize host memory
    float* h_input = new float[IMAGE_WIDTH * IMAGE_HEIGHT];
    float* h_output = new float[IMAGE_WIDTH * IMAGE_HEIGHT];
    float* h_filter = new float[FILTER_SIZE * FILTER_SIZE];

    // Initialize input and filter with some values
    for (int i = 0; i < IMAGE_WIDTH * IMAGE_HEIGHT; ++i) {
        h_input[i] = 1.0f;
    }
    for (int i = 0; i < FILTER_SIZE * FILTER_SIZE; ++i) {
        h_filter[i] = 1.0f / (FILTER_SIZE * FILTER_SIZE);
    }

    // Allocate device memory
    float* d_input, *d_output, *d_filter;
    cudaError_t err = cudaMalloc((void**)&d_input, IMAGE_WIDTH * IMAGE_HEIGHT * sizeof(float));
    if (err != cudaSuccess) { std::cerr << "Error allocating device memory for input"; return -1; }
    err = cudaMalloc((void**)&d_output, IMAGE_WIDTH * IMAGE_HEIGHT * sizeof(float));
    if (err != cudaSuccess) { std::cerr << "Error allocating device memory for output"; return -1; }
    err = cudaMalloc((void**)&d_filter, FILTER_SIZE * FILTER_SIZE * sizeof(float));
    if (err != cudaSuccess) { std::cerr << "Error allocating device memory for filter"; return -1; }

    // Copy data from host to device
    err = cudaMemcpy(d_input, h_input, IMAGE_WIDTH * IMAGE_HEIGHT * sizeof(float), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) { std::cerr << "Error copying input data to device"; return -1; }
    err = cudaMemcpy(d_filter, h_filter, FILTER_SIZE * FILTER_SIZE * sizeof(float), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) { std::cerr << "Error copying filter data to device"; return -1; }

    // Set up the execution configuration
    dim3 blockSize(FILTER_SIZE, FILTER_SIZE);
    dim3 gridSize((IMAGE_WIDTH + FILTER_SIZE - 1) / FILTER_SIZE, (IMAGE_HEIGHT + FILTER_SIZE - 1) / FILTER_SIZE);

    // Launch the kernel
    convolveKernel<<<gridSize, blockSize>>>(d_input, d_output, d_filter);
    err = cudaGetLastError();
    if (err != cudaSuccess) { std::cerr << "Error launching kernel"; return -1; }

    // Copy the result back to the host
    err = cudaMemcpy(h_output, d_output, IMAGE_WIDTH * IMAGE_HEIGHT * sizeof(float), cudaMemcpyDeviceToHost);
    if (err != cudaSuccess) { std::cerr << "Error copying output data to host"; return -1; }

    // Free device memory
    cudaFree(d_input);
    cudaFree(d_output);
    cudaFree(d_filter);

    // Free host memory
    delete[] h_input;
    delete[] h_output;
    delete[] h_filter;

    // Print the result for verification
    std::cout << "Convolution result (first 10 elements): ";
    for (int i = 0; i < 10; ++i) {
        std::cout << h_output[i] << " ";
    }
    std::cout << std::endl;

    return 0;
}
	.file	"tmpxft_001b65dd_00000000-6_cuda_code_012274.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6835:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6835:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0, @function
_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0:
.LFB7718:
	.cfi_startproc
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	testq	%rsi, %rsi
	jne	.L3
	movq	(%rdi), %rax
	movl	$1, %esi
	addq	-24(%rax), %rbx
	addq	$16, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt9basic_iosIcSt11char_traitsIcEE8setstateESt12_Ios_Iostate@PLT
.L3:
	.cfi_restore_state
	movq	%rsi, %rdi
	movq	%rsi, 8(%rsp)
	call	strlen@PLT
	movq	8(%rsp), %rsi
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	movq	%rax, %rdx
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	.cfi_endproc
.LFE7718:
	.size	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0, .-_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	.globl	_Z40__device_stub__Z14convolveKernelPKfPfS0_PKfPfS0_
	.type	_Z40__device_stub__Z14convolveKernelPKfPfS0_PKfPfS0_, @function
_Z40__device_stub__Z14convolveKernelPKfPfS0_PKfPfS0_:
.LFB6857:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14convolveKernelPKfPfS0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L6:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6857:
	.size	_Z40__device_stub__Z14convolveKernelPKfPfS0_PKfPfS0_, .-_Z40__device_stub__Z14convolveKernelPKfPfS0_PKfPfS0_
	.globl	_Z14convolveKernelPKfPfS0_
	.type	_Z14convolveKernelPKfPfS0_, @function
_Z14convolveKernelPKfPfS0_:
.LFB6858:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z14convolveKernelPKfPfS0_PKfPfS0_
	.cfi_endproc
.LFE6858:
	.size	_Z14convolveKernelPKfPfS0_, .-_Z14convolveKernelPKfPfS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Error allocating device memory for input"
.LC3:
	.string	"Error allocating device memory for output"
.LC4:
	.string	"Error allocating device memory for filter"
.LC5:
	.string	"Error copying input data to device"
.LC6:
	.string	"Error copying filter data to device"
.LC7:
	.string	"Error launching kernel"
.LC8:
	.string	"Error copying output data to host"
.LC9:
	.string	"Convolution result (first 10 elements): "
.LC10:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6832:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$262144, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$262144, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$4096, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movss	.LC0(%rip), %xmm0
	movq	%rax, %rbp
	xorl	%eax, %eax
.L12:
	movss	%xmm0, (%r12,%rax,4)
	incq	%rax
	cmpq	$65536, %rax
	jne	.L12
	movss	.LC1(%rip), %xmm0
	xorl	%eax, %eax
.L13:
	movss	%xmm0, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$1024, %rax
	jne	.L13
	movl	$262144, %esi
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC2(%rip), %rsi
	testl	%eax, %eax
	jne	.L30
	leaq	16(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L16
	leaq	.LC3(%rip), %rsi
.L30:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	orl	$-1, %eax
	jmp	.L11
.L16:
	movl	$4096, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC4(%rip), %rsi
	testl	%eax, %eax
	jne	.L30
	movq	8(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	leaq	.LC5(%rip), %rsi
	testl	%eax, %eax
	jne	.L30
	movq	24(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$4096, %edx
	call	cudaMemcpy@PLT
	leaq	.LC6(%rip), %rsi
	testl	%eax, %eax
	jne	.L30
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$137438953504, %rdx
	movabsq	$34359738376, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z40__device_stub__Z14convolveKernelPKfPfS0_PKfPfS0_
.L21:
	call	cudaGetLastError@PLT
	leaq	.LC7(%rip), %rsi
	testl	%eax, %eax
	jne	.L30
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$262144, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC8(%rip), %rsi
	testl	%eax, %eax
	jne	.L30
	movq	8(%rsp), %rdi
	leaq	.LC10(%rip), %r13
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	leaq	_ZSt4cout(%rip), %r12
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	xorl	%ebp, %ebp
	call	_ZdaPv@PLT
	leaq	.LC9(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
.L24:
	movq	%r12, %rdi
	cvtss2sd	(%rbx,%rbp,4), %xmm0
	incq	%rbp
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.isra.0
	cmpq	$10, %rbp
	jne	.L24
	movq	%r12, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	xorl	%eax, %eax
.L11:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6832:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z14convolveKernelPKfPfS0_"
.LC12:
	.string	"_ZN50_INTERNAL_75bc68b4_19_cuda_code_012274_cu_665083ae4cuda3std3__419piecewise_constructE"
.LC13:
	.string	"_ZN50_INTERNAL_75bc68b4_19_cuda_code_012274_cu_665083ae4cuda3std6ranges3__45__cpo4swapE"
.LC14:
	.string	"_ZN50_INTERNAL_75bc68b4_19_cuda_code_012274_cu_665083ae4cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6860:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14convolveKernelPKfPfS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6860:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.align 4
.LC1:
	.long	981467136
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>

using namespace cooperative_groups;

// Define the size of the image and filter
#define IMAGE_WIDTH 256
#define IMAGE_HEIGHT 256
#define FILTER_SIZE 32

// Kernel to perform convolution using atomic operations
__global__ void convolveKernel(const float* input, float* output, const float* filter) {
    grid_group grid = this_grid();
    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int bx = blockIdx.x;
    int by = blockIdx.y;

    // Shared memory to store the image tile
    __shared__ float tile[FILTER_SIZE][FILTER_SIZE];

    // Calculate the global row and column index
    int row = by * blockDim.y + ty;
    int col = bx * blockDim.x + tx;

    // Load the image tile into shared memory
    if (row < IMAGE_HEIGHT && col < IMAGE_WIDTH) {
        tile[ty][tx] = input[row * IMAGE_WIDTH + col];
    } else {
        tile[ty][tx] = 0.0f;
    }
    grid.sync();

    // Accumulate the result using atomic operations
    float result = 0.0f;
    for (int fRow = 0; fRow < FILTER_SIZE; ++fRow) {
        for (int fCol = 0; fCol < FILTER_SIZE; ++fCol) {
            if (row - fRow >= 0 && row - fRow < IMAGE_HEIGHT && col - fCol >= 0 && col - fCol < IMAGE_WIDTH) {
                atomicAdd(&output[(row - fRow) * IMAGE_WIDTH + (col - fCol)], tile[ty][tx] * filter[fRow * FILTER_SIZE + fCol]);
            }
        }
    }
}

int main() {
    // Allocate and initialize host memory
    float* h_input = new float[IMAGE_WIDTH * IMAGE_HEIGHT];
    float* h_output = new float[IMAGE_WIDTH * IMAGE_HEIGHT];
    float* h_filter = new float[FILTER_SIZE * FILTER_SIZE];

    // Initialize input and filter with some values
    for (int i = 0; i < IMAGE_WIDTH * IMAGE_HEIGHT; ++i) {
        h_input[i] = 1.0f;
    }
    for (int i = 0; i < FILTER_SIZE * FILTER_SIZE; ++i) {
        h_filter[i] = 1.0f / (FILTER_SIZE * FILTER_SIZE);
    }

    // Allocate device memory
    float* d_input, *d_output, *d_filter;
    hipError_t err = hipMalloc((void**)&d_input, IMAGE_WIDTH * IMAGE_HEIGHT * sizeof(float));
    if (err != hipSuccess) { std::cerr << "Error allocating device memory for input"; return -1; }
    err = hipMalloc((void**)&d_output, IMAGE_WIDTH * IMAGE_HEIGHT * sizeof(float));
    if (err != hipSuccess) { std::cerr << "Error allocating device memory for output"; return -1; }
    err = hipMalloc((void**)&d_filter, FILTER_SIZE * FILTER_SIZE * sizeof(float));
    if (err != hipSuccess) { std::cerr << "Error allocating device memory for filter"; return -1; }

    // Copy data from host to device
    err = hipMemcpy(d_input, h_input, IMAGE_WIDTH * IMAGE_HEIGHT * sizeof(float), hipMemcpyHostToDevice);
    if (err != hipSuccess) { std::cerr << "Error copying input data to device"; return -1; }
    err = hipMemcpy(d_filter, h_filter, FILTER_SIZE * FILTER_SIZE * sizeof(float), hipMemcpyHostToDevice);
    if (err != hipSuccess) { std::cerr << "Error copying filter data to device"; return -1; }

    // Set up the execution configuration
    dim3 blockSize(FILTER_SIZE, FILTER_SIZE);
    dim3 gridSize((IMAGE_WIDTH + FILTER_SIZE - 1) / FILTER_SIZE, (IMAGE_HEIGHT + FILTER_SIZE - 1) / FILTER_SIZE);

    // Launch the kernel
    convolveKernel<<<gridSize, blockSize>>>(d_input, d_output, d_filter);
    err = hipGetLastError();
    if (err != hipSuccess) { std::cerr << "Error launching kernel"; return -1; }

    // Copy the result back to the host
    err = hipMemcpy(h_output, d_output, IMAGE_WIDTH * IMAGE_HEIGHT * sizeof(float), hipMemcpyDeviceToHost);
    if (err != hipSuccess) { std::cerr << "Error copying output data to host"; return -1; }

    // Free device memory
    hipFree(d_input);
    hipFree(d_output);
    hipFree(d_filter);

    // Free host memory
    delete[] h_input;
    delete[] h_output;
    delete[] h_filter;

    // Print the result for verification
    std::cout << "Convolution result (first 10 elements): ";
    for (int i = 0; i < 10; ++i) {
        std::cout << h_output[i] << " ";
    }
    std::cout << std::endl;

    return 0;
}
	.text
	.file	"cuda_code_012274.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z29__device_stub__convolveKernelPKfPfS0_ # -- Begin function _Z29__device_stub__convolveKernelPKfPfS0_
	.type	_Z29__device_stub__convolveKernelPKfPfS0_,@function
_Z29__device_stub__convolveKernelPKfPfS0_: # @_Z29__device_stub__convolveKernelPKfPfS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14convolveKernelPKfPfS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__convolveKernelPKfPfS0_, .Lfunc_end0-_Z29__device_stub__convolveKernelPKfPfS0_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$262144, %edi                   # imm = 0x40000
	callq	_Znam
	movq	%rax, %r14
	movl	$262144, %edi                   # imm = 0x40000
	callq	_Znam
	movq	%rax, %rbx
	movl	$4096, %edi                     # imm = 0x1000
	callq	_Znam
	movq	%rax, %r15
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%r14,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$65536, %rax                    # imm = 0x10000
	jne	.LBB1_1
# %bb.2:                                # %.preheader.preheader
	xorl	%eax, %eax
.LBB1_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	$981467136, (%r15,%rax,4)       # imm = 0x3A800000
	incq	%rax
	cmpq	$1024, %rax                     # imm = 0x400
	jne	.LBB1_3
# %bb.4:
	leaq	24(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_6
# %bb.5:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$40, %edx
	jmp	.LBB1_9
.LBB1_6:
	leaq	16(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_10
# %bb.7:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	jmp	.LBB1_8
.LBB1_10:
	leaq	8(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_12
# %bb.11:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
.LBB1_8:
	movl	$41, %edx
.LBB1_9:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$-1, %eax
.LBB1_25:
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_12:
	.cfi_def_cfa_offset 64
	movq	24(%rsp), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_14
# %bb.13:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$34, %edx
	jmp	.LBB1_9
.LBB1_14:
	movq	8(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_16
# %bb.15:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.4, %esi
	movl	$35, %edx
	jmp	.LBB1_9
.LBB1_16:
	movabsq	$34359738376, %rdi              # imm = 0x800000008
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_18
# %bb.17:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z29__device_stub__convolveKernelPKfPfS0_
.LBB1_18:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_20
# %bb.19:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.5, %esi
	movl	$22, %edx
	jmp	.LBB1_9
.LBB1_20:
	movq	16(%rsp), %rsi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_22
# %bb.21:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.6, %esi
	movl	$33, %edx
	jmp	.LBB1_9
.LBB1_22:
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$40, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%r14d, %r14d
.LBB1_23:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r14,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.8, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r14
	cmpq	$10, %r14
	jne	.LBB1_23
# %bb.24:
	movl	$_ZSt4cout, %edi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	xorl	%eax, %eax
	jmp	.LBB1_25
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14convolveKernelPKfPfS0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14convolveKernelPKfPfS0_,@object # @_Z14convolveKernelPKfPfS0_
	.section	.rodata,"a",@progbits
	.globl	_Z14convolveKernelPKfPfS0_
	.p2align	3, 0x0
_Z14convolveKernelPKfPfS0_:
	.quad	_Z29__device_stub__convolveKernelPKfPfS0_
	.size	_Z14convolveKernelPKfPfS0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error allocating device memory for input"
	.size	.L.str, 41

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Error allocating device memory for output"
	.size	.L.str.1, 42

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Error allocating device memory for filter"
	.size	.L.str.2, 42

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Error copying input data to device"
	.size	.L.str.3, 35

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Error copying filter data to device"
	.size	.L.str.4, 36

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Error launching kernel"
	.size	.L.str.5, 23

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Error copying output data to host"
	.size	.L.str.6, 34

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Convolution result (first 10 elements): "
	.size	.L.str.7, 41

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	" "
	.size	.L.str.8, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14convolveKernelPKfPfS0_"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__convolveKernelPKfPfS0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14convolveKernelPKfPfS0_
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14convolveKernelPKfPfS0_ ; -- Begin function _Z14convolveKernelPKfPfS0_
	.globl	_Z14convolveKernelPKfPfS0_
	.p2align	8
	.type	_Z14convolveKernelPKfPfS0_,@function
_Z14convolveKernelPKfPfS0_:             ; @_Z14convolveKernelPKfPfS0_
; %bb.0:
	s_clause 0x2
	s_load_b32 s8, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_bfe_u32 v4, v0, 10, 10
	v_and_b32_e32 v5, 0x3ff, v0
	s_add_u32 s0, s0, 24
	s_addc_u32 s1, s1, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s9, s8, 16
	s_and_b32 s8, s8, 0xffff
	v_mad_u64_u32 v[1:2], null, s15, s9, v[4:5]
	v_mad_u64_u32 v[2:3], null, s14, s8, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v3, v1, v2
	v_cmp_gt_i32_e32 vcc_lo, 0x100, v3
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s8, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_lshl_add_u32 v6, v1, 8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v3, v[6:7], off
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s8
	v_bfe_u32 v0, v0, 20, 10
	v_lshlrev_b32_e32 v6, 2, v5
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or3_b32 v5, v4, v0, v5
	v_lshl_add_u32 v0, v4, 7, v6
	s_waitcnt vmcnt(0)
	ds_store_b32 v0, v3
	s_waitcnt lgkmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_barrier
	v_cmpx_eq_u32_e32 0, v5
	s_cbranch_execz .LBB0_12
; %bb.3:
	s_load_b64 s[0:1], s[0:1], 0x58
	s_mov_b32 s8, exec_lo
	s_mov_b32 s9, exec_lo
	v_mbcnt_lo_u32_b32 v3, s8, 0
                                        ; implicit-def: $vgpr4
	s_waitcnt lgkmcnt(0)
	s_load_b32 s5, s[0:1], 0x28
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_5
; %bb.4:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, s8
	global_atomic_add_u32 v4, v4, v5, s[0:1] offset:32 glc
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s9
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, s8, v3
	s_waitcnt lgkmcnt(0)
	s_add_i32 s8, s5, -1
	v_and_b32_e32 v4, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s8, v4
	s_and_saveexec_b32 s8, vcc_lo
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB0_9
; %bb.6:                                ; %.preheader.i.i.i.preheader
	v_mov_b32_e32 v4, 0
	s_mov_b32 s9, 0
.LBB0_7:                                ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_load_b32 v5, v4, s[0:1] offset:32 glc
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v5, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_u32_e32 vcc_lo, 0xffff, v5
	s_or_b32 s9, vcc_lo, s9
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_7
; %bb.8:                                ; %Flow66
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_9:                                ; %Flow68
	s_and_not1_saveexec_b32 s8, s8
	s_cbranch_execz .LBB0_12
; %bb.10:
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v3, s8, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_and_b32 s9, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s9
	s_cbranch_execz .LBB0_12
; %bb.11:
	s_sub_i32 s5, 0x10000, s5
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s5, s5, s8
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, s5
	global_atomic_add_u32 v3, v4, s[0:1] offset:32
.LBB0_12:                               ; %Flow70
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v4, 0
	s_mov_b32 s1, 0
	s_mov_b32 s4, 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
.LBB0_13:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_14 Depth 2
                                        ;       Child Loop BB0_17 Depth 3
	v_subrev_nc_u32_e32 v3, s4, v1
	s_lshl_b32 s5, s4, 5
	s_mov_b32 s8, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 0x100, v3
	v_lshlrev_b32_e32 v9, 8, v3
.LBB0_14:                               ;   Parent Loop BB0_13 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_17 Depth 3
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB0_18
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=2
	v_subrev_nc_u32_e32 v3, s8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, 0x100, v3
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_18
; %bb.16:                               ;   in Loop: Header=BB0_14 Depth=2
	v_or_b32_e32 v3, v3, v9
	s_add_i32 s0, s8, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[0:1], 2
	s_add_u32 s10, s2, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	s_addc_u32 s11, s3, s11
	v_add_co_u32 v5, s0, s6, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, s7, v6, s0
	global_load_b32 v3, v4, s[10:11]
	global_load_b32 v8, v[5:6], off
	ds_load_b32 v7, v0
	s_mov_b32 s10, 0
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_mul_f32_e32 v3, v7, v3
.LBB0_17:                               ; %atomicrmw.start
                                        ;   Parent Loop BB0_13 Depth=1
                                        ;     Parent Loop BB0_14 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_f32_e32 v7, v8, v3
	global_atomic_cmpswap_b32 v7, v[5:6], v[7:8], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, v7, v8
	v_mov_b32_e32 v8, v7
	s_or_b32 s10, s0, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_17
.LBB0_18:                               ;   in Loop: Header=BB0_14 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s8, 32
	s_cbranch_scc0 .LBB0_14
; %bb.19:                               ;   in Loop: Header=BB0_13 Depth=1
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s4, 32
	s_cbranch_scc0 .LBB0_13
; %bb.20:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14convolveKernelPKfPfS0_
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14convolveKernelPKfPfS0_, .Lfunc_end0-_Z14convolveKernelPKfPfS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 780
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         112
        .size:           8
        .value_kind:     hidden_multigrid_sync_arg
    .group_segment_fixed_size: 4096
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14convolveKernelPKfPfS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14convolveKernelPKfPfS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
