#include <iostream>
#include <cuda_runtime.h>
#include <cuda.h>

// Define the number of points in the Hartley transform
#define N 128

// CUDA kernel to perform a 128-point Hartley transform
__global__ void hartleyTransform(float *d_in, float *d_out) {
    // Shared memory to hold a block of data
    __shared__ float shared_data[N];

    // Thread index
    int tid = threadIdx.x;

    // Load data into shared memory
    shared_data[tid] = d_in[tid];
    __syncthreads();

    // Perform the Hartley transform
    for (int s = 1; s < N; s <<= 1) {
        int m = 2 * s;
        int j = tid % s;

        // Compute the twiddle factors for the Hartley transform
        float c = cos(3.14159265358979323846 / s * j);
        float s_factor = sin(3.14159265358979323846 / s * j);

        // Compute the indices for the butterfly operation
        int i = 2 * s * (tid / m) + j;
        int ip = i + s;

        // Load the data into registers
        float a = shared_data[i];
        float b = shared_data[ip];

        // Perform the butterfly operation
        shared_data[i] = a * c + b * s_factor;
        shared_data[ip] = a * s_factor + b * c;

        // Synchronize threads in the block
        __syncthreads();
    }

    // Store the result back to global memory
    d_out[tid] = shared_data[tid];
}

int main() {
    // Host data
    float h_in[N], h_out[N];

    // Initialize input data
    for (int i = 0; i < N; i++) {
        h_in[i] = static_cast<float>(i);
    }

    // Device data pointers
    float *d_in, *d_out;

    // Allocate device memory
    cudaError_t err = cudaMalloc((void**)&d_in, N * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device memory for d_in" << std::endl;
        return -1;
    }

    err = cudaMalloc((void**)&d_out, N * sizeof(float));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device memory for d_out" << std::endl;
        cudaFree(d_in);
        return -1;
    }

    // Copy data from host to device
    err = cudaMemcpy(d_in, h_in, N * sizeof(float), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy data from host to device" << std::endl;
        cudaFree(d_in);
        cudaFree(d_out);
        return -1;
    }

    // Launch the Hartley transform kernel
    hartleyTransform<<<1, N>>>(d_in, d_out);

    // Check for errors launching the kernel
    err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Failed to launch hartleyTransform kernel" << std::endl;
        cudaFree(d_in);
        cudaFree(d_out);
        return -1;
    }

    // Copy the result back to the host
    err = cudaMemcpy(h_out, d_out, N * sizeof(float), cudaMemcpyDeviceToHost);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy data from device to host" << std::endl;
        cudaFree(d_in);
        cudaFree(d_out);
        return -1;
    }

    // Free device memory
    cudaFree(d_in);
    cudaFree(d_out);

    // Print the output (first 10 elements for brevity)
    std::cout << "Hartley Transform Output (first 10 elements):" << std::endl;
    for (int i = 0; i < 10; i++) {
        std::cout << h_out[i] << " ";
    }
    std::cout << std::endl;

    return 0;
}
	.file	"tmpxft_0003e01f_00000000-6_cuda_code_052905.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4293:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4293:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z38__device_stub__Z16hartleyTransformPfS_PfS_
	.type	_Z38__device_stub__Z16hartleyTransformPfS_PfS_, @function
_Z38__device_stub__Z16hartleyTransformPfS_PfS_:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z16hartleyTransformPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L3:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z38__device_stub__Z16hartleyTransformPfS_PfS_, .-_Z38__device_stub__Z16hartleyTransformPfS_PfS_
	.globl	_Z16hartleyTransformPfS_
	.type	_Z16hartleyTransformPfS_, @function
_Z16hartleyTransformPfS_:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z16hartleyTransformPfS_PfS_
	.cfi_endproc
.LFE3661:
	.size	_Z16hartleyTransformPfS_, .-_Z16hartleyTransformPfS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Failed to allocate device memory for d_in"
.LC1:
	.string	"Failed to allocate device memory for d_out"
.LC2:
	.string	"Failed to copy data from host to device"
.LC3:
	.string	"Failed to launch hartleyTransform kernel"
.LC4:
	.string	"Failed to copy data from device to host"
.LC5:
	.string	"Hartley Transform Output (first 10 elements):"
.LC6:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$1080, %rsp
	.cfi_def_cfa_offset 1120
	movq	%fs:40, %rax
	movq	%rax, 1064(%rsp)
	xorl	%eax, %eax
.L10:
	cvtsi2ssl	%eax, %xmm0
	leaq	40(%rsp), %rbx
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$128, %rax
	jne	.L10
	movq	%rsp, %rdi
	movl	$512, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L11
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L12
.L11:
	leaq	8(%rsp), %rdi
	movl	$512, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L13
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
.L24:
	call	cudaFree@PLT
.L12:
	orl	$-1, %eax
	jmp	.L9
.L13:
	movq	(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$512, %edx
	call	cudaMemcpy@PLT
	leaq	.LC2(%rip), %rsi
	testl	%eax, %eax
	jne	.L25
	movl	$33554433, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$7, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 36(%rsp)
	movq	%rdx, 28(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z38__device_stub__Z16hartleyTransformPfS_PfS_
.L16:
	call	cudaGetLastError@PLT
	leaq	.LC3(%rip), %rsi
	testl	%eax, %eax
	jne	.L25
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$512, %edx
	leaq	552(%rsp), %r12
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L18
	leaq	.LC4(%rip), %rsi
.L25:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	jmp	.L24
.L18:
	movq	(%rsp), %rdi
	leaq	_ZSt4cout(%rip), %rbp
	xorl	%ebx, %ebx
	leaq	.LC6(%rip), %r13
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L19:
	movq	%rbp, %rdi
	cvtss2sd	(%r12,%rbx,4), %xmm0
	incq	%rbx
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$10, %rbx
	jne	.L19
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%eax, %eax
.L9:
	movq	1064(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$1080, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z16hartleyTransformPfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16hartleyTransformPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>


// Define the number of points in the Hartley transform
#define N 128

// CUDA kernel to perform a 128-point Hartley transform
__global__ void hartleyTransform(float *d_in, float *d_out) {
    // Shared memory to hold a block of data
    __shared__ float shared_data[N];

    // Thread index
    int tid = threadIdx.x;

    // Load data into shared memory
    shared_data[tid] = d_in[tid];
    __syncthreads();

    // Perform the Hartley transform
    for (int s = 1; s < N; s <<= 1) {
        int m = 2 * s;
        int j = tid % s;

        // Compute the twiddle factors for the Hartley transform
        float c = cos(3.14159265358979323846 / s * j);
        float s_factor = sin(3.14159265358979323846 / s * j);

        // Compute the indices for the butterfly operation
        int i = 2 * s * (tid / m) + j;
        int ip = i + s;

        // Load the data into registers
        float a = shared_data[i];
        float b = shared_data[ip];

        // Perform the butterfly operation
        shared_data[i] = a * c + b * s_factor;
        shared_data[ip] = a * s_factor + b * c;

        // Synchronize threads in the block
        __syncthreads();
    }

    // Store the result back to global memory
    d_out[tid] = shared_data[tid];
}

int main() {
    // Host data
    float h_in[N], h_out[N];

    // Initialize input data
    for (int i = 0; i < N; i++) {
        h_in[i] = static_cast<float>(i);
    }

    // Device data pointers
    float *d_in, *d_out;

    // Allocate device memory
    hipError_t err = hipMalloc((void**)&d_in, N * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device memory for d_in" << std::endl;
        return -1;
    }

    err = hipMalloc((void**)&d_out, N * sizeof(float));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device memory for d_out" << std::endl;
        hipFree(d_in);
        return -1;
    }

    // Copy data from host to device
    err = hipMemcpy(d_in, h_in, N * sizeof(float), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy data from host to device" << std::endl;
        hipFree(d_in);
        hipFree(d_out);
        return -1;
    }

    // Launch the Hartley transform kernel
    hartleyTransform<<<1, N>>>(d_in, d_out);

    // Check for errors launching the kernel
    err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Failed to launch hartleyTransform kernel" << std::endl;
        hipFree(d_in);
        hipFree(d_out);
        return -1;
    }

    // Copy the result back to the host
    err = hipMemcpy(h_out, d_out, N * sizeof(float), hipMemcpyDeviceToHost);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy data from device to host" << std::endl;
        hipFree(d_in);
        hipFree(d_out);
        return -1;
    }

    // Free device memory
    hipFree(d_in);
    hipFree(d_out);

    // Print the output (first 10 elements for brevity)
    std::cout << "Hartley Transform Output (first 10 elements):" << std::endl;
    for (int i = 0; i < 10; i++) {
        std::cout << h_out[i] << " ";
    }
    std::cout << std::endl;

    return 0;
}
	.text
	.file	"cuda_code_052905.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z31__device_stub__hartleyTransformPfS_ # -- Begin function _Z31__device_stub__hartleyTransformPfS_
	.type	_Z31__device_stub__hartleyTransformPfS_,@function
_Z31__device_stub__hartleyTransformPfS_: # @_Z31__device_stub__hartleyTransformPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16hartleyTransformPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__hartleyTransformPfS_, .Lfunc_end0-_Z31__device_stub__hartleyTransformPfS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$1040, %rsp                     # imm = 0x410
	.cfi_def_cfa_offset 1056
	.cfi_offset %rbx, -16
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, 528(%rsp,%rax,4)
	incq	%rax
	cmpq	$128, %rax
	jne	.LBB1_1
# %bb.2:
	movq	%rsp, %rdi
	movl	$512, %esi                      # imm = 0x200
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_4
# %bb.3:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$41, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	jmp	.LBB1_15
.LBB1_4:
	leaq	8(%rsp), %rdi
	movl	$512, %esi                      # imm = 0x200
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_6
# %bb.5:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	movl	$42, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rdi
	jmp	.LBB1_14
.LBB1_6:
	movq	(%rsp), %rdi
	leaq	528(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_8
# %bb.7:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	movl	$39, %edx
	jmp	.LBB1_12
.LBB1_8:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	127(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.9:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z31__device_stub__hartleyTransformPfS_
.LBB1_10:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_17
# %bb.11:
	movl	$_ZSt4cerr, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$40, %edx
.LBB1_12:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_13:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
.LBB1_14:
	callq	hipFree
.LBB1_15:
	movl	$-1, %eax
.LBB1_16:
	addq	$1040, %rsp                     # imm = 0x410
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB1_17:
	.cfi_def_cfa_offset 1056
	movq	8(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$512, %edx                      # imm = 0x200
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_19
# %bb.18:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.4, %esi
	movl	$39, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cerr, %edi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	jmp	.LBB1_13
.LBB1_19:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	xorl	%ebx, %ebx
.LBB1_20:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	16(%rsp,%rbx,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.6, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%rbx
	cmpq	$10, %rbx
	jne	.LBB1_20
# %bb.21:
	movl	$_ZSt4cout, %edi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	xorl	%eax, %eax
	jmp	.LBB1_16
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16hartleyTransformPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16hartleyTransformPfS_,@object # @_Z16hartleyTransformPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z16hartleyTransformPfS_
	.p2align	3, 0x0
_Z16hartleyTransformPfS_:
	.quad	_Z31__device_stub__hartleyTransformPfS_
	.size	_Z16hartleyTransformPfS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to allocate device memory for d_in"
	.size	.L.str, 42

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Failed to allocate device memory for d_out"
	.size	.L.str.1, 43

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to copy data from host to device"
	.size	.L.str.2, 40

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to launch hartleyTransform kernel"
	.size	.L.str.3, 41

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to copy data from device to host"
	.size	.L.str.4, 40

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Hartley Transform Output (first 10 elements):"
	.size	.L.str.5, 46

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	" "
	.size	.L.str.6, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16hartleyTransformPfS_"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__hartleyTransformPfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16hartleyTransformPfS_
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16hartleyTransformPfS_ ; -- Begin function _Z16hartleyTransformPfS_
	.globl	_Z16hartleyTransformPfS_
	.p2align	8
	.type	_Z16hartleyTransformPfS_,@function
_Z16hartleyTransformPfS_:               ; @_Z16hartleyTransformPfS_
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v21, 2, v0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s12, 0x6dc9c883
	s_mov_b32 s16, 0x33145c00
	s_mov_b32 s18, 0x252049c0
	s_mov_b32 s20, 0x9037ab78
	s_mov_b32 s22, 0x46cc5e42
	s_mov_b32 s24, 0xa17f65f6
	s_mov_b32 s26, 0x19f4ec90
	s_mov_b32 s28, 0x16c16967
	s_mov_b32 s30, 0x55555555
	s_mov_b32 s34, 0xb42fdfa7
	s_mov_b32 s36, 0xf9a43bb8
	s_mov_b32 s38, 0x796cde01
	s_mov_b32 s40, 0x19e83e5c
	s_mov_b32 s42, 0x11110bb3
	s_mov_b32 s33, 1
	s_mov_b32 s5, 0x400921fb
	s_waitcnt lgkmcnt(0)
	global_load_b32 v2, v21, s[0:1]
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s9, 0x3c91a626
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s13, 0x3fe45f30
	s_mov_b32 s15, 0xbff921fb
	s_mov_b32 s17, 0xbc91a626
	s_mov_b32 s19, 0xb97b839a
	s_mov_b32 s21, 0x3e21eeb6
	s_mov_b32 s23, 0xbda907db
	s_mov_b32 s25, 0xbe927e4f
	s_mov_b32 s27, 0x3efa01a0
	s_mov_b32 s29, 0xbf56c16c
	s_mov_b32 s31, 0x3fa55555
	s_mov_b32 s35, 0xbe5ae600
	s_mov_b32 s37, 0x3de5e0b2
	s_mov_b32 s39, 0x3ec71de3
	s_mov_b32 s41, 0xbf2a01a0
	s_mov_b32 s43, 0x3f811111
	s_mov_b32 s45, 0xbfc55555
	s_waitcnt vmcnt(0)
	ds_store_b32 v21, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	v_cvt_f64_i32_e32 v[2:3], s33
	s_add_i32 s0, s33, -1
                                        ; implicit-def: $vgpr23
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v22, s0, v0
	v_div_scale_f64 v[4:5], null, v[2:3], v[2:3], s[4:5]
	v_div_scale_f64 v[10:11], vcc_lo, s[4:5], v[2:3], s[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[10:11], v[6:7]
	v_fma_f64 v[4:5], -v[4:5], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[8:9]
	v_cvt_f64_i32_e32 v[6:7], v22
	v_div_fixup_f64 v[2:3], v[4:5], v[2:3], s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[3:4], v[2:3], v[6:7]
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr7_vgpr8
	v_cmp_ngt_f64_e64 s1, 0x41d00000, |v[3:4]|
	v_trig_preop_f64 v[13:14], |v[3:4]|, 0
	v_trig_preop_f64 v[11:12], |v[3:4]|, 1
	v_ldexp_f64 v[15:16], |v[3:4]|, 0xffffff80
	v_trig_preop_f64 v[9:10], |v[3:4]|, 2
	v_and_b32_e32 v24, 0x7fffffff, v4
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s8, exec_lo, s0
	s_cbranch_execz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[3:4]|
	s_mov_b32 s6, s4
	s_mov_b32 s11, s9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v6, v24, v16 :: v_dual_cndmask_b32 v5, v3, v15
	v_mul_f64 v[7:8], v[13:14], v[5:6]
	v_mul_f64 v[17:18], v[11:12], v[5:6]
	v_mul_f64 v[33:34], v[9:10], v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[13:14], v[5:6], -v[7:8]
	v_fma_f64 v[35:36], v[11:12], v[5:6], -v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[5:6], v[9:10], v[5:6], -v[33:34]
	v_add_f64 v[25:26], v[17:18], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[25:26], -v[17:18]
	v_add_f64 v[31:32], v[7:8], v[25:26]
	v_add_f64 v[29:30], v[25:26], -v[27:28]
	v_add_f64 v[19:20], v[19:20], -v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[27:28], v[31:32], -2
	v_add_f64 v[7:8], v[31:32], -v[7:8]
	v_add_f64 v[17:18], v[17:18], -v[29:30]
	v_add_f64 v[29:30], v[33:34], v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[27:28]|
	v_add_f64 v[7:8], v[25:26], -v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[19:20], v[17:18]
	v_fract_f64_e32 v[19:20], v[27:28]
	v_add_f64 v[25:26], v[29:30], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v20, 0, v20 :: v_dual_cndmask_b32 v19, 0, v19
	v_ldexp_f64 v[19:20], v[19:20], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[7:8], v[25:26]
	v_add_f64 v[37:38], v[25:26], -v[29:30]
	v_add_f64 v[31:32], v[27:28], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[43:44], v[25:26], -v[37:38]
	v_add_f64 v[17:18], v[17:18], -v[37:38]
	v_add_f64 v[7:8], v[27:28], -v[7:8]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[31:32]
	v_add_f64 v[31:32], v[29:30], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[25:26], -v[7:8]
	v_cndmask_b32_e64 v2, 0, 0x40100000, vcc_lo
	v_add_f64 v[41:42], v[29:30], -v[31:32]
	v_add_f64 v[31:32], v[35:36], -v[31:32]
	v_add_f64 v[29:30], v[29:30], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[19:20], v[1:2]
	v_add_f64 v[35:36], v[33:34], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[17:18], v[29:30]
	v_add_f64 v[39:40], v[27:28], v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[31:32], v[35:36]
	v_cvt_i32_f64_e32 v2, v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[31:32], v[17:18]
	v_cvt_f64_i32_e32 v[37:38], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[17:18]
	v_add_f64 v[19:20], v[19:20], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[7:8], v[5:6]
	v_add_f64 v[29:30], v[27:28], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[29:30], -v[19:20]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[29:30]
	v_add_f64 v[7:8], v[27:28], -v[17:18]
	v_add_co_ci_u32_e64 v23, s0, 0, v2, vcc_lo
	v_cndmask_b32_e64 v2, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_add_f64 v[7:8], v[29:30], -v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[7:8], v[5:6]
	v_mul_f64 v[19:20], v[17:18], s[6:7]
	v_add_f64 v[7:8], v[17:18], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[25:26], v[17:18], s[6:7], -v[19:20]
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[17:18], s[10:11], v[25:26]
	v_fma_f64 v[7:8], v[5:6], s[6:7], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[19:20], v[7:8]
	v_add_f64 v[17:18], v[5:6], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[17:18]
.LBB0_3:                                ; %Flow44
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_and_not1_saveexec_b32 s0, s8
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_1 Depth=1
	v_mul_f64 v[5:6], |v[3:4]|, s[12:13]
	s_mov_b32 s14, s4
	s_mov_b32 s8, s16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[17:18], v[5:6]
	v_fma_f64 v[5:6], v[17:18], s[14:15], |v[3:4]|
	v_mul_f64 v[7:8], v[17:18], s[16:17]
	v_cvt_i32_f64_e32 v23, v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[25:26], v[17:18], s[16:17], v[5:6]
	v_add_f64 v[19:20], v[5:6], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], -v[19:20]
	v_add_f64 v[19:20], v[19:20], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_fma_f64 v[7:8], v[17:18], s[8:9], v[7:8]
	v_add_f64 v[5:6], v[19:20], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_fma_f64 v[7:8], v[17:18], s[18:19], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[25:26], v[7:8]
	v_add_f64 v[19:20], v[5:6], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[19:20]
.LBB0_5:                                ; %_ZL3cosd.exit
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr25
                                        ; implicit-def: $vgpr17_vgpr18
                                        ; implicit-def: $vgpr19_vgpr20
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_1 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[3:4]|
	s_mov_b32 s6, s4
	s_mov_b32 s11, s9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v16, v24, v16 :: v_dual_cndmask_b32 v15, v3, v15
	v_mul_f64 v[17:18], v[13:14], v[15:16]
	v_mul_f64 v[19:20], v[11:12], v[15:16]
	v_mul_f64 v[32:33], v[9:10], v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[13:14], v[15:16], -v[17:18]
	v_fma_f64 v[11:12], v[11:12], v[15:16], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[9:10], v[9:10], v[15:16], -v[32:33]
	v_add_f64 v[24:25], v[19:20], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[24:25], -v[19:20]
	v_add_f64 v[30:31], v[17:18], v[24:25]
	v_add_f64 v[28:29], v[24:25], -v[26:27]
	v_add_f64 v[13:14], v[13:14], -v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[26:27], v[30:31], -2
	v_add_f64 v[17:18], v[30:31], -v[17:18]
	v_add_f64 v[19:20], v[19:20], -v[28:29]
	v_add_f64 v[28:29], v[32:33], v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[26:27]|
	v_add_f64 v[17:18], v[24:25], -v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[13:14], v[19:20]
	v_fract_f64_e32 v[19:20], v[26:27]
	v_add_f64 v[24:25], v[28:29], v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v20, 0, v20 :: v_dual_cndmask_b32 v19, 0, v19
	v_ldexp_f64 v[19:20], v[19:20], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[17:18], v[24:25]
	v_add_f64 v[34:35], v[24:25], -v[28:29]
	v_add_f64 v[30:31], v[26:27], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[40:41], v[24:25], -v[34:35]
	v_add_f64 v[13:14], v[13:14], -v[34:35]
	v_add_f64 v[15:16], v[26:27], -v[17:18]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[30:31]
	v_add_f64 v[30:31], v[28:29], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[24:25], -v[15:16]
	v_cndmask_b32_e64 v2, 0, 0x40100000, vcc_lo
	v_add_f64 v[38:39], v[28:29], -v[30:31]
	v_add_f64 v[11:12], v[11:12], -v[30:31]
	v_add_f64 v[28:29], v[28:29], -v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[19:20], v[1:2]
	v_add_f64 v[30:31], v[32:33], -v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[13:14], v[13:14], v[28:29]
	v_add_f64 v[36:37], v[26:27], v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[30:31]
	v_cvt_i32_f64_e32 v2, v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_cvt_f64_i32_e32 v[34:35], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_add_f64 v[19:20], v[19:20], -v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[15:16], v[9:10]
	v_add_f64 v[13:14], v[26:27], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[13:14], -v[19:20]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[13:14]
	v_add_f64 v[11:12], v[26:27], -v[11:12]
	v_add_co_ci_u32_e64 v25, s0, 0, v2, vcc_lo
	v_cndmask_b32_e64 v2, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_add_f64 v[11:12], v[13:14], -v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[11:12], v[9:10]
	v_mul_f64 v[15:16], v[13:14], s[6:7]
	v_add_f64 v[11:12], v[13:14], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[13:14], s[6:7], -v[15:16]
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[13:14], s[10:11], v[17:18]
	v_fma_f64 v[9:10], v[9:10], s[6:7], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[15:16], v[9:10]
	v_add_f64 v[11:12], v[17:18], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[19:20], v[9:10], -v[11:12]
.LBB0_7:                                ; %Flow
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_1 Depth=1
	v_mul_f64 v[9:10], |v[3:4]|, s[12:13]
	s_mov_b32 s14, s4
	s_mov_b32 s8, s16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[9:10], v[9:10]
	v_fma_f64 v[11:12], v[9:10], s[14:15], |v[3:4]|
	v_mul_f64 v[13:14], v[9:10], s[16:17]
	v_cvt_i32_f64_e32 v25, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[9:10], s[16:17], v[11:12]
	v_add_f64 v[15:16], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], -v[15:16]
	v_add_f64 v[15:16], v[15:16], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_fma_f64 v[13:14], v[9:10], s[8:9], v[13:14]
	v_add_f64 v[11:12], v[15:16], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	v_fma_f64 v[11:12], v[9:10], s[18:19], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[19:20], v[11:12]
	v_add_f64 v[13:14], v[17:18], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[19:20], v[11:12], -v[13:14]
.LBB0_9:                                ; %_ZL3sind.exit
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[9:10], v[5:6], v[5:6]
	v_mul_f64 v[11:12], v[17:18], v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[38:39], v[7:8], 0.5
	v_mul_f64 v[44:45], v[19:20], 0.5
	s_mov_b32 s44, s30
	v_cmp_class_f64_e64 s0, v[3:4], 0x1f8
	v_lshlrev_b32_e32 v3, 30, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v3, v3, v4
	v_lshlrev_b32_e32 v4, 30, v23
	v_and_b32_e32 v3, 0x80000000, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_and_b32_e32 v4, 0x80000000, v4
	v_fma_f64 v[13:14], v[9:10], s[36:37], s[34:35]
	v_fma_f64 v[15:16], v[11:12], s[36:37], s[34:35]
	v_fma_f64 v[26:27], v[9:10], s[22:23], s[20:21]
	v_mul_f64 v[28:29], v[9:10], 0.5
	v_fma_f64 v[30:31], v[11:12], s[22:23], s[20:21]
	v_mul_f64 v[32:33], v[11:12], 0.5
	v_mul_f64 v[40:41], v[5:6], -v[9:10]
	v_mul_f64 v[46:47], v[17:18], -v[11:12]
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[38:39]
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[38:39]
	v_fma_f64 v[26:27], v[9:10], v[26:27], s[24:25]
	v_add_f64 v[34:35], -v[28:29], 1.0
	v_fma_f64 v[30:31], v[11:12], v[30:31], s[24:25]
	v_add_f64 v[36:37], -v[32:33], 1.0
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[40:41]
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[40:41]
	v_fma_f64 v[26:27], v[9:10], v[26:27], s[26:27]
	v_add_f64 v[42:43], -v[34:35], 1.0
	v_fma_f64 v[30:31], v[11:12], v[30:31], s[26:27]
	v_add_f64 v[48:49], -v[36:37], 1.0
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[42:43]
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[42:43]
	v_fma_f64 v[26:27], v[9:10], v[26:27], s[28:29]
	v_add_f64 v[28:29], v[42:43], -v[28:29]
	v_fma_f64 v[30:31], v[11:12], v[30:31], s[28:29]
	v_add_f64 v[32:33], v[48:49], -v[32:33]
	v_fma_f64 v[13:14], v[40:41], v[13:14], v[38:39]
	v_fma_f64 v[15:16], v[46:47], v[15:16], v[44:45]
	v_mul_f64 v[38:39], v[9:10], v[9:10]
	v_fma_f64 v[26:27], v[9:10], v[26:27], s[30:31]
	v_fma_f64 v[28:29], v[5:6], -v[7:8], v[28:29]
	v_fma_f64 v[7:8], v[9:10], v[13:14], -v[7:8]
	v_mul_f64 v[9:10], v[11:12], v[11:12]
	v_fma_f64 v[13:14], v[11:12], v[30:31], s[30:31]
	v_fma_f64 v[30:31], v[17:18], -v[19:20], v[32:33]
	v_fma_f64 v[11:12], v[11:12], v[15:16], -v[19:20]
	v_fma_f64 v[15:16], v[38:39], v[26:27], v[28:29]
	v_fma_f64 v[7:8], v[40:41], s[44:45], v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[9:10], v[9:10], v[13:14], v[30:31]
	v_fma_f64 v[11:12], v[46:47], s[44:45], v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[34:35], v[15:16]
	v_and_b32_e32 v2, 1, v23
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_add_f64 v[7:8], v[36:37], v[9:10]
	v_add_f64 v[9:10], v[17:18], -v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v5, v13, vcc_lo
	v_and_b32_e32 v5, 1, v25
	v_cndmask_b32_e64 v2, 0, v2, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s1, 0, v5
	v_xor_b32_e32 v5, 0x80000000, v6
	v_cndmask_b32_e64 v6, v7, v9, s1
	v_cndmask_b32_e64 v7, v8, v10, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v5, v5, v14, vcc_lo
	v_xor_b32_e32 v3, v7, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v7, v5, v4
	v_cndmask_b32_e64 v4, 0, v6, s0
	v_cndmask_b32_e64 v5, 0x7ff80000, v3, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v3, 0x7ff80000, v7, s0
	s_mul_i32 s0, s33, 0x3fe
	v_cvt_f32_f64_e32 v4, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v2, v[2:3]
	v_and_b32_e32 v5, s0, v0
	v_add_lshl_u32 v3, v22, v5, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_lshl_add_u32 v5, s33, 2, v3
	ds_load_b32 v6, v5
	ds_load_b32 v7, v3
	s_lshl_b32 s33, s33, 1
	s_cmpk_gt_i32 s33, 0x7f
	s_waitcnt lgkmcnt(1)
	v_mul_f32_e32 v8, v6, v4
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v4, v7, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v8, v7, v2
	v_fmac_f32_e32 v4, v6, v2
	ds_store_b32 v3, v8
	ds_store_b32 v5, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_1
; %bb.10:
	ds_load_b32 v1, v21
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[2:3]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16hartleyTransformPfS_
		.amdhsa_group_segment_fixed_size 512
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 50
		.amdhsa_next_free_sgpr 46
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16hartleyTransformPfS_, .Lfunc_end0-_Z16hartleyTransformPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2908
; NumSgprs: 48
; NumVgprs: 50
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 512 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 6
; NumSGPRsForWavesPerEU: 48
; NumVGPRsForWavesPerEU: 50
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 512
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16hartleyTransformPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     48
    .sgpr_spill_count: 0
    .symbol:         _Z16hartleyTransformPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     50
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
