#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>

#define GRID_SIZE 16384
#define BLOCK_SIZE 32
#define SHARED_MEM_SIZE (BLOCK_SIZE + 2) * (BLOCK_SIZE + 2)

// Structure to hold cloth grid point properties
struct ClothPoint {
    float x, y, z;
    float vx, vy, vz;
};

// CUDA kernel for cloth simulation
__global__ void clothSimulationKernel(ClothPoint* d_clothGrid, int width, int height, float dt) {
    extern __shared__ ClothPoint sharedMem[];

    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int bx = blockIdx.x;
    int by = blockIdx.y;

    int idx = (by * blockDim.y + ty) * width + (bx * blockDim.x + tx);

    // Load data into shared memory with halo
    if (by * blockDim.y + ty < height && bx * blockDim.x + tx < width) {
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)] = d_clothGrid[idx];
    } else {
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)].x = 0.0f;
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)].y = 0.0f;
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)].z = 0.0f;
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)].vx = 0.0f;
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)].vy = 0.0f;
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)].vz = 0.0f;
    }

    // Load halo elements
    if (tx == 0 && bx * blockDim.x > 0) {
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2)] = d_clothGrid[idx - 1];
    }
    if (tx == blockDim.x - 1 && bx * blockDim.x + blockDim.x < width) {
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + blockDim.x + 1] = d_clothGrid[idx + 1];
    }
    if (ty == 0 && by * blockDim.y > 0) {
        sharedMem[tx + 1] = d_clothGrid[idx - width];
    }
    if (ty == blockDim.y - 1 && by * blockDim.y + blockDim.y < height) {
        sharedMem[(blockDim.y + 1) * (BLOCK_SIZE + 2) + tx + 1] = d_clothGrid[idx + width];
    }

    // Handle corner cases
    if (tx == 0 && ty == 0 && bx * blockDim.x > 0 && by * blockDim.y > 0) {
        sharedMem[0] = d_clothGrid[idx - width - 1];
    }
    if (tx == blockDim.x - 1 && ty == 0 && bx * blockDim.x + blockDim.x < width && by * blockDim.y > 0) {
        sharedMem[blockDim.x + 1] = d_clothGrid[idx - width + 1];
    }
    if (tx == 0 && ty == blockDim.y - 1 && bx * blockDim.x > 0 && by * blockDim.y + blockDim.y < height) {
        sharedMem[(blockDim.y + 1) * (BLOCK_SIZE + 2)] = d_clothGrid[idx + width - 1];
    }
    if (tx == blockDim.x - 1 && ty == blockDim.y - 1 && bx * blockDim.x + blockDim.x < width && by * blockDim.y + blockDim.y < height) {
        sharedMem[(blockDim.y + 2) * (BLOCK_SIZE + 2) - 1] = d_clothGrid[idx + width + 1];
    }

    __syncthreads();

    // Simple Verlet integration step
    if (by * blockDim.y + ty < height && bx * blockDim.x + tx < width) {
        ClothPoint& point = sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)];
        float new_x = 2 * point.x - point.x + point.vx * dt;
        float new_y = 2 * point.y - point.y + point.vy * dt;
        float new_z = 2 * point.z - point.z + point.vz * dt;

        // Simple gravity
        float gravity = -9.81f;
        point.vz += gravity * dt;

        // Update position
        point.x = new_x;
        point.y = new_y;
        point.z = new_z;

        // Write back to global memory
        d_clothGrid[idx] = point;
    }
}

int main() {
    ClothPoint* h_clothGrid = new ClothPoint[GRID_SIZE * GRID_SIZE];
    ClothPoint* d_clothGrid;

    // Initialize cloth grid with random positions and zero velocities
    curandGenerator_t gen;
    curandCreateGenerator(&gen, CURAND_RNG_PSEUDO_DEFAULT);
    curandSetPseudoRandomGeneratorSeed(gen, 1234ULL);
    curandGenerateUniform(gen, (float*)h_clothGrid, 3 * GRID_SIZE * GRID_SIZE);
    for (int i = 0; i < GRID_SIZE * GRID_SIZE; ++i) {
        h_clothGrid[i].vx = 0.0f;
        h_clothGrid[i].vy = 0.0f;
        h_clothGrid[i].vz = 0.0f;
    }

    // Allocate device memory
    cudaError_t err = cudaMalloc((void**)&d_clothGrid, GRID_SIZE * GRID_SIZE * sizeof(ClothPoint));
    if (err != cudaSuccess) {
        std::cerr << "Failed to allocate device memory: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy initial data to device
    err = cudaMemcpy(d_clothGrid, h_clothGrid, GRID_SIZE * GRID_SIZE * sizeof(ClothPoint), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy data to device: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Launch kernel
    dim3 threadsPerBlock(BLOCK_SIZE, BLOCK_SIZE);
    dim3 blocksPerGrid(GRID_SIZE / BLOCK_SIZE, GRID_SIZE / BLOCK_SIZE);
    clothSimulationKernel<<<blocksPerGrid, threadsPerBlock, SHARED_MEM_SIZE * sizeof(ClothPoint)>>>(d_clothGrid, GRID_SIZE, GRID_SIZE, 0.01f);

    // Check for errors in kernel launch
    err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "Kernel launch failed: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy results back to host
    err = cudaMemcpy(h_clothGrid, d_clothGrid, GRID_SIZE * GRID_SIZE * sizeof(ClothPoint), cudaMemcpyDeviceToHost);
    if (err != cudaSuccess) {
        std::cerr << "Failed to copy data from device: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Free device memory
    cudaFree(d_clothGrid);

    // Free host memory
    delete[] h_clothGrid;

    // Destroy random number generator
    curandDestroyGenerator(gen);

    std::cout << "Cloth simulation completed successfully." << std::endl;

    return 0;
}
	.file	"tmpxft_000a6352_00000000-6_cuda_code_071194.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3852:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3852:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4506:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4506:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z55__device_stub__Z21clothSimulationKernelP10ClothPointiifP10ClothPointiif
	.type	_Z55__device_stub__Z21clothSimulationKernelP10ClothPointiifP10ClothPointiif, @function
_Z55__device_stub__Z21clothSimulationKernelP10ClothPointiifP10ClothPointiif:
.LFB3874:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z21clothSimulationKernelP10ClothPointiif(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L3:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3874:
	.size	_Z55__device_stub__Z21clothSimulationKernelP10ClothPointiifP10ClothPointiif, .-_Z55__device_stub__Z21clothSimulationKernelP10ClothPointiifP10ClothPointiif
	.globl	_Z21clothSimulationKernelP10ClothPointiif
	.type	_Z21clothSimulationKernelP10ClothPointiif, @function
_Z21clothSimulationKernelP10ClothPointiif:
.LFB3875:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z21clothSimulationKernelP10ClothPointiifP10ClothPointiif
	.cfi_endproc
.LFE3875:
	.size	_Z21clothSimulationKernelP10ClothPointiif, .-_Z21clothSimulationKernelP10ClothPointiif
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Failed to allocate device memory: "
.LC2:
	.string	"Failed to copy data to device: "
.LC4:
	.string	"Kernel launch failed: "
.LC5:
	.string	"Failed to copy data from device: "
.LC6:
	.string	"Cloth simulation completed successfully."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3849:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movabsq	$6442450944, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%r12, %rdi
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	leaq	8(%rsp), %rdi
	movl	$100, %esi
	movq	%rax, %rbx
	call	curandCreateGenerator@PLT
	movq	8(%rsp), %rdi
	movl	$1234, %esi
	call	curandSetPseudoRandomGeneratorSeed@PLT
	movq	8(%rsp), %rdi
	movl	$805306368, %edx
	movq	%rbx, %rsi
	call	curandGenerateUniform@PLT
.L10:
	movl	$0x00000000, 12(%rbx,%rbp)
	movl	$0x00000000, 16(%rbx,%rbp)
	movl	$0x00000000, 20(%rbx,%rbp)
	addq	$24, %rbp
	cmpq	%r12, %rbp
	jne	.L10
	movq	%rsp, %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L11
	leaq	_ZSt4cerr(%rip), %rdi
	leaq	.LC1(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %edi
	movq	%rax, %rbx
	jmp	.L21
.L11:
	movq	(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L13
	leaq	.LC2(%rip), %rsi
.L22:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %edi
	movq	%rax, %rbx
.L21:
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	orl	$-1, %eax
	jmp	.L9
.L13:
	xorl	%r9d, %r9d
	movl	$27744, %r8d
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	movabsq	$2199023256064, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	(%rsp), %rdi
	movl	$16384, %edx
	movl	$16384, %esi
	movss	.LC3(%rip), %xmm0
	call	_Z55__device_stub__Z21clothSimulationKernelP10ClothPointiifP10ClothPointiif
.L15:
	call	cudaGetLastError@PLT
	leaq	.LC4(%rip), %rsi
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L22
	movq	(%rsp), %rsi
	movl	$3, %edx
	movl	$2, %ecx
	movq	%rbx, %rdi
	salq	$31, %rdx
	call	cudaMemcpy@PLT
	leaq	.LC5(%rip), %rsi
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L22
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	8(%rsp), %rdi
	call	curandDestroyGenerator@PLT
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%eax, %eax
.L9:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3849:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z21clothSimulationKernelP10ClothPointiif"
.LC8:
	.string	"precalc_xorwow_matrix"
.LC9:
	.string	"precalc_xorwow_offset_matrix"
.LC10:
	.string	"mrg32k3aM1"
.LC11:
	.string	"mrg32k3aM2"
.LC12:
	.string	"mrg32k3aM1SubSeq"
.LC13:
	.string	"mrg32k3aM2SubSeq"
.LC14:
	.string	"mrg32k3aM1Seq"
.LC15:
	.string	"mrg32k3aM2Seq"
.LC16:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3877:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z21clothSimulationKernelP10ClothPointiif(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3877:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	1008981770
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>

#define GRID_SIZE 16384
#define BLOCK_SIZE 32
#define SHARED_MEM_SIZE (BLOCK_SIZE + 2) * (BLOCK_SIZE + 2)

// Structure to hold cloth grid point properties
struct ClothPoint {
    float x, y, z;
    float vx, vy, vz;
};

// CUDA kernel for cloth simulation
__global__ void clothSimulationKernel(ClothPoint* d_clothGrid, int width, int height, float dt) {
    extern __shared__ ClothPoint sharedMem[];

    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int bx = blockIdx.x;
    int by = blockIdx.y;

    int idx = (by * blockDim.y + ty) * width + (bx * blockDim.x + tx);

    // Load data into shared memory with halo
    if (by * blockDim.y + ty < height && bx * blockDim.x + tx < width) {
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)] = d_clothGrid[idx];
    } else {
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)].x = 0.0f;
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)].y = 0.0f;
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)].z = 0.0f;
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)].vx = 0.0f;
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)].vy = 0.0f;
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)].vz = 0.0f;
    }

    // Load halo elements
    if (tx == 0 && bx * blockDim.x > 0) {
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2)] = d_clothGrid[idx - 1];
    }
    if (tx == blockDim.x - 1 && bx * blockDim.x + blockDim.x < width) {
        sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + blockDim.x + 1] = d_clothGrid[idx + 1];
    }
    if (ty == 0 && by * blockDim.y > 0) {
        sharedMem[tx + 1] = d_clothGrid[idx - width];
    }
    if (ty == blockDim.y - 1 && by * blockDim.y + blockDim.y < height) {
        sharedMem[(blockDim.y + 1) * (BLOCK_SIZE + 2) + tx + 1] = d_clothGrid[idx + width];
    }

    // Handle corner cases
    if (tx == 0 && ty == 0 && bx * blockDim.x > 0 && by * blockDim.y > 0) {
        sharedMem[0] = d_clothGrid[idx - width - 1];
    }
    if (tx == blockDim.x - 1 && ty == 0 && bx * blockDim.x + blockDim.x < width && by * blockDim.y > 0) {
        sharedMem[blockDim.x + 1] = d_clothGrid[idx - width + 1];
    }
    if (tx == 0 && ty == blockDim.y - 1 && bx * blockDim.x > 0 && by * blockDim.y + blockDim.y < height) {
        sharedMem[(blockDim.y + 1) * (BLOCK_SIZE + 2)] = d_clothGrid[idx + width - 1];
    }
    if (tx == blockDim.x - 1 && ty == blockDim.y - 1 && bx * blockDim.x + blockDim.x < width && by * blockDim.y + blockDim.y < height) {
        sharedMem[(blockDim.y + 2) * (BLOCK_SIZE + 2) - 1] = d_clothGrid[idx + width + 1];
    }

    __syncthreads();

    // Simple Verlet integration step
    if (by * blockDim.y + ty < height && bx * blockDim.x + tx < width) {
        ClothPoint& point = sharedMem[(ty + 1) * (BLOCK_SIZE + 2) + (tx + 1)];
        float new_x = 2 * point.x - point.x + point.vx * dt;
        float new_y = 2 * point.y - point.y + point.vy * dt;
        float new_z = 2 * point.z - point.z + point.vz * dt;

        // Simple gravity
        float gravity = -9.81f;
        point.vz += gravity * dt;

        // Update position
        point.x = new_x;
        point.y = new_y;
        point.z = new_z;

        // Write back to global memory
        d_clothGrid[idx] = point;
    }
}

int main() {
    ClothPoint* h_clothGrid = new ClothPoint[GRID_SIZE * GRID_SIZE];
    ClothPoint* d_clothGrid;

    // Initialize cloth grid with random positions and zero velocities
    hiprandGenerator_t gen;
    hiprandCreateGenerator(&gen, HIPRAND_RNG_PSEUDO_DEFAULT);
    hiprandSetPseudoRandomGeneratorSeed(gen, 1234ULL);
    hiprandGenerateUniform(gen, (float*)h_clothGrid, 3 * GRID_SIZE * GRID_SIZE);
    for (int i = 0; i < GRID_SIZE * GRID_SIZE; ++i) {
        h_clothGrid[i].vx = 0.0f;
        h_clothGrid[i].vy = 0.0f;
        h_clothGrid[i].vz = 0.0f;
    }

    // Allocate device memory
    hipError_t err = hipMalloc((void**)&d_clothGrid, GRID_SIZE * GRID_SIZE * sizeof(ClothPoint));
    if (err != hipSuccess) {
        std::cerr << "Failed to allocate device memory: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy initial data to device
    err = hipMemcpy(d_clothGrid, h_clothGrid, GRID_SIZE * GRID_SIZE * sizeof(ClothPoint), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy data to device: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Launch kernel
    dim3 threadsPerBlock(BLOCK_SIZE, BLOCK_SIZE);
    dim3 blocksPerGrid(GRID_SIZE / BLOCK_SIZE, GRID_SIZE / BLOCK_SIZE);
    clothSimulationKernel<<<blocksPerGrid, threadsPerBlock, SHARED_MEM_SIZE * sizeof(ClothPoint)>>>(d_clothGrid, GRID_SIZE, GRID_SIZE, 0.01f);

    // Check for errors in kernel launch
    err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "Kernel launch failed: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy results back to host
    err = hipMemcpy(h_clothGrid, d_clothGrid, GRID_SIZE * GRID_SIZE * sizeof(ClothPoint), hipMemcpyDeviceToHost);
    if (err != hipSuccess) {
        std::cerr << "Failed to copy data from device: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Free device memory
    hipFree(d_clothGrid);

    // Free host memory
    delete[] h_clothGrid;

    // Destroy random number generator
    hiprandDestroyGenerator(gen);

    std::cout << "Cloth simulation completed successfully." << std::endl;

    return 0;
}
	.text
	.file	"cuda_code_071194.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z36__device_stub__clothSimulationKernelP10ClothPointiif # -- Begin function _Z36__device_stub__clothSimulationKernelP10ClothPointiif
	.type	_Z36__device_stub__clothSimulationKernelP10ClothPointiif,@function
_Z36__device_stub__clothSimulationKernelP10ClothPointiif: # @_Z36__device_stub__clothSimulationKernelP10ClothPointiif
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21clothSimulationKernelP10ClothPointiif, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z36__device_stub__clothSimulationKernelP10ClothPointiif, .Lfunc_end0-_Z36__device_stub__clothSimulationKernelP10ClothPointiif
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3c23d70a                      # float 0.00999999977
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$6442450944, %r14               # imm = 0x180000000
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, %rbx
	leaq	16(%rsp), %r15
	movq	%r15, %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hiprandCreateGenerator
	movq	(%r15), %rdi
	movl	$1234, %esi                     # imm = 0x4D2
	callq	hiprandSetPseudoRandomGeneratorSeed
	movq	(%r15), %rdi
	movl	$805306368, %edx                # imm = 0x30000000
	movq	%rbx, %rsi
	callq	hiprandGenerateUniform
	movq	%rbx, %rax
	addq	$20, %rax
	movl	$268435456, %ecx                # imm = 0x10000000
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movq	$0, -8(%rax)
	movl	$0, (%rax)
	addq	$24, %rax
	decq	%rcx
	jne	.LBB1_1
# %bb.2:
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_8
# %bb.3:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$34, %edx
	jmp	.LBB1_4
.LBB1_8:
	movq	8(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_10
# %bb.9:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	movl	$31, %edx
	jmp	.LBB1_4
.LBB1_10:
	movabsq	$2199023256064, %rdi            # imm = 0x20000000200
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$27744, %r8d                    # imm = 0x6C60
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:
	movq	8(%rsp), %rdi
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$16384, %esi                    # imm = 0x4000
	movl	$16384, %edx                    # imm = 0x4000
	callq	_Z36__device_stub__clothSimulationKernelP10ClothPointiif
.LBB1_12:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_14
# %bb.13:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	movl	$22, %edx
	jmp	.LBB1_4
.LBB1_14:
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_16
# %bb.15:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$33, %edx
.LBB1_4:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB1_5
# %bb.6:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_7
.LBB1_5:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_7:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB1_17:
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_16:
	.cfi_def_cfa_offset 64
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	16(%rsp), %rdi
	callq	hiprandDestroyGenerator
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$40, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	xorl	%eax, %eax
	jmp	.LBB1_17
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21clothSimulationKernelP10ClothPointiif, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z21clothSimulationKernelP10ClothPointiif,@object # @_Z21clothSimulationKernelP10ClothPointiif
	.section	.rodata,"a",@progbits
	.globl	_Z21clothSimulationKernelP10ClothPointiif
	.p2align	3, 0x0
_Z21clothSimulationKernelP10ClothPointiif:
	.quad	_Z36__device_stub__clothSimulationKernelP10ClothPointiif
	.size	_Z21clothSimulationKernelP10ClothPointiif, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to allocate device memory: "
	.size	.L.str, 35

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Failed to copy data to device: "
	.size	.L.str.1, 32

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Kernel launch failed: "
	.size	.L.str.2, 23

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to copy data from device: "
	.size	.L.str.3, 34

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Cloth simulation completed successfully."
	.size	.L.str.4, 41

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z21clothSimulationKernelP10ClothPointiif"
	.size	.L__unnamed_1, 42

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z36__device_stub__clothSimulationKernelP10ClothPointiif
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z21clothSimulationKernelP10ClothPointiif
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z21clothSimulationKernelP10ClothPointiif ; -- Begin function _Z21clothSimulationKernelP10ClothPointiif
	.globl	_Z21clothSimulationKernelP10ClothPointiif
	.p2align	8
	.type	_Z21clothSimulationKernelP10ClothPointiif,@function
_Z21clothSimulationKernelP10ClothPointiif: ; @_Z21clothSimulationKernelP10ClothPointiif
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x8
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s10, s2, 16
	s_and_b32 s12, s2, 0xffff
	s_mul_i32 s15, s15, s10
	s_mul_i32 s11, s14, s12
	v_add_nc_u32_e32 v5, s15, v3
	v_add_nc_u32_e32 v4, s11, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, s5, v5
	v_cmp_gt_u32_e64 s2, s4, v4
	v_mad_u64_u32 v[0:1], null, v5, s4, v[4:5]
	v_mad_u32_u24 v1, v3, 34, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s7, vcc_lo, s2
	s_xor_b32 s2, s7, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_xor_b32 s2, exec_lo, s3
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mad_u32_u24 v4, v1, 24, 0
	v_mov_b32_e32 v5, 0
	ds_store_2addr_b32 v4, v5, v5 offset0:210 offset1:211
	ds_store_2addr_b32 v4, v5, v5 offset0:212 offset1:213
	ds_store_2addr_b32 v4, v5, v5 offset0:214 offset1:215
.LBB0_2:                                ; %Flow
	s_or_saveexec_b32 s2, s2
	s_load_b64 s[8:9], s[0:1], 0x0
	s_xor_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_4
; %bb.3:
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[8:9], null, v0, 24, s[8:9]
	v_mad_u32_u24 v12, v1, 24, 0
	s_clause 0x1
	global_load_b128 v[4:7], v[8:9], off offset:8
	global_load_b128 v[8:11], v[8:9], off
	s_waitcnt vmcnt(1)
	ds_store_2addr_b32 v12, v6, v7 offset0:214 offset1:215
	ds_store_2addr_b32 v12, v4, v5 offset0:212 offset1:213
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v12, v10, v11 offset0:212 offset1:213
	ds_store_2addr_b32 v12, v8, v9 offset0:210 offset1:211
.LBB0_4:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_ne_u32_e32 vcc_lo, 0, v2
	s_cmp_eq_u32 s11, 0
	s_cselect_b32 s16, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s16
	s_xor_b32 s1, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_6
; %bb.5:
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[8:9], null, v0, 24, s[8:9]
	v_mul_u32_u24_e32 v12, 34, v3
	s_clause 0x1
	global_load_b128 v[4:7], v[8:9], off offset:-16
	global_load_b128 v[8:11], v[8:9], off offset:-24
	v_mad_u32_u24 v12, v12, 24, 0
	s_waitcnt vmcnt(1)
	ds_store_2addr_b32 v12, v6, v7 offset0:208 offset1:209
	ds_store_2addr_b32 v12, v4, v5 offset0:206 offset1:207
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v12, v10, v11 offset0:206 offset1:207
	ds_store_2addr_b32 v12, v8, v9 offset0:204 offset1:205
.LBB0_6:
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s0, s12, -1
	s_add_i32 s14, s11, s12
	v_cmp_eq_u32_e64 s0, s0, v2
	s_cmp_lt_u32 s14, s4
	s_cselect_b32 s13, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s0, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s2
	s_cbranch_execz .LBB0_8
; %bb.7:
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[8:9], null, v0, 24, s[8:9]
	v_mad_u32_u24 v12, v3, 34, s12
	s_clause 0x1
	global_load_b128 v[4:7], v[8:9], off offset:32
	global_load_b128 v[8:11], v[8:9], off offset:24
	v_mad_u32_u24 v12, v12, 24, 0
	s_waitcnt vmcnt(1)
	ds_store_2addr_b32 v12, v6, v7 offset0:214 offset1:215
	ds_store_2addr_b32 v12, v4, v5 offset0:212 offset1:213
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v12, v10, v11 offset0:212 offset1:213
	ds_store_2addr_b32 v12, v8, v9 offset0:210 offset1:211
.LBB0_8:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_eq_u32_e64 s2, 0, v3
	s_cmp_lg_u32 s15, 0
	v_subrev_nc_u32_e32 v5, s4, v0
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s3
	s_cbranch_execz .LBB0_10
; %bb.9:
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[10:11], null, v5, 24, s[8:9]
	v_mad_u32_u24 v4, v2, 24, 0
	s_clause 0x1
	global_load_b128 v[6:9], v[10:11], off offset:8
	global_load_b128 v[10:13], v[10:11], off
	s_waitcnt vmcnt(1)
	ds_store_2addr_b32 v4, v8, v9 offset0:10 offset1:11
	ds_store_2addr_b32 v4, v6, v7 offset0:8 offset1:9
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v4, v12, v13 offset0:8 offset1:9
	ds_store_2addr_b32 v4, v10, v11 offset0:6 offset1:7
.LBB0_10:
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s1, s10, -1
	s_add_i32 s3, s15, s10
	v_cmp_eq_u32_e64 s1, s1, v3
	s_cmp_lt_u32 s3, s5
	v_add_nc_u32_e32 v4, s4, v0
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s17, s1, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s17
	s_cbranch_execz .LBB0_12
; %bb.11:
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[10:11], null, v4, 24, s[8:9]
	v_mad_u64_u32 v[14:15], null, s10, 34, v[2:3]
	s_clause 0x1
	global_load_b128 v[6:9], v[10:11], off offset:8
	global_load_b128 v[10:13], v[10:11], off
	v_mad_u32_u24 v14, v14, 24, 0
	s_waitcnt vmcnt(1)
	ds_store_2addr_b32 v14, v8, v9 offset0:214 offset1:215
	ds_store_2addr_b32 v14, v6, v7 offset0:212 offset1:213
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v14, v12, v13 offset0:212 offset1:213
	ds_store_2addr_b32 v14, v10, v11 offset0:210 offset1:211
.LBB0_12:
	s_or_b32 exec_lo, exec_lo, s3
	v_or_b32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s3, 0, v2
	s_or_b32 s16, s3, s16
	s_cmp_eq_u32 s15, 0
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s15, s3, s16
	s_xor_b32 s16, s15, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s15, s16
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_xad_u32 v6, s4, -1, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_i64_i32 v[2:3], null, v6, 24, s[8:9]
	s_clause 0x1
	global_load_b128 v[6:9], v[2:3], off offset:8
	global_load_b128 v[10:13], v[2:3], off
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(1)
	ds_store_2addr_b32 v2, v8, v9 offset0:4 offset1:5
	ds_store_2addr_b32 v2, v6, v7 offset0:2 offset1:3
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v2, v12, v13 offset0:2 offset1:3
	ds_store_2addr_b32 v2, v10, v11 offset1:1
.LBB0_14:
	s_or_b32 exec_lo, exec_lo, s15
	s_and_b32 s2, s2, s0
	s_cmp_ge_u32 s14, s4
	s_cselect_b32 s4, -1, 0
	s_xor_b32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s2, s4
	s_or_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s2, -1
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_16
; %bb.15:
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[2:3], null, v5, 24, s[8:9]
	s_mul_i32 s12, s12, 24
	s_clause 0x1
	global_load_b128 v[5:8], v[2:3], off offset:32
	global_load_b128 v[9:12], v[2:3], off offset:24
	s_add_i32 s3, s12, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s3
	s_waitcnt vmcnt(1)
	ds_store_2addr_b32 v2, v7, v8 offset0:10 offset1:11
	ds_store_2addr_b32 v2, v5, v6 offset0:8 offset1:9
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v2, v11, v12 offset0:8 offset1:9
	ds_store_2addr_b32 v2, v9, v10 offset0:6 offset1:7
.LBB0_16:
	s_or_b32 exec_lo, exec_lo, s2
	s_cmp_lg_u32 s11, 0
	s_mulk_i32 s10, 0x330
	s_cselect_b32 s2, -1, 0
	s_xor_b32 s3, vcc_lo, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s1, s3
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s5, s2
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_18
; %bb.17:
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[2:3], null, v4, 24, s[8:9]
	s_add_i32 s3, s10, 0
	s_clause 0x1
	global_load_b128 v[5:8], v[2:3], off offset:-16
	global_load_b128 v[9:12], v[2:3], off offset:-24
	v_mov_b32_e32 v2, s3
	s_waitcnt vmcnt(1)
	ds_store_2addr_b32 v2, v7, v8 offset0:208 offset1:209
	ds_store_2addr_b32 v2, v5, v6 offset0:206 offset1:207
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v2, v11, v12 offset0:206 offset1:207
	ds_store_2addr_b32 v2, v9, v10 offset0:204 offset1:205
.LBB0_18:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_b32 s0, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s13
	s_and_b32 s1, s5, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_20
; %bb.19:
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[6:7], null, v4, 24, s[8:9]
	s_add_i32 s1, s10, 0
	s_clause 0x1
	global_load_b128 v[2:5], v[6:7], off offset:32
	global_load_b128 v[6:9], v[6:7], off offset:24
	s_add_i32 s3, s1, 0x658
	s_add_i32 s2, s1, 0x648
	s_addk_i32 s1, 0x650
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v10, s3 :: v_dual_mov_b32 v11, s1
	v_mov_b32_e32 v12, s2
	s_waitcnt vmcnt(1)
	ds_store_2addr_b32 v10, v4, v5 offset1:1
	ds_store_2addr_b32 v11, v2, v3 offset1:1
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v11, v8, v9 offset1:1
	ds_store_2addr_b32 v12, v6, v7 offset1:1
.LBB0_20:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB0_22
; %bb.21:
	v_mad_u32_u24 v11, v1, 24, 0
	v_mad_i64_i32 v[9:10], null, v0, 24, s[8:9]
	ds_load_2addr_b32 v[4:5], v11 offset0:212 offset1:213
	ds_load_2addr_b32 v[6:7], v11 offset0:214 offset1:215
	ds_load_2addr_b32 v[1:2], v11 offset0:210 offset1:211
	s_waitcnt lgkmcnt(2)
	v_fma_f32 v3, v4, 2.0, -v4
	s_waitcnt lgkmcnt(1)
	v_fmamk_f32 v4, s6, 0xc11cf5c3, v7
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v2, v2, 2.0, -v2
	v_fma_f32 v1, v1, 2.0, -v1
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_fmac_f32 v3, s6, v7 :: v_dual_fmac_f32 v2, s6, v6
	ds_store_2addr_b32 v11, v3, v4 offset0:212 offset1:215
	ds_load_2addr_b32 v[3:4], v11 offset0:212 offset1:213
	ds_load_2addr_b32 v[7:8], v11 offset0:214 offset1:215
	s_waitcnt lgkmcnt(1)
	v_dual_fmac_f32 v1, s6, v5 :: v_dual_mov_b32 v6, v4
	v_mov_b32_e32 v5, v3
	ds_store_2addr_b32 v11, v1, v2 offset0:210 offset1:211
	global_store_b128 v[9:10], v[1:4], off
	s_waitcnt lgkmcnt(1)
	global_store_b128 v[9:10], v[5:8], off offset:8
.LBB0_22:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21clothSimulationKernelP10ClothPointiif
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z21clothSimulationKernelP10ClothPointiif, .Lfunc_end0-_Z21clothSimulationKernelP10ClothPointiif
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1544
; NumSgprs: 20
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21clothSimulationKernelP10ClothPointiif
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z21clothSimulationKernelP10ClothPointiif.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
