#include <iostream>
#include <cuda_runtime.h>

#define TABLE_SIZE 256
#define WARP_SIZE 32
#define NUM_GPUS 2

__device__ unsigned int hash_table[TABLE_SIZE];

// Simple hash function for demonstration
__device__ unsigned int hash(unsigned int key) {
    return key % TABLE_SIZE;
}

// Kernel to insert keys into the hash table
__global__ void insert_keys(unsigned int* keys, int num_keys) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < num_keys) {
        unsigned int key = keys[idx];
        unsigned int h = hash(key);
        int warp_id = threadIdx.x / WARP_SIZE;
        int lane_id = threadIdx.x % WARP_SIZE;
        
        // Use atomic operations to handle concurrent writes
        atomicAdd(&hash_table[h], 1);
    }
}

// Kernel to clear the hash table
__global__ void clear_table() {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < TABLE_SIZE) {
        hash_table[idx] = 0;
    }
}

int main() {
    int num_keys = 1024;
    unsigned int* h_keys = new unsigned int[num_keys];
    for (int i = 0; i < num_keys; ++i) {
        h_keys[i] = rand() % TABLE_SIZE;
    }

    unsigned int* d_keys[NUM_GPUS];
    int num_keys_per_gpu = num_keys / NUM_GPUS;
    int num_keys_last_gpu = num_keys - (NUM_GPUS - 1) * num_keys_per_gpu;

    cudaSetDevice(0);
    cudaError_t err = cudaMalloc(&d_keys[0], num_keys_per_gpu * sizeof(unsigned int));
    if (err != cudaSuccess) {
        std::cerr << "Error allocating memory on GPU 0: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMemcpy(d_keys[0], h_keys, num_keys_per_gpu * sizeof(unsigned int), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Error copying data to GPU 0: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    cudaSetDevice(1);
    err = cudaMalloc(&d_keys[1], num_keys_last_gpu * sizeof(unsigned int));
    if (err != cudaSuccess) {
        std::cerr << "Error allocating memory on GPU 1: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMemcpy(d_keys[1], h_keys + num_keys_per_gpu, num_keys_last_gpu * sizeof(unsigned int), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "Error copying data to GPU 1: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Clear the hash table
    dim3 threadsPerBlock(256);
    dim3 blocksPerGrid((TABLE_SIZE + threadsPerBlock.x - 1) / threadsPerBlock.x);
    cudaSetDevice(0);
    clear_table<<<blocksPerGrid, threadsPerBlock>>>();
    cudaDeviceSynchronize();

    // Insert keys on GPU 0
    blocksPerGrid = (num_keys_per_gpu + threadsPerBlock.x - 1) / threadsPerBlock.x;
    cudaSetDevice(0);
    insert_keys<<<blocksPerGrid, threadsPerBlock>>>(d_keys[0], num_keys_per_gpu);
    cudaDeviceSynchronize();

    // Insert keys on GPU 1
    blocksPerGrid = (num_keys_last_gpu + threadsPerBlock.x - 1) / threadsPerBlock.x;
    cudaSetDevice(1);
    insert_keys<<<blocksPerGrid, threadsPerBlock>>>(d_keys[1], num_keys_last_gpu);
    cudaDeviceSynchronize();

    // Free device memory
    cudaSetDevice(0);
    cudaFree(d_keys[0]);
    cudaSetDevice(1);
    cudaFree(d_keys[1]);

    delete[] h_keys;

    std::cout << "Hash table insertion complete." << std::endl;

    return 0;
}
	.file	"tmpxft_000dbfdf_00000000-6_cuda_code_045670.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4296:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4296:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z4hashj
	.type	_Z4hashj, @function
_Z4hashj:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z4hashj, .-_Z4hashj
	.globl	_Z32__device_stub__Z11insert_keysPjiPji
	.type	_Z32__device_stub__Z11insert_keysPjiPji, @function
_Z32__device_stub__Z11insert_keysPjiPji:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L5
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11insert_keysPji(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L5:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z32__device_stub__Z11insert_keysPjiPji, .-_Z32__device_stub__Z11insert_keysPjiPji
	.globl	_Z11insert_keysPji
	.type	_Z11insert_keysPji, @function
_Z11insert_keysPji:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z11insert_keysPjiPji
	.cfi_endproc
.LFE3662:
	.size	_Z11insert_keysPji, .-_Z11insert_keysPji
	.globl	_Z30__device_stub__Z11clear_tablevv
	.type	_Z30__device_stub__Z11clear_tablevv, @function
_Z30__device_stub__Z11clear_tablevv:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z11clear_tablev(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L11:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z30__device_stub__Z11clear_tablevv, .-_Z30__device_stub__Z11clear_tablevv
	.globl	_Z11clear_tablev
	.type	_Z11clear_tablev, @function
_Z11clear_tablev:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z11clear_tablevv
	.cfi_endproc
.LFE3664:
	.size	_Z11clear_tablev, .-_Z11clear_tablev
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error allocating memory on GPU 0: "
.LC1:
	.string	"Error copying data to GPU 0: "
.LC2:
	.string	"Error allocating memory on GPU 1: "
.LC3:
	.string	"Error copying data to GPU 1: "
.LC4:
	.string	"Hash table insertion complete."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$4096, %edi
	movl	$256, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movq	%rax, %rbx
.L17:
	call	rand@PLT
	cltd
	idivl	%r12d
	movl	%edx, (%rbx,%rbp,4)
	incq	%rbp
	cmpq	$1024, %rbp
	jne	.L17
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movl	$2048, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC0(%rip), %rsi
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L30
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$2048, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L20
	leaq	.LC1(%rip), %rsi
.L30:
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	orl	$-1, %eax
	jmp	.L16
.L20:
	movl	$1, %edi
	call	cudaSetDevice@PLT
	movl	$2048, %esi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC2(%rip), %rsi
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L30
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$2048, %edx
	leaq	2048(%rbx), %rsi
	call	cudaMemcpy@PLT
	leaq	.LC3(%rip), %rsi
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L30
	xorl	%edi, %edi
	movl	$1, 20(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	call	cudaSetDevice@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	12(%rsp), %rdi
	movl	20(%rsp), %esi
	salq	$8, %rdx
	movl	$1, %ecx
	movq	%rdx, (%rsp)
	movl	$1, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	call	_Z30__device_stub__Z11clear_tablevv
.L24:
	call	cudaDeviceSynchronize@PLT
	xorl	%edi, %edi
	movl	$2, 12(%rsp)
	call	cudaSetDevice@PLT
	movl	8(%rsp), %ecx
	movq	(%rsp), %rdx
	xorl	%r9d, %r9d
	movq	12(%rsp), %rdi
	movl	20(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	24(%rsp), %rdi
	movl	$512, %esi
	call	_Z32__device_stub__Z11insert_keysPjiPji
.L25:
	call	cudaDeviceSynchronize@PLT
	movl	$1, %edi
	call	cudaSetDevice@PLT
	movl	8(%rsp), %ecx
	movq	(%rsp), %rdx
	xorl	%r9d, %r9d
	movq	12(%rsp), %rdi
	movl	20(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	32(%rsp), %rdi
	movl	$512, %esi
	call	_Z32__device_stub__Z11insert_keysPjiPji
.L26:
	call	cudaDeviceSynchronize@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %edi
	call	cudaSetDevice@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%eax, %eax
.L16:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z11clear_tablev"
.LC6:
	.string	"_Z11insert_keysPji"
.LC7:
	.string	"hash_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3666:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11clear_tablev(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11insert_keysPji(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movl	$1024, %r9d
	leaq	_ZL10hash_table(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3666:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL10hash_table
	.comm	_ZL10hash_table,1024,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

#define TABLE_SIZE 256
#define WARP_SIZE 32
#define NUM_GPUS 2

__device__ unsigned int hash_table[TABLE_SIZE];

// Simple hash function for demonstration
__device__ unsigned int hash(unsigned int key) {
    return key % TABLE_SIZE;
}

// Kernel to insert keys into the hash table
__global__ void insert_keys(unsigned int* keys, int num_keys) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < num_keys) {
        unsigned int key = keys[idx];
        unsigned int h = hash(key);
        int warp_id = threadIdx.x / WARP_SIZE;
        int lane_id = threadIdx.x % WARP_SIZE;
        
        // Use atomic operations to handle concurrent writes
        atomicAdd(&hash_table[h], 1);
    }
}

// Kernel to clear the hash table
__global__ void clear_table() {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < TABLE_SIZE) {
        hash_table[idx] = 0;
    }
}

int main() {
    int num_keys = 1024;
    unsigned int* h_keys = new unsigned int[num_keys];
    for (int i = 0; i < num_keys; ++i) {
        h_keys[i] = rand() % TABLE_SIZE;
    }

    unsigned int* d_keys[NUM_GPUS];
    int num_keys_per_gpu = num_keys / NUM_GPUS;
    int num_keys_last_gpu = num_keys - (NUM_GPUS - 1) * num_keys_per_gpu;

    hipSetDevice(0);
    hipError_t err = hipMalloc(&d_keys[0], num_keys_per_gpu * sizeof(unsigned int));
    if (err != hipSuccess) {
        std::cerr << "Error allocating memory on GPU 0: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMemcpy(d_keys[0], h_keys, num_keys_per_gpu * sizeof(unsigned int), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Error copying data to GPU 0: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    hipSetDevice(1);
    err = hipMalloc(&d_keys[1], num_keys_last_gpu * sizeof(unsigned int));
    if (err != hipSuccess) {
        std::cerr << "Error allocating memory on GPU 1: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMemcpy(d_keys[1], h_keys + num_keys_per_gpu, num_keys_last_gpu * sizeof(unsigned int), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "Error copying data to GPU 1: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Clear the hash table
    dim3 threadsPerBlock(256);
    dim3 blocksPerGrid((TABLE_SIZE + threadsPerBlock.x - 1) / threadsPerBlock.x);
    hipSetDevice(0);
    clear_table<<<blocksPerGrid, threadsPerBlock>>>();
    hipDeviceSynchronize();

    // Insert keys on GPU 0
    blocksPerGrid = (num_keys_per_gpu + threadsPerBlock.x - 1) / threadsPerBlock.x;
    hipSetDevice(0);
    insert_keys<<<blocksPerGrid, threadsPerBlock>>>(d_keys[0], num_keys_per_gpu);
    hipDeviceSynchronize();

    // Insert keys on GPU 1
    blocksPerGrid = (num_keys_last_gpu + threadsPerBlock.x - 1) / threadsPerBlock.x;
    hipSetDevice(1);
    insert_keys<<<blocksPerGrid, threadsPerBlock>>>(d_keys[1], num_keys_last_gpu);
    hipDeviceSynchronize();

    // Free device memory
    hipSetDevice(0);
    hipFree(d_keys[0]);
    hipSetDevice(1);
    hipFree(d_keys[1]);

    delete[] h_keys;

    std::cout << "Hash table insertion complete." << std::endl;

    return 0;
}
	.text
	.file	"cuda_code_045670.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z26__device_stub__insert_keysPji # -- Begin function _Z26__device_stub__insert_keysPji
	.type	_Z26__device_stub__insert_keysPji,@function
_Z26__device_stub__insert_keysPji:      # @_Z26__device_stub__insert_keysPji
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11insert_keysPji, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__insert_keysPji, .Lfunc_end0-_Z26__device_stub__insert_keysPji
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__clear_tablev # -- Begin function _Z26__device_stub__clear_tablev
	.type	_Z26__device_stub__clear_tablev,@function
_Z26__device_stub__clear_tablev:        # @_Z26__device_stub__clear_tablev
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_Z11clear_tablev, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z26__device_stub__clear_tablev, .Lfunc_end1-_Z26__device_stub__clear_tablev
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4096, %edi                     # imm = 0x1000
	callq	_Znam
	movq	%rax, %rbx
	xorl	%r14d, %r14d
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	255(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-256, %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r14,4)
	incq	%r14
	cmpq	$1024, %r14                     # imm = 0x400
	jne	.LBB2_1
# %bb.2:
	xorl	%edi, %edi
	callq	hipSetDevice
	movq	%rsp, %rdi
	movl	$2048, %esi                     # imm = 0x800
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB2_9
# %bb.3:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
.LBB2_4:
	movl	$34, %edx
	jmp	.LBB2_5
.LBB2_9:
	movq	(%rsp), %rdi
	movl	$2048, %edx                     # imm = 0x800
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB2_12
# %bb.10:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
.LBB2_11:
	movl	$29, %edx
.LBB2_5:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB2_6
# %bb.7:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_8
.LBB2_6:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_8:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %r14d
.LBB2_23:
	movl	%r14d, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_12:
	.cfi_def_cfa_offset 64
	movl	$1, %edi
	callq	hipSetDevice
	leaq	8(%rsp), %rdi
	movl	$2048, %esi                     # imm = 0x800
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB2_14
# %bb.13:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	jmp	.LBB2_4
.LBB2_14:
	movq	8(%rsp), %rdi
	movq	%rbx, %rsi
	addq	$2048, %rsi                     # imm = 0x800
	movl	$2048, %edx                     # imm = 0x800
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB2_16
# %bb.15:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	jmp	.LBB2_11
.LBB2_16:
	movabsq	$4294967552, %r15               # imm = 0x100000100
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	-255(%r15), %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_18
# %bb.17:
	callq	_Z26__device_stub__clear_tablev
.LBB2_18:
	callq	hipDeviceSynchronize
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	-254(%r15), %r12
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_20
# %bb.19:
	movq	(%rsp), %rdi
	movl	$512, %esi                      # imm = 0x200
	callq	_Z26__device_stub__insert_keysPji
.LBB2_20:
	callq	hipDeviceSynchronize
	movl	$1, %edi
	callq	hipSetDevice
	xorl	%r14d, %r14d
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_22
# %bb.21:
	movq	8(%rsp), %rdi
	movl	$512, %esi                      # imm = 0x200
	callq	_Z26__device_stub__insert_keysPji
.LBB2_22:
	callq	hipDeviceSynchronize
	xorl	%edi, %edi
	callq	hipSetDevice
	movq	(%rsp), %rdi
	callq	hipFree
	movl	$1, %edi
	callq	hipSetDevice
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$30, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	jmp	.LBB2_23
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11insert_keysPji, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11clear_tablev, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$hash_table, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$1024, %r9d                     # imm = 0x400
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	hash_table,@object              # @hash_table
	.local	hash_table
	.comm	hash_table,1024,16
	.type	_Z11insert_keysPji,@object      # @_Z11insert_keysPji
	.section	.rodata,"a",@progbits
	.globl	_Z11insert_keysPji
	.p2align	3, 0x0
_Z11insert_keysPji:
	.quad	_Z26__device_stub__insert_keysPji
	.size	_Z11insert_keysPji, 8

	.type	_Z11clear_tablev,@object        # @_Z11clear_tablev
	.globl	_Z11clear_tablev
	.p2align	3, 0x0
_Z11clear_tablev:
	.quad	_Z26__device_stub__clear_tablev
	.size	_Z11clear_tablev, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error allocating memory on GPU 0: "
	.size	.L.str, 35

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Error copying data to GPU 0: "
	.size	.L.str.1, 30

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Error allocating memory on GPU 1: "
	.size	.L.str.2, 35

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Error copying data to GPU 1: "
	.size	.L.str.3, 30

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Hash table insertion complete."
	.size	.L.str.4, 31

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11insert_keysPji"
	.size	.L__unnamed_1, 19

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11clear_tablev"
	.size	.L__unnamed_2, 17

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"hash_table"
	.size	.L__unnamed_3, 11

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__insert_keysPji
	.addrsig_sym _Z26__device_stub__clear_tablev
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym hash_table
	.addrsig_sym _Z11insert_keysPji
	.addrsig_sym _Z11clear_tablev
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11insert_keysPji      ; -- Begin function _Z11insert_keysPji
	.globl	_Z11insert_keysPji
	.p2align	8
	.type	_Z11insert_keysPji,@function
_Z11insert_keysPji:                     ; @_Z11insert_keysPji
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, hash_table@rel32@lo+4
	s_addc_u32 s1, s1, hash_table@rel32@hi+12
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v1, 1 :: v_dual_and_b32 v0, 0xff, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	global_atomic_add_u32 v0, v1, s[0:1]
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11insert_keysPji
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11insert_keysPji, .Lfunc_end0-_Z11insert_keysPji
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11clear_tablev        ; -- Begin function _Z11clear_tablev
	.globl	_Z11clear_tablev
	.p2align	8
	.type	_Z11clear_tablev,@function
_Z11clear_tablev:                       ; @_Z11clear_tablev
; %bb.0:
	s_load_b32 s0, s[0:1], 0xc
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_i32_e32 0x100, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, hash_table@rel32@lo+4
	s_addc_u32 s1, s1, hash_table@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_mov_b32_e32 v2, 0
	v_add_co_u32 v0, vcc_lo, v0, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11clear_tablev
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 256
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11clear_tablev, .Lfunc_end1-_Z11clear_tablev
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 124
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	hash_table              ; @hash_table
	.type	hash_table,@object
	.section	.bss,"aw",@nobits
	.globl	hash_table
	.p2align	4, 0x0
hash_table:
	.zero	1024
	.size	hash_table, 1024

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym hash_table
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11insert_keysPji
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11insert_keysPji.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         4
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         12
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         14
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         16
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         18
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         20
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         22
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         40
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         64
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 256
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11clear_tablev
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11clear_tablev.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
