// verlet_integration.cu
// CUDA implementation of Verlet integration for molecular dynamics simulation
// Target architecture: Hopper (Compute Capability 2.0)

#include <cuda_runtime.h>
#include <iostream>
#include <cmath>

// Constants
#define N 1024            // Number of particles
#define BLOCK_SIZE 256    // Block size for CUDA kernel

// Device function to calculate forces (simple Lennard-Jones potential)
__device__ void calculateForces(float4 &force, float4 &pos, float4 *positions) {
    float4 f = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    for (int j = 0; j < N; j++) {
        float4 r = positions[j];
        float dx = pos.x - r.x;
        float dy = pos.y - r.y;
        float dz = pos.z - r.z;
        float r2 = dx * dx + dy * dy + dz * dz;
        if (r2 > 0.0f && r2 < 1.0f) {
            float r6 = r2 * r2 * r2;
            float fac = 24.0f * (2.0f / r6 - 1.0f) / r2 / r6;
            f.x += fac * dx;
            f.y += fac * dy;
            f.z += fac * dz;
        }
    }
    force = f;
}

// CUDA kernel to perform Verlet integration
__global__ void verletIntegration(float4 *positions, float4 *velocities, float4 *forces, float dt) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < N) {
        // Update positions
        float4 pos = positions[idx];
        pos.x += velocities[idx].x * dt + 0.5f * forces[idx].x * dt * dt;
        pos.y += velocities[idx].y * dt + 0.5f * forces[idx].y * dt * dt;
        pos.z += velocities[idx].z * dt + 0.5f * forces[idx].z * dt * dt;

        // Calculate new forces
        float4 newForce;
        calculateForces(newForce, pos, positions);

        // Update velocities
        float4 vel = velocities[idx];
        vel.x += 0.5f * (forces[idx].x + newForce.x) * dt;
        vel.y += 0.5f * (forces[idx].y + newForce.y) * dt;
        vel.z += 0.5f * (forces[idx].z + newForce.z) * dt;

        // Write back updated positions and velocities
        positions[idx] = pos;
        velocities[idx] = vel;
        forces[idx] = newForce;
    }
}

// Host function to initialize particles
void initializeParticles(float4 *positions, float4 *velocities, float4 *forces) {
    for (int i = 0; i < N; i++) {
        positions[i] = make_float4(static_cast<float>(rand()) / RAND_MAX,
                                   static_cast<float>(rand()) / RAND_MAX,
                                   static_cast<float>(rand()) / RAND_MAX,
                                   0.0f);
        velocities[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
        forces[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    }
}

int main() {
    float4 *d_positions, *d_velocities, *d_forces;
    float4 *h_positions = new float4[N];
    float4 *h_velocities = new float4[N];
    float4 *h_forces = new float4[N];
    float dt = 0.01f;
    int numSteps = 100;

    // Initialize particles on host
    initializeParticles(h_positions, h_velocities, h_forces);

    // Allocate device memory
    cudaError_t err = cudaMalloc((void**)&d_positions, N * sizeof(float4));
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_velocities, N * sizeof(float4));
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMalloc((void**)&d_forces, N * sizeof(float4));
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy data from host to device
    err = cudaMemcpy(d_positions, h_positions, N * sizeof(float4), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMemcpy(d_velocities, h_velocities, N * sizeof(float4), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }
    err = cudaMemcpy(d_forces, h_forces, N * sizeof(float4), cudaMemcpyHostToDevice);
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Launch kernel
    dim3 blockSize(BLOCK_SIZE);
    dim3 gridSize((N + blockSize.x - 1) / blockSize.x);
    for (int step = 0; step < numSteps; step++) {
        verletIntegration<<<gridSize, blockSize>>>(d_positions, d_velocities, d_forces, dt);
        err = cudaGetLastError();
        if (err != cudaSuccess) {
            std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
            return -1;
        }
    }

    // Copy data back to host
    err = cudaMemcpy(h_positions, d_positions, N * sizeof(float4), cudaMemcpyDeviceToHost);
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Free device memory
    cudaFree(d_positions);
    cudaFree(d_velocities);
    cudaFree(d_forces);

    // Free host memory
    delete[] h_positions;
    delete[] h_velocities;
    delete[] h_forces;

    return 0;
}
	.file	"tmpxft_0012b77b_00000000-6_cuda_code_049901.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4294:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4294:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z15calculateForcesR6float4S0_PS_
	.type	_Z15calculateForcesR6float4S0_PS_, @function
_Z15calculateForcesR6float4S0_PS_:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z15calculateForcesR6float4S0_PS_, .-_Z15calculateForcesR6float4S0_PS_
	.globl	_Z19initializeParticlesP6float4S0_S0_
	.type	_Z19initializeParticlesP6float4S0_S0_, @function
_Z19initializeParticlesP6float4S0_S0_:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
.L6:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, 12(%rsp)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm1
	mulss	.LC0(%rip), %xmm1
	movss	%xmm1, 8(%rsp)
	call	rand@PLT
	movss	8(%rsp), %xmm1
	movss	12(%rsp), %xmm0
	movl	$0x00000000, 12(%r13,%rbx)
	cvtsi2ssl	%eax, %xmm2
	mulss	.LC0(%rip), %xmm2
	movss	%xmm1, 4(%r13,%rbx)
	movss	%xmm0, 8(%r13,%rbx)
	movss	%xmm2, 0(%r13,%rbx)
	movl	$0x00000000, (%r12,%rbx)
	movl	$0x00000000, 4(%r12,%rbx)
	movl	$0x00000000, 8(%r12,%rbx)
	movl	$0x00000000, 12(%r12,%rbx)
	movl	$0x00000000, 0(%rbp,%rbx)
	movl	$0x00000000, 4(%rbp,%rbx)
	movl	$0x00000000, 8(%rbp,%rbx)
	movl	$0x00000000, 12(%rbp,%rbx)
	addq	$16, %rbx
	cmpq	$16384, %rbx
	jne	.L6
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z19initializeParticlesP6float4S0_S0_, .-_Z19initializeParticlesP6float4S0_S0_
	.globl	_Z50__device_stub__Z17verletIntegrationP6float4S0_S0_fP6float4S0_S0_f
	.type	_Z50__device_stub__Z17verletIntegrationP6float4S0_S0_fP6float4S0_S0_f, @function
_Z50__device_stub__Z17verletIntegrationP6float4S0_S0_fP6float4S0_S0_f:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17verletIntegrationP6float4S0_S0_f(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L10:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z50__device_stub__Z17verletIntegrationP6float4S0_S0_fP6float4S0_S0_f, .-_Z50__device_stub__Z17verletIntegrationP6float4S0_S0_fP6float4S0_S0_f
	.globl	_Z17verletIntegrationP6float4S0_S0_f
	.type	_Z17verletIntegrationP6float4S0_S0_f, @function
_Z17verletIntegrationP6float4S0_S0_f:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z17verletIntegrationP6float4S0_S0_fP6float4S0_S0_f
	.cfi_endproc
.LFE3663:
	.size	_Z17verletIntegrationP6float4S0_S0_f, .-_Z17verletIntegrationP6float4S0_S0_f
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"CUDA error: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$16384, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$16384, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movl	$16384, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movq	%r12, %rsi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movq	%rax, %rbp
	call	_Z19initializeParticlesP6float4S0_S0_
	leaq	8(%rsp), %rdi
	movl	$16384, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.L31
	leaq	16(%rsp), %rdi
	movl	$16384, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	je	.L18
.L31:
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r13d, %edi
	movq	%rax, %rbx
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	orl	$-1, %eax
	jmp	.L15
.L18:
	leaq	24(%rsp), %rdi
	movl	$16384, %esi
	call	cudaMalloc@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.L31
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$16384, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.L31
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$16384, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.L31
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$16384, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.L31
	movabsq	$4294967297, %rax
	movl	$1, 52(%rsp)
	movl	$100, %r14d
	movq	%rax, 36(%rsp)
	addq	$3, %rax
	movq	%rax, 44(%rsp)
.L26:
	movl	40(%rsp), %ecx
	movq	44(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$256, 32(%rsp)
	movl	52(%rsp), %esi
	movq	32(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movss	.LC3(%rip), %xmm0
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z50__device_stub__Z17verletIntegrationP6float4S0_S0_fP6float4S0_S0_f
.L24:
	call	cudaGetLastError@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.L31
	decl	%r14d
	jne	.L26
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$16384, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.L31
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	xorl	%eax, %eax
.L15:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z17verletIntegrationP6float4S0_S0_f"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z17verletIntegrationP6float4S0_S0_f(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.align 4
.LC3:
	.long	1008981770
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// verlet_integration.cu
// CUDA implementation of Verlet integration for molecular dynamics simulation
// Target architecture: Hopper (Compute Capability 2.0)

#include <hip/hip_runtime.h>
#include <iostream>
#include <cmath>

// Constants
#define N 1024            // Number of particles
#define BLOCK_SIZE 256    // Block size for CUDA kernel

// Device function to calculate forces (simple Lennard-Jones potential)
__device__ void calculateForces(float4 &force, float4 &pos, float4 *positions) {
    float4 f = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    for (int j = 0; j < N; j++) {
        float4 r = positions[j];
        float dx = pos.x - r.x;
        float dy = pos.y - r.y;
        float dz = pos.z - r.z;
        float r2 = dx * dx + dy * dy + dz * dz;
        if (r2 > 0.0f && r2 < 1.0f) {
            float r6 = r2 * r2 * r2;
            float fac = 24.0f * (2.0f / r6 - 1.0f) / r2 / r6;
            f.x += fac * dx;
            f.y += fac * dy;
            f.z += fac * dz;
        }
    }
    force = f;
}

// CUDA kernel to perform Verlet integration
__global__ void verletIntegration(float4 *positions, float4 *velocities, float4 *forces, float dt) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < N) {
        // Update positions
        float4 pos = positions[idx];
        pos.x += velocities[idx].x * dt + 0.5f * forces[idx].x * dt * dt;
        pos.y += velocities[idx].y * dt + 0.5f * forces[idx].y * dt * dt;
        pos.z += velocities[idx].z * dt + 0.5f * forces[idx].z * dt * dt;

        // Calculate new forces
        float4 newForce;
        calculateForces(newForce, pos, positions);

        // Update velocities
        float4 vel = velocities[idx];
        vel.x += 0.5f * (forces[idx].x + newForce.x) * dt;
        vel.y += 0.5f * (forces[idx].y + newForce.y) * dt;
        vel.z += 0.5f * (forces[idx].z + newForce.z) * dt;

        // Write back updated positions and velocities
        positions[idx] = pos;
        velocities[idx] = vel;
        forces[idx] = newForce;
    }
}

// Host function to initialize particles
void initializeParticles(float4 *positions, float4 *velocities, float4 *forces) {
    for (int i = 0; i < N; i++) {
        positions[i] = make_float4(static_cast<float>(rand()) / RAND_MAX,
                                   static_cast<float>(rand()) / RAND_MAX,
                                   static_cast<float>(rand()) / RAND_MAX,
                                   0.0f);
        velocities[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
        forces[i] = make_float4(0.0f, 0.0f, 0.0f, 0.0f);
    }
}

int main() {
    float4 *d_positions, *d_velocities, *d_forces;
    float4 *h_positions = new float4[N];
    float4 *h_velocities = new float4[N];
    float4 *h_forces = new float4[N];
    float dt = 0.01f;
    int numSteps = 100;

    // Initialize particles on host
    initializeParticles(h_positions, h_velocities, h_forces);

    // Allocate device memory
    hipError_t err = hipMalloc((void**)&d_positions, N * sizeof(float4));
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_velocities, N * sizeof(float4));
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMalloc((void**)&d_forces, N * sizeof(float4));
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Copy data from host to device
    err = hipMemcpy(d_positions, h_positions, N * sizeof(float4), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMemcpy(d_velocities, h_velocities, N * sizeof(float4), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }
    err = hipMemcpy(d_forces, h_forces, N * sizeof(float4), hipMemcpyHostToDevice);
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Launch kernel
    dim3 blockSize(BLOCK_SIZE);
    dim3 gridSize((N + blockSize.x - 1) / blockSize.x);
    for (int step = 0; step < numSteps; step++) {
        verletIntegration<<<gridSize, blockSize>>>(d_positions, d_velocities, d_forces, dt);
        err = hipGetLastError();
        if (err != hipSuccess) {
            std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
            return -1;
        }
    }

    // Copy data back to host
    err = hipMemcpy(h_positions, d_positions, N * sizeof(float4), hipMemcpyDeviceToHost);
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Free device memory
    hipFree(d_positions);
    hipFree(d_velocities);
    hipFree(d_forces);

    // Free host memory
    delete[] h_positions;
    delete[] h_velocities;
    delete[] h_forces;

    return 0;
}
	.text
	.file	"cuda_code_049901.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z32__device_stub__verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f # -- Begin function _Z32__device_stub__verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
	.type	_Z32__device_stub__verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f,@function
_Z32__device_stub__verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f: # @_Z32__device_stub__verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f, .Lfunc_end0-_Z32__device_stub__verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z19initializeParticlesP15HIP_vector_typeIfLj4EES1_S1_
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z19initializeParticlesP15HIP_vector_typeIfLj4EES1_S1_
	.type	_Z19initializeParticlesP15HIP_vector_typeIfLj4EES1_S1_,@function
_Z19initializeParticlesP15HIP_vector_typeIfLj4EES1_S1_: # @_Z19initializeParticlesP15HIP_vector_typeIfLj4EES1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	xorl	%r12d, %r12d
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm1, %xmm1
	cvtsi2ss	%eax, %xmm1
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm1
	movaps	%xmm1, (%rsp)                   # 16-byte Spill
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movaps	(%rsp), %xmm1                   # 16-byte Reload
	unpcklps	%xmm0, %xmm1                    # xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
	movaps	%xmm1, (%rsp)                   # 16-byte Spill
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movq	%xmm0, %xmm0                    # xmm0 = xmm0[0],zero
	movaps	(%rsp), %xmm1                   # 16-byte Reload
	shufps	$132, %xmm0, %xmm1              # xmm1 = xmm1[0,1],xmm0[0,2]
	movaps	%xmm1, (%r15,%r12)
	xorps	%xmm0, %xmm0
	movaps	%xmm0, (%r14,%r12)
	movaps	%xmm0, (%rbx,%r12)
	addq	$16, %r12
	cmpq	$16384, %r12                    # imm = 0x4000
	jne	.LBB1_1
# %bb.2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z19initializeParticlesP15HIP_vector_typeIfLj4EES1_S1_, .Lfunc_end1-_Z19initializeParticlesP15HIP_vector_typeIfLj4EES1_S1_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x3c23d70a                      # float 0.00999999977
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$16384, %edi                    # imm = 0x4000
	callq	_Znam
	movq	%rax, %rbx
	movl	$16384, %edi                    # imm = 0x4000
	callq	_Znam
	movq	%rax, %r14
	movl	$16384, %edi                    # imm = 0x4000
	callq	_Znam
	movq	%rax, %r15
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%rax, %rdx
	callq	_Z19initializeParticlesP15HIP_vector_typeIfLj4EES1_S1_
	movq	%rsp, %rdi
	movl	$16384, %esi                    # imm = 0x4000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.1:
	leaq	16(%rsp), %rdi
	movl	$16384, %esi                    # imm = 0x4000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.2:
	leaq	8(%rsp), %rdi
	movl	$16384, %esi                    # imm = 0x4000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	(%rsp), %rdi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB2_10
.LBB2_4:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB2_6
# %bb.5:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_7
.LBB2_6:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_7:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB2_8:
	movl	$-1, %eax
.LBB2_9:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_10:
	.cfi_def_cfa_offset 80
	movq	16(%rsp), %rdi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.11:
	movq	8(%rsp), %rdi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB2_13
.LBB2_12:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	movl	$_ZSt4cerr, %edi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	jmp	.LBB2_8
.LBB2_13:                               # %.preheader.preheader
	movl	$100, %r12d
	movabsq	$4294967300, %rax               # imm = 0x100000004
	leaq	252(%rax), %r13
.LBB2_14:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movabsq	$4294967300, %rdi               # imm = 0x100000004
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_16
# %bb.15:                               #   in Loop: Header=BB2_14 Depth=1
	movq	(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z32__device_stub__verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
.LBB2_16:                               #   in Loop: Header=BB2_14 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.17:                               #   in Loop: Header=BB2_14 Depth=1
	decl	%r12d
	jne	.LBB2_14
# %bb.18:
	movq	(%rsp), %rsi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.19:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	jmp	.LBB2_9
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f,@object # @_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
	.section	.rodata,"a",@progbits
	.globl	_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
	.p2align	3, 0x0
_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f:
	.quad	_Z32__device_stub__verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
	.size	_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f"
	.size	.L__unnamed_1, 54

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f ; -- Begin function _Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
	.globl	_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
	.p2align	8
	.type	_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f,@function
_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f: ; @_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
; %bb.0:
	s_load_b32 s2, s[0:1], 0x2c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x400, v1
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b32 s1, s[0:1], 0x18
	s_mov_b32 s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[0:1], 4, v[1:2]
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v15, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v16, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v17, vcc_lo, s7, v1, vcc_lo
	global_load_b96 v[8:10], v[14:15], off
	v_add_co_u32 v18, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v1, vcc_lo
	global_load_b96 v[0:2], v[16:17], off
	global_load_b96 v[3:5], v[18:19], off
	s_mov_b64 s[2:3], 0
	s_waitcnt vmcnt(2)
	v_dual_mul_f32 v6, 0.5, v8 :: v_dual_mul_f32 v7, 0.5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v6, s1, v6 :: v_dual_mul_f32 v7, s1, v7
	v_dual_mul_f32 v6, s1, v6 :: v_dual_mul_f32 v7, s1, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v11, 0.5, v10 :: v_dual_fmac_f32 v6, s1, v0
	v_fmac_f32_e32 v7, s1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v11, s1, v11
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v12, v4, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v13, s1, v11
	v_add_f32_e32 v11, v3, v6
	v_fmac_f32_e32 v13, s1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_add_f32 v13, v5, v13 :: v_dual_mov_b32 v4, s8
	v_dual_mov_b32 v5, s9 :: v_dual_mov_b32 v6, s10
	v_mov_b32_e32 v7, s11
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_add_u32 s6, s4, s2
	s_addc_u32 s7, s5, s3
	s_load_b128 s[8:11], s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_subrev_f32 v3, s9, v12 :: v_dual_subrev_f32 v20, s10, v13
	v_subrev_f32_e32 v21, s8, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v22, v3, v3
	v_fmac_f32_e32 v22, v21, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v22, v20, v20
	v_cmp_lt_f32_e32 vcc_lo, 0, v22
	v_cmp_gt_f32_e64 s0, 1.0, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s6, vcc_lo, s0
	s_and_saveexec_b32 s0, s6
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mul_f32_e32 v23, v22, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v23, v22, v23
	v_div_scale_f32 v24, null, v23, v23, 2.0
	v_div_scale_f32 v27, vcc_lo, 2.0, v23, 2.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v25, v24
	s_waitcnt_depctr 0xfff
	v_fma_f32 v26, -v24, v25, 1.0
	v_fmac_f32_e32 v25, v26, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v26, v27, v25
	v_fma_f32 v28, -v24, v26, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v26, v28, v25
	v_fma_f32 v24, -v24, v26, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v24, v24, v25, v26
	v_div_fixup_f32 v24, v24, v23, 2.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v24, -1.0, v24
	v_mul_f32_e32 v24, 0x41c00000, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v25, null, v22, v22, v24
	v_div_scale_f32 v28, vcc_lo, v24, v22, v24
	v_rcp_f32_e32 v26, v25
	s_waitcnt_depctr 0xfff
	v_fma_f32 v27, -v25, v26, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v26, v27, v26
	v_mul_f32_e32 v27, v28, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v29, -v25, v27, v28
	v_fmac_f32_e32 v27, v29, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v25, -v25, v27, v28
	v_div_fmas_f32 v25, v25, v26, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v22, v25, v22, v24
	v_div_scale_f32 v24, null, v23, v23, v22
	v_div_scale_f32 v27, vcc_lo, v22, v23, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v25, v24
	s_waitcnt_depctr 0xfff
	v_fma_f32 v26, -v24, v25, 1.0
	v_fmac_f32_e32 v25, v26, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v26, v27, v25
	v_fma_f32 v28, -v24, v26, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v26, v28, v25
	v_fma_f32 v24, -v24, v26, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v24, v24, v25, v26
	v_div_fixup_f32 v22, v24, v23, v22
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v20, v22
	v_fma_f32 v4, v21, v22, v4
	v_fma_f32 v5, v3, v22, v5
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_u32 s2, s2, 16
	s_addc_u32 s3, s3, 0
	s_cmpk_lg_i32 s2, 0x4000
	s_cbranch_scc1 .LBB0_2
; %bb.5:                                ; %_Z15calculateForcesR15HIP_vector_typeIfLj4EES1_PS0_.exit
	global_load_b32 v3, v[16:17], off offset:12
	v_dual_add_f32 v8, v8, v4 :: v_dual_add_f32 v9, v9, v5
	v_add_f32_e32 v10, v10, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v8, 0.5, v8 :: v_dual_mul_f32 v9, 0.5, v9
	v_mul_f32_e32 v10, 0.5, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v0, s1, v8, v0
	v_fma_f32 v1, s1, v9, v1
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v2, s1, v10
	global_store_b96 v[18:19], v[11:13], off
	s_waitcnt vmcnt(0)
	global_store_b128 v[16:17], v[0:3], off
	global_store_b128 v[14:15], v[4:7], off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 30
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f, .Lfunc_end0-_Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 824
; NumSgprs: 18
; NumVgprs: 30
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 30
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17verletIntegrationP15HIP_vector_typeIfLj4EES1_S1_f.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     30
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
