#include <iostream>
#include <cuda_runtime.h>
#include <thrust/random.h>

#define NUM_ELEMENTS 128
#define MAX_LEVEL 16

struct Node {
    int value;
    int level;
    Node* forward[MAX_LEVEL];
};

__global__ void initializeNodes(Node* d_nodes, int numElements) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < numElements) {
        d_nodes[idx].value = idx; // Simple initialization for demonstration
        d_nodes[idx].level = 1;  // Base level
        for (int i = 0; i < MAX_LEVEL; ++i) {
            d_nodes[idx].forward[i] = nullptr;
        }
    }
}

__global__ void insertSkipList(Node* d_nodes, int numElements) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < numElements) {
        // Simple insertion logic, assuming no duplicates and sorted order
        int level = 1; // Base level
        Node* update[MAX_LEVEL];
        Node* x = d_nodes;
        for (int i = MAX_LEVEL - 1; i >= 0; --i) {
            while (x->forward[i] != nullptr && x->forward[i]->value < d_nodes[idx].value) {
                x = x->forward[i];
            }
            update[i] = x;
        }
        d_nodes[idx].level = level;
        for (int i = 0; i < level; ++i) {
            d_nodes[idx].forward[i] = update[i]->forward[i];
            update[i]->forward[i] = &d_nodes[idx];
        }
    }
}

void checkCudaError(cudaError_t err, const char* msg) {
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << msg << " (" << cudaGetErrorString(err) << ")" << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    Node* d_nodes;
    size_t size = NUM_ELEMENTS * sizeof(Node);

    // Allocate memory on the device
    checkCudaError(cudaMalloc((void**)&d_nodes, size), "Failed to allocate memory for nodes");

    // Initialize nodes on the device
    int blockSize = 256;
    int numBlocks = (NUM_ELEMENTS + blockSize - 1) / blockSize;
    initializeNodes<<<numBlocks, blockSize>>>(d_nodes, NUM_ELEMENTS);
    checkCudaError(cudaGetLastError(), "Kernel launch failed for initializeNodes");

    // Perform asynchronous memory copy to simulate data transfer
    Node* h_nodes = new Node[NUM_ELEMENTS];
    cudaStream_t stream;
    checkCudaError(cudaStreamCreate(&stream), "Failed to create CUDA stream");
    checkCudaError(cudaMemcpyAsync(h_nodes, d_nodes, size, cudaMemcpyDeviceToHost, stream), "Failed to copy data from device to host");

    // Insert elements into skip list on the device
    insertSkipList<<<numBlocks, blockSize>>>(d_nodes, NUM_ELEMENTS);
    checkCudaError(cudaGetLastError(), "Kernel launch failed for insertSkipList");

    // Wait for all operations to complete
    checkCudaError(cudaStreamSynchronize(stream), "Failed to synchronize stream");

    // Free resources
    delete[] h_nodes;
    checkCudaError(cudaFree(d_nodes), "Failed to free device memory");
    checkCudaError(cudaStreamDestroy(stream), "Failed to destroy CUDA stream");

    std::cout << "Skip list operations completed successfully." << std::endl;
    return 0;
}
	.file	"tmpxft_001f3cc6_00000000-6_cuda_code_044579.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB5604:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE5604:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error: "
.LC1:
	.string	" ("
.LC2:
	.string	")"
	.text
	.globl	_Z14checkCudaError9cudaErrorPKc
	.type	_Z14checkCudaError9cudaErrorPKc, @function
_Z14checkCudaError9cudaErrorPKc:
.LFB5600:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	leaq	.LC0(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	leaq	_ZSt4cerr(%rip), %rdi
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE5600:
	.size	_Z14checkCudaError9cudaErrorPKc, .-_Z14checkCudaError9cudaErrorPKc
	.globl	_Z40__device_stub__Z15initializeNodesP4NodeiP4Nodei
	.type	_Z40__device_stub__Z15initializeNodesP4NodeiP4Nodei, @function
_Z40__device_stub__Z15initializeNodesP4NodeiP4Nodei:
.LFB5626:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z15initializeNodesP4Nodei(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5626:
	.size	_Z40__device_stub__Z15initializeNodesP4NodeiP4Nodei, .-_Z40__device_stub__Z15initializeNodesP4NodeiP4Nodei
	.globl	_Z15initializeNodesP4Nodei
	.type	_Z15initializeNodesP4Nodei, @function
_Z15initializeNodesP4Nodei:
.LFB5627:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z15initializeNodesP4NodeiP4Nodei
	.cfi_endproc
.LFE5627:
	.size	_Z15initializeNodesP4Nodei, .-_Z15initializeNodesP4Nodei
	.globl	_Z39__device_stub__Z14insertSkipListP4NodeiP4Nodei
	.type	_Z39__device_stub__Z14insertSkipListP4NodeiP4Nodei, @function
_Z39__device_stub__Z14insertSkipListP4NodeiP4Nodei:
.LFB5628:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14insertSkipListP4Nodei(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L13:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5628:
	.size	_Z39__device_stub__Z14insertSkipListP4NodeiP4Nodei, .-_Z39__device_stub__Z14insertSkipListP4NodeiP4Nodei
	.globl	_Z14insertSkipListP4Nodei
	.type	_Z14insertSkipListP4Nodei, @function
_Z14insertSkipListP4Nodei:
.LFB5629:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z14insertSkipListP4NodeiP4Nodei
	.cfi_endproc
.LFE5629:
	.size	_Z14insertSkipListP4Nodei, .-_Z14insertSkipListP4Nodei
	.section	.rodata.str1.1
.LC3:
	.string	"Failed to allocate memory for nodes"
.LC4:
	.string	"Kernel launch failed for initializeNodes"
.LC5:
	.string	"Failed to create CUDA stream"
.LC6:
	.string	"Failed to copy data from device to host"
.LC7:
	.string	"Kernel launch failed for insertSkipList"
.LC8:
	.string	"Failed to synchronize stream"
.LC9:
	.string	"Failed to free device memory"
.LC10:
	.string	"Failed to destroy CUDA stream"
.LC11:
	.string	"Skip list operations completed successfully."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB5601:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	$17408, %esi
	subq	$48, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	(%rsp), %rdi
	movl	$128, %esi
	call	_Z40__device_stub__Z15initializeNodesP4NodeiP4Nodei
.L19:
	call	cudaGetLastError@PLT
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movl	$17408, %edi
	call	_Znam@PLT
	leaq	8(%rsp), %rdi
	movq	%rax, %rbx
	call	cudaStreamCreate@PLT
	leaq	.LC5(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	8(%rsp), %r8
	movq	(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$17408, %edx
	call	cudaMemcpyAsync@PLT
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	(%rsp), %rdi
	movl	$128, %esi
	call	_Z39__device_stub__Z14insertSkipListP4NodeiP4Nodei
.L20:
	call	cudaGetLastError@PLT
	leaq	.LC7(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	8(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	movq	8(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	leaq	.LC10(%rip), %rsi
	movl	%eax, %edi
	call	_Z14checkCudaError9cudaErrorPKc
	leaq	_ZSt4cout(%rip), %rdi
	leaq	.LC11(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$48, %rsp
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5601:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z14insertSkipListP4Nodei"
.LC13:
	.string	"_Z15initializeNodesP4Nodei"
.LC14:
	.string	"_ZN50_INTERNAL_b1e3bb8f_19_cuda_code_044579_cu_5640e6ac4cuda3std3__45__cpo5beginE"
.LC15:
	.string	"_ZN50_INTERNAL_b1e3bb8f_19_cuda_code_044579_cu_5640e6ac4cuda3std3__45__cpo3endE"
.LC16:
	.string	"_ZN50_INTERNAL_b1e3bb8f_19_cuda_code_044579_cu_5640e6ac4cuda3std3__45__cpo6cbeginE"
.LC17:
	.string	"_ZN50_INTERNAL_b1e3bb8f_19_cuda_code_044579_cu_5640e6ac4cuda3std3__45__cpo4cendE"
.LC18:
	.string	"_ZN50_INTERNAL_b1e3bb8f_19_cuda_code_044579_cu_5640e6ac4cuda3std3__452_GLOBAL__N__b1e3bb8f_19_cuda_code_044579_cu_5640e6ac6ignoreE"
.LC19:
	.string	"_ZN50_INTERNAL_b1e3bb8f_19_cuda_code_044579_cu_5640e6ac4cuda3std3__419piecewise_constructE"
.LC20:
	.string	"_ZN50_INTERNAL_b1e3bb8f_19_cuda_code_044579_cu_5640e6ac4cuda3std3__48in_placeE"
.LC21:
	.string	"_ZN50_INTERNAL_b1e3bb8f_19_cuda_code_044579_cu_5640e6ac4cuda3std6ranges3__45__cpo4swapE"
.LC22:
	.string	"_ZN50_INTERNAL_b1e3bb8f_19_cuda_code_044579_cu_5640e6ac4cuda3std6ranges3__45__cpo9iter_moveE"
.LC23:
	.string	"_ZN50_INTERNAL_b1e3bb8f_19_cuda_code_044579_cu_5640e6ac4cuda3std6ranges3__45__cpo7advanceE"
.LC24:
	.string	"_ZN50_INTERNAL_b1e3bb8f_19_cuda_code_044579_cu_5640e6ac6thrust20THRUST_200700_890_NS6system6detail10sequential3seqE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB5631:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14insertSkipListP4Nodei(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15initializeNodesP4Nodei(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5beginE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__452_GLOBAL__N__b1e3bb8f_19_cuda_code_044579_cu_5640e6ac6ignoreE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__48in_placeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC22(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC23(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo7advanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC24(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE5631:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, 1
_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo7advanceE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo7advanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo7advanceE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo7advanceE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo7advanceE, 1
_ZN4cuda3std6ranges3__45__cpo7advanceE:
	.zero	1
	.hidden	_ZN4cuda3std3__452_GLOBAL__N__b1e3bb8f_19_cuda_code_044579_cu_5640e6ac6ignoreE
	.weak	_ZN4cuda3std3__452_GLOBAL__N__b1e3bb8f_19_cuda_code_044579_cu_5640e6ac6ignoreE
	.section	.rodata._ZN4cuda3std3__452_GLOBAL__N__b1e3bb8f_19_cuda_code_044579_cu_5640e6ac6ignoreE,"aG",@progbits,_ZN4cuda3std3__452_GLOBAL__N__b1e3bb8f_19_cuda_code_044579_cu_5640e6ac6ignoreE,comdat
	.type	_ZN4cuda3std3__452_GLOBAL__N__b1e3bb8f_19_cuda_code_044579_cu_5640e6ac6ignoreE, @gnu_unique_object
	.size	_ZN4cuda3std3__452_GLOBAL__N__b1e3bb8f_19_cuda_code_044579_cu_5640e6ac6ignoreE, 1
_ZN4cuda3std3__452_GLOBAL__N__b1e3bb8f_19_cuda_code_044579_cu_5640e6ac6ignoreE:
	.zero	1
	.weak	_ZN4cuda3std3__48in_placeE
	.section	.rodata._ZN4cuda3std3__48in_placeE,"aG",@progbits,_ZN4cuda3std3__48in_placeE,comdat
	.type	_ZN4cuda3std3__48in_placeE, @gnu_unique_object
	.size	_ZN4cuda3std3__48in_placeE, 1
_ZN4cuda3std3__48in_placeE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo4cendE
	.section	.rodata._ZN4cuda3std3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4cendE,comdat
	.type	_ZN4cuda3std3__45__cpo4cendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo4cendE, 1
_ZN4cuda3std3__45__cpo4cendE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo6cbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6cbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo6cbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo6cbeginE, 1
_ZN4cuda3std3__45__cpo6cbeginE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo3endE
	.section	.rodata._ZN4cuda3std3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std3__45__cpo3endE,comdat
	.type	_ZN4cuda3std3__45__cpo3endE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo3endE, 1
_ZN4cuda3std3__45__cpo3endE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo5beginE
	.section	.rodata._ZN4cuda3std3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std3__45__cpo5beginE,comdat
	.type	_ZN4cuda3std3__45__cpo5beginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo5beginE, 1
_ZN4cuda3std3__45__cpo5beginE:
	.zero	1
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <thrust/random.h>

#define NUM_ELEMENTS 128
#define MAX_LEVEL 16

struct Node {
    int value;
    int level;
    Node* forward[MAX_LEVEL];
};

__global__ void initializeNodes(Node* d_nodes, int numElements) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < numElements) {
        d_nodes[idx].value = idx; // Simple initialization for demonstration
        d_nodes[idx].level = 1;  // Base level
        for (int i = 0; i < MAX_LEVEL; ++i) {
            d_nodes[idx].forward[i] = nullptr;
        }
    }
}

__global__ void insertSkipList(Node* d_nodes, int numElements) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < numElements) {
        // Simple insertion logic, assuming no duplicates and sorted order
        int level = 1; // Base level
        Node* update[MAX_LEVEL];
        Node* x = d_nodes;
        for (int i = MAX_LEVEL - 1; i >= 0; --i) {
            while (x->forward[i] != nullptr && x->forward[i]->value < d_nodes[idx].value) {
                x = x->forward[i];
            }
            update[i] = x;
        }
        d_nodes[idx].level = level;
        for (int i = 0; i < level; ++i) {
            d_nodes[idx].forward[i] = update[i]->forward[i];
            update[i]->forward[i] = &d_nodes[idx];
        }
    }
}

void checkCudaError(hipError_t err, const char* msg) {
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << msg << " (" << hipGetErrorString(err) << ")" << std::endl;
        exit(EXIT_FAILURE);
    }
}

int main() {
    Node* d_nodes;
    size_t size = NUM_ELEMENTS * sizeof(Node);

    // Allocate memory on the device
    checkCudaError(hipMalloc((void**)&d_nodes, size), "Failed to allocate memory for nodes");

    // Initialize nodes on the device
    int blockSize = 256;
    int numBlocks = (NUM_ELEMENTS + blockSize - 1) / blockSize;
    initializeNodes<<<numBlocks, blockSize>>>(d_nodes, NUM_ELEMENTS);
    checkCudaError(hipGetLastError(), "Kernel launch failed for initializeNodes");

    // Perform asynchronous memory copy to simulate data transfer
    Node* h_nodes = new Node[NUM_ELEMENTS];
    hipStream_t stream;
    checkCudaError(hipStreamCreate(&stream), "Failed to create CUDA stream");
    checkCudaError(hipMemcpyAsync(h_nodes, d_nodes, size, hipMemcpyDeviceToHost, stream), "Failed to copy data from device to host");

    // Insert elements into skip list on the device
    insertSkipList<<<numBlocks, blockSize>>>(d_nodes, NUM_ELEMENTS);
    checkCudaError(hipGetLastError(), "Kernel launch failed for insertSkipList");

    // Wait for all operations to complete
    checkCudaError(hipStreamSynchronize(stream), "Failed to synchronize stream");

    // Free resources
    delete[] h_nodes;
    checkCudaError(hipFree(d_nodes), "Failed to free device memory");
    checkCudaError(hipStreamDestroy(stream), "Failed to destroy CUDA stream");

    std::cout << "Skip list operations completed successfully." << std::endl;
    return 0;
}
	.text
	.file	"cuda_code_044579.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z30__device_stub__initializeNodesP4Nodei # -- Begin function _Z30__device_stub__initializeNodesP4Nodei
	.type	_Z30__device_stub__initializeNodesP4Nodei,@function
_Z30__device_stub__initializeNodesP4Nodei: # @_Z30__device_stub__initializeNodesP4Nodei
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15initializeNodesP4Nodei, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__initializeNodesP4Nodei, .Lfunc_end0-_Z30__device_stub__initializeNodesP4Nodei
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__insertSkipListP4Nodei # -- Begin function _Z29__device_stub__insertSkipListP4Nodei
	.type	_Z29__device_stub__insertSkipListP4Nodei,@function
_Z29__device_stub__insertSkipListP4Nodei: # @_Z29__device_stub__insertSkipListP4Nodei
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14insertSkipListP4Nodei, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z29__device_stub__insertSkipListP4Nodei, .Lfunc_end1-_Z29__device_stub__insertSkipListP4Nodei
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCudaError10hipError_tPKc # -- Begin function _Z14checkCudaError10hipError_tPKc
	.type	_Z14checkCudaError10hipError_tPKc,@function
_Z14checkCudaError10hipError_tPKc:      # @_Z14checkCudaError10hipError_tPKc
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB2_2
# %bb.1:
	retq
.LBB2_2:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %r14
	movl	%edi, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	_Z14checkCudaError10hipError_tPKc, .Lfunc_end2-_Z14checkCudaError10hipError_tPKc
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	leaq	8(%rsp), %rdi
	movl	$17408, %esi                    # imm = 0x4400
	callq	hipMalloc
	movl	$.L.str.3, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	leaq	255(%rbx), %r15
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	8(%rsp), %rdi
	movl	$128, %esi
	callq	_Z30__device_stub__initializeNodesP4Nodei
.LBB3_2:
	callq	hipGetLastError
	movl	$.L.str.4, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movl	$17408, %edi                    # imm = 0x4400
	callq	_Znam
	movq	%rax, %r14
	leaq	16(%rsp), %r12
	movq	%r12, %rdi
	callq	hipStreamCreate
	movl	$.L.str.5, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	8(%rsp), %rsi
	movq	(%r12), %r8
	movl	$17408, %edx                    # imm = 0x4400
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movl	$.L.str.6, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	8(%rsp), %rdi
	movl	$128, %esi
	callq	_Z29__device_stub__insertSkipListP4Nodei
.LBB3_4:
	callq	hipGetLastError
	movl	$.L.str.7, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	16(%rsp), %rdi
	callq	hipStreamSynchronize
	movl	$.L.str.8, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.9, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movq	16(%rsp), %rdi
	callq	hipStreamDestroy
	movl	$.L.str.10, %esi
	movl	%eax, %edi
	callq	_Z14checkCudaError10hipError_tPKc
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$44, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15initializeNodesP4Nodei, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14insertSkipListP4Nodei, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15initializeNodesP4Nodei,@object # @_Z15initializeNodesP4Nodei
	.section	.rodata,"a",@progbits
	.globl	_Z15initializeNodesP4Nodei
	.p2align	3, 0x0
_Z15initializeNodesP4Nodei:
	.quad	_Z30__device_stub__initializeNodesP4Nodei
	.size	_Z15initializeNodesP4Nodei, 8

	.type	_Z14insertSkipListP4Nodei,@object # @_Z14insertSkipListP4Nodei
	.globl	_Z14insertSkipListP4Nodei
	.p2align	3, 0x0
_Z14insertSkipListP4Nodei:
	.quad	_Z29__device_stub__insertSkipListP4Nodei
	.size	_Z14insertSkipListP4Nodei, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" ("
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	")"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate memory for nodes"
	.size	.L.str.3, 36

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Kernel launch failed for initializeNodes"
	.size	.L.str.4, 41

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to create CUDA stream"
	.size	.L.str.5, 29

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to copy data from device to host"
	.size	.L.str.6, 40

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Kernel launch failed for insertSkipList"
	.size	.L.str.7, 40

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Failed to synchronize stream"
	.size	.L.str.8, 29

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to free device memory"
	.size	.L.str.9, 29

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Failed to destroy CUDA stream"
	.size	.L.str.10, 30

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Skip list operations completed successfully."
	.size	.L.str.11, 45

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15initializeNodesP4Nodei"
	.size	.L__unnamed_1, 27

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z14insertSkipListP4Nodei"
	.size	.L__unnamed_2, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__initializeNodesP4Nodei
	.addrsig_sym _Z29__device_stub__insertSkipListP4Nodei
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15initializeNodesP4Nodei
	.addrsig_sym _Z14insertSkipListP4Nodei
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15initializeNodesP4Nodei ; -- Begin function _Z15initializeNodesP4Nodei
	.globl	_Z15initializeNodesP4Nodei
	.p2align	8
	.type	_Z15initializeNodesP4Nodei,@function
_Z15initializeNodesP4Nodei:             ; @_Z15initializeNodesP4Nodei
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_3
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v2, 1
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[5:6], null, 0x88, v1, s[0:1]
	s_mov_b64 s[0:1], 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v5, 8
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v6, vcc_lo
	global_store_b64 v[5:6], v[1:2], off
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v5, vcc_lo, v3, s0
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v4, vcc_lo
	v_mov_b32_e32 v1, v0
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_cmpk_lg_i32 s0, 0x80
	global_store_b64 v[5:6], v[0:1], off
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15initializeNodesP4Nodei
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15initializeNodesP4Nodei, .Lfunc_end0-_Z15initializeNodesP4Nodei
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 172
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14insertSkipListP4Nodei ; -- Begin function _Z14insertSkipListP4Nodei
	.globl	_Z14insertSkipListP4Nodei
	.p2align	8
	.type	_Z14insertSkipListP4Nodei,@function
_Z14insertSkipListP4Nodei:              ; @_Z14insertSkipListP4Nodei
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[32:33], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v32
	s_cbranch_execz .LBB1_8
; %bb.1:                                ; %.preheader36
	s_load_b64 s[0:1], s[0:1], 0x0
	s_mov_b32 s2, 15
	s_mov_b32 s3, 0
                                        ; implicit-def: $vgpr0_vgpr1
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[33:34], null, 0x88, v32, s[0:1]
	v_dual_mov_b32 v36, s1 :: v_dual_mov_b32 v35, s0
.LBB1_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v38, v36 :: v_dual_mov_b32 v37, v35
	s_lshl_b64 s[4:5], s[2:3], 3
	s_mov_b32 s6, s3
                                        ; implicit-def: $sgpr7
.LBB1_3:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v35, v37 :: v_dual_mov_b32 v36, v38
	s_or_b32 s7, s7, exec_lo
	s_mov_b32 s8, exec_lo
	v_add_co_u32 v37, vcc_lo, v35, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v38, vcc_lo, s5, v36, vcc_lo
	flat_load_b64 v[37:38], v[37:38] offset:8
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u64_e32 0, v[37:38]
	s_cbranch_execz .LBB1_5
; %bb.4:                                ;   in Loop: Header=BB1_3 Depth=2
	flat_load_b32 v39, v[37:38]
	global_load_b32 v40, v[33:34], off
	s_and_not1_b32 s7, s7, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v39, v40
	s_and_b32 s9, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s7, s7, s9
.LBB1_5:                                ; %Flow
                                        ;   in Loop: Header=BB1_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s8, exec_lo, s7
	s_or_b32 s6, s8, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB1_3
; %bb.6:                                ; %.critedge
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_lshl_b32 s4, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 m0, s4
	s_add_i32 s4, s2, -1
	s_cmp_eq_u32 s2, 0
	s_mov_b32 s2, s4
	v_movreld_b32_e32 v0, v35
	v_movreld_b32_e32 v1, v36
	s_cbranch_scc0 .LBB1_2
; %bb.7:                                ; %.critedge35
	flat_load_b64 v[3:4], v[0:1] offset:8
	v_mad_i64_i32 v[5:6], null, 0x88, v32, s[0:1]
	v_mov_b32_e32 v2, 1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	global_store_b96 v[5:6], v[2:4], off offset:4
	flat_store_b64 v[0:1], v[5:6] offset:8
.LBB1_8:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14insertSkipListP4Nodei
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 41
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14insertSkipListP4Nodei, .Lfunc_end1-_Z14insertSkipListP4Nodei
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 41
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 41
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15initializeNodesP4Nodei
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15initializeNodesP4Nodei.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14insertSkipListP4Nodei
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14insertSkipListP4Nodei.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     41
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
