#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>
#include <vector>
#include <cassert>

namespace cg = cooperative_groups;

// Define the dimensions of the image and the U-Net model
#define IMAGE_WIDTH 512
#define IMAGE_HEIGHT 512
#define IMAGE_CHANNELS 3
#define BATCH_SIZE 4
#define FILTER_SIZE 3
#define NUM_FEATURES 64

// Kernel to perform a simple 2D convolution
__global__ void conv2d_kernel(float* input, float* output, float* weights, float* biases, int width, int height, int channels, int features) {
    extern __shared__ float shared_data[];
    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int bx = blockIdx.x;
    int by = blockIdx.y;
    int bz = blockIdx.z;

    int img_idx = bz * width * height * channels;
    int out_idx = bz * width * height * features;

    // Load data into shared memory
    int row = by * blockDim.y + ty;
    int col = bx * blockDim.x + tx;
    int ch = 0;

    if (row < height && col < width) {
        for (ch = 0; ch < channels; ++ch) {
            shared_data[ty * blockDim.x * channels + tx * channels + ch] = input[img_idx + row * width * channels + col * channels + ch];
        }
    } else {
        for (ch = 0; ch < channels; ++ch) {
            shared_data[ty * blockDim.x * channels + tx * channels + ch] = 0.0f;
        }
    }
    __syncthreads();

    // Perform convolution
    float sum = 0.0f;
    if (row < height && col < width) {
        for (int ky = 0; ky < FILTER_SIZE; ++ky) {
            for (int kx = 0; kx < FILTER_SIZE; ++kx) {
                for (int kc = 0; kc < channels; ++kc) {
                    int shared_row = ty + ky;
                    int shared_col = tx + kx;
                    if (shared_row < blockDim.y && shared_col < blockDim.x) {
                        sum += shared_data[shared_row * blockDim.x * channels + shared_col * channels + kc] *
                               weights[ky * FILTER_SIZE * channels * features + kx * channels * features + kc * features + ch];
                    }
                }
            }
        }
        output[out_idx + row * width * features + col * features + ch] = sum + biases[ch];
    }
}

int main() {
    // Initialize input, output, weights, and biases
    size_t input_size = BATCH_SIZE * IMAGE_HEIGHT * IMAGE_WIDTH * IMAGE_CHANNELS * sizeof(float);
    size_t output_size = BATCH_SIZE * IMAGE_HEIGHT * IMAGE_WIDTH * NUM_FEATURES * sizeof(float);
    size_t weights_size = FILTER_SIZE * FILTER_SIZE * IMAGE_CHANNELS * NUM_FEATURES * sizeof(float);
    size_t biases_size = NUM_FEATURES * sizeof(float);

    float* d_input, *d_output, *d_weights, *d_biases;
    cudaMalloc(&d_input, input_size);
    cudaMalloc(&d_output, output_size);
    cudaMalloc(&d_weights, weights_size);
    cudaMalloc(&d_biases, biases_size);

    // Initialize input, weights, and biases with random values
    std::vector<float> h_input(BATCH_SIZE * IMAGE_HEIGHT * IMAGE_WIDTH * IMAGE_CHANNELS, 0.5f);
    std::vector<float> h_weights(FILTER_SIZE * FILTER_SIZE * IMAGE_CHANNELS * NUM_FEATURES, 0.1f);
    std::vector<float> h_biases(NUM_FEATURES, 0.0f);

    cudaMemcpy(d_input, h_input.data(), input_size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_weights, h_weights.data(), weights_size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_biases, h_biases.data(), biases_size, cudaMemcpyHostToDevice);

    // Define block and grid sizes
    dim3 blockSize(16, 16);
    dim3 gridSize((IMAGE_WIDTH + blockSize.x - 1) / blockSize.x, (IMAGE_HEIGHT + blockSize.y - 1) / blockSize.y, BATCH_SIZE);

    // Allocate shared memory
    size_t sharedMemSize = blockSize.x * blockSize.y * IMAGE_CHANNELS * sizeof(float);

    // Launch the convolution kernel
    conv2d_kernel<<<gridSize, blockSize, sharedMemSize>>>(d_input, d_output, d_weights, d_biases, IMAGE_WIDTH, IMAGE_HEIGHT, IMAGE_CHANNELS, NUM_FEATURES);

    // Check for errors in kernel launch
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        std::cerr << "CUDA error: " << cudaGetErrorString(err) << std::endl;
        return -1;
    }

    // Free allocated memory
    cudaFree(d_input);
    cudaFree(d_output);
    cudaFree(d_weights);
    cudaFree(d_biases);

    std::cout << "Convolution completed successfully." << std::endl;
    return 0;
}
	.file	"tmpxft_000e8f78_00000000-6_cuda_code_082101.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB7198:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE7198:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z43__device_stub__Z13conv2d_kernelPfS_S_S_iiiiPfS_S_S_iiii
	.type	_Z43__device_stub__Z13conv2d_kernelPfS_S_S_iiiiPfS_S_S_iiii, @function
_Z43__device_stub__Z13conv2d_kernelPfS_S_S_iiiiPfS_S_S_iiii:
.LFB7220:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z13conv2d_kernelPfS_S_S_iiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7220:
	.size	_Z43__device_stub__Z13conv2d_kernelPfS_S_S_iiiiPfS_S_S_iiii, .-_Z43__device_stub__Z13conv2d_kernelPfS_S_S_iiiiPfS_S_S_iiii
	.globl	_Z13conv2d_kernelPfS_S_S_iiii
	.type	_Z13conv2d_kernelPfS_S_S_iiii, @function
_Z13conv2d_kernelPfS_S_S_iiii:
.LFB7221:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z13conv2d_kernelPfS_S_S_iiiiPfS_S_S_iiii
	.cfi_endproc
.LFE7221:
	.size	_Z13conv2d_kernelPfS_S_S_iiii, .-_Z13conv2d_kernelPfS_S_S_iiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z13conv2d_kernelPfS_S_S_iiii"
.LC1:
	.string	"_ZN50_INTERNAL_69992d13_19_cuda_code_082101_cu_8431a9a04cuda3std3__419piecewise_constructE"
.LC2:
	.string	"_ZN50_INTERNAL_69992d13_19_cuda_code_082101_cu_8431a9a04cuda3std6ranges3__45__cpo4swapE"
.LC3:
	.string	"_ZN50_INTERNAL_69992d13_19_cuda_code_082101_cu_8431a9a04cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB7223:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13conv2d_kernelPfS_S_S_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE7223:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZNSt6vectorIfSaIfEEC2EmRKfRKS0_.str1.1,"aMS",@progbits,1
.LC4:
	.string	"cannot create std::vector larger than max_size()"
	.section	.text._ZNSt6vectorIfSaIfEEC2EmRKfRKS0_,"axG",@progbits,_ZNSt6vectorIfSaIfEEC5EmRKfRKS0_,comdat
	.align 2
	.weak	_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_
	.type	_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_, @function
_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_:
.LFB7670:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693951, %rax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rcx
	.cfi_def_cfa_offset 48
	cmpq	%rsi, %rax
	jnb	.L11
	leaq	.LC4(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L11:
	movq	%rdx, %r13
	xorl	%edx, %edx
	movq	%rdi, %rbx
	movq	%rsi, %rbp
	movq	%rdx, (%rdi)
	leaq	0(,%rsi,4), %r12
	xorl	%eax, %eax
	movq	%rdx, 8(%rdi)
	movq	%rdx, 16(%rdi)
	testq	%rsi, %rsi
	je	.L12
	movq	%r12, %rdi
	call	_Znwm@PLT
.L12:
	addq	%rax, %r12
	movq	%rax, (%rbx)
	movq	%r12, 16(%rbx)
	testq	%rbp, %rbp
	je	.L13
	movss	0(%r13), %xmm0
.L14:
	cmpq	%rax, %r12
	je	.L13
	movss	%xmm0, (%rax)
	addq	$4, %rax
	jmp	.L14
.L13:
	movq	%rax, 8(%rbx)
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE7670:
	.size	_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_, .-_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_
	.weak	_ZNSt6vectorIfSaIfEEC1EmRKfRKS0_
	.set	_ZNSt6vectorIfSaIfEEC1EmRKfRKS0_,_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_
	.section	.text._ZNSt6vectorIfSaIfEED2Ev,"axG",@progbits,_ZNSt6vectorIfSaIfEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIfSaIfEED2Ev
	.type	_ZNSt6vectorIfSaIfEED2Ev, @function
_ZNSt6vectorIfSaIfEED2Ev:
.LFB7673:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L22
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L22:
	ret
	.cfi_endproc
.LFE7673:
	.size	_ZNSt6vectorIfSaIfEED2Ev, .-_ZNSt6vectorIfSaIfEED2Ev
	.weak	_ZNSt6vectorIfSaIfEED1Ev
	.set	_ZNSt6vectorIfSaIfEED1Ev,_ZNSt6vectorIfSaIfEED2Ev
	.section	.rodata.str1.1
.LC8:
	.string	"CUDA error: "
.LC9:
	.string	"Convolution completed successfully."
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB7195:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA7195
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$12582912, %esi
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	leaq	-184(%rbp), %rdi
	pushq	%r13
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	leaq	-80(%rbp), %r13
	pushq	%r12
	.cfi_offset 12, -48
	leaq	-104(%rbp), %r12
	pushq	%rbx
	.cfi_offset 3, -56
	leaq	-140(%rbp), %rbx
	subq	$152, %rsp
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
.LEHB0:
	call	cudaMalloc@PLT
	leaq	-176(%rbp), %rdi
	movl	$268435456, %esi
	call	cudaMalloc@PLT
	leaq	-168(%rbp), %rdi
	movl	$6912, %esi
	call	cudaMalloc@PLT
	leaq	-160(%rbp), %rdi
	movl	$256, %esi
	call	cudaMalloc@PLT
	leaq	-128(%rbp), %rax
	movq	%r12, %rcx
	movq	%r13, %rdx
	movl	$3145728, %esi
	movq	%rax, %rdi
	movl	$0x3f000000, -80(%rbp)
	movq	%rax, %r15
	call	_ZNSt6vectorIfSaIfEEC1EmRKfRKS0_
.LEHE0:
	movq	%rbx, %rcx
	movq	%r13, %rdx
	movl	$1728, %esi
	movq	%r12, %rdi
	movl	$0x3dcccccd, -80(%rbp)
.LEHB1:
	call	_ZNSt6vectorIfSaIfEEC1EmRKfRKS0_
.LEHE1:
	leaq	-152(%rbp), %rcx
	movq	%rbx, %rdx
	movl	$64, %esi
	movq	%r13, %rdi
	movl	$0x00000000, -140(%rbp)
.LEHB2:
	call	_ZNSt6vectorIfSaIfEEC1EmRKfRKS0_
.LEHE2:
	movq	-128(%rbp), %rsi
	movl	$1, %ecx
	movl	$12582912, %edx
	movq	-184(%rbp), %rdi
.LEHB3:
	call	cudaMemcpy@PLT
	movq	-104(%rbp), %rsi
	movl	$1, %ecx
	movl	$6912, %edx
	movq	-168(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-80(%rbp), %rsi
	movl	$1, %ecx
	movl	$256, %edx
	movq	-160(%rbp), %rdi
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movl	$4, %esi
	movabsq	$137438953504, %rdi
	movabsq	$68719476752, %rdx
	movl	$3072, %r8d
	movq	%rdi, -140(%rbp)
	movl	$4, -132(%rbp)
	movq	%rdx, -152(%rbp)
	movl	$1, -144(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L25
.L27:
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L28
	jmp	.L43
.L25:
	pushq	$64
	movq	-160(%rbp), %rcx
	movl	$512, %r9d
	movl	$512, %r8d
	movq	-168(%rbp), %rdx
	movq	-176(%rbp), %rsi
	pushq	$3
	movq	-184(%rbp), %rdi
	.cfi_escape 0x2e,0x10
	call	_Z43__device_stub__Z13conv2d_kernelPfS_S_S_iiiiPfS_S_S_iiii
	popq	%rax
	popq	%rdx
	jmp	.L27
.L43:
	leaq	.LC8(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	.cfi_escape 0x2e,0
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %r14
	call	cudaGetErrorString@PLT
	movq	%rax, %rsi
	movq	%r14, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %ebx
	jmp	.L29
.L28:
	movq	-184(%rbp), %rdi
	call	cudaFree@PLT
	movq	-176(%rbp), %rdi
	call	cudaFree@PLT
	movq	-168(%rbp), %rdi
	call	cudaFree@PLT
	movq	-160(%rbp), %rdi
	call	cudaFree@PLT
	leaq	.LC9(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.LEHE3:
	xorl	%ebx, %ebx
.L29:
	movq	%r13, %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	%r12, %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	%r15, %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L34
	jmp	.L41
.L38:
	endbr64
	movq	%rax, %rbx
.L30:
	movq	%r13, %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	jmp	.L31
.L37:
	endbr64
	movq	%rax, %rbx
.L31:
	movq	%r12, %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	jmp	.L32
.L36:
	endbr64
	movq	%rax, %rbx
.L32:
	movq	%r15, %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L41
	movq	%rbx, %rdi
.LEHB4:
	call	_Unwind_Resume@PLT
.LEHE4:
.L41:
	call	__stack_chk_fail@PLT
.L34:
	leaq	-40(%rbp), %rsp
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7195:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA7195:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE7195-.LLSDACSB7195
.LLSDACSB7195:
	.uleb128 .LEHB0-.LFB7195
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB7195
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L36-.LFB7195
	.uleb128 0
	.uleb128 .LEHB2-.LFB7195
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L37-.LFB7195
	.uleb128 0
	.uleb128 .LEHB3-.LFB7195
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L38-.LFB7195
	.uleb128 0
	.uleb128 .LEHB4-.LFB7195
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE7195:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>
#include <vector>
#include <cassert>

namespace cg = cooperative_groups;

// Define the dimensions of the image and the U-Net model
#define IMAGE_WIDTH 512
#define IMAGE_HEIGHT 512
#define IMAGE_CHANNELS 3
#define BATCH_SIZE 4
#define FILTER_SIZE 3
#define NUM_FEATURES 64

// Kernel to perform a simple 2D convolution
__global__ void conv2d_kernel(float* input, float* output, float* weights, float* biases, int width, int height, int channels, int features) {
    extern __shared__ float shared_data[];
    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int bx = blockIdx.x;
    int by = blockIdx.y;
    int bz = blockIdx.z;

    int img_idx = bz * width * height * channels;
    int out_idx = bz * width * height * features;

    // Load data into shared memory
    int row = by * blockDim.y + ty;
    int col = bx * blockDim.x + tx;
    int ch = 0;

    if (row < height && col < width) {
        for (ch = 0; ch < channels; ++ch) {
            shared_data[ty * blockDim.x * channels + tx * channels + ch] = input[img_idx + row * width * channels + col * channels + ch];
        }
    } else {
        for (ch = 0; ch < channels; ++ch) {
            shared_data[ty * blockDim.x * channels + tx * channels + ch] = 0.0f;
        }
    }
    __syncthreads();

    // Perform convolution
    float sum = 0.0f;
    if (row < height && col < width) {
        for (int ky = 0; ky < FILTER_SIZE; ++ky) {
            for (int kx = 0; kx < FILTER_SIZE; ++kx) {
                for (int kc = 0; kc < channels; ++kc) {
                    int shared_row = ty + ky;
                    int shared_col = tx + kx;
                    if (shared_row < blockDim.y && shared_col < blockDim.x) {
                        sum += shared_data[shared_row * blockDim.x * channels + shared_col * channels + kc] *
                               weights[ky * FILTER_SIZE * channels * features + kx * channels * features + kc * features + ch];
                    }
                }
            }
        }
        output[out_idx + row * width * features + col * features + ch] = sum + biases[ch];
    }
}

int main() {
    // Initialize input, output, weights, and biases
    size_t input_size = BATCH_SIZE * IMAGE_HEIGHT * IMAGE_WIDTH * IMAGE_CHANNELS * sizeof(float);
    size_t output_size = BATCH_SIZE * IMAGE_HEIGHT * IMAGE_WIDTH * NUM_FEATURES * sizeof(float);
    size_t weights_size = FILTER_SIZE * FILTER_SIZE * IMAGE_CHANNELS * NUM_FEATURES * sizeof(float);
    size_t biases_size = NUM_FEATURES * sizeof(float);

    float* d_input, *d_output, *d_weights, *d_biases;
    hipMalloc(&d_input, input_size);
    hipMalloc(&d_output, output_size);
    hipMalloc(&d_weights, weights_size);
    hipMalloc(&d_biases, biases_size);

    // Initialize input, weights, and biases with random values
    std::vector<float> h_input(BATCH_SIZE * IMAGE_HEIGHT * IMAGE_WIDTH * IMAGE_CHANNELS, 0.5f);
    std::vector<float> h_weights(FILTER_SIZE * FILTER_SIZE * IMAGE_CHANNELS * NUM_FEATURES, 0.1f);
    std::vector<float> h_biases(NUM_FEATURES, 0.0f);

    hipMemcpy(d_input, h_input.data(), input_size, hipMemcpyHostToDevice);
    hipMemcpy(d_weights, h_weights.data(), weights_size, hipMemcpyHostToDevice);
    hipMemcpy(d_biases, h_biases.data(), biases_size, hipMemcpyHostToDevice);

    // Define block and grid sizes
    dim3 blockSize(16, 16);
    dim3 gridSize((IMAGE_WIDTH + blockSize.x - 1) / blockSize.x, (IMAGE_HEIGHT + blockSize.y - 1) / blockSize.y, BATCH_SIZE);

    // Allocate shared memory
    size_t sharedMemSize = blockSize.x * blockSize.y * IMAGE_CHANNELS * sizeof(float);

    // Launch the convolution kernel
    conv2d_kernel<<<gridSize, blockSize, sharedMemSize>>>(d_input, d_output, d_weights, d_biases, IMAGE_WIDTH, IMAGE_HEIGHT, IMAGE_CHANNELS, NUM_FEATURES);

    // Check for errors in kernel launch
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        std::cerr << "CUDA error: " << hipGetErrorString(err) << std::endl;
        return -1;
    }

    // Free allocated memory
    hipFree(d_input);
    hipFree(d_output);
    hipFree(d_weights);
    hipFree(d_biases);

    std::cout << "Convolution completed successfully." << std::endl;
    return 0;
}
	.text
	.file	"cuda_code_082101.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z28__device_stub__conv2d_kernelPfS_S_S_iiii # -- Begin function _Z28__device_stub__conv2d_kernelPfS_S_S_iiii
	.type	_Z28__device_stub__conv2d_kernelPfS_S_S_iiii,@function
_Z28__device_stub__conv2d_kernelPfS_S_S_iiii: # @_Z28__device_stub__conv2d_kernelPfS_S_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13conv2d_kernelPfS_S_S_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__conv2d_kernelPfS_S_S_iiii, .Lfunc_end0-_Z28__device_stub__conv2d_kernelPfS_S_S_iiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:                                # %.noexc
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	.cfi_escape 0x2e, 0x00
	leaq	16(%rsp), %rdi
	movl	$12582912, %esi                 # imm = 0xC00000
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	24(%rsp), %rdi
	movl	$268435456, %esi                # imm = 0x10000000
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	leaq	8(%rsp), %rdi
	movl	$6912, %esi                     # imm = 0x1B00
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %rdi
	movl	$256, %esi                      # imm = 0x100
	callq	hipMalloc
	.cfi_escape 0x2e, 0x00
	movl	$12582912, %edi                 # imm = 0xC00000
	callq	_Znwm
	movq	%rax, %rbx
	xorl	%eax, %eax
.LBB1_1:                                # %.lr.ph.i.i.i.i.i.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movl	$1056964608, (%rbx,%rax)        # imm = 0x3F000000
	addq	$4, %rax
	cmpq	$12582912, %rax                 # imm = 0xC00000
	jne	.LBB1_1
# %bb.2:                                # %_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_.exit
.Ltmp0:
	.cfi_escape 0x2e, 0x00
	movl	$6912, %edi                     # imm = 0x1B00
	callq	_Znwm
.Ltmp1:
# %bb.3:                                # %.lr.ph.i.i.i.i.i.i.i.i.i31.preheader
	movq	%rax, %r14
	xorl	%eax, %eax
.LBB1_4:                                # %.lr.ph.i.i.i.i.i.i.i.i.i31
                                        # =>This Inner Loop Header: Depth=1
	movl	$1036831949, (%r14,%rax)        # imm = 0x3DCCCCCD
	addq	$4, %rax
	cmpq	$6912, %rax                     # imm = 0x1B00
	jne	.LBB1_4
# %bb.5:                                # %_ZNSt6vectorIfSaIfEEC2EmRKfRKS0_.exit35
.Ltmp3:
	.cfi_escape 0x2e, 0x00
	movl	$256, %edi                      # imm = 0x100
	callq	_Znwm
.Ltmp4:
# %bb.6:                                # %.lr.ph.i.i.i.i.i.i.i.i.i36.preheader
	movq	%rax, %r15
	.cfi_escape 0x2e, 0x00
	movl	$256, %edx                      # imm = 0x100
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	16(%rsp), %rdi
.Ltmp6:
	.cfi_escape 0x2e, 0x00
	movl	$12582912, %edx                 # imm = 0xC00000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp7:
# %bb.7:
	movq	8(%rsp), %rdi
.Ltmp8:
	.cfi_escape 0x2e, 0x00
	movl	$6912, %edx                     # imm = 0x1B00
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp9:
# %bb.8:
	movq	(%rsp), %rdi
.Ltmp10:
	.cfi_escape 0x2e, 0x00
	movl	$256, %edx                      # imm = 0x100
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp11:
# %bb.9:
.Ltmp13:
	.cfi_escape 0x2e, 0x00
	movabsq	$137438953504, %rdi             # imm = 0x2000000020
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$3072, %r8d                     # imm = 0xC00
	movl	$4, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp14:
# %bb.10:
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	(%rsp), %rcx
.Ltmp15:
	.cfi_escape 0x2e, 0x10
	movl	$512, %r8d                      # imm = 0x200
	movl	$512, %r9d                      # imm = 0x200
	pushq	$64
	.cfi_adjust_cfa_offset 8
	pushq	$3
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__conv2d_kernelPfS_S_S_iiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.Ltmp16:
.LBB1_12:
.Ltmp18:
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp19:
# %bb.13:
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.LBB1_26
# %bb.14:
.Ltmp20:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp21:
# %bb.15:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
.Ltmp22:
	.cfi_escape 0x2e, 0x00
	movl	%ebp, %edi
	callq	hipGetErrorString
.Ltmp23:
# %bb.16:
	movq	%rax, %r12
	testq	%rax, %rax
	je	.LBB1_17
# %bb.21:
	.cfi_escape 0x2e, 0x00
	movq	%r12, %rdi
	callq	strlen
.Ltmp24:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cerr, %edi
	movq	%r12, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp25:
	jmp	.LBB1_22
.LBB1_26:
	movq	16(%rsp), %rdi
.Ltmp34:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp35:
# %bb.27:
	movq	24(%rsp), %rdi
.Ltmp36:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp37:
# %bb.28:
	movq	8(%rsp), %rdi
.Ltmp38:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp39:
# %bb.29:
	movq	(%rsp), %rdi
.Ltmp40:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp41:
# %bb.30:
.Ltmp42:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cout, %r12d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp43:
# %bb.31:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit47
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %r12
.Ltmp44:
	.cfi_escape 0x2e, 0x00
	movq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp45:
# %bb.32:                               # %.noexc68
.Ltmp46:
	.cfi_escape 0x2e, 0x00
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp47:
# %bb.33:                               # %.noexc69
	xorl	%ebp, %ebp
.Ltmp48:
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp49:
	jmp	.LBB1_34
.LBB1_17:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
.Ltmp26:
	.cfi_escape 0x2e, 0x00
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp27:
.LBB1_22:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit44
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %edi
	addq	-24(%rax), %rdi
.Ltmp28:
	.cfi_escape 0x2e, 0x00
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp29:
# %bb.23:                               # %.noexc65
.Ltmp30:
	.cfi_escape 0x2e, 0x00
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
.Ltmp31:
# %bb.24:                               # %.noexc66
	movl	$-1, %ebp
.Ltmp32:
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp33:
.LBB1_34:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit53
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rdi
	callq	_ZdlPv
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	_ZdlPv
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	_ZdlPv
	movl	%ebp, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_19:
	.cfi_def_cfa_offset 80
.Ltmp5:
	movq	%rax, %r12
	jmp	.LBB1_37
.LBB1_18:
.Ltmp2:
	movq	%rax, %r12
	jmp	.LBB1_38
.LBB1_20:
.Ltmp17:
	jmp	.LBB1_36
.LBB1_35:
.Ltmp12:
	jmp	.LBB1_36
.LBB1_25:
.Ltmp50:
.LBB1_36:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit55
	movq	%rax, %r12
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rdi
	callq	_ZdlPv
.LBB1_37:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit57
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	_ZdlPv
.LBB1_38:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit59
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	_ZdlPv
	.cfi_escape 0x2e, 0x00
	movq	%r12, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp6-.Ltmp4                  #   Call between .Ltmp4 and .Ltmp6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp11-.Ltmp6                 #   Call between .Ltmp6 and .Ltmp11
	.uleb128 .Ltmp12-.Lfunc_begin0          #     jumps to .Ltmp12
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp13-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp16-.Ltmp13                #   Call between .Ltmp13 and .Ltmp16
	.uleb128 .Ltmp17-.Lfunc_begin0          #     jumps to .Ltmp17
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp18-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp33-.Ltmp18                #   Call between .Ltmp18 and .Ltmp33
	.uleb128 .Ltmp50-.Lfunc_begin0          #     jumps to .Ltmp50
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp33-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Lfunc_end1-.Ltmp33            #   Call between .Ltmp33 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13conv2d_kernelPfS_S_S_iiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13conv2d_kernelPfS_S_S_iiii,@object # @_Z13conv2d_kernelPfS_S_S_iiii
	.section	.rodata,"a",@progbits
	.globl	_Z13conv2d_kernelPfS_S_S_iiii
	.p2align	3, 0x0
_Z13conv2d_kernelPfS_S_S_iiii:
	.quad	_Z28__device_stub__conv2d_kernelPfS_S_S_iiii
	.size	_Z13conv2d_kernelPfS_S_S_iiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Convolution completed successfully."
	.size	.L.str.1, 36

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13conv2d_kernelPfS_S_S_iiii"
	.size	.L__unnamed_1, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__conv2d_kernelPfS_S_S_iiii
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z13conv2d_kernelPfS_S_S_iiii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13conv2d_kernelPfS_S_S_iiii ; -- Begin function _Z13conv2d_kernelPfS_S_S_iiii
	.globl	_Z13conv2d_kernelPfS_S_S_iiii
	.p2align	8
	.type	_Z13conv2d_kernelPfS_S_S_iiii,@function
_Z13conv2d_kernelPfS_S_S_iiii:          ; @_Z13conv2d_kernelPfS_S_S_iiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x20
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_mov_b32 s18, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s12, s2, 16
	s_and_b32 s16, s2, 0xffff
	v_mad_u64_u32 v[0:1], null, s14, s12, v[3:4]
	v_mad_u64_u32 v[1:2], null, s13, s16, v[4:5]
	s_mul_i32 s17, s15, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s9, v0
	v_cmp_gt_i32_e64 s2, s8, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s14, vcc_lo, s2
	s_xor_b32 s2, s14, -1
	s_cmp_gt_i32 s10, 0
	s_cselect_b32 s13, -1, 0
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s3
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.preheader115
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB0_4
; %bb.2:                                ; %.lr.ph
	v_mad_u32_u24 v2, v3, s16, v4
	v_mov_b32_e32 v5, 0
	s_mov_b32 s3, s10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s10, v2
	v_lshl_add_u32 v2, v2, 2, 0
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	ds_store_b32 v2, v5
	v_add_nc_u32_e32 v2, 4, v2
	s_add_i32 s3, s3, -1
	s_mov_b32 s18, s10
	s_cmp_lg_u32 s3, 0
	s_cbranch_scc1 .LBB0_3
.LBB0_4:                                ; %Flow194
	s_or_saveexec_b32 s15, s2
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mov_b32_e32 v2, s18
	s_mul_i32 s9, s17, s9
	s_xor_b32 exec_lo, exec_lo, s15
	s_cbranch_execz .LBB0_10
; %bb.5:                                ; %.preheader114
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB0_8
; %bb.6:                                ; %.lr.ph119
	v_mul_lo_u32 v2, v0, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v2, v2, s9, v1
	v_mul_lo_u32 v5, v2, s10
	v_mad_u32_u24 v2, v3, s16, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v2, s10, v2
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_lshl_add_u32 v2, v2, 2, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_mov_b32 s0, s10
.LBB0_7:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v7, v[5:6], off
	v_add_co_u32 v5, vcc_lo, v5, 4
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	s_add_i32 s0, s0, -1
	s_mov_b32 s1, s10
	s_cmp_eq_u32 s0, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v7
	v_add_nc_u32_e32 v2, 4, v2
	s_cbranch_scc0 .LBB0_7
	s_branch .LBB0_9
.LBB0_8:
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s1, 0
.LBB0_9:                                ; %Flow193
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s1
.LBB0_10:                               ; %.loopexit
	s_or_b32 exec_lo, exec_lo, s15
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s14
	s_cbranch_execz .LBB0_21
; %bb.11:                               ; %.preheader113
	v_mad_u32_u24 v5, v3, s16, v4
	v_mov_b32_e32 v7, 0
	v_mov_b32_e32 v9, v2
	s_mul_i32 s0, s10, s16
	s_mul_i32 s15, s11, s10
	v_mul_lo_u32 v5, s10, v5
	s_mov_b32 s1, 0
	s_lshl_b32 s14, s0, 2
	s_lshl_b32 s17, s10, 2
	s_mul_i32 s18, s15, 3
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v8, v5, 2, 0
.LBB0_12:                               ; %.preheader112
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_13 Depth 2
                                        ;       Child Loop BB0_15 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v10, v9 :: v_dual_add_nc_u32 v5, s1, v3
	v_mov_b32_e32 v11, v8
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_u32_e64 s0, s12, v5
.LBB0_13:                               ; %.preheader
                                        ;   Parent Loop BB0_12 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_15 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB0_18
; %bb.14:                               ; %.lr.ph123
                                        ;   in Loop: Header=BB0_13 Depth=2
	v_dual_mov_b32 v12, v11 :: v_dual_add_nc_u32 v5, s19, v4
	s_mov_b32 s21, s10
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s16, v5
	v_mov_b32_e32 v5, v10
	s_and_b32 s20, s0, vcc_lo
.LBB0_15:                               ;   Parent Loop BB0_12 Depth=1
                                        ;     Parent Loop BB0_13 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s22, s20
	s_cbranch_execz .LBB0_17
; %bb.16:                               ;   in Loop: Header=BB0_15 Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[13:14], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, s4, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
	global_load_b32 v6, v[13:14], off
	ds_load_b32 v13, v12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v7, v13, v6
.LBB0_17:                               ;   in Loop: Header=BB0_15 Depth=3
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v12, 4, v12
	v_add_nc_u32_e32 v5, s11, v5
	s_add_i32 s21, s21, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s21, 0
	s_cbranch_scc0 .LBB0_15
.LBB0_18:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_13 Depth=2
	v_add_nc_u32_e32 v11, s17, v11
	v_add_nc_u32_e32 v10, s15, v10
	s_add_i32 s19, s19, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s19, 3
	s_cbranch_scc0 .LBB0_13
; %bb.19:                               ;   in Loop: Header=BB0_12 Depth=1
	v_add_nc_u32_e32 v8, s14, v8
	v_add_nc_u32_e32 v9, s18, v9
	s_add_i32 s1, s1, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s1, 3
	s_cbranch_scc0 .LBB0_12
; %bb.20:
	v_mov_b32_e32 v3, 0
	v_mul_lo_u32 v0, v0, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
	v_add3_u32 v4, v0, s9, v1
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v4, s11, v[2:3]
	v_add_f32_e32 v2, v7, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_21:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13conv2d_kernelPfS_S_S_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 23
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13conv2d_kernelPfS_S_S_iiii, .Lfunc_end0-_Z13conv2d_kernelPfS_S_S_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 828
; NumSgprs: 25
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 25
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         168
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13conv2d_kernelPfS_S_S_iiii
    .private_segment_fixed_size: 0
    .sgpr_count:     25
    .sgpr_spill_count: 0
    .symbol:         _Z13conv2d_kernelPfS_S_S_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
