// Author @ Eric Reinsmidt
// Date @ 2014.11.23
// Version 0.1

/*

  Driver cuda program for gameOfLife.cu

*/

#include <stdio.h>
#include <iostream>
#include "gameOfLife.cu"
using namespace std;

int main() {

    // Flag to output all generations to stdout
    bool showAll = false;

    // /Init number of generations to run
    int numGenerations = 100;

    // Create arrays for current and next generation on host
    char currentGeneration[65536];
    char theNextGeneration[65536];

    // Create pointers to current and next generation on device
    char *currentGenerationOnDevice;
    char *theNextGenerationOnDevice;

    // Fill automaton with empty cells
    for (int i = 0; i < 65536; i++) {
      currentGeneration[i] = 0;
    }

    // Place a strip of 10 vertical cells in middle of automaton
    // This is what will become the pentadecathlon oscillator
    for (int i = 123; i < 133; i++) {
      currentGeneration[i * 256 + 128] = 1;
    }

    // Output starting generation to stdout if flag set
    if (showAll) {
      cout << "Starting Generation:" << endl;
      outputAutomaton(currentGeneration);
    }

    // Allocate memory for current generation on device
    if (cudaMalloc((void **)&currentGenerationOnDevice, 65536 * sizeof(char)) != cudaSuccess) {
      cout << "cudaMalloc() failed!" << endl;
      exit(0);
    }

    // Allocate memory for the next generation on device
    if (cudaMalloc((void **)&theNextGenerationOnDevice, 65536 * sizeof(char)) != cudaSuccess) {
      cout << "cudaMalloc() failed!" << endl;
      exit(0);
    }

    // Copy initial generation from host to device
    if (cudaMemcpy(currentGenerationOnDevice, currentGeneration, 65536 * sizeof(char), cudaMemcpyHostToDevice) != cudaSuccess) {
      cout << "cudaMemcpy() failed!" << endl;
      exit(0);
    }

    // Continue calculating next generation until desired number of generations
    for(int i = 0; i < numGenerations; i++) {
      
      changeCellState <<<64, 1024>>>(currentGenerationOnDevice, theNextGenerationOnDevice, 256, 256);

      // Block until the device has completed all preceding requested tasks
      if (cudaDeviceSynchronize() != cudaSuccess) {
        cout << "cudaDeviceSynchronize() failed!" << endl;
        exit(0);
      }

      // Output current generation to stdout if flag set
      if (showAll) {
        cudaMemcpy(currentGeneration, theNextGenerationOnDevice, 65536 * sizeof(char), cudaMemcpyDeviceToHost);
        outputAutomaton(currentGeneration);
      }

      // Copy calculated generation to current generation on device
      cudaMemcpy(currentGenerationOnDevice, theNextGenerationOnDevice, 65536 * sizeof(char), cudaMemcpyDeviceToDevice);
    }

    // Copy final generation on device to host
    cudaMemcpy(theNextGeneration, theNextGenerationOnDevice, 65536 * sizeof(char), cudaMemcpyDeviceToHost);
    
    // Output final generation to stdout
    cout << "Final Generation:" << endl;
    outputAutomaton(theNextGeneration);

    // Explicitly destroy and clean up all resources associated
    // with the current device in the current process.
    if (cudaDeviceReset() != cudaSuccess) {
        cout << "cudaDeviceReset() failed!" << endl;
        return 1;
    }

    return 0;
}
	.file	"tmpxft_0027264d_00000000-6_gameOfLifeDriver.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3641:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3641:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4295:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4295:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"@"
.LC1:
	.string	" "
	.text
	.globl	_Z15outputAutomatonPc
	.type	_Z15outputAutomatonPc, @function
_Z15outputAutomatonPc:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	65536(%rdi), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	leaq	_ZSt4cout(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L4:
	xorl	%ebp, %ebp
.L7:
	cmpb	$1, (%rbx,%rbp)
	leaq	.LC0(%rip), %rsi
	je	.L11
	leaq	.LC1(%rip), %rsi
.L11:
	movq	%r12, %rdi
	incq	%rbp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$256, %rbp
	jne	.L7
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%r12, %rdi
	addq	$256, %rbx
	call	_ZNSolsEPFRSoS_E.isra.0
	cmpq	%r13, %rbx
	jne	.L4
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z15outputAutomatonPc, .-_Z15outputAutomatonPc
	.globl	_Z20translateToRowAndColiPiS_ii
	.type	_Z20translateToRowAndColiPiS_ii, @function
_Z20translateToRowAndColiPiS_ii:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3636:
	.size	_Z20translateToRowAndColiPiS_ii, .-_Z20translateToRowAndColiPiS_ii
	.globl	_Z16translateToIndexiiPiii
	.type	_Z16translateToIndexiiPiii, @function
_Z16translateToIndexiiPiii:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3637:
	.size	_Z16translateToIndexiiPiii, .-_Z16translateToIndexiiPiii
	.globl	_Z39__device_stub__Z15changeCellStatePcS_iiPcS_ii
	.type	_Z39__device_stub__Z15changeCellStatePcS_iiPcS_ii, @function
_Z39__device_stub__Z15changeCellStatePcS_iiPcS_ii:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15changeCellStatePcS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L17:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z39__device_stub__Z15changeCellStatePcS_iiPcS_ii, .-_Z39__device_stub__Z15changeCellStatePcS_iiPcS_ii
	.globl	_Z15changeCellStatePcS_ii
	.type	_Z15changeCellStatePcS_ii, @function
_Z15changeCellStatePcS_ii:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z15changeCellStatePcS_iiPcS_ii
	.cfi_endproc
.LFE3664:
	.size	_Z15changeCellStatePcS_ii, .-_Z15changeCellStatePcS_ii
	.section	.rodata.str1.1
.LC2:
	.string	"cudaMalloc() failed!"
.LC3:
	.string	"cudaMemcpy() failed!"
.LC4:
	.string	"cudaDeviceSynchronize() failed!"
.LC5:
	.string	"Final Generation:"
.LC6:
	.string	"cudaDeviceReset() failed!"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	-131072(%rsp), %r11
	.cfi_def_cfa 11, 131096
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$56, %rsp
	.cfi_def_cfa_offset 131152
	movl	$16384, %ecx
	movl	$65536, %esi
	movq	%fs:40, %rax
	movq	%rax, 131112(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rbx
	movq	%rbx, %rdi
	rep stosl
	movq	%rsp, %rdi
	movb	$1, 31656(%rsp)
	movb	$1, 31912(%rsp)
	movb	$1, 32168(%rsp)
	movb	$1, 32424(%rsp)
	movb	$1, 32680(%rsp)
	movb	$1, 32936(%rsp)
	movb	$1, 33192(%rsp)
	movb	$1, 33448(%rsp)
	movb	$1, 33704(%rsp)
	movb	$1, 33960(%rsp)
	call	cudaMalloc@PLT
	testl	%eax, %eax
	jne	.L36
	leaq	8(%rsp), %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L24
.L36:
	leaq	.LC2(%rip), %rsi
	jmp	.L37
.L24:
	movq	(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$65536, %edx
	movl	$4194305, %ebp
	movl	$100, %ebx
	call	cudaMemcpy@PLT
	salq	$10, %rbp
	testl	%eax, %eax
	je	.L25
	leaq	.LC3(%rip), %rsi
.L37:
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%edi, %edi
	call	exit@PLT
.L27:
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$3, %ecx
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	decl	%ebx
	je	.L38
.L25:
	movl	$67108865, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbp, %rdx
	salq	$6, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbp, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$256, %ecx
	movl	$256, %edx
	call	_Z39__device_stub__Z15changeCellStatePcS_iiPcS_ii
.L26:
	call	cudaDeviceSynchronize@PLT
	testl	%eax, %eax
	je	.L27
	leaq	.LC4(%rip), %rsi
	jmp	.L37
.L38:
	movq	8(%rsp), %rsi
	movl	$65536, %edx
	leaq	65576(%rsp), %rbp
	movl	$2, %ecx
	movq	%rbp, %rdi
	leaq	_ZSt4cout(%rip), %rbx
	call	cudaMemcpy@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%rbp, %rdi
	call	_Z15outputAutomatonPc
	call	cudaDeviceReset@PLT
	movl	%eax, %edx
	xorl	%eax, %eax
	testl	%edx, %edx
	je	.L22
	leaq	.LC6(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$1, %eax
.L22:
	movq	131112(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$131128, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z15changeCellStatePcS_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3666:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15changeCellStatePcS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3666:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Author @ Eric Reinsmidt
// Date @ 2014.11.23
// Version 0.1

/*

  Driver cuda program for gameOfLife.cu

*/


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include "gameOfLife.cu"
using namespace std;

int main() {

    // Flag to output all generations to stdout
    bool showAll = false;

    // /Init number of generations to run
    int numGenerations = 100;

    // Create arrays for current and next generation on host
    char currentGeneration[65536];
    char theNextGeneration[65536];

    // Create pointers to current and next generation on device
    char *currentGenerationOnDevice;
    char *theNextGenerationOnDevice;

    // Fill automaton with empty cells
    for (int i = 0; i < 65536; i++) {
      currentGeneration[i] = 0;
    }

    // Place a strip of 10 vertical cells in middle of automaton
    // This is what will become the pentadecathlon oscillator
    for (int i = 123; i < 133; i++) {
      currentGeneration[i * 256 + 128] = 1;
    }

    // Output starting generation to stdout if flag set
    if (showAll) {
      cout << "Starting Generation:" << endl;
      outputAutomaton(currentGeneration);
    }

    // Allocate memory for current generation on device
    if (hipMalloc((void **)&currentGenerationOnDevice, 65536 * sizeof(char)) != hipSuccess) {
      cout << "cudaMalloc() failed!" << endl;
      exit(0);
    }

    // Allocate memory for the next generation on device
    if (hipMalloc((void **)&theNextGenerationOnDevice, 65536 * sizeof(char)) != hipSuccess) {
      cout << "cudaMalloc() failed!" << endl;
      exit(0);
    }

    // Copy initial generation from host to device
    if (hipMemcpy(currentGenerationOnDevice, currentGeneration, 65536 * sizeof(char), hipMemcpyHostToDevice) != hipSuccess) {
      cout << "cudaMemcpy() failed!" << endl;
      exit(0);
    }

    // Continue calculating next generation until desired number of generations
    for(int i = 0; i < numGenerations; i++) {
      
      changeCellState <<<64, 1024>>>(currentGenerationOnDevice, theNextGenerationOnDevice, 256, 256);

      // Block until the device has completed all preceding requested tasks
      if (hipDeviceSynchronize() != hipSuccess) {
        cout << "cudaDeviceSynchronize() failed!" << endl;
        exit(0);
      }

      // Output current generation to stdout if flag set
      if (showAll) {
        hipMemcpy(currentGeneration, theNextGenerationOnDevice, 65536 * sizeof(char), hipMemcpyDeviceToHost);
        outputAutomaton(currentGeneration);
      }

      // Copy calculated generation to current generation on device
      hipMemcpy(currentGenerationOnDevice, theNextGenerationOnDevice, 65536 * sizeof(char), hipMemcpyDeviceToDevice);
    }

    // Copy final generation on device to host
    hipMemcpy(theNextGeneration, theNextGenerationOnDevice, 65536 * sizeof(char), hipMemcpyDeviceToHost);
    
    // Output final generation to stdout
    cout << "Final Generation:" << endl;
    outputAutomaton(theNextGeneration);

    // Explicitly destroy and clean up all resources associated
    // with the current device in the current process.
    if (hipDeviceReset() != hipSuccess) {
        cout << "cudaDeviceReset() failed!" << endl;
        return 1;
    }

    return 0;
}
	.text
	.file	"gameOfLifeDriver.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z15outputAutomatonPc           # -- Begin function _Z15outputAutomatonPc
	.type	_Z15outputAutomatonPc,@function
_Z15outputAutomatonPc:                  # @_Z15outputAutomatonPc
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
	movl	$_ZSt4cout, %r15d
.LBB0_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_2 Depth 2
	xorl	%r12d, %r12d
.LBB0_2:                                #   Parent Loop BB0_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpb	$1, (%rbx,%r12)
	movl	$.L.str, %esi
	je	.LBB0_4
# %bb.3:                                #   in Loop: Header=BB0_2 Depth=2
	movl	$.L.str.1, %esi
.LBB0_4:                                #   in Loop: Header=BB0_2 Depth=2
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r12
	cmpq	$256, %r12                      # imm = 0x100
	jne	.LBB0_2
# %bb.5:                                #   in Loop: Header=BB0_1 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incl	%r14d
	addq	$256, %rbx                      # imm = 0x100
	cmpl	$256, %r14d                     # imm = 0x100
	jne	.LBB0_1
# %bb.6:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z15outputAutomatonPc, .Lfunc_end0-_Z15outputAutomatonPc
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__changeCellStatePcS_ii # -- Begin function _Z30__device_stub__changeCellStatePcS_ii
	.type	_Z30__device_stub__changeCellStatePcS_ii,@function
_Z30__device_stub__changeCellStatePcS_ii: # @_Z30__device_stub__changeCellStatePcS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15changeCellStatePcS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z30__device_stub__changeCellStatePcS_ii, .Lfunc_end1-_Z30__device_stub__changeCellStatePcS_ii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:                                # %.preheader25.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$131088, %rsp                   # imm = 0x20010
	.cfi_def_cfa_offset 131120
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	leaq	16(%rsp), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$31616, %eax                    # imm = 0x7B80
.LBB2_1:                                # %.preheader25
                                        # =>This Inner Loop Header: Depth=1
	movb	$1, 16(%rsp,%rax)
	addq	$256, %rax                      # imm = 0x100
	cmpq	$34176, %rax                    # imm = 0x8580
	jne	.LBB2_1
# %bb.2:
	leaq	8(%rsp), %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_3
# %bb.5:
	movq	%rsp, %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_3
# %bb.6:
	movq	8(%rsp), %rdi
	leaq	16(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.7:                                # %.preheader.preheader
	movl	$100, %ebp
	movabsq	$4294967360, %rbx               # imm = 0x100000040
	leaq	960(%rbx), %r14
.LBB2_8:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.9:                                #   in Loop: Header=BB2_8 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movl	$256, %ecx                      # imm = 0x100
	callq	_Z30__device_stub__changeCellStatePcS_ii
.LBB2_10:                               #   in Loop: Header=BB2_8 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_11
# %bb.13:                               #   in Loop: Header=BB2_8 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movl	$3, %ecx
	callq	hipMemcpy
	decl	%ebp
	jne	.LBB2_8
# %bb.14:
	movq	(%rsp), %rsi
	leaq	65552(%rsp), %rbx
	movl	$65536, %edx                    # imm = 0x10000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %r14d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rbx, %rdi
	callq	_Z15outputAutomatonPc
	callq	hipDeviceReset
	testl	%eax, %eax
	je	.LBB2_15
# %bb.16:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$25, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$1, %eax
	jmp	.LBB2_17
.LBB2_15:
	xorl	%eax, %eax
.LBB2_17:
	addq	$131088, %rsp                   # imm = 0x20010
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_11:
	.cfi_def_cfa_offset 131120
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
.LBB2_4:
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	xorl	%edi, %edi
	callq	exit
.LBB2_3:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	jmp	.LBB2_4
.LBB2_12:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	jmp	.LBB2_4
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15changeCellStatePcS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"@"
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" "
	.size	.L.str.1, 2

	.type	_Z15changeCellStatePcS_ii,@object # @_Z15changeCellStatePcS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z15changeCellStatePcS_ii
	.p2align	3, 0x0
_Z15changeCellStatePcS_ii:
	.quad	_Z30__device_stub__changeCellStatePcS_ii
	.size	_Z15changeCellStatePcS_ii, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"cudaMalloc() failed!"
	.size	.L.str.3, 21

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"cudaMemcpy() failed!"
	.size	.L.str.4, 21

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"cudaDeviceSynchronize() failed!"
	.size	.L.str.5, 32

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Final Generation:"
	.size	.L.str.6, 18

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"cudaDeviceReset() failed!"
	.size	.L.str.7, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15changeCellStatePcS_ii"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__changeCellStatePcS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z15changeCellStatePcS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15changeCellStatePcS_ii ; -- Begin function _Z15changeCellStatePcS_ii
	.globl	_Z15changeCellStatePcS_ii
	.p2align	8
	.type	_Z15changeCellStatePcS_ii,@function
_Z15changeCellStatePcS_ii:              ; @_Z15changeCellStatePcS_ii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x10
	s_load_b32 s2, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s3, s4, 31
	s_ashr_i32 s6, s5, 31
	s_add_i32 s7, s4, s3
	s_add_i32 s8, s5, s6
	s_xor_b32 s7, s7, s3
	s_xor_b32 s12, s8, s6
	v_cvt_f32_u32_e32 v1, s7
	v_cvt_f32_u32_e32 v2, s12
	s_and_b32 s8, s15, 0xffffff
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	v_rcp_iflag_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v1, 0x4f7ffffe, v1 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v3, v1
	v_cvt_u32_f32_e32 v4, v2
	v_mad_u64_u32 v[1:2], null, s8, s2, v[0:1]
	s_sub_i32 s2, 0, s7
	s_sub_i32 s8, 0, s12
	v_mul_lo_u32 v0, s2, v3
	v_mul_lo_u32 v5, s8, v4
	s_load_b128 s[8:11], s[0:1], 0x0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v6, v1, v2
	v_mul_hi_u32 v5, v4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v6, v6, v2
	v_add_nc_u32_e32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v5
	v_mul_hi_u32 v0, v6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v6, v3
	v_mul_lo_u32 v4, v0, s7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, s12
	v_sub_nc_u32_e32 v4, v6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v6, v3
	v_subrev_nc_u32_e32 v6, s7, v4
	v_cmp_le_u32_e32 vcc_lo, s7, v4
	v_add_nc_u32_e32 v5, 1, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_subrev_nc_u32_e32 v7, s12, v3
	v_cmp_le_u32_e64 s2, s12, v3
	v_cndmask_b32_e32 v4, v4, v6, vcc_lo
	v_cndmask_b32_e32 v0, v0, v5, vcc_lo
	v_xor_b32_e32 v6, s3, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v3, v3, v7, s2
	v_cmp_le_u32_e32 vcc_lo, s7, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v5, 1, v0
	s_and_b32 s7, s5, 0xffffff
	v_subrev_nc_u32_e32 v7, s12, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v0, v0, v5, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s12, v3
	v_xor_b32_e32 v0, v0, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v3, v7, vcc_lo
	v_sub_nc_u32_e32 v4, v0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v5, v3, v2
	v_mov_b32_e32 v3, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v4
	s_delay_alu instid0(VALU_DEP_3)
	v_sub_nc_u32_e32 v0, v5, v2
	v_add_nc_u32_e32 v8, -1, v4
	v_cmpx_ne_u32_e32 0, v4
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u32_u24 v3, v8, s7, v0
	v_ashrrev_i32_e32 v6, 31, v3
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, s0, s8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, s9, v6, s0
	global_load_u8 v3, v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s0, 1, v3
	v_cndmask_b32_e64 v3, 0, 1, s0
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s1, s5, -1
	v_ashrrev_i32_e32 v7, 31, v0
	v_cmp_eq_u32_e64 s0, s1, v0
	v_cmp_ne_u32_e64 s1, s1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, vcc_lo, s0
	s_xor_b32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_mul_u32_u24_e32 v5, s7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_co_u32 v5, s2, v0, v5
	v_add_co_ci_u32_e64 v6, s2, v7, v6, s2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s2, s8, v5
	v_add_co_ci_u32_e64 v6, s2, s9, v6, s2
	global_load_u8 v5, v[5:6], off offset:1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s2, 1, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s2, 0, v3, s2
.LBB0_4:
	s_or_b32 exec_lo, exec_lo, s3
	v_mul_u32_u24_e32 v5, s7, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_6
; %bb.5:
	v_add_co_u32 v9, s1, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, s1, v7, v6, s1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v9, s1, s8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s1, s9, v10, s1
	global_load_u8 v9, v[9:10], off offset:1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s1, 1, v9
	v_add_co_ci_u32_e64 v3, s1, 0, v3, s1
.LBB0_6:
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s12, s4, -1
	v_add_nc_u32_e32 v9, 1, v4
	v_cmp_eq_u32_e64 s1, s12, v4
	v_cmp_ne_u32_e64 s2, s12, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s0, s1
	s_xor_b32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB0_8
; %bb.7:
	v_mul_u32_u24_e32 v10, s7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_add_co_u32 v10, s3, v0, v10
	v_add_co_ci_u32_e64 v11, s3, v7, v11, s3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s3, s8, v10
	v_add_co_ci_u32_e64 v11, s3, s9, v11, s3
	global_load_u8 v10, v[10:11], off offset:1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s3, 1, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s3, 0, v3, s3
.LBB0_8:
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_10
; %bb.9:
	v_mad_u32_u24 v10, v9, s7, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v10, s2, s8, v10
	v_add_co_ci_u32_e64 v11, s2, s9, v11, s2
	global_load_u8 v10, v[10:11], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s2, 1, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s2, 0, v3, s2
.LBB0_10:
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_ne_u32_e64 s2, s12, v4
	v_cmp_ne_u32_e64 s3, 0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_mul_u32_u24_e32 v9, s7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_add_co_u32 v9, s2, v0, v9
	v_add_co_ci_u32_e64 v10, s2, v7, v10, s2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s2, s8, v9
	v_add_co_ci_u32_e64 v10, s2, s9, v10, s2
	global_load_u8 v9, v[9:10], off offset:-1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s2, 1, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s2, 0, v3, s2
.LBB0_12:
	s_or_b32 exec_lo, exec_lo, s4
	v_cmp_eq_u32_e64 s2, 0, v0
	s_mov_b32 s13, exec_lo
	v_cmpx_ne_u32_e32 0, v0
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_add_co_u32 v9, s4, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, s4, v7, v6, s4
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v9, s4, s8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s4, s9, v10, s4
	global_load_u8 v9, v[9:10], off offset:-1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s4, 1, v9
	v_add_co_ci_u32_e64 v3, s4, 0, v3, s4
.LBB0_14:
	s_or_b32 exec_lo, exec_lo, s13
	v_cmp_ne_u32_e64 s4, 0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s4, s3
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB0_16
; %bb.15:
	v_mul_u32_u24_e32 v8, s7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_add_co_u32 v8, s3, v0, v8
	v_add_co_ci_u32_e64 v9, s3, v7, v9, s3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s3, s8, v8
	v_add_co_ci_u32_e64 v9, s3, s9, v9, s3
	global_load_u8 v8, v[8:9], off offset:-1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s3, 1, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s3, 0, v3, s3
.LBB0_16:
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB0_18
; %bb.17:
	s_and_b32 s3, s12, 0xffffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, s7, s3, v[0:1]
	v_ashrrev_i32_e32 v9, 31, v8
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, s3, s8, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s3, s9, v9, s3
	global_load_u8 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e64 s3, 0, v8
	v_add_co_ci_u32_e64 v3, s3, 0, v3, s3
.LBB0_18:
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s4, s1
	s_cbranch_execz .LBB0_20
; %bb.19:
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, s3, s8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s3, s9, v7, s3
	global_load_u8 v7, v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e64 s3, 0, v7
	v_add_co_ci_u32_e64 v3, s3, 0, v3, s3
.LBB0_20:
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_22
; %bb.21:
	s_mov_b32 s3, s5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s3, s8, s5
	s_addc_u32 s13, s9, s6
	v_add_co_u32 v7, s3, s3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s3, s13, v6, s3
	global_load_u8 v7, v[7:8], off offset:-1
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e64 s3, 0, v7
	v_add_co_ci_u32_e64 v3, s3, 0, v3, s3
.LBB0_22:
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB0_24
; %bb.23:
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, s3, s8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s3, s9, v6, s3
	global_load_u8 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e64 s3, 0, v5
	v_add_co_ci_u32_e64 v3, s3, 0, v3, s3
.LBB0_24:
	s_or_b32 exec_lo, exec_lo, s4
	v_or_b32_e32 v0, v0, v4
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_26
; %bb.25:
	s_and_b32 s3, s12, 0xffffff
	s_mov_b32 s13, s5
	s_mul_i32 s3, s7, s3
	v_mov_b32_e32 v0, 0
	s_ashr_i32 s14, s3, 31
	s_add_u32 s3, s3, s5
	s_addc_u32 s13, s14, s6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s14, s8, s3
	s_addc_u32 s15, s9, s13
	global_load_u8 v0, v0, s[14:15] offset:-1
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e64 s3, 0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s3, 0, v3, s3
.LBB0_26:
	s_or_b32 exec_lo, exec_lo, s4
	s_and_b32 s4, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s4
	s_cbranch_execz .LBB0_28
; %bb.27:
	s_and_b32 s4, s12, 0xffffff
	v_mov_b32_e32 v0, 0
	s_mul_i32 s7, s7, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s4, s7, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s8, s7
	s_addc_u32 s13, s9, s4
	global_load_u8 v0, v0, s[12:13]
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
.LBB0_28:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_b32 s3, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB0_30
; %bb.29:
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	global_load_u8 v0, v0, s[8:9]
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
.LBB0_30:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_32
; %bb.31:
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s8, s5
	s_addc_u32 s3, s9, s6
	s_mov_b32 s1, s5
	global_load_u8 v0, v0, s[2:3] offset:-1
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
.LBB0_32:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s8, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v2, vcc_lo
	s_barrier
	buffer_gl0_inv
	global_load_u8 v0, v[4:5], off
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u16_e32 1, v0
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_38
; %bb.33:
	v_add_co_u32 v0, s0, s10, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s0, s11, v2, s0
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e32 3, v3
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_35
; %bb.34:
	v_mov_b32_e32 v2, 0
	global_store_b8 v[0:1], v2, off
                                        ; implicit-def: $vgpr0_vgpr1
.LBB0_35:                               ; %Flow
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_37
; %bb.36:
	v_mov_b32_e32 v2, 1
	global_store_b8 v[0:1], v2, off
.LBB0_37:                               ; %Flow230
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr1_vgpr2
.LBB0_38:                               ; %Flow233
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_43
; %bb.39:
	v_add_nc_u32_e32 v0, -4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, -3, v0
	v_add_co_u32 v0, s0, s10, v1
	v_add_co_ci_u32_e64 v1, s0, s11, v2, s0
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_41
; %bb.40:
	v_mov_b32_e32 v2, 1
	global_store_b8 v[0:1], v2, off
                                        ; implicit-def: $vgpr0_vgpr1
.LBB0_41:                               ; %Flow231
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_43
; %bb.42:
	v_mov_b32_e32 v2, 0
	global_store_b8 v[0:1], v2, off
.LBB0_43:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15changeCellStatePcS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15changeCellStatePcS_ii, .Lfunc_end0-_Z15changeCellStatePcS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2048
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15changeCellStatePcS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15changeCellStatePcS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
