#include <stdio.h>
#include <stdlib.h>

#define INF 2147483647

extern "C" {

__global__ void init(int * tab, int len) {
	for(int i = threadIdx.x + len*blockIdx.x; i < len*blockIdx.x + len; i += 1024) {
		tab[i] = INF;
	}
}

__global__ void oneReduction(int * tab, int len, int mod) {

    __shared__ int begin, end;
    __shared__ int tmp_T[1024];

    if(threadIdx.x == 0) {
       begin = blockIdx.x*len;
       end = blockIdx.x*len + len;
    }

    __syncthreads();

    if(blockIdx.x % mod < mod/2) {
        for(int k = len/2; k >= 1024; k /= 2) {
            for(int g = begin; g < end; g += 2*k) {
                for(int j = g; j < g + k; j += 512) {
                    __syncthreads();

                    if(threadIdx.x < 512)
                        tmp_T[threadIdx.x] = tab[j + threadIdx.x];
                    else
                        tmp_T[threadIdx.x] = tab[j + threadIdx.x - 512 + k];

                    __syncthreads();
                    if(threadIdx.x < 512 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + 512]) {
                        tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                        tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
                        tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                    }

                    __syncthreads();
                    if(threadIdx.x < 512)
                        tab[j + threadIdx.x] = tmp_T[threadIdx.x];
                    else
                        tab[j + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];
                }	
            }
        }

        for(int i = begin; i < begin+len; i += 1024) {
            __syncthreads();
            tmp_T[threadIdx.x] = tab[i + threadIdx.x];
            __syncthreads();
            for(int jump = 512; jump >= 1; jump /= 2) {
                if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024  && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + jump]) {
                    tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
                    tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
                    tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
                }
                __syncthreads();
            }
            tab[i + threadIdx.x] = tmp_T[threadIdx.x];
        }
    } else {
        for(int k = len/2; k >= 1024; k /= 2) {
            for(int g = begin; g < end; g += 2*k) {
                for(int j = g; j < g + k; j += 512) {
                    __syncthreads();
                    if(threadIdx.x < 512)
                        tmp_T[threadIdx.x] = tab[j + threadIdx.x];
                    else
                        tmp_T[threadIdx.x] = tab[j + threadIdx.x - 512 + k];

                    __syncthreads();
                    if(threadIdx.x < 512 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + 512]) {
                        tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                        tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
                        tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                    }

                    __syncthreads();
                    if(threadIdx.x < 512)
                        tab[j + threadIdx.x] = tmp_T[threadIdx.x];
                    else
                        tab[j + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];
                }	
            }
        }

        for(int i = begin; i < begin + len; i += 1024) {
            __syncthreads();
            tmp_T[threadIdx.x] = tab[i + threadIdx.x];
            __syncthreads();
            for(int jump = 512; jump >= 1; jump /= 2) {
                if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024  && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + jump]) {
                    tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
                    tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
                    tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
                }
                __syncthreads();
            }
            tab[i + threadIdx.x] = tmp_T[threadIdx.x];
        }
    }


}

__global__ void oneBlock(int * tab, int len) {
    
    __shared__ int begin, end;
    __shared__ int tmp_T[1024];

    if(threadIdx.x == 0) {
       begin = blockIdx.x*len;
       end = blockIdx.x*len + len;
    }

    __syncthreads();

	//first phase

	for(int i = begin; i < end; i += 2048) {
		tmp_T[threadIdx.x] = tab[i + threadIdx.x];
		__syncthreads();

		for(int bSize = 2; bSize <= 1024; bSize *= 2) {
			for(int jump = bSize/2; jump >= 1; jump /= 2) {
				if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024  && (
				  ( tmp_T[threadIdx.x] > tmp_T[threadIdx.x + jump] && threadIdx.x % (bSize*2) < bSize ) ||
				  ( tmp_T[threadIdx.x] < tmp_T[threadIdx.x + jump] && threadIdx.x % (bSize*2) >= bSize ))) {
					tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
					tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
					tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
				}
				__syncthreads();
			}
		}

		tab[i + threadIdx.x] = tmp_T[threadIdx.x];
		__syncthreads();

		tmp_T[threadIdx.x] = tab[i + 1024 + threadIdx.x];
		__syncthreads();

		for(int bSize = 2; bSize <= 1024; bSize *= 2) {
			for(int jump = bSize/2; jump >= 1; jump /= 2) {
				if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024  && (
				  ( tmp_T[threadIdx.x] < tmp_T[threadIdx.x + jump] && threadIdx.x % (bSize*2) < bSize ) ||
				  ( tmp_T[threadIdx.x] > tmp_T[threadIdx.x + jump] && threadIdx.x % (bSize*2) >= bSize ))) {
					tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
					tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
					tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
				}
				__syncthreads();
			}
		}

		tab[i + 1024 + threadIdx.x] = tmp_T[threadIdx.x];
		__syncthreads();
	}


	// second phase

	for(int task_size = 2048; task_size < len; task_size *= 2) {
		for(int pos = begin; pos < end; pos += 2*task_size) {
			for(int k = task_size/2; k >= 1024; k /= 2) {
			    for(int lilPos = pos; lilPos < pos + task_size; lilPos += 2*k) {
                    for(int i = lilPos; i < lilPos + k; i += 512) {
                        __syncthreads();
                        if(threadIdx.x < 512)
                            tmp_T[threadIdx.x] = tab[i + threadIdx.x];
                        else
                            tmp_T[threadIdx.x] = tab[i + threadIdx.x - 512 + k];

                        __syncthreads();
                        if(threadIdx.x < 512 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + 512]) {
                            tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                            tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
                            tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                        }

                        __syncthreads();
                        if(threadIdx.x < 512)
                            tab[i + threadIdx.x] = tmp_T[threadIdx.x];
                        else
                            tab[i + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];

                    }
                }
			}
			for(int i = pos; i < pos + task_size; i += 1024) {
				tmp_T[threadIdx.x] = tab[i + threadIdx.x];
				for(int jump = 512; jump >= 1; jump /= 2) {
				    __syncthreads();
					if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024  && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + jump]) {
						tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
						tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
						tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
					}
					__syncthreads();
				}
				tab[i + threadIdx.x] = tmp_T[threadIdx.x];
				__syncthreads();
			}
		}
    __syncthreads();

		for(int pos = begin + task_size; pos < end; pos += 2*task_size) {
			for(int k = task_size/2; k >= 1024; k /= 2) {
			    for(int lilPos = pos; lilPos < pos + task_size; lilPos += 2*k) {
                    for(int i = lilPos; i < lilPos + k; i += 512) {
                        __syncthreads();
                        if(threadIdx.x < 512)
                            tmp_T[threadIdx.x] = tab[i + threadIdx.x];
                        else
                            tmp_T[threadIdx.x] = tab[i + threadIdx.x - 512 + k];

                        __syncthreads();
                        if(threadIdx.x < 512 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + 512]) {
                            tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                            tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
                            tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                        }

                        __syncthreads();
                        if(threadIdx.x < 512)
                            tab[i + threadIdx.x] = tmp_T[threadIdx.x];
                        else
                            tab[i + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];

                    }
                }
			}
			for(int i = pos; i < pos + task_size; i += 1024) {
				tmp_T[threadIdx.x] = tab[i + threadIdx.x];
				__syncthreads();
				for(int jump = 512; jump >= 1; jump /= 2) {
				    __syncthreads();
					if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024  && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + jump]) {
						tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
						tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
						tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
					}
					__syncthreads();
				}
				__syncthreads();
				tab[i + threadIdx.x] = tmp_T[threadIdx.x];
				__syncthreads();
			}
		}
	}
}

__global__ void oneMove(int * tab, int dist, int pow, int blocksPerTask, int period) {
	__shared__ int tmp_T[1024];
	__shared__ int begin;

	if(threadIdx.x == 0)
        begin = (blockIdx.x/blocksPerTask)*dist*2 + (blockIdx.x%blocksPerTask)*512*pow;

    __syncthreads();

    if((blockIdx.x / period) % 2 == 0) {
        for(int i = begin; i < begin + pow*512; i += 512) {
            if(threadIdx.x < 512) tmp_T[threadIdx.x] = tab[i + threadIdx.x];
            else tmp_T[threadIdx.x] = tab[i + threadIdx.x - 512 + dist];

            __syncthreads();

            if(threadIdx.x < 512 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + 512]) {
                tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
                tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
            }

            __syncthreads();

            if(threadIdx.x < 512) tab[i + threadIdx.x] = tmp_T[threadIdx.x];
            else tab[i + threadIdx.x - 512 + dist] = tmp_T[threadIdx.x];
            
            __syncthreads();
        }
    } else {
        for(int i = begin; i < begin + pow*512; i += 512) {
            if(threadIdx.x < 512) tmp_T[threadIdx.x] = tab[i + threadIdx.x];
            else tmp_T[threadIdx.x] = tab[i + threadIdx.x - 512 + dist];

            __syncthreads();

            if(threadIdx.x < 512 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + 512]) {
                tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
                tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
            }

            __syncthreads();

            if(threadIdx.x < 512) tab[i + threadIdx.x] = tmp_T[threadIdx.x];
            else tab[i + threadIdx.x - 512 + dist] = tmp_T[threadIdx.x];
            
            __syncthreads();
        }
    }
}

}

	.file	"tmpxft_0033b4f7_00000000-6_bitonic.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2029:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z24__device_stub__Z4initPiiPii
	.type	_Z24__device_stub__Z4initPiiPii, @function
_Z24__device_stub__Z4initPiiPii:
.LFB2051:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	init(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2051:
	.size	_Z24__device_stub__Z4initPiiPii, .-_Z24__device_stub__Z4initPiiPii
	.globl	init
	.type	init, @function
init:
.LFB2052:
	.cfi_startproc
	endbr64
	jmp	_Z24__device_stub__Z4initPiiPii
	.cfi_endproc
.LFE2052:
	.size	init, .-init
	.globl	_Z34__device_stub__Z12oneReductionPiiiPiii
	.type	_Z34__device_stub__Z12oneReductionPiiiPiii, @function
_Z34__device_stub__Z12oneReductionPiiiPiii:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	oneReduction(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z34__device_stub__Z12oneReductionPiiiPiii, .-_Z34__device_stub__Z12oneReductionPiiiPiii
	.globl	oneReduction
	.type	oneReduction, @function
oneReduction:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z12oneReductionPiiiPiii
	.cfi_endproc
.LFE2054:
	.size	oneReduction, .-oneReduction
	.globl	_Z28__device_stub__Z8oneBlockPiiPii
	.type	_Z28__device_stub__Z8oneBlockPiiPii, @function
_Z28__device_stub__Z8oneBlockPiiPii:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	oneBlock(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L13:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z28__device_stub__Z8oneBlockPiiPii, .-_Z28__device_stub__Z8oneBlockPiiPii
	.globl	oneBlock
	.type	oneBlock, @function
oneBlock:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z8oneBlockPiiPii
	.cfi_endproc
.LFE2056:
	.size	oneBlock, .-oneBlock
	.globl	_Z30__device_stub__Z7oneMovePiiiiiPiiiii
	.type	_Z30__device_stub__Z7oneMovePiiiiiPiiiii, @function
_Z30__device_stub__Z7oneMovePiiiiiPiiiii:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	oneMove(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L18:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z30__device_stub__Z7oneMovePiiiiiPiiiii, .-_Z30__device_stub__Z7oneMovePiiiiiPiiiii
	.globl	oneMove
	.type	oneMove, @function
oneMove:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z7oneMovePiiiiiPiiiii
	.cfi_endproc
.LFE2058:
	.size	oneMove, .-oneMove
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"oneMove"
.LC1:
	.string	"oneBlock"
.LC2:
	.string	"oneReduction"
.LC3:
	.string	"init"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	oneMove(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	oneBlock(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	oneReduction(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	init(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>

#define INF 2147483647

extern "C" {

__global__ void init(int * tab, int len) {
	for(int i = threadIdx.x + len*blockIdx.x; i < len*blockIdx.x + len; i += 1024) {
		tab[i] = INF;
	}
}

__global__ void oneReduction(int * tab, int len, int mod) {

    __shared__ int begin, end;
    __shared__ int tmp_T[1024];

    if(threadIdx.x == 0) {
       begin = blockIdx.x*len;
       end = blockIdx.x*len + len;
    }

    __syncthreads();

    if(blockIdx.x % mod < mod/2) {
        for(int k = len/2; k >= 1024; k /= 2) {
            for(int g = begin; g < end; g += 2*k) {
                for(int j = g; j < g + k; j += 512) {
                    __syncthreads();

                    if(threadIdx.x < 512)
                        tmp_T[threadIdx.x] = tab[j + threadIdx.x];
                    else
                        tmp_T[threadIdx.x] = tab[j + threadIdx.x - 512 + k];

                    __syncthreads();
                    if(threadIdx.x < 512 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + 512]) {
                        tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                        tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
                        tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                    }

                    __syncthreads();
                    if(threadIdx.x < 512)
                        tab[j + threadIdx.x] = tmp_T[threadIdx.x];
                    else
                        tab[j + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];
                }	
            }
        }

        for(int i = begin; i < begin+len; i += 1024) {
            __syncthreads();
            tmp_T[threadIdx.x] = tab[i + threadIdx.x];
            __syncthreads();
            for(int jump = 512; jump >= 1; jump /= 2) {
                if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024  && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + jump]) {
                    tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
                    tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
                    tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
                }
                __syncthreads();
            }
            tab[i + threadIdx.x] = tmp_T[threadIdx.x];
        }
    } else {
        for(int k = len/2; k >= 1024; k /= 2) {
            for(int g = begin; g < end; g += 2*k) {
                for(int j = g; j < g + k; j += 512) {
                    __syncthreads();
                    if(threadIdx.x < 512)
                        tmp_T[threadIdx.x] = tab[j + threadIdx.x];
                    else
                        tmp_T[threadIdx.x] = tab[j + threadIdx.x - 512 + k];

                    __syncthreads();
                    if(threadIdx.x < 512 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + 512]) {
                        tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                        tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
                        tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                    }

                    __syncthreads();
                    if(threadIdx.x < 512)
                        tab[j + threadIdx.x] = tmp_T[threadIdx.x];
                    else
                        tab[j + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];
                }	
            }
        }

        for(int i = begin; i < begin + len; i += 1024) {
            __syncthreads();
            tmp_T[threadIdx.x] = tab[i + threadIdx.x];
            __syncthreads();
            for(int jump = 512; jump >= 1; jump /= 2) {
                if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024  && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + jump]) {
                    tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
                    tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
                    tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
                }
                __syncthreads();
            }
            tab[i + threadIdx.x] = tmp_T[threadIdx.x];
        }
    }


}

__global__ void oneBlock(int * tab, int len) {
    
    __shared__ int begin, end;
    __shared__ int tmp_T[1024];

    if(threadIdx.x == 0) {
       begin = blockIdx.x*len;
       end = blockIdx.x*len + len;
    }

    __syncthreads();

	//first phase

	for(int i = begin; i < end; i += 2048) {
		tmp_T[threadIdx.x] = tab[i + threadIdx.x];
		__syncthreads();

		for(int bSize = 2; bSize <= 1024; bSize *= 2) {
			for(int jump = bSize/2; jump >= 1; jump /= 2) {
				if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024  && (
				  ( tmp_T[threadIdx.x] > tmp_T[threadIdx.x + jump] && threadIdx.x % (bSize*2) < bSize ) ||
				  ( tmp_T[threadIdx.x] < tmp_T[threadIdx.x + jump] && threadIdx.x % (bSize*2) >= bSize ))) {
					tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
					tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
					tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
				}
				__syncthreads();
			}
		}

		tab[i + threadIdx.x] = tmp_T[threadIdx.x];
		__syncthreads();

		tmp_T[threadIdx.x] = tab[i + 1024 + threadIdx.x];
		__syncthreads();

		for(int bSize = 2; bSize <= 1024; bSize *= 2) {
			for(int jump = bSize/2; jump >= 1; jump /= 2) {
				if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024  && (
				  ( tmp_T[threadIdx.x] < tmp_T[threadIdx.x + jump] && threadIdx.x % (bSize*2) < bSize ) ||
				  ( tmp_T[threadIdx.x] > tmp_T[threadIdx.x + jump] && threadIdx.x % (bSize*2) >= bSize ))) {
					tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
					tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
					tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
				}
				__syncthreads();
			}
		}

		tab[i + 1024 + threadIdx.x] = tmp_T[threadIdx.x];
		__syncthreads();
	}


	// second phase

	for(int task_size = 2048; task_size < len; task_size *= 2) {
		for(int pos = begin; pos < end; pos += 2*task_size) {
			for(int k = task_size/2; k >= 1024; k /= 2) {
			    for(int lilPos = pos; lilPos < pos + task_size; lilPos += 2*k) {
                    for(int i = lilPos; i < lilPos + k; i += 512) {
                        __syncthreads();
                        if(threadIdx.x < 512)
                            tmp_T[threadIdx.x] = tab[i + threadIdx.x];
                        else
                            tmp_T[threadIdx.x] = tab[i + threadIdx.x - 512 + k];

                        __syncthreads();
                        if(threadIdx.x < 512 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + 512]) {
                            tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                            tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
                            tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                        }

                        __syncthreads();
                        if(threadIdx.x < 512)
                            tab[i + threadIdx.x] = tmp_T[threadIdx.x];
                        else
                            tab[i + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];

                    }
                }
			}
			for(int i = pos; i < pos + task_size; i += 1024) {
				tmp_T[threadIdx.x] = tab[i + threadIdx.x];
				for(int jump = 512; jump >= 1; jump /= 2) {
				    __syncthreads();
					if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024  && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + jump]) {
						tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
						tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
						tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
					}
					__syncthreads();
				}
				tab[i + threadIdx.x] = tmp_T[threadIdx.x];
				__syncthreads();
			}
		}
    __syncthreads();

		for(int pos = begin + task_size; pos < end; pos += 2*task_size) {
			for(int k = task_size/2; k >= 1024; k /= 2) {
			    for(int lilPos = pos; lilPos < pos + task_size; lilPos += 2*k) {
                    for(int i = lilPos; i < lilPos + k; i += 512) {
                        __syncthreads();
                        if(threadIdx.x < 512)
                            tmp_T[threadIdx.x] = tab[i + threadIdx.x];
                        else
                            tmp_T[threadIdx.x] = tab[i + threadIdx.x - 512 + k];

                        __syncthreads();
                        if(threadIdx.x < 512 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + 512]) {
                            tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                            tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
                            tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                        }

                        __syncthreads();
                        if(threadIdx.x < 512)
                            tab[i + threadIdx.x] = tmp_T[threadIdx.x];
                        else
                            tab[i + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];

                    }
                }
			}
			for(int i = pos; i < pos + task_size; i += 1024) {
				tmp_T[threadIdx.x] = tab[i + threadIdx.x];
				__syncthreads();
				for(int jump = 512; jump >= 1; jump /= 2) {
				    __syncthreads();
					if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024  && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + jump]) {
						tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
						tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
						tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
					}
					__syncthreads();
				}
				__syncthreads();
				tab[i + threadIdx.x] = tmp_T[threadIdx.x];
				__syncthreads();
			}
		}
	}
}

__global__ void oneMove(int * tab, int dist, int pow, int blocksPerTask, int period) {
	__shared__ int tmp_T[1024];
	__shared__ int begin;

	if(threadIdx.x == 0)
        begin = (blockIdx.x/blocksPerTask)*dist*2 + (blockIdx.x%blocksPerTask)*512*pow;

    __syncthreads();

    if((blockIdx.x / period) % 2 == 0) {
        for(int i = begin; i < begin + pow*512; i += 512) {
            if(threadIdx.x < 512) tmp_T[threadIdx.x] = tab[i + threadIdx.x];
            else tmp_T[threadIdx.x] = tab[i + threadIdx.x - 512 + dist];

            __syncthreads();

            if(threadIdx.x < 512 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + 512]) {
                tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
                tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
            }

            __syncthreads();

            if(threadIdx.x < 512) tab[i + threadIdx.x] = tmp_T[threadIdx.x];
            else tab[i + threadIdx.x - 512 + dist] = tmp_T[threadIdx.x];
            
            __syncthreads();
        }
    } else {
        for(int i = begin; i < begin + pow*512; i += 512) {
            if(threadIdx.x < 512) tmp_T[threadIdx.x] = tab[i + threadIdx.x];
            else tmp_T[threadIdx.x] = tab[i + threadIdx.x - 512 + dist];

            __syncthreads();

            if(threadIdx.x < 512 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + 512]) {
                tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
                tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
                tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
            }

            __syncthreads();

            if(threadIdx.x < 512) tab[i + threadIdx.x] = tmp_T[threadIdx.x];
            else tab[i + threadIdx.x - 512 + dist] = tmp_T[threadIdx.x];
            
            __syncthreads();
        }
    }
}

}

	.text
	.file	"bitonic.hip"
	.globl	__device_stub__init             # -- Begin function __device_stub__init
	.type	__device_stub__init,@function
__device_stub__init:                    # @__device_stub__init
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$init, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	__device_stub__init, .Lfunc_end0-__device_stub__init
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__oneReduction     # -- Begin function __device_stub__oneReduction
	.type	__device_stub__oneReduction,@function
__device_stub__oneReduction:            # @__device_stub__oneReduction
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$oneReduction, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	__device_stub__oneReduction, .Lfunc_end1-__device_stub__oneReduction
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__oneBlock         # -- Begin function __device_stub__oneBlock
	.type	__device_stub__oneBlock,@function
__device_stub__oneBlock:                # @__device_stub__oneBlock
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$oneBlock, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	__device_stub__oneBlock, .Lfunc_end2-__device_stub__oneBlock
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__oneMove          # -- Begin function __device_stub__oneMove
	.type	__device_stub__oneMove,@function
__device_stub__oneMove:                 # @__device_stub__oneMove
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$oneMove, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	__device_stub__oneMove, .Lfunc_end3-__device_stub__oneMove
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$init, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$oneReduction, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$oneBlock, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$oneMove, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	init,@object                    # @init
	.section	.rodata,"a",@progbits
	.globl	init
	.p2align	3, 0x0
init:
	.quad	__device_stub__init
	.size	init, 8

	.type	oneReduction,@object            # @oneReduction
	.globl	oneReduction
	.p2align	3, 0x0
oneReduction:
	.quad	__device_stub__oneReduction
	.size	oneReduction, 8

	.type	oneBlock,@object                # @oneBlock
	.globl	oneBlock
	.p2align	3, 0x0
oneBlock:
	.quad	__device_stub__oneBlock
	.size	oneBlock, 8

	.type	oneMove,@object                 # @oneMove
	.globl	oneMove
	.p2align	3, 0x0
oneMove:
	.quad	__device_stub__oneMove
	.size	oneMove, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"init"
	.size	.L__unnamed_1, 5

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"oneReduction"
	.size	.L__unnamed_2, 13

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"oneBlock"
	.size	.L__unnamed_3, 9

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"oneMove"
	.size	.L__unnamed_4, 8

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __device_stub__init
	.addrsig_sym __device_stub__oneReduction
	.addrsig_sym __device_stub__oneBlock
	.addrsig_sym __device_stub__oneMove
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym init
	.addrsig_sym oneReduction
	.addrsig_sym oneBlock
	.addrsig_sym oneMove
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	init                    ; -- Begin function init
	.globl	init
	.p2align	8
	.type	init,@function
init:                                   ; @init
; %bb.0:
	s_load_b32 s2, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s15, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, s3, v0
	s_add_i32 s2, s3, s2
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	v_bfrev_b32_e32 v3, -2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_mov_b32 s1, 0
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v0, 0x400, v0
	global_store_b32 v[1:2], v3, off
	v_add_co_u32 v1, s0, 0x1000, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v2, s0, 0, v2, s0
	v_cmp_le_u32_e32 vcc_lo, s2, v0
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow12
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel init
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 12
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	init, .Lfunc_end0-init
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	oneReduction            ; -- Begin function oneReduction
	.globl	oneReduction
	.p2align	8
	.type	oneReduction,@function
oneReduction:                           ; @oneReduction
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x8
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s5, s15, s2
	v_mov_b32_e32 v3, 0
	s_add_i32 s6, s5, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s5 :: v_dual_mov_b32 v1, s6
	ds_store_b64 v3, v[1:2] offset:4096
.LBB1_2:                                ; %._crit_edge119
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_u32_e32 v1, s3
	s_sub_i32 s5, 0, s3
	s_barrier
	buffer_gl0_inv
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s5, s5, s4
	s_mul_hi_u32 s5, s4, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s4, s4, s5
	s_mul_hi_u32 s4, s15, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s4, s4, s3
	s_sub_i32 s4, s15, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s5, s4, s3
	s_cmp_ge_u32 s4, s3
	s_cselect_b32 s6, s5, s4
	s_load_b64 s[4:5], s[0:1], 0x0
	s_sub_i32 s7, s6, s3
	s_cmp_ge_u32 s6, s3
	s_cselect_b32 s0, s7, s6
	s_lshr_b32 s1, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s1, s3, s1
	s_ashr_i32 s3, s1, 1
	s_cmpk_gt_i32 s2, 0x7ff
	s_cselect_b32 s1, -1, 0
	s_cmp_ge_u32 s0, s3
	v_cndmask_b32_e64 v1, 0, 1, s1
	s_mov_b32 s0, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, 1, v1
	s_cbranch_scc0 .LBB1_27
; %bb.3:
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	s_cbranch_vccnz .LBB1_17
; %bb.4:                                ; %.lr.ph96
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v3, 2, v0
	v_cmp_gt_u32_e64 s0, 0x200, v0
	v_add_nc_u32_e32 v4, 0xfffffe00, v0
	s_mov_b32 s3, s2
	ds_load_b32 v1, v2 offset:4096
	v_add_nc_u32_e32 v5, 0x800, v3
.LBB1_5:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_7 Depth 2
                                        ;       Child Loop BB1_9 Depth 3
	ds_load_b32 v6, v2 offset:4100
	s_lshr_b32 s6, s3, 1
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v6, v1
	v_readfirstlane_b32 s7, v6
	s_cbranch_vccnz .LBB1_16
; %bb.6:                                ; %.preheader90.lr.ph
                                        ;   in Loop: Header=BB1_5 Depth=1
	v_add_nc_u32_e32 v6, s6, v4
	s_and_b32 s8, s3, 0x7ffffffe
	s_cmp_gt_u32 s3, 1
	s_cselect_b32 s9, -1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v7, v6, v0, s0
.LBB1_7:                                ; %.preheader90
                                        ;   Parent Loop BB1_5 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_9 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_cbranch_vccnz .LBB1_15
; %bb.8:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB1_7 Depth=2
	s_add_i32 s10, s7, s6
	s_mov_b32 s11, s7
.LBB1_9:                                ; %.lr.ph
                                        ;   Parent Loop BB1_5 Depth=1
                                        ;     Parent Loop BB1_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v1, s11, v7
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB1_13
; %bb.10:                               ;   in Loop: Header=BB1_9 Depth=3
	ds_load_b32 v1, v3
	ds_load_b32 v8, v5
	s_mov_b32 s13, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_i32_e64 v1, v8
	s_cbranch_execz .LBB1_12
; %bb.11:                               ;   in Loop: Header=BB1_9 Depth=3
	ds_store_b32 v5, v1
	ds_store_b32 v3, v8
.LBB1_12:                               ; %Flow147
                                        ;   in Loop: Header=BB1_9 Depth=3
	s_or_b32 exec_lo, exec_lo, s13
	v_mov_b32_e32 v1, v0
.LBB1_13:                               ;   in Loop: Header=BB1_9 Depth=3
	s_or_b32 exec_lo, exec_lo, s12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v10, v3
	v_add_nc_u32_e32 v1, s11, v1
	s_addk_i32 s11, 0x200
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_ge_i32 s11, s10
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[8:9], v10, off
	s_cbranch_scc0 .LBB1_9
; %bb.14:                               ; %._crit_edge.loopexit
                                        ;   in Loop: Header=BB1_7 Depth=2
	ds_load_b32 v1, v2 offset:4096
.LBB1_15:                               ; %._crit_edge
                                        ;   in Loop: Header=BB1_7 Depth=2
	s_add_i32 s7, s7, s8
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s7, v1
	s_cbranch_vccz .LBB1_7
.LBB1_16:                               ; %._crit_edge93
                                        ;   in Loop: Header=BB1_5 Depth=1
	s_cmpk_lt_u32 s3, 0x1000
	s_mov_b32 s3, s6
	s_cbranch_scc0 .LBB1_5
.LBB1_17:                               ; %._crit_edge97
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB1_26
; %bb.18:                               ; %.lr.ph101
	v_mov_b32_e32 v2, 0
	v_lshlrev_b32_e32 v6, 2, v0
	ds_load_b32 v5, v2 offset:4100
.LBB1_19:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_20 Depth 2
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v5, v0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_movk_i32 s0, 0x200
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v1, v[3:4], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_20:                               ;   Parent Loop BB1_19 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshl_b32 s3, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, -1
	v_and_b32_e32 v1, s3, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v1
	s_cbranch_execz .LBB1_24
; %bb.21:                               ;   in Loop: Header=BB1_20 Depth=2
	v_add_nc_u32_e32 v1, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 0x400, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_24
; %bb.22:                               ;   in Loop: Header=BB1_20 Depth=2
	v_lshl_add_u32 v1, s0, 2, v6
	ds_load_b32 v7, v6
	ds_load_b32 v8, v1
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v7, v8
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_24
; %bb.23:                               ;   in Loop: Header=BB1_20 Depth=2
	ds_store_b32 v1, v7
	ds_store_b32 v6, v8
.LBB1_24:                               ;   in Loop: Header=BB1_20 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_lshr_b32 s3, s0, 1
	s_cmp_lt_u32 s0, 2
	s_mov_b32 s0, s3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_20
; %bb.25:                               ;   in Loop: Header=BB1_19 Depth=1
	ds_load_b32 v1, v2 offset:4100
	ds_load_b32 v7, v6
	v_add_nc_u32_e32 v5, 0x400, v5
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, s2, v1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v7, off
	v_cmp_ge_i32_e32 vcc_lo, v5, v1
	s_cbranch_vccz .LBB1_19
.LBB1_26:                               ; %Flow146
	s_mov_b32 s0, 0
.LBB1_27:                               ; %Flow163
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB1_51
; %bb.28:
	v_lshlrev_b32_e32 v5, 2, v0
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_42
; %bb.29:                               ; %.lr.ph109
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, 0xfffffe00, v0
	v_cmp_gt_u32_e64 s0, 0x200, v0
	v_add_nc_u32_e32 v4, 0x800, v5
	s_mov_b32 s1, s2
	ds_load_b32 v1, v2 offset:4096
.LBB1_30:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_32 Depth 2
                                        ;       Child Loop BB1_34 Depth 3
	ds_load_b32 v6, v2 offset:4100
	s_lshr_b32 s3, s1, 1
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v6, v1
	v_readfirstlane_b32 s6, v6
	s_cbranch_vccnz .LBB1_41
; %bb.31:                               ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB1_30 Depth=1
	v_add_nc_u32_e32 v6, s3, v3
	s_and_b32 s7, s1, 0x7ffffffe
	s_cmp_gt_u32 s1, 1
	s_cselect_b32 s8, -1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v7, v6, v0, s0
.LBB1_32:                               ; %.preheader
                                        ;   Parent Loop BB1_30 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_34 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB1_40
; %bb.33:                               ; %.lr.ph103.preheader
                                        ;   in Loop: Header=BB1_32 Depth=2
	s_add_i32 s9, s6, s3
	s_mov_b32 s10, s6
.LBB1_34:                               ; %.lr.ph103
                                        ;   Parent Loop BB1_30 Depth=1
                                        ;     Parent Loop BB1_32 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v1, s10, v7
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB1_38
; %bb.35:                               ;   in Loop: Header=BB1_34 Depth=3
	ds_load_b32 v1, v5
	ds_load_b32 v8, v4
	s_mov_b32 s12, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 v1, v8
	s_cbranch_execz .LBB1_37
; %bb.36:                               ;   in Loop: Header=BB1_34 Depth=3
	ds_store_b32 v4, v1
	ds_store_b32 v5, v8
.LBB1_37:                               ; %Flow157
                                        ;   in Loop: Header=BB1_34 Depth=3
	s_or_b32 exec_lo, exec_lo, s12
	v_mov_b32_e32 v1, v0
.LBB1_38:                               ;   in Loop: Header=BB1_34 Depth=3
	s_or_b32 exec_lo, exec_lo, s11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v10, v5
	v_add_nc_u32_e32 v1, s10, v1
	s_addk_i32 s10, 0x200
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_ge_i32 s10, s9
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[8:9], v10, off
	s_cbranch_scc0 .LBB1_34
; %bb.39:                               ; %._crit_edge104.loopexit
                                        ;   in Loop: Header=BB1_32 Depth=2
	ds_load_b32 v1, v2 offset:4096
.LBB1_40:                               ; %._crit_edge104
                                        ;   in Loop: Header=BB1_32 Depth=2
	s_add_i32 s6, s6, s7
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s6, v1
	s_cbranch_vccz .LBB1_32
.LBB1_41:                               ; %._crit_edge106
                                        ;   in Loop: Header=BB1_30 Depth=1
	s_cmpk_lt_u32 s1, 0x1000
	s_mov_b32 s1, s3
	s_cbranch_scc0 .LBB1_30
.LBB1_42:                               ; %._crit_edge110
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB1_51
; %bb.43:                               ; %.lr.ph114
	v_mov_b32_e32 v2, 0
	ds_load_b32 v6, v2 offset:4100
.LBB1_44:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_45 Depth 2
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v6, v0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_movk_i32 s0, 0x200
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v1, v[3:4], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_45:                               ;   Parent Loop BB1_44 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshl_b32 s1, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s1, s1, -1
	v_and_b32_e32 v1, s1, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v1
	s_cbranch_execz .LBB1_49
; %bb.46:                               ;   in Loop: Header=BB1_45 Depth=2
	v_add_nc_u32_e32 v1, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 0x400, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_49
; %bb.47:                               ;   in Loop: Header=BB1_45 Depth=2
	v_lshl_add_u32 v1, s0, 2, v5
	ds_load_b32 v7, v5
	ds_load_b32 v8, v1
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v7, v8
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_49
; %bb.48:                               ;   in Loop: Header=BB1_45 Depth=2
	ds_store_b32 v1, v7
	ds_store_b32 v5, v8
.LBB1_49:                               ;   in Loop: Header=BB1_45 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_lshr_b32 s1, s0, 1
	s_cmp_lt_u32 s0, 2
	s_mov_b32 s0, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_45
; %bb.50:                               ;   in Loop: Header=BB1_44 Depth=1
	ds_load_b32 v1, v2 offset:4100
	ds_load_b32 v7, v5
	v_add_nc_u32_e32 v6, 0x400, v6
	s_waitcnt lgkmcnt(1)
	v_add_nc_u32_e32 v1, s2, v1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v7, off
	v_cmp_ge_i32_e32 vcc_lo, v6, v1
	s_cbranch_vccz .LBB1_44
.LBB1_51:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel oneReduction
		.amdhsa_group_segment_fixed_size 4104
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	oneReduction, .Lfunc_end1-oneReduction
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1708
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4104 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	oneBlock                ; -- Begin function oneBlock
	.globl	oneBlock
	.p2align	8
	.type	oneBlock,@function
oneBlock:                               ; @oneBlock
; %bb.0:
	s_load_b32 s3, s[0:1], 0x8
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s15, s3
	v_mov_b32_e32 v3, 0
	s_add_i32 s5, s4, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v1, s5
	ds_store_b64 v3, v[1:2] offset:4096
.LBB2_2:
	s_or_b32 exec_lo, exec_lo, s2
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v9, 2, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b64 v[3:4], v2 offset:4096
	s_load_b64 s[4:5], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v4, v3
	s_cbranch_vccnz .LBB2_21
; %bb.3:                                ; %.lr.ph185
	v_or_b32_e32 v10, 0x400, v0
.LBB2_4:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_5 Depth 2
                                        ;       Child Loop BB2_6 Depth 3
                                        ;     Child Loop BB2_13 Depth 2
                                        ;       Child Loop BB2_14 Depth 3
	v_add_nc_u32_e32 v1, v4, v0
	s_mov_b32 s6, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b32 v1, v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_5:                                ; %.preheader170
                                        ;   Parent Loop BB2_4 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_6 Depth 3
	s_lshl_b32 s7, s6, 1
	s_mov_b32 s8, s6
	s_add_i32 s0, s7, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s0, v0
	v_cmp_le_u32_e32 vcc_lo, s6, v1
	v_cmp_gt_u32_e64 s0, s6, v1
.LBB2_6:                                ;   Parent Loop BB2_4 Depth=1
                                        ;     Parent Loop BB2_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_and_b32 s1, s8, 0x3fe
	s_mov_b32 s9, s8
	s_add_i32 s1, s1, -1
	s_lshr_b32 s8, s8, 1
	v_and_b32_e32 v1, s1, v0
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v1
	s_cbranch_execz .LBB2_10
; %bb.7:                                ;   in Loop: Header=BB2_6 Depth=3
	v_add_nc_u32_e32 v1, s8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, 0x400, v1
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB2_10
; %bb.8:                                ;   in Loop: Header=BB2_6 Depth=3
	v_lshl_add_u32 v3, s8, 2, v9
	ds_load_b32 v1, v9
	ds_load_b32 v7, v3
	s_waitcnt lgkmcnt(0)
	v_cmp_le_i32_e64 s1, v1, v7
	v_cmp_ge_i32_e64 s2, v1, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s1, s1, vcc_lo
	s_or_b32 s2, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_xor_b32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB2_10
; %bb.9:                                ;   in Loop: Header=BB2_6 Depth=3
	v_xor_b32_e32 v7, v7, v1
	ds_store_b32 v9, v7
	ds_store_b32 v3, v1
	ds_load_b32 v3, v9
	s_waitcnt lgkmcnt(0)
	v_xor_b32_e32 v1, v3, v1
	ds_store_b32 v9, v1
.LBB2_10:                               ;   in Loop: Header=BB2_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s10
	s_cmp_lt_u32 s9, 4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_6
; %bb.11:                               ; %._crit_edge
                                        ;   in Loop: Header=BB2_5 Depth=2
	s_cmpk_gt_u32 s6, 0x200
	s_mov_b32 s6, s7
	s_cbranch_scc0 .LBB2_5
; %bb.12:                               ;   in Loop: Header=BB2_4 Depth=1
	ds_load_b32 v3, v9
	v_add_nc_u32_e32 v1, v10, v4
	s_mov_b32 s6, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[5:6], v3, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v1, v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_13:                               ; %.preheader169
                                        ;   Parent Loop BB2_4 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_14 Depth 3
	s_lshl_b32 s7, s6, 1
	s_mov_b32 s8, s6
	s_add_i32 s0, s7, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, s0, v0
	v_cmp_le_u32_e32 vcc_lo, s6, v1
	v_cmp_gt_u32_e64 s0, s6, v1
.LBB2_14:                               ;   Parent Loop BB2_4 Depth=1
                                        ;     Parent Loop BB2_13 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_and_b32 s1, s8, 0x3fe
	s_mov_b32 s9, s8
	s_add_i32 s1, s1, -1
	s_lshr_b32 s8, s8, 1
	v_and_b32_e32 v1, s1, v0
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s8, v1
	s_cbranch_execz .LBB2_18
; %bb.15:                               ;   in Loop: Header=BB2_14 Depth=3
	v_add_nc_u32_e32 v1, s8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, 0x400, v1
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB2_18
; %bb.16:                               ;   in Loop: Header=BB2_14 Depth=3
	v_lshl_add_u32 v3, s8, 2, v9
	ds_load_b32 v1, v9
	ds_load_b32 v5, v3
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e64 s1, v1, v5
	v_cmp_le_i32_e64 s2, v1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s1, s1, vcc_lo
	s_or_b32 s2, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_xor_b32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB2_18
; %bb.17:                               ;   in Loop: Header=BB2_14 Depth=3
	v_xor_b32_e32 v5, v5, v1
	ds_store_b32 v9, v5
	ds_store_b32 v3, v1
	ds_load_b32 v3, v9
	s_waitcnt lgkmcnt(0)
	v_xor_b32_e32 v1, v3, v1
	ds_store_b32 v9, v1
.LBB2_18:                               ;   in Loop: Header=BB2_14 Depth=3
	s_or_b32 exec_lo, exec_lo, s10
	s_cmp_lt_u32 s9, 4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_14
; %bb.19:                               ; %._crit_edge181
                                        ;   in Loop: Header=BB2_13 Depth=2
	s_cmpk_gt_u32 s6, 0x200
	s_mov_b32 s6, s7
	s_cbranch_scc0 .LBB2_13
; %bb.20:                               ;   in Loop: Header=BB2_4 Depth=1
	ds_load_b32 v1, v9
	v_add_nc_u32_e32 v4, 0x800, v4
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[7:8], v1, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v3, v2 offset:4096
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v4, v3
	s_cbranch_vccz .LBB2_4
.LBB2_21:                               ; %.preheader168
	s_cmpk_lt_i32 s3, 0x801
	s_cbranch_scc1 .LBB2_69
; %bb.22:                               ; %.lr.ph215
	v_cmp_gt_u32_e64 s0, 0x200, v0
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v5, 0xfffffe00, v0
	v_add_nc_u32_e32 v6, 0x800, v9
	s_movk_i32 s1, 0x800
.LBB2_23:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_25 Depth 2
                                        ;       Child Loop BB2_26 Depth 3
                                        ;         Child Loop BB2_27 Depth 4
                                        ;           Child Loop BB2_28 Depth 5
                                        ;       Child Loop BB2_36 Depth 3
                                        ;         Child Loop BB2_37 Depth 4
                                        ;     Child Loop BB2_49 Depth 2
                                        ;       Child Loop BB2_50 Depth 3
                                        ;         Child Loop BB2_51 Depth 4
                                        ;           Child Loop BB2_52 Depth 5
                                        ;       Child Loop BB2_60 Depth 3
                                        ;         Child Loop BB2_61 Depth 4
	ds_load_b32 v1, v2 offset:4100
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v1, v3
	v_readfirstlane_b32 s2, v1
	s_cbranch_vccnz .LBB2_44
; %bb.24:                               ; %.lr.ph198
                                        ;   in Loop: Header=BB2_23 Depth=1
	s_ashr_i32 s6, s1, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_gt_i32 s6, 0x3ff
	s_cselect_b32 s7, -1, 0
	s_cmp_gt_i32 s1, 0
	s_cselect_b32 s8, -1, 0
.LBB2_25:                               ;   Parent Loop BB2_23 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_26 Depth 3
                                        ;         Child Loop BB2_27 Depth 4
                                        ;           Child Loop BB2_28 Depth 5
                                        ;       Child Loop BB2_36 Depth 3
                                        ;         Child Loop BB2_37 Depth 4
	s_add_i32 s9, s2, s1
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_mov_b32 s10, s6
	s_cbranch_vccnz .LBB2_35
.LBB2_26:                               ; %.preheader165
                                        ;   Parent Loop BB2_23 Depth=1
                                        ;     Parent Loop BB2_25 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB2_27 Depth 4
                                        ;           Child Loop BB2_28 Depth 5
	v_add_nc_u32_e32 v3, s10, v5
	s_mov_b32 s11, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v3, v0, s0
.LBB2_27:                               ; %.preheader163
                                        ;   Parent Loop BB2_23 Depth=1
                                        ;     Parent Loop BB2_25 Depth=2
                                        ;       Parent Loop BB2_26 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB2_28 Depth 5
	s_add_i32 s12, s11, s10
.LBB2_28:                               ; %.lr.ph187
                                        ;   Parent Loop BB2_23 Depth=1
                                        ;     Parent Loop BB2_25 Depth=2
                                        ;       Parent Loop BB2_26 Depth=3
                                        ;         Parent Loop BB2_27 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s11, v4
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_mov_b32_e32 v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s13, s0
	s_cbranch_execz .LBB2_32
; %bb.29:                               ;   in Loop: Header=BB2_28 Depth=5
	ds_load_b32 v1, v9
	ds_load_b32 v7, v6
	s_mov_b32 s14, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 v1, v7
	s_cbranch_execz .LBB2_31
; %bb.30:                               ;   in Loop: Header=BB2_28 Depth=5
	ds_store_b32 v6, v1
	ds_store_b32 v9, v7
.LBB2_31:                               ; %Flow262
                                        ;   in Loop: Header=BB2_28 Depth=5
	s_or_b32 exec_lo, exec_lo, s14
	v_mov_b32_e32 v1, v0
.LBB2_32:                               ;   in Loop: Header=BB2_28 Depth=5
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v10, v9
	v_add_nc_u32_e32 v1, s11, v1
	s_addk_i32 s11, 0x200
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_ge_i32 s11, s12
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[7:8], v10, off
	s_cbranch_scc0 .LBB2_28
; %bb.33:                               ; %._crit_edge188
                                        ;   in Loop: Header=BB2_27 Depth=4
	s_add_i32 s11, s12, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s11, s9
	s_cbranch_scc0 .LBB2_27
; %bb.34:                               ; %._crit_edge190
                                        ;   in Loop: Header=BB2_26 Depth=3
	s_lshr_b32 s11, s10, 1
	s_cmpk_lt_u32 s10, 0x800
	s_mov_b32 s10, s11
	s_cbranch_scc0 .LBB2_26
.LBB2_35:                               ; %.preheader167
                                        ;   in Loop: Header=BB2_25 Depth=2
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB2_43
.LBB2_36:                               ; %.lr.ph194
                                        ;   Parent Loop BB2_23 Depth=1
                                        ;     Parent Loop BB2_25 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB2_37 Depth 4
	v_add_nc_u32_e32 v1, s2, v0
	s_movk_i32 s10, 0x200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v1, v[3:4], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v1
.LBB2_37:                               ;   Parent Loop BB2_23 Depth=1
                                        ;     Parent Loop BB2_25 Depth=2
                                        ;       Parent Loop BB2_36 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_lshl_b32 s11, s10, 1
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_add_i32 s11, s11, -1
	s_barrier
	v_and_b32_e32 v1, s11, v0
	s_mov_b32 s11, exec_lo
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s10, v1
	s_cbranch_execz .LBB2_41
; %bb.38:                               ;   in Loop: Header=BB2_37 Depth=4
	v_add_nc_u32_e32 v1, s10, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 0x400, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_41
; %bb.39:                               ;   in Loop: Header=BB2_37 Depth=4
	v_lshl_add_u32 v1, s10, 2, v9
	ds_load_b32 v7, v9
	ds_load_b32 v8, v1
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v7, v8
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_41
; %bb.40:                               ;   in Loop: Header=BB2_37 Depth=4
	ds_store_b32 v1, v7
	ds_store_b32 v9, v8
.LBB2_41:                               ;   in Loop: Header=BB2_37 Depth=4
	s_or_b32 exec_lo, exec_lo, s11
	s_lshr_b32 s11, s10, 1
	s_cmp_lt_u32 s10, 2
	s_mov_b32 s10, s11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_37
; %bb.42:                               ;   in Loop: Header=BB2_36 Depth=3
	ds_load_b32 v1, v9
	s_addk_i32 s2, 0x400
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s2, s9
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v1, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_36
.LBB2_43:                               ; %._crit_edge195
                                        ;   in Loop: Header=BB2_25 Depth=2
	ds_load_b32 v1, v2 offset:4096
	s_add_i32 s2, s9, s1
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s2, v1
	s_cbranch_vccz .LBB2_25
.LBB2_44:                               ; %._crit_edge199
                                        ;   in Loop: Header=BB2_23 Depth=1
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_b64 v[3:4], v2 offset:4096
	s_waitcnt lgkmcnt(0)
	v_readfirstlane_b32 s2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s1
	v_cmp_lt_i32_e32 vcc_lo, s2, v3
	s_cbranch_vccnz .LBB2_46
; %bb.45:                               ; %._crit_edge199.._crit_edge213_crit_edge
                                        ;   in Loop: Header=BB2_23 Depth=1
	s_lshl_b32 s6, s1, 1
	s_mov_b32 s7, 0
	s_branch .LBB2_47
.LBB2_46:                               ;   in Loop: Header=BB2_23 Depth=1
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $sgpr6
.LBB2_47:                               ; %Flow256
                                        ;   in Loop: Header=BB2_23 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB2_68
; %bb.48:                               ; %.lr.ph212
                                        ;   in Loop: Header=BB2_23 Depth=1
	s_ashr_i32 s7, s1, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_gt_i32 s7, 0x3ff
	s_cselect_b32 s8, -1, 0
	s_lshl_b32 s6, s1, 1
	s_cmp_gt_i32 s1, 0
	s_cselect_b32 s9, -1, 0
.LBB2_49:                               ;   Parent Loop BB2_23 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_50 Depth 3
                                        ;         Child Loop BB2_51 Depth 4
                                        ;           Child Loop BB2_52 Depth 5
                                        ;       Child Loop BB2_60 Depth 3
                                        ;         Child Loop BB2_61 Depth 4
	s_add_i32 s10, s2, s1
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_mov_b32 s11, s7
	s_cbranch_vccnz .LBB2_59
.LBB2_50:                               ; %.preheader164
                                        ;   Parent Loop BB2_23 Depth=1
                                        ;     Parent Loop BB2_49 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB2_51 Depth 4
                                        ;           Child Loop BB2_52 Depth 5
	v_add_nc_u32_e32 v3, s11, v5
	s_mov_b32 s12, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v3, v0, s0
.LBB2_51:                               ; %.preheader
                                        ;   Parent Loop BB2_23 Depth=1
                                        ;     Parent Loop BB2_49 Depth=2
                                        ;       Parent Loop BB2_50 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB2_52 Depth 5
	s_add_i32 s13, s12, s11
.LBB2_52:                               ; %.lr.ph201
                                        ;   Parent Loop BB2_23 Depth=1
                                        ;     Parent Loop BB2_49 Depth=2
                                        ;       Parent Loop BB2_50 Depth=3
                                        ;         Parent Loop BB2_51 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s12, v4
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_mov_b32_e32 v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB2_56
; %bb.53:                               ;   in Loop: Header=BB2_52 Depth=5
	ds_load_b32 v1, v9
	ds_load_b32 v7, v6
	s_mov_b32 s15, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_i32_e64 v1, v7
	s_cbranch_execz .LBB2_55
; %bb.54:                               ;   in Loop: Header=BB2_52 Depth=5
	ds_store_b32 v6, v1
	ds_store_b32 v9, v7
.LBB2_55:                               ; %Flow252
                                        ;   in Loop: Header=BB2_52 Depth=5
	s_or_b32 exec_lo, exec_lo, s15
	v_mov_b32_e32 v1, v0
.LBB2_56:                               ;   in Loop: Header=BB2_52 Depth=5
	s_or_b32 exec_lo, exec_lo, s14
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v10, v9
	v_add_nc_u32_e32 v1, s12, v1
	s_addk_i32 s12, 0x200
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_ge_i32 s12, s13
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[7:8], v10, off
	s_cbranch_scc0 .LBB2_52
; %bb.57:                               ; %._crit_edge202
                                        ;   in Loop: Header=BB2_51 Depth=4
	s_add_i32 s12, s13, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s12, s10
	s_cbranch_scc0 .LBB2_51
; %bb.58:                               ; %._crit_edge204
                                        ;   in Loop: Header=BB2_50 Depth=3
	s_lshr_b32 s12, s11, 1
	s_cmpk_lt_u32 s11, 0x800
	s_mov_b32 s11, s12
	s_cbranch_scc0 .LBB2_50
.LBB2_59:                               ; %.preheader166
                                        ;   in Loop: Header=BB2_49 Depth=2
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_cbranch_vccnz .LBB2_67
.LBB2_60:                               ; %.lr.ph208
                                        ;   Parent Loop BB2_23 Depth=1
                                        ;     Parent Loop BB2_49 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB2_61 Depth 4
	v_add_nc_u32_e32 v1, s2, v0
	s_movk_i32 s11, 0x200
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v1, v[3:4], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v1
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB2_61:                               ;   Parent Loop BB2_23 Depth=1
                                        ;     Parent Loop BB2_49 Depth=2
                                        ;       Parent Loop BB2_60 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_lshl_b32 s12, s11, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s12, s12, -1
	s_barrier
	v_and_b32_e32 v1, s12, v0
	s_mov_b32 s12, exec_lo
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s11, v1
	s_cbranch_execz .LBB2_65
; %bb.62:                               ;   in Loop: Header=BB2_61 Depth=4
	v_add_nc_u32_e32 v1, s11, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 0x400, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_65
; %bb.63:                               ;   in Loop: Header=BB2_61 Depth=4
	v_lshl_add_u32 v1, s11, 2, v9
	ds_load_b32 v7, v9
	ds_load_b32 v8, v1
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v7, v8
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_65
; %bb.64:                               ;   in Loop: Header=BB2_61 Depth=4
	ds_store_b32 v1, v7
	ds_store_b32 v9, v8
.LBB2_65:                               ;   in Loop: Header=BB2_61 Depth=4
	s_or_b32 exec_lo, exec_lo, s12
	s_lshr_b32 s12, s11, 1
	s_cmp_lt_u32 s11, 2
	s_mov_b32 s11, s12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_61
; %bb.66:                               ;   in Loop: Header=BB2_60 Depth=3
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v1, v9
	s_addk_i32 s2, 0x400
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s2, s10
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v1, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_60
.LBB2_67:                               ; %._crit_edge209
                                        ;   in Loop: Header=BB2_49 Depth=2
	ds_load_b32 v3, v2 offset:4096
	s_add_i32 s2, s10, s1
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, s2, v3
	s_cbranch_vccz .LBB2_49
.LBB2_68:                               ; %._crit_edge213
                                        ;   in Loop: Header=BB2_23 Depth=1
	s_mov_b32 s1, s6
	s_cmp_ge_i32 s6, s3
	s_cbranch_scc0 .LBB2_23
.LBB2_69:                               ; %._crit_edge216
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel oneBlock
		.amdhsa_group_segment_fixed_size 4104
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 12
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	oneBlock, .Lfunc_end2-oneBlock
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2380
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4104 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	oneMove                 ; -- Begin function oneMove
	.globl	oneMove
	.p2align	8
	.type	oneMove,@function
oneMove:                                ; @oneMove
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x8
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_u32_e32 v1, s6
	s_sub_i32 s8, 0, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s3, v1
	v_mov_b32_e32 v1, 0
	s_mul_i32 s8, s8, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s8, s3, s8
	s_add_i32 s3, s3, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s3, s15, s3
	s_mul_i32 s8, s3, s6
	s_add_i32 s9, s3, 1
	s_sub_i32 s8, s15, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s10, s8, s6
	s_cmp_ge_u32 s8, s6
	s_cselect_b32 s3, s9, s3
	s_cselect_b32 s8, s10, s8
	s_add_i32 s9, s3, 1
	s_cmp_ge_u32 s8, s6
	s_cselect_b32 s3, s9, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_mul_i32 s6, s3, s6
	s_mul_i32 s3, s4, s3
	s_sub_i32 s6, s15, s6
	s_lshl_b32 s3, s3, 1
	s_mul_i32 s6, s5, s6
	s_lshl_b32 s6, s6, 9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s6, s3
	v_mov_b32_e32 v2, s3
	ds_store_b32 v1, v2 offset:4096
.LBB3_2:                                ; %._crit_edge
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_u32_e32 v1, s7
	s_sub_i32 s3, 0, s7
	s_barrier
	buffer_gl0_inv
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s3, s3, s2
	s_mul_hi_u32 s3, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s3
	s_mul_hi_u32 s2, s15, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_mul_i32 s3, s2, s7
	s_add_i32 s6, s2, 1
	s_sub_i32 s3, s15, s3
	s_sub_i32 s8, s3, s7
	s_cmp_ge_u32 s3, s7
	s_cselect_b32 s6, s6, s2
	s_cselect_b32 s2, s8, s3
	s_add_i32 s8, s6, 1
	s_cmp_ge_u32 s2, s7
	s_load_b64 s[2:3], s[0:1], 0x0
	s_cselect_b32 s0, s8, s6
	s_mov_b32 s6, -1
	s_bitcmp1_b32 s0, 0
	s_cselect_b32 s0, -1, 0
	s_lshl_b32 s1, s5, 9
	s_cmp_gt_i32 s5, 0
	s_cselect_b32 s5, -1, 0
	s_and_b32 vcc_lo, exec_lo, s0
	v_cndmask_b32_e64 v1, 0, 1, s5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 1, v1
	s_cbranch_vccz .LBB3_11
; %bb.3:
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_10
; %bb.4:                                ; %.lr.ph
	v_mov_b32_e32 v2, 0
	v_lshlrev_b32_e32 v4, 2, v0
	v_add3_u32 v5, v0, s4, 0xfffffe00
	v_cmp_gt_u32_e64 s0, 0x200, v0
	ds_load_b32 v3, v2 offset:4096
	v_add_nc_u32_e32 v6, 0x800, v4
	v_cndmask_b32_e64 v7, v5, v0, s0
.LBB3_5:                                ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v7, v3
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	v_mov_b32_e32 v1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_9
; %bb.6:                                ;   in Loop: Header=BB3_5 Depth=1
	ds_load_b32 v1, v4
	ds_load_b32 v8, v6
	s_mov_b32 s7, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_i32_e64 v1, v8
	s_cbranch_execz .LBB3_8
; %bb.7:                                ;   in Loop: Header=BB3_5 Depth=1
	ds_store_b32 v6, v1
	ds_store_b32 v4, v8
.LBB3_8:                                ; %Flow
                                        ;   in Loop: Header=BB3_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v1, v0
.LBB3_9:                                ;   in Loop: Header=BB3_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v10, v4
	v_add_nc_u32_e32 v1, v1, v3
	v_add_nc_u32_e32 v3, 0x200, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	v_add_co_u32 v8, vcc_lo, s2, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[8:9], v10, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v1, v2 offset:4096
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, s1, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, v3, v1
	s_cbranch_vccnz .LBB3_5
.LBB3_10:                               ; %Flow60
	s_mov_b32 s6, 0
.LBB3_11:                               ; %Flow64
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB3_19
; %bb.12:
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB3_19
; %bb.13:                               ; %.lr.ph35
	v_mov_b32_e32 v2, 0
	v_lshlrev_b32_e32 v4, 2, v0
	v_add3_u32 v5, v0, s4, 0xfffffe00
	v_cmp_gt_u32_e64 s0, 0x200, v0
	ds_load_b32 v3, v2 offset:4096
	v_add_nc_u32_e32 v6, 0x800, v4
	v_cndmask_b32_e64 v7, v5, v0, s0
.LBB3_14:                               ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v7, v3
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	v_mov_b32_e32 v1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_18
; %bb.15:                               ;   in Loop: Header=BB3_14 Depth=1
	ds_load_b32 v1, v4
	ds_load_b32 v8, v6
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 v1, v8
	s_cbranch_execz .LBB3_17
; %bb.16:                               ;   in Loop: Header=BB3_14 Depth=1
	ds_store_b32 v6, v1
	ds_store_b32 v4, v8
.LBB3_17:                               ; %Flow61
                                        ;   in Loop: Header=BB3_14 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v1, v0
.LBB3_18:                               ;   in Loop: Header=BB3_14 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v10, v4
	v_add_nc_u32_e32 v1, v1, v3
	v_add_nc_u32_e32 v3, 0x200, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	v_add_co_u32 v8, vcc_lo, s2, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[8:9], v10, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v1, v2 offset:4096
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, s1, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, v3, v1
	s_cbranch_vccz .LBB3_14
.LBB3_19:                               ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel oneMove
		.amdhsa_group_segment_fixed_size 4100
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	oneMove, .Lfunc_end3-oneMove
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1056
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4100 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 12
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           init
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         init.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 4104
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           oneReduction
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         oneReduction.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 4104
    .kernarg_segment_align: 8
    .kernarg_segment_size: 12
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           oneBlock
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         oneBlock.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 4100
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           oneMove
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         oneMove.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
