#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <cuda.h>
#define NSTEPS 500
#define TX 16
#define TY 32
#define NPTSX 200
#define NPTSY 200

__global__ 
void performUpdatesKernel(float *d_phi, float *d_oldphi, int *d_mask, int nptsx, int nptsy)
{
    int Row = blockIdx.y*blockDim.y+threadIdx.y;
    int Col = blockIdx.x*blockDim.x+threadIdx.x;
    int x = Row*nptsx+Col;
    int xm = x-nptsx;
    int xp = x+nptsx;

    if(Col<nptsx && Row<nptsy)
        if (d_mask[x]) d_phi[x] = 0.25f*(d_oldphi[x+1]+d_oldphi[x-1]+d_oldphi[xp]+d_oldphi[xm]);
}
__global__
void doCopyKernel(float *d_phi, float *d_oldphi, int *d_mask, int nptsx, int nptsy)
{
    int Row = blockIdx.y*blockDim.y+threadIdx.y;
    int Col = blockIdx.x*blockDim.x+threadIdx.x;
    int x = Row*nptsx+Col;

    if(Col<nptsx && Row<nptsy)
        if (d_mask[x]) d_oldphi[x] = d_phi[x];
}

void performUpdates(float *h_phi, float * h_oldphi, int *h_mask, int nptsx, int nptsy, int nsteps)
{
    float *d_phi, *d_oldphi;
    int *d_mask;
    int k;
    int sizef = sizeof(float)*nptsx*nptsy;
    int sizei = sizeof(int)*nptsx*nptsy;
    cudaMalloc((void **)&d_phi,sizef);
    cudaMalloc((void **)&d_oldphi,sizef);
    cudaMalloc((void **)&d_mask,sizei);
    cudaMemcpy(d_oldphi,h_oldphi,sizef,cudaMemcpyHostToDevice);
    cudaMemcpy(d_mask,h_mask,sizei,cudaMemcpyHostToDevice);
    dim3 dimGrid(ceil(nptsx/(float)TX),ceil(nptsy/(float)TY),1);
    dim3 dimBlock(TX,TY,1);
    for(k=0;k<nsteps;++k){
        performUpdatesKernel<<<dimGrid,dimBlock>>>(d_phi,d_oldphi,d_mask,nptsx,nptsy);
        doCopyKernel<<<dimGrid,dimBlock>>>(d_phi,d_oldphi,d_mask,nptsx,nptsy);
    } 
    cudaMemcpy(h_phi,d_oldphi,sizef,cudaMemcpyDeviceToHost);
    cudaFree(d_phi); cudaFree(d_oldphi); cudaFree(d_mask);
}
   
int RGBval(float x){
    int R, B, G, pow8 = 256;
    if(x<=0.5){
        B = (int)((1.0-2.0*x)*255.0);
        G = (int)(2.0*x*255.0);
	R = 0; 
    }
    else{
        B = 0;
        G = (int)((2.0-2.0*x)*255.0);
        R = (int)((2.0*x-1.0)*255.0);
    }
    return (B+(G+R*pow8)*pow8);
}

int setup_grid (float  *h_phi, int nptsx, int nptsy, int  *h_mask)
{
    int i, j, nx2, ny2;

    for(j=0;j<nptsy;j++)
       for(i=0;i<nptsx;i++){
          h_phi[j*nptsx+i]  = 0.0;
          h_mask[j*nptsx+i] = 1;
       }

    for(i=0;i<nptsx;i++) h_mask[i] = 0;

    for(i=0;i<nptsx;i++) h_mask[(nptsy-1)*nptsx+i] = 0;

    for(j=0;j<nptsy;j++) h_mask[j*nptsx] = 0;

    for(j=0;j<nptsy;j++) h_mask[j*nptsx+nptsx-1] = 0;

    nx2 = nptsx/2;
    ny2 = nptsy/2;
    h_mask[ny2*nptsx+nx2] = 0;
    h_mask[ny2*nptsx+nx2-1] = 0;
    h_mask[(ny2-1)*nptsx+nx2] = 0;
    h_mask[(ny2-1)*nptsx+nx2-1] = 0;
    h_phi[ny2*nptsx+nx2]  = 1.0;
    h_phi[ny2*nptsx+nx2-1]  = 1.0;
    h_phi[(ny2-1)*nptsx+nx2]  = 1.0;
    h_phi[(ny2-1)*nptsx+nx2-1]  = 1.0;
    return 0;
}

int output_array (float *h_phi, int nptsx, int nptsy)
{
   int i, j, k=0;
   FILE *fp;

   
   fp = fopen("outCUDA.ps","w");
   fprintf(fp,"/picstr %d string def\n",nptsx);
   fprintf(fp,"50 50 translate\n");
   fprintf(fp,"%d %d scale\n",nptsx, nptsy);
   fprintf(fp,"%d %d 8 [%d 0 0 %d 0 %d] \n",nptsx, nptsy, nptsx, nptsy, -nptsx);
   fprintf(fp,"{currentfile 3 200 mul string readhexstring pop} bind false 3 colorimage\n");

   for(j=0;j<nptsy;j++){
        for(i=0;i<nptsx;i++,k++){
             fprintf(fp,"%06x",RGBval(h_phi[j*nptsx+i]));
             if((k+1)%10==0) fprintf(fp,"\n");
        }
   }
   fclose(fp);
   return 0;
}

int main (int argc, char *argv[])
{
   float *h_phi;
   float *h_oldphi;
   int *h_mask;
   int nsize1=sizeof(float)*NPTSX*NPTSY;
   int nsize2=sizeof(int)*NPTSX*NPTSY;

   h_phi = (float *)malloc(nsize1);
   h_oldphi = (float *)malloc(nsize1);
   h_mask = (int *)malloc(nsize2);
   setup_grid (h_oldphi, NPTSX, NPTSY, h_mask);
   performUpdates(h_phi,h_oldphi,h_mask,NPTSX,NPTSY,NSTEPS);
 
   output_array (h_phi, NPTSX, NPTSY);
 
   return 0;
}

	.file	"tmpxft_0020ed5f_00000000-6_laplaceCUDA.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z6RGBvalf
	.type	_Z6RGBvalf, @function
_Z6RGBvalf:
.LFB2028:
	.cfi_startproc
	endbr64
	movss	.LC0(%rip), %xmm2
	cvtss2sd	%xmm0, %xmm1
	movsd	.LC2(%rip), %xmm3
	addsd	%xmm1, %xmm1
	comiss	%xmm0, %xmm2
	movsd	.LC1(%rip), %xmm0
	jb	.L7
	subsd	%xmm1, %xmm0
	mulsd	%xmm3, %xmm1
	xorl	%eax, %eax
	mulsd	%xmm3, %xmm0
	cvttsd2sil	%xmm1, %ecx
	cvttsd2sil	%xmm0, %edx
	jmp	.L5
.L7:
	movsd	.LC3(%rip), %xmm2
	xorl	%edx, %edx
	subsd	%xmm1, %xmm2
	subsd	%xmm0, %xmm1
	mulsd	%xmm3, %xmm2
	mulsd	%xmm3, %xmm1
	cvttsd2sil	%xmm2, %ecx
	cvttsd2sil	%xmm1, %eax
.L5:
	sall	$8, %eax
	addl	%ecx, %eax
	sall	$8, %eax
	addl	%edx, %eax
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z6RGBvalf, .-_Z6RGBvalf
	.globl	_Z10setup_gridPfiiPi
	.type	_Z10setup_gridPfiiPi, @function
_Z10setup_gridPfiiPi:
.LFB2029:
	.cfi_startproc
	endbr64
	movq	%rdi, %r8
	xorl	%r9d, %r9d
	movl	%esi, %edi
	xorl	%r10d, %r10d
	movl	%edx, %esi
.L10:
	cmpl	%esi, %r10d
	jge	.L21
	movslq	%r9d, %rax
	xorl	%edx, %edx
	salq	$2, %rax
.L13:
	cmpl	%edi, %edx
	jge	.L22
	movl	$0x00000000, (%r8,%rax)
	incl	%edx
	movl	$1, (%rcx,%rax)
	addq	$4, %rax
	jmp	.L13
.L22:
	incl	%r10d
	addl	%edi, %r9d
	jmp	.L10
.L21:
	xorl	%eax, %eax
.L12:
	cmpl	%eax, %edi
	jle	.L23
	xorl	%r10d, %r10d
	movl	%r10d, (%rcx,%rax,4)
	incq	%rax
	jmp	.L12
.L23:
	leal	-1(%rsi), %eax
	imull	%edi, %eax
	cltq
	leaq	(%rcx,%rax,4), %rdx
	xorl	%eax, %eax
.L15:
	cmpl	%eax, %edi
	jle	.L24
	xorl	%r9d, %r9d
	movl	%r9d, (%rdx,%rax,4)
	incq	%rax
	jmp	.L15
.L24:
	movslq	%edi, %rax
	movq	%rcx, %r9
	xorl	%edx, %edx
	salq	$2, %rax
.L17:
	cmpl	%esi, %edx
	jge	.L25
	xorl	%r11d, %r11d
	incl	%edx
	movl	%r11d, (%r9)
	addq	%rax, %r9
	jmp	.L17
.L25:
	leaq	(%rcx,%rax), %r9
	xorl	%edx, %edx
.L19:
	cmpl	%esi, %edx
	jge	.L26
	xorl	%r10d, %r10d
	incl	%edx
	movl	%r10d, -4(%r9)
	addq	%rax, %r9
	jmp	.L19
.L26:
	movl	%edi, %eax
	movl	$2, %r9d
	movss	.LC5(%rip), %xmm0
	cltd
	idivl	%r9d
	movl	%eax, %r10d
	movl	%esi, %eax
	xorl	%esi, %esi
	cltd
	idivl	%r9d
	imull	%edi, %eax
	leal	(%rax,%r10), %edx
	subl	%edi, %eax
	xorl	%edi, %edi
	movslq	%edx, %rdx
	addl	%r10d, %eax
	cltq
	leaq	0(,%rdx,4), %r9
	movl	%esi, (%rcx,%rdx,4)
	movl	%esi, -4(%rcx,%r9)
	leaq	0(,%rax,4), %rsi
	movl	%edi, (%rcx,%rax,4)
	movl	%edi, -4(%rcx,%rsi)
	movss	%xmm0, (%r8,%rdx,4)
	movss	%xmm0, -4(%r8,%r9)
	movss	%xmm0, (%r8,%rax,4)
	xorl	%eax, %eax
	movss	%xmm0, -4(%r8,%rsi)
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10setup_gridPfiiPi, .-_Z10setup_gridPfiiPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC6:
	.string	"w"
.LC7:
	.string	"outCUDA.ps"
.LC8:
	.string	"/picstr %d string def\n"
.LC9:
	.string	"50 50 translate\n"
.LC10:
	.string	"%d %d scale\n"
.LC11:
	.string	"%d %d 8 [%d 0 0 %d 0 %d] \n"
.LC12:
	.string	"{currentfile 3 200 mul string readhexstring pop} bind false 3 colorimage\n"
.LC13:
	.string	"%06x"
.LC14:
	.string	"\n"
	.text
	.globl	_Z12output_arrayPfii
	.type	_Z12output_arrayPfii, @function
_Z12output_arrayPfii:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	leaq	.LC6(%rip), %rsi
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 24(%rsp)
	leaq	.LC7(%rip), %rdi
	call	fopen@PLT
	movl	%ebx, %ecx
	movl	$2, %esi
	leaq	.LC8(%rip), %rdx
	movq	%rax, 8(%rsp)
	movq	%rax, %rdi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movq	8(%rsp), %rdi
	leaq	.LC9(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movq	8(%rsp), %rdi
	movl	%ebp, %r8d
	movl	%ebx, %ecx
	leaq	.LC10(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	%ebx, %eax
	movl	%ebx, %ecx
	movl	%ebx, %r9d
	negl	%eax
	movl	%ebp, %r8d
	movl	$2, %esi
	pushq	%rax
	.cfi_def_cfa_offset 104
	leaq	.LC11(%rip), %rdx
	xorl	%eax, %eax
	pushq	%rbp
	.cfi_def_cfa_offset 112
	movq	24(%rsp), %rdi
	call	__fprintf_chk@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
	movl	$2, %esi
	movq	8(%rsp), %rdi
	leaq	.LC12(%rip), %rdx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	xorl	%ecx, %ecx
	movl	%ecx, 20(%rsp)
.L28:
	cmpl	%ebp, %r13d
	jge	.L31
	movslq	20(%rsp), %rax
	movq	24(%rsp), %rcx
	xorl	%r12d, %r12d
	leaq	(%rcx,%rax,4), %r15
.L32:
	cmpl	%r12d, %ebx
	jle	.L34
	movss	(%r15,%r12,4), %xmm0
	movl	$2, %esi
	call	_Z6RGBvalf
	movq	8(%rsp), %rdi
	leaq	.LC13(%rip), %rdx
	movl	%eax, %ecx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	leal	1(%r14,%r12), %eax
	movl	$10, %ecx
	cltd
	idivl	%ecx
	testl	%edx, %edx
	jne	.L29
	movq	8(%rsp), %rdi
	leaq	.LC14(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L29:
	incq	%r12
	jmp	.L32
.L34:
	xorl	%eax, %eax
	testl	%ebx, %ebx
	cmovns	%ebx, %eax
	addl	%ebx, 20(%rsp)
	incl	%r13d
	addl	%eax, %r14d
	jmp	.L28
.L31:
	movq	8(%rsp), %rdi
	call	fclose@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z12output_arrayPfii, .-_Z12output_arrayPfii
	.globl	_Z46__device_stub__Z20performUpdatesKernelPfS_PiiiPfS_Piii
	.type	_Z46__device_stub__Z20performUpdatesKernelPfS_PiiiPfS_Piii, @function
_Z46__device_stub__Z20performUpdatesKernelPfS_PiiiPfS_Piii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z20performUpdatesKernelPfS_Piii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L35:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z46__device_stub__Z20performUpdatesKernelPfS_PiiiPfS_Piii, .-_Z46__device_stub__Z20performUpdatesKernelPfS_PiiiPfS_Piii
	.globl	_Z20performUpdatesKernelPfS_Piii
	.type	_Z20performUpdatesKernelPfS_Piii, @function
_Z20performUpdatesKernelPfS_Piii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z20performUpdatesKernelPfS_PiiiPfS_Piii
	.cfi_endproc
.LFE2057:
	.size	_Z20performUpdatesKernelPfS_Piii, .-_Z20performUpdatesKernelPfS_Piii
	.globl	_Z38__device_stub__Z12doCopyKernelPfS_PiiiPfS_Piii
	.type	_Z38__device_stub__Z12doCopyKernelPfS_PiiiPfS_Piii, @function
_Z38__device_stub__Z12doCopyKernelPfS_PiiiPfS_Piii:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12doCopyKernelPfS_Piii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L40:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z38__device_stub__Z12doCopyKernelPfS_PiiiPfS_Piii, .-_Z38__device_stub__Z12doCopyKernelPfS_PiiiPfS_Piii
	.globl	_Z12doCopyKernelPfS_Piii
	.type	_Z12doCopyKernelPfS_Piii, @function
_Z12doCopyKernelPfS_Piii:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z12doCopyKernelPfS_PiiiPfS_Piii
	.cfi_endproc
.LFE2059:
	.size	_Z12doCopyKernelPfS_Piii, .-_Z12doCopyKernelPfS_Piii
	.globl	_Z14performUpdatesPfS_Piiii
	.type	_Z14performUpdatesPfS_Piiii, @function
_Z14performUpdatesPfS_Piiii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	imull	%r8d, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 8(%rsp)
	sall	$2, %ebx
	leaq	24(%rsp), %rdi
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	cvtsi2ssl	%r12d, %xmm0
	mulss	.LC15(%rip), %xmm0
	call	ceilf@PLT
	movd	%xmm0, %r14d
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC16(%rip), %xmm0
	call	ceilf@PLT
	movd	%r14d, %xmm1
	xorl	%r14d, %r14d
	movl	$1, 56(%rsp)
	cvttss2siq	%xmm0, %rax
	movl	$1, 68(%rsp)
	movl	%eax, 48(%rsp)
	cvttss2siq	%xmm1, %rax
	movl	%eax, 52(%rsp)
	movabsq	$137438953488, %rax
	movq	%rax, 60(%rsp)
.L46:
	cmpl	%r13d, %r14d
	jge	.L52
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%r12d, %r8d
	movl	%ebp, %ecx
	movq	24(%rsp), %rdi
	call	_Z46__device_stub__Z20performUpdatesKernelPfS_PiiiPfS_Piii
.L47:
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%r12d, %r8d
	movl	%ebp, %ecx
	movq	24(%rsp), %rdi
	call	_Z38__device_stub__Z12doCopyKernelPfS_PiiiPfS_Piii
.L48:
	incl	%r14d
	jmp	.L46
.L52:
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z14performUpdatesPfS_Piiii, .-_Z14performUpdatesPfS_Piiii
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$160000, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	call	malloc@PLT
	movl	$160000, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$160000, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rbp, %rdi
	movl	$200, %edx
	movl	$200, %esi
	movq	%rax, %r12
	movq	%rax, %rcx
	call	_Z10setup_gridPfiiPi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$500, %r9d
	movl	$200, %r8d
	movl	$200, %ecx
	call	_Z14performUpdatesPfS_Piiii
	movq	%rbx, %rdi
	movl	$200, %edx
	movl	$200, %esi
	call	_Z12output_arrayPfii
	popq	%rbx
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC17:
	.string	"_Z12doCopyKernelPfS_Piii"
.LC18:
	.string	"_Z20performUpdatesKernelPfS_Piii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12doCopyKernelPfS_Piii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z20performUpdatesKernelPfS_Piii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1056964608
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	0
	.long	1072693248
	.align 8
.LC2:
	.long	0
	.long	1081073664
	.align 8
.LC3:
	.long	0
	.long	1073741824
	.section	.rodata.cst4
	.align 4
.LC5:
	.long	1065353216
	.align 4
.LC15:
	.long	1023410176
	.align 4
.LC16:
	.long	1031798784
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <hip/hip_runtime.h>
#define NSTEPS 500
#define TX 16
#define TY 32
#define NPTSX 200
#define NPTSY 200

__global__ 
void performUpdatesKernel(float *d_phi, float *d_oldphi, int *d_mask, int nptsx, int nptsy)
{
    int Row = blockIdx.y*blockDim.y+threadIdx.y;
    int Col = blockIdx.x*blockDim.x+threadIdx.x;
    int x = Row*nptsx+Col;
    int xm = x-nptsx;
    int xp = x+nptsx;

    if(Col<nptsx && Row<nptsy)
        if (d_mask[x]) d_phi[x] = 0.25f*(d_oldphi[x+1]+d_oldphi[x-1]+d_oldphi[xp]+d_oldphi[xm]);
}
__global__
void doCopyKernel(float *d_phi, float *d_oldphi, int *d_mask, int nptsx, int nptsy)
{
    int Row = blockIdx.y*blockDim.y+threadIdx.y;
    int Col = blockIdx.x*blockDim.x+threadIdx.x;
    int x = Row*nptsx+Col;

    if(Col<nptsx && Row<nptsy)
        if (d_mask[x]) d_oldphi[x] = d_phi[x];
}

void performUpdates(float *h_phi, float * h_oldphi, int *h_mask, int nptsx, int nptsy, int nsteps)
{
    float *d_phi, *d_oldphi;
    int *d_mask;
    int k;
    int sizef = sizeof(float)*nptsx*nptsy;
    int sizei = sizeof(int)*nptsx*nptsy;
    hipMalloc((void **)&d_phi,sizef);
    hipMalloc((void **)&d_oldphi,sizef);
    hipMalloc((void **)&d_mask,sizei);
    hipMemcpy(d_oldphi,h_oldphi,sizef,hipMemcpyHostToDevice);
    hipMemcpy(d_mask,h_mask,sizei,hipMemcpyHostToDevice);
    dim3 dimGrid(ceil(nptsx/(float)TX),ceil(nptsy/(float)TY),1);
    dim3 dimBlock(TX,TY,1);
    for(k=0;k<nsteps;++k){
        performUpdatesKernel<<<dimGrid,dimBlock>>>(d_phi,d_oldphi,d_mask,nptsx,nptsy);
        doCopyKernel<<<dimGrid,dimBlock>>>(d_phi,d_oldphi,d_mask,nptsx,nptsy);
    } 
    hipMemcpy(h_phi,d_oldphi,sizef,hipMemcpyDeviceToHost);
    hipFree(d_phi); hipFree(d_oldphi); hipFree(d_mask);
}
   
int RGBval(float x){
    int R, B, G, pow8 = 256;
    if(x<=0.5){
        B = (int)((1.0-2.0*x)*255.0);
        G = (int)(2.0*x*255.0);
	R = 0; 
    }
    else{
        B = 0;
        G = (int)((2.0-2.0*x)*255.0);
        R = (int)((2.0*x-1.0)*255.0);
    }
    return (B+(G+R*pow8)*pow8);
}

int setup_grid (float  *h_phi, int nptsx, int nptsy, int  *h_mask)
{
    int i, j, nx2, ny2;

    for(j=0;j<nptsy;j++)
       for(i=0;i<nptsx;i++){
          h_phi[j*nptsx+i]  = 0.0;
          h_mask[j*nptsx+i] = 1;
       }

    for(i=0;i<nptsx;i++) h_mask[i] = 0;

    for(i=0;i<nptsx;i++) h_mask[(nptsy-1)*nptsx+i] = 0;

    for(j=0;j<nptsy;j++) h_mask[j*nptsx] = 0;

    for(j=0;j<nptsy;j++) h_mask[j*nptsx+nptsx-1] = 0;

    nx2 = nptsx/2;
    ny2 = nptsy/2;
    h_mask[ny2*nptsx+nx2] = 0;
    h_mask[ny2*nptsx+nx2-1] = 0;
    h_mask[(ny2-1)*nptsx+nx2] = 0;
    h_mask[(ny2-1)*nptsx+nx2-1] = 0;
    h_phi[ny2*nptsx+nx2]  = 1.0;
    h_phi[ny2*nptsx+nx2-1]  = 1.0;
    h_phi[(ny2-1)*nptsx+nx2]  = 1.0;
    h_phi[(ny2-1)*nptsx+nx2-1]  = 1.0;
    return 0;
}

int output_array (float *h_phi, int nptsx, int nptsy)
{
   int i, j, k=0;
   FILE *fp;

   
   fp = fopen("outCUDA.ps","w");
   fprintf(fp,"/picstr %d string def\n",nptsx);
   fprintf(fp,"50 50 translate\n");
   fprintf(fp,"%d %d scale\n",nptsx, nptsy);
   fprintf(fp,"%d %d 8 [%d 0 0 %d 0 %d] \n",nptsx, nptsy, nptsx, nptsy, -nptsx);
   fprintf(fp,"{currentfile 3 200 mul string readhexstring pop} bind false 3 colorimage\n");

   for(j=0;j<nptsy;j++){
        for(i=0;i<nptsx;i++,k++){
             fprintf(fp,"%06x",RGBval(h_phi[j*nptsx+i]));
             if((k+1)%10==0) fprintf(fp,"\n");
        }
   }
   fclose(fp);
   return 0;
}

int main (int argc, char *argv[])
{
   float *h_phi;
   float *h_oldphi;
   int *h_mask;
   int nsize1=sizeof(float)*NPTSX*NPTSY;
   int nsize2=sizeof(int)*NPTSX*NPTSY;

   h_phi = (float *)malloc(nsize1);
   h_oldphi = (float *)malloc(nsize1);
   h_mask = (int *)malloc(nsize2);
   setup_grid (h_oldphi, NPTSX, NPTSY, h_mask);
   performUpdates(h_phi,h_oldphi,h_mask,NPTSX,NPTSY,NSTEPS);
 
   output_array (h_phi, NPTSX, NPTSY);
 
   return 0;
}

	.text
	.file	"laplaceCUDA.hip"
	.globl	_Z35__device_stub__performUpdatesKernelPfS_Piii # -- Begin function _Z35__device_stub__performUpdatesKernelPfS_Piii
	.type	_Z35__device_stub__performUpdatesKernelPfS_Piii,@function
_Z35__device_stub__performUpdatesKernelPfS_Piii: # @_Z35__device_stub__performUpdatesKernelPfS_Piii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20performUpdatesKernelPfS_Piii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z35__device_stub__performUpdatesKernelPfS_Piii, .Lfunc_end0-_Z35__device_stub__performUpdatesKernelPfS_Piii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__doCopyKernelPfS_Piii # -- Begin function _Z27__device_stub__doCopyKernelPfS_Piii
	.type	_Z27__device_stub__doCopyKernelPfS_Piii,@function
_Z27__device_stub__doCopyKernelPfS_Piii: # @_Z27__device_stub__doCopyKernelPfS_Piii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12doCopyKernelPfS_Piii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__doCopyKernelPfS_Piii, .Lfunc_end1-_Z27__device_stub__doCopyKernelPfS_Piii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z14performUpdatesPfS_Piiii
.LCPI2_0:
	.long	0x3d800000                      # float 0.0625
.LCPI2_1:
	.long	0x3d000000                      # float 0.03125
	.text
	.globl	_Z14performUpdatesPfS_Piiii
	.type	_Z14performUpdatesPfS_Piiii,@function
_Z14performUpdatesPfS_Piiii:            # @_Z14performUpdatesPfS_Piiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movl	%ecx, %r15d
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
	movq	%rdi, 48(%rsp)                  # 8-byte Spill
	movl	%ecx, %eax
	imull	%r8d, %eax
	shll	$2, %eax
	movslq	%eax, %r12
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %r14
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %r13
	movq	%r13, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	cvtsi2ss	%r15d, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	callq	ceilf@PLT
	cvtsi2ss	%ebp, %xmm1
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	mulss	.LCPI2_1(%rip), %xmm1
	movaps	%xmm1, %xmm0
	callq	ceilf@PLT
	testl	%ebx, %ebx
	jle	.LBB2_7
# %bb.1:                                # %.lr.ph.preheader
	cvttss2si	16(%rsp), %rax          # 4-byte Folded Reload
	cvttss2si	%xmm0, %r13
	movl	%eax, %eax
	shlq	$32, %r13
	orq	%rax, %r13
	movabsq	$137438953488, %r14             # imm = 0x2000000010
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=1
	movq	32(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	%r15d, %ecx
	movl	%ebp, %r8d
	callq	_Z35__device_stub__performUpdatesKernelPfS_Piii
.LBB2_4:                                #   in Loop: Header=BB2_2 Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:                                #   in Loop: Header=BB2_2 Depth=1
	movq	32(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	%r15d, %ecx
	movl	%ebp, %r8d
	callq	_Z27__device_stub__doCopyKernelPfS_Piii
.LBB2_6:                                #   in Loop: Header=BB2_2 Depth=1
	decl	%ebx
	jne	.LBB2_2
.LBB2_7:                                # %._crit_edge
	movq	8(%rsp), %rsi
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z14performUpdatesPfS_Piiii, .Lfunc_end2-_Z14performUpdatesPfS_Piiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z6RGBvalf
.LCPI3_0:
	.long	0x3f000000                      # float 0.5
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI3_1:
	.quad	0x3ff0000000000000              # double 1
.LCPI3_2:
	.quad	0x406fe00000000000              # double 255
.LCPI3_3:
	.quad	0x4000000000000000              # double 2
.LCPI3_4:
	.quad	0xbff0000000000000              # double -1
	.text
	.globl	_Z6RGBvalf
	.type	_Z6RGBvalf,@function
_Z6RGBvalf:                             # @_Z6RGBvalf
	.cfi_startproc
# %bb.0:
	cvtss2sd	%xmm0, %xmm1
	movss	.LCPI3_0(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm2
	addsd	%xmm1, %xmm1
	jae	.LBB3_1
# %bb.2:
	movsd	.LCPI3_3(%rip), %xmm0           # xmm0 = mem[0],zero
	subsd	%xmm1, %xmm0
	addsd	.LCPI3_4(%rip), %xmm1
	mulsd	.LCPI3_2(%rip), %xmm1
	cvttsd2si	%xmm1, %edx
	shll	$8, %edx
	xorl	%ecx, %ecx
	movapd	%xmm0, %xmm1
	jmp	.LBB3_3
.LBB3_1:
	movsd	.LCPI3_1(%rip), %xmm0           # xmm0 = mem[0],zero
	subsd	%xmm1, %xmm0
	mulsd	.LCPI3_2(%rip), %xmm0
	cvttsd2si	%xmm0, %ecx
	xorl	%edx, %edx
.LBB3_3:
	mulsd	.LCPI3_2(%rip), %xmm1
	cvttsd2si	%xmm1, %eax
	addl	%edx, %eax
	shll	$8, %eax
	addl	%ecx, %eax
	retq
.Lfunc_end3:
	.size	_Z6RGBvalf, .Lfunc_end3-_Z6RGBvalf
	.cfi_endproc
                                        # -- End function
	.globl	_Z10setup_gridPfiiPi            # -- Begin function _Z10setup_gridPfiiPi
	.type	_Z10setup_gridPfiiPi,@function
_Z10setup_gridPfiiPi:                   # @_Z10setup_gridPfiiPi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %r14
	movl	%edx, %r15d
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movl	%edx, %r13d
	movl	%esi, %r12d
	testl	%edx, %edx
	jle	.LBB4_6
# %bb.1:                                # %.preheader81.lr.ph
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB4_2:                                # %.preheader81
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
	testl	%ebp, %ebp
	jle	.LBB4_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB4_2 Depth=1
	movl	%eax, %esi
	leaq	(%r14,%rsi,4), %rdx
	leaq	(%rbx,%rsi,4), %rsi
	xorl	%edi, %edi
.LBB4_4:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$0, (%rsi,%rdi,4)
	movl	$1, (%rdx,%rdi,4)
	incq	%rdi
	cmpq	%rdi, %r12
	jne	.LBB4_4
.LBB4_5:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	incq	%rcx
	addl	%ebp, %eax
	cmpq	%r13, %rcx
	jne	.LBB4_2
.LBB4_6:                                # %.preheader80
	testl	%ebp, %ebp
	jle	.LBB4_8
# %bb.7:                                # %.lr.ph87
	shlq	$2, %r12
	movq	%r14, %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	callq	memset@PLT
	leal	-1(%r15), %eax
	imull	%ebp, %eax
	cltq
	leaq	(%r14,%rax,4), %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	callq	memset@PLT
.LBB4_8:                                # %.preheader78
	testl	%r15d, %r15d
	jle	.LBB4_14
# %bb.9:                                # %.lr.ph89.preheader
	movslq	%ebp, %rax
	shlq	$2, %rax
	movq	%r13, %rcx
	movq	%r14, %rdx
.LBB4_10:                               # %.lr.ph89
                                        # =>This Inner Loop Header: Depth=1
	movl	$0, (%rdx)
	addq	%rax, %rdx
	decq	%rcx
	jne	.LBB4_10
# %bb.11:                               # %.preheader
	testl	%r15d, %r15d
	jle	.LBB4_14
# %bb.12:                               # %.lr.ph91.preheader
	movl	%ebp, %eax
.LBB4_13:                               # %.lr.ph91
                                        # =>This Inner Loop Header: Depth=1
	cltq
	movl	$0, -4(%r14,%rax,4)
	addl	%ebp, %eax
	decq	%r13
	jne	.LBB4_13
.LBB4_14:                               # %._crit_edge92
	movl	%ebp, %eax
	shrl	$31, %eax
	addl	%ebp, %eax
	sarl	%eax
	movl	%r15d, %ecx
	shrl	$31, %ecx
	addl	%r15d, %ecx
	sarl	%ecx
	movl	%ecx, %edx
	imull	%ebp, %edx
	addl	%eax, %edx
	movslq	%edx, %rdx
	xorl	%esi, %esi
	movq	%rsi, -4(%r14,%rdx,4)
	decl	%ecx
	imull	%ebp, %ecx
	addl	%eax, %ecx
	movslq	%ecx, %rax
	movq	%rsi, -4(%r14,%rax,4)
	movabsq	$4575657222473777152, %rcx      # imm = 0x3F8000003F800000
	movq	%rcx, -4(%rbx,%rdx,4)
	movq	%rcx, -4(%rbx,%rax,4)
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z10setup_gridPfiiPi, .Lfunc_end4-_Z10setup_gridPfiiPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z12output_arrayPfii            # -- Begin function _Z12output_arrayPfii
	.type	_Z12output_arrayPfii,@function
_Z12output_arrayPfii:                   # @_Z12output_arrayPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movl	%esi, %ebx
	movq	%rdi, 24(%rsp)                  # 8-byte Spill
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %r15
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %r12d
	movl	$.L.str.3, %edi
	movl	$16, %esi
	movl	$1, %edx
	movq	%r15, %rcx
	callq	fwrite@PLT
	movl	$.L.str.4, %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	movl	%ebp, %ecx
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %eax
	negl	%eax
	movl	%eax, (%rsp)
	movl	$.L.str.5, %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	movl	%ebp, %ecx
	movl	%ebx, %r8d
	movl	%ebp, %r9d
	xorl	%eax, %eax
	callq	fprintf
	movl	$.L.str.6, %edi
	movl	$73, %esi
	movl	$1, %edx
	movq	%r15, %rcx
	callq	fwrite@PLT
	testl	%ebp, %ebp
	jle	.LBB5_9
# %bb.1:                                # %.preheader.lr.ph
	movl	%ebp, %eax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movl	%ebx, %ebp
	testl	%ebx, %ebx
	movl	$0, %eax
	cmovgl	%ebx, %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	$429496728, %r13d               # imm = 0x19999998
	xorl	%eax, %eax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	movl	%ebx, 12(%rsp)                  # 4-byte Spill
.LBB5_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB5_8
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB5_2 Depth=1
	movl	%edx, 16(%rsp)                  # 4-byte Spill
	movq	%rcx, 48(%rsp)                  # 8-byte Spill
	movl	%eax, 20(%rsp)                  # 4-byte Spill
	movl	%eax, %eax
	movq	24(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%ebx, %ebx
.LBB5_4:                                #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r14,%rbx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	callq	_Z6RGBvalf
	movl	$.L.str.7, %esi
	movq	%r15, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	fprintf
	leal	(%r12,%rbx), %eax
	imull	$-858993459, %eax, %eax         # imm = 0xCCCCCCCD
	addl	%r13d, %eax
	rorl	%eax
	cmpl	%r13d, %eax
	ja	.LBB5_6
# %bb.5:                                #   in Loop: Header=BB5_4 Depth=2
	movl	$10, %edi
	movq	%r15, %rsi
	callq	fputc@PLT
.LBB5_6:                                #   in Loop: Header=BB5_4 Depth=2
	incq	%rbx
	cmpq	%rbx, %rbp
	jne	.LBB5_4
# %bb.7:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB5_2 Depth=1
	movl	12(%rsp), %ebx                  # 4-byte Reload
	movl	16(%rsp), %edx                  # 4-byte Reload
	addl	%ebx, %edx
	movl	20(%rsp), %eax                  # 4-byte Reload
	movq	48(%rsp), %rcx                  # 8-byte Reload
.LBB5_8:                                # %._crit_edge
                                        #   in Loop: Header=BB5_2 Depth=1
	incq	%rcx
	addl	%ebx, %eax
	addq	32(%rsp), %r12                  # 8-byte Folded Reload
	cmpq	40(%rsp), %rcx                  # 8-byte Folded Reload
	jne	.LBB5_2
.LBB5_9:                                # %._crit_edge34
	movq	%r15, %rdi
	callq	fclose
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z12output_arrayPfii, .Lfunc_end5-_Z12output_arrayPfii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$160000, %edi                   # imm = 0x27100
	callq	malloc
	movq	%rax, %rbx
	movl	$160000, %edi                   # imm = 0x27100
	callq	malloc
	movq	%rax, %r14
	movl	$160000, %edi                   # imm = 0x27100
	callq	malloc
	movq	%rax, %r15
	movq	%r14, %rdi
	movl	$200, %esi
	movl	$200, %edx
	movq	%rax, %rcx
	callq	_Z10setup_gridPfiiPi
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$200, %ecx
	movl	$200, %r8d
	movl	$500, %r9d                      # imm = 0x1F4
	callq	_Z14performUpdatesPfS_Piiii
	movq	%rbx, %rdi
	movl	$200, %esi
	movl	$200, %edx
	callq	_Z12output_arrayPfii
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20performUpdatesKernelPfS_Piii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12doCopyKernelPfS_Piii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z20performUpdatesKernelPfS_Piii,@object # @_Z20performUpdatesKernelPfS_Piii
	.section	.rodata,"a",@progbits
	.globl	_Z20performUpdatesKernelPfS_Piii
	.p2align	3, 0x0
_Z20performUpdatesKernelPfS_Piii:
	.quad	_Z35__device_stub__performUpdatesKernelPfS_Piii
	.size	_Z20performUpdatesKernelPfS_Piii, 8

	.type	_Z12doCopyKernelPfS_Piii,@object # @_Z12doCopyKernelPfS_Piii
	.globl	_Z12doCopyKernelPfS_Piii
	.p2align	3, 0x0
_Z12doCopyKernelPfS_Piii:
	.quad	_Z27__device_stub__doCopyKernelPfS_Piii
	.size	_Z12doCopyKernelPfS_Piii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"outCUDA.ps"
	.size	.L.str, 11

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"w"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"/picstr %d string def\n"
	.size	.L.str.2, 23

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"50 50 translate\n"
	.size	.L.str.3, 17

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%d %d scale\n"
	.size	.L.str.4, 13

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d %d 8 [%d 0 0 %d 0 %d] \n"
	.size	.L.str.5, 27

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"{currentfile 3 200 mul string readhexstring pop} bind false 3 colorimage\n"
	.size	.L.str.6, 74

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%06x"
	.size	.L.str.7, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20performUpdatesKernelPfS_Piii"
	.size	.L__unnamed_1, 33

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12doCopyKernelPfS_Piii"
	.size	.L__unnamed_2, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__performUpdatesKernelPfS_Piii
	.addrsig_sym _Z27__device_stub__doCopyKernelPfS_Piii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z20performUpdatesKernelPfS_Piii
	.addrsig_sym _Z12doCopyKernelPfS_Piii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20performUpdatesKernelPfS_Piii ; -- Begin function _Z20performUpdatesKernelPfS_Piii
	.globl	_Z20performUpdatesKernelPfS_Piii
	.p2align	8
	.type	_Z20performUpdatesKernelPfS_Piii,@function
_Z20performUpdatesKernelPfS_Piii:       ; @_Z20performUpdatesKernelPfS_Piii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[4:5], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, vcc_lo
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_3
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.2:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_subrev_nc_u32_e32 v2, s4, v2
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[4:5], s[4:5], 2
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, v4, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v5, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_clause 0x3
	global_load_b32 v6, v[6:7], off
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off offset:4
	global_load_b32 v4, v[4:5], off offset:-4
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v6
	v_add_f32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v2, 0x3e800000, v2
	global_store_b32 v[0:1], v2, off
.LBB0_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20performUpdatesKernelPfS_Piii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20performUpdatesKernelPfS_Piii, .Lfunc_end0-_Z20performUpdatesKernelPfS_Piii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 364
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12doCopyKernelPfS_Piii ; -- Begin function _Z12doCopyKernelPfS_Piii
	.globl	_Z12doCopyKernelPfS_Piii
	.p2align	8
	.type	_Z12doCopyKernelPfS_Piii,@function
_Z12doCopyKernelPfS_Piii:               ; @_Z12doCopyKernelPfS_Piii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[4:5], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, vcc_lo
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_3
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_3
; %bb.2:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB1_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12doCopyKernelPfS_Piii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12doCopyKernelPfS_Piii, .Lfunc_end1-_Z12doCopyKernelPfS_Piii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20performUpdatesKernelPfS_Piii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20performUpdatesKernelPfS_Piii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12doCopyKernelPfS_Piii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12doCopyKernelPfS_Piii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
