#include <cstdio>
#include <cmath>
#include <vector>
#include <chrono>
#include <stdlib.h>

using namespace std;

__global__ void matrix(int N, float *A, float *B, float* C){
    int i = blockIdx.x / N;
    int j = blockIdx.x % N;
    int k = threadIdx.x;
       
    atomicAdd(C+N*i+j, A[N*i+k] * B[N*k+j]);
}


int main(int argc, char** argv) {
  const int N = 256;
  float *A;
  float *B;
  float *C;

  cudaMallocManaged(&A, N*N*sizeof(float));
  cudaMallocManaged(&B, N*N*sizeof(float));
  cudaMallocManaged(&C, N*N*sizeof(float));
  
  for (int i=0; i<N; i++) {
    for (int j=0; j<N; j++) {
      A[N*i+j] = drand48();
      B[N*i+j] = drand48();
    }
  }
  
  auto tic = chrono::steady_clock::now();

  matrix<<<N*N,N>>>(N,A,B,C);
  cudaDeviceSynchronize();

  auto toc = chrono::steady_clock::now();
  
  for (int i=0; i<N; i++)
    for (int j=0; j<N; j++)
      for (int k=0; k<N; k++)
        C[N*i+j] -= A[N*i+k] * B[N*k+j];
  double err = 0;
  for (int i=0; i<N; i++)
    for (int j=0; j<N; j++)
      err += fabs(C[N*i+j]);
  double time = chrono::duration<double>(toc-tic).count();
  printf("N    : %d\n",N);
  printf("total: %lf s (%lf GFlops)\n",time,2.*N*N*N/time/1e9);
  printf("error: %lf\n",err/N/N);
}  

	.file	"tmpxft_0025f2cd_00000000-6_example.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3001:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3001:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z30__device_stub__Z6matrixiPfS_S_iPfS_S_
	.type	_Z30__device_stub__Z6matrixiPfS_S_iPfS_S_, @function
_Z30__device_stub__Z6matrixiPfS_S_iPfS_S_:
.LFB3023:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6matrixiPfS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3023:
	.size	_Z30__device_stub__Z6matrixiPfS_S_iPfS_S_, .-_Z30__device_stub__Z6matrixiPfS_S_iPfS_S_
	.globl	_Z6matrixiPfS_S_
	.type	_Z6matrixiPfS_S_, @function
_Z6matrixiPfS_S_:
.LFB3024:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6matrixiPfS_S_iPfS_S_
	.cfi_endproc
.LFE3024:
	.size	_Z6matrixiPfS_S_, .-_Z6matrixiPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"N    : %d\n"
.LC5:
	.string	"total: %lf s (%lf GFlops)\n"
.LC7:
	.string	"error: %lf\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2995:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$1, %edx
	movl	$262144, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	call	cudaMallocManaged@PLT
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	movl	$262144, %esi
	call	cudaMallocManaged@PLT
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	movl	$262144, %esi
	call	cudaMallocManaged@PLT
.L9:
	xorl	%ebx, %ebx
.L10:
	call	drand48@PLT
	movq	24(%rsp), %rax
	leaq	0(%rbp,%rbx,4), %r12
	incq	%rbx
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rax,%r12)
	call	drand48@PLT
	movq	32(%rsp), %rax
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rax,%r12)
	cmpq	$256, %rbx
	jne	.L10
	addq	$1024, %rbp
	cmpq	$262144, %rbp
	jne	.L9
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$65537, %edi
	salq	$8, %rdx
	movq	%rax, %rbx
	movl	$1, %ecx
	salq	$16, %rdi
	movl	$1, %esi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movl	$256, %edi
	movq	24(%rsp), %rsi
	call	_Z30__device_stub__Z6matrixiPfS_S_iPfS_S_
.L12:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movq	40(%rsp), %r10
	movq	24(%rsp), %rbp
	movq	32(%rsp), %r12
	movq	%rax, %rdi
	xorl	%eax, %eax
.L13:
	movq	%r10, %r8
	leaq	(%r10,%rax), %rcx
	leaq	0(%rbp,%rax), %r11
	xorl	%edx, %edx
.L17:
	leaq	(%r12,%rdx,4), %r9
	xorl	%esi, %esi
.L14:
	movss	(%r11,%rsi,4), %xmm1
	mulss	(%r9), %xmm1
	incq	%rsi
	addq	$1024, %r9
	movss	(%rcx), %xmm0
	subss	%xmm1, %xmm0
	movss	%xmm0, (%rcx)
	cmpq	$256, %rsi
	jne	.L14
	incq	%rdx
	addq	$4, %rcx
	cmpq	$256, %rdx
	jne	.L17
	addq	$1024, %rax
	cmpq	$262144, %rax
	jne	.L13
	xorl	%edx, %edx
	xorps	%xmm2, %xmm2
	movss	.LC1(%rip), %xmm1
.L16:
	xorl	%eax, %eax
.L18:
	movss	(%r8,%rax,4), %xmm0
	incq	%rax
	andps	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	addsd	%xmm0, %xmm2
	cmpq	$256, %rax
	jne	.L18
	addl	$256, %edx
	addq	$1024, %r8
	cmpl	$65536, %edx
	jne	.L16
	movq	%rdi, %rax
	movl	$256, %edx
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	subq	%rbx, %rax
	movsd	%xmm2, 8(%rsp)
	cvtsi2sdq	%rax, %xmm0
	xorl	%eax, %eax
	divsd	.LC2(%rip), %xmm0
	movsd	%xmm0, (%rsp)
	call	__printf_chk@PLT
	movsd	(%rsp), %xmm0
	movl	$2, %edi
	movb	$2, %al
	movsd	.LC4(%rip), %xmm1
	leaq	.LC5(%rip), %rsi
	divsd	%xmm0, %xmm1
	divsd	.LC2(%rip), %xmm1
	call	__printf_chk@PLT
	movb	$1, %al
	movsd	.LC6(%rip), %xmm0
	movsd	8(%rsp), %xmm2
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	mulsd	%xmm0, %xmm2
	mulsd	%xmm2, %xmm0
	call	__printf_chk@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2995:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z6matrixiPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3026:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6matrixiPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3026:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC1:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	0
	.long	1104006501
	.align 8
.LC4:
	.long	0
	.long	1098907648
	.align 8
.LC6:
	.long	0
	.long	1064304640
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdio>
#include <cmath>
#include <vector>
#include <chrono>
#include <stdlib.h>

using namespace std;

__global__ void matrix(int N, float *A, float *B, float* C){
    int i = blockIdx.x / N;
    int j = blockIdx.x % N;
    int k = threadIdx.x;
       
    atomicAdd(C+N*i+j, A[N*i+k] * B[N*k+j]);
}


int main(int argc, char** argv) {
  const int N = 256;
  float *A;
  float *B;
  float *C;

  hipMallocManaged(&A, N*N*sizeof(float));
  hipMallocManaged(&B, N*N*sizeof(float));
  hipMallocManaged(&C, N*N*sizeof(float));
  
  for (int i=0; i<N; i++) {
    for (int j=0; j<N; j++) {
      A[N*i+j] = drand48();
      B[N*i+j] = drand48();
    }
  }
  
  auto tic = chrono::steady_clock::now();

  matrix<<<N*N,N>>>(N,A,B,C);
  hipDeviceSynchronize();

  auto toc = chrono::steady_clock::now();
  
  for (int i=0; i<N; i++)
    for (int j=0; j<N; j++)
      for (int k=0; k<N; k++)
        C[N*i+j] -= A[N*i+k] * B[N*k+j];
  double err = 0;
  for (int i=0; i<N; i++)
    for (int j=0; j<N; j++)
      err += fabs(C[N*i+j]);
  double time = chrono::duration<double>(toc-tic).count();
  printf("N    : %d\n",N);
  printf("total: %lf s (%lf GFlops)\n",time,2.*N*N*N/time/1e9);
  printf("error: %lf\n",err/N/N);
}  

	.text
	.file	"example.hip"
	.globl	_Z21__device_stub__matrixiPfS_S_ # -- Begin function _Z21__device_stub__matrixiPfS_S_
	.type	_Z21__device_stub__matrixiPfS_S_,@function
_Z21__device_stub__matrixiPfS_S_:       # @_Z21__device_stub__matrixiPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6matrixiPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__matrixiPfS_S_, .Lfunc_end0-_Z21__device_stub__matrixiPfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI1_1:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI1_2:
	.quad	0x4180000000000000              # double 33554432
.LCPI1_3:
	.quad	0x3f70000000000000              # double 0.00390625
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	8(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	movl	$1, %edx
	callq	hipMallocManaged
	movq	%rsp, %rdi
	movl	$262144, %esi                   # imm = 0x40000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	movl	$1, %edx
	callq	hipMallocManaged
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB1_1:                                # %.preheader49
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	movl	$256, %r15d                     # imm = 0x100
	movq	%rbx, %r12
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	drand48
	cvtsd2ss	%xmm0, %xmm0
	movq	8(%rsp), %rax
	movss	%xmm0, (%rax,%r12)
	callq	drand48
	cvtsd2ss	%xmm0, %xmm0
	movq	(%rsp), %rax
	movss	%xmm0, (%rax,%r12)
	addq	$4, %r12
	decq	%r15
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%r14
	addq	$1024, %rbx                     # imm = 0x400
	cmpq	$256, %r14                      # imm = 0x100
	jne	.LBB1_1
# %bb.4:
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	%rax, %rbx
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	leaq	65280(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	16(%rsp), %rcx
	movl	$256, %edi                      # imm = 0x100
	callq	_Z21__device_stub__matrixiPfS_S_
.LBB1_6:
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	8(%rsp), %rdx
	movq	(%rsp), %rsi
	xorl	%edi, %edi
	movq	16(%rsp), %rcx
.LBB1_7:                                # %.preheader48
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_8 Depth 2
                                        #       Child Loop BB1_9 Depth 3
	movq	%rdi, %r8
	shlq	$8, %r8
	movq	%rsi, %r9
	xorl	%r10d, %r10d
.LBB1_8:                                # %.preheader47
                                        #   Parent Loop BB1_7 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_9 Depth 3
	movq	%r10, %r11
	orq	%r8, %r11
	movss	(%rcx,%r11,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movq	%r9, %r14
	xorl	%r15d, %r15d
.LBB1_9:                                #   Parent Loop BB1_7 Depth=1
                                        #     Parent Loop BB1_8 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rdx,%r15,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r14), %xmm1
	subss	%xmm1, %xmm0
	movss	%xmm0, (%rcx,%r11,4)
	incq	%r15
	addq	$1024, %r14                     # imm = 0x400
	cmpq	$256, %r15                      # imm = 0x100
	jne	.LBB1_9
# %bb.10:                               #   in Loop: Header=BB1_8 Depth=2
	incq	%r10
	addq	$4, %r9
	cmpq	$256, %r10                      # imm = 0x100
	jne	.LBB1_8
# %bb.11:                               #   in Loop: Header=BB1_7 Depth=1
	incq	%rdi
	addq	$1024, %rdx                     # imm = 0x400
	cmpq	$256, %rdi                      # imm = 0x100
	jne	.LBB1_7
# %bb.12:                               # %.preheader.preheader
	xorpd	%xmm2, %xmm2
	xorl	%edx, %edx
	movaps	.LCPI1_0(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
.LBB1_13:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_14 Depth 2
	xorl	%esi, %esi
.LBB1_14:                               #   Parent Loop BB1_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rcx,%rsi,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	andps	%xmm0, %xmm1
	cvtss2sd	%xmm1, %xmm1
	addsd	%xmm1, %xmm2
	incq	%rsi
	cmpq	$256, %rsi                      # imm = 0x100
	jne	.LBB1_14
# %bb.15:                               #   in Loop: Header=BB1_13 Depth=1
	incq	%rdx
	addq	$1024, %rcx                     # imm = 0x400
	cmpq	$256, %rdx                      # imm = 0x100
	jne	.LBB1_13
# %bb.16:
	subq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI1_1(%rip), %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movl	$.L.str, %edi
	movl	$256, %esi                      # imm = 0x100
	xorl	%eax, %eax
	movsd	%xmm2, 32(%rsp)                 # 8-byte Spill
	callq	printf
	movsd	.LCPI1_2(%rip), %xmm1           # xmm1 = mem[0],zero
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	divsd	%xmm0, %xmm1
	divsd	.LCPI1_1(%rip), %xmm1
	movl	$.L.str.1, %edi
	movb	$2, %al
	callq	printf
	movsd	.LCPI1_3(%rip), %xmm0           # xmm0 = mem[0],zero
	movsd	32(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	mulsd	%xmm0, %xmm1
	mulsd	%xmm0, %xmm1
	movapd	%xmm1, %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6matrixiPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6matrixiPfS_S_,@object        # @_Z6matrixiPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z6matrixiPfS_S_
	.p2align	3, 0x0
_Z6matrixiPfS_S_:
	.quad	_Z21__device_stub__matrixiPfS_S_
	.size	_Z6matrixiPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"N    : %d\n"
	.size	.L.str, 11

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"total: %lf s (%lf GFlops)\n"
	.size	.L.str.1, 27

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"error: %lf\n"
	.size	.L.str.2, 12

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6matrixiPfS_S_"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__matrixiPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6matrixiPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6matrixiPfS_S_        ; -- Begin function _Z6matrixiPfS_S_
	.globl	_Z6matrixiPfS_S_
	.p2align	8
	.type	_Z6matrixiPfS_S_,@function
_Z6matrixiPfS_S_:                       ; @_Z6matrixiPfS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x0
	s_load_b128 s[8:11], s[0:1], 0x8
	s_mov_b32 s3, exec_lo
	s_load_b64 s[0:1], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_u32_e32 v1, s5
	s_sub_i32 s4, 0, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s2, v1
	s_mul_i32 s4, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s4, s2, s4
	s_add_i32 s2, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s2, s15, s2
	s_mul_i32 s2, s2, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s2, s15, s2
	s_sub_i32 s4, s2, s5
	s_cmp_ge_u32 s2, s5
	s_cselect_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_sub_i32 s4, s2, s5
	s_cmp_ge_u32 s2, s5
	s_cselect_b32 s2, s4, s2
	s_sub_i32 s4, s15, s2
	v_mad_u64_u32 v[3:4], null, v0, s5, s[2:3]
	v_add_nc_u32_e32 v1, s4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	global_load_b32 v0, v[0:1], off
	global_load_b32 v1, v[2:3], off
	v_bfrev_b32_e32 v2, 1
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v0, v0, v1
.LBB0_1:                                ; %ComputeLoop
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s5, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s6, v0, s5
	s_lshl_b32 s5, 1, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s3, s3, s5
	s_cmp_lg_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, s6, v2
	s_cbranch_scc1 .LBB0_1
; %bb.2:                                ; %ComputeEnd
	v_mbcnt_lo_u32_b32 v0, exec_lo, 0
	s_mov_b32 s6, 0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB0_5
; %bb.3:
	s_ashr_i32 s5, s4, 31
	v_mov_b32_e32 v3, 0
	s_lshl_b64 s[4:5], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s4, s0, s4
	s_addc_u32 s5, s1, s5
	s_ashr_i32 s3, s2, 31
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	s_load_b32 s2, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v1, s2
.LBB0_4:                                ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v1, v2
	global_atomic_cmpswap_b32 v0, v3, v[0:1], s[0:1] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_4
.LBB0_5:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6matrixiPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6matrixiPfS_S_, .Lfunc_end0-_Z6matrixiPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 432
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6matrixiPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6matrixiPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
