#include <stdio.h>
#include <time.h>
#include <stdlib.h>
#include <cuda.h>

//Afegim un tamany per defecte
//Imprescindible que sigui potencia de 2
#define NUM_THREADS 1024
#define NUM_BLOCKS 32768
#define N NUM_THREADS*NUM_BLOCKS

//Macro per a swap
#define SWAP(_i, _ixj){\
	int aux = vector[_i];\
	vector[_i] = vector[_ixj];\
	vector[_ixj] = aux;}

//Kernel per a bitonic sort
__global__ void bitonicSortKernel(int *vector, int j, int k){
	int i, ixj;
	i = threadIdx.x + blockDim.x * blockIdx.x;
	ixj = i ^ j;

	if((ixj) > i){
		if((i & k) == 0 && vector[i] > vector[ixj]){
			SWAP(i, ixj);
			//int aux = vector[i];
			//vector[i] = vector[ixj];
			//vector[ixj] = aux;
		}
		if((i & k) != 0 && vector[i] < vector[ixj]){
			SWAP(i, ixj);
			//int aux = vector[i];
			//vector[i] = vector[ixj];
			//vector[ixj] = aux;
		}
	}
}

//Funcio iterativa de bitonic sort
void bitonicSort(int *vector){
	int j, k;

	dim3 numBlocks(NUM_BLOCKS, 1);
	dim3 numThreads(NUM_THREADS, 1);

	for(k = 2; k <= N; k = 2*k){
		//Els shifts son equivalents de dividir entre 2
		for(j = k >> 1; j > 0; j = j >> 1){ 
			bitonicSortKernel<<<numBlocks, numThreads>>>(vector, j, k);
		}
	}
}

int testOrdenacio(int *vector){
	int ordenat = 1;
	int i;
	for(i = 0; i < N -1 && ordenat; ++i){
		if(vector[i] > vector[i+1]) ordenat = 0;
	}
	return ordenat;
}

int main(int argc, char **argv) {
	//Generacio dels parametres del vector
	int n = N;
	//if(argc > 1) n = atoi(argv[1]); 
	int *vector, *vectorDevice, *vectorAux;

	cudaEvent_t E0, E1, E2, E3;

	cudaEventCreate(&E0);
	cudaEventCreate(&E1);
	cudaEventCreate(&E2);
	cudaEventCreate(&E3);
	
	unsigned int NUM_BYTES = N*sizeof(int);

	//Reserva de memoria per als vectors
	cudaMallocHost(&vector, NUM_BYTES);
	cudaMallocHost(&vectorAux, NUM_BYTES);
	
	//Inicialitzacio amb valors random
	int i;
	srand(time(NULL));
	for(i = 0; i < N; ++i){
		vector[i] = rand();
	}

	cudaEventRecord(E0, 0);
	cudaEventSynchronize(E0);
	
	cudaMalloc((int **)&vectorDevice, NUM_BYTES);

	cudaEventRecord(E1, 0);
	cudaEventSynchronize(E1);

	//Pas del vector de host a device
	cudaMemcpy(vectorDevice, vector, NUM_BYTES, cudaMemcpyHostToDevice);

	//Fem sort del vector
	bitonicSort(vector);

	cudaEventRecord(E2, 0);
	cudaEventSynchronize(E2);

	//Pas del vector de device a host
	cudaMemcpy(vector, vectorDevice, NUM_BYTES, cudaMemcpyDeviceToHost);

	//Test per veure si la ordenacio es correcte
	if(testOrdenacio(vector)) printf("Agustin is happy\n");
	else printf("Agustin te deniega el curso PUMPS\n");

	//Alliberacio de memoria
	cudaFree(vector);
	cudaFree(vectorDevice);

	cudaDeviceSynchronize();
	cudaEventRecord(E3, 0);
	cudaEventSynchronize(E3);

	//Timing
	float tempsTotal;
	cudaEventElapsedTime(&tempsTotal, E0, E3);
	
	printf("Temps: %f", tempsTotal);

	//Destrueix events
	cudaEventDestroy(E0);
	cudaEventDestroy(E1);
	cudaEventDestroy(E2);
	cudaEventDestroy(E3);

}



	.file	"tmpxft_0039d86e_00000000-6_bitonic_1GPU_old.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z13testOrdenacioPi
	.type	_Z13testOrdenacioPi, @function
_Z13testOrdenacioPi:
.LFB2028:
	.cfi_startproc
	endbr64
	movl	$1, %edx
.L3:
	movl	(%rdi,%rdx,4), %eax
	cmpl	%eax, -4(%rdi,%rdx,4)
	setle	%al
	cmpl	$33554430, %edx
	setle	%cl
	incq	%rdx
	testb	%al, %cl
	jne	.L3
	movzbl	%al, %eax
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z13testOrdenacioPi, .-_Z13testOrdenacioPi
	.globl	_Z39__device_stub__Z17bitonicSortKernelPiiiPiii
	.type	_Z39__device_stub__Z17bitonicSortKernelPiiiPiii, @function
_Z39__device_stub__Z17bitonicSortKernelPiiiPiii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17bitonicSortKernelPiii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L6:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z39__device_stub__Z17bitonicSortKernelPiiiPiii, .-_Z39__device_stub__Z17bitonicSortKernelPiiiPiii
	.globl	_Z17bitonicSortKernelPiii
	.type	_Z17bitonicSortKernelPiii, @function
_Z17bitonicSortKernelPiii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z17bitonicSortKernelPiiiPiii
	.cfi_endproc
.LFE2055:
	.size	_Z17bitonicSortKernelPiii, .-_Z17bitonicSortKernelPiii
	.globl	_Z11bitonicSortPi
	.type	_Z11bitonicSortPi, @function
_Z11bitonicSortPi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$131073, %eax
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	salq	$15, %rax
	movl	$25, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	$2, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	%rax, 8(%rsp)
	subq	$31744, %rax
	movl	$1, 16(%rsp)
	movq	%rax, 20(%rsp)
	movl	$1, 28(%rsp)
.L15:
	movl	%ebx, %ebp
.L13:
	sarl	%ebp
	testl	%ebp, %ebp
	jle	.L18
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movl	%ebx, %edx
	movl	%ebp, %esi
	movq	%r13, %rdi
	call	_Z39__device_stub__Z17bitonicSortKernelPiiiPiii
	jmp	.L13
.L18:
	addl	%ebx, %ebx
	decl	%r12d
	jne	.L15
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z11bitonicSortPi, .-_Z11bitonicSortPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Agustin is happy\n"
.LC1:
	.string	"Agustin te deniega el curso PUMPS\n"
.LC2:
	.string	"Temps: %f"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	xorl	%ebx, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	16(%rsp), %rdi
	xorl	%edx, %edx
	movl	$134217728, %esi
	call	cudaHostAlloc@PLT
	xorl	%edx, %edx
	movl	$134217728, %esi
	leaq	32(%rsp), %rdi
	call	cudaHostAlloc@PLT
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L20:
	movq	16(%rsp), %rbp
	call	rand@PLT
	addq	%rbx, %rbp
	addq	$4, %rbx
	movl	%eax, 0(%rbp)
	cmpq	$134217728, %rbx
	jne	.L20
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	leaq	24(%rsp), %rdi
	movl	$134217728, %esi
	call	cudaMalloc@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$134217728, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	call	_Z11bitonicSortPi
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	movl	$134217728, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	leaq	.LC0(%rip), %rsi
	call	_Z13testOrdenacioPi
	testl	%eax, %eax
	jne	.L26
	leaq	.LC1(%rip), %rsi
.L26:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	call	cudaDeviceSynchronize@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdx
	movq	40(%rsp), %rsi
	leaq	12(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	48(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	56(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	64(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$88, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z17bitonicSortKernelPiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z17bitonicSortKernelPiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <time.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>

//Afegim un tamany per defecte
//Imprescindible que sigui potencia de 2
#define NUM_THREADS 1024
#define NUM_BLOCKS 32768
#define N NUM_THREADS*NUM_BLOCKS

//Macro per a swap
#define SWAP(_i, _ixj){\
	int aux = vector[_i];\
	vector[_i] = vector[_ixj];\
	vector[_ixj] = aux;}

//Kernel per a bitonic sort
__global__ void bitonicSortKernel(int *vector, int j, int k){
	int i, ixj;
	i = threadIdx.x + blockDim.x * blockIdx.x;
	ixj = i ^ j;

	if((ixj) > i){
		if((i & k) == 0 && vector[i] > vector[ixj]){
			SWAP(i, ixj);
			//int aux = vector[i];
			//vector[i] = vector[ixj];
			//vector[ixj] = aux;
		}
		if((i & k) != 0 && vector[i] < vector[ixj]){
			SWAP(i, ixj);
			//int aux = vector[i];
			//vector[i] = vector[ixj];
			//vector[ixj] = aux;
		}
	}
}

//Funcio iterativa de bitonic sort
void bitonicSort(int *vector){
	int j, k;

	dim3 numBlocks(NUM_BLOCKS, 1);
	dim3 numThreads(NUM_THREADS, 1);

	for(k = 2; k <= N; k = 2*k){
		//Els shifts son equivalents de dividir entre 2
		for(j = k >> 1; j > 0; j = j >> 1){ 
			bitonicSortKernel<<<numBlocks, numThreads>>>(vector, j, k);
		}
	}
}

int testOrdenacio(int *vector){
	int ordenat = 1;
	int i;
	for(i = 0; i < N -1 && ordenat; ++i){
		if(vector[i] > vector[i+1]) ordenat = 0;
	}
	return ordenat;
}

int main(int argc, char **argv) {
	//Generacio dels parametres del vector
	int n = N;
	//if(argc > 1) n = atoi(argv[1]); 
	int *vector, *vectorDevice, *vectorAux;

	hipEvent_t E0, E1, E2, E3;

	hipEventCreate(&E0);
	hipEventCreate(&E1);
	hipEventCreate(&E2);
	hipEventCreate(&E3);
	
	unsigned int NUM_BYTES = N*sizeof(int);

	//Reserva de memoria per als vectors
	hipHostMalloc(&vector, NUM_BYTES, hipHostMallocDefault);
	hipHostMalloc(&vectorAux, NUM_BYTES, hipHostMallocDefault);
	
	//Inicialitzacio amb valors random
	int i;
	srand(time(NULL));
	for(i = 0; i < N; ++i){
		vector[i] = rand();
	}

	hipEventRecord(E0, 0);
	hipEventSynchronize(E0);
	
	hipMalloc((int **)&vectorDevice, NUM_BYTES);

	hipEventRecord(E1, 0);
	hipEventSynchronize(E1);

	//Pas del vector de host a device
	hipMemcpy(vectorDevice, vector, NUM_BYTES, hipMemcpyHostToDevice);

	//Fem sort del vector
	bitonicSort(vector);

	hipEventRecord(E2, 0);
	hipEventSynchronize(E2);

	//Pas del vector de device a host
	hipMemcpy(vector, vectorDevice, NUM_BYTES, hipMemcpyDeviceToHost);

	//Test per veure si la ordenacio es correcte
	if(testOrdenacio(vector)) printf("Agustin is happy\n");
	else printf("Agustin te deniega el curso PUMPS\n");

	//Alliberacio de memoria
	hipFree(vector);
	hipFree(vectorDevice);

	hipDeviceSynchronize();
	hipEventRecord(E3, 0);
	hipEventSynchronize(E3);

	//Timing
	float tempsTotal;
	hipEventElapsedTime(&tempsTotal, E0, E3);
	
	printf("Temps: %f", tempsTotal);

	//Destrueix events
	hipEventDestroy(E0);
	hipEventDestroy(E1);
	hipEventDestroy(E2);
	hipEventDestroy(E3);

}



	.text
	.file	"bitonic_1GPU_old.hip"
	.globl	_Z32__device_stub__bitonicSortKernelPiii # -- Begin function _Z32__device_stub__bitonicSortKernelPiii
	.type	_Z32__device_stub__bitonicSortKernelPiii,@function
_Z32__device_stub__bitonicSortKernelPiii: # @_Z32__device_stub__bitonicSortKernelPiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17bitonicSortKernelPiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__bitonicSortKernelPiii, .Lfunc_end0-_Z32__device_stub__bitonicSortKernelPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11bitonicSortPi               # -- Begin function _Z11bitonicSortPi
	.type	_Z11bitonicSortPi,@function
_Z11bitonicSortPi:                      # @_Z11bitonicSortPi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movl	$2, %r15d
	movabsq	$4294968320, %r14               # imm = 0x100000400
	leaq	31744(%r14), %r12
.LBB1_1:                                # %.lr.ph.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	movl	%r15d, %r13d
	movl	%r15d, %ebp
.LBB1_2:                                # %.lr.ph
                                        #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	shrl	%ebp
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:                                #   in Loop: Header=BB1_2 Depth=2
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movl	%r15d, %edx
	callq	_Z32__device_stub__bitonicSortKernelPiii
.LBB1_4:                                #   in Loop: Header=BB1_2 Depth=2
	cmpl	$3, %r13d
	movl	%ebp, %r13d
	ja	.LBB1_2
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_1 Depth=1
	leal	(%r15,%r15), %eax
	cmpl	$16777217, %r15d                # imm = 0x1000001
	movl	%eax, %r15d
	jb	.LBB1_1
# %bb.6:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z11bitonicSortPi, .Lfunc_end1-_Z11bitonicSortPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z13testOrdenacioPi             # -- Begin function _Z13testOrdenacioPi
	.type	_Z13testOrdenacioPi,@function
_Z13testOrdenacioPi:                    # @_Z13testOrdenacioPi
	.cfi_startproc
# %bb.0:
	movl	(%rdi), %ecx
	xorl	%eax, %eax
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	%ecx, %edx
	movl	4(%rdi,%rax,4), %ecx
	cmpl	%ecx, %edx
	jg	.LBB2_3
# %bb.2:                                #   in Loop: Header=BB2_1 Depth=1
	leaq	1(%rax), %rsi
	cmpq	$33554430, %rax                 # imm = 0x1FFFFFE
	movq	%rsi, %rax
	jb	.LBB2_1
.LBB2_3:
	xorl	%eax, %eax
	cmpl	%ecx, %edx
	setle	%al
	retq
.Lfunc_end2:
	.size	_Z13testOrdenacioPi, .Lfunc_end2-_Z13testOrdenacioPi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$72, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	xorl	%ebx, %ebx
	movl	$134217728, %esi                # imm = 0x8000000
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	64(%rsp), %rdi
	movl	$134217728, %esi                # imm = 0x8000000
	xorl	%edx, %edx
	callq	hipHostMalloc
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	movq	8(%rsp), %rcx
	movl	%eax, (%rcx,%rbx,4)
	incq	%rbx
	cmpq	$33554432, %rbx                 # imm = 0x2000000
	jne	.LBB3_1
# %bb.2:
	movq	24(%rsp), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	48(%rsp), %rbx
	movl	$134217728, %esi                # imm = 0x8000000
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	40(%rsp), %rdi
	callq	hipEventSynchronize
	movq	(%rbx), %rdi
	movq	8(%rsp), %rsi
	movl	$134217728, %edx                # imm = 0x8000000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	_Z11bitonicSortPi
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi
	callq	hipEventSynchronize
	movq	8(%rsp), %rdi
	movq	(%rbx), %rsi
	movl	$134217728, %edx                # imm = 0x8000000
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rax
	movl	(%rax), %ecx
.LBB3_3:                                # =>This Inner Loop Header: Depth=1
	movl	%ecx, %edx
	movl	4(%rax,%r14,4), %ecx
	cmpq	$33554429, %r14                 # imm = 0x1FFFFFD
	ja	.LBB3_5
# %bb.4:                                #   in Loop: Header=BB3_3 Depth=1
	incq	%r14
	cmpl	%ecx, %edx
	jle	.LBB3_3
.LBB3_5:                                # %_Z13testOrdenacioPi.exit
	cmpl	%ecx, %edx
	movl	$.Lstr.1, %eax
	movl	$.Lstr, %edi
	cmovleq	%rax, %rdi
	callq	puts@PLT
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	leaq	60(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rdi
	callq	hipEventDestroy
	movq	40(%rsp), %rdi
	callq	hipEventDestroy
	movq	32(%rsp), %rdi
	callq	hipEventDestroy
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17bitonicSortKernelPiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17bitonicSortKernelPiii,@object # @_Z17bitonicSortKernelPiii
	.section	.rodata,"a",@progbits
	.globl	_Z17bitonicSortKernelPiii
	.p2align	3, 0x0
_Z17bitonicSortKernelPiii:
	.quad	_Z32__device_stub__bitonicSortKernelPiii
	.size	_Z17bitonicSortKernelPiii, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"Temps: %f"
	.size	.L.str.2, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17bitonicSortKernelPiii"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Agustin te deniega el curso PUMPS"
	.size	.Lstr, 34

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Agustin is happy"
	.size	.Lstr.1, 17

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__bitonicSortKernelPiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17bitonicSortKernelPiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17bitonicSortKernelPiii ; -- Begin function _Z17bitonicSortKernelPiii
	.globl	_Z17bitonicSortKernelPiii
	.p2align	8
	.type	_Z17bitonicSortKernelPiii,@function
_Z17bitonicSortKernelPiii:              ; @_Z17bitonicSortKernelPiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s15, s4, v[0:1]
	v_xor_b32_e32 v0, s2, v4
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 v0, v4
	s_cbranch_execz .LBB0_7
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[4:5]
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_and_b32_e32 v4, s3, v4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v6, vcc_lo
	s_mov_b32 s0, 0
	s_clause 0x1
	global_load_b32 v5, v[0:1], off
	global_load_b32 v6, v[2:3], off
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u32_e32 0, v4
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_3
; %bb.2:
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v5, v6
	s_and_b32 s0, vcc_lo, exec_lo
.LBB0_3:                                ; %Flow
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB0_5
; %bb.4:
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v5, v6
	s_and_not1_b32 s0, s0, exec_lo
	s_and_b32 s2, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s0, s0, s2
.LBB0_5:                                ; %Flow46
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_7
; %bb.6:                                ; %.sink.split
	s_waitcnt vmcnt(0)
	s_clause 0x1
	global_store_b32 v[0:1], v6, off
	global_store_b32 v[2:3], v5, off
.LBB0_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17bitonicSortKernelPiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17bitonicSortKernelPiii, .Lfunc_end0-_Z17bitonicSortKernelPiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17bitonicSortKernelPiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17bitonicSortKernelPiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
