// CUDA to start with...
// Operation:  B = parMatTranspose(A)
#include <stdio.h>
#include <unistd.h>

#define BLOCK_SIZE 32

__global__ void parMatTranspose (float *B, float *A, int ndim) {
  // Block index
  int bx = blockIdx.x;
  int by = blockIdx.y;
 
  // Thread index
  int tx = threadIdx.x;
  int ty = threadIdx.y;
    
  // Index into global array A.
  int i = blockDim.y*by+ty;
  int j = blockDim.x*bx+tx;
	
  // Working memory;
  __shared__ float block[BLOCK_SIZE][BLOCK_SIZE];
	
  if((i<ndim)&&(j<ndim)) {
    block[ty][tx] = A[j*ndim+i];
  }
  // Synchronize to make sure the matrices are loaded
  __syncthreads();
  if((i<ndim)&&(j<ndim)) {
    B[i*ndim+j]=block[ty][tx];
  }
  // Synchronize to make sure the matrices are loaded
  __syncthreads();
}



int main(int argc, char **argv) {
  int ndim;
  int threaddim=BLOCK_SIZE;
  int blockdim;
  float *h_A, *h_B;
  float *d_A, *d_B;
  int i,j,k;
  if(argc>1) {
    ndim=atoi(argv[1]);
  }
  else {
   ndim=1024;
  }

  blockdim=(ndim+BLOCK_SIZE-1)/BLOCK_SIZE;

while (1)
  {

  h_A=(float *)malloc(ndim*ndim*sizeof(float));
  h_B=(float *)malloc(ndim*ndim*sizeof(float));
  for(k=0; k<ndim*ndim; k++)
    h_A[k]=(float)k;

  cudaMalloc((void **)&d_A,ndim*ndim*sizeof(float));
  printf("%lX\n", (unsigned long)d_A);
  
  cudaMalloc((void **)&d_B,ndim*ndim*sizeof(float));

  cudaMemcpy(d_A,h_A, ndim*ndim*sizeof(float), cudaMemcpyHostToDevice);

  dim3 grid(blockdim,blockdim);
  dim3 threads(threaddim,threaddim);	
  parMatTranspose <<<grid, threads>>>(d_B, d_A, ndim);
  cudaMemcpy(h_B,d_B, ndim*ndim*sizeof(float), cudaMemcpyDeviceToHost);

  int count=0;
  for(i=0; i<ndim; i++) {
    for(j=0; j<ndim; j++) {
      if(h_B[ndim*j+i]!=(float)(ndim*i+j)) count++;
    }
  }

  printf("Count=%d\n", count);
  if(ndim<10) {
    for(i=0; i<ndim*ndim; i++)
      printf("a[%d]=%g b[%d]=%g\n", i, h_A[i], i, h_B[i]);
  }
  sleep (1);
  //cudaFree(d_A);
  //cudaFree(d_B);

  free(h_A);
  free(h_B);
  }
}

/* Major mode settings for GNU Emacs */
/* This coerces the editor to treat this as C code. */

/* Local Variables: */
/* mode:c           */
/* End:             */

	.file	"tmpxft_0034fc09_00000000-6_CUDA1.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2043:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2043:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z38__device_stub__Z15parMatTransposePfS_iPfS_i
	.type	_Z38__device_stub__Z15parMatTransposePfS_iPfS_i, @function
_Z38__device_stub__Z15parMatTransposePfS_iPfS_i:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15parMatTransposePfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z38__device_stub__Z15parMatTransposePfS_iPfS_i, .-_Z38__device_stub__Z15parMatTransposePfS_iPfS_i
	.globl	_Z15parMatTransposePfS_i
	.type	_Z15parMatTransposePfS_i, @function
_Z15parMatTransposePfS_i:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z15parMatTransposePfS_iPfS_i
	.cfi_endproc
.LFE2066:
	.size	_Z15parMatTransposePfS_i, .-_Z15parMatTransposePfS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%lX\n"
.LC1:
	.string	"Count=%d\n"
.LC2:
	.string	"a[%d]=%g b[%d]=%g\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2040:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	$1024, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jle	.L9
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movl	%eax, %ebx
.L9:
	leal	31(%rbx), %eax
	movl	$32, %ecx
	movl	%ebx, %r14d
	movslq	%ebx, %r15
	cltd
	imull	%ebx, %r14d
	idivl	%ecx
	movl	%eax, %r13d
	movslq	%r14d, %rax
	salq	$2, %rax
	movq	%rax, (%rsp)
	leaq	0(,%r15,4), %rax
	movq	%rax, 8(%rsp)
.L18:
	movq	(%rsp), %rdi
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rax, %r12
	xorl	%eax, %eax
.L10:
	cmpl	%eax, %r14d
	jle	.L30
	cvtsi2ssl	%eax, %xmm0
	movss	%xmm0, 0(%rbp,%rax,4)
	incq	%rax
	jmp	.L10
.L30:
	movq	(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdx
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	(%rsp), %rsi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdx
	movq	16(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r13d, 32(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r13d, 36(%rsp)
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z38__device_stub__Z15parMatTransposePfS_iPfS_i
.L12:
	movq	(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	%r12, %rsi
	xorl	%edi, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
.L13:
	cmpl	%ecx, %ebx
	jle	.L31
	movq	%rsi, %r8
	xorl	%eax, %eax
.L16:
	leal	(%rax,%rdi), %r9d
	cvtsi2ssl	%r9d, %xmm0
	ucomiss	(%r8), %xmm0
	jp	.L25
	je	.L14
.L25:
	incl	%edx
.L14:
	movq	8(%rsp), %r10
	incl	%eax
	addq	%r10, %r8
	cmpl	%eax, %ebx
	jne	.L16
	incl	%ecx
	addq	$4, %rsi
	addl	%ebx, %edi
	jmp	.L13
.L31:
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r15d, %r15d
	call	__printf_chk@PLT
	cmpl	$9, %ebx
	jle	.L17
.L20:
	movl	$1, %edi
	call	sleep@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	jmp	.L18
.L17:
	cmpl	%r15d, %r14d
	jle	.L20
	movl	%r15d, %edx
	movl	%r15d, %ecx
	leaq	.LC2(%rip), %rsi
	movb	$2, %al
	movl	$2, %edi
	cvtss2sd	0(%rbp,%r15,4), %xmm0
	cvtss2sd	(%r12,%r15,4), %xmm1
	incq	%r15
	call	__printf_chk@PLT
	jmp	.L17
	.cfi_endproc
.LFE2040:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z15parMatTransposePfS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2068:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15parMatTransposePfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2068:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// CUDA to start with...
// Operation:  B = parMatTranspose(A)

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <unistd.h>

#define BLOCK_SIZE 32

__global__ void parMatTranspose (float *B, float *A, int ndim) {
  // Block index
  int bx = blockIdx.x;
  int by = blockIdx.y;
 
  // Thread index
  int tx = threadIdx.x;
  int ty = threadIdx.y;
    
  // Index into global array A.
  int i = blockDim.y*by+ty;
  int j = blockDim.x*bx+tx;
	
  // Working memory;
  __shared__ float block[BLOCK_SIZE][BLOCK_SIZE];
	
  if((i<ndim)&&(j<ndim)) {
    block[ty][tx] = A[j*ndim+i];
  }
  // Synchronize to make sure the matrices are loaded
  __syncthreads();
  if((i<ndim)&&(j<ndim)) {
    B[i*ndim+j]=block[ty][tx];
  }
  // Synchronize to make sure the matrices are loaded
  __syncthreads();
}



int main(int argc, char **argv) {
  int ndim;
  int threaddim=BLOCK_SIZE;
  int blockdim;
  float *h_A, *h_B;
  float *d_A, *d_B;
  int i,j,k;
  if(argc>1) {
    ndim=atoi(argv[1]);
  }
  else {
   ndim=1024;
  }

  blockdim=(ndim+BLOCK_SIZE-1)/BLOCK_SIZE;

while (1)
  {

  h_A=(float *)malloc(ndim*ndim*sizeof(float));
  h_B=(float *)malloc(ndim*ndim*sizeof(float));
  for(k=0; k<ndim*ndim; k++)
    h_A[k]=(float)k;

  hipMalloc((void **)&d_A,ndim*ndim*sizeof(float));
  printf("%lX\n", (unsigned long)d_A);
  
  hipMalloc((void **)&d_B,ndim*ndim*sizeof(float));

  hipMemcpy(d_A,h_A, ndim*ndim*sizeof(float), hipMemcpyHostToDevice);

  dim3 grid(blockdim,blockdim);
  dim3 threads(threaddim,threaddim);	
  parMatTranspose <<<grid, threads>>>(d_B, d_A, ndim);
  hipMemcpy(h_B,d_B, ndim*ndim*sizeof(float), hipMemcpyDeviceToHost);

  int count=0;
  for(i=0; i<ndim; i++) {
    for(j=0; j<ndim; j++) {
      if(h_B[ndim*j+i]!=(float)(ndim*i+j)) count++;
    }
  }

  printf("Count=%d\n", count);
  if(ndim<10) {
    for(i=0; i<ndim*ndim; i++)
      printf("a[%d]=%g b[%d]=%g\n", i, h_A[i], i, h_B[i]);
  }
  sleep (1);
  //cudaFree(d_A);
  //cudaFree(d_B);

  free(h_A);
  free(h_B);
  }
}

/* Major mode settings for GNU Emacs */
/* This coerces the editor to treat this as C code. */

/* Local Variables: */
/* mode:c           */
/* End:             */

	.text
	.file	"CUDA1.hip"
	.globl	_Z30__device_stub__parMatTransposePfS_i # -- Begin function _Z30__device_stub__parMatTransposePfS_i
	.type	_Z30__device_stub__parMatTransposePfS_i,@function
_Z30__device_stub__parMatTransposePfS_i: # @_Z30__device_stub__parMatTransposePfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15parMatTransposePfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__parMatTransposePfS_i, .Lfunc_end0-_Z30__device_stub__parMatTransposePfS_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1024, %eax                     # imm = 0x400
	cmpl	$2, %edi
	jl	.LBB1_2
# %bb.1:
	movq	8(%rsi), %rdi
	callq	atoi
                                        # kill: def $eax killed $eax def $rax
.LBB1_2:
	leal	31(%rax), %ecx
	leal	62(%rax), %edx
	testl	%ecx, %ecx
	cmovnsl	%ecx, %edx
	sarl	$5, %edx
	movl	%eax, %r14d
	imull	%r14d, %r14d
	leaq	(,%r14,4), %rbp
	testl	%eax, %eax
	sete	%cl
	movq	%rdx, %rsi
	shlq	$32, %rsi
	orq	%rdx, %rsi
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	cmpl	$10, %eax
	setge	%dl
	cmpl	$1, %r14d
	adcl	$0, %r14d
	movslq	%eax, %rbx
	movl	%ebx, %r15d
	orb	%cl, %dl
	movb	%dl, 7(%rsp)                    # 1-byte Spill
	shlq	$2, %rbx
	movq	%rbp, 32(%rsp)                  # 8-byte Spill
.LBB1_3:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_5 Depth 2
                                        #     Child Loop BB1_11 Depth 2
                                        #       Child Loop BB1_12 Depth 3
                                        #     Child Loop BB1_16 Depth 2
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r13
	testq	%r15, %r15
	je	.LBB1_6
# %bb.4:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_3 Depth=1
	xorl	%eax, %eax
.LBB1_5:                                # %.lr.ph
                                        #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r12,%rax,4)
	incq	%rax
	cmpq	%rax, %r14
	jne	.LBB1_5
.LBB1_6:                                # %._crit_edge
                                        #   in Loop: Header=BB1_3 Depth=1
	leaq	8(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	8(%rsp), %rsi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	8(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.7:                                #   in Loop: Header=BB1_3 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	%r15d, %edx
	callq	_Z30__device_stub__parMatTransposePfS_i
.LBB1_8:                                #   in Loop: Header=BB1_3 Depth=1
	movq	16(%rsp), %rsi
	movq	%r13, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%r15d, %r15d
	jle	.LBB1_9
# %bb.10:                               # %.preheader.preheader
                                        #   in Loop: Header=BB1_3 Depth=1
	xorl	%eax, %eax
	movq	%r13, %rcx
	xorl	%edx, %edx
	xorl	%esi, %esi
.LBB1_11:                               # %.preheader
                                        #   Parent Loop BB1_3 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_12 Depth 3
	movq	%r15, %rdi
	movq	%rcx, %r8
	movl	%eax, %r9d
.LBB1_12:                               #   Parent Loop BB1_3 Depth=1
                                        #     Parent Loop BB1_11 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r9d, %xmm0
	cmpneqss	(%r8), %xmm0
	movd	%xmm0, %r10d
	subl	%r10d, %esi
	incl	%r9d
	addq	%rbx, %r8
	decq	%rdi
	jne	.LBB1_12
# %bb.13:                               # %._crit_edge75
                                        #   in Loop: Header=BB1_11 Depth=2
	incq	%rdx
	addl	%r15d, %eax
	addq	$4, %rcx
	cmpq	%r15, %rdx
	jne	.LBB1_11
	jmp	.LBB1_14
.LBB1_9:                                #   in Loop: Header=BB1_3 Depth=1
	xorl	%esi, %esi
.LBB1_14:                               # %._crit_edge78
                                        #   in Loop: Header=BB1_3 Depth=1
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	cmpb	$0, 7(%rsp)                     # 1-byte Folded Reload
	jne	.LBB1_17
# %bb.15:                               # %.lr.ph81.preheader
                                        #   in Loop: Header=BB1_3 Depth=1
	xorl	%ebp, %ebp
.LBB1_16:                               # %.lr.ph81
                                        #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12,%rbp,4), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	(%r13,%rbp,4), %xmm1
	movl	$.L.str.2, %edi
	movl	%ebp, %esi
	movl	%ebp, %edx
	movb	$2, %al
	callq	printf
	incq	%rbp
	cmpq	%rbp, %r14
	jne	.LBB1_16
.LBB1_17:                               # %.loopexit
                                        #   in Loop: Header=BB1_3 Depth=1
	movl	$1, %edi
	callq	sleep
	movq	%r12, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	32(%rsp), %rbp                  # 8-byte Reload
	jmp	.LBB1_3
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15parMatTransposePfS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15parMatTransposePfS_i,@object # @_Z15parMatTransposePfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z15parMatTransposePfS_i
	.p2align	3, 0x0
_Z15parMatTransposePfS_i:
	.quad	_Z30__device_stub__parMatTransposePfS_i
	.size	_Z15parMatTransposePfS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%lX\n"
	.size	.L.str, 5

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Count=%d\n"
	.size	.L.str.1, 10

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"a[%d]=%g b[%d]=%g\n"
	.size	.L.str.2, 19

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15parMatTransposePfS_i"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__parMatTransposePfS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15parMatTransposePfS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15parMatTransposePfS_i ; -- Begin function _Z15parMatTransposePfS_i
	.globl	_Z15parMatTransposePfS_i
	.p2align	8
	.type	_Z15parMatTransposePfS_i,@function
_Z15parMatTransposePfS_i:               ; @_Z15parMatTransposePfS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s1, s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s0, v[1:2]
	v_mad_u64_u32 v[3:4], null, s14, s2, v[0:1]
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v4, v2, v3
	v_cmp_gt_i32_e32 vcc_lo, s1, v4
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mad_u64_u32 v[4:5], null, v3, s1, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, s0, s6, v4
	v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
	global_load_b32 v4, v[4:5], off
	v_lshl_add_u32 v5, v1, 7, v0
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v4
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_mad_u64_u32 v[4:5], null, v2, s1, v[3:4]
	v_lshl_add_u32 v0, v1, 7, v0
	ds_load_b32 v2, v0
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB0_4:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15parMatTransposePfS_i
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15parMatTransposePfS_i, .Lfunc_end0-_Z15parMatTransposePfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 292
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 4096
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15parMatTransposePfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15parMatTransposePfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
